Re: [U-Boot] [PATCH 2/2] Convert CONFIG_SYS_I2C_BUS_MAX to Kconfig

Hello Adam, Am 11.08.2017 um 13:39 schrieb Adam Ford: This converts the following to Kconfig: CONFIG_SYS_I2C_BUS_MAX Signed-off-by: Adam Ford --- arch/arm/include/asm/arch-am33xx/i2c.h | 1 - arch/arm/include/asm/arch-omap3/i2c.h | 1 -

[U-Boot] [PATCH 09/13] x86: Add Intel Braswell SoC support

This adds initial Intel Braswell SoC support. It uses Intel FSP to initialize the chipset. Similar to its predecessor BayTrail, there are some work to do to enable the legacy UART integrated in the Braswell SoC. Signed-off-by: Bin Meng --- arch/x86/Kconfig

[U-Boot] [PATCH 05/13] tools: binman: Add a new entry type for Intel VBT

This adds a new entry type for Intel Video BIOS Table. Signed-off-by: Bin Meng --- tools/binman/etype/intel_vbt.py| 14 ++ tools/binman/func_test.py | 9 - tools/binman/test/46_intel-vbt.dts | 14 ++ 3 files changed, 36

[U-Boot] [PATCH 13/13] x86: Support Intel Cherry Hill board

This adds support to Intel Cherry Hill board, a board based on Intel Braswell SoC. The following devices are validated: - serial port as the serial console - on-board Realtek 8169 ethernet controller - SATA AHCI controller - EMMC/SDHC controller - USB 3.0 xHCI controller - PCIe x1 slot with a

[U-Boot] [PATCH 07/13] x86: dm: video: Add a framebuffer driver that utilizes VBT

When a VBT is given to an FSP that supports graphics initialization, the FSP will produce a graphics info HOB that contains all necessary information for the linear frame buffer of the integrated graphics device. This adds a DM video driver for it. Signed-off-by: Bin Meng ---

[U-Boot] [PATCH 12/13] x86: braswell: Disable PUNIT power configuration for B0 stepping

FSP's built-in UPD configuration enables PUNIT power configuration, but on B0 stepping, this causes CPU hangs in fsp_init(). Disable it. Signed-off-by: Bin Meng --- arch/x86/cpu/braswell/fsp_configs.c | 6 ++ 1 file changed, 6 insertions(+) diff --git

[U-Boot] [PATCH 08/13] x86: fsp: Update fsp command to show spec 1.1 header

FSP spec 1.1 adds 3 new APIs and their offsets are in the header. Update the 'fsp hdr' command to show these new entries. Signed-off-by: Bin Meng --- arch/x86/include/asm/fsp/fsp_infoheader.h | 9 - arch/x86/lib/fsp/cmd_fsp.c| 24

[U-Boot] [PATCH 02/13] x86: fsp: Update struct common_buf for FSP spec 1.1

FSP spec 1.1 adds one more member to the struct common_buf to determine the memory size that can be reserved by FSP below "top of low usable memory" for bootloader usage. This new member uses the reserved space so that it is still compatible with previous FSP spec 1.0. A new HOB

[U-Boot] [PATCH 11/13] x86: braswell: Add FSP configuration

Add FSP related configuration for Braswell. Signed-off-by: Bin Meng --- arch/x86/cpu/braswell/Makefile | 2 +- arch/x86/cpu/braswell/fsp_configs.c| 158 ++ .../include/asm/arch-braswell/fsp/fsp_configs.h| 89

[U-Boot] [PATCH 04/13] x86: Add Video BIOS Table (VBT) related Kconfig options

This adds Kconfig options for Video BIOS Table which is normally required if you are using an Intel FSP firmware that is complaint with spec 1.1 or later to initialize the integrated graphics device. Signed-off-by: Bin Meng --- arch/x86/Kconfig | 34

[U-Boot] [PATCH 03/13] x86: fsp: Add FSP_GRAPHICS_INFO_HOB

This adds a new HOB type for graphics information introduced in FSP spec 1.1. When graphics capability is included in FSP and enabled, FSP produces an FSP_GRAPHICS_INFO_HOB as described in the EFI PI specification which provides information about the graphics mode and framebuffer. Signed-off-by:

[U-Boot] [PATCH 01/13] x86: tsc: Add Airmont reference clock values

Per the Intel 64 and IA-32 Architecture Software Developer's Manual, add the reference clock for Intel Atom Processors based on the Airmont Microarchitecture (Braswell). This keeps in sync with Linux kernel commit: 6fcb41c: x86/tsc_msr: Add Airmont reference clock values Signed-off-by: Bin

[U-Boot] [PATCH 06/13] x86: dts: Include Intel Video BIOS Table in the ROM image

Now that binman is able to recognize the Video BIOS Table entry, add such one in the u-boot.dtsi. Signed-off-by: Bin Meng --- arch/x86/dts/u-boot.dtsi | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi index

[U-Boot] [PATCH 00/13] x86: Add Intel Braswell SoC and Cherry Hill board support

Intel Braswell SoC is the follow-up processor of BayTrail on the Atom product line. This support utilizes Intel FSP firmware to initialize the SoC. Note its FSP is spec 1.1 compliant, but it is still backward compatible with spec 1.0. For simplicity, we are using the spec 1.0 APIs to do the

[U-Boot] [PATCH 4/5] x86: ich-spi: Move opcode registers configuration to another routine

At present the ICH SPI opcode registers configuration is done in the ich_spi_remove() routine, a little bit weird but that's how current. Linux MTD driver works. This changes to move the opcode registers configuration to a separate routine ich_spi_config_opcode() which might be called by U-Boot

[U-Boot] [PATCH 5/5] x86: fsp: Configure SPI opcode registers before SPI is locked down

Some Intel FSP (like Braswell) does SPI lock-down during the call to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done, it's bootloader's responsibility to configure the SPI controller's opcode registers properly otherwise SPI controller driver doesn't know how to communicate with the

[U-Boot] [PATCH 2/5] x86: ich-spi: Remove unnecessary assignment in ich_init_controller()

There is no need to do another assignment to ich7_spi. Signed-off-by: Bin Meng --- drivers/spi/ich.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index 46dd9a8..909eefc 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@

[U-Boot] [PATCH 3/5] x86: ich-spi: Don't read cached lock status

At present the ICH SPI controller driver reads the controller lock status from its register in the probe routine and saves the lock status to a member of priv. Later the driver uses the cached status from priv to judge whether the controller setting is locked and do different setup. But such

[U-Boot] [PATCH 1/5] x86: ich-spi: Remove spi_write_protect_region()

This routine is not called anywhere. Signed-off-by: Bin Meng --- drivers/spi/ich.c | 50 -- 1 file changed, 50 deletions(-) diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index bf2e99b..46dd9a8 100644 ---

[U-Boot] [PATCH v3 3/3] LS2080ARDB: Secure Boot defconfig for QSPI boot.

From: Udit Agarwal Add the secure boot defconfig for QSPI boot on LS2088ARDB platform. Signed-off-by: Udit Agarwal --- Changes in v3: Rebasing of the patch on top commit. This patch supersedes https://patchwork.ozlabs.org/patch/767680/

[U-Boot] [PATCH v3 2/3] LS2080ARDB: QSPI boot: Secure Boot image validation

From: Udit Agarwal Adds header address for PPA to be validated during ESBC phase for ARCH_LS2088 and QSPI_BOOT. Moves sec_init prior to ppa_init as for validation of PPA, sec must be initialised before the PPA is initialised. Signed-off-by: Udit Agarwal

[U-Boot] [PATCH v3 1/3] SECURE_BOOT: Unify memory map for Layerscape based platforms

Unify memory map for Layerscape based platforms. This patch includes changes in bootscript, bootscript header and PPA header addresses change as per unified memory map. Signed-off-by: Sumit Garg Tested-by: Vinitha Pillai --- Changes in v3: Rebasing

Re: [U-Boot] Initializing global_data on SuperH before board_init_f() ?

Hi Thomas, On Wednesday 16 August 2017 02:37 AM, Thomas Petazzoni wrote: > Hello, > > As you probably noticed with the few patches I sent late July, I am > porting U-Boot to an old SH7786 platform. As part of this effort, I > stumbled across a bug: the global_data structure is not initialized to

Re: [U-Boot] [PATCH 0/3] arm: am57xx/dra7xx: Boot Android from eMMC

On Tue, Aug 15, 2017 at 04:30:00PM +0300, Sam Protsenko wrote: > Provide a way to boot Android from eMMC for AM57xx EVM and DRA7 EVM boards. > > Sam Protsenko (3): > arm: omap: Define command for booting Android from eMMC > arm: am57xx: Define Android boot arguments > arm: dra7xx: Define

Re: [U-Boot] [PATCH 2/2] sf: Preserve QE bit when clearing BP# bits for Macronix flash

Hi Jagan, On Mon, Aug 14, 2017 at 1:35 PM, Bin Meng wrote: > Hi Jagan, > > On Mon, Aug 14, 2017 at 1:17 PM, Jagan Teki wrote: >> On Mon, Aug 14, 2017 at 10:34 AM, Bin Meng wrote: >>> Hi Jagan, >>> >>> On Mon, Aug 14, 2017 at

[U-Boot] [PATCH v1 2/2] imx: use BOOT_DEVICE_BOARD instead of UART

From: Stefan Agner i.MX 6 serial downloader is not necessarily booting via UART but can also boot from USB. In fact only some i.MX chips have serial downloader support via UART (e.g. 6UL/ULL and Vybrid) but all of them have serial downloader support via USB. Use the

[U-Boot] [PATCH v1 1/2] imx: fix USB boot mode detection for i.MX 6UL and 6ULL

From: Stefan Agner Add the reserved boot mode used in the bmode command for i.MX 6UL and 6ULL as introduced in commit 3fd9579085fa ("imx: mx6ull: fix USB bmode for i.MX 6UL and 6ULL"). Also replace BMODE_UART with BMODE_RESERVED, which is more appropriate. Commit

Re: [U-Boot] [PATCH 1/2] board/spear/common: move code to arch/arm/cpu/arm926ejs/spear/

On Tue, Aug 15, 2017 at 10:52:44PM +0200, Thomas Petazzoni wrote: > The code in board/spear/common/ is not board-specific but > SoC-specific. Therefore, boards from other vendors than "spear" may > want to re-use this code, which is currently difficult with the code > being placed in

Re: [U-Boot] [PATCH v1 2/7] usb: gadget: add SDP driver

On 2017-08-10 01:14, Stefano Babic wrote: > Hi Stefan, > > On 05/08/2017 01:38, Stefan Agner wrote: >> From: Stefan Agner >> >> Add SDP (Serial Downloader Protocol) implementation for U-Boot. The >> protocol is used in NXP SoC's boot ROM and allows to download program

[U-Boot] [PATCH] common/board_f.c: remove CONFIG_SYS_GENERIC_GLOBAL_DATA

CONFIG_SYS_GENERIC_GLOBAL_DATA is no longer used by any board or platform, so support for it can be dropped. Signed-off-by: Thomas Petazzoni --- README | 6 -- common/board_f.c | 27 ---

[U-Boot] Initializing global_data on SuperH before board_init_f() ?

Hello, As you probably noticed with the few patches I sent late July, I am porting U-Boot to an old SH7786 platform. As part of this effort, I stumbled across a bug: the global_data structure is not initialized to zero by the SuperH architecture code before calling board_init_f(). The SuperH

Re: [U-Boot] [PATCH 1/3] arch/sh: don't bring common/env_embedded.o into the link

Hello, On Thu, 3 Aug 2017 08:20:20 +0900, Nobuhiro Iwamatsu wrote: > Hi, > > 2017-07-29 6:46 GMT+09:00 Thomas Petazzoni > : > > The linker script for SuperH brings the .ppcenv and .ppcenvr section > > of common/env_embedded.o into the .text section. However,

[U-Boot] [PATCH 2/2] arch/arm/cpu/arm926ejs/spear/cpu.c: guard do_switch_ecc() with CONFIG_NAND_FSMC

do_switch_ecc() calls fsmc_nand_switch_ecc(), which is a direct function call into drivers/mtd/nand/fsmc_nand.c. However, this function is not guarded by CONFIG_NAND_FSMC, which results to a build failure if CONFIG_NAND_FSMC is disabled. Signed-off-by: Thomas Petazzoni

[U-Boot] [PATCH 1/2] board/spear/common: move code to arch/arm/cpu/arm926ejs/spear/

The code in board/spear/common/ is not board-specific but SoC-specific. Therefore, boards from other vendors than "spear" may want to re-use this code, which is currently difficult with the code being placed in board/spear/common/. Since this code really is SoC-specific, this commit moves it to

Re: [U-Boot] [PATCH 4/5] vsprintf.c: add GUID printing

On 08/10/2017 01:14 AM, Rob Clark wrote: > This works (roughly) the same way as linux's, but we currently always > print lower-case (ie. we just keep %pUB and %pUL for compat with linux), > mostly just because that is what uuid_bin_to_str() supports. > > %pUb:

[U-Boot] [PATCH 1/1] efi_loader: allow return value in EFI_CALL

Macro EFI_CALL was introduced to call an UEFI function. Unfortunately is did not support return values. Most UEFI functions have a return value. So let's rename EFI_CALL to EFI_CALL_VOID and introduce a new EFI_CALL macro that supports return values. Signed-off-by: Heinrich Schuchardt

[U-Boot] [PATCH v3 4/5] spl: fit: Support both external and embedded data

SPL supports U-Boot image in FIT format which has data outside of FIT structure. This adds support for embedded data for normal FIT images. Signed-off-by: York Sun Reviewed-by: Tom Rini --- Changes in v3: Update doc/uImage.FIT/source_file_format.txt with

[U-Boot] [PATCH v3 2/5] cmd: spl: Fix compiling warning

Fix warning "cast from pointer to integer of different size". Signed-off-by: York Sun Reviewed-by: Tom Rini --- Changes in v3: None Changes in v2: None cmd/spl.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/cmd/spl.c

[U-Boot] [PATCH v3 3/5] spl: fit: Eanble GZIP support for image decompression

Add Kconfig option SPL_GZIP and SPL_ZLIB to enable gunzip support for SPL boot, eg. falcon boot compressed kernel image. Signed-off-by: York Sun Reviewed-by: Tom Rini --- Changes in v3: Replace ifdef with if IS_ENABLED(). Add help to new Kconfig optons.

[U-Boot] [PATCH v3 5/5] spl: fit: Add booting OS first

If CONFIG_SPL_OS_BOOT is enabled, boot OS if kernel image is found in FIT structure. Signed-off-by: York Sun Reviewed-by: Tom Rini --- This presums the kernel image doesn't exist in a FIT image intended for U-Boot. If kernel image normally co-exists with

[U-Boot] [PATCH v3 1/5] tools: pblimage: Fix address calculation

The image size should be added to the initial pbl command, not bit "ORed". Signed-off-by: York Sun --- Changes in v3: None Changes in v2: None tools/pblimage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/pblimage.c b/tools/pblimage.c index

[U-Boot] [PATCH v3 0/5] Extend FIT support for falcon boot

This patch set extends FIT support for falcon boot. The difference between U-Boot FIT and Linux FIT lies not only on the images inside, but also the data offset. U-Boot FIT image has data outside of the FIT structure while Linux FIT image can have data embedded within. Linux FIT can use compressed

[U-Boot] [PATCH] ARM: hisilicon: hikey: Fix eMMC with latest ATF & U-Boot

ATF can leave the MMC IP in a state where U-Boot mmc driver can't enumerate the eMMC. This patch provides a mmc0_reset_clk() function like we already so do sd card controller which resets the IP when entering U-Boot. With this patch applied eMMC partitions are successfully enumerated again. =>

Re: [U-Boot] [PATCH] PCI: layerscape: Make the pcie link up status judgement more specific

On 08/15/2017 03:03 AM, Bao Xiaowei wrote: > For some special reset times for longer pcie devices, in this case, the > pcie device may on polling compliance state, the RC considers the pcie > device is link up, but the pcie device is not link up, only the L0 state > is link up state. So add the

Re: [U-Boot] [PATCH 1/2] arm: use $loadaddr as the standalone entry point

Dear Max, In message <1502799746.3076.16.ca...@gmail.com> you wrote: > > Wolfgang says that a board needs to decide on what image type to > use for the standalone application and then from that set an No, I did not say this. On contrary, this is not up to the "board" to decide. This is a

[U-Boot] [PATCH 3/3] arm: dra7xx: Define Android boot arguments

Signed-off-by: Sam Protsenko --- configs/dra7xx_evm_defconfig| 2 ++ configs/dra7xx_hs_evm_defconfig | 2 ++ 2 files changed, 4 insertions(+) diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 4fff0cf734..0357abc6cd 100644 ---

[U-Boot] [PATCH 2/3] arm: am57xx: Define Android boot arguments

Signed-off-by: Sam Protsenko --- configs/am57xx_evm_defconfig | 2 ++ configs/am57xx_evm_nodt_defconfig | 2 ++ configs/am57xx_hs_evm_defconfig | 2 ++ 3 files changed, 6 insertions(+) diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig

[U-Boot] [PATCH 1/3] arm: omap: Define command for booting Android from eMMC

If SD card is present -- try to boot from it first. If no -- try to boot Android from eMMC. Signed-off-by: Sam Protsenko --- include/environment/ti/boot.h | 24 +++- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git

[U-Boot] [PATCH 0/3] arm: am57xx/dra7xx: Boot Android from eMMC

Provide a way to boot Android from eMMC for AM57xx EVM and DRA7 EVM boards. Sam Protsenko (3): arm: omap: Define command for booting Android from eMMC arm: am57xx: Define Android boot arguments arm: dra7xx: Define Android boot arguments configs/am57xx_evm_defconfig | 2 ++

Re: [U-Boot] [PATCH 1/2] arm: use $loadaddr as the standalone entry point

Dear Tom, In message <20170815113952.GE20467@bill-the-cat> you wrote: > > What CONFIG_STANDALONE_LOAD_ADDR is, is the location that we want > hello_world, or other example stand alone applications loaded into > memory at. CONFIG_LOADADDR is the safe default location to load things > into memory

Re: [U-Boot] [PATCH 2/2] hello_world.c: fix entry point in case of arm thumb binary

Hello all Am Montag, den 14.08.2017, 17:15 -0400 schrieb Tom Rini: On Sat, Aug 12, 2017 at 11:03:46AM +0200, Max Krummenacher wrote: If compiling for thumb the U-Boot 'go' command can not jump to the entry point, as the jump will be done in the assumption that the code jumped to is using the

Re: [U-Boot] [PATCH 1/2] arm: use $loadaddr as the standalone entry point

Hello all Am Dienstag, den 15.08.2017, 07:39 -0400 schrieb Tom Rini: > On Tue, Aug 15, 2017 at 09:32:30AM +0200, Wolfgang Denk wrote: > > > > Dear Tom, > > > > In message <20170814211300.GM20467@bill-the-cat> you wrote: > > > > > > > > > But we're talking about CONFIG_STANDALONE_LOAD_ADDR not

Re: [U-Boot] [PATCH 1/2] arm: use $loadaddr as the standalone entry point

On Tue, Aug 15, 2017 at 09:32:30AM +0200, Wolfgang Denk wrote: > Dear Tom, > > In message <20170814211300.GM20467@bill-the-cat> you wrote: > > > > But we're talking about CONFIG_STANDALONE_LOAD_ADDR not > > CONFIG_STANDALONE_ENTRY_POINT. What we've been doing in > > arch/arm/config.mk has been

Re: [U-Boot] [PATCH] armv8: layerscape platform pcie link up state judgment strongly

Hi York, I have add the inline comment in the new patch and have sent to you, please review it. Thanks -Original Message- From: Xiaowei Bao Sent: Friday, August 11, 2017 9:39 AM To: York Sun ; u-boot@lists.denx.de; Priyanka Jain ; Z.q. Hou

[U-Boot] [PATCH] PCI: layerscape: Make the pcie link up status judgement more specific

For some special reset times for longer pcie devices, in this case, the pcie device may on polling compliance state, the RC considers the pcie device is link up, but the pcie device is not link up, only the L0 state is link up state. So add the link up status judgement mechanisms. Signed-off-by:

Re: [U-Boot] [PATCH v2 4/5] arm: socfpga: Add intermediate driver between flash and FPGA manager

On 08/14/2017 05:58 AM, Chee, Tien Fong wrote: > On Sab, 2017-08-12 at 18:49 +0200, Marek Vasut wrote: >> On 08/12/2017 10:03 AM, Chee, Tien Fong wrote: >> [...] >>> > > 1: It having ability to the right memory(OCRAM or SDRAM) to > achieve > the > best FPGA programing

[U-Boot] [PATCH v2 2/2] board: atmel: Use the new PIT timer driver

Use the Atmel PIT timer driver which supports the driver model and device tree. Signed-off-by: Wenyou Yang --- Changes in v2: - Integrate the PATCH {timer: Add Atmel PIT timer driver} to one patch set. - Rebase on latest commit of uboot/master (2d3c4ae35). -

[U-Boot] [PATCH v2 1/2] driver: timer: Add the Atmel PIT timer driver

Add the new Atmel PIT timer driver, which supports the driver model and device tree. Signed-off-by: Wenyou Yang --- Changes in v2: None arch/arm/mach-at91/arm926ejs/Makefile | 2 + arch/arm/mach-at91/armv7/Makefile | 2 + drivers/timer/Kconfig

[U-Boot] [PATCH v2 0/2] driver: timer: Add Atmel PIT timer driver

Add the Atmel PIT timer driver which supports the driver model and device tree, and covert the boards to support the new Atmel PIT timer driver. Changes in v2: - Integrate the PATCH {timer: Add Atmel PIT timer driver} to one patch set. - Rebase on latest commit of uboot/master (2d3c4ae35).

[U-Boot] [PATCH 4/4] x86: dfi-bt700: Select SERIAL_IRQ_BUFFER via Kconfig

To support more input characters (longer stings pasted into the U-Boot prompt) without dropping, lets selects the recently added UART RX interrupt buffer for these boards. Signed-off-by: Stefan Roese Cc: Simon Glass Cc: Bin Meng ---

[U-Boot] [PATCH 1/4] x86: serial.dtsi: Add UART interrupt property

This patch adds the interrupt property for the legacy 0x3f8 NS16550 UART on standard x86 platforms. This can be used to enable the RX interrupt buffer support of the ns16550 driver, so that even very long lines can be pasted in the U-Boot console shell. Signed-off-by: Stefan Roese

[U-Boot] [PATCH 2/4] x86: dfi-bt700.dtsi: Add PCI HS-UART interrupt property

This patch adds the interrupt property for the PCI HS-UART NS16550 UART on Bay Trail x86 platforms. This can be used to enable the RX interrupt buffer support of the ns16550 driver, so that even very long lines can be pasted in the U-Boot console shell. Please note that in general the interrupt

[U-Boot] [PATCH 3/4] x86: conga-qeval20-qa3-e3845: Select SERIAL_IRQ_BUFFER via Kconfig

To support more input characters (longer stings pasted into the U-Boot prompt) without dropping, lets selects the recently added UART RX interrupt buffer for these boards. Signed-off-by: Stefan Roese Cc: Simon Glass Cc: Bin Meng ---

[U-Boot] [PATCH] serial: ns16550: Enhancements to the RX interrupt buffer support

This patch changes the RX interrupt buffer support in these ways, mostly suggested by Bin Meng a few weeks ago: - The RX interrupt buffers size is now configurable via Kconfig (default still at 256 bytes) - For NS16550 devices on the PCI bus, the interrupt number will be read from the PCI

Re: [U-Boot] board: atmel: Enable to use new timer driver

Hi Tom, On 2017/8/14 0:00, Tom Rini wrote: On Fri, Aug 04, 2017 at 08:39:33AM +0800, wenyou.y...@microchip.com wrote: Use the Atmel PIT timer driver which supports the driver model and device tree. Signed-off-by: Wenyou Yang As-is this breaks:

Re: [U-Boot] [PATCH 1/2] arm: use $loadaddr as the standalone entry point

Dear Tom, In message <20170814211300.GM20467@bill-the-cat> you wrote: > > But we're talking about CONFIG_STANDALONE_LOAD_ADDR not > CONFIG_STANDALONE_ENTRY_POINT. What we've been doing in > arch/arm/config.mk has been on my to fix list for a long time, because > it's been wrong for so many

[U-Boot] [PATCH v5 2/2] sun50i: a64: Add initial NanoPi A64 support

From: Jagan Teki NanoPi A64 is a new board of high performance with low cost designed by FriendlyElec., using the Allwinner A64 SOC. Nanopi A64 features - Allwinner A64, 64-bit Quad-core Cortex-A53@648MHz to 1.152GHz, DVFS - 1GB DDR3 RAM - MicroSD - Gigabit Ethernet

[U-Boot] [PATCH v5 1/2] sun50i: a64: Sync Linux [oe]hci0 nodes

From: Jagan Teki Synced ohci0 and ehci0 nodes from Linux for sun50i-a64.dtsi Here is the Linux last merge tag details: Merge: 0e91f43d e5770b7 Author: Stephen Rothwell Date: Fri Jun 9 14:59:55 2017 +1000 Merge remote-tracking branch

[U-Boot] [PATCH v2] sun50i: a64: Add A64-OLinuXino initial support

From: Jagan Teki OLimex A64-OLinuXino is an open-source hardware board using the Allwinner A64 SOC. OLimex A64-OLinuXino has - A64 Quad-core Cortex-A53 64bit - 1GB or 2GB RAM DDR3L @ 672Mhz - microSD slot and 4/8/16GB eMMC - Debug TTL UART - HDMI - LCD - IR receiver