[llvm-branch-commits] [misexpect] Support diagnostics from frontend profile data (PR #96524)

2024-07-31 Thread Paul Kirth via llvm-branch-commits


@@ -0,0 +1,44 @@
+// Test that missing-annotations detects branches that are hot, but not 
annotated
+
+// test diagnostics are issued when profiling data mis-matches annotations
+// RUN: llvm-profdata merge %S/Inputs/missing-annotations-branch.proftext -o 
%t.profdata

ilovepi wrote:

Sure. The use of Inputs here is mostly following the convention I've seen in 
other tests. I'm unsure how much I can reuse the `.proftext` file between 
tests, so I can probably just use split-lines for those too.

https://github.com/llvm/llvm-project/pull/96524
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[llvm-branch-commits] [clang][misexpect] Add support to clang for profitable annotation diagnostics (PR #96525)

2024-07-30 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/96525


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[llvm-branch-commits] [clang][misexpect] Add support to clang for profitable annotation diagnostics (PR #96525)

2024-07-30 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/96525


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[llvm-branch-commits] [misexpect] Support diagnostics from frontend profile data (PR #96524)

2024-07-30 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/96524


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[llvm-branch-commits] [misexpect] Support diagnostics from frontend profile data (PR #96524)

2024-07-30 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/96524


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[llvm-branch-commits] [llvm][misexpect] Enable diagnostics for profitable llvm.expect annotations (PR #96523)

2024-07-30 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/96523


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[llvm-branch-commits] [llvm][misexpect] Enable diagnostics for profitable llvm.expect annotations (PR #96523)

2024-07-30 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/96523


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[llvm-branch-commits] [llvm] release/19.x: [StackFrameLayoutAnalysis] Support more SlotTypes (#100562) (PR #101042)

2024-07-29 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi approved this pull request.

I'd say its a good set of fixes to add to the release.

https://github.com/llvm/llvm-project/pull/101042
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[llvm-branch-commits] [clang-tidy] Add FixIts for libc namespace macros (PR #99681)

2024-07-22 Thread Paul Kirth via llvm-branch-commits


@@ -1,4 +1,6 @@
-// RUN: %check_clang_tidy %s llvmlibc-implementation-in-namespace %t
+// RUN: %check_clang_tidy %s llvmlibc-implementation-in-namespace %t -fix

ilovepi wrote:

ack. I saw those running, but I saw `-fix` on a lot of other tests outside of 
llvmlibc. I'm guessing those are probalby older tests that predate that logic? 
either way, I'll address this shortly.

https://github.com/llvm/llvm-project/pull/99681
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[llvm-branch-commits] [clang-tidy] Add FixIts for libc namespace macros (PR #99681)

2024-07-22 Thread Paul Kirth via llvm-branch-commits


@@ -41,8 +50,26 @@ void ImplementationInNamespaceCheck::check(
 
   // Enforce that the namespace is the result of macro expansion
   if (Result.SourceManager->isMacroBodyExpansion(NS->getLocation()) == false) {
-diag(NS->getLocation(), "the outermost namespace should be the '%0' macro")
-<< RequiredNamespaceDeclMacroName;
+auto DB = diag(NS->getLocation(),
+   "the outermost namespace should be the '%0' macro")
+  << RequiredNamespaceDeclMacroName;
+
+// TODO: Determine how to split inline namespaces correctly in the 
FixItHint
+//
+// We can't easily replace LIBC_NAMEPACE::inner::namespace { with
+//
+// namespace LIBC_NAMEPACE_DECL {
+//   namespace inner::namespace {
+//
+// For now, just update the simple case w/ LIBC_NAMEPACE_DECL
+if (!NS->isInlineNamespace())
+  DB << FixItHint::CreateReplacement(NS->getLocation(),
+ RequiredNamespaceDeclMacroName);
+
+DB << IncludeInserter.createIncludeInsertion(
+Result.SourceManager->getFileID(NS->getBeginLoc()),
+NamespaceMacroHeader);

ilovepi wrote:

hmm, yeah. That's a bit awkward.

https://github.com/llvm/llvm-project/pull/99681
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[llvm-branch-commits] [misexpect] Support diagnostics from frontend profile data (PR #96524)

2024-07-22 Thread Paul Kirth via llvm-branch-commits


@@ -3,7 +3,7 @@
 
 ; RUN: llvm-profdata merge %S/Inputs/misexpect-branch-correct.proftext -o 
%t.profdata
 
-; RUN: opt < %s -passes="function(lower-expect),pgo-instr-use" 
-pgo-test-profile-file=%t.profdata -pgo-missing-annotations 
-pass-remarks=missing-annotation -S 2>&1 | FileCheck %s 
--check-prefix=MISSING_ANNOTATION
+; RUN: opt < %s -passes="function(lower-expect),pgo-instr-use" 
-pgo-test-profile-file=%t.profdata -pgo-missing-annotations 
-pass-remarks=missing-annotations -S 2>&1 | FileCheck %s 
--check-prefix=MISSING_ANNOTATION

ilovepi wrote:

Oops, I thought I had removed those in the base revision. Let me rebase this 
stack and address that in #96523.

https://github.com/llvm/llvm-project/pull/96524
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[llvm-branch-commits] [misexpect] Support diagnostics from frontend profile data (PR #96524)

2024-07-22 Thread Paul Kirth via llvm-branch-commits


@@ -369,9 +369,21 @@ static bool lowerExpectIntrinsic(Function ) {
 if (BranchInst *BI = dyn_cast(BB.getTerminator())) {
   if (handleBranchExpect(*BI))
 ExpectIntrinsicsHandled++;
+  else {
+SmallVector Weights;
+if (extractBranchWeights(*BI, Weights))
+  misexpect::checkMissingAnnotations(*BI, Weights,
+ /*IsFrontendInstr=*/false);

ilovepi wrote:

oh no! You're right, this is basically dead. Let me go through this and try to 
figure out why I thought this was working as intended.

https://github.com/llvm/llvm-project/pull/96524
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[llvm-branch-commits] [clang-tidy] Add FixIts for libc namespace macros (PR #99681)

2024-07-19 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/99681


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[llvm-branch-commits] [clang-tidy] Add FixIts for libc namespace macros (PR #99681)

2024-07-19 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/99681


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[llvm-branch-commits] [clang-tidy] Add FixIts for libc namespace macros (PR #99681)

2024-07-19 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi created 
https://github.com/llvm/llvm-project/pull/99681

This adds a few FixIts that update the usage of namespaces other than
LIBC_NAMESPACE_DECL, and add the required header when its missing.



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[llvm-branch-commits] [misexpect] Support diagnostics from frontend profile data (PR #96524)

2024-07-18 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi edited 
https://github.com/llvm/llvm-project/pull/96524
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[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-08 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-08 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be926010066..0d0ab5de9acc17 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e2..91321f33297aa9 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] [lld] [lld] Support merging RISC-V Atomics ABI attributes (PR #97347)

2024-07-08 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi edited 
https://github.com/llvm/llvm-project/pull/97347
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[llvm-branch-commits] [lld] [lld] Support merging RISC-V Atomics ABI attributes (PR #97347)

2024-07-08 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/97347

>From 5c57d12517ad58310511eb27bf7cc4ec660d4fa7 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Tue, 2 Jul 2024 09:39:46 -0700
Subject: [PATCH] Add handling for invalid tags

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp  | 22 --
 lld/test/ELF/riscv-attributes.s |  9 +
 2 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index c48b9f7c11047..07a1b63be8051 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1102,7 +1102,20 @@ static void mergeAtomic(DenseMap::iterator it,
 ": atomic_abi=" + Twine(static_cast(newTag)));
   };
 
-  switch (static_cast(oldTag)) {
+  auto reportUnknownAbiError = [](const InputSectionBase *section,
+  RISCVAtomicAbiTag tag) {
+switch (tag) {
+case RISCVAtomicAbiTag::UNKNOWN:
+case RISCVAtomicAbiTag::A6C:
+case RISCVAtomicAbiTag::A6S:
+case RISCVAtomicAbiTag::A7:
+  return;
+};
+errorOrWarn("unknown atomic abi for " + section->name + "\n>>> " +
+toString(section) +
+": atomic_abi=" + Twine(static_cast(tag)));
+  };
+  switch (oldTag) {
   case RISCVAtomicAbiTag::UNKNOWN:
 it->getSecond() = static_cast(newTag);
 return;
@@ -1145,7 +1158,12 @@ static void mergeAtomic(DenseMap::iterator it,
   return;
 };
   };
-  llvm_unreachable("unknown AtomicABI");
+
+  // If we get here, then we have an invalid tag, so report it.
+  // Putting these checks at the end allows us to only do these checks when we
+  // need to, since this is expected to be a rare occurrence.
+  reportUnknownAbiError(oldSection, oldTag);
+  reportUnknownAbiError(newSection, newTag);
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..057223c18418e 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -52,6 +52,12 @@
 # ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
 # ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
 
+## RISC-V tag merging for atomic_abi values A6C and invalid lead to an error.
+# RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_invalid.s -o 
atomic_abi_invalid.o
+# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_invalid.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_INVALID --implicit-check-not=error:
+# ATOMIC_ABI_INVALID: error: unknown atomic abi for .riscv.attributes
+# ATOMIC_ABI_INVALID-NEXT: >>> atomic_abi_invalid.o:(.riscv.attributes): 
atomic_abi=42
+
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
 # RUN: llvm-readobj -A atomic_abi_A6C_A6S | FileCheck %s --check-prefix=A6C_A6S
@@ -332,6 +338,9 @@
 #--- atomic_abi_A7.s
 .attribute atomic_abi, 3
 
+#--- atomic_abi_invalid.s
+.attribute atomic_abi, 42
+
 #  UNKNOWN_NONE: BuildAttributes {
 # UNKNOWN_NONE-NEXT:   FormatVersion: 0x41
 # UNKNOWN_NONE-NEXT:   Section 1 {

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[llvm-branch-commits] [lld] [lld] Support merging RISC-V Atomics ABI attributes (PR #97347)

2024-07-08 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/97347

>From 5c57d12517ad58310511eb27bf7cc4ec660d4fa7 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Tue, 2 Jul 2024 09:39:46 -0700
Subject: [PATCH] Add handling for invalid tags

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp  | 22 --
 lld/test/ELF/riscv-attributes.s |  9 +
 2 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index c48b9f7c110476..07a1b63be80510 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1102,7 +1102,20 @@ static void mergeAtomic(DenseMap::iterator it,
 ": atomic_abi=" + Twine(static_cast(newTag)));
   };
 
-  switch (static_cast(oldTag)) {
+  auto reportUnknownAbiError = [](const InputSectionBase *section,
+  RISCVAtomicAbiTag tag) {
+switch (tag) {
+case RISCVAtomicAbiTag::UNKNOWN:
+case RISCVAtomicAbiTag::A6C:
+case RISCVAtomicAbiTag::A6S:
+case RISCVAtomicAbiTag::A7:
+  return;
+};
+errorOrWarn("unknown atomic abi for " + section->name + "\n>>> " +
+toString(section) +
+": atomic_abi=" + Twine(static_cast(tag)));
+  };
+  switch (oldTag) {
   case RISCVAtomicAbiTag::UNKNOWN:
 it->getSecond() = static_cast(newTag);
 return;
@@ -1145,7 +1158,12 @@ static void mergeAtomic(DenseMap::iterator it,
   return;
 };
   };
-  llvm_unreachable("unknown AtomicABI");
+
+  // If we get here, then we have an invalid tag, so report it.
+  // Putting these checks at the end allows us to only do these checks when we
+  // need to, since this is expected to be a rare occurrence.
+  reportUnknownAbiError(oldSection, oldTag);
+  reportUnknownAbiError(newSection, newTag);
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e2..057223c18418e1 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -52,6 +52,12 @@
 # ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
 # ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
 
+## RISC-V tag merging for atomic_abi values A6C and invalid lead to an error.
+# RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_invalid.s -o 
atomic_abi_invalid.o
+# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_invalid.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_INVALID --implicit-check-not=error:
+# ATOMIC_ABI_INVALID: error: unknown atomic abi for .riscv.attributes
+# ATOMIC_ABI_INVALID-NEXT: >>> atomic_abi_invalid.o:(.riscv.attributes): 
atomic_abi=42
+
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
 # RUN: llvm-readobj -A atomic_abi_A6C_A6S | FileCheck %s --check-prefix=A6C_A6S
@@ -332,6 +338,9 @@
 #--- atomic_abi_A7.s
 .attribute atomic_abi, 3
 
+#--- atomic_abi_invalid.s
+.attribute atomic_abi, 42
+
 #  UNKNOWN_NONE: BuildAttributes {
 # UNKNOWN_NONE-NEXT:   FormatVersion: 0x41
 # UNKNOWN_NONE-NEXT:   Section 1 {

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[llvm-branch-commits] [lld] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)

2024-07-02 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/97347

>From 5c57d12517ad58310511eb27bf7cc4ec660d4fa7 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Tue, 2 Jul 2024 09:39:46 -0700
Subject: [PATCH] Add handling for invalid tags

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp  | 22 --
 lld/test/ELF/riscv-attributes.s |  9 +
 2 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index c48b9f7c11047..07a1b63be8051 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1102,7 +1102,20 @@ static void mergeAtomic(DenseMap::iterator it,
 ": atomic_abi=" + Twine(static_cast(newTag)));
   };
 
-  switch (static_cast(oldTag)) {
+  auto reportUnknownAbiError = [](const InputSectionBase *section,
+  RISCVAtomicAbiTag tag) {
+switch (tag) {
+case RISCVAtomicAbiTag::UNKNOWN:
+case RISCVAtomicAbiTag::A6C:
+case RISCVAtomicAbiTag::A6S:
+case RISCVAtomicAbiTag::A7:
+  return;
+};
+errorOrWarn("unknown atomic abi for " + section->name + "\n>>> " +
+toString(section) +
+": atomic_abi=" + Twine(static_cast(tag)));
+  };
+  switch (oldTag) {
   case RISCVAtomicAbiTag::UNKNOWN:
 it->getSecond() = static_cast(newTag);
 return;
@@ -1145,7 +1158,12 @@ static void mergeAtomic(DenseMap::iterator it,
   return;
 };
   };
-  llvm_unreachable("unknown AtomicABI");
+
+  // If we get here, then we have an invalid tag, so report it.
+  // Putting these checks at the end allows us to only do these checks when we
+  // need to, since this is expected to be a rare occurrence.
+  reportUnknownAbiError(oldSection, oldTag);
+  reportUnknownAbiError(newSection, newTag);
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..057223c18418e 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -52,6 +52,12 @@
 # ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
 # ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
 
+## RISC-V tag merging for atomic_abi values A6C and invalid lead to an error.
+# RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_invalid.s -o 
atomic_abi_invalid.o
+# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_invalid.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_INVALID --implicit-check-not=error:
+# ATOMIC_ABI_INVALID: error: unknown atomic abi for .riscv.attributes
+# ATOMIC_ABI_INVALID-NEXT: >>> atomic_abi_invalid.o:(.riscv.attributes): 
atomic_abi=42
+
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
 # RUN: llvm-readobj -A atomic_abi_A6C_A6S | FileCheck %s --check-prefix=A6C_A6S
@@ -332,6 +338,9 @@
 #--- atomic_abi_A7.s
 .attribute atomic_abi, 3
 
+#--- atomic_abi_invalid.s
+.attribute atomic_abi, 42
+
 #  UNKNOWN_NONE: BuildAttributes {
 # UNKNOWN_NONE-NEXT:   FormatVersion: 0x41
 # UNKNOWN_NONE-NEXT:   Section 1 {

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[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-02 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-02 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)

2024-07-02 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/97347


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[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)

2024-07-02 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/97347


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[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)

2024-07-01 Thread Paul Kirth via llvm-branch-commits


@@ -1084,10 +1084,76 @@ static void 
mergeArch(RISCVISAUtils::OrderedExtensionMap ,
   }
 }
 
+static void mergeAtomic(DenseMap::iterator it,
+const InputSectionBase *oldSection,
+const InputSectionBase *newSection,
+RISCVAttrs::RISCVAtomicAbiTag oldTag,
+RISCVAttrs::RISCVAtomicAbiTag newTag) {
+  using RISCVAttrs::RISCVAtomicAbiTag;
+  // Same tags stay the same, and UNKNOWN is compatible with anything
+  if (oldTag == newTag || newTag == RISCVAtomicAbiTag::UNKNOWN)
+return;
+
+  auto reportAbiError = [&]() {
+errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
+toString(oldSection) +
+": atomic_abi=" + Twine(static_cast(oldTag)) +
+"\n>>> " + toString(newSection) +
+": atomic_abi=" + Twine(static_cast(newTag)));
+  };
+
+  switch (static_cast(oldTag)) {
+  case RISCVAtomicAbiTag::UNKNOWN:
+it->getSecond() = static_cast(newTag);
+return;
+  case RISCVAtomicAbiTag::A6C:
+switch (newTag) {
+case RISCVAtomicAbiTag::A6S:
+  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  return;
+case RISCVAtomicAbiTag::A7:
+  reportAbiError();
+  return;
+case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
+case RISCVAttrs::RISCVAtomicAbiTag::A6C:
+  return;
+};
+
+  case RISCVAtomicAbiTag::A6S:
+switch (newTag) {
+case RISCVAtomicAbiTag::A6C:
+  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  return;
+case RISCVAtomicAbiTag::A7:
+  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  return;
+case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
+case RISCVAttrs::RISCVAtomicAbiTag::A6S:
+  return;
+};
+
+  case RISCVAtomicAbiTag::A7:
+switch (newTag) {
+case RISCVAtomicAbiTag::A6S:
+  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  return;
+case RISCVAtomicAbiTag::A6C:
+  reportAbiError();
+  return;
+case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
+case RISCVAttrs::RISCVAtomicAbiTag::A7:
+  return;
+};
+  };
+  llvm_unreachable("unknown AtomicABI");

ilovepi wrote:

Ah, fair point. I'll update w/ an error instead.

https://github.com/llvm/llvm-project/pull/97347
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[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)

2024-07-01 Thread Paul Kirth via llvm-branch-commits


@@ -1084,10 +1084,76 @@ static void 
mergeArch(RISCVISAUtils::OrderedExtensionMap ,
   }
 }
 
+static void mergeAtomic(DenseMap::iterator it,
+const InputSectionBase *oldSection,
+const InputSectionBase *newSection,
+RISCVAttrs::RISCVAtomicAbiTag oldTag,
+RISCVAttrs::RISCVAtomicAbiTag newTag) {
+  using RISCVAttrs::RISCVAtomicAbiTag;
+  // Same tags stay the same, and UNKNOWN is compatible with anything
+  if (oldTag == newTag || newTag == RISCVAtomicAbiTag::UNKNOWN)
+return;
+
+  auto reportAbiError = [&]() {
+errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
+toString(oldSection) +
+": atomic_abi=" + Twine(static_cast(oldTag)) +
+"\n>>> " + toString(newSection) +
+": atomic_abi=" + Twine(static_cast(newTag)));
+  };
+
+  switch (static_cast(oldTag)) {

ilovepi wrote:

yes. Looks like I missed one. Thanks.

https://github.com/llvm/llvm-project/pull/97347
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[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/97347


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[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/97347


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[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/97347


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[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/97347


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[llvm-branch-commits] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi created 
https://github.com/llvm/llvm-project/pull/97347

This patch adds support for merging the atomic_abi attribute, specifid in
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#tag_riscv_atomic_abi-14-uleb128version,
to LLD.

The atomics_abi tag merging is conducted as follows:

UNKNOWN is safe to merge with all other values.
A6C is compatible with A6S, and results in the A6C ABI.
A6C is incompatible with A7, and results in an error.
A6S and A7 are compatible, and merging results in the A7 ABI.
Note: the A7 is not yet supported in either LLVM or in any current hardware,
and is therefore omitted from attribute generation in RISCVTargetStreamer.

LLD support was split from https://github.com/llvm/llvm-project/pull/90266



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[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267

>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp| 70 ---
 lld/test/ELF/riscv-attributes.s   |  4 +-
 llvm/include/llvm/Support/RISCVAttributes.h   |  4 +-
 .../MCTargetDesc/RISCVTargetStreamer.cpp  | 15 ++--
 4 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..0d0ab5de9acc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1088,65 +1088,51 @@ static void mergeAtomic(DenseMap::iterator it,
 const InputSectionBase *oldSection,
 const InputSectionBase *newSection, unsigned int 
oldTag,
 unsigned int newTag) {
-  using RISCVAttrs::RISCVAtomicAbiTag;
+  using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
   // Same tags stay the same, and UNKNOWN is compatible with anything
-  if (oldTag == newTag ||
-  newTag == static_cast(RISCVAtomicAbiTag::UNKNOWN))
+  if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
 return;
 
-  auto reportAbiError = [&]() {
-errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
-toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
-"\n>>> " + toString(newSection) +
-": atomic_abi=" + Twine(newTag));
-  };
-
-  switch (static_cast(oldTag)) {
-  case RISCVAtomicAbiTag::UNKNOWN:
+  switch (oldTag) {
+  case AtomicABI::UNKNOWN:
 it->getSecond() = newTag;
 return;
-  case RISCVAtomicAbiTag::A6C:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6C:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  reportAbiError();
+case AtomicABI::A7:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6C:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A6S:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6C:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A6C);
+  case AtomicABI::A6S:
+switch (newTag) {
+case AtomicABI::A6C:
+  it->getSecond() = AtomicABI::A6C;
   return;
-case RISCVAtomicAbiTag::A7:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+case AtomicABI::A7:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A6S:
-  break;
 };
-break;
 
-  case RISCVAtomicAbiTag::A7:
-switch (static_cast(newTag)) {
-case RISCVAtomicAbiTag::A6S:
-  it->getSecond() = static_cast(RISCVAtomicAbiTag::A7);
+  case AtomicABI::A7:
+switch (newTag) {
+case AtomicABI::A6S:
+  it->getSecond() = AtomicABI::A7;
   return;
-case RISCVAtomicAbiTag::A6C:
-  reportAbiError();
+case AtomicABI::A6C:
+  errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+  " but " + toString(newSection) +
+  " has atomic_abi=" + Twine(newTag));
   return;
-case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
-case RISCVAttrs::RISCVAtomicAbiTag::A7:
-  break;
 };
+  default:
+llvm_unreachable("unknown AtomicABI");
   };
-  llvm_unreachable("unknown AtomicABI");
 }
 
 static RISCVAttributesSection *
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 38b0fe8e7797e..91321f33297aa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -48,9 +48,7 @@
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6C.s -o 
atomic_abi_A6C.o
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A7.s -o 
atomic_abi_A7.o
 # RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | 
FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
-# ATOMIC_ABI_ERROR: error: atomic abi mismatch for .riscv.attributes
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A6C.o:(.riscv.attributes): atomic_abi=1
-# ATOMIC_ABI_ERROR-NEXT: >>> atomic_abi_A7.o:(.riscv.attributes): atomic_abi=3
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has 
atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
 
 # RUN: llvm-mc -filetype=obj -triple=riscv64  atomic_abi_A6S.s -o 
atomic_abi_A6S.o
 # RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
diff --git 

[llvm-branch-commits] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267


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[llvm-branch-commits] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-01 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267


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[llvm-branch-commits] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-06-24 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267


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[llvm-branch-commits] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-06-24 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi edited 
https://github.com/llvm/llvm-project/pull/90267
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[llvm-branch-commits] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-06-24 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267


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[llvm-branch-commits] [clang][misexpect] Add support to clang for profitable annotation diagnostics (PR #96525)

2024-06-24 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi created 
https://github.com/llvm/llvm-project/pull/96525

Add basic plumbing to clang so that diagnostics can be surfaced to
users.



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[llvm-branch-commits] [misexpect] Support diagnostics from frontend profile data (PR #96524)

2024-06-24 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi created 
https://github.com/llvm/llvm-project/pull/96524

None


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[llvm-branch-commits] [llvm][misexpect] Enable diagnostics for profitable llvm.expect annotations (PR #96523)

2024-06-24 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi created 
https://github.com/llvm/llvm-project/pull/96523

Issue #56502 describes an enhancement related to the use of llvm.expect.
The request is for a diagnostic mode that can identify branches that
would benefit from the use of llvm.expect based on the branch_weights
assigned from a PGO or sample profile.

To support identify branches(or switches) that would benefit from the
use of an llvm.expect intrinsic, we follow a similar checking pattern to
that used in MisExpect, but only in cases where MisExpect diagnostics
would not be used (i.e., when an llvm.expect intrinsic has already been
used).



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[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)

2024-06-24 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90146


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[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)

2024-06-24 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90146


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[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)

2024-06-24 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90146


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[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)

2024-06-24 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90146


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[llvm-branch-commits] [llvm][misexpect] Update MisExpect to use provenance tracking metadata (PR #86610)

2024-06-24 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/86610


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[llvm-branch-commits] [llvm][misexpect] Update MisExpect to use provenance tracking metadata (PR #86610)

2024-06-24 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/86610


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[llvm-branch-commits] [clang-doc][cmake] Copy assets to build directory (PR #95185)

2024-06-11 Thread Paul Kirth via llvm-branch-commits

ilovepi wrote:

@petrhosek I'm pretty sure there's a better way to spell this, but I think we 
need something similar to properly test clang-doc w/o an install step.

cc: @PeterChou1 

https://github.com/llvm/llvm-project/pull/95185
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[llvm-branch-commits] [clang-doc][cmake] Copy assets to build directory (PR #95185)

2024-06-11 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi created 
https://github.com/llvm/llvm-project/pull/95185

While we copy the asset files, like index.js, into the
correct location in the install step, tests do not have
access to those resources in the build directory.

This patch copies the contents of the clang-doc/assets
directory into the build folder, so that they can be
used in testing.



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[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)

2024-06-06 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90146


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[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)

2024-06-06 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90146


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[llvm-branch-commits] [llvm][misexpect] Update MisExpect to use provenance tracking metadata (PR #86610)

2024-06-06 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/86610


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[llvm-branch-commits] [llvm][misexpect] Update MisExpect to use provenance tracking metadata (PR #86610)

2024-06-06 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/86610


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[llvm-branch-commits] [llvm] [llvm][IR] Extend BranchWeightMetadata to track provenance of weights (PR #86609)

2024-06-06 Thread Paul Kirth via llvm-branch-commits


@@ -123,6 +121,25 @@ bool hasValidBranchWeightMD(const Instruction ) {
   return getValidBranchWeightMDNode(I);
 }
 
+bool hasBranchWeightProvenance(const Instruction ) {
+  auto *ProfileData = I.getMetadata(LLVMContext::MD_prof);
+  return hasBranchWeightProvenance(ProfileData);
+}
+
+bool hasBranchWeightProvenance(const MDNode *ProfileData) {
+  if (!isBranchWeightMD(ProfileData))
+return false;
+  auto *ProfDataName = dyn_cast(ProfileData->getOperand(1));
+  // NOTE: if we ever have more types of branch weight provenance,
+  // we need to check the string value is "expected". For now, we
+  // supply a more generic API, and avoid the spurious comparisons.
+  return ProfDataName;

ilovepi wrote:

done.

https://github.com/llvm/llvm-project/pull/86609
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[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)

2024-06-06 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90146


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[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)

2024-06-06 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90146


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[llvm-branch-commits] [llvm][misexpect] Update MisExpect to use provenance tracking metadata (PR #86610)

2024-06-06 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/86610


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[llvm-branch-commits] [llvm][misexpect] Update MisExpect to use provenance tracking metadata (PR #86610)

2024-06-06 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/86610


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[llvm-branch-commits] [llvm] [llvm][IR] Extend BranchWeightMetadata to track provenance of weights (PR #86609)

2024-06-06 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/86609

>From 7760282ed8dba340d6873d06ff4c18c6efc25b56 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Thu, 6 Jun 2024 19:04:19 +
Subject: [PATCH] Add assert for metadata string value

Created using spr 1.3.4
---
 llvm/lib/IR/ProfDataUtils.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/llvm/lib/IR/ProfDataUtils.cpp b/llvm/lib/IR/ProfDataUtils.cpp
index f738d76937c24..af536d2110eac 100644
--- a/llvm/lib/IR/ProfDataUtils.cpp
+++ b/llvm/lib/IR/ProfDataUtils.cpp
@@ -133,6 +133,7 @@ bool hasBranchWeightProvenance(const MDNode *ProfileData) {
   // NOTE: if we ever have more types of branch weight provenance,
   // we need to check the string value is "expected". For now, we
   // supply a more generic API, and avoid the spurious comparisons.
+  assert(ProfDataName->getString() == "expected");
   return ProfDataName;
 }
 

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[llvm-branch-commits] [llvm][IR] Extend BranchWeightMetadata to track provenance of weights (PR #86609)

2024-06-06 Thread Paul Kirth via llvm-branch-commits


@@ -55,6 +55,17 @@ MDNode *getBranchWeightMDNode(const Instruction );
 /// Nullptr otherwise.
 MDNode *getValidBranchWeightMDNode(const Instruction );
 
+/// Check if Branch Weight Metadata has an "expected" field from an 
llvm.expect*
+/// intrinsic
+bool hasBranchWeightProvenance(const Instruction );

ilovepi wrote:

hmm, I see your point, given its current use, but I do think we'll want to 
track more things in the future. Some other options: 
`IsBranchWeightFromLlvmIntrinsic`,  `hasOptionalMetadataField`, or 
`hasBranchWeightOrigin`? The last is basically the same as the current, but 
avoids the use of `Provenance` like @MatzeB brought up earlier. 

WDYT?

https://github.com/llvm/llvm-project/pull/86609
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[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)

2024-06-05 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90146


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[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)

2024-06-05 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90146


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[llvm-branch-commits] [llvm][IR] Extend BranchWeightMetadata to track provenance of weights (PR #86609)

2024-06-05 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/86609


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[llvm-branch-commits] [llvm][misexpect] Update MisExpect to use provenance tracking metadata (PR #86610)

2024-06-05 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/86610


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[llvm-branch-commits] [llvm][misexpect] Update MisExpect to use provenance tracking metadata (PR #86610)

2024-06-05 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/86610


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[llvm-branch-commits] [llvm][IR] Extend BranchWeightMetadata to track provenance of weights (PR #86609)

2024-06-05 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/86609


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[llvm-branch-commits] [llvm][IR] Extend BranchWeightMetadata to track provenance of weights (PR #86609)

2024-06-04 Thread Paul Kirth via llvm-branch-commits

ilovepi wrote:

@MatzeB @david-xl are there any lingering issues I've missed? I think all the 
comments have been addressed now.

https://github.com/llvm/llvm-project/pull/86609
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[llvm-branch-commits] [lld] [lld] Discard SHT_LLVM_LTO sections in relocatable links (PR #92825)

2024-05-21 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/92825

>From 0b9155faf2dc063f81091c8e78d14dd4446c2db5 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Tue, 21 May 2024 09:58:46 -0700
Subject: [PATCH] Fix fallthrough and update comment

Created using spr 1.3.4
---
 lld/ELF/InputFiles.cpp | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/lld/ELF/InputFiles.cpp b/lld/ELF/InputFiles.cpp
index 0ac49761601c4..33fd86b269f81 100644
--- a/lld/ELF/InputFiles.cpp
+++ b/lld/ELF/InputFiles.cpp
@@ -833,14 +833,15 @@ void ObjFile::initializeSections(bool ignoreComdats,
   createInputSection(i, sec, check(obj.getSectionName(sec, shstrtab)));
   break;
 case SHT_LLVM_LTO:
-  // When doing a relocatable link with FatLTO objects, if we're not using
-  // the bitcode, discard it, since it will be concatenated together when
-  // handling orphan sections, and which will be an invalid bitcode object.
+  // Discard .llvm.lto in a relocatable link that does not use the bitcode.
+  // The concatenated output does not properly reflect the linking
+  // semantics. In addition, since we do not use the bitcode wrapper 
format,
+  // the concatenated raw bitcode would be invalid.
   if (config->relocatable && !config->fatLTOObjects) {
 sections[i] = ::discarded;
 break;
   }
-  LLVM_FALLTHROUGH;
+  [[fallthrough]];
 default:
   this->sections[i] =
   createInputSection(i, sec, check(obj.getSectionName(sec, shstrtab)));

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[llvm-branch-commits] [lld] [lld] Discard SHT_LLVM_LTO sections in relocatable links (PR #92825)

2024-05-21 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/92825

>From 0b9155faf2dc063f81091c8e78d14dd4446c2db5 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Tue, 21 May 2024 09:58:46 -0700
Subject: [PATCH] Fix fallthrough and update comment

Created using spr 1.3.4
---
 lld/ELF/InputFiles.cpp | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/lld/ELF/InputFiles.cpp b/lld/ELF/InputFiles.cpp
index 0ac49761601c4..33fd86b269f81 100644
--- a/lld/ELF/InputFiles.cpp
+++ b/lld/ELF/InputFiles.cpp
@@ -833,14 +833,15 @@ void ObjFile::initializeSections(bool ignoreComdats,
   createInputSection(i, sec, check(obj.getSectionName(sec, shstrtab)));
   break;
 case SHT_LLVM_LTO:
-  // When doing a relocatable link with FatLTO objects, if we're not using
-  // the bitcode, discard it, since it will be concatenated together when
-  // handling orphan sections, and which will be an invalid bitcode object.
+  // Discard .llvm.lto in a relocatable link that does not use the bitcode.
+  // The concatenated output does not properly reflect the linking
+  // semantics. In addition, since we do not use the bitcode wrapper 
format,
+  // the concatenated raw bitcode would be invalid.
   if (config->relocatable && !config->fatLTOObjects) {
 sections[i] = ::discarded;
 break;
   }
-  LLVM_FALLTHROUGH;
+  [[fallthrough]];
 default:
   this->sections[i] =
   createInputSection(i, sec, check(obj.getSectionName(sec, shstrtab)));

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[llvm-branch-commits] [lld] [lld] Discard SHT_LLVM_LTO sections in relocatable links (PR #92825)

2024-05-21 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/92825

>From 0b9155faf2dc063f81091c8e78d14dd4446c2db5 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Tue, 21 May 2024 09:58:46 -0700
Subject: [PATCH] Fix fallthrough and update comment

Created using spr 1.3.4
---
 lld/ELF/InputFiles.cpp | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/lld/ELF/InputFiles.cpp b/lld/ELF/InputFiles.cpp
index 0ac49761601c4..33fd86b269f81 100644
--- a/lld/ELF/InputFiles.cpp
+++ b/lld/ELF/InputFiles.cpp
@@ -833,14 +833,15 @@ void ObjFile::initializeSections(bool ignoreComdats,
   createInputSection(i, sec, check(obj.getSectionName(sec, shstrtab)));
   break;
 case SHT_LLVM_LTO:
-  // When doing a relocatable link with FatLTO objects, if we're not using
-  // the bitcode, discard it, since it will be concatenated together when
-  // handling orphan sections, and which will be an invalid bitcode object.
+  // Discard .llvm.lto in a relocatable link that does not use the bitcode.
+  // The concatenated output does not properly reflect the linking
+  // semantics. In addition, since we do not use the bitcode wrapper 
format,
+  // the concatenated raw bitcode would be invalid.
   if (config->relocatable && !config->fatLTOObjects) {
 sections[i] = ::discarded;
 break;
   }
-  LLVM_FALLTHROUGH;
+  [[fallthrough]];
 default:
   this->sections[i] =
   createInputSection(i, sec, check(obj.getSectionName(sec, shstrtab)));

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[llvm-branch-commits] [lld] Discard SHT_LLVM_LTO sections in relocatable links (PR #92825)

2024-05-20 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi created 
https://github.com/llvm/llvm-project/pull/92825

So long as ld -r links using bitcode always result in an ELF object, and
not a merged bitcode object, the output form a relocatable link using
FatLTO objects should not have a .llvm.lto section. Prior to this, using
the object code sections would cause the bitcode section in the output
of a relocatable link to be corrupted, by concatenating all the .llvm.lto
sections together.

This patch discards SHT_LLVM_LTO sections when not using
--fat-lto-objects, so that the relocatable ELF output won't contain
inalid bitcode.



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[llvm-branch-commits] [llvm][misexpect] Update MisExpect to use provenance tracking metadata (PR #86610)

2024-05-13 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/86610


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[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)

2024-05-13 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90146


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[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)

2024-05-13 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90146


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[llvm-branch-commits] [llvm][misexpect] Update MisExpect to use provenance tracking metadata (PR #86610)

2024-05-13 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/86610


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[llvm-branch-commits] [llvm][IR] Extend BranchWeightMetadata to track provenance of weights (PR #86609)

2024-05-13 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/86609


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[llvm-branch-commits] [llvm][IR] Extend BranchWeightMetadata to track provenance of weights (PR #86609)

2024-05-13 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/86609


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[llvm-branch-commits] [lld] [llvm] release/18.x: [RISCV][lld] Set the type of TLSDESC relocation's referenced local symbol to STT_NOTYPE (PR #91678)

2024-05-13 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/91678

>From 9c6b3b2733a99543b19e3cd38752ebd99188bd6d Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Fri, 22 Mar 2024 12:27:41 -0700
Subject: [PATCH] [RISCV][lld] Set the type of TLSDESC relocation's referenced
 local symbol to STT_NOTYPE

When adding fixups for RISCV_TLSDESC_ADD_LO and RISCV_TLSDESC_LOAD_LO,
the local label added for RISCV TLSDESC relocations have STT_TLS set,
which is incorrect. Instead, these labels should have `STT_NOTYPE`.

This patch stops adding such fixups and avoid setting the STT_TLS on
these symbols. Failing to do so can cause LLD to emit an error `has an
STT_TLS symbol but doesn't have an SHF_TLS section`. We additionally,
adjust how LLD services these relocations to avoid errors with
incompatible relocation and symbol types.

Reviewers: topperc, MaskRay

Reviewed By: MaskRay

Pull Request: https://github.com/llvm/llvm-project/pull/85817

(cherry picked from commit dfe4ca9b7f4a422500d78280dc5eefd1979939e6)
---
 lld/ELF/Relocations.cpp   |  5 +++-
 lld/test/ELF/riscv-tlsdesc-relax.s|  8 ++
 lld/test/ELF/riscv-tlsdesc.s  | 27 +++
 .../Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp |  2 --
 4 files changed, 28 insertions(+), 14 deletions(-)

diff --git a/lld/ELF/Relocations.cpp b/lld/ELF/Relocations.cpp
index 619fbaf5dc545..92a1b9baaca3d 100644
--- a/lld/ELF/Relocations.cpp
+++ b/lld/ELF/Relocations.cpp
@@ -1480,7 +1480,10 @@ template  void 
RelocationScanner::scanOne(RelTy *) {
 
   // Process TLS relocations, including TLS optimizations. Note that
   // R_TPREL and R_TPREL_NEG relocations are resolved in processAux.
-  if (sym.isTls()) {
+  //
+  // Some RISCV TLSDESC relocations reference a local NOTYPE symbol,
+  // but we need to process them in handleTlsRelocation.
+  if (sym.isTls() || oneof(expr)) {
 if (unsigned processed =
 handleTlsRelocation(type, sym, *sec, offset, addend, expr)) {
   i += processed - 1;
diff --git a/lld/test/ELF/riscv-tlsdesc-relax.s 
b/lld/test/ELF/riscv-tlsdesc-relax.s
index fb24317e6535c..5718d4175be11 100644
--- a/lld/test/ELF/riscv-tlsdesc-relax.s
+++ b/lld/test/ELF/riscv-tlsdesc-relax.s
@@ -33,12 +33,14 @@
 # GD64-NEXT: c.add   a0, tp
 # GD64-NEXT: jal {{.*}} 
 ## &.got[c]-. = 0x20c0+8 - 0x1020 = 0x10a8
+# GD64-LABEL: <.Ltlsdesc_hi1>:
 # GD64-NEXT:   1020: auipc   a4, 0x1
 # GD64-NEXT: ld  a5, 0xa8(a4)
 # GD64-NEXT: addia0, a4, 0xa8
 # GD64-NEXT: jalrt0, 0x0(a5)
 # GD64-NEXT: c.add   a0, tp
 ## &.got[c]-. = 0x20c0+8 - 0x1032 = 0x1096
+# GD64-LABEL: <.Ltlsdesc_hi2>:
 # GD64-NEXT:   1032: auipc   a6, 0x1
 # GD64-NEXT: ld  a7, 0x96(a6)
 # GD64-NEXT: addia0, a6, 0x96
@@ -64,6 +66,7 @@
 # LE64-NEXT: jal {{.*}} 
 # LE64-NEXT: R_RISCV_JAL foo
 # LE64-NEXT: R_RISCV_RELAX *ABS*
+# LE64-LABEL: <.Ltlsdesc_hi1>:
 # LE64-NEXT: addia0, zero, 0x7ff
 # LE64-NEXT: R_RISCV_TLSDESC_HI20 b
 # LE64-NEXT: R_RISCV_RELAX *ABS*
@@ -71,6 +74,7 @@
 # LE64-NEXT: R_RISCV_TLSDESC_ADD_LO12 .Ltlsdesc_hi1
 # LE64-NEXT: R_RISCV_TLSDESC_CALL .Ltlsdesc_hi1
 # LE64-NEXT: c.add   a0, tp
+# LE64-LABEL: <.Ltlsdesc_hi2>:
 # LE64-NEXT: addizero, zero, 0x0
 # LE64-NEXT: R_RISCV_TLSDESC_HI20 b
 # LE64-NEXT: addizero, zero, 0x0
@@ -93,9 +97,11 @@
 # LE64A-NEXT: addia0, a0, -0x479
 # LE64A-NEXT: c.add   a0, tp
 # LE64A-NEXT: jal {{.*}} 
+# LE64A-LABEL: <.Ltlsdesc_hi1>:
 # LE64A-NEXT: lui a0, 0x2
 # LE64A-NEXT: addia0, a0, -0x479
 # LE64A-NEXT: c.add   a0, tp
+# LE64A-LABEL: <.Ltlsdesc_hi2>:
 # LE64A-NEXT: addizero, zero, 0x0
 # LE64A-NEXT: addizero, zero, 0x0
 # LE64A-NEXT: lui a0, 0x2
@@ -115,10 +121,12 @@
 # IE64-NEXT: c.add   a0, tp
 # IE64-NEXT: jal {{.*}} 
 ## &.got[c]-. = 0x120e0+8 - 0x11018 = 0x10d0
+# IE64-LABEL: <.Ltlsdesc_hi1>:
 # IE64-NEXT:  11018: auipc   a0, 0x1
 # IE64-NEXT: ld  a0, 0xd0(a0)
 # IE64-NEXT: c.add   a0, tp
 ## &.got[c]-. = 0x120e0+8 - 0x1102a = 0x10be
+# IE64-LABEL: <.Ltlsdesc_hi2>:
 # IE64-NEXT: addizero, zero, 0x0
 # IE64-NEXT: addizero, zero, 0x0
 # IE64-NEXT:  1102a: auipc   a0, 0x1
diff --git a/lld/test/ELF/riscv-tlsdesc.s b/lld/test/ELF/riscv-tlsdesc.s
index c583e15cf30ce..935ecbddfbfff 100644
--- a/lld/test/ELF/riscv-tlsdesc.s
+++ b/lld/test/ELF/riscv-tlsdesc.s
@@ -29,11 +29,13 @@
 # RUN: ld.lld -e 0 -z now a.32.o c.32.so -o a.32.ie
 # RUN: llvm-objdump --no-show-raw-insn -M no-aliases -h -d a.32.ie | FileCheck 
%s --check-prefix=IE32
 
-# RUN: llvm-mc -triple=riscv64 -filetype=obj d.s -o d.64.o
-# RUN: not ld.lld -shared -soname=d.64.so -o d.64.so d.64.o 2>&1 | FileCheck 
%s 

[llvm-branch-commits] [llvm][NFC] Document cl::opt MisExpectTolerance and fix typo (PR #90670)

2024-05-13 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi closed 
https://github.com/llvm/llvm-project/pull/90670
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[llvm-branch-commits] [llvm][NFC] Document cl::opt MisExpectTolerance and fix typo (PR #90670)

2024-05-13 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90670


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[llvm-branch-commits] [llvm][NFC] Document cl::opt MisExpectTolerance and fix typo (PR #90670)

2024-05-13 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90670


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[llvm-branch-commits] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-05-09 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267


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[llvm-branch-commits] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-05-09 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267


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[llvm-branch-commits] [clang] [llvm] Backport "riscv-isa" module metadata to 18.x (PR #91514)

2024-05-08 Thread Paul Kirth via llvm-branch-commits

ilovepi wrote:

This tends to bite anyone using LTO with RISCV. In particular I’m concerned 
about the impact on Rust, since they’ll pin LLVM until  the LLVM 19 release. 
About 60% of Fuchsia is implemented in rust. More if you count only count 
userland. 

We’re hoping to avoid a situation where we can’t use LTO on RISCV Fuchsia 
targets, as we’re starting to rely more on LTO configurations, to enable 
features like control flow integrity. 

https://github.com/llvm/llvm-project/pull/91514
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[llvm-branch-commits] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-05-02 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267


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[llvm-branch-commits] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-05-02 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267


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[llvm-branch-commits] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-05-02 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/90267


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