date:20160916

Signed-off-by: Edward O'Callaghan 
---
 drivers/gpu/drm/amd/amdkfd/kfd_doorbell.c | 16 +---
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_doorbell.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_doorbell.c
index a7d3cb3..453c5d6 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_doorbell.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_doorbell.c
@@ -142,13 +142,15 @@ int kfd_doorbell_mmap(struct kfd_process *process, struct 
vm_area_struct *vma)
 
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 
-   pr_debug("mapping doorbell page:\n");
-   pr_debug(" target user address == 0x%08llX\n",
-   (unsigned long long) vma->vm_start);
-   pr_debug(" physical address== 0x%08llX\n", address);
-   pr_debug(" vm_flags== 0x%04lX\n", vma->vm_flags);
-   pr_debug(" size== 0x%04lX\n",
-doorbell_process_allocation());
+   pr_debug("kfd: mapping doorbell page in %s\n"
+" target user address == 0x%08llX\n"
+" physical address== 0x%08llX\n"
+" vm_flags== 0x%04lX\n"
+" size== 0x%04lX\n",
+__func__,
+(unsigned long long) vma->vm_start, address, vma->vm_flags,
+doorbell_process_allocation());
+
 
return io_remap_pfn_range(vma,
vma->vm_start,
-- 
2.7.4

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[PATCH 4/6] drm/amdkfd: Fix possible infinite loop

When the loop predicating timeout parameter passed happens to
not be a multiple of 20 the unsigned integer will overflow and
the loop will become unbounded.

Signed-off-by: Edward O'Callaghan 
Reviewed-by: Oded Gabbay 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c | 17 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c | 17 +
 2 files changed, 18 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c
index 362bedc..1a0a5f7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c
@@ -103,11 +103,11 @@ static bool kgd_hqd_is_occupied(struct kgd_dev *kgd, 
uint64_t queue_address,
uint32_t pipe_id, uint32_t queue_id);
 
 static int kgd_hqd_destroy(struct kgd_dev *kgd, uint32_t reset_type,
-   unsigned int timeout, uint32_t pipe_id,
+   unsigned int utimeout, uint32_t pipe_id,
uint32_t queue_id);
 static bool kgd_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd);
 static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd,
-   unsigned int timeout);
+   unsigned int utimeout);
 static int kgd_address_watch_disable(struct kgd_dev *kgd);
 static int kgd_address_watch_execute(struct kgd_dev *kgd,
unsigned int watch_point_id,
@@ -437,11 +437,12 @@ static bool kgd_hqd_sdma_is_occupied(struct kgd_dev *kgd, 
void *mqd)
 }
 
 static int kgd_hqd_destroy(struct kgd_dev *kgd, uint32_t reset_type,
-   unsigned int timeout, uint32_t pipe_id,
+   unsigned int utimeout, uint32_t pipe_id,
uint32_t queue_id)
 {
struct amdgpu_device *adev = get_amdgpu_device(kgd);
uint32_t temp;
+   int timeout = utimeout;
 
acquire_queue(kgd, pipe_id, queue_id);
WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, 0);
@@ -452,9 +453,8 @@ static int kgd_hqd_destroy(struct kgd_dev *kgd, uint32_t 
reset_type,
temp = RREG32(mmCP_HQD_ACTIVE);
if (temp & CP_HQD_ACTIVE__ACTIVE_MASK)
break;
-   if (timeout == 0) {
-   pr_err("kfd: cp queue preemption time out (%dms)\n",
-   temp);
+   if (timeout <= 0) {
+   pr_err("kfd: cp queue preemption time out.\n");
release_queue(kgd);
return -ETIME;
}
@@ -467,12 +467,13 @@ static int kgd_hqd_destroy(struct kgd_dev *kgd, uint32_t 
reset_type,
 }
 
 static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd,
-   unsigned int timeout)
+   unsigned int utimeout)
 {
struct amdgpu_device *adev = get_amdgpu_device(kgd);
struct cik_sdma_rlc_registers *m;
uint32_t sdma_base_addr;
uint32_t temp;
+   int timeout = utimeout;
 
m = get_sdma_mqd(mqd);
sdma_base_addr = get_sdma_base_addr(m);
@@ -485,7 +486,7 @@ static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, void 
*mqd,
temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_CONTEXT_STATUS);
if (temp & SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT)
break;
-   if (timeout == 0)
+   if (timeout <= 0)
return -ETIME;
msleep(20);
timeout -= 20;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
index 04b744d..6697612 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
@@ -62,10 +62,10 @@ static bool kgd_hqd_is_occupied(struct kgd_dev *kgd, 
uint64_t queue_address,
uint32_t pipe_id, uint32_t queue_id);
 static bool kgd_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd);
 static int kgd_hqd_destroy(struct kgd_dev *kgd, uint32_t reset_type,
-   unsigned int timeout, uint32_t pipe_id,
+   unsigned int utimeout, uint32_t pipe_id,
uint32_t queue_id);
 static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd,
-   unsigned int timeout);
+   unsigned int utimeout);
 static void write_vmid_invalidate_request(struct kgd_dev *kgd, uint8_t vmid);
 static int kgd_address_watch_disable(struct kgd_dev *kgd);
 static int kgd_address_watch_execute(struct kgd_dev *kgd,
@@ -349,11 +349,12 @@ static bool kgd_hqd_sdma_is_occupied(struct kgd_dev *kgd, 
void *mqd)
 }
 
 static int kgd_hqd_destroy(struct

[PATCH 1/6] drm/amdkfd: Tidy up kfd_generate_gpu_id() uint64_t bitshift unpack

Dereference the one time and unpack the lower and upper 32bit
portions with the proper kernel helper macros.

Signed-off-by: Edward O'Callaghan 
Reviewed-by: Oded Gabbay 
---
 drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
index 884c96f..1e50647 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
@@ -1090,19 +1090,21 @@ static uint32_t kfd_generate_gpu_id(struct kfd_dev *gpu)
 {
uint32_t hashout;
uint32_t buf[7];
+   uint64_t local_mem_size;
int i;
 
if (!gpu)
return 0;
 
+   local_mem_size = gpu->kfd2kgd->get_vmem_size(gpu->kgd);
+
buf[0] = gpu->pdev->devfn;
buf[1] = gpu->pdev->subsystem_vendor;
buf[2] = gpu->pdev->subsystem_device;
buf[3] = gpu->pdev->device;
buf[4] = gpu->pdev->bus->number;
-   buf[5] = (uint32_t)(gpu->kfd2kgd->get_vmem_size(gpu->kgd)
-   & 0x);
-   buf[6] = (uint32_t)(gpu->kfd2kgd->get_vmem_size(gpu->kgd) >> 32);
+   buf[5] = lower_32_bits(local_mem_size);
+   buf[6] = upper_32_bits(local_mem_size);
 
for (i = 0, hashout = 0; i < 7; i++)
hashout ^= hash_32(buf[i], KFD_GPU_ID_HASH_WIDTH);
-- 
2.7.4

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[PATCH 2/6] drm/amdkfd: Add some missing memset zero'ing in queue init func

Signed-off-by: Edward O'Callaghan 
Reviewed-by: Oded Gabbay 
---
 drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
index 9beae87..291c69d 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
@@ -47,6 +47,9 @@ static bool initialize(struct kernel_queue *kq, struct 
kfd_dev *dev,
pr_debug("amdkfd: In func %s initializing queue type %d size %d\n",
__func__, KFD_QUEUE_TYPE_HIQ, queue_size);
 
+   memset(, 0, sizeof(prop));
+   memset(, 0, sizeof(nop));
+
nop.opcode = IT_NOP;
nop.type = PM4_TYPE_3;
nop.u32all |= PM4_COUNT_ZERO;
-- 
2.7.4

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drm/amdkfd: Misc patchset lineup for drm-next-4.9

Hi,

Most of these have already been reviewed and some of the more
invasive patches have been dropped from the orginal series. As
I wish to get the low hanging fruit out the way as quickly as
possible. I shall try to find the time this weekend to prepare
the second more interesting set but don't wait up.

Please review..
Kind Regards,

Edward O'Callaghan (6):
 [PATCH 1/6] drm/amdkfd: Tidy up kfd_generate_gpu_id() uint64_t
 [PATCH 2/6] drm/amdkfd: Add some missing memset zero'ing in queue
 [PATCH 3/6] drm/amdkfd: Reuse function to find a process through
 [PATCH 4/6] drm/amdkfd: Fix possible infinite loop
 [PATCH 5/6] drm/amdkfd: Unify multiple calls to pr_debug() into one
 [PATCH 6/6] drm/amdkfd: Pass 'struct queue_propertices' by reference
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[PATCH 6/6] drm/amdkfd: Pass 'struct queue_propertices' by reference

Allow init_queue() to take 'struct queue_properties' by reference.

Signed-off-by: Edward O'Callaghan 
---
 drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c  | 2 +-
 drivers/gpu/drm/amd/amdkfd/kfd_priv.h  | 2 +-
 drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c | 2 +-
 drivers/gpu/drm/amd/amdkfd/kfd_queue.c | 4 ++--
 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
index 291c69d..d135cd0 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
@@ -124,7 +124,7 @@ static bool initialize(struct kernel_queue *kq, struct 
kfd_dev *dev,
prop.eop_ring_buffer_address = kq->eop_gpu_addr;
prop.eop_ring_buffer_size = PAGE_SIZE;
 
-   if (init_queue(>queue, prop) != 0)
+   if (init_queue(>queue, ) != 0)
goto err_init_queue;
 
kq->queue->device = dev;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h 
b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
index 80113c3..4750cab 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
@@ -619,7 +619,7 @@ int kfd_init_apertures(struct kfd_process *process);
 /* Queue Context Management */
 struct cik_sdma_rlc_registers *get_sdma_mqd(void *mqd);
 
-int init_queue(struct queue **q, struct queue_properties properties);
+int init_queue(struct queue **q, const struct queue_properties *properties);
 void uninit_queue(struct queue *q);
 void print_queue_properties(struct queue_properties *q);
 void print_queue(struct queue *q);
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c
index 7b69070..e1fb40b 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c
@@ -129,7 +129,7 @@ static int create_cp_queue(struct process_queue_manager 
*pqm,
q_properties->vmid = 0;
q_properties->queue_id = qid;
 
-   retval = init_queue(q, *q_properties);
+   retval = init_queue(q, q_properties);
if (retval != 0)
goto err_init_queue;
 
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_queue.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_queue.c
index 9a0c90b..0ab1970 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_queue.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_queue.c
@@ -63,7 +63,7 @@ void print_queue(struct queue *q)
pr_debug("Queue Device Address: 0x%p\n", q->device);
 }
 
-int init_queue(struct queue **q, struct queue_properties properties)
+int init_queue(struct queue **q, const struct queue_properties *properties)
 {
struct queue *tmp;
 
@@ -73,7 +73,7 @@ int init_queue(struct queue **q, struct queue_properties 
properties)
if (!tmp)
return -ENOMEM;
 
-   memcpy(>properties, , sizeof(struct queue_properties));
+   memcpy(>properties, properties, sizeof(struct queue_properties));
 
*q = tmp;
return 0;
-- 
2.7.4

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Re: [pull] radeon and amdgpu drm-next-4.9

On Fri, Sep 16, 2016 at 5:38 PM, Lukas Wunner  wrote:
> On Fri, Sep 16, 2016 at 04:42:43PM -0400, Alex Deucher wrote:
>>   drm/amdgpu: skip suspend/resume on DRM_SWITCH_POWER_DYNAMIC_OFF
>>   drm/radeon: skip suspend/resume on DRM_SWITCH_POWER_DYNAMIC_OFF
>
> Those two are unnecessary, it can't happen that the ->suspend hook
> is executed with the device runtime suspended.
>
> Since commit d14d2a8453d6 ("drm: Remove dev_pm_ops from drm_class"),
> DRM devices are afforded direct_complete, i.e. if the GPU is runtime
> suspended upon system sleep, it is left in this state.  The only
> callbacks that are executed are the ->prepare and the ->complete hook.
> All the callbacks in-between, like ->suspend, are skipped.
>
> Even if direct_complete is not afforded for some reason, the PM core
> will automatically runtime resume the device before executing ->suspend.
>
> That ->suspend is skipped in the DRM_SWITCH_POWER_OFF case was done
> because the device is suspended behind the PM core's back if runpm=0
> is set.  (And it doesn't work properly because the PCI core will
> invalidate the saved_state during ->resume_noirq.  That could be
> solved by returning 1 from the ->prepare hook in the DRM_SWITCH_POWER_OFF
> case, but that's a different story.)
>
> (Sorry for not raising this earlier, I'm not subscribed to amd-gfx.)

Thanks for the heads up.  They shouldn't hurt anything and it matches
what other drivers do.  If you feel strongly about it, I can revert
them later.

Alex

>
> Best regards,
>
> Lukas
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Re: [pull] radeon and amdgpu drm-next-4.9

2016-09-16 Thread Lukas Wunner

On Fri, Sep 16, 2016 at 04:42:43PM -0400, Alex Deucher wrote:
>   drm/amdgpu: skip suspend/resume on DRM_SWITCH_POWER_DYNAMIC_OFF
>   drm/radeon: skip suspend/resume on DRM_SWITCH_POWER_DYNAMIC_OFF

Those two are unnecessary, it can't happen that the ->suspend hook
is executed with the device runtime suspended.

Since commit d14d2a8453d6 ("drm: Remove dev_pm_ops from drm_class"),
DRM devices are afforded direct_complete, i.e. if the GPU is runtime
suspended upon system sleep, it is left in this state.  The only
callbacks that are executed are the ->prepare and the ->complete hook.
All the callbacks in-between, like ->suspend, are skipped.

Even if direct_complete is not afforded for some reason, the PM core
will automatically runtime resume the device before executing ->suspend.

That ->suspend is skipped in the DRM_SWITCH_POWER_OFF case was done
because the device is suspended behind the PM core's back if runpm=0
is set.  (And it doesn't work properly because the PCI core will
invalidate the saved_state during ->resume_noirq.  That could be
solved by returning 1 from the ->prepare hook in the DRM_SWITCH_POWER_OFF
case, but that's a different story.)

(Sorry for not raising this earlier, I'm not subscribed to amd-gfx.)

Best regards,

Lukas
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[pull] radeon and amdgpu drm-next-4.9

Hi Dave,

More radeon and amdgpu changes for 4.9. Highlights:
- Initial SI support for amdgpu (controlled by a Kconfig option)
- misc ttm cleanups
- runtimepm fixes
- S3/S4 fixes
- power improvements
- lots of code cleanups and optimizations

The following changes since commit 7b4d3e297e8a7d3b82e68231ff077e891c370349:

  drm/amdgpu: use memcpy_toio for VCE firmware upload (2016-08-24 16:25:07 
-0400)

are available in the git repository at:

  git://people.freedesktop.org/~agd5f/linux drm-next-4.9

for you to fetch changes up to af1f85ddecfa341e684db950c34a1813d36750db:

  drm/ttm: remove cpu_address member from ttm_tt (2016-09-16 15:53:05 -0400)


Alex Deucher (39):
  drm/amdgpu: rename suspend_kms and resume_kms
  drm/amdgpu: track the number of vce rings
  drm/amdgpu/vce3: add support for third vce ring
  drm/amdgpu/si: Add updated smc firmware for SI kickers
  drm/amdgpu/gfx6: drop some dead code
  drm/amdgpu: set runtime pm state to active on resume
  drm/amdgpu: skip suspend/resume on DRM_SWITCH_POWER_DYNAMIC_OFF
  drm/radeon: set runtime pm state to active on resume
  drm/radeon: skip suspend/resume on DRM_SWITCH_POWER_DYNAMIC_OFF
  drm/amdgpu: handle runtime pm correctly in amdgpu_driver_open_kms
  drm/radeon: handle runtime pm correctly in amdgpu_driver_open_kms
  drm/amdgpu: handle runtime pm in drm pre/post close
  drm/radeon: handle runtime pm in drm pre/post close
  drm/amdgpu: wire up a pci shutdown callback
  drm/radeon: wire up a pci shutdown callback
  drm/amdgpu/si/dpm: make a bunch of things static
  drm/amdgpu/si/dpm: fix symbol conflicts with radeon
  drm/amdgpu: handle runtime pm in fbcon (v2)
  drm/radeon: handle runtime pm in fbcon (v2)
  drm/amdgpu/si: fix ring size for compute
  drm/amdgpu/gfx6: drop duplicate code
  drm/amdgpu/gfx6: add ring_emit_cntxcntl
  drm/amdgpu/gfx6: drop gds_switch callback
  drm/amdgpu/sdma3: drop unused functions
  drm/amdgpu/ring: add an interface to get dma frame and ib size
  drm/amdgpu/gfx6: add ring callbacks for ib and dma frame size
  drm/amdgpu/gfx7: add ring callbacks for ib and dma frame size
  drm/amdgpu/gfx8: add ring callbacks for ib and dma frame size
  drm/amdgpu/si_dma: add ring callbacks for ib and dma frame size
  drm/amdgpu/cik_sdma: add ring callbacks for ib and dma frame size
  drm/amdgpu/sdma2.4: add ring callbacks for ib and dma frame size
  drm/amdgpu/sdma3: add ring callbacks for ib and dma frame size
  drm/amdgpu/uvd4.2: add ring callbacks for ib and dma frame size
  drm/amdgpu/uvd5: add ring callbacks for ib and dma frame size
  drm/amdgpu/uvd6: add ring callbacks for ib and dma frame size
  drm/amdgpu/vce: add common ring callbacks for ib and dma frame size
  drm/amdgpu/vce2: add ring callbacks for ib and dma frame size
  drm/amdgpu/vce3: add ring callbacks for ib and dma frame size
  drm/amdgpu: use the new ring ib and dma frame size callbacks (v2)

Alexandre Courbot (1):
  drm/ttm: remove cpu_address member from ttm_tt

Baoyou Xie (6):
  drm/amdgpu: add missing header dependencies
  drm/amdgpu: mark symbols static where possible
  drm/amd/powerplay/fiji: mark symbols static where possible
  drm/amd/powerplay/polaris10: mark symbols static where possible
  drm/amdgpu: clean function declarations in amdgpu_ttm.c up
  drm/radeon/radeon_device: remove unused function

Christian König (13):
  drm/amdgpu: only try again if we actually run into -ENOMEM
  drm/amdgpu: prevent command submission failures under memory pressure v2
  drm/amdgpu: fix GTT offset handling
  drm/amdgpu: bind GTT on demand
  drm/ttm: use ffs in ttm_mem_type_from_place
  drm/ttm: rework handling of private mem types
  drm/ttm: remove unused placement flags
  drm/ttm: move placement structures into ttm_placement.h
  drm/amdgpu: validate size and offset of user fence BO
  drm/amdgpu: add AMDGPU_BO_INVALID_OFFSET
  drm/amdgpu: unbind GTT only when it is bound
  drm/amdgpu: use explicit GTT limit for evictions
  drm/amdgpu: use explicit limit for VRAM<->GTT moves

Chunming Zhou (2):
  drm/amdgpu: link all gtt when binding them V2
  drm/amdgpu: add gart recovery by gtt list V2

Edward O'Callaghan (1):
  amd/powerplay: use kmemdup instead of kmalloc + memcpy

Flora Cui (1):
  drm/amdgpu: update gart_pin_size if bo is in GTT

Huang Rui (5):
  drm/amdgpu: introduce pcie port read/write entry
  drm/amdgpu: use DRM print instead of printk
  drm/amdgpu: move some release handles into fail labels (v2)
  drm: modify drm_global_item_ref to avoid two times of writing ref->object
  drm/amdgpu: use error label to handle exceptional case

Jordan Lazare (2):
  drm/amd/powerplay: Remove unused variable causing compile warning

Re: [PATCH 15/15] drm/amdgpu: use the new ring ib and dma frame size callbacks


Am 16.09.2016 um 18:05 schrieb Alex Deucher:

Use them to more accurately determine the ring size required
for ib submission.

Signed-off-by: Alex Deucher 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 8 ++--
  1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 2aa741c..ac08ae7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -125,7 +125,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned 
num_ibs,
unsigned patch_offset = ~0;
struct amdgpu_vm *vm;
uint64_t fence_ctx;
-   uint32_t status = 0;
+   uint32_t status = 0, alloc_size;
  
  	unsigned i;

int r = 0;
@@ -152,7 +152,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned 
num_ibs,
return -EINVAL;
}
  
-	r = amdgpu_ring_alloc(ring, 256 * num_ibs);

+   alloc_size = amdgpu_ring_get_dma_frame_size(ring) +
+   num_ibs * amdgpu_ring_get_emit_ib_size(ring);
+   alloc_size = (alloc_size + ring->align_mask) & ~ring->align_mask;

amdgpu_ring_alloc() is doing this anyway, so this is superfluous here.

With that fixed the whole series is Reviewed-by: Christian König 
.


Regards,
Christian.


+
+   r = amdgpu_ring_alloc(ring, alloc_size);
if (r) {
dev_err(adev->dev, "scheduling IB failed (%d).\n", r);
return r;



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[PATCH 12/15] drm/amdgpu/vce: add common ring callbacks for ib and dma frame size

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 12 
 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h |  2 ++
 2 files changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index b0c6702..2c9ea9b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
@@ -803,6 +803,18 @@ void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, 
u64 addr, u64 seq,
amdgpu_ring_write(ring, VCE_CMD_END);
 }
 
+unsigned amdgpu_vce_ring_get_emit_ib_size(struct amdgpu_ring *ring)
+{
+   return
+   4; /* amdgpu_vce_ring_emit_ib */
+}
+
+unsigned amdgpu_vce_ring_get_dma_frame_size(struct amdgpu_ring *ring)
+{
+   return
+   6; /* amdgpu_vce_ring_emit_fence  x1 no user fence */
+}
+
 /**
  * amdgpu_vce_ring_test_ring - test if VCE ring is working
  *
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
index 63f83d0..12729d2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
@@ -42,5 +42,7 @@ int amdgpu_vce_ring_test_ring(struct amdgpu_ring *ring);
 int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring, long timeout);
 void amdgpu_vce_ring_begin_use(struct amdgpu_ring *ring);
 void amdgpu_vce_ring_end_use(struct amdgpu_ring *ring);
+unsigned amdgpu_vce_ring_get_emit_ib_size(struct amdgpu_ring *ring);
+unsigned amdgpu_vce_ring_get_dma_frame_size(struct amdgpu_ring *ring);
 
 #endif
-- 
2.5.5

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[PATCH 13/15] drm/amdgpu/vce2: add ring callbacks for ib and dma frame size

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c 
b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
index 58af0da..76e64ad 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
@@ -622,6 +622,8 @@ static const struct amdgpu_ring_funcs vce_v2_0_ring_funcs = 
{
.pad_ib = amdgpu_ring_generic_pad_ib,
.begin_use = amdgpu_vce_ring_begin_use,
.end_use = amdgpu_vce_ring_end_use,
+   .get_emit_ib_size = amdgpu_vce_ring_get_emit_ib_size,
+   .get_dma_frame_size = amdgpu_vce_ring_get_dma_frame_size,
 };
 
 static void vce_v2_0_set_ring_funcs(struct amdgpu_device *adev)
-- 
2.5.5

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[PATCH 14/15] drm/amdgpu/vce3: add ring callbacks for ib and dma frame size

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 25 +
 1 file changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 
b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
index a55ddc0..a6b4e27 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
@@ -808,6 +808,27 @@ static void vce_v3_0_emit_pipeline_sync(struct amdgpu_ring 
*ring)
amdgpu_ring_write(ring, seq);
 }
 
+static unsigned vce_v3_0_ring_get_emit_ib_size(struct amdgpu_ring *ring)
+{
+   return
+   5; /* vce_v3_0_ring_emit_ib */
+}
+
+static unsigned vce_v3_0_ring_get_dma_frame_size(struct amdgpu_ring *ring)
+{
+   return
+   4 + /* vce_v3_0_emit_pipeline_sync */
+   6; /* amdgpu_vce_ring_emit_fence x1 no user fence */
+}
+
+static unsigned vce_v3_0_ring_get_dma_frame_size_vm(struct amdgpu_ring *ring)
+{
+   return
+   6 + /* vce_v3_0_emit_vm_flush */
+   4 + /* vce_v3_0_emit_pipeline_sync */
+   6 + 6; /* amdgpu_vce_ring_emit_fence x2 vm fence */
+}
+
 const struct amd_ip_funcs vce_v3_0_ip_funcs = {
.name = "vce_v3_0",
.early_init = vce_v3_0_early_init,
@@ -841,6 +862,8 @@ static const struct amdgpu_ring_funcs 
vce_v3_0_ring_phys_funcs = {
.pad_ib = amdgpu_ring_generic_pad_ib,
.begin_use = amdgpu_vce_ring_begin_use,
.end_use = amdgpu_vce_ring_end_use,
+   .get_emit_ib_size = vce_v3_0_ring_get_emit_ib_size,
+   .get_dma_frame_size = vce_v3_0_ring_get_dma_frame_size,
 };
 
 static const struct amdgpu_ring_funcs vce_v3_0_ring_vm_funcs = {
@@ -858,6 +881,8 @@ static const struct amdgpu_ring_funcs 
vce_v3_0_ring_vm_funcs = {
.pad_ib = amdgpu_ring_generic_pad_ib,
.begin_use = amdgpu_vce_ring_begin_use,
.end_use = amdgpu_vce_ring_end_use,
+   .get_emit_ib_size = vce_v3_0_ring_get_emit_ib_size,
+   .get_dma_frame_size = vce_v3_0_ring_get_dma_frame_size_vm,
 };
 
 static void vce_v3_0_set_ring_funcs(struct amdgpu_device *adev)
-- 
2.5.5

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[PATCH 02/15] drm/amdgpu/gfx6: add ring callbacks for ib and dma frame size

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 31 +++
 1 file changed, 31 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index e7293f6..410b29c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -2685,6 +2685,33 @@ static void gfx_v6_ring_emit_cntxcntl(struct amdgpu_ring 
*ring, uint32_t flags)
amdgpu_ring_write(ring, 0);
 }
 
+static unsigned gfx_v6_0_ring_get_emit_ib_size(struct amdgpu_ring *ring)
+{
+   return
+   6; /* gfx_v6_0_ring_emit_ib */
+}
+
+static unsigned gfx_v6_0_ring_get_dma_frame_size_gfx(struct amdgpu_ring *ring)
+{
+   return
+   5 + /* gfx_v6_0_ring_emit_hdp_flush */
+   5 + /* gfx_v6_0_ring_emit_hdp_invalidate */
+   14 + 14 + 14 + /* gfx_v6_0_ring_emit_fence x3 for user fence, 
vm fence */
+   7 + 4 + /* gfx_v6_0_ring_emit_pipeline_sync */
+   17 + 6 + /* gfx_v6_0_ring_emit_vm_flush */
+   3; /* gfx_v6_ring_emit_cntxcntl */
+}
+
+static unsigned gfx_v6_0_ring_get_dma_frame_size_compute(struct amdgpu_ring 
*ring)
+{
+   return
+   5 + /* gfx_v6_0_ring_emit_hdp_flush */
+   5 + /* gfx_v6_0_ring_emit_hdp_invalidate */
+   7 + /* gfx_v6_0_ring_emit_pipeline_sync */
+   17 + /* gfx_v6_0_ring_emit_vm_flush */
+   14 + 14 + 14; /* gfx_v6_0_ring_emit_fence x3 for user fence, vm 
fence */
+}
+
 static const struct amdgpu_gfx_funcs gfx_v6_0_gfx_funcs = {
.get_gpu_clock_counter = _v6_0_get_gpu_clock_counter,
.select_se_sh = _v6_0_select_se_sh,
@@ -3113,6 +3140,8 @@ static const struct amdgpu_ring_funcs 
gfx_v6_0_ring_funcs_gfx = {
.test_ib = gfx_v6_0_ring_test_ib,
.insert_nop = amdgpu_ring_insert_nop,
.emit_cntxcntl = gfx_v6_ring_emit_cntxcntl,
+   .get_emit_ib_size = gfx_v6_0_ring_get_emit_ib_size,
+   .get_dma_frame_size = gfx_v6_0_ring_get_dma_frame_size_gfx,
 };
 
 static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_compute = {
@@ -3129,6 +3158,8 @@ static const struct amdgpu_ring_funcs 
gfx_v6_0_ring_funcs_compute = {
.test_ring = gfx_v6_0_ring_test_ring,
.test_ib = gfx_v6_0_ring_test_ib,
.insert_nop = amdgpu_ring_insert_nop,
+   .get_emit_ib_size = gfx_v6_0_ring_get_emit_ib_size,
+   .get_dma_frame_size = gfx_v6_0_ring_get_dma_frame_size_compute,
 };
 
 static void gfx_v6_0_set_ring_funcs(struct amdgpu_device *adev)
-- 
2.5.5

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[PATCH 04/15] drm/amdgpu/gfx8: add ring callbacks for ib and dma frame size

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 40 +++
 1 file changed, 40 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index e2ed71d..1e7c615 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -6105,6 +6105,42 @@ static void gfx_v8_ring_emit_cntxcntl(struct amdgpu_ring 
*ring, uint32_t flags)
amdgpu_ring_write(ring, 0);
 }
 
+static unsigned gfx_v8_0_ring_get_emit_ib_size_gfx(struct amdgpu_ring *ring)
+{
+   return
+   4; /* gfx_v8_0_ring_emit_ib_gfx */
+}
+
+static unsigned gfx_v8_0_ring_get_dma_frame_size_gfx(struct amdgpu_ring *ring)
+{
+   return
+   20 + /* gfx_v8_0_ring_emit_gds_switch */
+   7 + /* gfx_v8_0_ring_emit_hdp_flush */
+   5 + /* gfx_v8_0_ring_emit_hdp_invalidate */
+   6 + 6 + 6 +/* gfx_v8_0_ring_emit_fence_gfx x3 for user fence, 
vm fence */
+   7 + /* gfx_v8_0_ring_emit_pipeline_sync */
+   256 + 19 + /* gfx_v8_0_ring_emit_vm_flush */
+   2 + /* gfx_v8_ring_emit_sb */
+   3; /* gfx_v8_ring_emit_cntxcntl */
+}
+
+static unsigned gfx_v8_0_ring_get_emit_ib_size_compute(struct amdgpu_ring 
*ring)
+{
+   return
+   4; /* gfx_v8_0_ring_emit_ib_compute */
+}
+
+static unsigned gfx_v8_0_ring_get_dma_frame_size_compute(struct amdgpu_ring 
*ring)
+{
+   return
+   20 + /* gfx_v8_0_ring_emit_gds_switch */
+   7 + /* gfx_v8_0_ring_emit_hdp_flush */
+   5 + /* gfx_v8_0_ring_emit_hdp_invalidate */
+   7 + /* gfx_v8_0_ring_emit_pipeline_sync */
+   17 + /* gfx_v8_0_ring_emit_vm_flush */
+   7 + 7 + 7; /* gfx_v8_0_ring_emit_fence_compute x3 for user 
fence, vm fence */
+}
+
 static void gfx_v8_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev,
 enum amdgpu_interrupt_state 
state)
 {
@@ -6288,6 +6324,8 @@ static const struct amdgpu_ring_funcs 
gfx_v8_0_ring_funcs_gfx = {
.pad_ib = amdgpu_ring_generic_pad_ib,
.emit_switch_buffer = gfx_v8_ring_emit_sb,
.emit_cntxcntl = gfx_v8_ring_emit_cntxcntl,
+   .get_emit_ib_size = gfx_v8_0_ring_get_emit_ib_size_gfx,
+   .get_dma_frame_size = gfx_v8_0_ring_get_dma_frame_size_gfx,
 };
 
 static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = {
@@ -6306,6 +6344,8 @@ static const struct amdgpu_ring_funcs 
gfx_v8_0_ring_funcs_compute = {
.test_ib = gfx_v8_0_ring_test_ib,
.insert_nop = amdgpu_ring_insert_nop,
.pad_ib = amdgpu_ring_generic_pad_ib,
+   .get_emit_ib_size = gfx_v8_0_ring_get_emit_ib_size_compute,
+   .get_dma_frame_size = gfx_v8_0_ring_get_dma_frame_size_compute,
 };
 
 static void gfx_v8_0_set_ring_funcs(struct amdgpu_device *adev)
-- 
2.5.5

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[PATCH 11/15] drm/amdgpu/uvd6: add ring callbacks for ib and dma frame size

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 29 +
 1 file changed, 29 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index 2abe8a9..e0fd9f2 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -725,6 +725,31 @@ static void uvd_v6_0_ring_emit_pipeline_sync(struct 
amdgpu_ring *ring)
amdgpu_ring_write(ring, 0xE);
 }
 
+static unsigned uvd_v6_0_ring_get_emit_ib_size(struct amdgpu_ring *ring)
+{
+   return
+   8; /* uvd_v6_0_ring_emit_ib */
+}
+
+static unsigned uvd_v6_0_ring_get_dma_frame_size(struct amdgpu_ring *ring)
+{
+   return
+   2 + /* uvd_v6_0_ring_emit_hdp_flush */
+   2 + /* uvd_v6_0_ring_emit_hdp_invalidate */
+   10 + /* uvd_v6_0_ring_emit_pipeline_sync */
+   14; /* uvd_v6_0_ring_emit_fence x1 no user fence */
+}
+
+static unsigned uvd_v6_0_ring_get_dma_frame_size_vm(struct amdgpu_ring *ring)
+{
+   return
+   2 + /* uvd_v6_0_ring_emit_hdp_flush */
+   2 + /* uvd_v6_0_ring_emit_hdp_invalidate */
+   10 + /* uvd_v6_0_ring_emit_pipeline_sync */
+   20 + /* uvd_v6_0_ring_emit_vm_flush */
+   14 + 14; /* uvd_v6_0_ring_emit_fence x2 vm fence */
+}
+
 static bool uvd_v6_0_is_idle(void *handle)
 {
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -1037,6 +1062,8 @@ static const struct amdgpu_ring_funcs 
uvd_v6_0_ring_phys_funcs = {
.pad_ib = amdgpu_ring_generic_pad_ib,
.begin_use = amdgpu_uvd_ring_begin_use,
.end_use = amdgpu_uvd_ring_end_use,
+   .get_emit_ib_size = uvd_v6_0_ring_get_emit_ib_size,
+   .get_dma_frame_size = uvd_v6_0_ring_get_dma_frame_size,
 };
 
 static const struct amdgpu_ring_funcs uvd_v6_0_ring_vm_funcs = {
@@ -1056,6 +1083,8 @@ static const struct amdgpu_ring_funcs 
uvd_v6_0_ring_vm_funcs = {
.pad_ib = amdgpu_ring_generic_pad_ib,
.begin_use = amdgpu_uvd_ring_begin_use,
.end_use = amdgpu_uvd_ring_end_use,
+   .get_emit_ib_size = uvd_v6_0_ring_get_emit_ib_size,
+   .get_dma_frame_size = uvd_v6_0_ring_get_dma_frame_size_vm,
 };
 
 static void uvd_v6_0_set_ring_funcs(struct amdgpu_device *adev)
-- 
2.5.5

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[PATCH 10/15] drm/amdgpu/uvd5: add ring callbacks for ib and dma frame size

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 16 
 1 file changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c 
b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
index 8513376..400c16f 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
@@ -577,6 +577,20 @@ static void uvd_v5_0_ring_emit_ib(struct amdgpu_ring *ring,
amdgpu_ring_write(ring, ib->length_dw);
 }
 
+static unsigned uvd_v5_0_ring_get_emit_ib_size(struct amdgpu_ring *ring)
+{
+   return
+   6; /* uvd_v5_0_ring_emit_ib */
+}
+
+static unsigned uvd_v5_0_ring_get_dma_frame_size(struct amdgpu_ring *ring)
+{
+   return
+   2 + /* uvd_v5_0_ring_emit_hdp_flush */
+   2 + /* uvd_v5_0_ring_emit_hdp_invalidate */
+   14; /* uvd_v5_0_ring_emit_fence  x1 no user fence */
+}
+
 static bool uvd_v5_0_is_idle(void *handle)
 {
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -807,6 +821,8 @@ static const struct amdgpu_ring_funcs uvd_v5_0_ring_funcs = 
{
.pad_ib = amdgpu_ring_generic_pad_ib,
.begin_use = amdgpu_uvd_ring_begin_use,
.end_use = amdgpu_uvd_ring_end_use,
+   .get_emit_ib_size = uvd_v5_0_ring_get_emit_ib_size,
+   .get_dma_frame_size = uvd_v5_0_ring_get_dma_frame_size,
 };
 
 static void uvd_v5_0_set_ring_funcs(struct amdgpu_device *adev)
-- 
2.5.5

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[PATCH 09/15] drm/amdgpu/uvd4.2: add ring callbacks for ib and dma frame size

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 16 
 1 file changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c 
b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
index 10c0407..f6c9415 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
@@ -526,6 +526,20 @@ static void uvd_v4_2_ring_emit_ib(struct amdgpu_ring *ring,
amdgpu_ring_write(ring, ib->length_dw);
 }
 
+static unsigned uvd_v4_2_ring_get_emit_ib_size(struct amdgpu_ring *ring)
+{
+   return
+   4; /* uvd_v4_2_ring_emit_ib */
+}
+
+static unsigned uvd_v4_2_ring_get_dma_frame_size(struct amdgpu_ring *ring)
+{
+   return
+   2 + /* uvd_v4_2_ring_emit_hdp_flush */
+   2 + /* uvd_v4_2_ring_emit_hdp_invalidate */
+   14; /* uvd_v4_2_ring_emit_fence  x1 no user fence */
+}
+
 /**
  * uvd_v4_2_mc_resume - memory controller programming
  *
@@ -756,6 +770,8 @@ static const struct amdgpu_ring_funcs uvd_v4_2_ring_funcs = 
{
.pad_ib = amdgpu_ring_generic_pad_ib,
.begin_use = amdgpu_uvd_ring_begin_use,
.end_use = amdgpu_uvd_ring_end_use,
+   .get_emit_ib_size = uvd_v4_2_ring_get_emit_ib_size,
+   .get_dma_frame_size = uvd_v4_2_ring_get_dma_frame_size,
 };
 
 static void uvd_v4_2_set_ring_funcs(struct amdgpu_device *adev)
-- 
2.5.5

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[PATCH 06/15] drm/amdgpu/cik_sdma: add ring callbacks for ib and dma frame size

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c 
b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
index e71cd12..e6d7bf9 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
@@ -847,6 +847,22 @@ static void cik_sdma_ring_emit_vm_flush(struct amdgpu_ring 
*ring,
amdgpu_ring_write(ring, (0xfff << 16) | 10); /* retry count, poll 
interval */
 }
 
+static unsigned cik_sdma_ring_get_emit_ib_size(struct amdgpu_ring *ring)
+{
+   return
+   7 + 4; /* cik_sdma_ring_emit_ib */
+}
+
+static unsigned cik_sdma_ring_get_dma_frame_size(struct amdgpu_ring *ring)
+{
+   return
+   6 + /* cik_sdma_ring_emit_hdp_flush */
+   3 + /* cik_sdma_ring_emit_hdp_invalidate */
+   6 + /* cik_sdma_ring_emit_pipeline_sync */
+   12 + /* cik_sdma_ring_emit_vm_flush */
+   9 + 9 + 9; /* cik_sdma_ring_emit_fence x3 for user fence, vm 
fence */
+}
+
 static void cik_enable_sdma_mgcg(struct amdgpu_device *adev,
 bool enable)
 {
@@ -1220,6 +1236,8 @@ static const struct amdgpu_ring_funcs cik_sdma_ring_funcs 
= {
.test_ib = cik_sdma_ring_test_ib,
.insert_nop = cik_sdma_ring_insert_nop,
.pad_ib = cik_sdma_ring_pad_ib,
+   .get_emit_ib_size = cik_sdma_ring_get_emit_ib_size,
+   .get_dma_frame_size = cik_sdma_ring_get_dma_frame_size,
 };
 
 static void cik_sdma_set_ring_funcs(struct amdgpu_device *adev)
-- 
2.5.5

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[PATCH 08/15] drm/amdgpu/sdma3: add ring callbacks for ib and dma frame size

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 
b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index cabb9fe..62e2f4c 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
@@ -1108,6 +1108,22 @@ static void sdma_v3_0_ring_emit_vm_flush(struct 
amdgpu_ring *ring,
  SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(10)); /* retry 
count, poll interval */
 }
 
+static unsigned sdma_v3_0_ring_get_emit_ib_size(struct amdgpu_ring *ring)
+{
+   return
+   7 + 6; /* sdma_v3_0_ring_emit_ib */
+}
+
+static unsigned sdma_v3_0_ring_get_dma_frame_size(struct amdgpu_ring *ring)
+{
+   return
+   6 + /* sdma_v3_0_ring_emit_hdp_flush */
+   3 + /* sdma_v3_0_ring_emit_hdp_invalidate */
+   6 + /* sdma_v3_0_ring_emit_pipeline_sync */
+   12 + /* sdma_v3_0_ring_emit_vm_flush */
+   10 + 10 + 10; /* sdma_v3_0_ring_emit_fence x3 for user fence, 
vm fence */
+}
+
 static int sdma_v3_0_early_init(void *handle)
 {
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -1569,6 +1585,8 @@ static const struct amdgpu_ring_funcs 
sdma_v3_0_ring_funcs = {
.test_ib = sdma_v3_0_ring_test_ib,
.insert_nop = sdma_v3_0_ring_insert_nop,
.pad_ib = sdma_v3_0_ring_pad_ib,
+   .get_emit_ib_size = sdma_v3_0_ring_get_emit_ib_size,
+   .get_dma_frame_size = sdma_v3_0_ring_get_dma_frame_size,
 };
 
 static void sdma_v3_0_set_ring_funcs(struct amdgpu_device *adev)
-- 
2.5.5

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[PATCH 03/15] drm/amdgpu/gfx7: add ring callbacks for ib and dma frame size

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 39 +++
 1 file changed, 39 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 8c780f6..90102f1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -4190,6 +4190,41 @@ static void gfx_v7_0_ring_emit_gds_switch(struct 
amdgpu_ring *ring,
amdgpu_ring_write(ring, (1 << (oa_size + oa_base)) - (1 << oa_base));
 }
 
+static unsigned gfx_v7_0_ring_get_emit_ib_size_gfx(struct amdgpu_ring *ring)
+{
+   return
+   4; /* gfx_v7_0_ring_emit_ib_gfx */
+}
+
+static unsigned gfx_v7_0_ring_get_dma_frame_size_gfx(struct amdgpu_ring *ring)
+{
+   return
+   20 + /* gfx_v7_0_ring_emit_gds_switch */
+   7 + /* gfx_v7_0_ring_emit_hdp_flush */
+   5 + /* gfx_v7_0_ring_emit_hdp_invalidate */
+   12 + 12 + 12 + /* gfx_v7_0_ring_emit_fence_gfx x3 for user 
fence, vm fence */
+   7 + 4 + /* gfx_v7_0_ring_emit_pipeline_sync */
+   17 + 6 + /* gfx_v7_0_ring_emit_vm_flush */
+   3; /* gfx_v7_ring_emit_cntxcntl */
+}
+
+static unsigned gfx_v7_0_ring_get_emit_ib_size_compute(struct amdgpu_ring 
*ring)
+{
+   return
+   4; /* gfx_v7_0_ring_emit_ib_compute */
+}
+
+static unsigned gfx_v7_0_ring_get_dma_frame_size_compute(struct amdgpu_ring 
*ring)
+{
+   return
+   20 + /* gfx_v7_0_ring_emit_gds_switch */
+   7 + /* gfx_v7_0_ring_emit_hdp_flush */
+   5 + /* gfx_v7_0_ring_emit_hdp_invalidate */
+   7 + /* gfx_v7_0_ring_emit_pipeline_sync */
+   17 + /* gfx_v7_0_ring_emit_vm_flush */
+   7 + 7 + 7; /* gfx_v7_0_ring_emit_fence_compute x3 for user 
fence, vm fence */
+}
+
 static const struct amdgpu_gfx_funcs gfx_v7_0_gfx_funcs = {
.get_gpu_clock_counter = _v7_0_get_gpu_clock_counter,
.select_se_sh = _v7_0_select_se_sh,
@@ -4958,6 +4993,8 @@ static const struct amdgpu_ring_funcs 
gfx_v7_0_ring_funcs_gfx = {
.insert_nop = amdgpu_ring_insert_nop,
.pad_ib = amdgpu_ring_generic_pad_ib,
.emit_cntxcntl = gfx_v7_ring_emit_cntxcntl,
+   .get_emit_ib_size = gfx_v7_0_ring_get_emit_ib_size_gfx,
+   .get_dma_frame_size = gfx_v7_0_ring_get_dma_frame_size_gfx,
 };
 
 static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_compute = {
@@ -4976,6 +5013,8 @@ static const struct amdgpu_ring_funcs 
gfx_v7_0_ring_funcs_compute = {
.test_ib = gfx_v7_0_ring_test_ib,
.insert_nop = amdgpu_ring_insert_nop,
.pad_ib = amdgpu_ring_generic_pad_ib,
+   .get_emit_ib_size = gfx_v7_0_ring_get_emit_ib_size_compute,
+   .get_dma_frame_size = gfx_v7_0_ring_get_dma_frame_size_compute,
 };
 
 static void gfx_v7_0_set_ring_funcs(struct amdgpu_device *adev)
-- 
2.5.5

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[PATCH 07/15] drm/amdgpu/sdma2.4: add ring callbacks for ib and dma frame size

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 
b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
index e822296..82c731b 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
@@ -906,6 +906,22 @@ static void sdma_v2_4_ring_emit_vm_flush(struct 
amdgpu_ring *ring,
  SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(10)); /* retry 
count, poll interval */
 }
 
+static unsigned sdma_v2_4_ring_get_emit_ib_size(struct amdgpu_ring *ring)
+{
+   return
+   7 + 6; /* sdma_v2_4_ring_emit_ib */
+}
+
+static unsigned sdma_v2_4_ring_get_dma_frame_size(struct amdgpu_ring *ring)
+{
+   return
+   6 + /* sdma_v2_4_ring_emit_hdp_flush */
+   3 + /* sdma_v2_4_ring_emit_hdp_invalidate */
+   6 + /* sdma_v2_4_ring_emit_pipeline_sync */
+   12 + /* sdma_v2_4_ring_emit_vm_flush */
+   10 + 10 + 10; /* sdma_v2_4_ring_emit_fence x3 for user fence, 
vm fence */
+}
+
 static int sdma_v2_4_early_init(void *handle)
 {
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -1224,6 +1240,8 @@ static const struct amdgpu_ring_funcs 
sdma_v2_4_ring_funcs = {
.test_ib = sdma_v2_4_ring_test_ib,
.insert_nop = sdma_v2_4_ring_insert_nop,
.pad_ib = sdma_v2_4_ring_pad_ib,
+   .get_emit_ib_size = sdma_v2_4_ring_get_emit_ib_size,
+   .get_dma_frame_size = sdma_v2_4_ring_get_dma_frame_size,
 };
 
 static void sdma_v2_4_set_ring_funcs(struct amdgpu_device *adev)
-- 
2.5.5

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[PATCH] drm/amdgpu: update the shadow PD together with the real one

From: Christian König 

Far less CPU cycles needed for this approach.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h|   1 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 134 +
 2 files changed, 69 insertions(+), 66 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f949b59..864ea4e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -821,7 +821,6 @@ struct amdgpu_ring {
 struct amdgpu_vm_pt {
struct amdgpu_bo_list_entry entry;
uint64_taddr;
-   uint64_tshadow_addr;
 };
 
 struct amdgpu_vm {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 2bb78dc..c2d7681 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -610,16 +610,26 @@ static uint64_t amdgpu_vm_map_gart(const dma_addr_t 
*pages_addr, uint64_t addr)
return result;
 }
 
-static int amdgpu_vm_update_pd_or_shadow(struct amdgpu_device *adev,
-struct amdgpu_vm *vm,
-bool shadow)
+/*
+ * amdgpu_vm_update_pdes - make sure that page directory is valid
+ *
+ * @adev: amdgpu_device pointer
+ * @vm: requested vm
+ * @start: start of GPU address range
+ * @end: end of GPU address range
+ *
+ * Allocates new page tables if necessary
+ * and updates the page directory.
+ * Returns 0 for success, error for failure.
+ */
+int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
+   struct amdgpu_vm *vm)
 {
+   struct amdgpu_bo *shadow;
struct amdgpu_ring *ring;
-   struct amdgpu_bo *pd = shadow ? vm->page_directory->shadow :
-   vm->page_directory;
-   uint64_t pd_addr;
+   uint64_t pd_addr, shadow_addr;
uint32_t incr = AMDGPU_VM_PTE_COUNT * 8;
-   uint64_t last_pde = ~0, last_pt = ~0;
+   uint64_t last_pde = ~0, last_pt = ~0, last_shadow = ~0;
unsigned count = 0, pt_idx, ndw;
struct amdgpu_job *job;
struct amdgpu_pte_update_params params;
@@ -627,15 +637,8 @@ static int amdgpu_vm_update_pd_or_shadow(struct 
amdgpu_device *adev,
 
int r;
 
-   if (!pd)
-   return 0;
-
-   r = amdgpu_ttm_bind(>tbo, >tbo.mem);
-   if (r)
-   return r;
-
-   pd_addr = amdgpu_bo_gpu_offset(pd);
ring = container_of(vm->entity.sched, struct amdgpu_ring, sched);
+   shadow = vm->page_directory->shadow;
 
/* padding, etc. */
ndw = 64;
@@ -643,6 +646,17 @@ static int amdgpu_vm_update_pd_or_shadow(struct 
amdgpu_device *adev,
/* assume the worst case */
ndw += vm->max_pde_used * 6;
 
+   pd_addr = amdgpu_bo_gpu_offset(vm->page_directory);
+   if (shadow) {
+   r = amdgpu_ttm_bind(>tbo, >tbo.mem);
+   if (r)
+   return r;
+   shadow_addr = amdgpu_bo_gpu_offset(shadow);
+   ndw *= 2;
+   } else {
+   shadow_addr = 0;
+   }
+
r = amdgpu_job_alloc_with_ib(adev, ndw * 4, );
if (r)
return r;
@@ -660,23 +674,19 @@ static int amdgpu_vm_update_pd_or_shadow(struct 
amdgpu_device *adev,
continue;
 
if (bo->shadow) {
-   struct amdgpu_bo *shadow = bo->shadow;
+   struct amdgpu_bo *pt_shadow = bo->shadow;
 
-   r = amdgpu_ttm_bind(>tbo, >tbo.mem);
+   r = amdgpu_ttm_bind(_shadow->tbo,
+   _shadow->tbo.mem);
if (r)
return r;
}
 
pt = amdgpu_bo_gpu_offset(bo);
-   if (!shadow) {
-   if (vm->page_tables[pt_idx].addr == pt)
-   continue;
-   vm->page_tables[pt_idx].addr = pt;
-   } else {
-   if (vm->page_tables[pt_idx].shadow_addr == pt)
-   continue;
-   vm->page_tables[pt_idx].shadow_addr = pt;
-   }
+   if (vm->page_tables[pt_idx].addr == pt)
+   continue;
+
+   vm->page_tables[pt_idx].addr = pt;
 
pde = pd_addr + pt_idx * 8;
if (((last_pde + 8 * count) != pde) ||
@@ -684,6 +694,13 @@ static int amdgpu_vm_update_pd_or_shadow(struct 
amdgpu_device *adev,
(count == AMDGPU_VM_MAX_UPDATE_SIZE)) {
 
if (count) {
+   if (shadow)
+   amdgpu_vm_do_set_ptes(,
+ last_shadow,

Re: Powerplay sensors (v2.5)

This series is,
Reviewed-by: Edward O'Callaghan 

On 09/16/2016 10:44 PM, Tom St Denis wrote:
> I've rebased the backend to squash the carrizo + rest patches together
> and then touched up the debugfs entry per Edwards suggestions.
> 
> Tested on Tonga, Carrizo, and Stoney.
> 
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[PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v2)

2016-09-16 Thread Tom St Denis

Provides standardized interface to read various sensors.
The API is extensible (by adding to the end of the
amd_pp_sensors enumeration list.

Support has been added to Carrizo/Tonga/Fiji/Polaris/Iceland

(v2) Squashed the two sensor patches into one.

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c  | 20 +
 drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c | 96 ++
 drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c   | 34 
 .../gpu/drm/amd/powerplay/hwmgr/iceland_hwmgr.c| 34 
 .../gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c  | 33 
 drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c  | 33 
 drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h  | 12 +++
 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h  |  1 +
 8 files changed, 263 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c 
b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index b1d19409bf86..ee0368381e82 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -894,6 +894,25 @@ static int pp_dpm_set_mclk_od(void *handle, uint32_t value)
return hwmgr->hwmgr_func->set_mclk_od(hwmgr, value);
 }
 
+static int pp_dpm_read_sensor(void *handle, int idx, int32_t *value)
+{
+   struct pp_hwmgr *hwmgr;
+
+   if (!handle)
+   return -EINVAL;
+
+   hwmgr = ((struct pp_instance *)handle)->hwmgr;
+
+   PP_CHECK_HW(hwmgr);
+
+   if (hwmgr->hwmgr_func->read_sensor == NULL) {
+   printk(KERN_INFO "%s was not implemented.\n", __func__);
+   return 0;
+   }
+
+   return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value);
+}
+
 const struct amd_powerplay_funcs pp_dpm_funcs = {
.get_temperature = pp_dpm_get_temperature,
.load_firmware = pp_dpm_load_fw,
@@ -920,6 +939,7 @@ const struct amd_powerplay_funcs pp_dpm_funcs = {
.set_sclk_od = pp_dpm_set_sclk_od,
.get_mclk_od = pp_dpm_get_mclk_od,
.set_mclk_od = pp_dpm_set_mclk_od,
+   .read_sensor = pp_dpm_read_sensor,
 };
 
 static int amd_pp_instance_init(struct amd_pp_init *pp_init,
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
index 5ecef1732e20..9f3c5a8a903c 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
@@ -1857,6 +1857,101 @@ static int cz_get_max_high_clocks(struct pp_hwmgr 
*hwmgr, struct amd_pp_simple_c
return 0;
 }
 
+static int cz_read_sensor(struct pp_hwmgr *hwmgr, int idx, int32_t *value)
+{
+   struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
+
+   struct phm_clock_voltage_dependency_table *table =
+   hwmgr->dyn_state.vddc_dependency_on_sclk;
+
+   struct phm_vce_clock_voltage_dependency_table *vce_table =
+   hwmgr->dyn_state.vce_clock_voltage_dependency_table;
+
+   struct phm_uvd_clock_voltage_dependency_table *uvd_table =
+   hwmgr->dyn_state.uvd_clock_voltage_dependency_table;
+
+   uint32_t sclk_index = 
PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
ixTARGET_AND_CURRENT_PROFILE_INDEX),
+   TARGET_AND_CURRENT_PROFILE_INDEX, 
CURR_SCLK_INDEX);
+   uint32_t uvd_index = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, 
CGS_IND_REG__SMC, ixTARGET_AND_CURRENT_PROFILE_INDEX_2),
+   TARGET_AND_CURRENT_PROFILE_INDEX_2, 
CURR_UVD_INDEX);
+   uint32_t vce_index = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, 
CGS_IND_REG__SMC, ixTARGET_AND_CURRENT_PROFILE_INDEX_2),
+   TARGET_AND_CURRENT_PROFILE_INDEX_2, 
CURR_VCE_INDEX);
+
+   uint32_t sclk, vclk, dclk, ecclk, tmp, activity_percent;
+   uint16_t vddnb, vddgfx;
+   int result;
+
+   switch (idx) {
+   case AMDGPU_PP_SENSOR_GFX_SCLK:
+   if (sclk_index < NUM_SCLK_LEVELS) {
+   sclk = table->entries[sclk_index].clk;
+   *value = sclk;
+   return 0;
+   }
+   return -EINVAL;
+   case AMDGPU_PP_SENSOR_VDDNB:
+   tmp = (cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
ixSMUSVI_NB_CURRENTVID) &
+   CURRENT_NB_VID_MASK) >> CURRENT_NB_VID__SHIFT;
+   vddnb = cz_convert_8Bit_index_to_voltage(hwmgr, tmp);
+   *value = vddnb;
+   return 0;
+   case AMDGPU_PP_SENSOR_VDDGFX:
+   tmp = (cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
ixSMUSVI_GFX_CURRENTVID) &
+   CURRENT_GFX_VID_MASK) >> CURRENT_GFX_VID__SHIFT;
+   vddgfx = cz_convert_8Bit_index_to_voltage(hwmgr, (u16)tmp);
+   *value = vddgfx;
+   return 0;
+   case

[PATCH 2/2] drm/amd/amdgpu: Hook up read_sensor() to debugfs (v2)

2016-09-16 Thread Tom St Denis

(v2) Tidy'ed up read function.

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 31 ++
 1 file changed, 31 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 9103e7baf26e..7f9fbecc33c2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2841,6 +2841,29 @@ static ssize_t amdgpu_debugfs_gca_config_read(struct 
file *f, char __user *buf,
return result;
 }
 
+static ssize_t amdgpu_debugfs_sensor_read(struct file *f, char __user *buf,
+   size_t size, loff_t *pos)
+{
+   struct amdgpu_device *adev = f->f_inode->i_private;
+   int idx, r;
+   int32_t value;
+
+   if (size != 4 || *pos & 0x3)
+   return -EINVAL;
+
+   /* convert offset to sensor number */
+   idx = *pos >> 2;
+
+   if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->read_sensor)
+   r = 
adev->powerplay.pp_funcs->read_sensor(adev->powerplay.pp_handle, idx, );
+   else
+   return -EINVAL;
+
+   if (!r)
+   r = put_user(value, (int32_t *)buf);
+
+   return !r ? 4 : r;
+}
 
 static const struct file_operations amdgpu_debugfs_regs_fops = {
.owner = THIS_MODULE,
@@ -2873,12 +2896,19 @@ static const struct file_operations 
amdgpu_debugfs_gca_config_fops = {
.llseek = default_llseek
 };
 
+static const struct file_operations amdgpu_debugfs_sensors_fops = {
+   .owner = THIS_MODULE,
+   .read = amdgpu_debugfs_sensor_read,
+   .llseek = default_llseek
+};
+
 static const struct file_operations *debugfs_regs[] = {
_debugfs_regs_fops,
_debugfs_regs_didt_fops,
_debugfs_regs_pcie_fops,
_debugfs_regs_smc_fops,
_debugfs_gca_config_fops,
+   _debugfs_sensors_fops,
 };
 
 static const char *debugfs_regs_names[] = {
@@ -2887,6 +2917,7 @@ static const char *debugfs_regs_names[] = {
"amdgpu_regs_pcie",
"amdgpu_regs_smc",
"amdgpu_gca_config",
+   "amdgpu_sensors",
 };
 
 static int amdgpu_debugfs_regs_init(struct amdgpu_device *adev)
-- 
2.10.0

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Powerplay sensors (v2.5)

2016-09-16 Thread Tom St Denis

I've rebased the backend to squash the carrizo + rest patches together
and then touched up the debugfs entry per Edwards suggestions.

Tested on Tonga, Carrizo, and Stoney.

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Re: [PATCH 1/3] drm/amdgpu: cleanup VM shadow BO unreferencing

Series is,
Acked-by: Edward O'Callaghan 

On 09/16/2016 10:12 PM, Christian König wrote:
> From: Christian König 
> 
> Unreference the shadow BOs in the error path as well and drop the NULL checks.
> 
> Signed-off-by: Christian König 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 16 ++--
>  1 file changed, 10 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 8928a2a..19c7bf7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -1429,6 +1429,7 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
>  
>   r = amdgpu_vm_clear_bo(adev, vm, pt);
>   if (r) {
> + amdgpu_bo_unref(>shadow);
>   amdgpu_bo_unref();
>   goto error_free;
>   }
> @@ -1635,6 +1636,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct 
> amdgpu_vm *vm)
>   return 0;
>  
>  error_free_page_directory:
> + amdgpu_bo_unref(>page_directory->shadow);
>   amdgpu_bo_unref(>page_directory);
>   vm->page_directory = NULL;
>  
> @@ -1677,15 +1679,17 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, 
> struct amdgpu_vm *vm)
>   }
>  
>   for (i = 0; i < amdgpu_vm_num_pdes(adev); i++) {
> - if (vm->page_tables[i].entry.robj &&
> - vm->page_tables[i].entry.robj->shadow)
> - amdgpu_bo_unref(>page_tables[i].entry.robj->shadow);
> - amdgpu_bo_unref(>page_tables[i].entry.robj);
> + struct amdgpu_bo *pt = vm->page_tables[i].entry.robj;
> +
> + if (!pt)
> + continue;
> +
> + amdgpu_bo_unref(>shadow);
> + amdgpu_bo_unref();
>   }
>   drm_free_large(vm->page_tables);
>  
> - if (vm->page_directory->shadow)
> - amdgpu_bo_unref(>page_directory->shadow);
> + amdgpu_bo_unref(>page_directory->shadow);
>   amdgpu_bo_unref(>page_directory);
>   fence_put(vm->page_directory_fence);
>  }
> 



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[PATCH 1/3] drm/amdgpu: cleanup VM shadow BO unreferencing

From: Christian König 

Unreference the shadow BOs in the error path as well and drop the NULL checks.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 16 ++--
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 8928a2a..19c7bf7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1429,6 +1429,7 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
 
r = amdgpu_vm_clear_bo(adev, vm, pt);
if (r) {
+   amdgpu_bo_unref(>shadow);
amdgpu_bo_unref();
goto error_free;
}
@@ -1635,6 +1636,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct 
amdgpu_vm *vm)
return 0;
 
 error_free_page_directory:
+   amdgpu_bo_unref(>page_directory->shadow);
amdgpu_bo_unref(>page_directory);
vm->page_directory = NULL;
 
@@ -1677,15 +1679,17 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct 
amdgpu_vm *vm)
}
 
for (i = 0; i < amdgpu_vm_num_pdes(adev); i++) {
-   if (vm->page_tables[i].entry.robj &&
-   vm->page_tables[i].entry.robj->shadow)
-   amdgpu_bo_unref(>page_tables[i].entry.robj->shadow);
-   amdgpu_bo_unref(>page_tables[i].entry.robj);
+   struct amdgpu_bo *pt = vm->page_tables[i].entry.robj;
+
+   if (!pt)
+   continue;
+
+   amdgpu_bo_unref(>shadow);
+   amdgpu_bo_unref();
}
drm_free_large(vm->page_tables);
 
-   if (vm->page_directory->shadow)
-   amdgpu_bo_unref(>page_directory->shadow);
+   amdgpu_bo_unref(>page_directory->shadow);
amdgpu_bo_unref(>page_directory);
fence_put(vm->page_directory_fence);
 }
-- 
2.5.0

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[PATCH 2/3] drm/amdgpu: fix initializing the VM last eviction counter

From: Christian König 

Close a very small window where something can go wrong.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 19c7bf7..63649c3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1628,13 +1628,17 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct 
amdgpu_vm *vm)
goto error_free_page_directory;
 
r = amdgpu_vm_clear_bo(adev, vm, vm->page_directory);
-   amdgpu_bo_unreserve(vm->page_directory);
if (r)
-   goto error_free_page_directory;
+   goto error_unreserve;
+
vm->last_eviction_counter = atomic64_read(>num_evictions);
+   amdgpu_bo_unreserve(vm->page_directory);
 
return 0;
 
+error_unreserve:
+   amdgpu_bo_unreserve(vm->page_directory);
+
 error_free_page_directory:
amdgpu_bo_unref(>page_directory->shadow);
amdgpu_bo_unref(>page_directory);
-- 
2.5.0

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Re: Add read_sensor() support for fiji/tonga/iceland/polaris10

2016-09-16 Thread StDenis, Tom

Thanks.  I'm thinking I might merge this with Patch #1 from the other series 
just to make life easier for everyone.


Tom



From: amd-gfx  on behalf of Edward 
O'Callaghan 
Sent: Friday, September 16, 2016 01:16
To: Tom St Denis; amd-gfx@lists.freedesktop.org
Subject: Re: Add read_sensor() support for fiji/tonga/iceland/polaris10

Reviewed-by: Edward O'Callaghan 

On 09/16/2016 04:21 AM, Tom St Denis wrote:
> Tested on my Tonga but should in theory work for the others as
> well since they're 99% copy/paste (except which SMC reg is read
> for GPU load...)
>
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Re: [PATCH] drm/amdgpu: allocate GTT space for shadow VM page tables

Could be, but possible that I've missed a few other places where GTT is 
used as well.


What issues where you seeing and are there any backtraces logged? I have 
a WARN_ON() in the code path which should trigger whenever I missed 
something.


Christian.

Am 16.09.2016 um 11:55 schrieb Mike Lothian:


Does this fix the issue I was seeing since the new memory manager went 
into thr 4.9-wip branch?



On Fri, 16 Sep 2016, 10:48 am Christian König, 
> wrote:


From: Christian König >

We need to access those with the system domain.

Fixes fallout from only allocating GTT space on demand.

Signed-off-by: Christian König >
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index a6a48ed..8928a2a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -552,6 +552,10 @@ static int amdgpu_vm_clear_bo(struct
amdgpu_device *adev,
if (r)
goto error;

+   r = amdgpu_ttm_bind(>tbo, >tbo.mem);
+   if (r)
+   goto error;
+
addr = amdgpu_bo_gpu_offset(bo);
entries = amdgpu_bo_size(bo) / 8;

@@ -625,6 +629,11 @@ static int
amdgpu_vm_update_pd_or_shadow(struct amdgpu_device *adev,

if (!pd)
return 0;
+
+   r = amdgpu_ttm_bind(>tbo, >tbo.mem);
+   if (r)
+   return r;
+
pd_addr = amdgpu_bo_gpu_offset(pd);
ring = container_of(vm->entity.sched, struct amdgpu_ring,
sched);

@@ -650,6 +659,14 @@ static int
amdgpu_vm_update_pd_or_shadow(struct amdgpu_device *adev,
if (bo == NULL)
continue;

+   if (bo->shadow) {
+   struct amdgpu_bo *shadow = bo->shadow;
+
+   r = amdgpu_ttm_bind(>tbo,
>tbo.mem);
+   if (r)
+   return r;
+   }
+
pt = amdgpu_bo_gpu_offset(bo);
if (!shadow) {
if (vm->page_tables[pt_idx].addr == pt)
--
2.5.0

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Re: [PATCH] drm/amdgpu: allocate GTT space for shadow VM page tables

2016-09-16 Thread Mike Lothian

Does this fix the issue I was seeing since the new memory manager went into
thr 4.9-wip branch?

On Fri, 16 Sep 2016, 10:48 am Christian König, 
wrote:

> From: Christian König 
>
> We need to access those with the system domain.
>
> Fixes fallout from only allocating GTT space on demand.
>
> Signed-off-by: Christian König 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 17 +
>  1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index a6a48ed..8928a2a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -552,6 +552,10 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device
> *adev,
> if (r)
> goto error;
>
> +   r = amdgpu_ttm_bind(>tbo, >tbo.mem);
> +   if (r)
> +   goto error;
> +
> addr = amdgpu_bo_gpu_offset(bo);
> entries = amdgpu_bo_size(bo) / 8;
>
> @@ -625,6 +629,11 @@ static int amdgpu_vm_update_pd_or_shadow(struct
> amdgpu_device *adev,
>
> if (!pd)
> return 0;
> +
> +   r = amdgpu_ttm_bind(>tbo, >tbo.mem);
> +   if (r)
> +   return r;
> +
> pd_addr = amdgpu_bo_gpu_offset(pd);
> ring = container_of(vm->entity.sched, struct amdgpu_ring, sched);
>
> @@ -650,6 +659,14 @@ static int amdgpu_vm_update_pd_or_shadow(struct
> amdgpu_device *adev,
> if (bo == NULL)
> continue;
>
> +   if (bo->shadow) {
> +   struct amdgpu_bo *shadow = bo->shadow;
> +
> +   r = amdgpu_ttm_bind(>tbo,
> >tbo.mem);
> +   if (r)
> +   return r;
> +   }
> +
> pt = amdgpu_bo_gpu_offset(bo);
> if (!shadow) {
> if (vm->page_tables[pt_idx].addr == pt)
> --
> 2.5.0
>
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[PATCH] drm/amdgpu: allocate GTT space for shadow VM page tables

From: Christian König 

We need to access those with the system domain.

Fixes fallout from only allocating GTT space on demand.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index a6a48ed..8928a2a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -552,6 +552,10 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
if (r)
goto error;
 
+   r = amdgpu_ttm_bind(>tbo, >tbo.mem);
+   if (r)
+   goto error;
+
addr = amdgpu_bo_gpu_offset(bo);
entries = amdgpu_bo_size(bo) / 8;
 
@@ -625,6 +629,11 @@ static int amdgpu_vm_update_pd_or_shadow(struct 
amdgpu_device *adev,
 
if (!pd)
return 0;
+
+   r = amdgpu_ttm_bind(>tbo, >tbo.mem);
+   if (r)
+   return r;
+
pd_addr = amdgpu_bo_gpu_offset(pd);
ring = container_of(vm->entity.sched, struct amdgpu_ring, sched);
 
@@ -650,6 +659,14 @@ static int amdgpu_vm_update_pd_or_shadow(struct 
amdgpu_device *adev,
if (bo == NULL)
continue;
 
+   if (bo->shadow) {
+   struct amdgpu_bo *shadow = bo->shadow;
+
+   r = amdgpu_ttm_bind(>tbo, >tbo.mem);
+   if (r)
+   return r;
+   }
+
pt = amdgpu_bo_gpu_offset(bo);
if (!shadow) {
if (vm->page_tables[pt_idx].addr == pt)
-- 
2.5.0

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[ANNOUNCE] xf86-video-amdgpu 1.1.2

2016-09-16 Thread Michel Dänzer


This is the 1.1.2 release of xf86-video-amdgpu, the Xorg
driver for AMD Radeon GPUs supported by the amdgpu kernel driver.

The only change in this release is a fix for issues with the configure
option --with-xorg-conf-dir which slipped into the 1.1.1 release.
Everybody is advised to use this release in favour of 1.1.1.


Michel Dänzer (2):
  Fix handling of configure option --with-xorg-conf-dir
  Bump version for 1.1.2 release

git tag: xf86-video-amdgpu-1.1.2

http://xorg.freedesktop.org/archive/individual/driver/xf86-video-amdgpu-1.1.2.tar.bz2
MD5:  02356ac7e840782edfd15ae81e508cec  xf86-video-amdgpu-1.1.2.tar.bz2
SHA1: 6f16fc95bd3d4ddc72e8c4e006097c3a3d75cdfd  xf86-video-amdgpu-1.1.2.tar.bz2
SHA256: 6ee87fed6d70d12353ca7ac02f8321a30d770626bf56f62f0e27970a33690779  
xf86-video-amdgpu-1.1.2.tar.bz2
PGP:  
http://xorg.freedesktop.org/archive/individual/driver/xf86-video-amdgpu-1.1.2.tar.bz2.sig

http://xorg.freedesktop.org/archive/individual/driver/xf86-video-amdgpu-1.1.2.tar.gz
MD5:  cf68fc66247188dd7a83d171acdb81f8  xf86-video-amdgpu-1.1.2.tar.gz
SHA1: ab56de6b454c7490e51c164df13ccca8f3ef5b22  xf86-video-amdgpu-1.1.2.tar.gz
SHA256: aeaae7be4faa3e1056dffa83a90c551af638280ea298bf96550ad86d3aa60d6e  
xf86-video-amdgpu-1.1.2.tar.gz
PGP:  
http://xorg.freedesktop.org/archive/individual/driver/xf86-video-amdgpu-1.1.2.tar.gz.sig


-- 
Earthling Michel Dänzer   |   http://www.amd.com
Libre software enthusiast | Mesa and X developer
This is an OpenPGP/MIME signed message (RFC 4880 and 3156)
--hxv55G616wHiXvTRJePFK06eGRKJtxHfR
Content-Type: multipart/mixed; boundary="PlgvlKD8ou7aM1eo9KuxjsWf1NhkkXq9S";
 protected-headers="v1"
From: =?UTF-8?Q?Michel_D=c3=a4nzer?= 
Reply-To: amd-gfx@lists.freedesktop.org
To: xorg-annou...@lists.freedesktop.org
Cc: amd-gfx@lists.freedesktop.org, x...@lists.freedesktop.org
Message-ID: 
Subject: [ANNOUNCE] xf86-video-amdgpu 1.1.1

--PlgvlKD8ou7aM1eo9KuxjsWf1NhkkXq9S
Content-Type: text/plain; charset=utf-8
Content-Transfer-Encoding: quoted-printable


I'm pleased to announce the 1.1.1 release of xf86-video-amdgpu, the Xorg
driver for AMD Radeon GPUs supported by the amdgpu kernel driver.
This release supports xserver versions 1.9-1.18.

This is a stable point release containing only fixes and other minor chan=
ges.

Highlights:

* Support for all currently available GPUs supported by the amdgpu
  kernel driver.
* A few fixes for crash/hang bugs.

Thanks to everybody who contributed to this release in any way!


Alex Deucher (1):
  add missing bonaire pci id

Flora Cui (3):
  add strato pci id
  Add more Polaris 10 PCI IDs
  Add more Polaris 11 PCI IDs

Marek Ol=C5=A1=C3=A1k (1):
  Fix cursor size for SI

Michel D=C3=A4nzer (14):
  Handle Zaphod mode correctly in amdgpu_mode_hotplug
  glamor: Fix amdgpu_glamor_share_pixmap_backing for priv->bo =3D=3D =
NULL
  Remove amdgpu_share_pixmap_backing
  Add amdgpu_pixmap_get_tiling_info
  Consolidate get_drawable_pixmap helper
  Move DRI2's local fixup_glamor helper to amdgpu_glamor_set_pixmap_b=
o v2
  glamor: Reallocate linear pixmap BO if necessary for DRI2 PRIME
  Destroy all dedicated scanout buffers during CloseScreen
  Only use RandR APIs if RandR is enabled
  DRI2: Add interpolated_vblanks in amdgpu_dri2_get_crtc_msc
  Add Mullins PCI IDs
  Add missing Kaveri PCI ID (1318)
  Use --with-xorg-conf-dir=3D$prefix/share/X11/xorg.conf.d by default=

  Bump version for the 1.1.1 release

Qiang Yu (3):
  Remove RR_Capability_SinkOutput for GPU without CRTC.
  Fix amdgpu_mode_hotplug crash on multi GPU platform.
  DRI2: Fix amdgpu_dri2_exchange_buffers width/height copy'n'paste er=
ror

Ronie Salgado (1):
  Add SI PCI IDs

git tag: xf86-video-amdgpu-1.1.1

http://xorg.freedesktop.org/archive/individual/driver/xf86-video-amdgpu-1=
=2E1.1.tar.bz2
MD5:  8b2e2852299b330da709d0526b2b8134  xf86-video-amdgpu-1.1.1.tar.bz2
SHA1: 402df5fa62631e7e049261bc29cdc0eb5febe119  xf86-video-amdgpu-1.1.1.t=
ar.bz2
SHA256: b6dfe5fb2a9bba5048135c75a507827bc887ac0790214d62b28c47f22fdd238f =
 xf86-video-amdgpu-1.1.1.tar.bz2
PGP:  http://xorg.freedesktop.org/archive/individual/driver/xf86-video-am=
dgpu-1.1.1.tar.bz2.sig

http://xorg.freedesktop.org/archive/individual/driver/xf86-video-amdgpu-1=
=2E1.1.tar.gz
MD5:  23e39d8586fb89da3e606ebbc2f8e911  xf86-video-amdgpu-1.1.1.tar.gz
SHA1: 1acf7e7ead43e69b9122e9bb25b95a734cf3ace3  xf86-video-amdgpu-1.1.1.t=
ar.gz
SHA256: 40dec655b7f9385d08fd648c359eff63012bfacc16397590ad2f9682e1e4527c =
 xf86-video-amdgpu-1.1.1.tar.gz
PGP:  http://xorg.freedesktop.org/archive/individual/driver/xf86-video-am=
dgpu-1.1.1.tar.gz.sig


--=20
Earthling Michel D=C3=A4nzer   |   http://www.amd=
=2Ecom
Libre software enthusiast | Mesa and X developer

Re: libdrm/amdgpu - Fixup typedef not to hide pointer type

Am 16.09.2016 um 11:02 schrieb Edward O'Callaghan:

Hi Christian,

On 09/16/2016 06:49 PM, Christian König wrote:

NAK, that is clearly an API breakage.

It should have never been typedef'ed in the first place. Does that mean
we would have to bump version for API change? What is the procedure there?

Keep it as it is, you can't change it even if we bump the version number
you would break existing userspace.

BTW: Why would we want to stop hiding the type?

Quite a few reasons, I'll start with to justify the change:

https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/CodingStyle?id=refs/tags/v4.8-rc6#n276

This doesn't apply here, this is a user space library interface and not
the kernel.

The structure types are not defined outside of the library and so you
can't dereference or NULL check them.

Regards,
Christian.

Suppose you have 'amdgpu_semaphore_handle' as typedef of a pointer type
and you had some function 'void f(amdgpu_semaphore_handle * h) {}'.
Suppose now, within 'f()' we deference 'h' and use the result in some
way. The issue is that it is not directly obvious that we have a double
pointer type and so while it maybe the case that '(*h != NULL)' it could
well be the case that '(h == NULL)'.

Kind Regards,
Edward.

Christian.

Am 16.09.2016 um 10:46 schrieb Edward O'Callaghan:

Oops, turns out I mailed to dri-devel by mistake so resending here.

The following series fixes up libdrm/amdgpu such that to not hide
a pointer type behind a typedef.

Please Review,

Edward O'Callaghan (3):
[PATCH 1/3] amdgpu: Fix amdgpu_va_handle typedef not to hide pointer
[PATCH 2/3] amdgpu: Fix amdgpu_semaphore_handle typedef not to hide
[PATCH 3/3] amdgpu: Fix amdgpu_bo_list_handle typedef not to hide
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Re: libdrm/amdgpu - Fixup typedef not to hide pointer type

Hi Christian,

On 09/16/2016 06:49 PM, Christian König wrote:
> NAK, that is clearly an API breakage.

It should have never been typedef'ed in the first place. Does that mean
we would have to bump version for API change? What is the procedure there?

> 
> BTW: Why would we want to stop hiding the type?

Quite a few reasons, I'll start with to justify the change:

https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/CodingStyle?id=refs/tags/v4.8-rc6#n276

Suppose you have 'amdgpu_semaphore_handle' as typedef of a pointer type
and you had some function 'void f(amdgpu_semaphore_handle * h) {}'.
Suppose now, within 'f()' we deference 'h' and use the result in some
way. The issue is that it is not directly obvious that we have a double
pointer type and so while it maybe the case that '(*h != NULL)' it could
well be the case that '(h == NULL)'.

Kind Regards,
Edward.

> 
> Christian.
> 
> Am 16.09.2016 um 10:46 schrieb Edward O'Callaghan:
>> Oops, turns out I mailed to dri-devel by mistake so resending here.
>>
>> The following series fixes up libdrm/amdgpu such that to not hide
>> a pointer type behind a typedef.
>>
>> Please Review,
>>
>> Edward O'Callaghan (3):
>>   [PATCH 1/3] amdgpu: Fix amdgpu_va_handle typedef not to hide pointer
>>   [PATCH 2/3] amdgpu: Fix amdgpu_semaphore_handle typedef not to hide
>>   [PATCH 3/3] amdgpu: Fix amdgpu_bo_list_handle typedef not to hide
>> ___
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> 
> 

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Re: libdrm/amdgpu - Fixup typedef not to hide pointer type


NAK, that is clearly an API breakage.

BTW: Why would we want to stop hiding the type?

Christian.

Am 16.09.2016 um 10:46 schrieb Edward O'Callaghan:

Oops, turns out I mailed to dri-devel by mistake so resending here.

The following series fixes up libdrm/amdgpu such that to not hide
a pointer type behind a typedef.

Please Review,

Edward O'Callaghan (3):
  [PATCH 1/3] amdgpu: Fix amdgpu_va_handle typedef not to hide pointer
  [PATCH 2/3] amdgpu: Fix amdgpu_semaphore_handle typedef not to hide
  [PATCH 3/3] amdgpu: Fix amdgpu_bo_list_handle typedef not to hide
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[PATCH 2/3] amdgpu: Fix amdgpu_semaphore_handle typedef not to hide pointer type

Signed-off-by: Edward O'Callaghan 
---
 amdgpu/amdgpu.h| 10 +-
 amdgpu/amdgpu_cs.c | 20 ++--
 tests/amdgpu/basic_tests.c |  2 +-
 3 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index f322497..9332fab 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -127,7 +127,7 @@ typedef struct amdgpu_va amdgpu_va_handle_t;
 /**
  * Define handle for semaphore
  */
-typedef struct amdgpu_semaphore *amdgpu_semaphore_handle;
+typedef struct amdgpu_semaphore amdgpu_semaphore_handle_t;
 
 /*--*/
 /* -- Structures -- */
@@ -1194,7 +1194,7 @@ int amdgpu_bo_va_op(amdgpu_bo_handle bo,
  *  <0 - Negative POSIX Error code
  *
 */
-int amdgpu_cs_create_semaphore(amdgpu_semaphore_handle *sem);
+int amdgpu_cs_create_semaphore(amdgpu_semaphore_handle_t ** sem);
 
 /**
  *  signal semaphore
@@ -1213,7 +1213,7 @@ int amdgpu_cs_signal_semaphore(amdgpu_context_handle ctx,
   uint32_t ip_type,
   uint32_t ip_instance,
   uint32_t ring,
-  amdgpu_semaphore_handle sem);
+  amdgpu_semaphore_handle_t * sem);
 
 /**
  *  wait semaphore
@@ -1232,7 +1232,7 @@ int amdgpu_cs_wait_semaphore(amdgpu_context_handle ctx,
 uint32_t ip_type,
 uint32_t ip_instance,
 uint32_t ring,
-amdgpu_semaphore_handle sem);
+amdgpu_semaphore_handle_t * sem);
 
 /**
  *  destroy semaphore
@@ -1243,6 +1243,6 @@ int amdgpu_cs_wait_semaphore(amdgpu_context_handle ctx,
  *  <0 - Negative POSIX Error code
  *
 */
-int amdgpu_cs_destroy_semaphore(amdgpu_semaphore_handle sem);
+int amdgpu_cs_destroy_semaphore(amdgpu_semaphore_handle_t * sem);
 
 #endif /* #ifdef _AMDGPU_H_ */
diff --git a/amdgpu/amdgpu_cs.c b/amdgpu/amdgpu_cs.c
index fb5b3a8..c72825a 100644
--- a/amdgpu/amdgpu_cs.c
+++ b/amdgpu/amdgpu_cs.c
@@ -40,8 +40,8 @@
 #include "amdgpu_drm.h"
 #include "amdgpu_internal.h"
 
-static int amdgpu_cs_unreference_sem(amdgpu_semaphore_handle sem);
-static int amdgpu_cs_reset_sem(amdgpu_semaphore_handle sem);
+static int amdgpu_cs_unreference_sem(amdgpu_semaphore_handle_t * sem);
+static int amdgpu_cs_reset_sem(amdgpu_semaphore_handle_t * sem);
 
 /**
  * Create command submission context
@@ -124,7 +124,7 @@ int amdgpu_cs_ctx_free(amdgpu_context_handle context)
for (i = 0; i < AMDGPU_HW_IP_NUM; i++) {
for (j = 0; j < AMDGPU_HW_IP_INSTANCE_MAX_COUNT; j++) {
for (k = 0; k < AMDGPU_CS_MAX_RINGS; k++) {
-   amdgpu_semaphore_handle sem;
+   amdgpu_semaphore_handle_t * sem;
LIST_FOR_EACH_ENTRY(sem, 
>sem_list[i][j][k], list) {
list_del(>list);
amdgpu_cs_reset_sem(sem);
@@ -179,7 +179,7 @@ static int amdgpu_cs_submit_one(amdgpu_context_handle 
context,
struct drm_amdgpu_cs_chunk_dep *dependencies = NULL;
struct drm_amdgpu_cs_chunk_dep *sem_dependencies = NULL;
struct list_head *sem_list;
-   amdgpu_semaphore_handle sem, tmp;
+   amdgpu_semaphore_handle_t * sem, * tmp;
uint32_t i, size, sem_count = 0;
bool user_fence;
int r = 0;
@@ -443,7 +443,7 @@ int amdgpu_cs_query_fence_status(struct amdgpu_cs_fence 
*fence,
return r;
 }
 
-int amdgpu_cs_create_semaphore(amdgpu_semaphore_handle *sem)
+int amdgpu_cs_create_semaphore(amdgpu_semaphore_handle_t ** sem)
 {
struct amdgpu_semaphore *gpu_semaphore;
 
@@ -464,7 +464,7 @@ int amdgpu_cs_signal_semaphore(amdgpu_context_handle ctx,
   uint32_t ip_type,
   uint32_t ip_instance,
   uint32_t ring,
-  amdgpu_semaphore_handle sem)
+  amdgpu_semaphore_handle_t * sem)
 {
if (NULL == ctx)
return -EINVAL;
@@ -492,7 +492,7 @@ int amdgpu_cs_wait_semaphore(amdgpu_context_handle ctx,
 uint32_t ip_type,
 uint32_t ip_instance,
 uint32_t ring,
-amdgpu_semaphore_handle sem)
+amdgpu_semaphore_handle_t * sem)
 {
if (NULL == ctx)
return -EINVAL;
@@ -512,7 +512,7 @@ int amdgpu_cs_wait_semaphore(amdgpu_context_handle ctx,
return 0;
 }
 
-static int amdgpu_cs_reset_sem(amdgpu_semaphore_handle sem)
+static int amdgpu_cs_reset_sem(amdgpu_semaphore_handle_t * sem)
 {
if (NULL == sem)
return

[PATCH 3/3] amdgpu: Fix amdgpu_bo_list_handle typedef not to hide pointer type

Signed-off-by: Edward O'Callaghan 
---
 amdgpu/amdgpu.h| 10 +-
 amdgpu/amdgpu_bo.c |  6 +++---
 tests/amdgpu/amdgpu_test.h |  2 +-
 tests/amdgpu/basic_tests.c |  8 
 4 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 9332fab..77ddb87 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -117,7 +117,7 @@ typedef struct amdgpu_bo *amdgpu_bo_handle;
 /**
  * Define handle for list of BOs
  */
-typedef struct amdgpu_bo_list *amdgpu_bo_list_handle;
+typedef struct amdgpu_bo_list amdgpu_bo_list_handle_t;
 
 /**
  * Define handle to be used to work with VA allocated ranges
@@ -332,7 +332,7 @@ struct amdgpu_cs_request {
/**
 * List handle with resources used by this request.
 */
-   amdgpu_bo_list_handle resources;
+   amdgpu_bo_list_handle_t * resources;
 
/**
 * Number of dependencies this Command submission needs to
@@ -747,7 +747,7 @@ int amdgpu_bo_list_create(amdgpu_device_handle dev,
  uint32_t number_of_resources,
  amdgpu_bo_handle *resources,
  uint8_t *resource_prios,
- amdgpu_bo_list_handle *result);
+ amdgpu_bo_list_handle_t ** result);
 
 /**
  * Destroys a BO list handle.
@@ -759,7 +759,7 @@ int amdgpu_bo_list_create(amdgpu_device_handle dev,
  *
  * \sa amdgpu_bo_list_create()
 */
-int amdgpu_bo_list_destroy(amdgpu_bo_list_handle handle);
+int amdgpu_bo_list_destroy(amdgpu_bo_list_handle_t * handle);
 
 /**
  * Update resources for existing BO list
@@ -774,7 +774,7 @@ int amdgpu_bo_list_destroy(amdgpu_bo_list_handle handle);
  *
  * \sa amdgpu_bo_list_update()
 */
-int amdgpu_bo_list_update(amdgpu_bo_list_handle handle,
+int amdgpu_bo_list_update(amdgpu_bo_list_handle_t * handle,
  uint32_t number_of_resources,
  amdgpu_bo_handle *resources,
  uint8_t *resource_prios);
diff --git a/amdgpu/amdgpu_bo.c b/amdgpu/amdgpu_bo.c
index d30fd1e..e57e733 100644
--- a/amdgpu/amdgpu_bo.c
+++ b/amdgpu/amdgpu_bo.c
@@ -565,7 +565,7 @@ int amdgpu_bo_list_create(amdgpu_device_handle dev,
  uint32_t number_of_resources,
  amdgpu_bo_handle *resources,
  uint8_t *resource_prios,
- amdgpu_bo_list_handle *result)
+ amdgpu_bo_list_handle_t ** result)
 {
struct drm_amdgpu_bo_list_entry *list;
union drm_amdgpu_bo_list args;
@@ -616,7 +616,7 @@ int amdgpu_bo_list_create(amdgpu_device_handle dev,
return 0;
 }
 
-int amdgpu_bo_list_destroy(amdgpu_bo_list_handle list)
+int amdgpu_bo_list_destroy(amdgpu_bo_list_handle_t * list)
 {
union drm_amdgpu_bo_list args;
int r;
@@ -634,7 +634,7 @@ int amdgpu_bo_list_destroy(amdgpu_bo_list_handle list)
return r;
 }
 
-int amdgpu_bo_list_update(amdgpu_bo_list_handle handle,
+int amdgpu_bo_list_update(amdgpu_bo_list_handle_t * handle,
  uint32_t number_of_resources,
  amdgpu_bo_handle *resources,
  uint8_t *resource_prios)
diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h
index acf3359..d4f1873 100644
--- a/tests/amdgpu/amdgpu_test.h
+++ b/tests/amdgpu/amdgpu_test.h
@@ -226,7 +226,7 @@ amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo, 
amdgpu_va_handle_t * va_handle,
 
 static inline int
 amdgpu_get_bo_list(amdgpu_device_handle dev, amdgpu_bo_handle bo1,
-  amdgpu_bo_handle bo2, amdgpu_bo_list_handle *list)
+  amdgpu_bo_handle bo2, amdgpu_bo_list_handle_t ** list)
 {
amdgpu_bo_handle resources[] = {bo1, bo2};
 
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index 7838249..509154c 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -292,7 +292,7 @@ static void amdgpu_command_submission_gfx_separate_ibs(void)
struct amdgpu_cs_fence fence_status = {0};
uint32_t *ptr;
uint32_t expired;
-   amdgpu_bo_list_handle bo_list;
+   amdgpu_bo_list_handle_t * bo_list;
amdgpu_va_handle_t * va_handle, va_handle_ce;
int r;
 
@@ -381,7 +381,7 @@ static void amdgpu_command_submission_gfx_shared_ib(void)
struct amdgpu_cs_fence fence_status = {0};
uint32_t *ptr;
uint32_t expired;
-   amdgpu_bo_list_handle bo_list;
+   amdgpu_bo_list_handle_t * bo_list;
amdgpu_va_handle_t * va_handle;
int r;
 
@@ -488,7 +488,7 @@ static void amdgpu_semaphore_test(void)
struct amdgpu_cs_fence fence_status = {0};
uint32_t *ptr;
uint32_t expired;
-   amdgpu_bo_list_handle bo_list[2];
+   amdgpu_bo_list_handle_t * bo_list[2];
amdgpu_va_handle_t * va_handle[2];
int r, i;
 
@@ -618,7 +618,7 @@ static void

libdrm/amdgpu - Fixup typedef not to hide pointer type

Oops, turns out I mailed to dri-devel by mistake so resending here.

The following series fixes up libdrm/amdgpu such that to not hide
a pointer type behind a typedef.

Please Review,

Edward O'Callaghan (3):
 [PATCH 1/3] amdgpu: Fix amdgpu_va_handle typedef not to hide pointer
 [PATCH 2/3] amdgpu: Fix amdgpu_semaphore_handle typedef not to hide
 [PATCH 3/3] amdgpu: Fix amdgpu_bo_list_handle typedef not to hide
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[PATCH 1/3] amdgpu: Fix amdgpu_va_handle typedef not to hide pointer type

Fundamentally this change stops us hiding the following pointer
type behind a typedef:

 -typedef struct amdgpu_va *amdgpu_va_handle;
 +typedef struct amdgpu_va amdgpu_va_handle_t;

Signed-off-by: Edward O'Callaghan 
---
 amdgpu/amdgpu.h|  6 +++---
 amdgpu/amdgpu_vamgr.c  |  4 ++--
 tests/amdgpu/amdgpu_test.h | 10 +-
 tests/amdgpu/basic_tests.c | 20 ++--
 tests/amdgpu/bo_tests.c|  2 +-
 tests/amdgpu/cs_tests.c| 10 +-
 tests/amdgpu/vce_tests.c   |  6 +++---
 7 files changed, 29 insertions(+), 29 deletions(-)

diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 5d5a2c6..f322497 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -122,7 +122,7 @@ typedef struct amdgpu_bo_list *amdgpu_bo_list_handle;
 /**
  * Define handle to be used to work with VA allocated ranges
  */
-typedef struct amdgpu_va *amdgpu_va_handle;
+typedef struct amdgpu_va amdgpu_va_handle_t;
 
 /**
  * Define handle for semaphore
@@ -1126,7 +1126,7 @@ int amdgpu_va_range_alloc(amdgpu_device_handle dev,
   uint64_t va_base_alignment,
   uint64_t va_base_required,
   uint64_t *va_base_allocated,
-  amdgpu_va_handle *va_range_handle,
+  amdgpu_va_handle_t ** va_range_handle,
   uint64_t flags);
 
 /**
@@ -1140,7 +1140,7 @@ int amdgpu_va_range_alloc(amdgpu_device_handle dev,
  * <0 - Negative POSIX Error code
  *
 */
-int amdgpu_va_range_free(amdgpu_va_handle va_range_handle);
+int amdgpu_va_range_free(amdgpu_va_handle_t * va_range_handle);
 
 /**
 * Query virtual address range
diff --git a/amdgpu/amdgpu_vamgr.c b/amdgpu/amdgpu_vamgr.c
index 8a707cb..7fae7cf 100644
--- a/amdgpu/amdgpu_vamgr.c
+++ b/amdgpu/amdgpu_vamgr.c
@@ -230,7 +230,7 @@ int amdgpu_va_range_alloc(amdgpu_device_handle dev,
  uint64_t va_base_alignment,
  uint64_t va_base_required,
  uint64_t *va_base_allocated,
- amdgpu_va_handle *va_range_handle,
+ amdgpu_va_handle_t ** va_range_handle,
  uint64_t flags)
 {
struct amdgpu_bo_va_mgr *vamgr;
@@ -274,7 +274,7 @@ int amdgpu_va_range_alloc(amdgpu_device_handle dev,
return 0;
 }
 
-int amdgpu_va_range_free(amdgpu_va_handle va_range_handle)
+int amdgpu_va_range_free(amdgpu_va_handle_t * va_range_handle)
 {
if(!va_range_handle || !va_range_handle->address)
return 0;
diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h
index fca92ad..acf3359 100644
--- a/tests/amdgpu/amdgpu_test.h
+++ b/tests/amdgpu/amdgpu_test.h
@@ -111,7 +111,7 @@ static inline amdgpu_bo_handle gpu_mem_alloc(
uint32_t type,
uint64_t flags,
uint64_t *vmc_addr,
-   amdgpu_va_handle *va_handle)
+   amdgpu_va_handle_t ** va_handle)
 {
struct amdgpu_bo_alloc_request req = {0};
amdgpu_bo_handle buf_handle;
@@ -140,7 +140,7 @@ static inline amdgpu_bo_handle gpu_mem_alloc(
 }
 
 static inline int gpu_mem_free(amdgpu_bo_handle bo,
-  amdgpu_va_handle va_handle,
+  amdgpu_va_handle_t * va_handle,
   uint64_t vmc_addr,
   uint64_t size)
 {
@@ -162,11 +162,11 @@ static inline int
 amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size,
unsigned alignment, unsigned heap, uint64_t flags,
amdgpu_bo_handle *bo, void **cpu, uint64_t *mc_address,
-   amdgpu_va_handle *va_handle)
+   amdgpu_va_handle_t ** va_handle)
 {
struct amdgpu_bo_alloc_request request = {};
amdgpu_bo_handle buf_handle;
-   amdgpu_va_handle handle;
+   amdgpu_va_handle_t * handle;
uint64_t vmc_addr;
int r;
 
@@ -212,7 +212,7 @@ error_va_alloc:
 }
 
 static inline int
-amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo, amdgpu_va_handle va_handle,
+amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo, amdgpu_va_handle_t * va_handle,
 uint64_t mc_addr, uint64_t size)
 {
amdgpu_bo_cpu_unmap(bo);
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index 11f6a63..40e9ef1 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -237,7 +237,7 @@ static void amdgpu_query_info_test(void)
 static void amdgpu_memory_alloc(void)
 {
amdgpu_bo_handle bo;
-   amdgpu_va_handle va_handle;
+   amdgpu_va_handle_t * va_handle;
uint64_t bo_mc;
int r;
 
@@ -293,7 +293,7 @@ static void amdgpu_command_submission_gfx_separate_ibs(void)
uint32_t *ptr;
uint32_t

Re: [PATCH 2/5] drm/amdgpu: fix a bunch of coding style issues in amdgpu_ttm.c


Am 16.09.2016 um 04:17 schrieb Michel Dänzer:

On 15/09/16 10:10 PM, Christian König wrote:

From: Christian König 

No intented functional change.

Signed-off-by: Christian König 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 65 +
  1 file changed, 42 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 428ffb6..1965209 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -214,9 +214,11 @@ static void amdgpu_evict_flags(struct ttm_buffer_object 
*bo,
switch (bo->mem.mem_type) {
case TTM_PL_VRAM:
if (rbo->adev->mman.buffer_funcs_ring->ready == false) {
-   amdgpu_ttm_placement_from_domain(rbo, 
AMDGPU_GEM_DOMAIN_CPU);
+   amdgpu_ttm_placement_from_domain(rbo,
+AMDGPU_GEM_DOMAIN_CPU);
} else {
-   amdgpu_ttm_placement_from_domain(rbo, 
AMDGPU_GEM_DOMAIN_GTT);
+   amdgpu_ttm_placement_from_domain(rbo,
+AMDGPU_GEM_DOMAIN_GTT);

I don't see the point of this kind of change. We save all of 5 columns
of horizontal space, but for that we reduce readability by breaking up a
single line statement to multiple lines.

It makes more sense when saving a more significant amount of horizontal
space or when the statement already spans multiple lines though.



I was mostly just following what the auto formatter suggested, but now 
that you say it it's probably not such a good idea in some cases.


Should I just drop those two patches or just fix what Alex and you have 
noted and send them again? Some of the changes still seem to make sense 
to me.


Regards,
Christain.
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Re: [PATCH 1/3] drm/amdgpu/gfx6: drop duplicate code

This series is,
Reviewed-by: Edward O'Callaghan 

P.S., keep these hedge cuttings coming!

On 09/16/2016 05:55 AM, Alex Deucher wrote:
> The compute functions just called the gfx functions, drop
> the wrapper.
> 
> Signed-off-by: Alex Deucher 
> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 33 +
>  1 file changed, 9 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> index 9697994..3cf4e9e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> @@ -1324,8 +1324,8 @@ static void gfx_v6_0_ring_emit_hdp_invalidate(struct 
> amdgpu_ring *ring)
>   amdgpu_ring_write(ring, 0x1);
>  }
>  
> -static void gfx_v6_0_ring_emit_fence_gfx(struct amdgpu_ring *ring, u64 addr,
> -  u64 seq, unsigned flags)
> +static void gfx_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
> +  u64 seq, unsigned flags)
>  {
>   bool write64bit = flags & AMDGPU_FENCE_FLAG_64BIT;
>   bool int_sel = flags & AMDGPU_FENCE_FLAG_INT;
> @@ -1351,17 +1351,9 @@ static void gfx_v6_0_ring_emit_fence_gfx(struct 
> amdgpu_ring *ring, u64 addr,
>   amdgpu_ring_write(ring, upper_32_bits(seq));
>  }
>  
> -static void gfx_v6_0_ring_emit_fence_compute(struct amdgpu_ring *ring,
> -  u64 addr, u64 seq,
> -  unsigned flags)
> -{
> - gfx_v6_0_ring_emit_fence_gfx(ring, addr, seq, flags);
> -}
> -
> -
> -static void gfx_v6_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
> -   struct amdgpu_ib *ib,
> -   unsigned vm_id, bool ctx_switch)
> +static void gfx_v6_0_ring_emit_ib(struct amdgpu_ring *ring,
> +   struct amdgpu_ib *ib,
> +   unsigned vm_id, bool ctx_switch)
>  {
>   u32 header, control = 0;
>  
> @@ -1388,13 +1380,6 @@ static void gfx_v6_0_ring_emit_ib_gfx(struct 
> amdgpu_ring *ring,
>   amdgpu_ring_write(ring, control);
>  }
>  
> -static void gfx_v6_0_ring_emit_ib_compute(struct amdgpu_ring *ring,
> -   struct amdgpu_ib *ib,
> -   unsigned vm_id, bool ctx_switch)
> -{
> - gfx_v6_0_ring_emit_ib_gfx(ring, ib, vm_id, ctx_switch);
> -}
> -
>  /**
>   * gfx_v6_0_ring_test_ib - basic ring IB test
>   *
> @@ -3119,8 +3104,8 @@ static const struct amdgpu_ring_funcs 
> gfx_v6_0_ring_funcs_gfx = {
>   .get_wptr = gfx_v6_0_ring_get_wptr,
>   .set_wptr = gfx_v6_0_ring_set_wptr_gfx,
>   .parse_cs = NULL,
> - .emit_ib = gfx_v6_0_ring_emit_ib_gfx,
> - .emit_fence = gfx_v6_0_ring_emit_fence_gfx,
> + .emit_ib = gfx_v6_0_ring_emit_ib,
> + .emit_fence = gfx_v6_0_ring_emit_fence,
>   .emit_pipeline_sync = gfx_v6_0_ring_emit_pipeline_sync,
>   .emit_vm_flush = gfx_v6_0_ring_emit_vm_flush,
>   .emit_gds_switch = gfx_v6_0_ring_emit_gds_switch,
> @@ -3136,8 +3121,8 @@ static const struct amdgpu_ring_funcs 
> gfx_v6_0_ring_funcs_compute = {
>   .get_wptr = gfx_v6_0_ring_get_wptr,
>   .set_wptr = gfx_v6_0_ring_set_wptr_compute,
>   .parse_cs = NULL,
> - .emit_ib = gfx_v6_0_ring_emit_ib_compute,
> - .emit_fence = gfx_v6_0_ring_emit_fence_compute,
> + .emit_ib = gfx_v6_0_ring_emit_ib,
> + .emit_fence = gfx_v6_0_ring_emit_fence,
>   .emit_pipeline_sync = gfx_v6_0_ring_emit_pipeline_sync,
>   .emit_vm_flush = gfx_v6_0_ring_emit_vm_flush,
>   .emit_gds_switch = gfx_v6_0_ring_emit_gds_switch,
> 



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[PATCH xf86-video-amdgpu] Untangle HAS_XORG_CONF_DIR / --with-xorg-conf-dir lines in configure.ac

2016-09-16 Thread Michel Dänzer

From: Michel Dänzer 

$sysconfigdir used to be part of the default --with-xorg-conf-dir value,
but it no longer is.

Signed-off-by: Michel Dänzer 
---
 configure.ac | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/configure.ac b/configure.ac
index 68e1feb..c3af085 100644
--- a/configure.ac
+++ b/configure.ac
@@ -82,18 +82,19 @@ PKG_CHECK_MODULES(XEXT, [xextproto >= 7.0.99.1],
   HAVE_XEXTPROTO_71="no")
 AM_CONDITIONAL(HAVE_XEXTPROTO_71, [ test "$HAVE_XEXTPROTO_71" = "yes" ])
 
-# Define a configure option for an alternate X Server configuration directory
 # Section "OutputClass" is only supported as of xserver 1.16
 PKG_CHECK_EXISTS([xorg-server >= 1.16],
 [sysconfigdir=`$PKG_CONFIG --variable=sysconfigdir 
xorg-server`],
 [sysconfigdir=""])
+AM_CONDITIONAL(HAS_XORG_CONF_DIR, [test "x$sysconfigdir" != "x"])
+
+# Define a configure option for an alternate X Server configuration directory
 AC_ARG_WITH(xorg-conf-dir,
 AS_HELP_STRING([--with-xorg-conf-dir=DIR],
[Default xorg.conf.d directory 
[[default=${prefix}/share/X11/xorg.conf.d]]]),
 [configdir="$withval"],
 [configdir='${prefix}/share/X11/xorg.conf.d'])
 AC_SUBST(configdir)
-AM_CONDITIONAL(HAS_XORG_CONF_DIR, [test "x$sysconfigdir" != "x"])
 
 AC_ARG_ENABLE([udev],
AS_HELP_STRING([--disable-udev], [Disable libudev support 
[default=auto]]),
-- 
2.9.3

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Re: [PATCH] drm/amdgpu/sdma3: drop unused functions


Am 15.09.2016 um 22:30 schrieb Alex Deucher:

These are not used yet.

Signed-off-by: Alex Deucher 


Reviewed-by: Christian König .


---
  drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 25 -
  1 file changed, 25 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 
b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index bee4978..cabb9fe 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
@@ -499,31 +499,6 @@ static void sdma_v3_0_ring_emit_fence(struct amdgpu_ring 
*ring, u64 addr, u64 se
amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));
  }
  
-unsigned init_cond_exec(struct amdgpu_ring *ring)

-{
-   unsigned ret;
-   amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_COND_EXE));
-   amdgpu_ring_write(ring, lower_32_bits(ring->cond_exe_gpu_addr));
-   amdgpu_ring_write(ring, upper_32_bits(ring->cond_exe_gpu_addr));
-   amdgpu_ring_write(ring, 1);
-   ret = ring->wptr;/* this is the offset we need patch later */
-   amdgpu_ring_write(ring, 0x55aa55aa);/* insert dummy here and patch it 
later */
-   return ret;
-}
-
-void patch_cond_exec(struct amdgpu_ring *ring, unsigned offset)
-{
-   unsigned cur;
-   BUG_ON(ring->ring[offset] != 0x55aa55aa);
-
-   cur = ring->wptr - 1;
-   if (likely(cur > offset))
-   ring->ring[offset] = cur - offset;
-   else
-   ring->ring[offset] = (ring->ring_size>>2) - offset + cur;
-}
-
-
  /**
   * sdma_v3_0_gfx_stop - stop the gfx async dma engines
   *



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Re: [PATCH 1/3] drm/amdgpu/gfx6: drop duplicate code