RE: drm/amd/powerplay: expose max engine and memory clock info for powerplay enabled case
I don't know if we need to add a cgs call to fill in the max_clock_voltage_limits structure. That's mostly just leftover from radeon. A better solution would be use the existing amdgpu_dpm_get_sclk and amdgpu_dpm_get_mclk macros. Maybe something like the attached patch? Unless there is a specific need for the max clocks on AC. I think in most cases the results will be the same. Alex From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Quan, Evan Sent: Wednesday, October 12, 2016 1:53 AM To: amd-gfx@lists.freedesktop.org Cc: Zhang, Jerry; Huan, Alvin; Quan, Evan; Huang, Ray Subject: drm/amd/powerplay: expose max engine and memory clock info for powerplay enabled case Hi All, We found the max engine clock and max memory clock are both wrongly reported as 0(by AMDGPU_INFO_DEV_INFO ioctl). The attached patch tries to fix it. Please help to review it. Any comment is welcomed. Regards, Evan 0001-drm-amdgpu-fix-reported-mclk-and-sclk-for-powerplay-.patch Description: 0001-drm-amdgpu-fix-reported-mclk-and-sclk-for-powerplay-.patch ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 7/8] drm/amdgpu/powerplay: add an implementation for get_vce_clock_state (v3)
Used by the powerplay dpm code.
v2: update to the new API
v3: drop old include
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index bb8a345..0b1f220 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -821,6 +821,21 @@ static int pp_dpm_read_sensor(void *handle, int idx,
int32_t *value)
return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value);
}
+static struct amd_vce_state*
+pp_dpm_get_vce_clock_state(void *handle, unsigned idx)
+{
+ struct pp_hwmgr *hwmgr;
+
+ if (handle) {
+ hwmgr = ((struct pp_instance *)handle)->hwmgr;
+
+ if (hwmgr && idx < hwmgr->num_vce_state_tables)
+ return &hwmgr->vce_states[idx];
+ }
+
+ return NULL;
+}
+
const struct amd_powerplay_funcs pp_dpm_funcs = {
.get_temperature = pp_dpm_get_temperature,
.load_firmware = pp_dpm_load_fw,
@@ -847,6 +862,7 @@ const struct amd_powerplay_funcs pp_dpm_funcs = {
.get_mclk_od = pp_dpm_get_mclk_od,
.set_mclk_od = pp_dpm_set_mclk_od,
.read_sensor = pp_dpm_read_sensor,
+ .get_vce_clock_state = pp_dpm_get_vce_clock_state,
};
static int amd_pp_instance_init(struct amd_pp_init *pp_init,
--
2.5.5
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[PATCH 6/8] drm/amdgpu/dpm: add an implementation for get_vce_clock_state (v2)
Used by the non-powerplay dpm code.
v2: update to the new API
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c | 9 +
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 3 +++
drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 1 +
drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 1 +
drivers/gpu/drm/amd/amdgpu/si_dpm.c | 1 +
5 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
index 009ccb9..6ca0333 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
@@ -956,3 +956,12 @@ u8 amdgpu_encode_pci_lane_width(u32 lanes)
return encoded_lanes[lanes];
}
+
+struct amd_vce_state*
+amdgpu_get_vce_clock_state(struct amdgpu_device *adev, unsigned idx)
+{
+ if (idx < adev->pm.dpm.num_of_vce_states)
+ return &adev->pm.dpm.vce_states[idx];
+
+ return NULL;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
index fdcf968..4f25c03 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
@@ -513,4 +513,7 @@ u16 amdgpu_get_pcie_lane_support(struct amdgpu_device *adev,
u16 default_lanes);
u8 amdgpu_encode_pci_lane_width(u32 lanes);
+struct amd_vce_state*
+amdgpu_get_vce_clock_state(struct amdgpu_device *adev, unsigned idx);
+
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index fa939df..3f89107 100644
--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
@@ -6644,6 +6644,7 @@ static const struct amdgpu_dpm_funcs ci_dpm_funcs = {
.set_sclk_od = ci_dpm_set_sclk_od,
.get_mclk_od = ci_dpm_get_mclk_od,
.set_mclk_od = ci_dpm_set_mclk_od,
+ .get_vce_clock_state = amdgpu_get_vce_clock_state,
};
static void ci_dpm_set_dpm_funcs(struct amdgpu_device *adev)
diff --git a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
index b23f643..c3367d6 100644
--- a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
@@ -3273,6 +3273,7 @@ static const struct amdgpu_dpm_funcs kv_dpm_funcs = {
.force_performance_level = &kv_dpm_force_performance_level,
.powergate_uvd = &kv_dpm_powergate_uvd,
.enable_bapm = &kv_dpm_enable_bapm,
+ .get_vce_clock_state = amdgpu_get_vce_clock_state,
};
static void kv_dpm_set_dpm_funcs(struct amdgpu_device *adev)
diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
index a76a856..6efe0a8 100644
--- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
@@ -7985,6 +7985,7 @@ static const struct amdgpu_dpm_funcs si_dpm_funcs = {
.get_fan_control_mode = &si_dpm_get_fan_control_mode,
.set_fan_speed_percent = &si_dpm_set_fan_speed_percent,
.get_fan_speed_percent = &si_dpm_get_fan_speed_percent,
+ .get_vce_clock_state = amdgpu_get_vce_clock_state,
};
static void si_dpm_set_dpm_funcs(struct amdgpu_device *adev)
--
2.5.5
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[PATCH 3/8] drm/amdgpu: save number of vce states in dpm struct.
From: Rex Zhu
Signed-off-by: Rex Zhu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c | 7 ---
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 1 +
drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 2 +-
drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 2 +-
drivers/gpu/drm/amd/amdgpu/si_dpm.c | 2 +-
5 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
index 4f8d3a5..009ccb9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
@@ -553,9 +553,10 @@ int amdgpu_parse_extended_power_table(struct amdgpu_device
*adev)
entry =
(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record *)
((u8 *)entry +
sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record));
}
- for (i = 0; i < states->numEntries; i++) {
- if (i >= AMD_MAX_VCE_LEVELS)
- break;
+ adev->pm.dpm.num_of_vce_states =
+ states->numEntries > AMD_MAX_VCE_LEVELS
?
+ AMD_MAX_VCE_LEVELS : states->numEntries;
+ for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
vce_clk = (VCEClockInfo *)
((u8 *)&array->entries[0] +
(state_entry->ucVCEClockInfoIndex *
sizeof(VCEClockInfo)));
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
index 68dac0c..5097415 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
@@ -387,6 +387,7 @@ struct amdgpu_dpm {
/* default uvd power state */
struct amdgpu_ps*uvd_ps;
/* vce requirements */
+ u32 num_of_vce_states;
struct amd_vce_state vce_states[AMD_MAX_VCE_LEVELS];
enum amd_vce_level vce_level;
enum amd_pm_state_type state;
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index dc3196e..fa939df 100644
--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
@@ -5689,7 +5689,7 @@ static int ci_parse_power_table(struct amdgpu_device
*adev)
adev->pm.dpm.num_ps = state_array->ucNumEntries;
/* fill in the vce power states */
- for (i = 0; i < AMD_MAX_VCE_LEVELS; i++) {
+ for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
u32 sclk, mclk;
clock_array_index = adev->pm.dpm.vce_states[i].clk_idx;
clock_info = (union pplib_clock_info *)
diff --git a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
index a03690a..b23f643 100644
--- a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
@@ -2796,7 +2796,7 @@ static int kv_parse_power_table(struct amdgpu_device
*adev)
adev->pm.dpm.num_ps = state_array->ucNumEntries;
/* fill in the vce power states */
- for (i = 0; i < AMD_MAX_VCE_LEVELS; i++) {
+ for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
u32 sclk;
clock_array_index = adev->pm.dpm.vce_states[i].clk_idx;
clock_info = (union pplib_clock_info *)
diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
index 1a909fa..a76a856 100644
--- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
@@ -7314,7 +7314,7 @@ static int si_parse_power_table(struct amdgpu_device
*adev)
adev->pm.dpm.num_ps = state_array->ucNumEntries;
/* fill in the vce power states */
- for (i = 0; i < AMD_MAX_VCE_LEVELS; i++) {
+ for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
u32 sclk, mclk;
clock_array_index = adev->pm.dpm.vce_states[i].clk_idx;
clock_info = (union pplib_clock_info *)
--
2.5.5
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[PATCH 7/8] drm/amdgpu/powerplay: add an implementation for get_vce_clock_state (v2)
Used by the powerplay dpm code.
v2: update to the new API
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index bb8a345..ea3c3da 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -30,6 +30,7 @@
#include "power_state.h"
#include "eventmanager.h"
#include "pp_debug.h"
+#include "drm/amdgpu_drm.h"
#define PP_CHECK(handle) \
@@ -821,6 +822,21 @@ static int pp_dpm_read_sensor(void *handle, int idx,
int32_t *value)
return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value);
}
+static struct amd_vce_state*
+pp_dpm_get_vce_clock_state(void *handle, unsigned idx)
+{
+ struct pp_hwmgr *hwmgr;
+
+ if (handle) {
+ hwmgr = ((struct pp_instance *)handle)->hwmgr;
+
+ if (hwmgr && idx < hwmgr->num_vce_state_tables)
+ return &hwmgr->vce_states[idx];
+ }
+
+ return NULL;
+}
+
const struct amd_powerplay_funcs pp_dpm_funcs = {
.get_temperature = pp_dpm_get_temperature,
.load_firmware = pp_dpm_load_fw,
@@ -847,6 +863,7 @@ const struct amd_powerplay_funcs pp_dpm_funcs = {
.get_mclk_od = pp_dpm_get_mclk_od,
.set_mclk_od = pp_dpm_set_mclk_od,
.read_sensor = pp_dpm_read_sensor,
+ .get_vce_clock_state = pp_dpm_get_vce_clock_state,
};
static int amd_pp_instance_init(struct amd_pp_init *pp_init,
--
2.5.5
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[PATCH 4/8] drm/amdgpu: add info ioctl query for vce clock info (v3)
This is needed to set up the vce clock table in userspace
for proper VCE DPM.
v2: fix copy paste typo in comment
v3: track number of valid states
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
include/uapi/drm/amdgpu_drm.h | 20
1 file changed, 20 insertions(+)
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index b6a04d4..a03beb1 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -491,6 +491,8 @@ struct drm_amdgpu_cs_chunk_data {
#define AMDGPU_INFO_NUM_EVICTIONS 0x18
/* Query memory about VRAM and GTT domains */
#define AMDGPU_INFO_MEMORY 0x19
+/* Query vce clock table */
+#define AMDGPU_INFO_VCE_CLOCK_TABLE0x1A
#define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0
#define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff
@@ -677,6 +679,24 @@ struct drm_amdgpu_info_hw_ip {
__u32 _pad;
};
+#define AMDGPU_VCE_CLOCK_TABLE_ENTRIES 6
+
+struct drm_amdgpu_info_vce_clock_table_entry {
+ /** System clock */
+ __u32 sclk;
+ /** Memory clock */
+ __u32 mclk;
+ /** VCE clock */
+ __u32 eclk;
+ __u32 pad;
+};
+
+struct drm_amdgpu_info_vce_clock_table {
+ struct drm_amdgpu_info_vce_clock_table_entry
entries[AMDGPU_VCE_CLOCK_TABLE_ENTRIES];
+ __u32 num_valid_entries;
+ __u32 pad;
+};
+
/*
* Supported GPU families
*/
--
2.5.5
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[PATCH 8/8] drm/amdgpu: fill in vce clock info ioctl query (v2)
Returns the vce clock table for the user mode driver.
The user mode driver can fill this data into vce clock
data packet for optimal VCE DPM.
v2: update to the new API
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 1ecfe9a..3570124 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -524,6 +524,24 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void
*data, struct drm_file
return copy_to_user(out, &dev_info,
min((size_t)size, sizeof(dev_info))) ?
-EFAULT : 0;
}
+ case AMDGPU_INFO_VCE_CLOCK_TABLE: {
+ unsigned i;
+ struct drm_amdgpu_info_vce_clock_table vce_clk_table = {};
+ struct amd_vce_state *vce_state;
+
+ for (i = 0; i < AMDGPU_VCE_CLOCK_TABLE_ENTRIES; i++) {
+ vce_state = amdgpu_dpm_get_vce_clock_state(adev, i);
+ if (vce_state) {
+ vce_clk_table.entries[i].sclk = vce_state->sclk;
+ vce_clk_table.entries[i].mclk = vce_state->mclk;
+ vce_clk_table.entries[i].eclk =
vce_state->evclk;
+ vce_clk_table.num_valid_entries++;
+ }
+ }
+
+ return copy_to_user(out, &vce_clk_table,
+ min((size_t)size, sizeof(vce_clk_table))) ?
-EFAULT : 0;
+ }
default:
DRM_DEBUG_KMS("Invalid request %d\n", info->query);
return -EINVAL;
--
2.5.5
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[PATCH 1/8] drm/amdgpu: move dpm related definitions to amdgpu_dpm.h
No intended functional change.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 449 +---
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 447 +++
2 files changed, 448 insertions(+), 448 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index fa99c0d..e6f86b8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -57,6 +57,7 @@
#include "amdgpu_ring.h"
#include "amdgpu_vm.h"
#include "amd_powerplay.h"
+#include "amdgpu_dpm.h"
#include "amdgpu_acp.h"
#include "gpu_scheduler.h"
@@ -973,354 +974,6 @@ struct amdgpu_wb {
int amdgpu_wb_get(struct amdgpu_device *adev, u32 *wb);
void amdgpu_wb_free(struct amdgpu_device *adev, u32 wb);
-
-
-enum amdgpu_int_thermal_type {
- THERMAL_TYPE_NONE,
- THERMAL_TYPE_EXTERNAL,
- THERMAL_TYPE_EXTERNAL_GPIO,
- THERMAL_TYPE_RV6XX,
- THERMAL_TYPE_RV770,
- THERMAL_TYPE_ADT7473_WITH_INTERNAL,
- THERMAL_TYPE_EVERGREEN,
- THERMAL_TYPE_SUMO,
- THERMAL_TYPE_NI,
- THERMAL_TYPE_SI,
- THERMAL_TYPE_EMC2103_WITH_INTERNAL,
- THERMAL_TYPE_CI,
- THERMAL_TYPE_KV,
-};
-
-enum amdgpu_dpm_auto_throttle_src {
- AMDGPU_DPM_AUTO_THROTTLE_SRC_THERMAL,
- AMDGPU_DPM_AUTO_THROTTLE_SRC_EXTERNAL
-};
-
-enum amdgpu_dpm_event_src {
- AMDGPU_DPM_EVENT_SRC_ANALOG = 0,
- AMDGPU_DPM_EVENT_SRC_EXTERNAL = 1,
- AMDGPU_DPM_EVENT_SRC_DIGITAL = 2,
- AMDGPU_DPM_EVENT_SRC_ANALOG_OR_EXTERNAL = 3,
- AMDGPU_DPM_EVENT_SRC_DIGIAL_OR_EXTERNAL = 4
-};
-
-#define AMDGPU_MAX_VCE_LEVELS 6
-
-enum amdgpu_vce_level {
- AMDGPU_VCE_LEVEL_AC_ALL = 0, /* AC, All cases */
- AMDGPU_VCE_LEVEL_DC_EE = 1, /* DC, entropy encoding */
- AMDGPU_VCE_LEVEL_DC_LL_LOW = 2, /* DC, low latency queue, res <= 720 */
- AMDGPU_VCE_LEVEL_DC_LL_HIGH = 3, /* DC, low latency queue, 1080 >= res
> 720 */
- AMDGPU_VCE_LEVEL_DC_GP_LOW = 4, /* DC, general purpose queue, res <=
720 */
- AMDGPU_VCE_LEVEL_DC_GP_HIGH = 5, /* DC, general purpose queue, 1080 >=
res > 720 */
-};
-
-struct amdgpu_ps {
- u32 caps; /* vbios flags */
- u32 class; /* vbios flags */
- u32 class2; /* vbios flags */
- /* UVD clocks */
- u32 vclk;
- u32 dclk;
- /* VCE clocks */
- u32 evclk;
- u32 ecclk;
- bool vce_active;
- enum amdgpu_vce_level vce_level;
- /* asic priv */
- void *ps_priv;
-};
-
-struct amdgpu_dpm_thermal {
- /* thermal interrupt work */
- struct work_struct work;
- /* low temperature threshold */
- intmin_temp;
- /* high temperature threshold */
- intmax_temp;
- /* was last interrupt low to high or high to low */
- bool high_to_low;
- /* interrupt source */
- struct amdgpu_irq_src irq;
-};
-
-enum amdgpu_clk_action
-{
- AMDGPU_SCLK_UP = 1,
- AMDGPU_SCLK_DOWN
-};
-
-struct amdgpu_blacklist_clocks
-{
- u32 sclk;
- u32 mclk;
- enum amdgpu_clk_action action;
-};
-
-struct amdgpu_clock_and_voltage_limits {
- u32 sclk;
- u32 mclk;
- u16 vddc;
- u16 vddci;
-};
-
-struct amdgpu_clock_array {
- u32 count;
- u32 *values;
-};
-
-struct amdgpu_clock_voltage_dependency_entry {
- u32 clk;
- u16 v;
-};
-
-struct amdgpu_clock_voltage_dependency_table {
- u32 count;
- struct amdgpu_clock_voltage_dependency_entry *entries;
-};
-
-union amdgpu_cac_leakage_entry {
- struct {
- u16 vddc;
- u32 leakage;
- };
- struct {
- u16 vddc1;
- u16 vddc2;
- u16 vddc3;
- };
-};
-
-struct amdgpu_cac_leakage_table {
- u32 count;
- union amdgpu_cac_leakage_entry *entries;
-};
-
-struct amdgpu_phase_shedding_limits_entry {
- u16 voltage;
- u32 sclk;
- u32 mclk;
-};
-
-struct amdgpu_phase_shedding_limits_table {
- u32 count;
- struct amdgpu_phase_shedding_limits_entry *entries;
-};
-
-struct amdgpu_uvd_clock_voltage_dependency_entry {
- u32 vclk;
- u32 dclk;
- u16 v;
-};
-
-struct amdgpu_uvd_clock_voltage_dependency_table {
- u8 count;
- struct amdgpu_uvd_clock_voltage_dependency_entry *entries;
-};
-
-struct amdgpu_vce_clock_voltage_dependency_entry {
- u32 ecclk;
- u32 evclk;
- u16 v;
-};
-
-struct amdgpu_vce_clock_voltage_dependency_table {
- u8 count;
- struct amdgpu_vce_clock_voltage_dependency_entry *entries;
-};
-
-struct amdgpu_ppm_table {
- u8 ppm_design;
- u16 cpu_core_number;
- u32 platform_tdp;
- u32 small_ac_platform_tdp;
- u32 platform_tdc;
- u32 small_ac_platform_tdc;
- u32 apu_tdp;
- u32 dgpu_tdp;
- u32 dgpu_ul
[PATCH 5/8] drm/amdgpu/dpm: add new callback to fetch vce clock state (v2)
Will be used by the new info ioctl query.
v2: fetch a single state per request
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 5 +
drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
index 5097415..fdcf968 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
@@ -271,6 +271,7 @@ struct amdgpu_dpm_funcs {
int (*set_sclk_od)(struct amdgpu_device *adev, uint32_t value);
int (*get_mclk_od)(struct amdgpu_device *adev);
int (*set_mclk_od)(struct amdgpu_device *adev, uint32_t value);
+ struct amd_vce_state* (*get_vce_clock_state)(struct amdgpu_device
*adev, unsigned idx);
};
#define amdgpu_dpm_pre_set_power_state(adev)
(adev)->pm.funcs->pre_set_power_state((adev))
@@ -373,6 +374,10 @@ struct amdgpu_dpm_funcs {
#define amdgpu_dpm_dispatch_task(adev, event_id, input, output)
\
(adev)->powerplay.pp_funcs->dispatch_tasks((adev)->powerplay.pp_handle,
(event_id), (input), (output))
+#define amdgpu_dpm_get_vce_clock_state(adev, i)
\
+ ((adev)->pp_enabled ? \
+
(adev)->powerplay.pp_funcs->get_vce_clock_state((adev)->powerplay.pp_handle,
(i)) : \
+(adev)->pm.funcs->get_vce_clock_state((adev), (i)))
struct amdgpu_dpm {
struct amdgpu_ps*ps;
diff --git a/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h
b/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h
index 3fb5e57..eb3e83d 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h
@@ -359,6 +359,7 @@ struct amd_powerplay_funcs {
int (*get_mclk_od)(void *handle);
int (*set_mclk_od)(void *handle, uint32_t value);
int (*read_sensor)(void *handle, int idx, int32_t *value);
+ struct amd_vce_state* (*get_vce_clock_state)(void *handle, unsigned
idx);
};
struct amd_powerplay {
--
2.5.5
___
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[PATCH 2/8] drm/amdgpu: use same vce state definition in dpm and powerplay
From: Rex Zhu
Signed-off-by: Rex Zhu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h| 28 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 2 +-
drivers/gpu/drm/amd/amdgpu/ci_dpm.c| 2 +-
drivers/gpu/drm/amd/amdgpu/kv_dpm.c| 2 +-
drivers/gpu/drm/amd/amdgpu/si_dpm.c| 2 +-
drivers/gpu/drm/amd/include/amd_shared.h | 23 ++
.../amd/powerplay/hwmgr/process_pptables_v1_0.c| 4 ++--
.../gpu/drm/amd/powerplay/hwmgr/processpptables.c | 2 +-
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 16 ++---
drivers/gpu/drm/amd/powerplay/inc/power_state.h| 9 ---
11 files changed, 36 insertions(+), 56 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
index 14f57d9..4f8d3a5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
@@ -554,7 +554,7 @@ int amdgpu_parse_extended_power_table(struct amdgpu_device
*adev)
((u8 *)entry +
sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record));
}
for (i = 0; i < states->numEntries; i++) {
- if (i >= AMDGPU_MAX_VCE_LEVELS)
+ if (i >= AMD_MAX_VCE_LEVELS)
break;
vce_clk = (VCEClockInfo *)
((u8 *)&array->entries[0] +
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
index d06496d..68dac0c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
@@ -52,17 +52,6 @@ enum amdgpu_dpm_event_src {
AMDGPU_DPM_EVENT_SRC_DIGIAL_OR_EXTERNAL = 4
};
-#define AMDGPU_MAX_VCE_LEVELS 6
-
-enum amdgpu_vce_level {
- AMDGPU_VCE_LEVEL_AC_ALL = 0, /* AC, All cases */
- AMDGPU_VCE_LEVEL_DC_EE = 1, /* DC, entropy encoding */
- AMDGPU_VCE_LEVEL_DC_LL_LOW = 2, /* DC, low latency queue, res <= 720 */
- AMDGPU_VCE_LEVEL_DC_LL_HIGH = 3, /* DC, low latency queue, 1080 >= res
> 720 */
- AMDGPU_VCE_LEVEL_DC_GP_LOW = 4, /* DC, general purpose queue, res <=
720 */
- AMDGPU_VCE_LEVEL_DC_GP_HIGH = 5, /* DC, general purpose queue, 1080 >=
res > 720 */
-};
-
struct amdgpu_ps {
u32 caps; /* vbios flags */
u32 class; /* vbios flags */
@@ -74,7 +63,7 @@ struct amdgpu_ps {
u32 evclk;
u32 ecclk;
bool vce_active;
- enum amdgpu_vce_level vce_level;
+ enum amd_vce_level vce_level;
/* asic priv */
void *ps_priv;
};
@@ -257,17 +246,6 @@ enum amdgpu_dpm_forced_level {
AMDGPU_DPM_FORCED_LEVEL_MANUAL = 3,
};
-struct amdgpu_vce_state {
- /* vce clocks */
- u32 evclk;
- u32 ecclk;
- /* gpu clocks */
- u32 sclk;
- u32 mclk;
- u8 clk_idx;
- u8 pstate;
-};
-
struct amdgpu_dpm_funcs {
int (*get_temperature)(struct amdgpu_device *adev);
int (*pre_set_power_state)(struct amdgpu_device *adev);
@@ -409,8 +387,8 @@ struct amdgpu_dpm {
/* default uvd power state */
struct amdgpu_ps*uvd_ps;
/* vce requirements */
- struct amdgpu_vce_state vce_states[AMDGPU_MAX_VCE_LEVELS];
- enum amdgpu_vce_level vce_level;
+ struct amd_vce_state vce_states[AMD_MAX_VCE_LEVELS];
+ enum amd_vce_level vce_level;
enum amd_pm_state_type state;
enum amd_pm_state_type user_state;
u32 platform_caps;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index accc908..4656ad6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -1135,7 +1135,7 @@ void amdgpu_dpm_enable_vce(struct amdgpu_device *adev,
bool enable)
mutex_lock(&adev->pm.mutex);
adev->pm.dpm.vce_active = true;
/* XXX select vce level based on ring/task */
- adev->pm.dpm.vce_level = AMDGPU_VCE_LEVEL_AC_ALL;
+ adev->pm.dpm.vce_level = AMD_VCE_LEVEL_AC_ALL;
mutex_unlock(&adev->pm.mutex);
} else {
mutex_lock(&adev->pm.mutex);
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index 1d8c375..dc3196e 100644
--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
@@ -5689,7 +5689,7 @@ static int ci_parse_power_table(struct amdgpu_device
*adev)
adev->pm.dpm.num_ps = state_array->ucNumEntries;
/* fill in the vce power states */
- for (i = 0; i < AMDGPU_MAX_VCE_LEVELS; i++) {
+ for (i = 0; i < AM
Re: [PATCH 5/6] drm/amdgpu/powerplay: add an implementation for get_vce_clock_table
On Wed, Oct 12, 2016 at 5:56 AM, Christian König wrote: > Hi Rex, > > So amd_vce_state is our hardware representation and > drm_amdgpu_info_vce_clock_table is the IOCTL interface structure? Is there a > reason for not using drm_amdgpu_info_vce_clock_table directly in the hw > manager, except that we don't want to include the IOCTL interface here? > > Cause that would at least be a bit awkward, this is an extra abstraction > layer we usually try to avoid upstream. > > I'm fine with this approach for this use case, but when we get more and more > power management exposed to userspace this could raise objections cause this > essentially means we need to duplicate all internal power management > structures for the public interface again. It's only needed for a subset of asics (some CI and VI parts). Everything else gets handled in the firmware similar to UVD DPM. Alex ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH] drm/radeon: change vblank_time's calculation method to reduce computational error.
Ported from Rex's amdgpu change.
Signed-off-by: Alex Deucher
Cc: sta...@vger.kernel.org
---
drivers/gpu/drm/radeon/r600_dpm.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r600_dpm.c
b/drivers/gpu/drm/radeon/r600_dpm.c
index 6a4b020..5a26eb4 100644
--- a/drivers/gpu/drm/radeon/r600_dpm.c
+++ b/drivers/gpu/drm/radeon/r600_dpm.c
@@ -156,19 +156,20 @@ u32 r600_dpm_get_vblank_time(struct radeon_device *rdev)
struct drm_device *dev = rdev->ddev;
struct drm_crtc *crtc;
struct radeon_crtc *radeon_crtc;
- u32 line_time_us, vblank_lines;
+ u32 vblank_in_pixels;
u32 vblank_time_us = 0x; /* if the displays are off, vblank
time is max */
if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
radeon_crtc = to_radeon_crtc(crtc);
if (crtc->enabled && radeon_crtc->enabled &&
radeon_crtc->hw_mode.clock) {
- line_time_us =
(radeon_crtc->hw_mode.crtc_htotal * 1000) /
- radeon_crtc->hw_mode.clock;
- vblank_lines =
radeon_crtc->hw_mode.crtc_vblank_end -
- radeon_crtc->hw_mode.crtc_vdisplay +
- (radeon_crtc->v_border * 2);
- vblank_time_us = vblank_lines * line_time_us;
+ vblank_in_pixels =
+ radeon_crtc->hw_mode.crtc_htotal *
+ (radeon_crtc->hw_mode.crtc_vblank_end -
+radeon_crtc->hw_mode.crtc_vdisplay +
+(radeon_crtc->v_border * 2));
+
+ vblank_time_us = vblank_in_pixels * 1000 /
radeon_crtc->hw_mode.clock;
break;
}
}
--
2.5.5
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Re: [PATCH 2/2] drm/amdgpu: add VCE VM session tracking
On 10/12/2016 07:05 AM, Christian König wrote:
Andy & Leo could you give that a brief testing?
run `kill -9' over 30 times, no issue.
Patch is:
Reviewed-and-Tested by: Leo Liu
I currently don't have a setup for encoding/transcoding clips.
Regards,
Christian.
Am 10.10.2016 um 18:45 schrieb Alex Deucher:
On Mon, Oct 10, 2016 at 9:40 AM, Christian König
wrote:
From: Christian König
Only compile tested, but should fix the problems with killing
VCE sessions in VM mode.
Signed-off-by: Christian König
Series is:
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 90
+
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h | 1 +
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 1 +
3 files changed, 92 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index 05a1ea9..3d6f86c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
@@ -792,6 +792,96 @@ out:
}
/**
+ * amdgpu_vce_cs_parse_vm - parse the command stream in VM mode
+ *
+ * @p: parser context
+ *
+ */
+int amdgpu_vce_ring_parse_cs_vm(struct amdgpu_cs_parser *p,
uint32_t ib_idx)
+{
+ struct amdgpu_ib *ib = &p->job->ibs[ib_idx];
+ int session_idx = -1;
+ uint32_t destroyed = 0;
+ uint32_t created = 0;
+ uint32_t allocated = 0;
+ uint32_t tmp, handle = 0;
+ int i, r = 0, idx = 0;
+
+ while (idx < ib->length_dw) {
+ uint32_t len = amdgpu_get_ib_value(p, ib_idx, idx);
+ uint32_t cmd = amdgpu_get_ib_value(p, ib_idx, idx + 1);
+
+ if ((len < 8) || (len & 3)) {
+ DRM_ERROR("invalid VCE command length
(%d)!\n", len);
+ r = -EINVAL;
+ goto out;
+ }
+
+ switch (cmd) {
+ case 0x0001: /* session */
+ handle = amdgpu_get_ib_value(p, ib_idx, idx
+ 2);
+ session_idx = amdgpu_vce_validate_handle(p,
handle,
+ &allocated);
+ if (session_idx < 0) {
+ r = session_idx;
+ goto out;
+ }
+ break;
+
+ case 0x0101: /* create */
+ created |= 1 << session_idx;
+ if (destroyed & (1 << session_idx)) {
+ destroyed &= ~(1 << session_idx);
+ allocated |= 1 << session_idx;
+
+ } else if (!(allocated & (1 << session_idx))) {
+ DRM_ERROR("Handle already in use!\n");
+ r = -EINVAL;
+ goto out;
+ }
+
+ break;
+
+ case 0x0201: /* destroy */
+ destroyed |= 1 << session_idx;
+ break;
+
+ default:
+ break;
+ }
+
+ if (session_idx == -1) {
+ DRM_ERROR("no session command at start of
IB\n");
+ r = -EINVAL;
+ goto out;
+ }
+
+ idx += len / 4;
+ }
+
+ if (allocated & ~created) {
+ DRM_ERROR("New session without create command!\n");
+ r = -ENOENT;
+ }
+
+out:
+ if (!r) {
+ /* No error, free all destroyed handle slots */
+ tmp = destroyed;
+ amdgpu_ib_free(p->adev, ib, NULL);
+ } else {
+ /* Error during parsing, free all allocated handle
slots */
+ tmp = allocated;
+ }
+
+ for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i)
+ if (tmp & (1 << i))
+ atomic_set(&p->adev->vce.handles[i], 0);
+
+ return r;
+}
+
+/**
* amdgpu_vce_ring_emit_ib - execute indirect buffer
*
* @ring: engine to use
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
index 12729d2..44d49b5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
@@ -34,6 +34,7 @@ int amdgpu_vce_get_destroy_msg(struct amdgpu_ring
*ring, uint32_t handle,
bool direct, struct fence **fence);
void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct
drm_file *filp);
int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t
ib_idx);
+int amdgpu_vce_ring_parse_cs_vm(struct amdgpu_cs_parser *p,
uint32_t ib_idx);
void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring, struct
amdgpu_ib *ib,
unsigned vm_id, bool ctx_switch);
void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, u64
addr, u64 seq,
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
i
Re: [PATCH] drm/amd/amdgpu: Allow broadcast on debugfs read (v2)
It comes from amdgpu_query_gpu_info_init()
for (i = 0; i < (int)dev->info.num_shader_engines; i++) {
unsigned instance = (i << AMDGPU_INFO_MMR_SE_INDEX_SHIFT) |
(AMDGPU_INFO_MMR_SH_INDEX_MASK <<
AMDGPU_INFO_MMR_SH_INDEX_SHIFT);
r = amdgpu_read_mm_registers(dev, 0x263d, 1, instance, 0,
&dev->info.backend_disable[i]);
This effectively reads from 0/* where the kernel adds the instance of * so it's
0/*/*. That line was last changed by Alex
0936139536380 (Alex Deucher 2015-04-20 12:04:22 -0400 174)
(AMDGPU_INFO_MMR_SH_INDEX_MASK <<
I still don't get why this is a reason to hit pause on the patch(es) though.
They're root only, you can still not use * if you don't want to and furthermore
I'm already using the write debugfs content (to debug waveforms).
Tom
From: Michel Dänzer
Sent: Tuesday, October 11, 2016 20:34
To: StDenis, Tom; Christian König
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amd/amdgpu: Allow broadcast on debugfs read (v2)
On 11/10/16 09:32 PM, StDenis, Tom wrote:
> It's used by the UMD though they read from 0/*/* when reading the
> RASTER_CONFIG registers (which may be a bug...)
We should probably clarify what userspace is trying to do there, and
whether the hardware actually does that.
--
Earthling Michel Dänzer | http://www.amd.com
Graphics, Processors and Immersive VR Solutions | AMD
Re: [PATCH 2/2] drm/amdgpu: add VCE VM session tracking
Christian König wrote:
Andy & Leo could you give that a brief testing?
Seems to be OK for me.
I currently don't have a setup for encoding/transcoding clips.
Regards,
Christian.
Am 10.10.2016 um 18:45 schrieb Alex Deucher:
On Mon, Oct 10, 2016 at 9:40 AM, Christian König
wrote:
From: Christian König
Only compile tested, but should fix the problems with killing
VCE sessions in VM mode.
Signed-off-by: Christian König
Series is:
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 90
+
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h | 1 +
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 1 +
3 files changed, 92 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index 05a1ea9..3d6f86c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
@@ -792,6 +792,96 @@ out:
}
/**
+ * amdgpu_vce_cs_parse_vm - parse the command stream in VM mode
+ *
+ * @p: parser context
+ *
+ */
+int amdgpu_vce_ring_parse_cs_vm(struct amdgpu_cs_parser *p, uint32_t
ib_idx)
+{
+ struct amdgpu_ib *ib = &p->job->ibs[ib_idx];
+ int session_idx = -1;
+ uint32_t destroyed = 0;
+ uint32_t created = 0;
+ uint32_t allocated = 0;
+ uint32_t tmp, handle = 0;
+ int i, r = 0, idx = 0;
+
+ while (idx < ib->length_dw) {
+ uint32_t len = amdgpu_get_ib_value(p, ib_idx, idx);
+ uint32_t cmd = amdgpu_get_ib_value(p, ib_idx, idx + 1);
+
+ if ((len < 8) || (len & 3)) {
+ DRM_ERROR("invalid VCE command length
(%d)!\n", len);
+ r = -EINVAL;
+ goto out;
+ }
+
+ switch (cmd) {
+ case 0x0001: /* session */
+ handle = amdgpu_get_ib_value(p, ib_idx, idx +
2);
+ session_idx = amdgpu_vce_validate_handle(p,
handle,
+
&allocated);
+ if (session_idx < 0) {
+ r = session_idx;
+ goto out;
+ }
+ break;
+
+ case 0x0101: /* create */
+ created |= 1 << session_idx;
+ if (destroyed & (1 << session_idx)) {
+ destroyed &= ~(1 << session_idx);
+ allocated |= 1 << session_idx;
+
+ } else if (!(allocated & (1 << session_idx))) {
+ DRM_ERROR("Handle already in use!\n");
+ r = -EINVAL;
+ goto out;
+ }
+
+ break;
+
+ case 0x0201: /* destroy */
+ destroyed |= 1 << session_idx;
+ break;
+
+ default:
+ break;
+ }
+
+ if (session_idx == -1) {
+ DRM_ERROR("no session command at start of
IB\n");
+ r = -EINVAL;
+ goto out;
+ }
+
+ idx += len / 4;
+ }
+
+ if (allocated & ~created) {
+ DRM_ERROR("New session without create command!\n");
+ r = -ENOENT;
+ }
+
+out:
+ if (!r) {
+ /* No error, free all destroyed handle slots */
+ tmp = destroyed;
+ amdgpu_ib_free(p->adev, ib, NULL);
+ } else {
+ /* Error during parsing, free all allocated handle
slots */
+ tmp = allocated;
+ }
+
+ for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i)
+ if (tmp & (1 << i))
+ atomic_set(&p->adev->vce.handles[i], 0);
+
+ return r;
+}
+
+/**
* amdgpu_vce_ring_emit_ib - execute indirect buffer
*
* @ring: engine to use
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
index 12729d2..44d49b5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
@@ -34,6 +34,7 @@ int amdgpu_vce_get_destroy_msg(struct amdgpu_ring
*ring, uint32_t handle,
bool direct, struct fence **fence);
void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct
drm_file *filp);
int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t
ib_idx);
+int amdgpu_vce_ring_parse_cs_vm(struct amdgpu_cs_parser *p, uint32_t
ib_idx);
void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring, struct
amdgpu_ib *ib,
unsigned vm_id, bool ctx_switch);
void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
u64 seq,
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
index f7dbd0d..2abf5bd 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
+++ b/drivers/gpu
Re: [PATCH 4/4] drm/amdgpu: used cached gca values for vi_read_register
Grazvydas Ignotas wrote: On Wed, Oct 12, 2016 at 2:48 AM, Andy Furniss wrote: I still can't shutdown/reboot as in https://bugs.freedesktop.org/show_bug.cgi?id=98200 which is fixed for radeon, but apparently not (for me at least) with amdgpu. You probably need a951ed85abd46 that went to 4.8-fixes and is not part of 4.9-wip. Thanks, it's OK with that. ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
RE: [PATCH] drm/amd/powerplay: don't give up if DPM is already running
Hi Grazvydas and Alex,
We needed to disable dpm when rmmod amdgpu for this issue.
I am checking the function of disable dpm task.
Best Regards
Rex
-Original Message-
From: Alex Deucher [mailto:alexdeuc...@gmail.com]
Sent: Wednesday, October 12, 2016 4:01 AM
To: Grazvydas Ignotas; Zhu, Rex
Cc: Maling list - DRI developers; amd-gfx list
Subject: Re: [PATCH] drm/amd/powerplay: don't give up if DPM is already running
+Rex to review this.
Alex
On Sun, Oct 9, 2016 at 3:23 PM, Grazvydas Ignotas wrote:
> Currently the driver crashes if smu7_enable_dpm_tasks() returns early,
> which it does if DPM is already active. It seems to be better just to
> continue anyway, at least I haven't noticed any ill effects. It's also
> unclear at what state the hardware was left by the previous driver, so
> IMO it's better to always fully initialize.
>
> Way to reproduce:
> $ modprobe amdgpu
> $ rmmod amdgpu
> $ modprobe amdgpu
> ...
> DPM is already running right now, no need to enable DPM!
> ...
> failed to send message 18b ret is 0
> BUG: unable to handle kernel paging request at ed01fc9ab21f Call
> Trace:
> smu7_set_power_state_tasks+0x499/0x1940 [amdgpu]
> phm_set_power_state+0xcb/0x120 [amdgpu]
> psm_adjust_power_state_dynamic+0x11e/0x1b0 [amdgpu]
> pem_task_adjust_power_state+0xb9/0xd0 [amdgpu]
> pem_excute_event_chain+0x7d/0xe0 [amdgpu]
> pem_handle_event_unlocked+0x49/0x60 [amdgpu]
> pem_handle_event+0xe/0x10 [amdgpu]
> pp_dpm_dispatch_tasks+0xe0/0x190 [amdgpu]
> amdgpu_pm_compute_clocks+0x10c/0xc60 [amdgpu]
> dce_v11_0_crtc_dpms+0x7d/0x150 [amdgpu]
> dce_v11_0_crtc_disable+0x90/0x4a0 [amdgpu]
> drm_helper_disable_unused_functions+0x67/0x80 [drm_kms_helper]
> amdgpu_fbdev_init+0x13e/0x170 [amdgpu]
> amdgpu_device_init+0x1aeb/0x2490 [amdgpu]
>
> Signed-off-by: Grazvydas Ignotas
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> index f6afa6a..327030b 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> @@ -1166,8 +1166,8 @@ static int smu7_enable_dpm_tasks(struct pp_hwmgr
> *hwmgr)
>
> tmp_result = (!smum_is_dpm_running(hwmgr)) ? 0 : -1;
> PP_ASSERT_WITH_CODE(tmp_result == 0,
> - "DPM is already running right now, no need to enable
> DPM!",
> - return 0);
> + "DPM is already running",
> + );
>
> if (smu7_voltage_control(hwmgr)) {
> tmp_result = smu7_enable_voltage_control(hwmgr);
> --
> 2.7.4
>
> ___
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 2/2] drm/amdgpu: add VCE VM session tracking
Andy & Leo could you give that a brief testing?
I currently don't have a setup for encoding/transcoding clips.
Regards,
Christian.
Am 10.10.2016 um 18:45 schrieb Alex Deucher:
On Mon, Oct 10, 2016 at 9:40 AM, Christian König
wrote:
From: Christian König
Only compile tested, but should fix the problems with killing
VCE sessions in VM mode.
Signed-off-by: Christian König
Series is:
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 90 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h | 1 +
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 1 +
3 files changed, 92 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index 05a1ea9..3d6f86c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
@@ -792,6 +792,96 @@ out:
}
/**
+ * amdgpu_vce_cs_parse_vm - parse the command stream in VM mode
+ *
+ * @p: parser context
+ *
+ */
+int amdgpu_vce_ring_parse_cs_vm(struct amdgpu_cs_parser *p, uint32_t ib_idx)
+{
+ struct amdgpu_ib *ib = &p->job->ibs[ib_idx];
+ int session_idx = -1;
+ uint32_t destroyed = 0;
+ uint32_t created = 0;
+ uint32_t allocated = 0;
+ uint32_t tmp, handle = 0;
+ int i, r = 0, idx = 0;
+
+ while (idx < ib->length_dw) {
+ uint32_t len = amdgpu_get_ib_value(p, ib_idx, idx);
+ uint32_t cmd = amdgpu_get_ib_value(p, ib_idx, idx + 1);
+
+ if ((len < 8) || (len & 3)) {
+ DRM_ERROR("invalid VCE command length (%d)!\n", len);
+ r = -EINVAL;
+ goto out;
+ }
+
+ switch (cmd) {
+ case 0x0001: /* session */
+ handle = amdgpu_get_ib_value(p, ib_idx, idx + 2);
+ session_idx = amdgpu_vce_validate_handle(p, handle,
+&allocated);
+ if (session_idx < 0) {
+ r = session_idx;
+ goto out;
+ }
+ break;
+
+ case 0x0101: /* create */
+ created |= 1 << session_idx;
+ if (destroyed & (1 << session_idx)) {
+ destroyed &= ~(1 << session_idx);
+ allocated |= 1 << session_idx;
+
+ } else if (!(allocated & (1 << session_idx))) {
+ DRM_ERROR("Handle already in use!\n");
+ r = -EINVAL;
+ goto out;
+ }
+
+ break;
+
+ case 0x0201: /* destroy */
+ destroyed |= 1 << session_idx;
+ break;
+
+ default:
+ break;
+ }
+
+ if (session_idx == -1) {
+ DRM_ERROR("no session command at start of IB\n");
+ r = -EINVAL;
+ goto out;
+ }
+
+ idx += len / 4;
+ }
+
+ if (allocated & ~created) {
+ DRM_ERROR("New session without create command!\n");
+ r = -ENOENT;
+ }
+
+out:
+ if (!r) {
+ /* No error, free all destroyed handle slots */
+ tmp = destroyed;
+ amdgpu_ib_free(p->adev, ib, NULL);
+ } else {
+ /* Error during parsing, free all allocated handle slots */
+ tmp = allocated;
+ }
+
+ for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i)
+ if (tmp & (1 << i))
+ atomic_set(&p->adev->vce.handles[i], 0);
+
+ return r;
+}
+
+/**
* amdgpu_vce_ring_emit_ib - execute indirect buffer
*
* @ring: engine to use
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
index 12729d2..44d49b5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
@@ -34,6 +34,7 @@ int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring,
uint32_t handle,
bool direct, struct fence **fence);
void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file
*filp);
int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx);
+int amdgpu_vce_ring_parse_cs_vm(struct amdgpu_cs_parser *p, uint32_t ib_idx);
void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib,
unsigned vm_id, bool ctx_switch);
void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
index f7dbd0d..2abf5bd 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
Re: [PATCH 4/4] drm/amdgpu: used cached gca values for vi_read_register
On Wed, Oct 12, 2016 at 2:48 AM, Andy Furniss wrote: > > I still can't shutdown/reboot > as in https://bugs.freedesktop.org/show_bug.cgi?id=98200 > which is fixed for radeon, but apparently not (for me at least) with amdgpu. You probably need a951ed85abd46 that went to 4.8-fixes and is not part of 4.9-wip. Gražvydas ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 5/6] drm/amdgpu/powerplay: add an implementation for get_vce_clock_table
Hi Rex,
So amd_vce_state is our hardware representation and
drm_amdgpu_info_vce_clock_table is the IOCTL interface structure? Is
there a reason for not using drm_amdgpu_info_vce_clock_table directly in
the hw manager, except that we don't want to include the IOCTL interface
here?
Cause that would at least be a bit awkward, this is an extra abstraction
layer we usually try to avoid upstream.
I'm fine with this approach for this use case, but when we get more and
more power management exposed to userspace this could raise objections
cause this essentially means we need to duplicate all internal power
management structures for the public interface again.
Regards,
Christian.
Am 12.10.2016 um 11:40 schrieb Zhu, Rex:
Hi Christian,
I mean patch 5 can be changed as
static struct amd_vce_state* pp_dpm_get_vce_clock_table(void *handle,
int num)
{
PP_CHECK((struct pp_instance *)handle);
hwmgr = ((struct pp_instance *)handle)->hwmgr;
if (hwmgr && num < hwmgr->num_vce_state_tables)
return &hwmgr->vce_states[i];
Return NULL;
}
And in Patch6.
+ case AMDGPU_INFO_VCE_CLOCK_TABLE: {
+ struct drm_amdgpu_info_vce_clock_table vce_clk_table = {};
struct amd_vce_state* vce_state;
+ for (i = 0; i < AMDGPU_VCE_CLOCK_TABLE_ENTRIES; i++) {
vce_state = amdgpu_dpm_get_vce_clock_table(adev, i);
If (vce_state) {
vce_clk_table.entries[i].sclk =
vce_state->sclk;
vce_clk_table.entries[i].mclk = vce_state->mclk;
vce_clk_table.entries[i].eclk = vce_state->evclk;
} else {
vce_clk_table.num_of_entries = i; //if UMD driver need
to check number of vce state.
break;
}
}
+ return copy_to_user(out, &vce_clk_table,
+ min((size_t)size, sizeof(vce_clk_table))) ? -EFAULT : 0;
+ }
Best Regards
Rex
*From:*amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] *On
Behalf Of *Christian König
*Sent:* Wednesday, October 12, 2016 4:53 PM
*To:* Zhu, Rex; Alex Deucher; amd-gfx list; Fang, Peter; Zhang, Boyuan
*Cc:* Deucher, Alexander
*Subject:* Re: [PATCH 5/6] drm/amdgpu/powerplay: add an implementation
for get_vce_clock_table
Hi Rex,
the problem with this approach is that you need to copy the entries
from one structure to another, like we have below:
> + vce_clk_table.entries[i].sclk = hwmgr->vce_states[i].sclk;
> + vce_clk_table.entries[i].mclk = hwmgr->vce_states[i].mclk;
> + vce_clk_table.entries[i].eclk = hwmgr->vce_states[i].evclk;
This is not seen as good coding practice and usually isn't allowed
upstream because it creates two representations in the kernel for the
same thing.
Regards,
Christian.
Am 12.10.2016 um 10:34 schrieb Zhu, Rex:
Hi Alex,
In Patch1, I moved struct amdgpu_vce_states to amd_shared.h from
amdgpu.h. So in powerplay, we used same vce state definition.
So the define of static struct drm_amdgpu_info_vce_clock_table
pp_dpm_get_vce_clock_table(void *handle)
Can change to
static struct amd_vce_state pp_dpm_get_vce_clock_table(void
*handle, int num);
and can move those codes to Patch6.
+ vce_clk_table.entries[i].sclk
= hwmgr->vce_states[i].sclk;
+ vce_clk_table.entries[i].mclk
= hwmgr->vce_states[i].mclk;
+ vce_clk_table.entries[i].eclk
= hwmgr->vce_states[i].evclk;
So in powerplay and dpm, we don't need to visit struct
drm_amdgpu_info_vce_clock_table.
In Patch2, add numer of vce_states in struct dpm. If it is useful
to UMD driver. We can notify UMD by add a member in struct
drm_amdgpu_info_vce_clock_table.
Best Regards
Rex
-Original Message-
From: Alex Deucher [mailto:alexdeuc...@gmail.com]
Sent: Wednesday, October 12, 2016 4:07 AM
To: amd-gfx list; Fang, Peter; Zhang, Boyuan; Zhu, Rex
Cc: Deucher, Alexander
Subject: Re: [PATCH 5/6] drm/amdgpu/powerplay: add an
implementation for get_vce_clock_table
Rex what is your opinion on exposing the amdgpu drm structure
through to powerplay? We could do an intermediate interface, but
that just seems like extra hoops to jump through for pretty
questionable gain.
Alex
On Fri, Oct 7, 2016 at 2:28 PM, Alex Deucher
wrote:
Used by the powerplay dpm code.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index bb8a345..8eee390 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -30,6 +30,7 @@
RE: [PATCH 5/6] drm/amdgpu/powerplay: add an implementation for get_vce_clock_table
Hi Christian,
I mean patch 5 can be changed as
static struct amd_vce_state* pp_dpm_get_vce_clock_table(void *handle, int num)
{
PP_CHECK((struct pp_instance *)handle);
hwmgr = ((struct pp_instance *)handle)->hwmgr;
if (hwmgr && num < hwmgr->num_vce_state_tables)
return &hwmgr->vce_states[i];
Return NULL;
}
And in Patch6.
+ case AMDGPU_INFO_VCE_CLOCK_TABLE: {
+struct drm_amdgpu_info_vce_clock_table vce_clk_table = {};
struct amd_vce_state* vce_state;
+ for (i = 0; i < AMDGPU_VCE_CLOCK_TABLE_ENTRIES; i++) {
vce_state = amdgpu_dpm_get_vce_clock_table(adev, i);
If (vce_state) {
vce_clk_table.entries[i].sclk =
vce_state->sclk;
vce_clk_table.entries[i].mclk = vce_state->mclk;
vce_clk_table.entries[i].eclk = vce_state->evclk;
} else {
vce_clk_table.num_of_entries = i; //if
UMD driver need to check number of vce state.
break;
}
}
+return copy_to_user(out, &vce_clk_table,
+ min((size_t)size,
sizeof(vce_clk_table))) ? -EFAULT : 0;
+ }
Best Regards
Rex
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
Christian König
Sent: Wednesday, October 12, 2016 4:53 PM
To: Zhu, Rex; Alex Deucher; amd-gfx list; Fang, Peter; Zhang, Boyuan
Cc: Deucher, Alexander
Subject: Re: [PATCH 5/6] drm/amdgpu/powerplay: add an implementation for
get_vce_clock_table
Hi Rex,
the problem with this approach is that you need to copy the entries from one
structure to another, like we have below:
> + vce_clk_table.entries[i].sclk =
> hwmgr->vce_states[i].sclk;
> + vce_clk_table.entries[i].mclk =
> hwmgr->vce_states[i].mclk;
> + vce_clk_table.entries[i].eclk =
> hwmgr->vce_states[i].evclk;
This is not seen as good coding practice and usually isn't allowed upstream
because it creates two representations in the kernel for the same thing.
Regards,
Christian.
Am 12.10.2016 um 10:34 schrieb Zhu, Rex:
Hi Alex,
In Patch1, I moved struct amdgpu_vce_states to amd_shared.h from amdgpu.h. So
in powerplay, we used same vce state definition.
So the define of static struct drm_amdgpu_info_vce_clock_table
pp_dpm_get_vce_clock_table(void *handle)
Can change to
static struct amd_vce_state pp_dpm_get_vce_clock_table(void *handle, int num);
and can move those codes to Patch6.
+ vce_clk_table.entries[i].sclk =
hwmgr->vce_states[i].sclk;
+ vce_clk_table.entries[i].mclk =
hwmgr->vce_states[i].mclk;
+ vce_clk_table.entries[i].eclk =
hwmgr->vce_states[i].evclk;
So in powerplay and dpm, we don't need to visit struct
drm_amdgpu_info_vce_clock_table.
In Patch2, add numer of vce_states in struct dpm. If it is useful to UMD
driver. We can notify UMD by add a member in struct
drm_amdgpu_info_vce_clock_table.
Best Regards
Rex
-Original Message-
From: Alex Deucher [mailto:alexdeuc...@gmail.com]
Sent: Wednesday, October 12, 2016 4:07 AM
To: amd-gfx list; Fang, Peter; Zhang, Boyuan; Zhu, Rex
Cc: Deucher, Alexander
Subject: Re: [PATCH 5/6] drm/amdgpu/powerplay: add an implementation for
get_vce_clock_table
Rex what is your opinion on exposing the amdgpu drm structure through to
powerplay? We could do an intermediate interface, but that just seems like
extra hoops to jump through for pretty questionable gain.
Alex
On Fri, Oct 7, 2016 at 2:28 PM, Alex Deucher
wrote:
Used by the powerplay dpm code.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index bb8a345..8eee390 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -30,6 +30,7 @@
#include "power_state.h"
#include "eventmanager.h"
#include "pp_debug.h"
+#include "drm/amdgpu_drm.h"
#define PP_CHECK(handle) \
@@ -821,6 +822,28 @@ static int pp_dpm_read_sensor(void *handle, int idx,
int32_t *value)
return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value); }
+static struct drm_amdgpu_info_vce_clock_table
+pp_dpm_get_vce_clock_table(void *handle) {
+ struct drm_amdgpu_info_vce_clock_table vce_clk_table = {};
+ struct pp_hwmgr *hwmgr;
+ unsigned i;
+
+ if (handle) {
+ hwmgr = ((struct pp_instance *)handle)->hwmgr;
+
+
Re: [PATCH 5/6] drm/amdgpu/powerplay: add an implementation for get_vce_clock_table
Hi Rex,
the problem with this approach is that you need to copy the entries from
one structure to another, like we have below:
> + vce_clk_table.entries[i].sclk =
hwmgr->vce_states[i].sclk;
> + vce_clk_table.entries[i].mclk =
hwmgr->vce_states[i].mclk;
> + vce_clk_table.entries[i].eclk =
hwmgr->vce_states[i].evclk;
This is not seen as good coding practice and usually isn't allowed
upstream because it creates two representations in the kernel for the
same thing.
Regards,
Christian.
Am 12.10.2016 um 10:34 schrieb Zhu, Rex:
Hi Alex,
In Patch1, I moved struct amdgpu_vce_states to amd_shared.h from amdgpu.h. So
in powerplay, we used same vce state definition.
So the define of static struct drm_amdgpu_info_vce_clock_table
pp_dpm_get_vce_clock_table(void *handle)
Can change to
static struct amd_vce_state pp_dpm_get_vce_clock_table(void *handle, int num);
and can move those codes to Patch6.
+ vce_clk_table.entries[i].sclk =
hwmgr->vce_states[i].sclk;
+ vce_clk_table.entries[i].mclk =
hwmgr->vce_states[i].mclk;
+ vce_clk_table.entries[i].eclk =
hwmgr->vce_states[i].evclk;
So in powerplay and dpm, we don't need to visit struct
drm_amdgpu_info_vce_clock_table.
In Patch2, add numer of vce_states in struct dpm. If it is useful to UMD driver. We can notify UMD by add a member in struct drm_amdgpu_info_vce_clock_table.
Best Regards
Rex
-Original Message-
From: Alex Deucher [mailto:alexdeuc...@gmail.com]
Sent: Wednesday, October 12, 2016 4:07 AM
To: amd-gfx list; Fang, Peter; Zhang, Boyuan; Zhu, Rex
Cc: Deucher, Alexander
Subject: Re: [PATCH 5/6] drm/amdgpu/powerplay: add an implementation for
get_vce_clock_table
Rex what is your opinion on exposing the amdgpu drm structure through to
powerplay? We could do an intermediate interface, but that just seems like
extra hoops to jump through for pretty questionable gain.
Alex
On Fri, Oct 7, 2016 at 2:28 PM, Alex Deucher wrote:
Used by the powerplay dpm code.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index bb8a345..8eee390 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -30,6 +30,7 @@
#include "power_state.h"
#include "eventmanager.h"
#include "pp_debug.h"
+#include "drm/amdgpu_drm.h"
#define PP_CHECK(handle) \
@@ -821,6 +822,28 @@ static int pp_dpm_read_sensor(void *handle, int idx,
int32_t *value)
return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value); }
+static struct drm_amdgpu_info_vce_clock_table
+pp_dpm_get_vce_clock_table(void *handle) {
+ struct drm_amdgpu_info_vce_clock_table vce_clk_table = {};
+ struct pp_hwmgr *hwmgr;
+ unsigned i;
+
+ if (handle) {
+ hwmgr = ((struct pp_instance *)handle)->hwmgr;
+
+ if (hwmgr) {
+ for (i = 0; i < AMDGPU_VCE_CLOCK_TABLE_ENTRIES; i++) {
+ vce_clk_table.entries[i].sclk =
hwmgr->vce_states[i].sclk;
+ vce_clk_table.entries[i].mclk =
hwmgr->vce_states[i].mclk;
+ vce_clk_table.entries[i].eclk =
hwmgr->vce_states[i].evclk;
+ }
+ }
+ }
+
+ return vce_clk_table;
+}
+
const struct amd_powerplay_funcs pp_dpm_funcs = {
.get_temperature = pp_dpm_get_temperature,
.load_firmware = pp_dpm_load_fw, @@ -847,6 +870,7 @@ const
struct amd_powerplay_funcs pp_dpm_funcs = {
.get_mclk_od = pp_dpm_get_mclk_od,
.set_mclk_od = pp_dpm_set_mclk_od,
.read_sensor = pp_dpm_read_sensor,
+ .get_vce_clock_table = pp_dpm_get_vce_clock_table,
};
static int amd_pp_instance_init(struct amd_pp_init *pp_init,
--
2.5.5
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RE: [PATCH 5/6] drm/amdgpu/powerplay: add an implementation for get_vce_clock_table
Hi Alex,
In Patch1, I moved struct amdgpu_vce_states to amd_shared.h from amdgpu.h. So
in powerplay, we used same vce state definition.
So the define of static struct drm_amdgpu_info_vce_clock_table
pp_dpm_get_vce_clock_table(void *handle)
Can change to
static struct amd_vce_state pp_dpm_get_vce_clock_table(void *handle, int num);
and can move those codes to Patch6.
> + vce_clk_table.entries[i].sclk =
> hwmgr->vce_states[i].sclk;
> + vce_clk_table.entries[i].mclk =
> hwmgr->vce_states[i].mclk;
> + vce_clk_table.entries[i].eclk =
> hwmgr->vce_states[i].evclk;
So in powerplay and dpm, we don't need to visit struct
drm_amdgpu_info_vce_clock_table.
In Patch2, add numer of vce_states in struct dpm. If it is useful to UMD
driver. We can notify UMD by add a member in struct
drm_amdgpu_info_vce_clock_table.
Best Regards
Rex
-Original Message-
From: Alex Deucher [mailto:alexdeuc...@gmail.com]
Sent: Wednesday, October 12, 2016 4:07 AM
To: amd-gfx list; Fang, Peter; Zhang, Boyuan; Zhu, Rex
Cc: Deucher, Alexander
Subject: Re: [PATCH 5/6] drm/amdgpu/powerplay: add an implementation for
get_vce_clock_table
Rex what is your opinion on exposing the amdgpu drm structure through to
powerplay? We could do an intermediate interface, but that just seems like
extra hoops to jump through for pretty questionable gain.
Alex
On Fri, Oct 7, 2016 at 2:28 PM, Alex Deucher wrote:
> Used by the powerplay dpm code.
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 24
>
> 1 file changed, 24 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index bb8a345..8eee390 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -30,6 +30,7 @@
> #include "power_state.h"
> #include "eventmanager.h"
> #include "pp_debug.h"
> +#include "drm/amdgpu_drm.h"
>
>
> #define PP_CHECK(handle) \
> @@ -821,6 +822,28 @@ static int pp_dpm_read_sensor(void *handle, int idx,
> int32_t *value)
> return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value); }
>
> +static struct drm_amdgpu_info_vce_clock_table
> +pp_dpm_get_vce_clock_table(void *handle) {
> + struct drm_amdgpu_info_vce_clock_table vce_clk_table = {};
> + struct pp_hwmgr *hwmgr;
> + unsigned i;
> +
> + if (handle) {
> + hwmgr = ((struct pp_instance *)handle)->hwmgr;
> +
> + if (hwmgr) {
> + for (i = 0; i < AMDGPU_VCE_CLOCK_TABLE_ENTRIES; i++) {
> + vce_clk_table.entries[i].sclk =
> hwmgr->vce_states[i].sclk;
> + vce_clk_table.entries[i].mclk =
> hwmgr->vce_states[i].mclk;
> + vce_clk_table.entries[i].eclk =
> hwmgr->vce_states[i].evclk;
> + }
> + }
> + }
> +
> + return vce_clk_table;
> +}
> +
> const struct amd_powerplay_funcs pp_dpm_funcs = {
> .get_temperature = pp_dpm_get_temperature,
> .load_firmware = pp_dpm_load_fw, @@ -847,6 +870,7 @@ const
> struct amd_powerplay_funcs pp_dpm_funcs = {
> .get_mclk_od = pp_dpm_get_mclk_od,
> .set_mclk_od = pp_dpm_set_mclk_od,
> .read_sensor = pp_dpm_read_sensor,
> + .get_vce_clock_table = pp_dpm_get_vce_clock_table,
> };
>
> static int amd_pp_instance_init(struct amd_pp_init *pp_init,
> --
> 2.5.5
>
0001-drm-amdgpu-use-same-vce-state-definition-in-dpm-and-.patch
Description: 0001-drm-amdgpu-use-same-vce-state-definition-in-dpm-and-.patch
0002-drm-amdgpu-save-number-of-vce-states-in-dpm-struct.patch
Description: 0002-drm-amdgpu-save-number-of-vce-states-in-dpm-struct.patch
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Re: [PATCH] drm/amdgpu: fix broken UVD startup in phys mode
Am 11.10.2016 um 21:39 schrieb Alex Deucher:
Add type, align_mask and nop to the physical mode UVD funcs as well.
Signed-off-by: Alex Deucher
Reviewed-by: Christian König .
---
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index 15708f8..8f8a5dd 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -1022,6 +1022,9 @@ const struct amd_ip_funcs uvd_v6_0_ip_funcs = {
};
static const struct amdgpu_ring_funcs uvd_v6_0_ring_phys_funcs = {
+ .type = AMDGPU_RING_TYPE_UVD,
+ .align_mask = 0xf,
+ .nop = PACKET0(mmUVD_NO_OP, 0),
.get_rptr = uvd_v6_0_ring_get_rptr,
.get_wptr = uvd_v6_0_ring_get_wptr,
.set_wptr = uvd_v6_0_ring_set_wptr,
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drm/amd/powerplay: expose max engine and memory clock info for powerplay enabled case
Hi All, We found the max engine clock and max memory clock are both wrongly reported as 0(by AMDGPU_INFO_DEV_INFO ioctl). The attached patch tries to fix it. Please help to review it. Any comment is welcomed. Regards, Evan 0001-drm-amd-powerplay-expose-max-engine-memory-clock-inf.patch Description: 0001-drm-amd-powerplay-expose-max-engine-memory-clock-inf.patch ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
