[PATCH V2] drm/amdgpu: move GTT allocation from gmc_sw_init to gmc_hw_init(V2)

2022-01-26 Thread Aaron Liu
The below patch causes system hang for harvested ASICs.
d015e9861e55 drm/amdgpu: improve debug VRAM access performance using sdma

The root cause is that GTT buffer should be allocated after GC SA harvest
programming completed.

For harvested AISC, the GC SA harvest process(see utcl2_harvest) is
programmed in gmc_v10_0_hw_init function. This is a hardware programming.
Therefore should be located in hw init. Hence need to move GTT allocation
from gmc_v*_0_sw_init to gmc_v*_0_hw_init.

V2: expand to all gmc_v*_0_hw_init functions.

Signed-off-by: Aaron Liu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 21 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h |  3 +++
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c |  8 
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c  |  4 +++-
 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c   | 13 +
 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c   | 13 +
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c   | 13 +
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c   | 13 +
 8 files changed, 63 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index d426de48d299..ac75bde8ac61 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -876,3 +876,24 @@ int amdgpu_gmc_vram_checking(struct amdgpu_device *adev)
 
return 0;
 }
+
+int amdgpu_gmc_allocate_sdma_access_gtt(struct amdgpu_device *adev)
+{
+   int ret;
+
+   ret = amdgpu_bo_create_kernel(adev, PAGE_SIZE, PAGE_SIZE,
+   AMDGPU_GEM_DOMAIN_GTT,
+   >mman.sdma_access_bo, NULL,
+   >mman.sdma_access_ptr);
+
+   if (ret)
+   DRM_WARN("Debug VRAM access will use slowpath MM access\n");
+
+   return ret;
+}
+
+void amdgpu_gmc_free_sdma_access_gtt(struct amdgpu_device *adev)
+{
+   amdgpu_bo_free_kernel(>mman.sdma_access_bo, NULL,
+   >mman.sdma_access_ptr);
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index 93505bb0a36c..b8ba16de5e1c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -338,4 +338,7 @@ uint64_t amdgpu_gmc_vram_mc2pa(struct amdgpu_device *adev, 
uint64_t mc_addr);
 uint64_t amdgpu_gmc_vram_pa(struct amdgpu_device *adev, struct amdgpu_bo *bo);
 uint64_t amdgpu_gmc_vram_cpu_pa(struct amdgpu_device *adev, struct amdgpu_bo 
*bo);
 int amdgpu_gmc_vram_checking(struct amdgpu_device *adev);
+int amdgpu_gmc_allocate_sdma_access_gtt(struct amdgpu_device *adev);
+void amdgpu_gmc_free_sdma_access_gtt(struct amdgpu_device *adev);
+
 #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 3d8a20956b74..7ce0478b2908 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1823,12 +1823,6 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
return r;
}
 
-   if (amdgpu_bo_create_kernel(adev, PAGE_SIZE, PAGE_SIZE,
-   AMDGPU_GEM_DOMAIN_GTT,
-   >mman.sdma_access_bo, NULL,
-   >mman.sdma_access_ptr))
-   DRM_WARN("Debug VRAM access will use slowpath MM access\n");
-
return 0;
 }
 
@@ -1850,8 +1844,6 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
if (adev->mman.stolen_reserved_size)
amdgpu_bo_free_kernel(>mman.stolen_reserved_memory,
  NULL, NULL);
-   amdgpu_bo_free_kernel(>mman.sdma_access_bo, NULL,
-   >mman.sdma_access_ptr);
amdgpu_ttm_fw_reserve_vram_fini(adev);
 
if (drm_dev_enter(adev_to_drm(adev), )) {
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 73ab0eebe4e2..d923e4127c87 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -1062,7 +1062,7 @@ static int gmc_v10_0_hw_init(void *handle)
if (adev->umc.funcs && adev->umc.funcs->init_registers)
adev->umc.funcs->init_registers(adev);
 
-   return 0;
+   return amdgpu_gmc_allocate_sdma_access_gtt(adev);
 }
 
 /**
@@ -1082,6 +1082,8 @@ static int gmc_v10_0_hw_fini(void *handle)
 {
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
+   amdgpu_gmc_free_sdma_access_gtt(adev);
+
gmc_v10_0_gart_disable(adev);
 
if (amdgpu_sriov_vf(adev)) {
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index ec291d28edff..ca397d4d4aa8 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -919,16 +919,21 @@ static int gmc_v6_0_hw_init(void *handle)
if (r)
return r;
 

RE: [PATCH] drm/amdgpu: move GTT allocation from gmc_sw_init to gmc_hw_init

2022-01-26 Thread Liu, Aaron
[Public]

Guchun.
Thanks your reminder. I need to modify again.

--
Best Regards
Aaron Liu

> -Original Message-
> From: Chen, Guchun 
> Sent: Thursday, January 27, 2022 3:10 PM
> To: Liu, Aaron ; amd-gfx@lists.freedesktop.org
> Cc: Ji, Ruili ; Kim, Jonathan ;
> Kuehling, Felix ; Liu, Aaron
> ; Huang, Ray ; Deucher,
> Alexander 
> Subject: RE: [PATCH] drm/amdgpu: move GTT allocation from gmc_sw_init
> to gmc_hw_init
> 
> [Public]
> 
> This will create sdma_access_bo only for ASIC with gmc v10? Original
> creation occurs in amdgpu_ttm_init, it's not limited to ASICs with gmc v10.
> 
> Regards,
> Guchun
> 
> -Original Message-
> From: amd-gfx  On Behalf Of
> Aaron Liu
> Sent: Thursday, January 27, 2022 3:04 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Ji, Ruili ; Kim, Jonathan ;
> Kuehling, Felix ; Liu, Aaron
> ; Huang, Ray ; Deucher,
> Alexander 
> Subject: [PATCH] drm/amdgpu: move GTT allocation from gmc_sw_init to
> gmc_hw_init
> 
> The below patch causes system hang for harvested ASICs.
> d015e9861e55 drm/amdgpu: improve debug VRAM access performance
> using sdma
> 
> The root cause is that GTT buffer should be allocated after GC SA harvest
> programming completed.
> 
> For harvested AISC, the GC SA harvest process(see utcl2_harvest) is
> programmed in gmc_v10_0_hw_init function. This is a hardware
> programming.
> Therefore should be located in hw init. Hence need to move GTT allocation
> from gmc_v10_0_sw_init to gmc_v10_0_hw_init.
> 
> Signed-off-by: Aaron Liu 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8 
> drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c  | 9 +
>  2 files changed, 9 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 3d8a20956b74..7ce0478b2908 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1823,12 +1823,6 @@ int amdgpu_ttm_init(struct amdgpu_device
> *adev)
>   return r;
>   }
> 
> - if (amdgpu_bo_create_kernel(adev, PAGE_SIZE, PAGE_SIZE,
> - AMDGPU_GEM_DOMAIN_GTT,
> - >mman.sdma_access_bo, NULL,
> - >mman.sdma_access_ptr))
> - DRM_WARN("Debug VRAM access will use slowpath MM
> access\n");
> -
>   return 0;
>  }
> 
> @@ -1850,8 +1844,6 @@ void amdgpu_ttm_fini(struct amdgpu_device
> *adev)
>   if (adev->mman.stolen_reserved_size)
>   amdgpu_bo_free_kernel(
> >mman.stolen_reserved_memory,
> NULL, NULL);
> - amdgpu_bo_free_kernel(>mman.sdma_access_bo, NULL,
> - >mman.sdma_access_ptr);
>   amdgpu_ttm_fw_reserve_vram_fini(adev);
> 
>   if (drm_dev_enter(adev_to_drm(adev), )) { diff --git
> a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index 73ab0eebe4e2..c560bdc2a93c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -1062,6 +1062,12 @@ static int gmc_v10_0_hw_init(void *handle)
>   if (adev->umc.funcs && adev->umc.funcs->init_registers)
>   adev->umc.funcs->init_registers(adev);
> 
> + if (amdgpu_bo_create_kernel(adev, PAGE_SIZE, PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_GTT,
> + >mman.sdma_access_bo, NULL,
> + >mman.sdma_access_ptr))
> + DRM_WARN("Debug VRAM access will use slowpath MM
> access\n");
> +
>   return 0;
>  }
> 
> @@ -1082,6 +1088,9 @@ static int gmc_v10_0_hw_fini(void *handle)  {
>   struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> 
> + amdgpu_bo_free_kernel(>mman.sdma_access_bo, NULL,
> + >mman.sdma_access_ptr);
> +
>   gmc_v10_0_gart_disable(adev);
> 
>   if (amdgpu_sriov_vf(adev)) {
> --
> 2.25.1


RE: [PATCH] drm/amdgpu: move GTT allocation from gmc_sw_init to gmc_hw_init

2022-01-26 Thread Chen, Guchun
[Public]

This will create sdma_access_bo only for ASIC with gmc v10? Original creation 
occurs in amdgpu_ttm_init, it's not limited to ASICs with gmc v10.

Regards,
Guchun

-Original Message-
From: amd-gfx  On Behalf Of Aaron Liu
Sent: Thursday, January 27, 2022 3:04 PM
To: amd-gfx@lists.freedesktop.org
Cc: Ji, Ruili ; Kim, Jonathan ; 
Kuehling, Felix ; Liu, Aaron ; 
Huang, Ray ; Deucher, Alexander 
Subject: [PATCH] drm/amdgpu: move GTT allocation from gmc_sw_init to gmc_hw_init

The below patch causes system hang for harvested ASICs.
d015e9861e55 drm/amdgpu: improve debug VRAM access performance using sdma

The root cause is that GTT buffer should be allocated after GC SA harvest 
programming completed.

For harvested AISC, the GC SA harvest process(see utcl2_harvest) is programmed 
in gmc_v10_0_hw_init function. This is a hardware programming.
Therefore should be located in hw init. Hence need to move GTT allocation from 
gmc_v10_0_sw_init to gmc_v10_0_hw_init.

Signed-off-by: Aaron Liu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8   
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c  | 9 +
 2 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 3d8a20956b74..7ce0478b2908 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1823,12 +1823,6 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
return r;
}
 
-   if (amdgpu_bo_create_kernel(adev, PAGE_SIZE, PAGE_SIZE,
-   AMDGPU_GEM_DOMAIN_GTT,
-   >mman.sdma_access_bo, NULL,
-   >mman.sdma_access_ptr))
-   DRM_WARN("Debug VRAM access will use slowpath MM access\n");
-
return 0;
 }
 
@@ -1850,8 +1844,6 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
if (adev->mman.stolen_reserved_size)
amdgpu_bo_free_kernel(>mman.stolen_reserved_memory,
  NULL, NULL);
-   amdgpu_bo_free_kernel(>mman.sdma_access_bo, NULL,
-   >mman.sdma_access_ptr);
amdgpu_ttm_fw_reserve_vram_fini(adev);
 
if (drm_dev_enter(adev_to_drm(adev), )) { diff --git 
a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 73ab0eebe4e2..c560bdc2a93c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -1062,6 +1062,12 @@ static int gmc_v10_0_hw_init(void *handle)
if (adev->umc.funcs && adev->umc.funcs->init_registers)
adev->umc.funcs->init_registers(adev);
 
+   if (amdgpu_bo_create_kernel(adev, PAGE_SIZE, PAGE_SIZE,
+   AMDGPU_GEM_DOMAIN_GTT,
+   >mman.sdma_access_bo, NULL,
+   >mman.sdma_access_ptr))
+   DRM_WARN("Debug VRAM access will use slowpath MM access\n");
+
return 0;
 }
 
@@ -1082,6 +1088,9 @@ static int gmc_v10_0_hw_fini(void *handle)  {
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
+   amdgpu_bo_free_kernel(>mman.sdma_access_bo, NULL,
+   >mman.sdma_access_ptr);
+
gmc_v10_0_gart_disable(adev);
 
if (amdgpu_sriov_vf(adev)) {
--
2.25.1


[PATCH] drm/amdgpu: move GTT allocation from gmc_sw_init to gmc_hw_init

2022-01-26 Thread Aaron Liu
The below patch causes system hang for harvested ASICs.
d015e9861e55 drm/amdgpu: improve debug VRAM access performance using sdma

The root cause is that GTT buffer should be allocated after GC SA harvest
programming completed.

For harvested AISC, the GC SA harvest process(see utcl2_harvest) is
programmed in gmc_v10_0_hw_init function. This is a hardware programming.
Therefore should be located in hw init. Hence need to move GTT allocation
from gmc_v10_0_sw_init to gmc_v10_0_hw_init.

Signed-off-by: Aaron Liu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8 
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c  | 9 +
 2 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 3d8a20956b74..7ce0478b2908 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1823,12 +1823,6 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
return r;
}
 
-   if (amdgpu_bo_create_kernel(adev, PAGE_SIZE, PAGE_SIZE,
-   AMDGPU_GEM_DOMAIN_GTT,
-   >mman.sdma_access_bo, NULL,
-   >mman.sdma_access_ptr))
-   DRM_WARN("Debug VRAM access will use slowpath MM access\n");
-
return 0;
 }
 
@@ -1850,8 +1844,6 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
if (adev->mman.stolen_reserved_size)
amdgpu_bo_free_kernel(>mman.stolen_reserved_memory,
  NULL, NULL);
-   amdgpu_bo_free_kernel(>mman.sdma_access_bo, NULL,
-   >mman.sdma_access_ptr);
amdgpu_ttm_fw_reserve_vram_fini(adev);
 
if (drm_dev_enter(adev_to_drm(adev), )) {
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 73ab0eebe4e2..c560bdc2a93c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -1062,6 +1062,12 @@ static int gmc_v10_0_hw_init(void *handle)
if (adev->umc.funcs && adev->umc.funcs->init_registers)
adev->umc.funcs->init_registers(adev);
 
+   if (amdgpu_bo_create_kernel(adev, PAGE_SIZE, PAGE_SIZE,
+   AMDGPU_GEM_DOMAIN_GTT,
+   >mman.sdma_access_bo, NULL,
+   >mman.sdma_access_ptr))
+   DRM_WARN("Debug VRAM access will use slowpath MM access\n");
+
return 0;
 }
 
@@ -1082,6 +1088,9 @@ static int gmc_v10_0_hw_fini(void *handle)
 {
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
+   amdgpu_bo_free_kernel(>mman.sdma_access_bo, NULL,
+   >mman.sdma_access_ptr);
+
gmc_v10_0_gart_disable(adev);
 
if (amdgpu_sriov_vf(adev)) {
-- 
2.25.1



[pull] amdgpu drm-fixes-5.17

2022-01-26 Thread Alex Deucher
Hi Dave, Daniel,

Fixes for 5.17.

The following changes since commit e783362eb54cd99b2cac8b3a9aeac942e6f6ac07:

  Linux 5.17-rc1 (2022-01-23 10:12:53 +0200)

are available in the Git repository at:

  https://gitlab.freedesktop.org/agd5f/linux.git 
tags/amd-drm-fixes-5.17-2022-01-26

for you to fetch changes up to 2a807341ed1074ab83638f2fab08dffaa373f6b8:

  drm/amdgpu/display: Remove t_srx_delay_us. (2022-01-25 17:54:23 -0500)


amd-drm-fixes-5.17-2022-01-26:

amdgpu:
- Proper fix for otg synchronization logic regression
- DCN3.01 fixes
- Filter out secondary radeon PCI IDs
- udelay fixes
- Fix a memory leak in an error path


Alex Deucher (3):
  drm/amdgpu: filter out radeon secondary ids as well
  drm/amdgpu/display: adjust msleep limit in 
dp_wait_for_training_aux_rd_interval
  drm/amdgpu/display: use msleep rather than udelay for long delays

Bas Nieuwenhuizen (3):
  drm/amd/display: Fix FP start/end for dcn30_internal_validate_bw.
  drm/amd/display: Wrap dcn301_calculate_wm_and_dlg for FPU.
  drm/amdgpu/display: Remove t_srx_delay_us.

Meenakshikumar Somasundaram (1):
  drm/amd/display: Fix for otg synchronization logic

Zhan Liu (2):
  drm/amd/display: Correct MPC split policy for DCN301
  drm/amd/display: change FIFO reset condition to embedded display only

Zhou Qingyang (1):
  drm/amd/display/dc/calcs/dce_calcs: Fix a memleak in calculate_bandwidth()

 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 81 ++
 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c   |  4 +-
 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c   |  1 -
 drivers/gpu/drm/amd/display/dc/core/dc.c   | 40 +++
 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c   |  6 +-
 drivers/gpu/drm/amd/display/dc/core/dc_resource.c  | 54 +++
 drivers/gpu/drm/amd/display/dc/dc.h|  1 +
 .../amd/display/dc/dce110/dce110_hw_sequencer.c| 10 ++-
 .../gpu/drm/amd/display/dc/dcn30/dcn30_resource.c  |  4 +-
 .../drm/amd/display/dc/dcn301/dcn301_resource.c| 13 +++-
 .../gpu/drm/amd/display/dc/dcn31/dcn31_resource.c  |  3 +
 .../display/dc/dml/dcn20/display_rq_dlg_calc_20.c  |  2 -
 .../dc/dml/dcn20/display_rq_dlg_calc_20v2.c|  2 -
 .../display/dc/dml/dcn21/display_rq_dlg_calc_21.c  |  2 -
 .../display/dc/dml/dcn30/display_rq_dlg_calc_30.c  |  2 -
 .../gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c |  2 +-
 .../gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.h |  2 +-
 .../drm/amd/display/dc/dml/display_mode_structs.h  |  1 -
 .../amd/display/dc/dml/display_rq_dlg_helpers.c|  3 -
 .../amd/display/dc/dml/dml1_display_rq_dlg_calc.c  |  4 --
 drivers/gpu/drm/amd/display/dc/inc/core_types.h|  1 +
 drivers/gpu/drm/amd/display/dc/inc/resource.h  | 11 +++
 22 files changed, 208 insertions(+), 41 deletions(-)


Re: [PATCH] drm/amd/display: Fix unused variable warning

2022-01-26 Thread Huang Rui
On Thu, Jan 27, 2022 at 11:33:50AM +0800, Huang, Tim wrote:
> [Why]
> It will build failed with unused variable 'dc' with
> '-Werror=unused-variable'enabled when CONFIG_DRM_AMD_DC_DCN
> is not defined.
> 
> Signed-off-by: Tim Huang 

Reviewed-by: Huang Rui 

> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 1057f976bec7..8f53c9f6b267 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -1027,7 +1027,6 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)
>   const unsigned char *fw_inst_const, *fw_bss_data;
>   uint32_t i, fw_inst_const_size, fw_bss_data_size;
>   bool has_hw_support;
> - struct dc *dc = adev->dm.dc;
>  
>   if (!dmub_srv)
>   /* DMUB isn't supported on the ASIC. */
> @@ -1123,7 +1122,7 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)
>   case IP_VERSION(3, 1, 3): /* Only for this asic hw internal rev B0 */
>   hw_params.dpia_supported = true;
>  #if defined(CONFIG_DRM_AMD_DC_DCN)
> - hw_params.disable_dpia = dc->debug.dpia_debug.bits.disable_dpia;
> + hw_params.disable_dpia = 
> adev->dm.dc->debug.dpia_debug.bits.disable_dpia;
>  #endif
>   break;
>   default:
> -- 
> 2.25.1
> 


RE: [PATCH] drm/amd/display: Fix unused variable warning

2022-01-26 Thread Liu, Aaron
[AMD Official Use Only]

Reviewed-by: Aaron Liu 

--
Best Regards
Aaron Liu

> -Original Message-
> From: Huang, Tim 
> Sent: Thursday, January 27, 2022 11:34 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Huang, Ray
> ; Liu, Aaron ; Huang, Tim
> 
> Subject: [PATCH] drm/amd/display: Fix unused variable warning
> 
> [Why]
> It will build failed with unused variable 'dc' with '-Werror=unused-
> variable'enabled when CONFIG_DRM_AMD_DC_DCN is not defined.
> 
> Signed-off-by: Tim Huang 
> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 1057f976bec7..8f53c9f6b267 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -1027,7 +1027,6 @@ static int dm_dmub_hw_init(struct
> amdgpu_device *adev)
>   const unsigned char *fw_inst_const, *fw_bss_data;
>   uint32_t i, fw_inst_const_size, fw_bss_data_size;
>   bool has_hw_support;
> - struct dc *dc = adev->dm.dc;
> 
>   if (!dmub_srv)
>   /* DMUB isn't supported on the ASIC. */ @@ -1123,7 +1122,7
> @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)
>   case IP_VERSION(3, 1, 3): /* Only for this asic hw internal rev B0 */
>   hw_params.dpia_supported = true;
>  #if defined(CONFIG_DRM_AMD_DC_DCN)
> - hw_params.disable_dpia = dc-
> >debug.dpia_debug.bits.disable_dpia;
> + hw_params.disable_dpia =
> +adev->dm.dc->debug.dpia_debug.bits.disable_dpia;
>  #endif
>   break;
>   default:
> --
> 2.25.1


Re: [PATCH] drm/amd/display: Fix unused variable warning

2022-01-26 Thread Alex Deucher
Reviewed-by: Alex Deucher 

On Wed, Jan 26, 2022 at 10:34 PM Tim Huang  wrote:
>
> [Why]
> It will build failed with unused variable 'dc' with
> '-Werror=unused-variable'enabled when CONFIG_DRM_AMD_DC_DCN
> is not defined.
>
> Signed-off-by: Tim Huang 
> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 1057f976bec7..8f53c9f6b267 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -1027,7 +1027,6 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)
> const unsigned char *fw_inst_const, *fw_bss_data;
> uint32_t i, fw_inst_const_size, fw_bss_data_size;
> bool has_hw_support;
> -   struct dc *dc = adev->dm.dc;
>
> if (!dmub_srv)
> /* DMUB isn't supported on the ASIC. */
> @@ -1123,7 +1122,7 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)
> case IP_VERSION(3, 1, 3): /* Only for this asic hw internal rev B0 */
> hw_params.dpia_supported = true;
>  #if defined(CONFIG_DRM_AMD_DC_DCN)
> -   hw_params.disable_dpia = 
> dc->debug.dpia_debug.bits.disable_dpia;
> +   hw_params.disable_dpia = 
> adev->dm.dc->debug.dpia_debug.bits.disable_dpia;
>  #endif
> break;
> default:
> --
> 2.25.1
>


Re: [PATCH] drm/amdgpu: Fix an error message in rmmod

2022-01-26 Thread Yin, Tianci (Rico)
[AMD Official Use Only]

The rmmod ops has prerequisite multi-user target and blacklist amdgpu,
which is IGT requirement so that IGT can make itself DRM master to test KMS.
igt-gpu-tools/build/tests/amdgpu/amd_module_load --run-subtest reload

>From my understanding, the KFD process belongs to the regular way of gfxoff 
>exit, which doorbell writing triggers gfxoff exit. For example, KFD maps HCQ 
>thru cmd on HIQ or KIQ ring, or UMD commits jobs on HCQ, these both trigger 
>doorbell writing(pls refer to gfx_v10_0_ring_set_wptr_compute()).

As to the IGT reload test, the dequeue request is not thru a cmd on a ring, it 
directly writes CP registers, so GFX core remains in gfxoff.

Thanks,
Rico


From: Kuehling, Felix 
Sent: Wednesday, January 26, 2022 23:08
To: Yin, Tianci (Rico) ; Wang, Yang(Kevin) 
; amd-gfx@lists.freedesktop.org 

Cc: Grodzovsky, Andrey ; Chen, Guchun 

Subject: Re: [PATCH] drm/amdgpu: Fix an error message in rmmod

My question is, why is this problem only seen during module unload? Why
aren't we seeing HWS hangs due to GFX_OFF all the time in normal
operations? For example when the GPU is idle and a new KFD process is
started, creating a new runlist. Are we just getting lucky because the
process first has to allocate some memory, which maybe makes some HW
access (flushing TLBs etc.) that wakes up the GPU?


Regards,
   Felix



Am 2022-01-26 um 01:43 schrieb Yin, Tianci (Rico):
>
> [AMD Official Use Only]
>
>
> Thanks Kevin and Felix!
>
> In gfxoff state, the dequeue request(by cp register writing) can't
> make gfxoff exit, actually the cp is powered off and the cp register
> writing is invalid, doorbell registers writing(regluar way) or
> directly request smu to disable gfx powergate(by invoking
> amdgpu_gfx_off_ctrl) can trigger gfxoff exit.
>
> I have also tryed
> amdgpu_dpm_switch_power_profile(adev,PP_SMC_POWER_PROFILE_COMPUTE,false),
> but it has no effect.
>
> [10386.162273] amdgpu: cp queue pipe 4 queue 0 preemption failed
> [10671.225065] amdgpu: mmCP_HQD_ACTIVE : 0x
> [10386.162290] amdgpu: mmCP_HQD_HQ_STATUS0 : 0x
> [10386.162297] amdgpu: mmCP_STAT : 0x
> [10386.162303] amdgpu: mmCP_BUSY_STAT : 0x
> [10386.162308] amdgpu: mmRLC_STAT : 0x
> [10386.162314] amdgpu: mmGRBM_STATUS : 0x
> [10386.162320] amdgpu: mmGRBM_STATUS2: 0x
>
> Thanks again!
> Rico
> 
> *From:* Kuehling, Felix 
> *Sent:* Tuesday, January 25, 2022 23:31
> *To:* Wang, Yang(Kevin) ; Yin, Tianci (Rico)
> ; amd-gfx@lists.freedesktop.org
> 
> *Cc:* Grodzovsky, Andrey ; Chen, Guchun
> 
> *Subject:* Re: [PATCH] drm/amdgpu: Fix an error message in rmmod
> I have no objection to the change. It restores the sequence that was
> used before e9669fb78262. But I don't understand why GFX_OFF is causing
> a preemption error during module unload, but not when KFD is in normal
> use. Maybe it's because of the compute power profile that's normally set
> by amdgpu_amdkfd_set_compute_idle before we interact with the HWS.
>
>
> Either way, the patch is
>
> Acked-by: Felix Kuehling 
>
>
>
> Am 2022-01-25 um 05:48 schrieb Wang, Yang(Kevin):
> >
> > [AMD Official Use Only]
> >
> >
> > [AMD Official Use Only]
> >
> >
> > the issue is introduced in following patch, so add following
> > information is better.
> > /fixes: (e9669fb78262) drm/amdgpu: Add early fini callback/
> > /
> > /
> > Reviewed-by: Yang Wang 
> > /
> > /
> > Best Regards,
> > Kevin
> >
> > 
> > *From:* amd-gfx  on behalf of
> > Tianci Yin 
> > *Sent:* Tuesday, January 25, 2022 6:03 PM
> > *To:* amd-gfx@lists.freedesktop.org 
> > *Cc:* Grodzovsky, Andrey ; Yin, Tianci
> > (Rico) ; Chen, Guchun 
> > *Subject:* [PATCH] drm/amdgpu: Fix an error message in rmmod
> > From: "Tianci.Yin" 
> >
> > [why]
> > In rmmod procedure, kfd sends cp a dequeue request, but the
> > request does not get response, then an error message "cp
> > queue pipe 4 queue 0 preemption failed" printed.
> >
> > [how]
> > Performing kfd suspending after disabling gfxoff can fix it.
> >
> > Change-Id: I0453f28820542d4a5ab26e38fb5b87ed76ce6930
> > Signed-off-by: Tianci.Yin 
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > index b75d67f644e5..77e9837ba342 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > @@ -2720,11 +2720,11 @@ static int amdgpu_device_ip_fini_early(struct
> > amdgpu_device *adev)
> >  }
> >  }
> >
> > -   amdgpu_amdkfd_suspend(adev, false);
> > -
> >  amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
> >  amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
> >
> 

[PATCH] drm/amd/display: Fix unused variable warning

2022-01-26 Thread Tim Huang
[Why]
It will build failed with unused variable 'dc' with
'-Werror=unused-variable'enabled when CONFIG_DRM_AMD_DC_DCN
is not defined.

Signed-off-by: Tim Huang 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 1057f976bec7..8f53c9f6b267 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1027,7 +1027,6 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)
const unsigned char *fw_inst_const, *fw_bss_data;
uint32_t i, fw_inst_const_size, fw_bss_data_size;
bool has_hw_support;
-   struct dc *dc = adev->dm.dc;
 
if (!dmub_srv)
/* DMUB isn't supported on the ASIC. */
@@ -1123,7 +1122,7 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)
case IP_VERSION(3, 1, 3): /* Only for this asic hw internal rev B0 */
hw_params.dpia_supported = true;
 #if defined(CONFIG_DRM_AMD_DC_DCN)
-   hw_params.disable_dpia = dc->debug.dpia_debug.bits.disable_dpia;
+   hw_params.disable_dpia = 
adev->dm.dc->debug.dpia_debug.bits.disable_dpia;
 #endif
break;
default:
-- 
2.25.1



[RFC PATCH v5 3/3] drm: remove allow_fb_modifiers

2022-01-26 Thread Tomohito Esaki
The allow_fb_modifiers flag is unnecessary since it has been replaced
with fb_modifiers_not_supported flag.

Signed-off-by: Tomohito Esaki 
---
 drivers/gpu/drm/selftests/test-drm_framebuffer.c |  1 -
 include/drm/drm_mode_config.h| 16 
 2 files changed, 17 deletions(-)

diff --git a/drivers/gpu/drm/selftests/test-drm_framebuffer.c 
b/drivers/gpu/drm/selftests/test-drm_framebuffer.c
index 61b44d3a6a61..f6d66285c5fc 100644
--- a/drivers/gpu/drm/selftests/test-drm_framebuffer.c
+++ b/drivers/gpu/drm/selftests/test-drm_framebuffer.c
@@ -323,7 +323,6 @@ static struct drm_device mock_drm_device = {
.max_width = MAX_WIDTH,
.min_height = MIN_HEIGHT,
.max_height = MAX_HEIGHT,
-   .allow_fb_modifiers = true,
.funcs = _config_funcs,
},
 };
diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
index 4a93dac91cf9..6b5e01295348 100644
--- a/include/drm/drm_mode_config.h
+++ b/include/drm/drm_mode_config.h
@@ -917,22 +917,6 @@ struct drm_mode_config {
 */
bool async_page_flip;
 
-   /**
-* @allow_fb_modifiers:
-*
-* Whether the driver supports fb modifiers in the ADDFB2.1 ioctl call.
-* Note that drivers should not set this directly, it is automatically
-* set in drm_universal_plane_init().
-*
-* IMPORTANT:
-*
-* If this is set the driver must fill out the full implicit modifier
-* information in their _mode_config_funcs.fb_create hook for legacy
-* userspace which does not set modifiers. Otherwise the GETFB2 ioctl is
-* broken for modifier aware userspace.
-*/
-   bool allow_fb_modifiers;
-
/**
 * @fb_modifiers_not_supported:
 *
-- 
2.25.1



[RFC PATCH v5 2/3] drm: add support modifiers for drivers whose planes only support linear layout

2022-01-26 Thread Tomohito Esaki
The LINEAR modifier is advertised as default if a driver doesn't specify
modifiers.

Signed-off-by: Tomohito Esaki 
---
 drivers/gpu/drm/drm_plane.c | 23 +--
 include/drm/drm_plane.h |  3 +++
 2 files changed, 16 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c
index deeec60a3315..bf0daa8d9bbd 100644
--- a/drivers/gpu/drm/drm_plane.c
+++ b/drivers/gpu/drm/drm_plane.c
@@ -237,6 +237,9 @@ static int __drm_universal_plane_init(struct drm_device 
*dev,
  const char *name, va_list ap)
 {
struct drm_mode_config *config = >mode_config;
+   static const uint64_t default_modifiers[] = {
+   DRM_FORMAT_MOD_LINEAR,
+   };
unsigned int format_modifier_count = 0;
int ret;
 
@@ -277,16 +280,16 @@ static int __drm_universal_plane_init(struct drm_device 
*dev,
 
while (*temp_modifiers++ != DRM_FORMAT_MOD_INVALID)
format_modifier_count++;
+   } else {
+   if (!dev->mode_config.fb_modifiers_not_supported) {
+   format_modifiers = default_modifiers;
+   format_modifier_count = ARRAY_SIZE(default_modifiers);
+   }
}
 
/* autoset the cap and check for consistency across all planes */
-   if (format_modifier_count) {
-   drm_WARN_ON(dev, !config->allow_fb_modifiers &&
-   !list_empty(>plane_list));
-   config->allow_fb_modifiers = true;
-   } else {
-   drm_WARN_ON(dev, config->allow_fb_modifiers);
-   }
+   drm_WARN_ON(dev, config->fb_modifiers_not_supported &&
+   format_modifier_count);
 
plane->modifier_count = format_modifier_count;
plane->modifiers = kmalloc_array(format_modifier_count,
@@ -341,7 +344,7 @@ static int __drm_universal_plane_init(struct drm_device 
*dev,
drm_object_attach_property(>base, config->prop_src_h, 0);
}
 
-   if (config->allow_fb_modifiers)
+   if (format_modifier_count)
create_in_format_blob(dev, plane);
 
return 0;
@@ -368,8 +371,8 @@ static int __drm_universal_plane_init(struct drm_device 
*dev,
  * drm_universal_plane_init() to let the DRM managed resource infrastructure
  * take care of cleanup and deallocation.
  *
- * Drivers supporting modifiers must set @format_modifiers on all their planes,
- * even those that only support DRM_FORMAT_MOD_LINEAR.
+ * Drivers that only support the DRM_FORMAT_MOD_LINEAR modifier support may set
+ * @format_modifiers to NULL. The plane will advertise the linear modifier.
  *
  * Returns:
  * Zero on success, error code on failure.
diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
index 0c1102dc4d88..a0390b6ad3b4 100644
--- a/include/drm/drm_plane.h
+++ b/include/drm/drm_plane.h
@@ -803,6 +803,9 @@ void *__drmm_universal_plane_alloc(struct drm_device *dev,
  *
  * The @drm_plane_funcs.destroy hook must be NULL.
  *
+ * Drivers that only support the DRM_FORMAT_MOD_LINEAR modifier support may set
+ * @format_modifiers to NULL. The plane will advertise the linear modifier.
+ *
  * Returns:
  * Pointer to new plane, or ERR_PTR on failure.
  */
-- 
2.25.1



[RFC PATCH v5 1/3] drm: introduce fb_modifiers_not_supported flag in mode_config

2022-01-26 Thread Tomohito Esaki
If only linear modifier is advertised, since there are many drivers that
only linear supported, the DRM core should handle this rather than
open-coding in every driver. However, there are legacy drivers such as
radeon that do not support modifiers but infer the actual layout of the
underlying buffer. Therefore, a new flag fb_modifiers_not_supported is
introduced for these legacy drivers, and allow_fb_modifiers is replaced
with this new flag.

Signed-off-by: Tomohito Esaki 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   |  6 +++---
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c|  2 ++
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c|  2 ++
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c |  1 +
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c |  2 ++
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  3 +++
 drivers/gpu/drm/drm_framebuffer.c |  6 +++---
 drivers/gpu/drm/drm_ioctl.c   |  2 +-
 drivers/gpu/drm/nouveau/nouveau_display.c |  6 --
 drivers/gpu/drm/radeon/radeon_display.c   |  2 ++
 include/drm/drm_mode_config.h | 10 ++
 11 files changed, 33 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 82011e75ed85..edbb30d47b8c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -954,7 +954,7 @@ static int amdgpu_display_verify_sizes(struct 
amdgpu_framebuffer *rfb)
int ret;
unsigned int i, block_width, block_height, block_size_log2;
 
-   if (!rfb->base.dev->mode_config.allow_fb_modifiers)
+   if (rfb->base.dev->mode_config.fb_modifiers_not_supported)
return 0;
 
for (i = 0; i < format_info->num_planes; ++i) {
@@ -1141,7 +1141,7 @@ int amdgpu_display_framebuffer_init(struct drm_device 
*dev,
if (ret)
return ret;
 
-   if (!dev->mode_config.allow_fb_modifiers) {
+   if (dev->mode_config.fb_modifiers_not_supported) {
drm_WARN_ONCE(dev, adev->family >= AMDGPU_FAMILY_AI,
  "GFX9+ requires FB check based on format 
modifier\n");
ret = check_tiling_flags_gfx6(rfb);
@@ -1149,7 +1149,7 @@ int amdgpu_display_framebuffer_init(struct drm_device 
*dev,
return ret;
}
 
-   if (dev->mode_config.allow_fb_modifiers &&
+   if (!dev->mode_config.fb_modifiers_not_supported &&
!(rfb->base.flags & DRM_MODE_FB_MODIFIERS)) {
ret = convert_tiling_flags_to_modifier(rfb);
if (ret) {
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index d1570a462a51..fb61c0814115 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2798,6 +2798,8 @@ static int dce_v10_0_sw_init(void *handle)
adev_to_drm(adev)->mode_config.preferred_depth = 24;
adev_to_drm(adev)->mode_config.prefer_shadow = 1;
 
+   adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true;
+
adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
 
r = amdgpu_display_modeset_create_props(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 18a7b3bd633b..17942a11366d 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2916,6 +2916,8 @@ static int dce_v11_0_sw_init(void *handle)
adev_to_drm(adev)->mode_config.preferred_depth = 24;
adev_to_drm(adev)->mode_config.prefer_shadow = 1;
 
+   adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true;
+
adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
 
r = amdgpu_display_modeset_create_props(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index c7803dc2b2d5..2ec99ec8e1a3 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -2674,6 +2674,7 @@ static int dce_v6_0_sw_init(void *handle)
adev_to_drm(adev)->mode_config.max_height = 16384;
adev_to_drm(adev)->mode_config.preferred_depth = 24;
adev_to_drm(adev)->mode_config.prefer_shadow = 1;
+   adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true;
adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
 
r = amdgpu_display_modeset_create_props(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 8318ee8339f1..de11fbe5aba2 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -2695,6 +2695,8 @@ static int dce_v8_0_sw_init(void *handle)
adev_to_drm(adev)->mode_config.preferred_depth = 24;
adev_to_drm(adev)->mode_config.prefer_shadow = 1;
 
+   

[RFC PATCH v5 0/3] Add support modifiers for drivers whose planes only support linear layout

2022-01-26 Thread Tomohito Esaki
Some drivers whose planes only support linear layout fb do not support format
modifiers.
These drivers should support modifiers, however the DRM core should handle this
rather than open-coding in every driver.

In this patch series, these drivers expose format modifiers based on the
following suggestion[1].

On Thu, Nov 18, 2021 at 01:02:11PM +, Daniel Stone wrote:
> I think the best way forward here is:
>   - add a new mode_config.cannot_support_modifiers flag, and enable
> this in radeon (plus any other drivers in the same boat)
>   - change drm_universal_plane_init() to advertise the LINEAR modifier
> when NULL is passed as the modifier list (including installing a
> default .format_mod_supported hook)
>   - remove the mode_config.allow_fb_modifiers hook and always
> advertise modifier support, unless
> mode_config.cannot_support_modifiers is set


[1] 
https://patchwork.kernel.org/project/linux-renesas-soc/patch/20190509054518.10781-1-e...@igel.co.jp/#24602575

v5:
* rebase to the latest master branch (5.17-rc1+)
+ "drm/plane: Make format_mod_supported truly optional" patch [2]
  [2] https://patchwork.freedesktop.org/patch/467940/?series=98255=3

* change default_modifiers array from non-static to static
* remove terminator in default_modifiers array
* use ARRAY_SIZE to get the format_modifier_count
* keep a sanity check in plane init func
* modify several kerneldocs

v4: https://www.spinics.net/lists/dri-devel/msg329508.html
* modify documentation for fb_modifiers_not_supported flag in kerneldoc

v3: https://www.spinics.net/lists/dri-devel/msg329102.html
* change the order as follows:
   1. add fb_modifiers_not_supported flag
   2. add default modifiers
   3. remove allow_fb_modifiers flag
* add a conditional disable in amdgpu_dm_plane_init()

v2: https://www.spinics.net/lists/dri-devel/msg328939.html
* rebase to the latest master branch (5.16.0+)
  + "drm/plane: Make format_mod_supported truly optional" patch [2]

v1: https://www.spinics.net/lists/dri-devel/msg327352.html
* The initial patch set

Tomohito Esaki (3):
  drm: introduce fb_modifiers_not_supported flag in mode_config
  drm: add support modifiers for drivers whose planes only support
linear layout
  drm: remove allow_fb_modifiers

 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   |  6 ++---
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c|  2 ++
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c|  2 ++
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c |  1 +
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c |  2 ++
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  3 +++
 drivers/gpu/drm/drm_framebuffer.c |  6 ++---
 drivers/gpu/drm/drm_ioctl.c   |  2 +-
 drivers/gpu/drm/drm_plane.c   | 23 +++
 drivers/gpu/drm/nouveau/nouveau_display.c |  6 +++--
 drivers/gpu/drm/radeon/radeon_display.c   |  2 ++
 .../gpu/drm/selftests/test-drm_framebuffer.c  |  1 -
 include/drm/drm_mode_config.h | 18 +--
 include/drm/drm_plane.h   |  3 +++
 14 files changed, 45 insertions(+), 32 deletions(-)

-- 
2.25.1



Re: [PATCH v3 09/10] tools: update hmm-test to support device coherent type

2022-01-26 Thread Sierra Guiza, Alejandro (Alex)



On 1/20/2022 12:14 AM, Alistair Popple wrote:

On Tuesday, 11 January 2022 9:32:00 AM AEDT Alex Sierra wrote:

Test cases such as migrate_fault and migrate_multiple, were modified to
explicit migrate from device to sys memory without the need of page
faults, when using device coherent type.

Snapshot test case updated to read memory device type first and based
on that, get the proper returned results migrate_ping_pong test case

Where is the migrate_ping_pong test? Did you perhaps forget to add it? :-)


Migration from device coherent to system is tested with migrate_multiple 
too. Therefore,
I've removed migrate_ping_pong test. BTW, I just added the "number of 
pages migrated"

checker after migrate from coherent to system on v4 series.

Regards,
Alejandro Sierra




added to test explicit migration from device to sys memory for both
private and coherent zone types.

Helpers to migrate from device to sys memory and vicerversa
were also added.

Signed-off-by: Alex Sierra 
---
v2:
Set FIXTURE_VARIANT to add multiple device types to the FIXTURE. This
will run all the tests for each device type (private and coherent) in
case both existed during hmm-test driver probed.
---
  tools/testing/selftests/vm/hmm-tests.c | 122 -
  1 file changed, 101 insertions(+), 21 deletions(-)

diff --git a/tools/testing/selftests/vm/hmm-tests.c 
b/tools/testing/selftests/vm/hmm-tests.c
index 864f126ffd78..8eb81dfba4b3 100644
--- a/tools/testing/selftests/vm/hmm-tests.c
+++ b/tools/testing/selftests/vm/hmm-tests.c
@@ -44,6 +44,14 @@ struct hmm_buffer {
int fd;
uint64_tcpages;
uint64_tfaults;
+   int zone_device_type;
+};
+
+enum {
+   HMM_PRIVATE_DEVICE_ONE,
+   HMM_PRIVATE_DEVICE_TWO,
+   HMM_COHERENCE_DEVICE_ONE,
+   HMM_COHERENCE_DEVICE_TWO,
  };
  
  #define TWOMEG		(1 << 21)

@@ -60,6 +68,21 @@ FIXTURE(hmm)
unsigned intpage_shift;
  };
  
+FIXTURE_VARIANT(hmm)

+{
+   int device_number;
+};
+
+FIXTURE_VARIANT_ADD(hmm, hmm_device_private)
+{
+   .device_number = HMM_PRIVATE_DEVICE_ONE,
+};
+
+FIXTURE_VARIANT_ADD(hmm, hmm_device_coherent)
+{
+   .device_number = HMM_COHERENCE_DEVICE_ONE,
+};
+
  FIXTURE(hmm2)
  {
int fd0;
@@ -68,6 +91,24 @@ FIXTURE(hmm2)
unsigned intpage_shift;
  };
  
+FIXTURE_VARIANT(hmm2)

+{
+   int device_number0;
+   int device_number1;
+};
+
+FIXTURE_VARIANT_ADD(hmm2, hmm2_device_private)
+{
+   .device_number0 = HMM_PRIVATE_DEVICE_ONE,
+   .device_number1 = HMM_PRIVATE_DEVICE_TWO,
+};
+
+FIXTURE_VARIANT_ADD(hmm2, hmm2_device_coherent)
+{
+   .device_number0 = HMM_COHERENCE_DEVICE_ONE,
+   .device_number1 = HMM_COHERENCE_DEVICE_TWO,
+};
+
  static int hmm_open(int unit)
  {
char pathname[HMM_PATH_MAX];
@@ -81,12 +122,19 @@ static int hmm_open(int unit)
return fd;
  }
  
+static bool hmm_is_coherent_type(int dev_num)

+{
+   return (dev_num >= HMM_COHERENCE_DEVICE_ONE);
+}
+
  FIXTURE_SETUP(hmm)
  {
self->page_size = sysconf(_SC_PAGE_SIZE);
self->page_shift = ffs(self->page_size) - 1;
  
-	self->fd = hmm_open(0);

+   self->fd = hmm_open(variant->device_number);
+   if (self->fd < 0 && hmm_is_coherent_type(variant->device_number))
+   SKIP(exit(0), "DEVICE_COHERENT not available");
ASSERT_GE(self->fd, 0);
  }
  
@@ -95,9 +143,11 @@ FIXTURE_SETUP(hmm2)

self->page_size = sysconf(_SC_PAGE_SIZE);
self->page_shift = ffs(self->page_size) - 1;
  
-	self->fd0 = hmm_open(0);

+   self->fd0 = hmm_open(variant->device_number0);
+   if (self->fd0 < 0 && hmm_is_coherent_type(variant->device_number0))
+   SKIP(exit(0), "DEVICE_COHERENT not available");
ASSERT_GE(self->fd0, 0);
-   self->fd1 = hmm_open(1);
+   self->fd1 = hmm_open(variant->device_number1);
ASSERT_GE(self->fd1, 0);
  }
  
@@ -144,6 +194,7 @@ static int hmm_dmirror_cmd(int fd,

}
buffer->cpages = cmd.cpages;
buffer->faults = cmd.faults;
+   buffer->zone_device_type = cmd.zone_device_type;
  
  	return 0;

  }
@@ -211,6 +262,20 @@ static void hmm_nanosleep(unsigned int n)
nanosleep(, NULL);
  }
  
+static int hmm_migrate_sys_to_dev(int fd,

+  struct hmm_buffer *buffer,
+  unsigned long npages)
+{
+   return hmm_dmirror_cmd(fd, HMM_DMIRROR_MIGRATE_TO_DEV, buffer, npages);
+}
+
+static int hmm_migrate_dev_to_sys(int fd,
+  struct hmm_buffer *buffer,
+  unsigned long npages)
+{
+   return hmm_dmirror_cmd(fd, HMM_DMIRROR_MIGRATE_TO_SYS, buffer, npages);
+}
+
  /*
   * Simple NULL test of device open/close.
   */
@@ -875,7 +940,7 @@ TEST_F(hmm, migrate)
ptr[i] = i;
  
  	/* Migrate memory to device. */

-   ret = hmm_dmirror_cmd(self->fd, 

[PATCH v4 04/10] drm/amdkfd: add SPM support for SVM

2022-01-26 Thread Alex Sierra
When CPU is connected throug XGMI, it has coherent
access to VRAM resource. In this case that resource
is taken from a table in the device gmc aperture base.
This resource is used along with the device type, which could
be DEVICE_PRIVATE or DEVICE_COHERENT to create the device
page map region.

Signed-off-by: Alex Sierra 
Reviewed-by: Felix Kuehling 
---
v7:
Remove lookup_resource call, so export symbol for this function
is not longer required. Patch dropped "kernel: resource:
lookup_resource as exported symbol"
---
 drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 29 +++-
 1 file changed, 18 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
index aeade32ec298..9e36fe8aea0f 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
@@ -935,7 +935,7 @@ int svm_migrate_init(struct amdgpu_device *adev)
 {
struct kfd_dev *kfddev = adev->kfd.dev;
struct dev_pagemap *pgmap;
-   struct resource *res;
+   struct resource *res = NULL;
unsigned long size;
void *r;
 
@@ -950,28 +950,34 @@ int svm_migrate_init(struct amdgpu_device *adev)
 * should remove reserved size
 */
size = ALIGN(adev->gmc.real_vram_size, 2ULL << 20);
-   res = devm_request_free_mem_region(adev->dev, _resource, size);
-   if (IS_ERR(res))
-   return -ENOMEM;
+   if (adev->gmc.xgmi.connected_to_cpu) {
+   pgmap->range.start = adev->gmc.aper_base;
+   pgmap->range.end = adev->gmc.aper_base + adev->gmc.aper_size - 
1;
+   pgmap->type = MEMORY_DEVICE_COHERENT;
+   } else {
+   res = devm_request_free_mem_region(adev->dev, _resource, 
size);
+   if (IS_ERR(res))
+   return -ENOMEM;
+   pgmap->range.start = res->start;
+   pgmap->range.end = res->end;
+   pgmap->type = MEMORY_DEVICE_PRIVATE;
+   }
 
-   pgmap->type = MEMORY_DEVICE_PRIVATE;
pgmap->nr_range = 1;
-   pgmap->range.start = res->start;
-   pgmap->range.end = res->end;
pgmap->ops = _migrate_pgmap_ops;
pgmap->owner = SVM_ADEV_PGMAP_OWNER(adev);
-   pgmap->flags = MIGRATE_VMA_SELECT_DEVICE_PRIVATE;
-
+   pgmap->flags = 0;
/* Device manager releases device-specific resources, memory region and
 * pgmap when driver disconnects from device.
 */
r = devm_memremap_pages(adev->dev, pgmap);
if (IS_ERR(r)) {
pr_err("failed to register HMM device memory\n");
-
/* Disable SVM support capability */
pgmap->type = 0;
-   devm_release_mem_region(adev->dev, res->start, 
resource_size(res));
+   if (pgmap->type == MEMORY_DEVICE_PRIVATE)
+   devm_release_mem_region(adev->dev, res->start,
+   res->end - res->start + 1);
return PTR_ERR(r);
}
 
@@ -984,3 +990,4 @@ int svm_migrate_init(struct amdgpu_device *adev)
 
return 0;
 }
+
-- 
2.32.0



[PATCH v4 10/10] tools: update test_hmm script to support SP config

2022-01-26 Thread Alex Sierra
Add two more parameters to set spm_addr_dev0 & spm_addr_dev1
addresses. These two parameters configure the start SP
addresses for each device in test_hmm driver.
Consequently, this configures zone device type as coherent.

Signed-off-by: Alex Sierra 
Reviewed-by: Alistair Popple 
---
v2:
Add more mknods for device coherent type. These are represented under
/dev/hmm_mirror2 and /dev/hmm_mirror3, only in case they have created
at probing the hmm-test driver.
---
 tools/testing/selftests/vm/test_hmm.sh | 24 +---
 1 file changed, 21 insertions(+), 3 deletions(-)

diff --git a/tools/testing/selftests/vm/test_hmm.sh 
b/tools/testing/selftests/vm/test_hmm.sh
index 0647b525a625..539c9371e592 100755
--- a/tools/testing/selftests/vm/test_hmm.sh
+++ b/tools/testing/selftests/vm/test_hmm.sh
@@ -40,11 +40,26 @@ check_test_requirements()
 
 load_driver()
 {
-   modprobe $DRIVER > /dev/null 2>&1
+   if [ $# -eq 0 ]; then
+   modprobe $DRIVER > /dev/null 2>&1
+   else
+   if [ $# -eq 2 ]; then
+   modprobe $DRIVER spm_addr_dev0=$1 spm_addr_dev1=$2
+   > /dev/null 2>&1
+   else
+   echo "Missing module parameters. Make sure pass"\
+   "spm_addr_dev0 and spm_addr_dev1"
+   usage
+   fi
+   fi
if [ $? == 0 ]; then
major=$(awk "\$2==\"HMM_DMIRROR\" {print \$1}" /proc/devices)
mknod /dev/hmm_dmirror0 c $major 0
mknod /dev/hmm_dmirror1 c $major 1
+   if [ $# -eq 2 ]; then
+   mknod /dev/hmm_dmirror2 c $major 2
+   mknod /dev/hmm_dmirror3 c $major 3
+   fi
fi
 }
 
@@ -58,7 +73,7 @@ run_smoke()
 {
echo "Running smoke test. Note, this test provides basic coverage."
 
-   load_driver
+   load_driver $1 $2
$(dirname "${BASH_SOURCE[0]}")/hmm-tests
unload_driver
 }
@@ -75,6 +90,9 @@ usage()
echo "# Smoke testing"
echo "./${TEST_NAME}.sh smoke"
echo
+   echo "# Smoke testing with SPM enabled"
+   echo "./${TEST_NAME}.sh smoke  "
+   echo
exit 0
 }
 
@@ -84,7 +102,7 @@ function run_test()
usage
else
if [ "$1" = "smoke" ]; then
-   run_smoke
+   run_smoke $2 $3
else
usage
fi
-- 
2.32.0



[PATCH v4 08/10] lib: add support for device coherent type in test_hmm

2022-01-26 Thread Alex Sierra
Device Coherent type uses device memory that is coherently accesible by
the CPU. This could be shown as SP (special purpose) memory range
at the BIOS-e820 memory enumeration. If no SP memory is supported in
system, this could be faked by setting CONFIG_EFI_FAKE_MEMMAP.

Currently, test_hmm only supports two different SP ranges of at least
256MB size. This could be specified in the kernel parameter variable
efi_fake_mem. Ex. Two SP ranges of 1GB starting at 0x1 &
0x14000 physical address. Ex.
efi_fake_mem=1G@0x1:0x4,1G@0x14000:0x4

Private and coherent device mirror instances can be created in the same
probed. This is done by passing the module parameters spm_addr_dev0 &
spm_addr_dev1. In this case, it will create four instances of
device_mirror. The first two correspond to private device type, the
last two to coherent type. Then, they can be easily accessed from user
space through /dev/hmm_mirror. Usually num_device 0 and 1
are for private, and 2 and 3 for coherent types. If no module
parameters are passed, two instances of private type device_mirror will
be created only.

Signed-off-by: Alex Sierra 
---
v4:
Return number of coherent device pages successfully migrated to system.
This is returned at cmd->cpages.
---
 lib/test_hmm.c  | 260 +---
 lib/test_hmm_uapi.h |  15 ++-
 2 files changed, 205 insertions(+), 70 deletions(-)

diff --git a/lib/test_hmm.c b/lib/test_hmm.c
index 6f068f7c4ee3..850d5331e370 100644
--- a/lib/test_hmm.c
+++ b/lib/test_hmm.c
@@ -29,11 +29,22 @@
 
 #include "test_hmm_uapi.h"
 
-#define DMIRROR_NDEVICES   2
+#define DMIRROR_NDEVICES   4
 #define DMIRROR_RANGE_FAULT_TIMEOUT1000
 #define DEVMEM_CHUNK_SIZE  (256 * 1024 * 1024U)
 #define DEVMEM_CHUNKS_RESERVE  16
 
+/*
+ * For device_private pages, dpage is just a dummy struct page
+ * representing a piece of device memory. dmirror_devmem_alloc_page
+ * allocates a real system memory page as backing storage to fake a
+ * real device. zone_device_data points to that backing page. But
+ * for device_coherent memory, the struct page represents real
+ * physical CPU-accessible memory that we can use directly.
+ */
+#define BACKING_PAGE(page) (is_device_private_page((page)) ? \
+  (page)->zone_device_data : (page))
+
 static unsigned long spm_addr_dev0;
 module_param(spm_addr_dev0, long, 0644);
 MODULE_PARM_DESC(spm_addr_dev0,
@@ -122,6 +133,21 @@ static int dmirror_bounce_init(struct dmirror_bounce 
*bounce,
return 0;
 }
 
+static bool dmirror_is_private_zone(struct dmirror_device *mdevice)
+{
+   return (mdevice->zone_device_type ==
+   HMM_DMIRROR_MEMORY_DEVICE_PRIVATE) ? true : false;
+}
+
+static enum migrate_vma_direction
+   dmirror_select_device(struct dmirror *dmirror)
+{
+   return (dmirror->mdevice->zone_device_type ==
+   HMM_DMIRROR_MEMORY_DEVICE_PRIVATE) ?
+   MIGRATE_VMA_SELECT_DEVICE_PRIVATE :
+   MIGRATE_VMA_SELECT_DEVICE_COHERENT;
+}
+
 static void dmirror_bounce_fini(struct dmirror_bounce *bounce)
 {
vfree(bounce->ptr);
@@ -572,16 +598,19 @@ static int dmirror_allocate_chunk(struct dmirror_device 
*mdevice,
 static struct page *dmirror_devmem_alloc_page(struct dmirror_device *mdevice)
 {
struct page *dpage = NULL;
-   struct page *rpage;
+   struct page *rpage = NULL;
 
/*
-* This is a fake device so we alloc real system memory to store
-* our device memory.
+* For ZONE_DEVICE private type, this is a fake device so we alloc real
+* system memory to store our device memory.
+* For ZONE_DEVICE coherent type we use the actual dpage to store the 
data
+* and ignore rpage.
 */
-   rpage = alloc_page(GFP_HIGHUSER);
-   if (!rpage)
-   return NULL;
-
+   if (dmirror_is_private_zone(mdevice)) {
+   rpage = alloc_page(GFP_HIGHUSER);
+   if (!rpage)
+   return NULL;
+   }
spin_lock(>lock);
 
if (mdevice->free_pages) {
@@ -601,7 +630,8 @@ static struct page *dmirror_devmem_alloc_page(struct 
dmirror_device *mdevice)
return dpage;
 
 error:
-   __free_page(rpage);
+   if (rpage)
+   __free_page(rpage);
return NULL;
 }
 
@@ -627,12 +657,16 @@ static void dmirror_migrate_alloc_and_copy(struct 
migrate_vma *args,
 * unallocated pte_none() or read-only zero page.
 */
spage = migrate_pfn_to_page(*src);
+   if (WARN(spage && is_zone_device_page(spage),
+"page already in device spage pfn: 0x%lx\n",
+page_to_pfn(spage)))
+   continue;
 
dpage = dmirror_devmem_alloc_page(mdevice);
if (!dpage)
continue;
 
-   rpage = 

[PATCH v4 07/10] lib: test_hmm add module param for zone device type

2022-01-26 Thread Alex Sierra
In order to configure device coherent in test_hmm, two module parameters
should be passed, which correspond to the SP start address of each
device (2) spm_addr_dev0 & spm_addr_dev1. If no parameters are passed,
private device type is configured.

Signed-off-by: Alex Sierra 
---
 lib/test_hmm.c  | 73 -
 lib/test_hmm_uapi.h |  1 +
 2 files changed, 53 insertions(+), 21 deletions(-)

diff --git a/lib/test_hmm.c b/lib/test_hmm.c
index fb1fa7c6fa98..6f068f7c4ee3 100644
--- a/lib/test_hmm.c
+++ b/lib/test_hmm.c
@@ -34,6 +34,16 @@
 #define DEVMEM_CHUNK_SIZE  (256 * 1024 * 1024U)
 #define DEVMEM_CHUNKS_RESERVE  16
 
+static unsigned long spm_addr_dev0;
+module_param(spm_addr_dev0, long, 0644);
+MODULE_PARM_DESC(spm_addr_dev0,
+   "Specify start address for SPM (special purpose memory) used 
for device 0. By setting this Coherent device type will be used. Make sure 
spm_addr_dev1 is set too. Minimum SPM size should be DEVMEM_CHUNK_SIZE.");
+
+static unsigned long spm_addr_dev1;
+module_param(spm_addr_dev1, long, 0644);
+MODULE_PARM_DESC(spm_addr_dev1,
+   "Specify start address for SPM (special purpose memory) used 
for device 1. By setting this Coherent device type will be used. Make sure 
spm_addr_dev0 is set too. Minimum SPM size should be DEVMEM_CHUNK_SIZE.");
+
 static const struct dev_pagemap_ops dmirror_devmem_ops;
 static const struct mmu_interval_notifier_ops dmirror_min_ops;
 static dev_t dmirror_dev;
@@ -452,28 +462,44 @@ static int dmirror_write(struct dmirror *dmirror, struct 
hmm_dmirror_cmd *cmd)
return ret;
 }
 
-static bool dmirror_allocate_chunk(struct dmirror_device *mdevice,
+static int dmirror_allocate_chunk(struct dmirror_device *mdevice,
   struct page **ppage)
 {
struct dmirror_chunk *devmem;
-   struct resource *res;
+   struct resource *res = NULL;
unsigned long pfn;
unsigned long pfn_first;
unsigned long pfn_last;
void *ptr;
+   int ret = -ENOMEM;
 
devmem = kzalloc(sizeof(*devmem), GFP_KERNEL);
if (!devmem)
-   return false;
+   return ret;
 
-   res = request_free_mem_region(_resource, DEVMEM_CHUNK_SIZE,
- "hmm_dmirror");
-   if (IS_ERR(res))
+   switch (mdevice->zone_device_type) {
+   case HMM_DMIRROR_MEMORY_DEVICE_PRIVATE:
+   res = request_free_mem_region(_resource, 
DEVMEM_CHUNK_SIZE,
+ "hmm_dmirror");
+   if (IS_ERR_OR_NULL(res))
+   goto err_devmem;
+   devmem->pagemap.range.start = res->start;
+   devmem->pagemap.range.end = res->end;
+   devmem->pagemap.type = MEMORY_DEVICE_PRIVATE;
+   break;
+   case HMM_DMIRROR_MEMORY_DEVICE_COHERENT:
+   devmem->pagemap.range.start = (MINOR(mdevice->cdevice.dev) - 2) 
?
+   spm_addr_dev0 :
+   spm_addr_dev1;
+   devmem->pagemap.range.end = devmem->pagemap.range.start +
+   DEVMEM_CHUNK_SIZE - 1;
+   devmem->pagemap.type = MEMORY_DEVICE_COHERENT;
+   break;
+   default:
+   ret = -EINVAL;
goto err_devmem;
+   }
 
-   devmem->pagemap.type = MEMORY_DEVICE_PRIVATE;
-   devmem->pagemap.range.start = res->start;
-   devmem->pagemap.range.end = res->end;
devmem->pagemap.nr_range = 1;
devmem->pagemap.ops = _devmem_ops;
devmem->pagemap.owner = mdevice;
@@ -494,10 +520,14 @@ static bool dmirror_allocate_chunk(struct dmirror_device 
*mdevice,
mdevice->devmem_capacity = new_capacity;
mdevice->devmem_chunks = new_chunks;
}
-
ptr = memremap_pages(>pagemap, numa_node_id());
-   if (IS_ERR(ptr))
+   if (IS_ERR_OR_NULL(ptr)) {
+   if (ptr)
+   ret = PTR_ERR(ptr);
+   else
+   ret = -EFAULT;
goto err_release;
+   }
 
devmem->mdevice = mdevice;
pfn_first = devmem->pagemap.range.start >> PAGE_SHIFT;
@@ -526,15 +556,17 @@ static bool dmirror_allocate_chunk(struct dmirror_device 
*mdevice,
}
spin_unlock(>lock);
 
-   return true;
+   return 0;
 
 err_release:
mutex_unlock(>devmem_lock);
-   release_mem_region(devmem->pagemap.range.start, 
range_len(>pagemap.range));
+   if (res && devmem->pagemap.type == MEMORY_DEVICE_PRIVATE)
+   release_mem_region(devmem->pagemap.range.start,
+  range_len(>pagemap.range));
 err_devmem:
kfree(devmem);
 
-   return false;
+   return ret;
 }
 
 static struct page *dmirror_devmem_alloc_page(struct dmirror_device 

[PATCH v4 09/10] tools: update hmm-test to support device coherent type

2022-01-26 Thread Alex Sierra
Test cases such as migrate_fault and migrate_multiple, were modified to
explicit migrate from device to sys memory without the need of page
faults, when using device coherent type.

Snapshot test case updated to read memory device type first and based
on that, get the proper returned results migrate_ping_pong test case
added to test explicit migration from device to sys memory for both
private and coherent zone types.

Helpers to migrate from device to sys memory and vicerversa
were also added.

Signed-off-by: Alex Sierra 
---
v2:
Set FIXTURE_VARIANT to add multiple device types to the FIXTURE. This
will run all the tests for each device type (private and coherent) in
case both existed during hmm-test driver probed.
v4:
Check for the number of pages successfully migrated from coherent
device to system at migrate_multiple test.
---
 tools/testing/selftests/vm/hmm-tests.c | 123 -
 1 file changed, 102 insertions(+), 21 deletions(-)

diff --git a/tools/testing/selftests/vm/hmm-tests.c 
b/tools/testing/selftests/vm/hmm-tests.c
index 864f126ffd78..99de5e38dbbc 100644
--- a/tools/testing/selftests/vm/hmm-tests.c
+++ b/tools/testing/selftests/vm/hmm-tests.c
@@ -44,6 +44,14 @@ struct hmm_buffer {
int fd;
uint64_tcpages;
uint64_tfaults;
+   int zone_device_type;
+};
+
+enum {
+   HMM_PRIVATE_DEVICE_ONE,
+   HMM_PRIVATE_DEVICE_TWO,
+   HMM_COHERENCE_DEVICE_ONE,
+   HMM_COHERENCE_DEVICE_TWO,
 };
 
 #define TWOMEG (1 << 21)
@@ -60,6 +68,21 @@ FIXTURE(hmm)
unsigned intpage_shift;
 };
 
+FIXTURE_VARIANT(hmm)
+{
+   int device_number;
+};
+
+FIXTURE_VARIANT_ADD(hmm, hmm_device_private)
+{
+   .device_number = HMM_PRIVATE_DEVICE_ONE,
+};
+
+FIXTURE_VARIANT_ADD(hmm, hmm_device_coherent)
+{
+   .device_number = HMM_COHERENCE_DEVICE_ONE,
+};
+
 FIXTURE(hmm2)
 {
int fd0;
@@ -68,6 +91,24 @@ FIXTURE(hmm2)
unsigned intpage_shift;
 };
 
+FIXTURE_VARIANT(hmm2)
+{
+   int device_number0;
+   int device_number1;
+};
+
+FIXTURE_VARIANT_ADD(hmm2, hmm2_device_private)
+{
+   .device_number0 = HMM_PRIVATE_DEVICE_ONE,
+   .device_number1 = HMM_PRIVATE_DEVICE_TWO,
+};
+
+FIXTURE_VARIANT_ADD(hmm2, hmm2_device_coherent)
+{
+   .device_number0 = HMM_COHERENCE_DEVICE_ONE,
+   .device_number1 = HMM_COHERENCE_DEVICE_TWO,
+};
+
 static int hmm_open(int unit)
 {
char pathname[HMM_PATH_MAX];
@@ -81,12 +122,19 @@ static int hmm_open(int unit)
return fd;
 }
 
+static bool hmm_is_coherent_type(int dev_num)
+{
+   return (dev_num >= HMM_COHERENCE_DEVICE_ONE);
+}
+
 FIXTURE_SETUP(hmm)
 {
self->page_size = sysconf(_SC_PAGE_SIZE);
self->page_shift = ffs(self->page_size) - 1;
 
-   self->fd = hmm_open(0);
+   self->fd = hmm_open(variant->device_number);
+   if (self->fd < 0 && hmm_is_coherent_type(variant->device_number))
+   SKIP(exit(0), "DEVICE_COHERENT not available");
ASSERT_GE(self->fd, 0);
 }
 
@@ -95,9 +143,11 @@ FIXTURE_SETUP(hmm2)
self->page_size = sysconf(_SC_PAGE_SIZE);
self->page_shift = ffs(self->page_size) - 1;
 
-   self->fd0 = hmm_open(0);
+   self->fd0 = hmm_open(variant->device_number0);
+   if (self->fd0 < 0 && hmm_is_coherent_type(variant->device_number0))
+   SKIP(exit(0), "DEVICE_COHERENT not available");
ASSERT_GE(self->fd0, 0);
-   self->fd1 = hmm_open(1);
+   self->fd1 = hmm_open(variant->device_number1);
ASSERT_GE(self->fd1, 0);
 }
 
@@ -144,6 +194,7 @@ static int hmm_dmirror_cmd(int fd,
}
buffer->cpages = cmd.cpages;
buffer->faults = cmd.faults;
+   buffer->zone_device_type = cmd.zone_device_type;
 
return 0;
 }
@@ -211,6 +262,20 @@ static void hmm_nanosleep(unsigned int n)
nanosleep(, NULL);
 }
 
+static int hmm_migrate_sys_to_dev(int fd,
+  struct hmm_buffer *buffer,
+  unsigned long npages)
+{
+   return hmm_dmirror_cmd(fd, HMM_DMIRROR_MIGRATE_TO_DEV, buffer, npages);
+}
+
+static int hmm_migrate_dev_to_sys(int fd,
+  struct hmm_buffer *buffer,
+  unsigned long npages)
+{
+   return hmm_dmirror_cmd(fd, HMM_DMIRROR_MIGRATE_TO_SYS, buffer, npages);
+}
+
 /*
  * Simple NULL test of device open/close.
  */
@@ -875,7 +940,7 @@ TEST_F(hmm, migrate)
ptr[i] = i;
 
/* Migrate memory to device. */
-   ret = hmm_dmirror_cmd(self->fd, HMM_DMIRROR_MIGRATE, buffer, npages);
+   ret = hmm_migrate_sys_to_dev(self->fd, buffer, npages);
ASSERT_EQ(ret, 0);
ASSERT_EQ(buffer->cpages, npages);
 
@@ -923,7 +988,7 @@ TEST_F(hmm, migrate_fault)
ptr[i] = i;
 
/* Migrate memory to device. */
-   ret = hmm_dmirror_cmd(self->fd, HMM_DMIRROR_MIGRATE, buffer, npages);
+  

[PATCH v4 06/10] lib: test_hmm add ioctl to get zone device type

2022-01-26 Thread Alex Sierra
new ioctl cmd added to query zone device type. This will be
used once the test_hmm adds zone device coherent type.

Signed-off-by: Alex Sierra 
---
 lib/test_hmm.c  | 23 +--
 lib/test_hmm_uapi.h |  8 
 2 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/lib/test_hmm.c b/lib/test_hmm.c
index c259842f6d44..fb1fa7c6fa98 100644
--- a/lib/test_hmm.c
+++ b/lib/test_hmm.c
@@ -84,6 +84,7 @@ struct dmirror_chunk {
 struct dmirror_device {
struct cdev cdevice;
struct hmm_devmem   *devmem;
+   unsigned intzone_device_type;
 
unsigned intdevmem_capacity;
unsigned intdevmem_count;
@@ -1025,6 +1026,15 @@ static int dmirror_snapshot(struct dmirror *dmirror,
return ret;
 }
 
+static int dmirror_get_device_type(struct dmirror *dmirror,
+   struct hmm_dmirror_cmd *cmd)
+{
+   mutex_lock(>mutex);
+   cmd->zone_device_type = dmirror->mdevice->zone_device_type;
+   mutex_unlock(>mutex);
+
+   return 0;
+}
 static long dmirror_fops_unlocked_ioctl(struct file *filp,
unsigned int command,
unsigned long arg)
@@ -1075,6 +1085,9 @@ static long dmirror_fops_unlocked_ioctl(struct file *filp,
ret = dmirror_snapshot(dmirror, );
break;
 
+   case HMM_DMIRROR_GET_MEM_DEV_TYPE:
+   ret = dmirror_get_device_type(dmirror, );
+   break;
default:
return -EINVAL;
}
@@ -1235,14 +1248,20 @@ static void dmirror_device_remove(struct dmirror_device 
*mdevice)
 static int __init hmm_dmirror_init(void)
 {
int ret;
-   int id;
+   int id = 0;
+   int ndevices = 0;
 
ret = alloc_chrdev_region(_dev, 0, DMIRROR_NDEVICES,
  "HMM_DMIRROR");
if (ret)
goto err_unreg;
 
-   for (id = 0; id < DMIRROR_NDEVICES; id++) {
+   memset(dmirror_devices, 0, DMIRROR_NDEVICES * 
sizeof(dmirror_devices[0]));
+   dmirror_devices[ndevices++].zone_device_type =
+   HMM_DMIRROR_MEMORY_DEVICE_PRIVATE;
+   dmirror_devices[ndevices++].zone_device_type =
+   HMM_DMIRROR_MEMORY_DEVICE_PRIVATE;
+   for (id = 0; id < ndevices; id++) {
ret = dmirror_device_init(dmirror_devices + id, id);
if (ret)
goto err_chrdev;
diff --git a/lib/test_hmm_uapi.h b/lib/test_hmm_uapi.h
index f14dea5dcd06..17f842f1aa02 100644
--- a/lib/test_hmm_uapi.h
+++ b/lib/test_hmm_uapi.h
@@ -19,6 +19,7 @@
  * @npages: (in) number of pages to read/write
  * @cpages: (out) number of pages copied
  * @faults: (out) number of device page faults seen
+ * @zone_device_type: (out) zone device memory type
  */
 struct hmm_dmirror_cmd {
__u64   addr;
@@ -26,6 +27,7 @@ struct hmm_dmirror_cmd {
__u64   npages;
__u64   cpages;
__u64   faults;
+   __u64   zone_device_type;
 };
 
 /* Expose the address space of the calling process through hmm device file */
@@ -35,6 +37,7 @@ struct hmm_dmirror_cmd {
 #define HMM_DMIRROR_SNAPSHOT   _IOWR('H', 0x03, struct hmm_dmirror_cmd)
 #define HMM_DMIRROR_EXCLUSIVE  _IOWR('H', 0x04, struct hmm_dmirror_cmd)
 #define HMM_DMIRROR_CHECK_EXCLUSIVE_IOWR('H', 0x05, struct hmm_dmirror_cmd)
+#define HMM_DMIRROR_GET_MEM_DEV_TYPE   _IOWR('H', 0x06, struct hmm_dmirror_cmd)
 
 /*
  * Values returned in hmm_dmirror_cmd.ptr for HMM_DMIRROR_SNAPSHOT.
@@ -62,4 +65,9 @@ enum {
HMM_DMIRROR_PROT_DEV_PRIVATE_REMOTE = 0x30,
 };
 
+enum {
+   /* 0 is reserved to catch uninitialized type fields */
+   HMM_DMIRROR_MEMORY_DEVICE_PRIVATE = 1,
+};
+
 #endif /* _LIB_TEST_HMM_UAPI_H */
-- 
2.32.0



[PATCH v4 05/10] drm/amdkfd: coherent type as sys mem on migration to ram

2022-01-26 Thread Alex Sierra
Coherent device type memory on VRAM to RAM migration, has similar access
as System RAM from the CPU. This flag sets the source from the sender.
Which in Coherent type case, should be set as
MIGRATE_VMA_SELECT_DEVICE_COHERENT.

Signed-off-by: Alex Sierra 
Reviewed-by: Felix Kuehling 
---
 drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
index 9e36fe8aea0f..3e405f078ade 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
@@ -661,9 +661,12 @@ svm_migrate_vma_to_ram(struct amdgpu_device *adev, struct 
svm_range *prange,
migrate.vma = vma;
migrate.start = start;
migrate.end = end;
-   migrate.flags = MIGRATE_VMA_SELECT_DEVICE_PRIVATE;
migrate.pgmap_owner = SVM_ADEV_PGMAP_OWNER(adev);
 
+   if (adev->gmc.xgmi.connected_to_cpu)
+   migrate.flags = MIGRATE_VMA_SELECT_DEVICE_COHERENT;
+   else
+   migrate.flags = MIGRATE_VMA_SELECT_DEVICE_PRIVATE;
size = 2 * sizeof(*migrate.src) + sizeof(uint64_t) + sizeof(dma_addr_t);
size *= npages;
buf = kvmalloc(size, GFP_KERNEL | __GFP_ZERO);
-- 
2.32.0



[PATCH v4 03/10] mm/gup: fail get_user_pages for LONGTERM dev coherent type

2022-01-26 Thread Alex Sierra
Avoid long term pinning for Coherent device type pages. This could
interfere with their own device memory manager. For now, we are just
returning error for PIN_LONGTERM Coherent device type pages. Eventually,
these type of pages will get migrated to system memory, once the device
migration pages support is added.

Signed-off-by: Alex Sierra 
---
 mm/gup.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/mm/gup.c b/mm/gup.c
index 886d6148d3d0..5291d7221826 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -1720,6 +1720,12 @@ static long check_and_migrate_movable_pages(unsigned 
long nr_pages,
 * If we get a movable page, since we are going to be pinning
 * these entries, try to move them out if possible.
 */
+   if (is_dev_private_or_coherent_page(head)) {
+   WARN_ON_ONCE(is_device_private_page(head));
+   ret = -EFAULT;
+   goto unpin_pages;
+   }
+
if (!is_pinnable_page(head)) {
if (PageHuge(head)) {
if (!isolate_huge_page(head, 
_page_list))
@@ -1750,6 +1756,7 @@ static long check_and_migrate_movable_pages(unsigned long 
nr_pages,
if (list_empty(_page_list) && !isolation_error_count)
return nr_pages;
 
+unpin_pages:
if (gup_flags & FOLL_PIN) {
unpin_user_pages(pages, nr_pages);
} else {
-- 
2.32.0



[PATCH v4 00/10] Add MEMORY_DEVICE_COHERENT for coherent device memory mapping

2022-01-26 Thread Alex Sierra
This patch series introduces MEMORY_DEVICE_COHERENT, a type of memory
owned by a device that can be mapped into CPU page tables like
MEMORY_DEVICE_GENERIC and can also be migrated like
MEMORY_DEVICE_PRIVATE.

Christoph, the suggestion to incorporate Ralph Campbell’s refcount
cleanup patch into our hardware page migration patchset originally came
from you, but it proved impractical to do things in that order because
the refcount cleanup introduced a bug with wide ranging structural
implications. Instead, we amended Ralph’s patch so that it could be
applied after merging the migration work. As we saw from the recent
discussion, merging the refcount work is going to take some time and
cooperation between multiple development groups, while the migration
work is ready now and is needed now. So we propose to merge this
patchset first and continue to work with Ralph and others to merge the
refcount cleanup separately, when it is ready.

This patch series is mostly self-contained except for a few places where
it needs to update other subsystems to handle the new memory type.

System stability and performance are not affected according to our
ongoing testing, including xfstests.

How it works: The system BIOS advertises the GPU device memory
(aka VRAM) as SPM (special purpose memory) in the UEFI system address
map.

The amdgpu driver registers the memory with devmap as
MEMORY_DEVICE_COHERENT using devm_memremap_pages. The initial user for
this hardware page migration capability is the Frontier supercomputer
project. This functionality is not AMD-specific. We expect other GPU
vendors to find this functionality useful, and possibly other hardware
types in the future.

Our test nodes in the lab are similar to the Frontier configuration,
with .5 TB of system memory plus 256 GB of device memory split across
4 GPUs, all in a single coherent address space. Page migration is
expected to improve application efficiency significantly. We will
report empirical results as they become available.

We extended hmm_test to cover migration of MEMORY_DEVICE_COHERENT. This
patch set builds on HMM and our SVM memory manager already merged in
5.15.

v2:
- test_hmm is now able to create private and coherent device mirror
instances in the same driver probe. This adds more usability to the hmm
test by not having to remove the kernel module for each device type
test (private/coherent type). This is done by passing the module
parameters spm_addr_dev0 & spm_addr_dev1. In this case, it will create
four instances of device_mirror. The first two correspond to private
device type, the last two to coherent type. Then, they can be easily
accessed from user space through /dev/hmm_mirror. Usually
num_device 0 and 1 are for private, and 2 and 3 for coherent types.

- Coherent device type pages at gup are now migrated back to system
memory if they have been long term pinned (FOLL_LONGTERM). The reason
is these pages could eventually interfere with their own device memory
manager. A new hmm_gup_test has been added to the hmm-test to test this
functionality. It makes use of the gup_test module to long term pin
user pages that have been migrate to device memory first.

- Other patch corrections made by Felix, Alistair and Christoph.

v3:
- Based on last v2 feedback we got from Alistair, we've decided to
remove migration logic for FOLL_LONGTERM coherent device type pages at
gup for now. Ideally, this should be done through the kernel mm,
instead of calling the device driver to do it. Currently, there's no
support for migrating device pages based on pfn, mainly because
migrate_pages() relies on pages being LRU pages. Alistair mentioned, he
has started to work on adding this migrate device pages logic. For now,
we fail on get_user_pages call with FOLL_LONGTERM for DEVICE_COHERENT
pages.

- Also, hmm_gup_test has been removed from hmm-test. We plan to include
it again after this migration work is ready.

- Addressed Liam Howlett's feedback changes.

v4:
- Addressed Alistair Popple's last v3 feedback.

- Use the same system entry path for coherent device pages at
migrate_vma_insert_page.

- Add coherent device type support for try_to_migrate /
try_to_migrate_one.

- Include number of coherent device pages successfully migrated back to
system at test_hmm. Made the proper changes to hmm-test to read/check
this number.

Alex Sierra (10):
  mm: add zone device coherent type memory support
  mm: add device coherent vma selection for memory migration
  mm/gup: fail get_user_pages for LONGTERM dev coherent type
  drm/amdkfd: add SPM support for SVM
  drm/amdkfd: coherent type as sys mem on migration to ram
  lib: test_hmm add ioctl to get zone device type
  lib: test_hmm add module param for zone device type
  lib: add support for device coherent type in test_hmm
  tools: update hmm-test to support device coherent type
  tools: update test_hmm script to support SP config

 drivers/gpu/drm/amd/amdkfd/kfd_migrate.c |  34 ++-
 include/linux/memremap.h | 

[PATCH v4 02/10] mm: add device coherent vma selection for memory migration

2022-01-26 Thread Alex Sierra
This case is used to migrate pages from device memory, back to system
memory. Device coherent type memory is cache coherent from device and CPU
point of view.

Signed-off-by: Alex Sierra 
---
v2:
condition added when migrations from device coherent pages.
---
 include/linux/migrate.h | 1 +
 mm/migrate.c| 9 +++--
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/include/linux/migrate.h b/include/linux/migrate.h
index c8077e936691..e74bb0978f6f 100644
--- a/include/linux/migrate.h
+++ b/include/linux/migrate.h
@@ -138,6 +138,7 @@ static inline unsigned long migrate_pfn(unsigned long pfn)
 enum migrate_vma_direction {
MIGRATE_VMA_SELECT_SYSTEM = 1 << 0,
MIGRATE_VMA_SELECT_DEVICE_PRIVATE = 1 << 1,
+   MIGRATE_VMA_SELECT_DEVICE_COHERENT = 1 << 2,
 };
 
 struct migrate_vma {
diff --git a/mm/migrate.c b/mm/migrate.c
index 277562cd4cf5..2b3375e165b1 100644
--- a/mm/migrate.c
+++ b/mm/migrate.c
@@ -2340,8 +2340,6 @@ static int migrate_vma_collect_pmd(pmd_t *pmdp,
if (is_writable_device_private_entry(entry))
mpfn |= MIGRATE_PFN_WRITE;
} else {
-   if (!(migrate->flags & MIGRATE_VMA_SELECT_SYSTEM))
-   goto next;
pfn = pte_pfn(pte);
if (is_zero_pfn(pfn)) {
mpfn = MIGRATE_PFN_MIGRATE;
@@ -2349,6 +2347,13 @@ static int migrate_vma_collect_pmd(pmd_t *pmdp,
goto next;
}
page = vm_normal_page(migrate->vma, addr, pte);
+   if (page && !is_zone_device_page(page) &&
+   !(migrate->flags & MIGRATE_VMA_SELECT_SYSTEM))
+   goto next;
+   if (page && is_device_coherent_page(page) &&
+   (!(migrate->flags & 
MIGRATE_VMA_SELECT_DEVICE_COHERENT) ||
+page->pgmap->owner != migrate->pgmap_owner))
+   goto next;
mpfn = migrate_pfn(pfn) | MIGRATE_PFN_MIGRATE;
mpfn |= pte_write(pte) ? MIGRATE_PFN_WRITE : 0;
}
-- 
2.32.0



[PATCH v4 01/10] mm: add zone device coherent type memory support

2022-01-26 Thread Alex Sierra
Device memory that is cache coherent from device and CPU point of view.
This is used on platforms that have an advanced system bus (like CAPI
or CXL). Any page of a process can be migrated to such memory. However,
no one should be allowed to pin such memory so that it can always be
evicted.

Signed-off-by: Alex Sierra 
---
v4:
- use the same system entry path for coherent device pages at
migrate_vma_insert_page.

- Add coherent device type support for try_to_migrate /
try_to_migrate_one.
---
 include/linux/memremap.h |  8 +++
 include/linux/mm.h   | 16 ++
 mm/memcontrol.c  |  6 ++---
 mm/memory-failure.c  |  8 +--
 mm/memremap.c| 14 +++-
 mm/migrate.c | 47 
 mm/rmap.c| 20 -
 7 files changed, 83 insertions(+), 36 deletions(-)

diff --git a/include/linux/memremap.h b/include/linux/memremap.h
index c0e9d35889e8..ff4d398edf35 100644
--- a/include/linux/memremap.h
+++ b/include/linux/memremap.h
@@ -39,6 +39,13 @@ struct vmem_altmap {
  * A more complete discussion of unaddressable memory may be found in
  * include/linux/hmm.h and Documentation/vm/hmm.rst.
  *
+ * MEMORY_DEVICE_COHERENT:
+ * Device memory that is cache coherent from device and CPU point of view. This
+ * is used on platforms that have an advanced system bus (like CAPI or CXL). A
+ * driver can hotplug the device memory using ZONE_DEVICE and with that memory
+ * type. Any page of a process can be migrated to such memory. However no one
+ * should be allowed to pin such memory so that it can always be evicted.
+ *
  * MEMORY_DEVICE_FS_DAX:
  * Host memory that has similar access semantics as System RAM i.e. DMA
  * coherent and supports page pinning. In support of coordinating page
@@ -59,6 +66,7 @@ struct vmem_altmap {
 enum memory_type {
/* 0 is reserved to catch uninitialized type fields */
MEMORY_DEVICE_PRIVATE = 1,
+   MEMORY_DEVICE_COHERENT,
MEMORY_DEVICE_FS_DAX,
MEMORY_DEVICE_GENERIC,
MEMORY_DEVICE_PCI_P2PDMA,
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 73a52aba448f..9c0bf1441da3 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -1162,6 +1162,7 @@ static inline bool page_is_devmap_managed(struct page 
*page)
return false;
switch (page->pgmap->type) {
case MEMORY_DEVICE_PRIVATE:
+   case MEMORY_DEVICE_COHERENT:
case MEMORY_DEVICE_FS_DAX:
return true;
default:
@@ -1191,6 +1192,21 @@ static inline bool is_device_private_page(const struct 
page *page)
page->pgmap->type == MEMORY_DEVICE_PRIVATE;
 }
 
+static inline bool is_device_coherent_page(const struct page *page)
+{
+   return IS_ENABLED(CONFIG_DEV_PAGEMAP_OPS) &&
+   is_zone_device_page(page) &&
+   page->pgmap->type == MEMORY_DEVICE_COHERENT;
+}
+
+static inline bool is_dev_private_or_coherent_page(const struct page *page)
+{
+   return IS_ENABLED(CONFIG_DEV_PAGEMAP_OPS) &&
+   is_zone_device_page(page) &&
+   (page->pgmap->type == MEMORY_DEVICE_PRIVATE ||
+   page->pgmap->type == MEMORY_DEVICE_COHERENT);
+}
+
 static inline bool is_pci_p2pdma_page(const struct page *page)
 {
return IS_ENABLED(CONFIG_DEV_PAGEMAP_OPS) &&
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index 6da5020a8656..b06262c3cdf9 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -5695,8 +5695,8 @@ static int mem_cgroup_move_account(struct page *page,
  *   2(MC_TARGET_SWAP): if the swap entry corresponding to this pte is a
  * target for charge migration. if @target is not NULL, the entry is stored
  * in target->ent.
- *   3(MC_TARGET_DEVICE): like MC_TARGET_PAGE  but page is 
MEMORY_DEVICE_PRIVATE
- * (so ZONE_DEVICE page and thus not on the lru).
+ *   3(MC_TARGET_DEVICE): like MC_TARGET_PAGE  but page is device memory and
+ *   thus not on the lru.
  * For now we such page is charge like a regular page would be as for all
  * intent and purposes it is just special memory taking the place of a
  * regular page.
@@ -5730,7 +5730,7 @@ static enum mc_target_type get_mctgt_type(struct 
vm_area_struct *vma,
 */
if (page_memcg(page) == mc.from) {
ret = MC_TARGET_PAGE;
-   if (is_device_private_page(page))
+   if (is_dev_private_or_coherent_page(page))
ret = MC_TARGET_DEVICE;
if (target)
target->page = page;
diff --git a/mm/memory-failure.c b/mm/memory-failure.c
index 3e6449f2102a..4cf212e5f432 100644
--- a/mm/memory-failure.c
+++ b/mm/memory-failure.c
@@ -1554,12 +1554,16 @@ static int memory_failure_dev_pagemap(unsigned long 
pfn, int flags,
goto unlock;
}
 
-   if (pgmap->type == MEMORY_DEVICE_PRIVATE) {
+   switch 

Re: [PATCH 2/2] drm/amdgpu: add 1.3.1/2.4.0 athub CG support

2022-01-26 Thread Alex Deucher
Reviewed-by: Alex Deucher 

On Wed, Jan 26, 2022 at 9:07 PM Huang Rui  wrote:
>
> On Thu, Jan 27, 2022 at 09:48:06AM +0800, Liu, Aaron wrote:
> > This patch adds 1.3.1/2.4.0 athub clock gating support.
> >
> > Signed-off-by: Aaron Liu 
>
> Series are Reviewed-by: Huang Rui 
>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/athub_v2_0.c | 1 +
> >  drivers/gpu/drm/amd/amdgpu/athub_v2_1.c | 1 +
> >  2 files changed, 2 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c 
> > b/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c
> > index ab6a07e5e8c4..a720436857b4 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c
> > @@ -78,6 +78,7 @@ int athub_v2_0_set_clockgating(struct amdgpu_device *adev,
> >   return 0;
> >
> >   switch (adev->ip_versions[ATHUB_HWIP][0]) {
> > + case IP_VERSION(1, 3, 1):
> >   case IP_VERSION(2, 0, 0):
> >   case IP_VERSION(2, 0, 2):
> >   athub_v2_0_update_medium_grain_clock_gating(adev,
> > diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v2_1.c 
> > b/drivers/gpu/drm/amd/amdgpu/athub_v2_1.c
> > index 2edefd10e56c..ad8e87d3d2cb 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/athub_v2_1.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/athub_v2_1.c
> > @@ -74,6 +74,7 @@ int athub_v2_1_set_clockgating(struct amdgpu_device *adev,
> >   case IP_VERSION(2, 1, 0):
> >   case IP_VERSION(2, 1, 1):
> >   case IP_VERSION(2, 1, 2):
> > + case IP_VERSION(2, 4, 0):
> >   athub_v2_1_update_medium_grain_clock_gating(adev, state == 
> > AMD_CG_STATE_GATE);
> >   athub_v2_1_update_medium_grain_light_sleep(adev, state == 
> > AMD_CG_STATE_GATE);
> >   break;
> > --
> > 2.25.1
> >


Re: [PATCH 1/2] drm/amdgpu: convert code name to ip version for athub

2022-01-26 Thread Alex Deucher
Reviewed-by: Alex Deucher 

On Wed, Jan 26, 2022 at 8:49 PM Aaron Liu  wrote:
>
> Use IP version rather than codename for athub.
>
> Signed-off-by: Aaron Liu 
> ---
>  drivers/gpu/drm/amd/amdgpu/athub_v1_0.c | 13 +++--
>  1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c 
> b/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c
> index 3ea557864320..88642e7ecdf4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c
> @@ -68,12 +68,13 @@ int athub_v1_0_set_clockgating(struct amdgpu_device *adev,
> if (amdgpu_sriov_vf(adev))
> return 0;
>
> -   switch (adev->asic_type) {
> -   case CHIP_VEGA10:
> -   case CHIP_VEGA12:
> -   case CHIP_VEGA20:
> -   case CHIP_RAVEN:
> -   case CHIP_RENOIR:
> +   switch (adev->ip_versions[ATHUB_HWIP][0]) {
> +   case IP_VERSION(9, 0, 0):
> +   case IP_VERSION(9, 1, 0):
> +   case IP_VERSION(9, 2, 0):
> +   case IP_VERSION(9, 3, 0):
> +   case IP_VERSION(9, 4, 0):
> +   case IP_VERSION(1, 5, 0):
> athub_update_medium_grain_clock_gating(adev,
> state == AMD_CG_STATE_GATE);
> athub_update_medium_grain_light_sleep(adev,
> --
> 2.25.1
>


RE: [PATCH v3 3/3] amdgpu/pm: Linked emit_clock_levels to use cases amdgpu_get_pp_{dpm_clock,od_clk_voltage}

2022-01-26 Thread Quan, Evan
[AMD Official Use Only]

Series is reviewed-by: Evan Quan 

> -Original Message-
> From: Powell, Darren 
> Sent: Wednesday, January 26, 2022 12:55 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Powell, Darren 
> Subject: [PATCH v3 3/3] amdgpu/pm: Linked emit_clock_levels to use cases
> amdgpu_get_pp_{dpm_clock,od_clk_voltage}
> 
>(v3)
>  Rewrote patchset to order patches as (API, hw impl, usecase)
> 
>  - modified amdgpu_get_pp_od_clk_voltage to try
> amdgpu_dpm_emit_clock_levels and
>fallback to amdgpu_dpm_print_clock_levels if emit is not implemented.
>  - modified amdgpu_get_pp_dpm_clock to try
> amdgpu_dpm_emit_clock_levels and
>fallback to amdgpu_dpm_print_clock_levels if emit is not implemented.
>  - Newline is printed to buf if no output produced
> 
>  == Test ==
>  LOGFILE=pp_clk.test.log
>  AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`
>  AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR |
> awk '{print $9}'`
>  HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}
> 
>  lspci -nn | grep "VGA\|Display"  > $LOGFILE
>  FILES="pp_od_clk_voltage
>  pp_dpm_sclk
>  pp_dpm_mclk
>  pp_dpm_pcie
>  pp_dpm_socclk
>  pp_dpm_fclk
>  pp_dpm_dcefclk
>  pp_dpm_vclk
>  pp_dpm_dclk "
> 
>  for f in $FILES
>  do
>echo === $f === >> $LOGFILE
>cat $HWMON_DIR/device/$f >> $LOGFILE
>  done
>  cat $LOGFILE
> 
> Signed-off-by: Darren Powell 
> ---
>  drivers/gpu/drm/amd/pm/amdgpu_pm.c | 49 +--
> ---
>  1 file changed, 35 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> index d2823aaeca09..a11def0ee761 100644
> --- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> +++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> @@ -832,8 +832,17 @@ static ssize_t
> amdgpu_get_pp_od_clk_voltage(struct device *dev,
>  {
>   struct drm_device *ddev = dev_get_drvdata(dev);
>   struct amdgpu_device *adev = drm_to_adev(ddev);
> - ssize_t size;
> + int size = 0;
>   int ret;
> + enum pp_clock_type od_clocks[6] = {
> + OD_SCLK,
> + OD_MCLK,
> + OD_VDDC_CURVE,
> + OD_RANGE,
> + OD_VDDGFX_OFFSET,
> + OD_CCLK,
> + };
> + uint clk_index;
> 
>   if (amdgpu_in_reset(adev))
>   return -EPERM;
> @@ -846,16 +855,25 @@ static ssize_t
> amdgpu_get_pp_od_clk_voltage(struct device *dev,
>   return ret;
>   }
> 
> - size = amdgpu_dpm_print_clock_levels(adev, OD_SCLK, buf);
> - if (size > 0) {
> - size += amdgpu_dpm_print_clock_levels(adev, OD_MCLK,
> buf+size);
> - size += amdgpu_dpm_print_clock_levels(adev,
> OD_VDDC_CURVE, buf+size);
> - size += amdgpu_dpm_print_clock_levels(adev,
> OD_VDDGFX_OFFSET, buf+size);
> - size += amdgpu_dpm_print_clock_levels(adev, OD_RANGE,
> buf+size);
> - size += amdgpu_dpm_print_clock_levels(adev, OD_CCLK,
> buf+size);
> - } else {
> - size = sysfs_emit(buf, "\n");
> + for(clk_index = 0 ; clk_index < 6 ; clk_index++) {
> + ret = amdgpu_dpm_emit_clock_levels(adev,
> od_clocks[clk_index], buf, );
> + if (ret)
> + break;
> + }
> + if (ret == -ENOENT) {
> + size = amdgpu_dpm_print_clock_levels(adev, OD_SCLK, buf);
> + if (size > 0) {
> + size += amdgpu_dpm_print_clock_levels(adev,
> OD_MCLK, buf+size);
> + size += amdgpu_dpm_print_clock_levels(adev,
> OD_VDDC_CURVE, buf+size);
> + size += amdgpu_dpm_print_clock_levels(adev,
> OD_VDDGFX_OFFSET, buf+size);
> + size += amdgpu_dpm_print_clock_levels(adev,
> OD_RANGE, buf+size);
> + size += amdgpu_dpm_print_clock_levels(adev,
> OD_CCLK, buf+size);
> + }
>   }
> +
> + if (size == 0)
> + size = sysfs_emit(buf, "\n");
> +
>   pm_runtime_mark_last_busy(ddev->dev);
>   pm_runtime_put_autosuspend(ddev->dev);
> 
> @@ -980,8 +998,8 @@ static ssize_t amdgpu_get_pp_dpm_clock(struct
> device *dev,
>  {
>   struct drm_device *ddev = dev_get_drvdata(dev);
>   struct amdgpu_device *adev = drm_to_adev(ddev);
> - ssize_t size;
> - int ret;
> + int size = 0;
> + int ret = 0;
> 
>   if (amdgpu_in_reset(adev))
>   return -EPERM;
> @@ -994,8 +1012,11 @@ static ssize_t amdgpu_get_pp_dpm_clock(struct
> device *dev,
>   return ret;
>   }
> 
> - size = amdgpu_dpm_print_clock_levels(adev, type, buf);
> - if (size <= 0)
> + ret = amdgpu_dpm_emit_clock_levels(adev, type, buf, );
> + if (ret == -ENOENT)
> + size = amdgpu_dpm_print_clock_levels(adev, type, buf);
> +
> + if (size == 0)
>   size = sysfs_emit(buf, "\n");
> 
>   pm_runtime_mark_last_busy(ddev->dev);
> --
> 2.34.1


Re: [PATCH 2/2] drm/amdgpu: add 1.3.1/2.4.0 athub CG support

2022-01-26 Thread Huang Rui
On Thu, Jan 27, 2022 at 09:48:06AM +0800, Liu, Aaron wrote:
> This patch adds 1.3.1/2.4.0 athub clock gating support.
> 
> Signed-off-by: Aaron Liu 

Series are Reviewed-by: Huang Rui 

> ---
>  drivers/gpu/drm/amd/amdgpu/athub_v2_0.c | 1 +
>  drivers/gpu/drm/amd/amdgpu/athub_v2_1.c | 1 +
>  2 files changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c 
> b/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c
> index ab6a07e5e8c4..a720436857b4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c
> @@ -78,6 +78,7 @@ int athub_v2_0_set_clockgating(struct amdgpu_device *adev,
>   return 0;
>  
>   switch (adev->ip_versions[ATHUB_HWIP][0]) {
> + case IP_VERSION(1, 3, 1):
>   case IP_VERSION(2, 0, 0):
>   case IP_VERSION(2, 0, 2):
>   athub_v2_0_update_medium_grain_clock_gating(adev,
> diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v2_1.c 
> b/drivers/gpu/drm/amd/amdgpu/athub_v2_1.c
> index 2edefd10e56c..ad8e87d3d2cb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/athub_v2_1.c
> +++ b/drivers/gpu/drm/amd/amdgpu/athub_v2_1.c
> @@ -74,6 +74,7 @@ int athub_v2_1_set_clockgating(struct amdgpu_device *adev,
>   case IP_VERSION(2, 1, 0):
>   case IP_VERSION(2, 1, 1):
>   case IP_VERSION(2, 1, 2):
> + case IP_VERSION(2, 4, 0):
>   athub_v2_1_update_medium_grain_clock_gating(adev, state == 
> AMD_CG_STATE_GATE);
>   athub_v2_1_update_medium_grain_light_sleep(adev, state == 
> AMD_CG_STATE_GATE);
>   break;
> -- 
> 2.25.1
> 


[PATCH 2/2] drm/amdgpu: add 1.3.1/2.4.0 athub CG support

2022-01-26 Thread Aaron Liu
This patch adds 1.3.1/2.4.0 athub clock gating support.

Signed-off-by: Aaron Liu 
---
 drivers/gpu/drm/amd/amdgpu/athub_v2_0.c | 1 +
 drivers/gpu/drm/amd/amdgpu/athub_v2_1.c | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c 
b/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c
index ab6a07e5e8c4..a720436857b4 100644
--- a/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c
@@ -78,6 +78,7 @@ int athub_v2_0_set_clockgating(struct amdgpu_device *adev,
return 0;
 
switch (adev->ip_versions[ATHUB_HWIP][0]) {
+   case IP_VERSION(1, 3, 1):
case IP_VERSION(2, 0, 0):
case IP_VERSION(2, 0, 2):
athub_v2_0_update_medium_grain_clock_gating(adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v2_1.c 
b/drivers/gpu/drm/amd/amdgpu/athub_v2_1.c
index 2edefd10e56c..ad8e87d3d2cb 100644
--- a/drivers/gpu/drm/amd/amdgpu/athub_v2_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/athub_v2_1.c
@@ -74,6 +74,7 @@ int athub_v2_1_set_clockgating(struct amdgpu_device *adev,
case IP_VERSION(2, 1, 0):
case IP_VERSION(2, 1, 1):
case IP_VERSION(2, 1, 2):
+   case IP_VERSION(2, 4, 0):
athub_v2_1_update_medium_grain_clock_gating(adev, state == 
AMD_CG_STATE_GATE);
athub_v2_1_update_medium_grain_light_sleep(adev, state == 
AMD_CG_STATE_GATE);
break;
-- 
2.25.1



[PATCH 1/2] drm/amdgpu: convert code name to ip version for athub

2022-01-26 Thread Aaron Liu
Use IP version rather than codename for athub.

Signed-off-by: Aaron Liu 
---
 drivers/gpu/drm/amd/amdgpu/athub_v1_0.c | 13 +++--
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c 
b/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c
index 3ea557864320..88642e7ecdf4 100644
--- a/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c
@@ -68,12 +68,13 @@ int athub_v1_0_set_clockgating(struct amdgpu_device *adev,
if (amdgpu_sriov_vf(adev))
return 0;
 
-   switch (adev->asic_type) {
-   case CHIP_VEGA10:
-   case CHIP_VEGA12:
-   case CHIP_VEGA20:
-   case CHIP_RAVEN:
-   case CHIP_RENOIR:
+   switch (adev->ip_versions[ATHUB_HWIP][0]) {
+   case IP_VERSION(9, 0, 0):
+   case IP_VERSION(9, 1, 0):
+   case IP_VERSION(9, 2, 0):
+   case IP_VERSION(9, 3, 0):
+   case IP_VERSION(9, 4, 0):
+   case IP_VERSION(1, 5, 0):
athub_update_medium_grain_clock_gating(adev,
state == AMD_CG_STATE_GATE);
athub_update_medium_grain_light_sleep(adev,
-- 
2.25.1



[PATCH v6 2/4] drm/amd: Warn users about potential s0ix problems

2022-01-26 Thread Mario Limonciello
On some OEM setups users can configure the BIOS for S3 or S2idle.
When configured to S3 users can still choose 's2idle' in the kernel by
using `/sys/power/mem_sleep`.  Before commit 6dc8265f9803 ("drm/amdgpu:
always reset the asic in suspend (v2)"), the GPU would crash.  Now when
configured this way, the system should resume but will use more power.

As such, adjust the `amdpu_acpi_is_s0ix function` to warn users about
potential power consumption issues during their first attempt at
suspending.

Reported-by: Bjoren Dasse 
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1824
Signed-off-by: Mario Limonciello 
---
v5->v6:
 * Make CONFIG_SUSPEND wrap around entire function to make more readable
 * Return false if system not properly configured (relevant with later patch)
 drivers/gpu/drm/amd/amdgpu/amdgpu.h  |  8 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 24 +++-
 2 files changed, 25 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 3bc76759c143..b1db703753f2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1409,12 +1409,10 @@ int amdgpu_acpi_smart_shift_update(struct drm_device 
*dev, enum amdgpu_ss ss_sta
 int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);
 
 void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_backlight_caps *caps);
-bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
 void amdgpu_acpi_detect(void);
 #else
 static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }
 static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }
-static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { 
return false; }
 static inline void amdgpu_acpi_detect(void) { }
 static inline bool amdgpu_acpi_is_power_shift_control_supported(void) { return 
false; }
 static inline int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,
@@ -1423,6 +1421,12 @@ static inline int amdgpu_acpi_smart_shift_update(struct 
drm_device *dev,
 enum amdgpu_ss ss_state) { 
return 0; }
 #endif
 
+#if defined(CONFIG_ACPI) && defined(CONFIG_SUSPEND)
+bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
+#else
+static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { 
return false; }
+#endif
+
 int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
   uint64_t addr, struct amdgpu_bo **bo,
   struct amdgpu_bo_va_mapping **mapping);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
index 4811b0faafd9..b19d40751802 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
@@ -1031,6 +1031,7 @@ void amdgpu_acpi_detect(void)
}
 }
 
+#if IS_ENABLED(CONFIG_SUSPEND)
 /**
  * amdgpu_acpi_is_s0ix_active
  *
@@ -1040,11 +1041,24 @@ void amdgpu_acpi_detect(void)
  */
 bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev)
 {
-#if IS_ENABLED(CONFIG_AMD_PMC) && IS_ENABLED(CONFIG_SUSPEND)
-   if (acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0) {
-   if (adev->flags & AMD_IS_APU)
-   return pm_suspend_target_state == PM_SUSPEND_TO_IDLE;
+   if (!(adev->flags & AMD_IS_APU) ||
+   (pm_suspend_target_state != PM_SUSPEND_TO_IDLE))
+   return false;
+
+   if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0)) {
+   dev_warn_once(adev->dev,
+ "Power consumption will be higher as BIOS has not 
been configured for suspend-to-idle.\n"
+ "To use suspend-to-idle change the sleep mode in 
BIOS setup.\n");
+   return false;
}
-#endif
+
+#if !IS_ENABLED(CONFIG_AMD_PMC)
+   dev_warn_once(adev->dev,
+ "Power consumption will be higher as the kernel has not 
been compiled with CONFIG_AMD_PMC.\n");
return false;
+#else
+   return true;
+#endif /* CONFIG_AMD_PMC */
 }
+
+#endif /* CONFIG_SUSPEND */
-- 
2.25.1



[PATCH v6 3/4] drm/amd: add support to check whether the system is set to s3

2022-01-26 Thread Mario Limonciello
This will be used to help make decisions on what to do in
misconfigured systems.

Signed-off-by: Mario Limonciello 
---
v5->v6:
 * Move in CONFIG_SUSPEND block
 drivers/gpu/drm/amd/amdgpu/amdgpu.h  |  2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 13 +
 2 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index b1db703753f2..30dc18c2d1fc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1422,9 +1422,11 @@ static inline int amdgpu_acpi_smart_shift_update(struct 
drm_device *dev,
 #endif
 
 #if defined(CONFIG_ACPI) && defined(CONFIG_SUSPEND)
+bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
 bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
 #else
 static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { 
return false; }
+static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { 
return false };
 #endif
 
 int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
index b19d40751802..0e12315fa0cb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
@@ -1032,6 +1032,19 @@ void amdgpu_acpi_detect(void)
 }
 
 #if IS_ENABLED(CONFIG_SUSPEND)
+/**
+ * amdgpu_acpi_is_s3_active
+ *
+ * @adev: amdgpu_device_pointer
+ *
+ * returns true if supported, false if not.
+ */
+bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev)
+{
+   return !(adev->flags & AMD_IS_APU) ||
+   (pm_suspend_target_state == PM_SUSPEND_MEM);
+}
+
 /**
  * amdgpu_acpi_is_s0ix_active
  *
-- 
2.25.1



[PATCH v6 4/4] drm/amd: Only run s3 or s0ix if system is configured properly

2022-01-26 Thread Mario Limonciello
This will cause misconfigured systems to not run the GPU suspend
routines.

* In APUs that are properly configured system will go into s2idle.
* In APUs that are intended to be S3 but user selects
  s2idle the GPU will stay fully powered for the suspend.
* In APUs that are intended to be s2idle and system misconfigured
  the GPU will stay fully powered for the suspend.
* In systems that are intended to be s2idle, but AMD dGPU is also
  present, the dGPU will go through S3

Signed-off-by: Mario Limonciello 
---
v5->v6:
 * Move code into prepare vfunc and use DPM_FLAG_SMART_SUSPEND to skip
   suspend code in incorrectly configured systems.
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 922accdd4246..3e581f35f19d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -2289,6 +2289,7 @@ static void amdgpu_drv_delayed_reset_work_handler(struct 
work_struct *work)
 static int amdgpu_pmops_prepare(struct device *dev)
 {
struct drm_device *drm_dev = dev_get_drvdata(dev);
+   struct amdgpu_device *adev = drm_to_adev(drm_dev);
 
/* Return a positive number here so
 * DPM_FLAG_SMART_SUSPEND works properly
@@ -2296,6 +2297,13 @@ static int amdgpu_pmops_prepare(struct device *dev)
if (amdgpu_device_supports_boco(drm_dev))
return pm_runtime_suspended(dev);
 
+   /* if we will not support s3 or s2i for the device
+*  then skip suspend
+*/
+   if (!amdgpu_acpi_is_s0ix_active(adev) &&
+   !amdgpu_acpi_is_s3_active(adev))
+   return 1;
+
return 0;
 }
 
-- 
2.25.1



[PATCH v6 1/4] drm/amd: avoid suspend on dGPUs w/ s2idle support when runtime PM enabled

2022-01-26 Thread Mario Limonciello
dGPUs connected to Intel systems configured for suspend to idle
will not have the power rails cut at suspend and resetting the GPU
may lead to problematic behaviors.

Fixes: e25443d2765f4 ("drm/amdgpu: add a dev_pm_ops prepare callback (v2)")
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1879
Signed-off-by: Mario Limonciello 
---
v5->v6:
 * Move patch to the start of the series so it can go in even if the rest need
   work
 * Change approach that if dGPU is in BOCO just skip suspend
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index b0a620c26ae2..922accdd4246 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -2294,8 +2294,7 @@ static int amdgpu_pmops_prepare(struct device *dev)
 * DPM_FLAG_SMART_SUSPEND works properly
 */
if (amdgpu_device_supports_boco(drm_dev))
-   return pm_runtime_suspended(dev) &&
-   pm_suspend_via_firmware();
+   return pm_runtime_suspended(dev);
 
return 0;
 }
-- 
2.25.1



[PATCH v10 5/5] drm/amdgpu: add drm buddy support to amdgpu

2022-01-26 Thread Arunpravin
- Remove drm_mm references and replace with drm buddy functionalities
- Add res cursor support for drm buddy

v2(Matthew Auld):
  - replace spinlock with mutex as we call kmem_cache_zalloc
(..., GFP_KERNEL) in drm_buddy_alloc() function

  - lock drm_buddy_block_trim() function as it calls
mark_free/mark_split are all globally visible

v3(Matthew Auld):
  - remove trim method error handling as we address the failure case
at drm_buddy_block_trim() function

v4:
  - fix warnings reported by kernel test robot 

v5:
  - fix merge conflict issue

Signed-off-by: Arunpravin 
---
 drivers/gpu/drm/Kconfig   |   1 +
 .../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h|  97 +--
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h   |   7 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c  | 259 ++
 4 files changed, 231 insertions(+), 133 deletions(-)

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index dfdd3ec5f793..eb5a57ae3c5c 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -279,6 +279,7 @@ config DRM_AMDGPU
select HWMON
select BACKLIGHT_CLASS_DEVICE
select INTERVAL_TREE
+   select DRM_BUDDY
help
  Choose this option if you have a recent AMD Radeon graphics card.
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
index acfa207cf970..da12b4ff2e45 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
@@ -30,12 +30,15 @@
 #include 
 #include 
 
+#include "amdgpu_vram_mgr.h"
+
 /* state back for walking over vram_mgr and gtt_mgr allocations */
 struct amdgpu_res_cursor {
uint64_tstart;
uint64_tsize;
uint64_tremaining;
-   struct drm_mm_node  *node;
+   void*node;
+   uint32_tmem_type;
 };
 
 /**
@@ -52,27 +55,63 @@ static inline void amdgpu_res_first(struct ttm_resource 
*res,
uint64_t start, uint64_t size,
struct amdgpu_res_cursor *cur)
 {
+   struct drm_buddy_block *block;
+   struct list_head *head, *next;
struct drm_mm_node *node;
 
-   if (!res || res->mem_type == TTM_PL_SYSTEM) {
-   cur->start = start;
-   cur->size = size;
-   cur->remaining = size;
-   cur->node = NULL;
-   WARN_ON(res && start + size > res->num_pages << PAGE_SHIFT);
-   return;
-   }
+   if (!res)
+   goto err_out;
 
BUG_ON(start + size > res->num_pages << PAGE_SHIFT);
 
-   node = to_ttm_range_mgr_node(res)->mm_nodes;
-   while (start >= node->size << PAGE_SHIFT)
-   start -= node++->size << PAGE_SHIFT;
+   cur->mem_type = res->mem_type;
+
+   switch (cur->mem_type) {
+   case TTM_PL_VRAM:
+   head = _amdgpu_vram_mgr_node(res)->blocks;
+
+   block = list_first_entry_or_null(head,
+struct drm_buddy_block,
+link);
+   if (!block)
+   goto err_out;
+
+   while (start >= amdgpu_node_size(block)) {
+   start -= amdgpu_node_size(block);
+
+   next = block->link.next;
+   if (next != head)
+   block = list_entry(next, struct 
drm_buddy_block, link);
+   }
+
+   cur->start = amdgpu_node_start(block) + start;
+   cur->size = min(amdgpu_node_size(block) - start, size);
+   cur->remaining = size;
+   cur->node = block;
+   break;
+   case TTM_PL_TT:
+   node = to_ttm_range_mgr_node(res)->mm_nodes;
+   while (start >= node->size << PAGE_SHIFT)
+   start -= node++->size << PAGE_SHIFT;
+
+   cur->start = (node->start << PAGE_SHIFT) + start;
+   cur->size = min((node->size << PAGE_SHIFT) - start, size);
+   cur->remaining = size;
+   cur->node = node;
+   break;
+   default:
+   goto err_out;
+   }
 
-   cur->start = (node->start << PAGE_SHIFT) + start;
-   cur->size = min((node->size << PAGE_SHIFT) - start, size);
+   return;
+
+err_out:
+   cur->start = start;
+   cur->size = size;
cur->remaining = size;
-   cur->node = node;
+   cur->node = NULL;
+   WARN_ON(res && start + size > res->num_pages << PAGE_SHIFT);
+   return;
 }
 
 /**
@@ -85,7 +124,9 @@ static inline void amdgpu_res_first(struct ttm_resource *res,
  */
 static inline void amdgpu_res_next(struct amdgpu_res_cursor *cur, uint64_t 
size)
 {
-   struct drm_mm_node *node = cur->node;
+   struct drm_buddy_block *block;
+ 

[PATCH v10 4/5] drm/amdgpu: move vram inline functions into a header

2022-01-26 Thread Arunpravin
Move shared vram inline functions and structs
into a header file

Signed-off-by: Arunpravin 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h | 51 
 1 file changed, 51 insertions(+)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
new file mode 100644
index ..59983464cce5
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: MIT
+ * Copyright 2021 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __AMDGPU_VRAM_MGR_H__
+#define __AMDGPU_VRAM_MGR_H__
+
+#include 
+
+struct amdgpu_vram_mgr_node {
+   struct ttm_resource base;
+   struct list_head blocks;
+   unsigned long flags;
+};
+
+static inline u64 amdgpu_node_start(struct drm_buddy_block *block)
+{
+   return drm_buddy_block_offset(block);
+}
+
+static inline u64 amdgpu_node_size(struct drm_buddy_block *block)
+{
+   return PAGE_SIZE << drm_buddy_block_order(block);
+}
+
+static inline struct amdgpu_vram_mgr_node *
+to_amdgpu_vram_mgr_node(struct ttm_resource *res)
+{
+   return container_of(res, struct amdgpu_vram_mgr_node, base);
+}
+
+#endif
-- 
2.25.1



[PATCH v10 3/5] drm: implement a method to free unused pages

2022-01-26 Thread Arunpravin
On contiguous allocation, we round up the size
to the *next* power of 2, implement a function
to free the unused pages after the newly allocate block.

v2(Matthew Auld):
  - replace function name 'drm_buddy_free_unused_pages' with
drm_buddy_block_trim
  - replace input argument name 'actual_size' with 'new_size'
  - add more validation checks for input arguments
  - add overlaps check to avoid needless searching and splitting
  - merged the below patch to see the feature in action
 - add free unused pages support to i915 driver
  - lock drm_buddy_block_trim() function as it calls mark_free/mark_split
are all globally visible

v3(Matthew Auld):
  - remove trim method error handling as we address the failure case
at drm_buddy_block_trim() function

v4:
  - in case of trim, at __alloc_range() split_block failure path
marks the block as free and removes it from the original list,
potentially also freeing it, to overcome this problem, we turn
the drm_buddy_block_trim() input node into a temporary node to
prevent recursively freeing itself, but still retain the
un-splitting/freeing of the other nodes(Matthew Auld)

  - modify the drm_buddy_block_trim() function return type

v5(Matthew Auld):
  - revert drm_buddy_block_trim() function return type changes in v4
  - modify drm_buddy_block_trim() passing argument n_pages to original_size
as n_pages has already been rounded up to the next power-of-two and
passing n_pages results noop

v6:
  - fix warnings reported by kernel test robot 

v7:
  - modify drm_buddy_block_trim() function doc description
  - at drm_buddy_block_trim() handle non-allocated block as
a serious programmer error
  - fix a typo

Signed-off-by: Arunpravin 
Reviewed-by: Matthew Auld 
---
 drivers/gpu/drm/drm_buddy.c   | 69 +++
 drivers/gpu/drm/i915/i915_ttm_buddy_manager.c | 10 +++
 include/drm/drm_buddy.h   |  4 ++
 3 files changed, 83 insertions(+)

diff --git a/drivers/gpu/drm/drm_buddy.c b/drivers/gpu/drm/drm_buddy.c
index 30cad939a112..4845ef784b5e 100644
--- a/drivers/gpu/drm/drm_buddy.c
+++ b/drivers/gpu/drm/drm_buddy.c
@@ -542,6 +542,75 @@ static int __drm_buddy_alloc_range(struct drm_buddy *mm,
return __alloc_range(mm, , start, size, blocks);
 }
 
+/**
+ * drm_buddy_block_trim - free unused pages
+ *
+ * @mm: DRM buddy manager
+ * @new_size: original size requested
+ * @blocks: Input and output list of allocated blocks.
+ * MUST contain single block as input to be trimmed.
+ * On success will contain the newly allocated blocks
+ * making up the @new_size. Blocks always appear in
+ * ascending order
+ *
+ * For contiguous allocation, we round up the size to the nearest
+ * power of two value, drivers consume *actual* size, so remaining
+ * portions are unused and can be optionally freed with this function
+ *
+ * Returns:
+ * 0 on success, error code on failure.
+ */
+int drm_buddy_block_trim(struct drm_buddy *mm,
+u64 new_size,
+struct list_head *blocks)
+{
+   struct drm_buddy_block *parent;
+   struct drm_buddy_block *block;
+   LIST_HEAD(dfs);
+   u64 new_start;
+   int err;
+
+   if (!list_is_singular(blocks))
+   return -EINVAL;
+
+   block = list_first_entry(blocks,
+struct drm_buddy_block,
+link);
+
+   if (WARN_ON(!drm_buddy_block_is_allocated(block)))
+   return -EINVAL;
+
+   if (new_size > drm_buddy_block_size(mm, block))
+   return -EINVAL;
+
+   if (!new_size || !IS_ALIGNED(new_size, mm->chunk_size))
+   return -EINVAL;
+
+   if (new_size == drm_buddy_block_size(mm, block))
+   return 0;
+
+   list_del(>link);
+   mark_free(mm, block);
+   mm->avail += drm_buddy_block_size(mm, block);
+
+   /* Prevent recursively freeing this node */
+   parent = block->parent;
+   block->parent = NULL;
+
+   new_start = drm_buddy_block_offset(block);
+   list_add(>tmp_link, );
+   err =  __alloc_range(mm, , new_start, new_size, blocks);
+   if (err) {
+   mark_allocated(block);
+   mm->avail -= drm_buddy_block_size(mm, block);
+   list_add(>link, blocks);
+   }
+
+   block->parent = parent;
+   return err;
+}
+EXPORT_SYMBOL(drm_buddy_block_trim);
+
 /**
  * drm_buddy_alloc_blocks - allocate power-of-two blocks
  *
diff --git a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c 
b/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
index 45b091626278..b52684552523 100644
--- a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
+++ b/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
@@ -97,6 +97,16 @@ static int i915_ttm_buddy_man_alloc(struct 
ttm_resource_manager *man,
if (unlikely(err))
goto err_free_blocks;
 
+   if (place->flags & TTM_PL_FLAG_CONTIGUOUS) {
+   u64 

[PATCH v10 2/5] drm: implement top-down allocation method

2022-01-26 Thread Arunpravin
Implemented a function which walk through the order list,
compares the offset and returns the maximum offset block,
this method is unpredictable in obtaining the high range
address blocks which depends on allocation and deallocation.
for instance, if driver requests address at a low specific
range, allocator traverses from the root block and splits
the larger blocks until it reaches the specific block and
in the process of splitting, lower orders in the freelist
are occupied with low range address blocks and for the
subsequent TOPDOWN memory request we may return the low
range blocks.To overcome this issue, we may go with the
below approach.

The other approach, sorting each order list entries in
ascending order and compares the last entry of each
order list in the freelist and return the max block.
This creates sorting overhead on every drm_buddy_free()
request and split up of larger blocks for a single page
request.

v2:
  - Fix alignment issues(Matthew Auld)
  - Remove unnecessary list_empty check(Matthew Auld)
  - merged the below patch to see the feature in action
 - add top-down alloc support to i915 driver

Signed-off-by: Arunpravin 
Reviewed-by: Matthew Auld 
---
 drivers/gpu/drm/drm_buddy.c   | 36 ---
 drivers/gpu/drm/i915/i915_ttm_buddy_manager.c |  3 ++
 include/drm/drm_buddy.h   |  1 +
 3 files changed, 35 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_buddy.c b/drivers/gpu/drm/drm_buddy.c
index cfc160a1ef1a..30cad939a112 100644
--- a/drivers/gpu/drm/drm_buddy.c
+++ b/drivers/gpu/drm/drm_buddy.c
@@ -369,6 +369,26 @@ alloc_range_bias(struct drm_buddy *mm,
return ERR_PTR(err);
 }
 
+static struct drm_buddy_block *
+get_maxblock(struct list_head *head)
+{
+   struct drm_buddy_block *max_block = NULL, *node;
+
+   max_block = list_first_entry_or_null(head,
+struct drm_buddy_block,
+link);
+   if (!max_block)
+   return NULL;
+
+   list_for_each_entry(node, head, link) {
+   if (drm_buddy_block_offset(node) >
+   drm_buddy_block_offset(max_block))
+   max_block = node;
+   }
+
+   return max_block;
+}
+
 static struct drm_buddy_block *
 alloc_from_freelist(struct drm_buddy *mm,
unsigned int order,
@@ -379,11 +399,17 @@ alloc_from_freelist(struct drm_buddy *mm,
int err;
 
for (i = order; i <= mm->max_order; ++i) {
-   block = list_first_entry_or_null(>free_list[i],
-struct drm_buddy_block,
-link);
-   if (block)
-   break;
+   if (flags & DRM_BUDDY_TOPDOWN_ALLOCATION) {
+   block = get_maxblock(>free_list[i]);
+   if (block)
+   break;
+   } else {
+   block = list_first_entry_or_null(>free_list[i],
+struct drm_buddy_block,
+link);
+   if (block)
+   break;
+   }
}
 
if (!block)
diff --git a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c 
b/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
index b9b420cabc14..45b091626278 100644
--- a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
+++ b/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
@@ -53,6 +53,9 @@ static int i915_ttm_buddy_man_alloc(struct 
ttm_resource_manager *man,
INIT_LIST_HEAD(_res->blocks);
bman_res->mm = mm;
 
+   if (place->flags & TTM_PL_FLAG_TOPDOWN)
+   bman_res->flags |= DRM_BUDDY_TOPDOWN_ALLOCATION;
+
if (place->fpfn || lpfn != man->size)
bman_res->flags |= DRM_BUDDY_RANGE_ALLOCATION;
 
diff --git a/include/drm/drm_buddy.h b/include/drm/drm_buddy.h
index 54f25a372f27..f0378fb48d06 100644
--- a/include/drm/drm_buddy.h
+++ b/include/drm/drm_buddy.h
@@ -23,6 +23,7 @@
 })
 
 #define DRM_BUDDY_RANGE_ALLOCATION (1 << 0)
+#define DRM_BUDDY_TOPDOWN_ALLOCATION (1 << 1)
 
 struct drm_buddy_block {
 #define DRM_BUDDY_HEADER_OFFSET GENMASK_ULL(63, 12)
-- 
2.25.1



[PATCH v10 1/5] drm: improve drm_buddy_alloc function

2022-01-26 Thread Arunpravin
- Make drm_buddy_alloc a single function to handle
  range allocation and non-range allocation demands

- Implemented a new function alloc_range() which allocates
  the requested power-of-two block comply with range limitations

- Moved order computation and memory alignment logic from
  i915 driver to drm buddy

v2:
  merged below changes to keep the build unbroken
   - drm_buddy_alloc_range() becomes obsolete and may be removed
   - enable ttm range allocation (fpfn / lpfn) support in i915 driver
   - apply enhanced drm_buddy_alloc() function to i915 driver

v3(Matthew Auld):
  - Fix alignment issues and remove unnecessary list_empty check
  - add more validation checks for input arguments
  - make alloc_range() block allocations as bottom-up
  - optimize order computation logic
  - replace uint64_t with u64, which is preferred in the kernel

v4(Matthew Auld):
  - keep drm_buddy_alloc_range() function implementation for generic
actual range allocations
  - keep alloc_range() implementation for end bias allocations

v5(Matthew Auld):
  - modify drm_buddy_alloc() passing argument place->lpfn to lpfn
as place->lpfn will currently always be zero for i915

v6(Matthew Auld):
  - fixup potential uaf - If we are unlucky and can't allocate
enough memory when splitting blocks, where we temporarily
end up with the given block and its buddy on the respective
free list, then we need to ensure we delete both blocks,
and no just the buddy, before potentially freeing them

  - fix warnings reported by kernel test robot 

v7(Matthew Auld):
  - revert fixup potential uaf
  - keep __alloc_range() add node to the list logic same as
drm_buddy_alloc_blocks() by having a temporary list variable
  - at drm_buddy_alloc_blocks() keep i915 range_overflows macro
and add a new check for end variable

Signed-off-by: Arunpravin 
---
 drivers/gpu/drm/drm_buddy.c   | 315 +-
 drivers/gpu/drm/i915/i915_ttm_buddy_manager.c |  67 ++--
 drivers/gpu/drm/i915/i915_ttm_buddy_manager.h |   2 +
 include/drm/drm_buddy.h   |  13 +-
 4 files changed, 280 insertions(+), 117 deletions(-)

diff --git a/drivers/gpu/drm/drm_buddy.c b/drivers/gpu/drm/drm_buddy.c
index d60878bc9c20..cfc160a1ef1a 100644
--- a/drivers/gpu/drm/drm_buddy.c
+++ b/drivers/gpu/drm/drm_buddy.c
@@ -282,23 +282,97 @@ void drm_buddy_free_list(struct drm_buddy *mm, struct 
list_head *objects)
 }
 EXPORT_SYMBOL(drm_buddy_free_list);
 
-/**
- * drm_buddy_alloc_blocks - allocate power-of-two blocks
- *
- * @mm: DRM buddy manager to allocate from
- * @order: size of the allocation
- *
- * The order value here translates to:
- *
- * 0 = 2^0 * mm->chunk_size
- * 1 = 2^1 * mm->chunk_size
- * 2 = 2^2 * mm->chunk_size
- *
- * Returns:
- * allocated ptr to the _buddy_block on success
- */
-struct drm_buddy_block *
-drm_buddy_alloc_blocks(struct drm_buddy *mm, unsigned int order)
+static inline bool overlaps(u64 s1, u64 e1, u64 s2, u64 e2)
+{
+   return s1 <= e2 && e1 >= s2;
+}
+
+static inline bool contains(u64 s1, u64 e1, u64 s2, u64 e2)
+{
+   return s1 <= s2 && e1 >= e2;
+}
+
+static struct drm_buddy_block *
+alloc_range_bias(struct drm_buddy *mm,
+u64 start, u64 end,
+unsigned int order)
+{
+   struct drm_buddy_block *block;
+   struct drm_buddy_block *buddy;
+   LIST_HEAD(dfs);
+   int err;
+   int i;
+
+   end = end - 1;
+
+   for (i = 0; i < mm->n_roots; ++i)
+   list_add_tail(>roots[i]->tmp_link, );
+
+   do {
+   u64 block_start;
+   u64 block_end;
+
+   block = list_first_entry_or_null(,
+struct drm_buddy_block,
+tmp_link);
+   if (!block)
+   break;
+
+   list_del(>tmp_link);
+
+   if (drm_buddy_block_order(block) < order)
+   continue;
+
+   block_start = drm_buddy_block_offset(block);
+   block_end = block_start + drm_buddy_block_size(mm, block) - 1;
+
+   if (!overlaps(start, end, block_start, block_end))
+   continue;
+
+   if (drm_buddy_block_is_allocated(block))
+   continue;
+
+   if (contains(start, end, block_start, block_end) &&
+   order == drm_buddy_block_order(block)) {
+   /*
+* Find the free block within the range.
+*/
+   if (drm_buddy_block_is_free(block))
+   return block;
+
+   continue;
+   }
+
+   if (!drm_buddy_block_is_split(block)) {
+   err = split_block(mm, block);
+   if (unlikely(err))
+   goto err_undo;
+   }
+
+   

Re: [PATCH v9 4/6] drm: implement a method to free unused pages

2022-01-26 Thread Arunpravin




> -Original Message-
> From: amd-gfx  On Behalf Of Matthew 
> Auld
> Sent: Thursday, January 20, 2022 11:05 PM
> To: Paneer Selvam, Arunpravin ; 
> dri-de...@lists.freedesktop.org; intel-...@lists.freedesktop.org; 
> amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; tzimmerm...@suse.de; 
> jani.nik...@linux.intel.com; Koenig, Christian ; 
> dan...@ffwll.ch
> Subject: Re: [PATCH v9 4/6] drm: implement a method to free unused pages
> 
> On 19/01/2022 11:37, Arunpravin wrote:
>> On contiguous allocation, we round up the size to the *next* power of 
>> 2, implement a function to free the unused pages after the newly 
>> allocate block.
>>
>> v2(Matthew Auld):
>>- replace function name 'drm_buddy_free_unused_pages' with
>>  drm_buddy_block_trim
>>- replace input argument name 'actual_size' with 'new_size'
>>- add more validation checks for input arguments
>>- add overlaps check to avoid needless searching and splitting
>>- merged the below patch to see the feature in action
>>   - add free unused pages support to i915 driver
>>- lock drm_buddy_block_trim() function as it calls mark_free/mark_split
>>  are all globally visible
>>
>> v3(Matthew Auld):
>>- remove trim method error handling as we address the failure case
>>  at drm_buddy_block_trim() function
>>
>> v4:
>>- in case of trim, at __alloc_range() split_block failure path
>>  marks the block as free and removes it from the original list,
>>  potentially also freeing it, to overcome this problem, we turn
>>  the drm_buddy_block_trim() input node into a temporary node to
>>  prevent recursively freeing itself, but still retain the
>>  un-splitting/freeing of the other nodes(Matthew Auld)
>>
>>- modify the drm_buddy_block_trim() function return type
>>
>> v5(Matthew Auld):
>>- revert drm_buddy_block_trim() function return type changes in v4
>>- modify drm_buddy_block_trim() passing argument n_pages to original_size
>>  as n_pages has already been rounded up to the next power-of-two and
>>  passing n_pages results noop
>>
>> v6:
>>- fix warnings reported by kernel test robot 
>>
>> Signed-off-by: Arunpravin 
>> ---
>>   drivers/gpu/drm/drm_buddy.c   | 65 +++
>>   drivers/gpu/drm/i915/i915_ttm_buddy_manager.c | 10 +++
>>   include/drm/drm_buddy.h   |  4 ++
>>   3 files changed, 79 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/drm_buddy.c b/drivers/gpu/drm/drm_buddy.c 
>> index 6aa5c1ce25bf..c5902a81b8c5 100644
>> --- a/drivers/gpu/drm/drm_buddy.c
>> +++ b/drivers/gpu/drm/drm_buddy.c
>> @@ -546,6 +546,71 @@ static int __drm_buddy_alloc_range(struct drm_buddy *mm,
>>  return __alloc_range(mm, , start, size, blocks);
>>   }
>>   
>> +/**
>> + * drm_buddy_block_trim - free unused pages
>> + *
>> + * @mm: DRM buddy manager
>> + * @new_size: original size requested
>> + * @blocks: output list head to add allocated blocks
> 
> @blocks: Input and output list of allocated blocks. MUST contain single block 
> as input to be trimmed. On success will contain the newly allocated blocks 
> making up the @new_size. Blocks always appear in ascending order.
> 
> ?
> 
>> + *
>> + * For contiguous allocation, we round up the size to the nearest
>> + * power of two value, drivers consume *actual* size, so remaining
>> + * portions are unused and it can be freed.
> 
> so remaining portions are unused and can be optionally freed with this 
> function.
> 
> ?
> 
>> + *
>> + * Returns:
>> + * 0 on success, error code on failure.
>> + */
>> +int drm_buddy_block_trim(struct drm_buddy *mm,
>> + u64 new_size,
>> + struct list_head *blocks)
>> +{
>> +struct drm_buddy_block *parent;
>> +struct drm_buddy_block *block;
>> +LIST_HEAD(dfs);
>> +u64 new_start;
>> +int err;
>> +
>> +if (!list_is_singular(blocks))
>> +return -EINVAL;
>> +
>> +block = list_first_entry(blocks,
>> + struct drm_buddy_block,
>> + link);
>> +
>> +if (!drm_buddy_block_is_allocated(block))
> 
> Maybe:
> 
> if (WARN_ON(!drm_buddy_block_is_allocated()))
> 
> AFAIK it should be normally impossible to be handed such non-allocated block, 
> and so should be treated as a serious programmer error.
> 
> ?
> 
>> +return -EINVAL;
>> +
>> +if (new_size > drm_buddy_block_size(mm, block))
>> +return -EINVAL;
>> +
>> +if (!new_size && !IS_ALIGNED(new_size, mm->chunk_size))
>> +return -EINVAL;
> 
> I assume that's a typo:
> 
> if (!new_size || ...)
> 
> Otherwise I think looks good. Some unit tests for this would be nice, but not 
> a blocker. And this does at least pass the igt_mock_contiguous selftest, and 
> I didn't see anything nasty when running on DG1, which does make use of 
> TTM_PL_FLAG_CONTIGUOUS,

Good to hear its running on DG1, all changes are added to v10. working
on 

Re: [PATCH v9 2/6] drm: improve drm_buddy_alloc function

2022-01-26 Thread Arunpravin



On 21/01/22 5:30 pm, Matthew Auld wrote:
> On 19/01/2022 11:37, Arunpravin wrote:
>> - Make drm_buddy_alloc a single function to handle
>>range allocation and non-range allocation demands
>>
>> - Implemented a new function alloc_range() which allocates
>>the requested power-of-two block comply with range limitations
>>
>> - Moved order computation and memory alignment logic from
>>i915 driver to drm buddy
>>
>> v2:
>>merged below changes to keep the build unbroken
>> - drm_buddy_alloc_range() becomes obsolete and may be removed
>> - enable ttm range allocation (fpfn / lpfn) support in i915 driver
>> - apply enhanced drm_buddy_alloc() function to i915 driver
>>
>> v3(Matthew Auld):
>>- Fix alignment issues and remove unnecessary list_empty check
>>- add more validation checks for input arguments
>>- make alloc_range() block allocations as bottom-up
>>- optimize order computation logic
>>- replace uint64_t with u64, which is preferred in the kernel
>>
>> v4(Matthew Auld):
>>- keep drm_buddy_alloc_range() function implementation for generic
>>  actual range allocations
>>- keep alloc_range() implementation for end bias allocations
>>
>> v5(Matthew Auld):
>>- modify drm_buddy_alloc() passing argument place->lpfn to lpfn
>>  as place->lpfn will currently always be zero for i915
>>
>> v6(Matthew Auld):
>>- fixup potential uaf - If we are unlucky and can't allocate
>>  enough memory when splitting blocks, where we temporarily
>>  end up with the given block and its buddy on the respective
>>  free list, then we need to ensure we delete both blocks,
>>  and no just the buddy, before potentially freeing them
> 
> Hmm, not sure we really want to squash existing bug fixes into this 
> patch. Perhaps bring in [1] to the start of your series? i915_buddy is 
> gone now. Alternatively I can resend such that it applies on top 
> drm_buddy. Your choice.
> 
> [1] 
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.freedesktop.org%2Fpatch%2F469806%2F%3Fseries%3D98953%26rev%3D1data=04%7C01%7CArunpravin.PaneerSelvam%40amd.com%7Ce451a48532e74b6c138408d9dcd5aef0%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637783632587526317%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000sdata=0UoMVUwlwpu8AbB%2BgJrmRBEc7VPt8aAcraRnWkU83ag%3Dreserved=0
> 

I will revert this fix in v10, please resend on top drm_buddy
>>
>>- fix warnings reported by kernel test robot 
>>
>> Signed-off-by: Arunpravin 
>> ---
>>   drivers/gpu/drm/drm_buddy.c   | 326 +-
>>   drivers/gpu/drm/i915/i915_ttm_buddy_manager.c |  67 ++--
>>   drivers/gpu/drm/i915/i915_ttm_buddy_manager.h |   2 +
>>   include/drm/drm_buddy.h   |  22 +-
>>   4 files changed, 293 insertions(+), 124 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/drm_buddy.c b/drivers/gpu/drm/drm_buddy.c
>> index d60878bc9c20..954e31962c74 100644
>> --- a/drivers/gpu/drm/drm_buddy.c
>> +++ b/drivers/gpu/drm/drm_buddy.c
>> @@ -282,23 +282,99 @@ void drm_buddy_free_list(struct drm_buddy *mm, struct 
>> list_head *objects)
>>   }
>>   EXPORT_SYMBOL(drm_buddy_free_list);
>>   
>> -/**
>> - * drm_buddy_alloc_blocks - allocate power-of-two blocks
>> - *
>> - * @mm: DRM buddy manager to allocate from
>> - * @order: size of the allocation
>> - *
>> - * The order value here translates to:
>> - *
>> - * 0 = 2^0 * mm->chunk_size
>> - * 1 = 2^1 * mm->chunk_size
>> - * 2 = 2^2 * mm->chunk_size
>> - *
>> - * Returns:
>> - * allocated ptr to the _buddy_block on success
>> - */
>> -struct drm_buddy_block *
>> -drm_buddy_alloc_blocks(struct drm_buddy *mm, unsigned int order)
>> +static inline bool overlaps(u64 s1, u64 e1, u64 s2, u64 e2)
>> +{
>> +return s1 <= e2 && e1 >= s2;
>> +}
>> +
>> +static inline bool contains(u64 s1, u64 e1, u64 s2, u64 e2)
>> +{
>> +return s1 <= s2 && e1 >= e2;
>> +}
>> +
>> +static struct drm_buddy_block *
>> +alloc_range_bias(struct drm_buddy *mm,
>> + u64 start, u64 end,
>> + unsigned int order)
>> +{
>> +struct drm_buddy_block *block;
>> +struct drm_buddy_block *buddy;
>> +LIST_HEAD(dfs);
>> +int err;
>> +int i;
>> +
>> +end = end - 1;
>> +
>> +for (i = 0; i < mm->n_roots; ++i)
>> +list_add_tail(>roots[i]->tmp_link, );
>> +
>> +do {
>> +u64 block_start;
>> +u64 block_end;
>> +
>> +block = list_first_entry_or_null(,
>> + struct drm_buddy_block,
>> + tmp_link);
>> +if (!block)
>> +break;
>> +
>> +list_del(>tmp_link);
>> +
>> +if (drm_buddy_block_order(block) < order)
>> +continue;
>> +
>> +block_start = drm_buddy_block_offset(block);
>> +block_end = block_start + 

Re: [PATCH] drm/amdgpu: add safeguards for accessing mmhub CG registers

2022-01-26 Thread Deucher, Alexander
[Public]

Should we set *flags = 0 before we return?

Alex


From: Yu, Lang 
Sent: Wednesday, January 26, 2022 2:53 AM
To: amd-gfx@lists.freedesktop.org 
Cc: Deucher, Alexander ; Lazar, Lijo 
; Huang, Ray ; Yu, Lang 
Subject: [PATCH] drm/amdgpu: add safeguards for accessing mmhub CG registers

We observed a gpu hang when querying mmhub CG status(i.e.,
cat amdgpu_pm_info) on cyan skillfish. Acctually, cyan
skillfish doesn't support any CG features.

Only allow asics which support CG features accessing related
registers. Will add similar safeguards for other IPs in the
furture.

Signed-off-by: Lang Yu 
---
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 3 +++
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c | 3 +++
 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 3 +++
 drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c | 3 +++
 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c | 3 +++
 5 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index 4c9f0c0f3116..1869e2019461 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -550,6 +550,9 @@ static void mmhub_v1_0_get_clockgating(struct amdgpu_device 
*adev, u32 *flags)
 {
 int data, data1;

+   if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS)))
+   return;
+
 if (amdgpu_sriov_vf(adev))
 *flags = 0;

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
index 3b901f941627..f7b9843b36e6 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
@@ -546,6 +546,9 @@ static void mmhub_v1_7_get_clockgating(struct amdgpu_device 
*adev, u32 *flags)
 {
 int data, data1;

+   if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS)))
+   return;
+
 if (amdgpu_sriov_vf(adev))
 *flags = 0;

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
index 3718ff610ab2..3f5f326379b7 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
@@ -686,6 +686,9 @@ static void mmhub_v2_0_get_clockgating(struct amdgpu_device 
*adev, u32 *flags)
 {
 int data, data1;

+   if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS)))
+   return;
+
 if (amdgpu_sriov_vf(adev))
 *flags = 0;

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c
index 9e16da28505a..b23dd9ddfb5c 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c
@@ -580,6 +580,9 @@ static void mmhub_v2_3_get_clockgating(struct amdgpu_device 
*adev, u32 *flags)
 {
 int data, data1, data2, data3;

+   if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS)))
+   return;
+
 if (amdgpu_sriov_vf(adev))
 *flags = 0;

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
index 619106f7d23d..a2d5c8424e2b 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
@@ -651,6 +651,9 @@ static void mmhub_v9_4_get_clockgating(struct amdgpu_device 
*adev, u32 *flags)
 {
 int data, data1;

+   if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS)))
+   return;
+
 if (amdgpu_sriov_vf(adev))
 *flags = 0;

--
2.25.1



Re: drm/amd/amdgpu: Add ip_discovery_text sysfs entry (v2)

2022-01-26 Thread Tom St Denis
Thanks, if we don't end up dropping this patchset I'll incorporate your
suggestions into a v3.

Tom

On Wed, Jan 26, 2022 at 12:36 AM Limonciello, Mario <
mario.limoncie...@amd.com> wrote:

> A few suggestion ideas inline.
>
> On 1/25/2022 12:18, Tom St Denis wrote:
> > Newer hardware has a discovery table in hardware that the kernel will
> > rely on instead of header files for things like IP offsets.  This
> > sysfs entry adds a simple to parse table of IP instances and segment
> > offsets.
> >
> > Produces output that looks like:
> >
> > $ cat ip_discovery_text
> > ATHUB{0} v2.0.0: 0c00 02408c00
> > CLKA{0} v11.0.0: 00016c00 02401800
> > CLKA{1} v11.0.0: 00016e00 02401c00
> > CLKA{2} v11.0.0: 00017000 02402000
> > CLKA{3} v11.0.0: 00017200 02402400
> > CLKA{4} v11.0.0: 0001b000 0242d800
> > CLKB{0} v11.0.0: 00017e00 0240bc00
> > DBGU_NBIO{0} v3.0.0: 01c0 02409000
> > DBGU0{0} v3.0.0: 0180 02409800
> > DBGU1{0} v3.0.0: 01a0 02409c00
> > DF{0} v3.0.0: 7000 0240b800
> > DFX{0} v4.1.0: 0580 02409400
> > DFX_DAP{0} v2.0.0: 05a0 00b8 0240c400
> > DMU{0} v2.0.2: 0012 00c0 34c0 9000 02403c00
> > FUSE{0} v11.0.0: 00017400 02401400
> > GC{0} v10.1.10: 1260 a000 02402c00
> >
> > (v2): Use a macro for buffer size and fix alignment in amdgpu.h
> >
> > Signed-off-by: Tom St Denis 
> > ---
> >   drivers/gpu/drm/amd/amdgpu/amdgpu.h   |  1 +
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 79 ++-
> >   2 files changed, 79 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > index 3bc76759c143..43caeb4bdc07 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > @@ -1019,6 +1019,7 @@ struct amdgpu_device {
> >   struct amdgpu_ip_block  ip_blocks[AMDGPU_MAX_IP_NUM];
> >   uint32_tharvest_ip_mask;
> >   int num_ip_blocks;
> > + char*ip_discovery_text;
> >   struct mutexmn_lock;
> >   DECLARE_HASHTABLE(mn_hash, 7);
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> > index 07623634fdc2..d036977dab8a 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> > @@ -267,6 +267,19 @@ static void
> amdgpu_discovery_harvest_config_quirk(struct amdgpu_device *adev)
> >   }
> >   }
> >
> > +static ssize_t ip_discovery_text_show(struct device *dev,
> > + struct device_attribute *attr, char *buf)
> > +{
> > + struct drm_device *ddev = dev_get_drvdata(dev);
> > + struct amdgpu_device *adev = drm_to_adev(ddev);
> > +
> > + return sysfs_emit(buf, "%s", adev->ip_discovery_text);
> > +}
> > +
> > +static DEVICE_ATTR(ip_discovery_text, S_IRUGO,
> > + ip_discovery_text_show, NULL);
> > +
> > +
> >   static int amdgpu_discovery_init(struct amdgpu_device *adev)
> >   {
> >   struct table_info *info;
> > @@ -351,6 +364,11 @@ static int amdgpu_discovery_init(struct
> amdgpu_device *adev)
> >   goto out;
> >   }
> >
> > + // init sysfs for ip_discovery
> > + r = sysfs_create_file(>dev->kobj,
> _attr_ip_discovery_text.attr);
> > + if (r)
> > + dev_err(adev->dev, "Could not create amdgpu device
> attr\n");
> > +
> >   return 0;
> >
> >   out:
> > @@ -363,7 +381,11 @@ static int amdgpu_discovery_init(struct
> amdgpu_device *adev)
> >   void amdgpu_discovery_fini(struct amdgpu_device *adev)
> >   {
> >   kfree(adev->mman.discovery_bin);
> > + kfree(adev->ip_discovery_text);
> > + sysfs_remove_file(>dev->kobj,
> _attr_ip_discovery_text.attr);
> > +
> >   adev->mman.discovery_bin = NULL;
> > + adev->ip_discovery_text = NULL;
> >   }
> >
> >   static int amdgpu_discovery_validate_ip(const struct ip *ip)
> > @@ -382,6 +404,22 @@ static int amdgpu_discovery_validate_ip(const
> struct ip *ip)
> >   return 0;
> >   }
> >
> > +#define IP_DISCOVERY_BLOCK_SIZE 4096
> > +
> > +static int add_string(char **dst, unsigned *size, char *src)
> > +{
> > + if (strlen(src) + strlen(*dst) >= *size) {
> > + void *tmp = krealloc(*dst, *size +
> IP_DISCOVERY_BLOCK_SIZE, GFP_KERNEL);
> > + if (!tmp) {
> > + return -1;
>
> If you take my other suggestion on cleanup, maybe you can also return
> -ENOMEM here.
>
> > + }
> > + *dst = tmp;
> > + *size = *size + IP_DISCOVERY_BLOCK_SIZE;
> > + }
> > + strcat(*dst, src);
> > + return 0;
> > +}
> > +
> >   int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
> >   {
> >   struct binary_header *bhdr;
> > @@ -396,6 +434,8 @@ int amdgpu_discovery_reg_base_init(struct
> amdgpu_device *adev)
> >   int hw_ip;
> >   int i, j, k;
> >   int r;
> > + unsigned 

RE: [PATCH v5 2/4] drm/amd: add support to check whether the system is set to s3

2022-01-26 Thread Limonciello, Mario
[AMD Official Use Only]

They key here is that smart suspend seems to have a dependency on
pm_suspend_via_firmware().

So if you have an APU doing S2I or Intel SOC doing S2I it will always return 0.
Can we drop that dependency of pm_suspend_via_firmware for it perhaps?

> I don't think smart suspend works as expected.  I asked Raphael about
> it several times, but he never got around to following up with me.  I
> think that is probably the preferred way to go, but the tricky part is
> that the dGPUs have integrated bridges and audio and usb and all of
> that probably needs proper smart suspend support for this to work
> properly.  Alternatively, the OS needs to properly use the ACPI _PR3
> methods to power down all of the devices on suspend if the system
> doesn't automatically take down the power rails when the system enters
> suspend.  I'm not sure Linux does this today.
> 
> Alex
> 
> On Wed, Jan 26, 2022 at 10:32 AM Lazar, Lijo  wrote:
> >
> > I remember Alex adding a patch for smart suspend such that it skips the
> suspend call if runtime pm suspended.
> >
> > In summary, the resume doesn't work with/without reset?
> >
> > Thanks,
> > Lijo
> > 
> > From: Limonciello, Mario 
> > Sent: Wednesday, January 26, 2022 8:47:05 PM
> > To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org  g...@lists.freedesktop.org>
> > Cc: Liang, Prike 
> > Subject: RE: [PATCH v5 2/4] drm/amd: add support to check whether the
> system is set to s3
> >
> >
> > [Public]
> >
> >
> >
> > Right -from an API perspective both amdgpu_acpi_is_s0ix_active and
> amdgpu_acpi_is_s3_active are only in suspend ops.
> >
> >
> >
> > But so coming back to the 4th patch (and the associated bug), what is
> supposed to happen with a dGPU on an Intel system that does s2i?
> >
> > For AMD APU w/ dGPU in the system doing s2i I would expect that power rails
> have been cut off for the dGPU so putting it into S3 and doing a reset makes
> sense, but I don’t know about on an Intel system if that is logical.
> >
> > It seems like Intel expects more that the card is going to be in runtime pm 
> > and
> putting it into S3 and doing reset might not be the right move.
> >
> >
> >
> > From: Lazar, Lijo 
> > Sent: Wednesday, January 26, 2022 09:11
> > To: Limonciello, Mario ; amd-
> g...@lists.freedesktop.org
> > Cc: Liang, Prike 
> > Subject: Re: [PATCH v5 2/4] drm/amd: add support to check whether the
> system is set to s3
> >
> >
> >
> > Talking from generic API perspective - S3 is considered active for dGPU 
> > only if
> it's going to non-S0 state. If called from anywhere else than suspend op, this
> should return false.
> >
> >
> >
> > Thanks,
> > Lijo
> >
> > 
> >
> > From: Limonciello, Mario 
> > Sent: Wednesday, January 26, 2022 8:37:28 PM
> > To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org  g...@lists.freedesktop.org>
> > Cc: Liang, Prike 
> > Subject: RE: [PATCH v5 2/4] drm/amd: add support to check whether the
> system is set to s3
> >
> >
> >
> > [Public]
> >
> >
> >
> > That was intentional – shouldn’t dGPU always be going through S3 path
> currently?
> >
> >
> >
> > From: Lazar, Lijo 
> > Sent: Wednesday, January 26, 2022 09:06
> > To: Limonciello, Mario ; amd-
> g...@lists.freedesktop.org
> > Cc: Liang, Prike ; Limonciello, Mario
> 
> > Subject: Re: [PATCH v5 2/4] drm/amd: add support to check whether the
> system is set to s3
> >
> >
> >
> > [Public]
> >
> >
> >
> > Returns true for dGPU always. Better to keep the whole check under
> something like this.
> >
> >
> >
> > if (pm_suspend_target_state != PM_SUSPEND_ON)
> >
> >
> >
> > Thanks,
> > Lijo
> >
> > 
> >
> > From: amd-gfx  on behalf of Mario
> Limonciello 
> > Sent: Wednesday, January 26, 2022 9:39:42 AM
> > To: amd-gfx@lists.freedesktop.org 
> > Cc: Liang, Prike ; Limonciello, Mario
> 
> > Subject: [PATCH v5 2/4] drm/amd: add support to check whether the system is
> set to s3
> >
> >
> >
> > This will be used to help make decisions on what to do in
> > misconfigured systems.
> >
> > Signed-off-by: Mario Limonciello 
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu.h  |  2 ++
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 17 +
> >  2 files changed, 19 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > index 3bc76759c143..f184c88d3d4f 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > @@ -1409,11 +1409,13 @@ int amdgpu_acpi_smart_shift_update(struct
> drm_device *dev, enum amdgpu_ss ss_sta
> >  int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);
> >
> >  void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_backlight_caps
> *caps);
> > +bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
> >  bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
> >  void amdgpu_acpi_detect(void);
> >  #else
> >  static inline int 

Re: [RFC v2 4/8] drm/amdgpu: Serialize non TDR gpu recovery with TDRs

2022-01-26 Thread Andrey Grodzovsky
JingWen - could you maybe give those patches a try on SRIOV XGMI system 
? If you see issues maybe you could let me connect and debug. My SRIOV 
XGMI system which Shayun kindly arranged for me is not loading the 
driver with my drm-misc-next branch even without my patches.


Andrey

On 2022-01-17 14:21, Andrey Grodzovsky wrote:



On 2022-01-17 2:17 p.m., Christian König wrote:

Am 17.01.22 um 20:14 schrieb Andrey Grodzovsky:


Ping on the question



Oh, my! That was already more than a week ago and is completely 
swapped out of my head again.



Andrey

On 2022-01-05 1:11 p.m., Andrey Grodzovsky wrote:
Also, what about having the reset_active or in_reset flag in the 
reset_domain itself?


Of hand that sounds like a good idea.



What then about the adev->reset_sem semaphore ? Should we also move 
this to reset_domain ?  Both of the moves have functional
implications only for XGMI case because there will be contention 
over accessing those single instance variables from multiple devices

while now each device has it's own copy.


Since this is a rw semaphore that should be unproblematic I think. It 
could just be that the cache line of the lock then plays ping/pong 
between the CPU cores.




What benefit the centralization into reset_domain gives - is it for 
example to prevent one device in a hive trying to access through 
MMIO another one's

VRAM (shared FB memory) while the other one goes through reset ?


I think that this is the killer argument for a centralized lock, yes.



np, i will add a patch with centralizing both flag into reset domain 
and resend.


Andrey




Christian.



Andrey 


Re: [RFC v3 01/12] drm/amdgpu: Introduce reset domain

2022-01-26 Thread Andrey Grodzovsky



On 2022-01-26 07:07, Christian König wrote:

Am 25.01.22 um 23:37 schrieb Andrey Grodzovsky:

Defined a reset_domain struct such that
all the entities that go through reset
together will be serialized one against
another. Do it for both single device and
XGMI hive cases.

Signed-off-by: Andrey Grodzovsky 
Suggested-by: Daniel Vetter 
Suggested-by: Christian König 
Reviewed-by: Christian König 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h    |  7 +++
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 20 +++-
  drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c   |  9 +
  drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h   |  2 ++
  4 files changed, 37 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h

index 9f017663ac50..b5ff76aae7e0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -812,6 +812,11 @@ struct amd_powerplay {
    #define AMDGPU_RESET_MAGIC_NUM 64
  #define AMDGPU_MAX_DF_PERFMONS 4
+
+struct amdgpu_reset_domain {
+    struct workqueue_struct *wq;
+};
+
  struct amdgpu_device {
  struct device    *dev;
  struct pci_dev    *pdev;
@@ -1096,6 +1101,8 @@ struct amdgpu_device {
    struct amdgpu_reset_control *reset_cntl;
  uint32_t ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
+
+    struct amdgpu_reset_domain    reset_domain;


I'm a bit confused, shouldn't this be a pointer?

Regards,
Christian.



Yea, I see you already noticed in the followup patch - i had troubles 
reworking from first patch, a lot

of merge conflicts and so I just added the rework on top of last patch-set.


Andrey





  };
    static inline struct amdgpu_device *drm_to_adev(struct drm_device 
*ddev)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

index 90d22a376632..0f3e6c078f88 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2391,9 +2391,27 @@ static int amdgpu_device_ip_init(struct 
amdgpu_device *adev)

  if (r)
  goto init_failed;
  -    if (adev->gmc.xgmi.num_physical_nodes > 1)
+    if (adev->gmc.xgmi.num_physical_nodes > 1) {
+    struct amdgpu_hive_info *hive;
+
  amdgpu_xgmi_add_device(adev);
  +    hive = amdgpu_get_xgmi_hive(adev);
+    if (!hive || !hive->reset_domain.wq) {
+    DRM_ERROR("Failed to obtain reset domain info for XGMI 
hive:%llx", hive->hive_id);

+    r = -EINVAL;
+    goto init_failed;
+    }
+
+    adev->reset_domain.wq = hive->reset_domain.wq;
+    } else {
+    adev->reset_domain.wq = 
alloc_ordered_workqueue("amdgpu-reset-dev", 0);

+    if (!adev->reset_domain.wq) {
+    r = -ENOMEM;
+    goto init_failed;
+    }
+    }
+
  /* Don't init kfd if whole hive need to be reset during init */
  if (!adev->gmc.xgmi.pending_reset)
  amdgpu_amdkfd_device_init(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c

index 567df2db23ac..a858e3457c5c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
@@ -392,6 +392,14 @@ struct amdgpu_hive_info 
*amdgpu_get_xgmi_hive(struct amdgpu_device *adev)

  goto pro_end;
  }
  +    hive->reset_domain.wq = 
alloc_ordered_workqueue("amdgpu-reset-hive", 0);

+    if (!hive->reset_domain.wq) {
+    dev_err(adev->dev, "XGMI: failed allocating wq for reset 
domain!\n");

+    kfree(hive);
+    hive = NULL;
+    goto pro_end;
+    }
+
  hive->hive_id = adev->gmc.xgmi.hive_id;
  INIT_LIST_HEAD(>device_list);
  INIT_LIST_HEAD(>node);
@@ -401,6 +409,7 @@ struct amdgpu_hive_info 
*amdgpu_get_xgmi_hive(struct amdgpu_device *adev)

  task_barrier_init(>tb);
  hive->pstate = AMDGPU_XGMI_PSTATE_UNKNOWN;
  hive->hi_req_gpu = NULL;
+
  /*
   * hive pstate on boot is high in vega20 so we have to go to low
   * pstate on after boot.
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h

index d2189bf7d428..6121aaa292cb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h
@@ -42,6 +42,8 @@ struct amdgpu_hive_info {
  AMDGPU_XGMI_PSTATE_MAX_VEGA20,
  AMDGPU_XGMI_PSTATE_UNKNOWN
  } pstate;
+
+    struct amdgpu_reset_domain reset_domain;
  };
    struct amdgpu_pcs_ras_field {




Re: [PATCH v5 2/4] drm/amd: add support to check whether the system is set to s3

2022-01-26 Thread Alex Deucher
I don't think smart suspend works as expected.  I asked Raphael about
it several times, but he never got around to following up with me.  I
think that is probably the preferred way to go, but the tricky part is
that the dGPUs have integrated bridges and audio and usb and all of
that probably needs proper smart suspend support for this to work
properly.  Alternatively, the OS needs to properly use the ACPI _PR3
methods to power down all of the devices on suspend if the system
doesn't automatically take down the power rails when the system enters
suspend.  I'm not sure Linux does this today.

Alex

On Wed, Jan 26, 2022 at 10:32 AM Lazar, Lijo  wrote:
>
> I remember Alex adding a patch for smart suspend such that it skips the 
> suspend call if runtime pm suspended.
>
> In summary, the resume doesn't work with/without reset?
>
> Thanks,
> Lijo
> 
> From: Limonciello, Mario 
> Sent: Wednesday, January 26, 2022 8:47:05 PM
> To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org 
> 
> Cc: Liang, Prike 
> Subject: RE: [PATCH v5 2/4] drm/amd: add support to check whether the system 
> is set to s3
>
>
> [Public]
>
>
>
> Right -from an API perspective both amdgpu_acpi_is_s0ix_active and 
> amdgpu_acpi_is_s3_active are only in suspend ops.
>
>
>
> But so coming back to the 4th patch (and the associated bug), what is 
> supposed to happen with a dGPU on an Intel system that does s2i?
>
> For AMD APU w/ dGPU in the system doing s2i I would expect that power rails 
> have been cut off for the dGPU so putting it into S3 and doing a reset makes 
> sense, but I don’t know about on an Intel system if that is logical.
>
> It seems like Intel expects more that the card is going to be in runtime pm 
> and putting it into S3 and doing reset might not be the right move.
>
>
>
> From: Lazar, Lijo 
> Sent: Wednesday, January 26, 2022 09:11
> To: Limonciello, Mario ; 
> amd-gfx@lists.freedesktop.org
> Cc: Liang, Prike 
> Subject: Re: [PATCH v5 2/4] drm/amd: add support to check whether the system 
> is set to s3
>
>
>
> Talking from generic API perspective - S3 is considered active for dGPU only 
> if it's going to non-S0 state. If called from anywhere else than suspend op, 
> this should return false.
>
>
>
> Thanks,
> Lijo
>
> 
>
> From: Limonciello, Mario 
> Sent: Wednesday, January 26, 2022 8:37:28 PM
> To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org 
> 
> Cc: Liang, Prike 
> Subject: RE: [PATCH v5 2/4] drm/amd: add support to check whether the system 
> is set to s3
>
>
>
> [Public]
>
>
>
> That was intentional – shouldn’t dGPU always be going through S3 path 
> currently?
>
>
>
> From: Lazar, Lijo 
> Sent: Wednesday, January 26, 2022 09:06
> To: Limonciello, Mario ; 
> amd-gfx@lists.freedesktop.org
> Cc: Liang, Prike ; Limonciello, Mario 
> 
> Subject: Re: [PATCH v5 2/4] drm/amd: add support to check whether the system 
> is set to s3
>
>
>
> [Public]
>
>
>
> Returns true for dGPU always. Better to keep the whole check under something 
> like this.
>
>
>
> if (pm_suspend_target_state != PM_SUSPEND_ON)
>
>
>
> Thanks,
> Lijo
>
> 
>
> From: amd-gfx  on behalf of Mario 
> Limonciello 
> Sent: Wednesday, January 26, 2022 9:39:42 AM
> To: amd-gfx@lists.freedesktop.org 
> Cc: Liang, Prike ; Limonciello, Mario 
> 
> Subject: [PATCH v5 2/4] drm/amd: add support to check whether the system is 
> set to s3
>
>
>
> This will be used to help make decisions on what to do in
> misconfigured systems.
>
> Signed-off-by: Mario Limonciello 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h  |  2 ++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 17 +
>  2 files changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 3bc76759c143..f184c88d3d4f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1409,11 +1409,13 @@ int amdgpu_acpi_smart_shift_update(struct drm_device 
> *dev, enum amdgpu_ss ss_sta
>  int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);
>
>  void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_backlight_caps *caps);
> +bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
>  bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
>  void amdgpu_acpi_detect(void);
>  #else
>  static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }
>  static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }
> +static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { 
> return false };
>  static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { 
> return false; }
>  static inline void amdgpu_acpi_detect(void) { }
>  static inline bool amdgpu_acpi_is_power_shift_control_supported(void) { 
> return false; }
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> index 

Re: [PATCH v5 2/4] drm/amd: add support to check whether the system is set to s3

2022-01-26 Thread Lazar, Lijo
I remember Alex adding a patch for smart suspend such that it skips the suspend 
call if runtime pm suspended.

In summary, the resume doesn't work with/without reset?

Thanks,
Lijo

From: Limonciello, Mario 
Sent: Wednesday, January 26, 2022 8:47:05 PM
To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org 

Cc: Liang, Prike 
Subject: RE: [PATCH v5 2/4] drm/amd: add support to check whether the system is 
set to s3


[Public]



Right -from an API perspective both amdgpu_acpi_is_s0ix_active and 
amdgpu_acpi_is_s3_active are only in suspend ops.



But so coming back to the 4th patch (and the associated bug), what is supposed 
to happen with a dGPU on an Intel system that does s2i?

For AMD APU w/ dGPU in the system doing s2i I would expect that power rails 
have been cut off for the dGPU so putting it into S3 and doing a reset makes 
sense, but I don’t know about on an Intel system if that is logical.

It seems like Intel expects more that the card is going to be in runtime pm and 
putting it into S3 and doing reset might not be the right move.



From: Lazar, Lijo 
Sent: Wednesday, January 26, 2022 09:11
To: Limonciello, Mario ; 
amd-gfx@lists.freedesktop.org
Cc: Liang, Prike 
Subject: Re: [PATCH v5 2/4] drm/amd: add support to check whether the system is 
set to s3



Talking from generic API perspective - S3 is considered active for dGPU only if 
it's going to non-S0 state. If called from anywhere else than suspend op, this 
should return false.



Thanks,
Lijo



From: Limonciello, Mario 
mailto:mario.limoncie...@amd.com>>
Sent: Wednesday, January 26, 2022 8:37:28 PM
To: Lazar, Lijo mailto:lijo.la...@amd.com>>; 
amd-gfx@lists.freedesktop.org 
mailto:amd-gfx@lists.freedesktop.org>>
Cc: Liang, Prike mailto:prike.li...@amd.com>>
Subject: RE: [PATCH v5 2/4] drm/amd: add support to check whether the system is 
set to s3



[Public]



That was intentional – shouldn’t dGPU always be going through S3 path currently?



From: Lazar, Lijo mailto:lijo.la...@amd.com>>
Sent: Wednesday, January 26, 2022 09:06
To: Limonciello, Mario 
mailto:mario.limoncie...@amd.com>>; 
amd-gfx@lists.freedesktop.org
Cc: Liang, Prike mailto:prike.li...@amd.com>>; 
Limonciello, Mario mailto:mario.limoncie...@amd.com>>
Subject: Re: [PATCH v5 2/4] drm/amd: add support to check whether the system is 
set to s3



[Public]



Returns true for dGPU always. Better to keep the whole check under something 
like this.



if (pm_suspend_target_state != PM_SUSPEND_ON)



Thanks,
Lijo



From: amd-gfx 
mailto:amd-gfx-boun...@lists.freedesktop.org>>
 on behalf of Mario Limonciello 
mailto:mario.limoncie...@amd.com>>
Sent: Wednesday, January 26, 2022 9:39:42 AM
To: amd-gfx@lists.freedesktop.org 
mailto:amd-gfx@lists.freedesktop.org>>
Cc: Liang, Prike mailto:prike.li...@amd.com>>; 
Limonciello, Mario mailto:mario.limoncie...@amd.com>>
Subject: [PATCH v5 2/4] drm/amd: add support to check whether the system is set 
to s3



This will be used to help make decisions on what to do in
misconfigured systems.

Signed-off-by: Mario Limonciello 
mailto:mario.limoncie...@amd.com>>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h  |  2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 17 +
 2 files changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 3bc76759c143..f184c88d3d4f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1409,11 +1409,13 @@ int amdgpu_acpi_smart_shift_update(struct drm_device 
*dev, enum amdgpu_ss ss_sta
 int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);

 void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_backlight_caps *caps);
+bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
 bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
 void amdgpu_acpi_detect(void);
 #else
 static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }
 static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }
+static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { 
return false };
 static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { 
return false; }
 static inline void amdgpu_acpi_detect(void) { }
 static inline bool amdgpu_acpi_is_power_shift_control_supported(void) { return 
false; }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
index 2531da6cbec3..df673062bc03 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
@@ -1031,6 +1031,23 @@ void amdgpu_acpi_detect(void)
 }
 }

+/**
+ * amdgpu_acpi_is_s3_active
+ *
+ * @adev: amdgpu_device_pointer
+ *
+ * returns true if supported, false if not.
+ */
+bool 

Re: [PATCH] display/amd: decrease message verbosity about watermarks table failure

2022-01-26 Thread Harry Wentland



On 2022-01-25 18:35, Mario Limonciello wrote:
> A number of BIOS versions have a problem with the watermarks table not
> being configured properly.  This manifests as a very scary looking warning
> during resume from s0i3.  This should be harmless in most cases and is well
> understood, so decrease the assertion to a clearer warning about the problem.
> 
> Signed-off-by: Mario Limonciello 

Reviewed-by: Harry Wentland 

Harry

> ---
>  drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c | 6 +-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c 
> b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c
> index 162ae7186124..21d2cbc3cbb2 100644
> --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c
> +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c
> @@ -120,7 +120,11 @@ int dcn31_smu_send_msg_with_param(
>   result = dcn31_smu_wait_for_response(clk_mgr, 10, 20);
>  
>   if (result == VBIOSSMC_Result_Failed) {
> - ASSERT(0);
> + if (msg_id == VBIOSSMC_MSG_TransferTableDram2Smu &&
> + param == TABLE_WATERMARKS)
> + DC_LOG_WARNING("Watermarks table not configured 
> properly by SMU");
> + else
> + ASSERT(0);
>   REG_WRITE(MP1_SMN_C2PMSG_91, VBIOSSMC_Result_OK);
>   return -1;
>   }



RE: [PATCH v5 2/4] drm/amd: add support to check whether the system is set to s3

2022-01-26 Thread Limonciello, Mario
[Public]

Right -from an API perspective both amdgpu_acpi_is_s0ix_active and 
amdgpu_acpi_is_s3_active are only in suspend ops.

But so coming back to the 4th patch (and the associated bug), what is supposed 
to happen with a dGPU on an Intel system that does s2i?
For AMD APU w/ dGPU in the system doing s2i I would expect that power rails 
have been cut off for the dGPU so putting it into S3 and doing a reset makes 
sense, but I don't know about on an Intel system if that is logical.
It seems like Intel expects more that the card is going to be in runtime pm and 
putting it into S3 and doing reset might not be the right move.

From: Lazar, Lijo 
Sent: Wednesday, January 26, 2022 09:11
To: Limonciello, Mario ; 
amd-gfx@lists.freedesktop.org
Cc: Liang, Prike 
Subject: Re: [PATCH v5 2/4] drm/amd: add support to check whether the system is 
set to s3

Talking from generic API perspective - S3 is considered active for dGPU only if 
it's going to non-S0 state. If called from anywhere else than suspend op, this 
should return false.

Thanks,
Lijo

From: Limonciello, Mario 
mailto:mario.limoncie...@amd.com>>
Sent: Wednesday, January 26, 2022 8:37:28 PM
To: Lazar, Lijo mailto:lijo.la...@amd.com>>; 
amd-gfx@lists.freedesktop.org 
mailto:amd-gfx@lists.freedesktop.org>>
Cc: Liang, Prike mailto:prike.li...@amd.com>>
Subject: RE: [PATCH v5 2/4] drm/amd: add support to check whether the system is 
set to s3


[Public]



That was intentional - shouldn't dGPU always be going through S3 path currently?



From: Lazar, Lijo mailto:lijo.la...@amd.com>>
Sent: Wednesday, January 26, 2022 09:06
To: Limonciello, Mario 
mailto:mario.limoncie...@amd.com>>; 
amd-gfx@lists.freedesktop.org
Cc: Liang, Prike mailto:prike.li...@amd.com>>; 
Limonciello, Mario mailto:mario.limoncie...@amd.com>>
Subject: Re: [PATCH v5 2/4] drm/amd: add support to check whether the system is 
set to s3



[Public]



Returns true for dGPU always. Better to keep the whole check under something 
like this.



if (pm_suspend_target_state != PM_SUSPEND_ON)



Thanks,
Lijo



From: amd-gfx 
mailto:amd-gfx-boun...@lists.freedesktop.org>>
 on behalf of Mario Limonciello 
mailto:mario.limoncie...@amd.com>>
Sent: Wednesday, January 26, 2022 9:39:42 AM
To: amd-gfx@lists.freedesktop.org 
mailto:amd-gfx@lists.freedesktop.org>>
Cc: Liang, Prike mailto:prike.li...@amd.com>>; 
Limonciello, Mario mailto:mario.limoncie...@amd.com>>
Subject: [PATCH v5 2/4] drm/amd: add support to check whether the system is set 
to s3



This will be used to help make decisions on what to do in
misconfigured systems.

Signed-off-by: Mario Limonciello 
mailto:mario.limoncie...@amd.com>>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h  |  2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 17 +
 2 files changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 3bc76759c143..f184c88d3d4f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1409,11 +1409,13 @@ int amdgpu_acpi_smart_shift_update(struct drm_device 
*dev, enum amdgpu_ss ss_sta
 int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);

 void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_backlight_caps *caps);
+bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
 bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
 void amdgpu_acpi_detect(void);
 #else
 static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }
 static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }
+static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { 
return false };
 static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { 
return false; }
 static inline void amdgpu_acpi_detect(void) { }
 static inline bool amdgpu_acpi_is_power_shift_control_supported(void) { return 
false; }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
index 2531da6cbec3..df673062bc03 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
@@ -1031,6 +1031,23 @@ void amdgpu_acpi_detect(void)
 }
 }

+/**
+ * amdgpu_acpi_is_s3_active
+ *
+ * @adev: amdgpu_device_pointer
+ *
+ * returns true if supported, false if not.
+ */
+bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev)
+{
+#if IS_ENABLED(CONFIG_SUSPEND)
+   return !(adev->flags & AMD_IS_APU) ||
+   pm_suspend_target_state == PM_SUSPEND_MEM;
+#else
+   return false;
+#endif
+}
+
 /**
  * amdgpu_acpi_is_s0ix_active
  *
--
2.25.1


Re: [PATCH v5 2/4] drm/amd: add support to check whether the system is set to s3

2022-01-26 Thread Lazar, Lijo
Talking from generic API perspective - S3 is considered active for dGPU only if 
it's going to non-S0 state. If called from anywhere else than suspend op, this 
should return false.

Thanks,
Lijo

From: Limonciello, Mario 
Sent: Wednesday, January 26, 2022 8:37:28 PM
To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org 

Cc: Liang, Prike 
Subject: RE: [PATCH v5 2/4] drm/amd: add support to check whether the system is 
set to s3


[Public]



That was intentional – shouldn’t dGPU always be going through S3 path currently?



From: Lazar, Lijo 
Sent: Wednesday, January 26, 2022 09:06
To: Limonciello, Mario ; 
amd-gfx@lists.freedesktop.org
Cc: Liang, Prike ; Limonciello, Mario 

Subject: Re: [PATCH v5 2/4] drm/amd: add support to check whether the system is 
set to s3



[Public]



Returns true for dGPU always. Better to keep the whole check under something 
like this.



if (pm_suspend_target_state != PM_SUSPEND_ON)



Thanks,
Lijo



From: amd-gfx 
mailto:amd-gfx-boun...@lists.freedesktop.org>>
 on behalf of Mario Limonciello 
mailto:mario.limoncie...@amd.com>>
Sent: Wednesday, January 26, 2022 9:39:42 AM
To: amd-gfx@lists.freedesktop.org 
mailto:amd-gfx@lists.freedesktop.org>>
Cc: Liang, Prike mailto:prike.li...@amd.com>>; 
Limonciello, Mario mailto:mario.limoncie...@amd.com>>
Subject: [PATCH v5 2/4] drm/amd: add support to check whether the system is set 
to s3



This will be used to help make decisions on what to do in
misconfigured systems.

Signed-off-by: Mario Limonciello 
mailto:mario.limoncie...@amd.com>>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h  |  2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 17 +
 2 files changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 3bc76759c143..f184c88d3d4f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1409,11 +1409,13 @@ int amdgpu_acpi_smart_shift_update(struct drm_device 
*dev, enum amdgpu_ss ss_sta
 int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);

 void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_backlight_caps *caps);
+bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
 bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
 void amdgpu_acpi_detect(void);
 #else
 static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }
 static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }
+static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { 
return false };
 static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { 
return false; }
 static inline void amdgpu_acpi_detect(void) { }
 static inline bool amdgpu_acpi_is_power_shift_control_supported(void) { return 
false; }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
index 2531da6cbec3..df673062bc03 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
@@ -1031,6 +1031,23 @@ void amdgpu_acpi_detect(void)
 }
 }

+/**
+ * amdgpu_acpi_is_s3_active
+ *
+ * @adev: amdgpu_device_pointer
+ *
+ * returns true if supported, false if not.
+ */
+bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev)
+{
+#if IS_ENABLED(CONFIG_SUSPEND)
+   return !(adev->flags & AMD_IS_APU) ||
+   pm_suspend_target_state == PM_SUSPEND_MEM;
+#else
+   return false;
+#endif
+}
+
 /**
  * amdgpu_acpi_is_s0ix_active
  *
--
2.25.1


Re: [PATCH] drm/amdgpu: Fix an error message in rmmod

2022-01-26 Thread Felix Kuehling
My question is, why is this problem only seen during module unload? Why 
aren't we seeing HWS hangs due to GFX_OFF all the time in normal 
operations? For example when the GPU is idle and a new KFD process is 
started, creating a new runlist. Are we just getting lucky because the 
process first has to allocate some memory, which maybe makes some HW 
access (flushing TLBs etc.) that wakes up the GPU?



Regards,
  Felix



Am 2022-01-26 um 01:43 schrieb Yin, Tianci (Rico):


[AMD Official Use Only]


Thanks Kevin and Felix!

In gfxoff state, the dequeue request(by cp register writing) can't 
make gfxoff exit, actually the cp is powered off and the cp register 
writing is invalid, doorbell registers writing(regluar way) or 
directly request smu to disable gfx powergate(by invoking 
amdgpu_gfx_off_ctrl) can trigger gfxoff exit.


I have also tryed 
amdgpu_dpm_switch_power_profile(adev,PP_SMC_POWER_PROFILE_COMPUTE,false), 
but it has no effect.


[10386.162273] amdgpu: cp queue pipe 4 queue 0 preemption failed
[10671.225065] amdgpu: mmCP_HQD_ACTIVE : 0x
[10386.162290] amdgpu: mmCP_HQD_HQ_STATUS0 : 0x
[10386.162297] amdgpu: mmCP_STAT : 0x
[10386.162303] amdgpu: mmCP_BUSY_STAT : 0x
[10386.162308] amdgpu: mmRLC_STAT : 0x
[10386.162314] amdgpu: mmGRBM_STATUS : 0x
[10386.162320] amdgpu: mmGRBM_STATUS2: 0x

Thanks again!
Rico

*From:* Kuehling, Felix 
*Sent:* Tuesday, January 25, 2022 23:31
*To:* Wang, Yang(Kevin) ; Yin, Tianci (Rico) 
; amd-gfx@lists.freedesktop.org 

*Cc:* Grodzovsky, Andrey ; Chen, Guchun 


*Subject:* Re: [PATCH] drm/amdgpu: Fix an error message in rmmod
I have no objection to the change. It restores the sequence that was
used before e9669fb78262. But I don't understand why GFX_OFF is causing
a preemption error during module unload, but not when KFD is in normal
use. Maybe it's because of the compute power profile that's normally set
by amdgpu_amdkfd_set_compute_idle before we interact with the HWS.


Either way, the patch is

Acked-by: Felix Kuehling 



Am 2022-01-25 um 05:48 schrieb Wang, Yang(Kevin):
>
> [AMD Official Use Only]
>
>
> [AMD Official Use Only]
>
>
> the issue is introduced in following patch, so add following
> information is better.
> /fixes: (e9669fb78262) drm/amdgpu: Add early fini callback/
> /
> /
> Reviewed-by: Yang Wang 
> /
> /
> Best Regards,
> Kevin
>
> 
> *From:* amd-gfx  on behalf of
> Tianci Yin 
> *Sent:* Tuesday, January 25, 2022 6:03 PM
> *To:* amd-gfx@lists.freedesktop.org 
> *Cc:* Grodzovsky, Andrey ; Yin, Tianci
> (Rico) ; Chen, Guchun 
> *Subject:* [PATCH] drm/amdgpu: Fix an error message in rmmod
> From: "Tianci.Yin" 
>
> [why]
> In rmmod procedure, kfd sends cp a dequeue request, but the
> request does not get response, then an error message "cp
> queue pipe 4 queue 0 preemption failed" printed.
>
> [how]
> Performing kfd suspending after disabling gfxoff can fix it.
>
> Change-Id: I0453f28820542d4a5ab26e38fb5b87ed76ce6930
> Signed-off-by: Tianci.Yin 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index b75d67f644e5..77e9837ba342 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -2720,11 +2720,11 @@ static int amdgpu_device_ip_fini_early(struct
> amdgpu_device *adev)
>  }
>  }
>
> -   amdgpu_amdkfd_suspend(adev, false);
> -
>  amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
>  amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
>
> +   amdgpu_amdkfd_suspend(adev, false);
> +
>  /* Workaroud for ASICs need to disable SMC first */
>  amdgpu_device_smu_fini_early(adev);
>
> --
> 2.25.1
>


RE: [PATCH v5 2/4] drm/amd: add support to check whether the system is set to s3

2022-01-26 Thread Limonciello, Mario
[Public]

That was intentional - shouldn't dGPU always be going through S3 path currently?

From: Lazar, Lijo 
Sent: Wednesday, January 26, 2022 09:06
To: Limonciello, Mario ; 
amd-gfx@lists.freedesktop.org
Cc: Liang, Prike ; Limonciello, Mario 

Subject: Re: [PATCH v5 2/4] drm/amd: add support to check whether the system is 
set to s3


[Public]

Returns true for dGPU always. Better to keep the whole check under something 
like this.

if (pm_suspend_target_state != PM_SUSPEND_ON)

Thanks,
Lijo

From: amd-gfx 
mailto:amd-gfx-boun...@lists.freedesktop.org>>
 on behalf of Mario Limonciello 
mailto:mario.limoncie...@amd.com>>
Sent: Wednesday, January 26, 2022 9:39:42 AM
To: amd-gfx@lists.freedesktop.org 
mailto:amd-gfx@lists.freedesktop.org>>
Cc: Liang, Prike mailto:prike.li...@amd.com>>; 
Limonciello, Mario mailto:mario.limoncie...@amd.com>>
Subject: [PATCH v5 2/4] drm/amd: add support to check whether the system is set 
to s3

This will be used to help make decisions on what to do in
misconfigured systems.

Signed-off-by: Mario Limonciello 
mailto:mario.limoncie...@amd.com>>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h  |  2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 17 +
 2 files changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 3bc76759c143..f184c88d3d4f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1409,11 +1409,13 @@ int amdgpu_acpi_smart_shift_update(struct drm_device 
*dev, enum amdgpu_ss ss_sta
 int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);

 void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_backlight_caps *caps);
+bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
 bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
 void amdgpu_acpi_detect(void);
 #else
 static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }
 static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }
+static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { 
return false };
 static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { 
return false; }
 static inline void amdgpu_acpi_detect(void) { }
 static inline bool amdgpu_acpi_is_power_shift_control_supported(void) { return 
false; }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
index 2531da6cbec3..df673062bc03 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
@@ -1031,6 +1031,23 @@ void amdgpu_acpi_detect(void)
 }
 }

+/**
+ * amdgpu_acpi_is_s3_active
+ *
+ * @adev: amdgpu_device_pointer
+ *
+ * returns true if supported, false if not.
+ */
+bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev)
+{
+#if IS_ENABLED(CONFIG_SUSPEND)
+   return !(adev->flags & AMD_IS_APU) ||
+   pm_suspend_target_state == PM_SUSPEND_MEM;
+#else
+   return false;
+#endif
+}
+
 /**
  * amdgpu_acpi_is_s0ix_active
  *
--
2.25.1


Re: [PATCH v5 2/4] drm/amd: add support to check whether the system is set to s3

2022-01-26 Thread Lazar, Lijo
[Public]

Returns true for dGPU always. Better to keep the whole check under something 
like this.

if (pm_suspend_target_state != PM_SUSPEND_ON)

Thanks,
Lijo

From: amd-gfx  on behalf of Mario 
Limonciello 
Sent: Wednesday, January 26, 2022 9:39:42 AM
To: amd-gfx@lists.freedesktop.org 
Cc: Liang, Prike ; Limonciello, Mario 

Subject: [PATCH v5 2/4] drm/amd: add support to check whether the system is set 
to s3

This will be used to help make decisions on what to do in
misconfigured systems.

Signed-off-by: Mario Limonciello 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h  |  2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 17 +
 2 files changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 3bc76759c143..f184c88d3d4f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1409,11 +1409,13 @@ int amdgpu_acpi_smart_shift_update(struct drm_device 
*dev, enum amdgpu_ss ss_sta
 int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);

 void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_backlight_caps *caps);
+bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
 bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
 void amdgpu_acpi_detect(void);
 #else
 static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }
 static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }
+static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { 
return false };
 static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { 
return false; }
 static inline void amdgpu_acpi_detect(void) { }
 static inline bool amdgpu_acpi_is_power_shift_control_supported(void) { return 
false; }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
index 2531da6cbec3..df673062bc03 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
@@ -1031,6 +1031,23 @@ void amdgpu_acpi_detect(void)
 }
 }

+/**
+ * amdgpu_acpi_is_s3_active
+ *
+ * @adev: amdgpu_device_pointer
+ *
+ * returns true if supported, false if not.
+ */
+bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev)
+{
+#if IS_ENABLED(CONFIG_SUSPEND)
+   return !(adev->flags & AMD_IS_APU) ||
+   pm_suspend_target_state == PM_SUSPEND_MEM;
+#else
+   return false;
+#endif
+}
+
 /**
  * amdgpu_acpi_is_s0ix_active
  *
--
2.25.1



Re: [PATCH v2 09/11] drm: Convert open-coded yes/no strings to yesno()

2022-01-26 Thread Jani Nikula
On Wed, 26 Jan 2022, Lucas De Marchi  wrote:
> linux/string_helpers.h provides a helper to return "yes"/"no" strings.
> Replace the open coded versions with str_yes_no(). The places were
> identified with the following semantic patch:
>
>   @@
>   expression b;
>   @@
>
>   - b ? "yes" : "no"
>   + str_yes_no(b)
>
> Then the includes were added, so we include-what-we-use, and parenthesis
> adjusted in drivers/gpu/drm/v3d/v3d_debugfs.c. After the conversion we
> still see the same binary sizes:
>
>textdata bss dec hex filename
>   511493295 212   54656d580 virtio/virtio-gpu.ko.old
>   511493295 212   54656d580 virtio/virtio-gpu.ko
> 1441491   60340 800 1502631  16eda7 radeon/radeon.ko.old
> 1441491   60340 800 1502631  16eda7 radeon/radeon.ko
> 6125369  328538   34000 6487907  62ff63 amd/amdgpu/amdgpu.ko.old
> 6125369  328538   34000 6487907  62ff63 amd/amdgpu/amdgpu.ko
>  411986   104906176  428652   68a6c drm.ko.old
>  411986   104906176  428652   68a6c drm.ko
>   981291636 264  100029   186bd dp/drm_dp_helper.ko.old
>   981291636 264  100029   186bd dp/drm_dp_helper.ko
> 1973432  1096402352 2085424  1fd230 nouveau/nouveau.ko.old
> 1973432  1096402352 2085424  1fd230 nouveau/nouveau.ko
>
> Signed-off-by: Lucas De Marchi 

Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/amd/amdgpu/atom.c |  4 +++-
>  drivers/gpu/drm/dp/drm_dp.c   |  3 ++-
>  drivers/gpu/drm/drm_client_modeset.c  |  3 ++-
>  drivers/gpu/drm/drm_gem.c |  3 ++-
>  drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.c |  5 -
>  drivers/gpu/drm/radeon/atom.c |  3 ++-
>  drivers/gpu/drm/v3d/v3d_debugfs.c | 11 ++-
>  drivers/gpu/drm/virtio/virtgpu_debugfs.c  |  4 +++-
>  8 files changed, 24 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/atom.c 
> b/drivers/gpu/drm/amd/amdgpu/atom.c
> index 6fa2229b7229..1c5d9388ad0b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/atom.c
> +++ b/drivers/gpu/drm/amd/amdgpu/atom.c
> @@ -25,6 +25,8 @@
>  #include 
>  #include 
>  #include 
> +#include 
> +
>  #include 
>  
>  #include 
> @@ -740,7 +742,7 @@ static void atom_op_jump(atom_exec_context *ctx, int 
> *ptr, int arg)
>   break;
>   }
>   if (arg != ATOM_COND_ALWAYS)
> - SDEBUG("   taken: %s\n", execute ? "yes" : "no");
> + SDEBUG("   taken: %s\n", str_yes_no(execute));
>   SDEBUG("   target: 0x%04X\n", target);
>   if (execute) {
>   if (ctx->last_jump == (ctx->start + target)) {
> diff --git a/drivers/gpu/drm/dp/drm_dp.c b/drivers/gpu/drm/dp/drm_dp.c
> index 6d43325acca5..c43577c8ac4d 100644
> --- a/drivers/gpu/drm/dp/drm_dp.c
> +++ b/drivers/gpu/drm/dp/drm_dp.c
> @@ -28,6 +28,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #include 
>  #include 
> @@ -1239,7 +1240,7 @@ void drm_dp_downstream_debug(struct seq_file *m,
>   bool branch_device = drm_dp_is_branch(dpcd);
>  
>   seq_printf(m, "\tDP branch device present: %s\n",
> -branch_device ? "yes" : "no");
> +str_yes_no(branch_device));
>  
>   if (!branch_device)
>   return;
> diff --git a/drivers/gpu/drm/drm_client_modeset.c 
> b/drivers/gpu/drm/drm_client_modeset.c
> index ced09c7c06f9..e6346a67cd98 100644
> --- a/drivers/gpu/drm/drm_client_modeset.c
> +++ b/drivers/gpu/drm/drm_client_modeset.c
> @@ -11,6 +11,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #include 
>  #include 
> @@ -241,7 +242,7 @@ static void drm_client_connectors_enabled(struct 
> drm_connector **connectors,
>   connector = connectors[i];
>   enabled[i] = drm_connector_enabled(connector, true);
>   DRM_DEBUG_KMS("connector %d enabled? %s\n", connector->base.id,
> -   connector->display_info.non_desktop ? "non 
> desktop" : enabled[i] ? "yes" : "no");
> +   connector->display_info.non_desktop ? "non 
> desktop" : str_yes_no(enabled[i]));
>  
>   any_enabled |= enabled[i];
>   }
> diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
> index 21631c22b374..3c888db59ea4 100644
> --- a/drivers/gpu/drm/drm_gem.c
> +++ b/drivers/gpu/drm/drm_gem.c
> @@ -37,6 +37,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  
> @@ -1145,7 +1146,7 @@ void drm_gem_print_info(struct drm_printer *p, unsigned 
> int indent,
> drm_vma_node_start(>vma_node));
>   drm_printf_indent(p, indent, "size=%zu\n", obj->size);
>   drm_printf_indent(p, indent, "imported=%s\n",
> -   obj->import_attach ? "yes" : "no");
> +   str_yes_no(obj->import_attach));
>  
>   if (obj->funcs->print_info)
>   obj->funcs->print_info(p, indent, obj);
> diff --git 

RE: [PATCH v5 4/4] drm/amd: don't reset dGPUs that don't go through system S3

2022-01-26 Thread Limonciello, Mario
[AMD Official Use Only]

> -Original Message-
> From: Limonciello, Mario 
> Sent: Tuesday, January 25, 2022 22:10
> To: amd-gfx@lists.freedesktop.org
> Cc: Liang, Prike ; Limonciello, Mario
> 
> Subject: [PATCH v5 4/4] drm/amd: don't reset dGPUs that don't go through
> system S3
> 
> dGPUs connected to Intel systems configured for suspend to idle
> will not necessarily have the power rails cut at suspend and
> resetting the GPU may lead to problematic behaviors.
> 
> Fixes: 6dc8265f9803 ("drm/amdgpu: always reset the asic in suspend (v2)")
> Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1879

Testing has failed with this patch on the original issue mentioned above, so if
the rest of this series is OK, this one at least should be dropped for now.

> Signed-off-by: Mario Limonciello 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 123ec5a07dd5..66290f986544 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -2319,7 +2319,7 @@ static int amdgpu_pmops_suspend(struct device
> *dev)
>   r = amdgpu_device_suspend(drm_dev, true);
>   if (r)
>   return r;
> - if (!adev->in_s0ix)
> + if (!adev->in_s0ix && pm_suspend_via_firmware())
>   r = amdgpu_asic_reset(adev);
>   }
>   return r;
> --
> 2.25.1


Re: [PATCH v2 08/11] drm/gem: Sort includes alphabetically

2022-01-26 Thread Jani Nikula
On Wed, 26 Jan 2022, Lucas De Marchi  wrote:
> Sort includes alphabetically so it's easier to add/remove includes and
> know when that is needed.
>
> Signed-off-by: Lucas De Marchi 

Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/drm_gem.c | 20 ++--
>  1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
> index 4dcdec6487bb..21631c22b374 100644
> --- a/drivers/gpu/drm/drm_gem.c
> +++ b/drivers/gpu/drm/drm_gem.c
> @@ -25,20 +25,20 @@
>   *
>   */
>  
> -#include 
> -#include 
> -#include 
> -#include 
> -#include 
> +#include 
> +#include 
>  #include 
> -#include 
> +#include 
> +#include 
> +#include 
>  #include 
> +#include 
>  #include 
> -#include 
> -#include 
> -#include 
> -#include 
>  #include 
> +#include 
> +#include 
> +#include 
> +#include 
>  
>  #include 
>  #include 

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [PATCH v2 02/11] drm/i915: Fix trailing semicolon

2022-01-26 Thread Jani Nikula
On Wed, 26 Jan 2022, Lucas De Marchi  wrote:
> Remove the trailing semicolon, as correctly warned by checkpatch:
>
>   -:1189: WARNING:TRAILING_SEMICOLON: macros should not use a trailing 
> semicolon
>   #1189: FILE: drivers/gpu/drm/i915/intel_device_info.c:119:
>   +#define PRINT_FLAG(name) drm_printf(p, "%s: %s\n", #name, 
> yesno(info->display.name));
>
> Signed-off-by: Lucas De Marchi 

Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/i915/intel_device_info.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
> b/drivers/gpu/drm/i915/intel_device_info.c
> index 93b251b25aba..94da5aa37391 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -114,7 +114,7 @@ void intel_device_info_print_static(const struct 
> intel_device_info *info,
>   DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG);
>  #undef PRINT_FLAG
>  
> -#define PRINT_FLAG(name) drm_printf(p, "%s: %s\n", #name, 
> yesno(info->display.name));
> +#define PRINT_FLAG(name) drm_printf(p, "%s: %s\n", #name, 
> yesno(info->display.name))
>   DEV_INFO_DISPLAY_FOR_EACH_FLAG(PRINT_FLAG);
>  #undef PRINT_FLAG
>  }

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [PATCH v2 07/11] drm/amd/display: Use str_yes_no()

2022-01-26 Thread Harry Wentland
On 2022-01-26 04:39, Lucas De Marchi wrote:
> Remove the local yesno() implementation and adopt the str_yes_no() from
> linux/string_helpers.h.
> 
> Signed-off-by: Lucas De Marchi 

Reviewed-by: Harry Wentland 

Harry

> ---
>  .../drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c  | 14 +-
>  1 file changed, 5 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
> index 26719efa5396..5ff1076b9130 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
> @@ -23,6 +23,7 @@
>   *
>   */
>  
> +#include 
>  #include 
>  
>  #include "dc.h"
> @@ -49,11 +50,6 @@ struct dmub_debugfs_trace_entry {
>   uint32_t param1;
>  };
>  
> -static inline const char *yesno(bool v)
> -{
> - return v ? "yes" : "no";
> -}
> -
>  /* parse_write_buffer_into_params - Helper function to parse debugfs write 
> buffer into an array
>   *
>   * Function takes in attributes passed to debugfs write entry
> @@ -853,12 +849,12 @@ static int psr_capability_show(struct seq_file *m, void 
> *data)
>   if (!(link->connector_signal & SIGNAL_TYPE_EDP))
>   return -ENODEV;
>  
> - seq_printf(m, "Sink support: %s", 
> yesno(link->dpcd_caps.psr_caps.psr_version != 0));
> + seq_printf(m, "Sink support: %s", 
> str_yes_no(link->dpcd_caps.psr_caps.psr_version != 0));
>   if (link->dpcd_caps.psr_caps.psr_version)
>   seq_printf(m, " [0x%02x]", 
> link->dpcd_caps.psr_caps.psr_version);
>   seq_puts(m, "\n");
>  
> - seq_printf(m, "Driver support: %s", 
> yesno(link->psr_settings.psr_feature_enabled));
> + seq_printf(m, "Driver support: %s", 
> str_yes_no(link->psr_settings.psr_feature_enabled));
>   if (link->psr_settings.psr_version)
>   seq_printf(m, " [0x%02x]", link->psr_settings.psr_version);
>   seq_puts(m, "\n");
> @@ -1207,8 +1203,8 @@ static int dp_dsc_fec_support_show(struct seq_file *m, 
> void *data)
>   drm_modeset_drop_locks();
>   drm_modeset_acquire_fini();
>  
> - seq_printf(m, "FEC_Sink_Support: %s\n", yesno(is_fec_supported));
> - seq_printf(m, "DSC_Sink_Support: %s\n", yesno(is_dsc_supported));
> + seq_printf(m, "FEC_Sink_Support: %s\n", str_yes_no(is_fec_supported));
> + seq_printf(m, "DSC_Sink_Support: %s\n", str_yes_no(is_dsc_supported));
>  
>   return ret;
>  }



[PATCH RESEND] drm/amd/display: Force link_rate as LINK_RATE_RBR2 for 2018 15" Apple Retina panels

2022-01-26 Thread Aditya Garg
From: Aun-Ali Zaidi 
 
The eDP link rate reported by the DP_MAX_LINK_RATE dpcd register (0xa) is
contradictory to the highest rate supported reported by
EDID (0xc = LINK_RATE_RBR2). The effects of this compounded with commit
'4a8ca46bae8a ("drm/amd/display: Default max bpc to 16 for eDP")' results
in no display modes being found and a dark panel.

For now, simply force the maximum supported link rate for the eDP attached
2018 15" Apple Retina panels.

Additionally, we must also check the firmware revision since the device ID
reported by the DPCD is identical to that of the more capable 16,1,
incorrectly quirking it. We also use said firmware check to quirk the
refreshed 15,1 models with Vega graphics as they use a slightly newer
firmware version.

Tested-by: Aun-Ali Zaidi 
Signed-off-by: Aun-Ali Zaidi 
Signed-off-by: Aditya Garg 
---
 .../gpu/drm/amd/display/dc/core/dc_link_dp.c  | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 
b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 05e216524..17939ad17 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -5597,6 +5597,25 @@ static bool retrieve_link_cap(struct dc_link *link)
dp_hw_fw_revision.ieee_fw_rev,
sizeof(dp_hw_fw_revision.ieee_fw_rev));
 
+   /* Quirk for Apple MBP 2018 15" Retina panels: wrong DP_MAX_LINK_RATE */
+   {
+   uint8_t str_mbp_2018[] = { 101, 68, 21, 103, 98, 97 };
+   uint8_t fwrev_mbp_2018[] = { 7, 4 };
+   uint8_t fwrev_mbp_2018_vega[] = { 8, 4 };
+
+   // We also check for the firmware revision as 16,1 models have 
an
+   // identical device id and are incorrectly quirked otherwise.
+   if ((link->dpcd_caps.sink_dev_id == 0x0010fa) &&
+   !memcmp(link->dpcd_caps.sink_dev_id_str, str_mbp_2018,
+sizeof(str_mbp_2018)) &&
+   (!memcmp(link->dpcd_caps.sink_fw_revision, fwrev_mbp_2018,
+sizeof(fwrev_mbp_2018)) ||
+   !memcmp(link->dpcd_caps.sink_fw_revision, 
fwrev_mbp_2018_vega,
+sizeof(fwrev_mbp_2018_vega {
+   link->reported_link_cap.link_rate = LINK_RATE_RBR2;
+   }
+   }
+
memset(>dpcd_caps.dsc_caps, '\0',
sizeof(link->dpcd_caps.dsc_caps));
memset(>dpcd_caps.fec_cap, '\0', sizeof(link->dpcd_caps.fec_cap));
-- 
2.25.1




Re: [PATCH v2 09/11] drm: Convert open-coded yes/no strings to yesno()

2022-01-26 Thread Andy Shevchenko
On Wed, Jan 26, 2022 at 11:39 AM Lucas De Marchi
 wrote:
>
> linux/string_helpers.h provides a helper to return "yes"/"no" strings.
> Replace the open coded versions with str_yes_no(). The places were
> identified with the following semantic patch:
>
> @@
> expression b;
> @@
>
> - b ? "yes" : "no"
> + str_yes_no(b)
>
> Then the includes were added, so we include-what-we-use, and parenthesis
> adjusted in drivers/gpu/drm/v3d/v3d_debugfs.c. After the conversion we
> still see the same binary sizes:
>
>textdata bss dec hex filename
>   511493295 212   54656d580 virtio/virtio-gpu.ko.old
>   511493295 212   54656d580 virtio/virtio-gpu.ko
> 1441491   60340 800 1502631  16eda7 radeon/radeon.ko.old
> 1441491   60340 800 1502631  16eda7 radeon/radeon.ko
> 6125369  328538   34000 6487907  62ff63 amd/amdgpu/amdgpu.ko.old
> 6125369  328538   34000 6487907  62ff63 amd/amdgpu/amdgpu.ko
>  411986   104906176  428652   68a6c drm.ko.old
>  411986   104906176  428652   68a6c drm.ko
>   981291636 264  100029   186bd dp/drm_dp_helper.ko.old
>   981291636 264  100029   186bd dp/drm_dp_helper.ko
> 1973432  1096402352 2085424  1fd230 nouveau/nouveau.ko.old
> 1973432  1096402352 2085424  1fd230 nouveau/nouveau.ko

This probably won't change for modules, but if you compile in the
linker may try to optimize it. Would be nice to see the old-new for
`make allyesconfig` or equivalent.

...

> seq_printf(m, "\tDP branch device present: %s\n",
> -  branch_device ? "yes" : "no");
> +  str_yes_no(branch_device));

Can it be now on one line? Same Q for all similar cases in the entire series.

-- 
With Best Regards,
Andy Shevchenko


[PATCH] drm/amdgpu: Wrong order for config and counter_id parameters

2022-01-26 Thread jinsdb
From: huangqu 

Wrong order for config and counter_id parameters was passed, when calling 
df_v3_6_pmc_set_deferred and df_v3_6_pmc_is_deferred functions.

Signed-off-by: huangqu 
---
 drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c 
b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
index 43c5e3ec9..f4dfca013 100644
--- a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
+++ b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
@@ -458,7 +458,7 @@ static int df_v3_6_pmc_add_cntr(struct amdgpu_device *adev,

 #define DEFERRED_ARM_MASK  (1 << 31)
 static int df_v3_6_pmc_set_deferred(struct amdgpu_device *adev,
-   int counter_idx, uint64_t config,
+   uint64_t config, int counter_idx,
bool is_deferred)
 {

@@ -476,8 +476,8 @@ static int df_v3_6_pmc_set_deferred(struct amdgpu_device 
*adev,
 }

 static bool df_v3_6_pmc_is_deferred(struct amdgpu_device *adev,
-   int counter_idx,
-   uint64_t config)
+   uint64_t config,
+   int counter_idx)
 {
return  (df_v3_6_pmc_has_counter(adev, config, counter_idx) &&
(adev->df_perfmon_config_assign_mask[counter_idx]
--
2.31.1



Re: [PATCH v2 00/11] lib/string_helpers: Add a few string helpers

2022-01-26 Thread Andy Shevchenko
On Wed, Jan 26, 2022 at 11:39 AM Lucas De Marchi
 wrote:
>
> Add some helpers under lib/string_helpers.h so they can be used
> throughout the kernel. When I started doing this there were 2 other
> previous attempts I know of, not counting the iterations each of them
> had:
>
> 1) https://lore.kernel.org/all/20191023131308.9420-1-jani.nik...@intel.com/
> 2) 
> https://lore.kernel.org/all/20210215142137.64476-1-andriy.shevche...@linux.intel.com/#t
>
> Now there is also the v1 of this same patch series:
> https://lore.kernel.org/all/20220119072450.2890107-1-lucas.demar...@intel.com/
>
> Going through the comments I tried to find some common ground and
> justification for what is in here, addressing some of the concerns
> raised.
>
> a. This version should be a drop-in replacement for what is currently in
>the tree, with no change in behavior or binary size. For binary
>size what I checked was that the linked objects in the end have the
>same size (gcc 11). From comments in the previous attempts this seems
>also the case for earlier compiler versions
>
> b. I didn't change the function name to choice_* as suggested by Andrew
>Morton in 20191023155619.43e0013f0c8c673a5c508...@linux-foundation.org
>because other people argumented in favor of shorter names for these
>simple helpers - if they are long and people simply not use due to
>that, we failed. However as pointed out in v1 of this patchseries,
>onoff(), yesno(), enabledisable(), enableddisabled() have some
>issues: the last 2 are hard to read and for the first 2 it would not
>be hard to have the symbol to clash with variable names.
>From comments in v1, most people were in favor (or at least not
>opposed) to using str_on_off(), str_yes_no(), str_enable_disable()
>and str_enabled_disabled().
>
> c. Use string_helper.h for these helpers - pulling string.h in the
>compilations units was one of the concerns and I think re-using this
>already existing header is better than creating a new string-choice.h
>
> d. One alternative to all of this suggested by Christian König
>(43456ba7-c372-84cc-4949-dcb817188...@amd.com) would be to add a
>printk format. But besides the comment, he also seemed to like
>the common function. This brought the argument from others that the
>simple yesno()/enabledisable() already used in the code (or new
>renamed version) is easier to remember and use than e.g. %py[DOY]

I do not see any impediments to this series to be pulled.
Thanks for the work you've done!

> Changes in v2:
>
>   - Use str_ prefix and separate other words with underscore: it's a
> little bit longer, but should improve readability
>
>   - Patches we re-split due to the rename: first patch adds all the new
> functions, then additional patches try to do one conversion at a
> time. While doing so, there were some fixes for issues already
> present along the way
>
>   - Style suggestions from v1 were adopted
>
> In v1 it was suggested to apply this in drm-misc. I will leave this to
> maintainers to decide: maybe it would be simpler to merge the first
> patches on drm-intel-next, wait for the back merge and merge the rest
> through drm-misc - my fear is a big conflict with other work going in
> drm-intel-next since the bulk of the rename is there.
>
> I tried to figure out acks and reviews from v1 and apply them to how the
> patches are now split.
>
> thanks
> Lucas De Marchi
>
> Lucas De Marchi (11):
>   lib/string_helpers: Consolidate string helpers implementation
>   drm/i915: Fix trailing semicolon
>   drm/i915: Use str_yes_no()
>   drm/i915: Use str_enable_disable()
>   drm/i915: Use str_enabled_disabled()
>   drm/i915: Use str_on_off()
>   drm/amd/display: Use str_yes_no()
>   drm/gem: Sort includes alphabetically
>   drm: Convert open-coded yes/no strings to yesno()
>   tomoyo: Use str_yes_no()
>   cxgb4: Use str_yes_no()
>
>  drivers/gpu/drm/amd/amdgpu/atom.c |   4 +-
>  .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |  14 +-
>  drivers/gpu/drm/dp/drm_dp.c   |   3 +-
>  drivers/gpu/drm/drm_client_modeset.c  |   3 +-
>  drivers/gpu/drm/drm_gem.c |  23 +-
>  drivers/gpu/drm/i915/display/g4x_dp.c |   6 +-
>  .../gpu/drm/i915/display/intel_backlight.c|   3 +-
>  drivers/gpu/drm/i915/display/intel_ddi.c  |   4 +-
>  drivers/gpu/drm/i915/display/intel_display.c  |  46 ++--
>  .../drm/i915/display/intel_display_debugfs.c  |  74 +++---
>  .../drm/i915/display/intel_display_power.c|   4 +-
>  .../drm/i915/display/intel_display_trace.h|   9 +-
>  drivers/gpu/drm/i915/display/intel_dp.c   |  20 +-
>  drivers/gpu/drm/i915/display/intel_dpll.c |   3 +-
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c |   7 +-
>  drivers/gpu/drm/i915/display/intel_dsi_vbt.c  |   7 +-
>  drivers/gpu/drm/i915/display/intel_fbc.c  |   4 +-
>  drivers/gpu/drm/i915/display/intel_fdi.c  |   8 +-
>  

Re: [Intel-gfx] [PATCH v2 09/11] drm: Convert open-coded yes/no strings to yesno()

2022-01-26 Thread Andy Shevchenko
On Wed, Jan 26, 2022 at 02:43:45AM -0800, Lucas De Marchi wrote:
> On Wed, Jan 26, 2022 at 12:12:50PM +0200, Andy Shevchenko wrote:
> > On Wed, Jan 26, 2022 at 11:39 AM Lucas De Marchi
> >  wrote:

...

> > >  411986   104906176  428652   68a6c drm.ko.old
> > >  411986   104906176  428652   68a6c drm.ko
> > >   981291636 264  100029   186bd dp/drm_dp_helper.ko.old
> > >   981291636 264  100029   186bd dp/drm_dp_helper.ko
> > > 1973432  1096402352 2085424  1fd230 nouveau/nouveau.ko.old
> > > 1973432  1096402352 2085424  1fd230 nouveau/nouveau.ko
> > 
> > This probably won't change for modules, but if you compile in the
> > linker may try to optimize it. Would be nice to see the old-new for
> > `make allyesconfig` or equivalent.
> 
> just like it would already do, no? I can try and see what happens, but
> my feeling is that we won't have any change.

Maybe not or maybe a small win. Depends how compiler puts / linker sees
that in two cases. (Yeah, likely it should be no differences if all
instances are already caught by linker)

-- 
With Best Regards,
Andy Shevchenko




Re: [PATCH 2/2] drm/amdgpu: add sysfs files for XGMI segment size and physical node id

2022-01-26 Thread StDenis, Tom
[AMD Official Use Only]

Sadly I don't control any XGMI hosts to try it out.  So if they pick it up in 
their builds I can but otherwise we'll have to wait.

Tom


From: Tuikov, Luben 
Sent: Wednesday, January 26, 2022 07:55
To: Christian König; StDenis, Tom
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/amdgpu: add sysfs files for XGMI segment size and 
physical node id

This seems reasonable. Hope it works out for umr.

Reviewed-by: Luben Tuikov 

Regards,
Luben

On 2022-01-26 06:59, Christian König wrote:
> umr needs that to correctly calculate the VRAM base address
> inside the MC address space.
>
> Only compile tested!
>
> Signed-off-by: Christian König 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 34 
>  1 file changed, 34 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
> index 68509f619ba3..21a5d07a1abf 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
> @@ -252,6 +252,26 @@ static ssize_t amdgpu_xgmi_show_device_id(struct device 
> *dev,
>
>  }
>
> +static ssize_t amdgpu_xgmi_show_node_segment_size(struct device *dev,
> +   struct device_attribute *attr,
> +   char *buf)
> +{
> + struct drm_device *ddev = dev_get_drvdata(dev);
> + struct amdgpu_device *adev = drm_to_adev(ddev);
> +
> + return sysfs_emit(buf, "%llu\n", adev->gmc.xgmi.node_segment_size);
> +}
> +
> +static ssize_t amdgpu_xgmi_show_physical_node_id(struct device *dev,
> +  struct device_attribute *attr,
> +  char *buf)
> +{
> + struct drm_device *ddev = dev_get_drvdata(dev);
> + struct amdgpu_device *adev = drm_to_adev(ddev);
> +
> + return sysfs_emit(buf, "%u\n", adev->gmc.xgmi.physical_node_id);
> +}
> +
>  #define AMDGPU_XGMI_SET_FICAA(o) ((o) | 0x456801)
>  static ssize_t amdgpu_xgmi_show_error(struct device *dev,
> struct device_attribute *attr,
> @@ -287,6 +307,10 @@ static ssize_t amdgpu_xgmi_show_error(struct device *dev,
>
>
>  static DEVICE_ATTR(xgmi_device_id, S_IRUGO, amdgpu_xgmi_show_device_id, 
> NULL);
> +static DEVICE_ATTR(xgmi_node_segment_size, S_IRUGO,
> +amdgpu_xgmi_show_node_segment_size, NULL);
> +static DEVICE_ATTR(xgmi_physical_node_id, S_IRUGO,
> +amdgpu_xgmi_show_physical_node_id, NULL);
>  static DEVICE_ATTR(xgmi_error, S_IRUGO, amdgpu_xgmi_show_error, NULL);
>
>  static void amdgpu_xgmi_sysfs_rem_dev_info(struct amdgpu_device *adev,
> @@ -295,6 +319,8 @@ static void amdgpu_xgmi_sysfs_rem_dev_info(struct 
> amdgpu_device *adev,
>   char node[10];
>
>   device_remove_file(adev->dev, _attr_xgmi_device_id);
> + device_remove_file(adev->dev, _attr_xgmi_node_segment_size);
> + device_remove_file(adev->dev, _attr_xgmi_physical_node_id);
>   device_remove_file(adev->dev, _attr_xgmi_error);
>
>   if (hive->kobj.parent != (>dev->kobj))
> @@ -318,6 +344,14 @@ static int amdgpu_xgmi_sysfs_add_dev_info(struct 
> amdgpu_device *adev,
>   if (r)
>   goto error;
>
> + r = device_create_file(adev->dev, _attr_xgmi_node_segment_size);
> + if (r)
> + goto error;
> +
> + r = device_create_file(adev->dev, _attr_xgmi_physical_node_id);
> + if (r)
> + goto error;
> +
>   /* Create sysfs link to hive info folder on the first device */
>   if (hive->kobj.parent != (>dev->kobj)) {
>   r = sysfs_create_link(>dev->kobj, >kobj,

Regards,
--
Luben



Re: [PATCH 2/2] drm/amdgpu: add sysfs files for XGMI segment size and physical node id

2022-01-26 Thread Luben Tuikov
This seems reasonable. Hope it works out for umr.

Reviewed-by: Luben Tuikov 

Regards,
Luben

On 2022-01-26 06:59, Christian König wrote:
> umr needs that to correctly calculate the VRAM base address
> inside the MC address space.
>
> Only compile tested!
>
> Signed-off-by: Christian König 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 34 
>  1 file changed, 34 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
> index 68509f619ba3..21a5d07a1abf 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
> @@ -252,6 +252,26 @@ static ssize_t amdgpu_xgmi_show_device_id(struct device 
> *dev,
>  
>  }
>  
> +static ssize_t amdgpu_xgmi_show_node_segment_size(struct device *dev,
> +   struct device_attribute *attr,
> +   char *buf)
> +{
> + struct drm_device *ddev = dev_get_drvdata(dev);
> + struct amdgpu_device *adev = drm_to_adev(ddev);
> +
> + return sysfs_emit(buf, "%llu\n", adev->gmc.xgmi.node_segment_size);
> +}
> +
> +static ssize_t amdgpu_xgmi_show_physical_node_id(struct device *dev,
> +  struct device_attribute *attr,
> +  char *buf)
> +{
> + struct drm_device *ddev = dev_get_drvdata(dev);
> + struct amdgpu_device *adev = drm_to_adev(ddev);
> +
> + return sysfs_emit(buf, "%u\n", adev->gmc.xgmi.physical_node_id);
> +}
> +
>  #define AMDGPU_XGMI_SET_FICAA(o) ((o) | 0x456801)
>  static ssize_t amdgpu_xgmi_show_error(struct device *dev,
> struct device_attribute *attr,
> @@ -287,6 +307,10 @@ static ssize_t amdgpu_xgmi_show_error(struct device *dev,
>  
>  
>  static DEVICE_ATTR(xgmi_device_id, S_IRUGO, amdgpu_xgmi_show_device_id, 
> NULL);
> +static DEVICE_ATTR(xgmi_node_segment_size, S_IRUGO,
> +amdgpu_xgmi_show_node_segment_size, NULL);
> +static DEVICE_ATTR(xgmi_physical_node_id, S_IRUGO,
> +amdgpu_xgmi_show_physical_node_id, NULL);
>  static DEVICE_ATTR(xgmi_error, S_IRUGO, amdgpu_xgmi_show_error, NULL);
>  
>  static void amdgpu_xgmi_sysfs_rem_dev_info(struct amdgpu_device *adev,
> @@ -295,6 +319,8 @@ static void amdgpu_xgmi_sysfs_rem_dev_info(struct 
> amdgpu_device *adev,
>   char node[10];
>  
>   device_remove_file(adev->dev, _attr_xgmi_device_id);
> + device_remove_file(adev->dev, _attr_xgmi_node_segment_size);
> + device_remove_file(adev->dev, _attr_xgmi_physical_node_id);
>   device_remove_file(adev->dev, _attr_xgmi_error);
>  
>   if (hive->kobj.parent != (>dev->kobj))
> @@ -318,6 +344,14 @@ static int amdgpu_xgmi_sysfs_add_dev_info(struct 
> amdgpu_device *adev,
>   if (r)
>   goto error;
>  
> + r = device_create_file(adev->dev, _attr_xgmi_node_segment_size);
> + if (r)
> + goto error;
> +
> + r = device_create_file(adev->dev, _attr_xgmi_physical_node_id);
> + if (r)
> + goto error;
> +
>   /* Create sysfs link to hive info folder on the first device */
>   if (hive->kobj.parent != (>dev->kobj)) {
>   r = sysfs_create_link(>dev->kobj, >kobj,

Regards,
-- 
Luben



Re: [PATCH 1/2] drm/amdgpu: cleanup amdgpu_xgmi_sysfs_add_dev_info

2022-01-26 Thread Luben Tuikov
Yeah, that's cleaner.

Reviewed-by: Luben Tuikov 

Regards,
Luben

On 2022-01-26 06:59, Christian König wrote:
> Don't initialize variables if it isn't absolutely necessary.
>
> Use amdgpu_xgmi_sysfs_rem_dev_info to cleanup when something goes wrong.
>
> Drop the explicit warnings since the sysfs core warns about things like
> duplicate files itself.
>
> Signed-off-by: Christian König 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 85 +---
>  1 file changed, 33 insertions(+), 52 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
> index 5929d6f528c9..68509f619ba3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
> @@ -289,61 +289,10 @@ static ssize_t amdgpu_xgmi_show_error(struct device 
> *dev,
>  static DEVICE_ATTR(xgmi_device_id, S_IRUGO, amdgpu_xgmi_show_device_id, 
> NULL);
>  static DEVICE_ATTR(xgmi_error, S_IRUGO, amdgpu_xgmi_show_error, NULL);
>  
> -static int amdgpu_xgmi_sysfs_add_dev_info(struct amdgpu_device *adev,
> -  struct amdgpu_hive_info *hive)
> -{
> - int ret = 0;
> - char node[10] = { 0 };
> -
> - /* Create xgmi device id file */
> - ret = device_create_file(adev->dev, _attr_xgmi_device_id);
> - if (ret) {
> - dev_err(adev->dev, "XGMI: Failed to create device file 
> xgmi_device_id\n");
> - return ret;
> - }
> -
> - /* Create xgmi error file */
> - ret = device_create_file(adev->dev, _attr_xgmi_error);
> - if (ret)
> - pr_err("failed to create xgmi_error\n");
> -
> -
> - /* Create sysfs link to hive info folder on the first device */
> - if (hive->kobj.parent != (>dev->kobj)) {
> - ret = sysfs_create_link(>dev->kobj, >kobj,
> - "xgmi_hive_info");
> - if (ret) {
> - dev_err(adev->dev, "XGMI: Failed to create link to hive 
> info");
> - goto remove_file;
> - }
> - }
> -
> - sprintf(node, "node%d", atomic_read(>number_devices));
> - /* Create sysfs link form the hive folder to yourself */
> - ret = sysfs_create_link(>kobj, >dev->kobj, node);
> - if (ret) {
> - dev_err(adev->dev, "XGMI: Failed to create link from hive 
> info");
> - goto remove_link;
> - }
> -
> - goto success;
> -
> -
> -remove_link:
> - sysfs_remove_link(>dev->kobj, adev_to_drm(adev)->unique);
> -
> -remove_file:
> - device_remove_file(adev->dev, _attr_xgmi_device_id);
> -
> -success:
> - return ret;
> -}
> -
>  static void amdgpu_xgmi_sysfs_rem_dev_info(struct amdgpu_device *adev,
> struct amdgpu_hive_info *hive)
>  {
>   char node[10];
> - memset(node, 0, sizeof(node));
>  
>   device_remove_file(adev->dev, _attr_xgmi_device_id);
>   device_remove_file(adev->dev, _attr_xgmi_error);
> @@ -353,10 +302,42 @@ static void amdgpu_xgmi_sysfs_rem_dev_info(struct 
> amdgpu_device *adev,
>  
>   sprintf(node, "node%d", atomic_read(>number_devices));
>   sysfs_remove_link(>kobj, node);
> -
>  }
>  
> +static int amdgpu_xgmi_sysfs_add_dev_info(struct amdgpu_device *adev,
> +  struct amdgpu_hive_info *hive)
> +{
> + char node[10];
> + int r;
> +
> + r = device_create_file(adev->dev, _attr_xgmi_device_id);
> + if (r)
> + return r;
> +
> + r = device_create_file(adev->dev, _attr_xgmi_error);
> + if (r)
> + goto error;
>  
> + /* Create sysfs link to hive info folder on the first device */
> + if (hive->kobj.parent != (>dev->kobj)) {
> + r = sysfs_create_link(>dev->kobj, >kobj,
> +   "xgmi_hive_info");
> + if (r)
> + goto error;
> + }
> +
> + /* Create sysfs link form the hive folder to yourself */
> + sprintf(node, "node%d", atomic_read(>number_devices));
> + r = sysfs_create_link(>kobj, >dev->kobj, node);
> + if (r)
> + goto error;
> +
> + return 0;
> +
> +error:
> + amdgpu_xgmi_sysfs_rem_dev_info(adev, hive);
> + return r;
> +}
>  
>  struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct amdgpu_device *adev)
>  {

Regards,
-- 
Luben



RE: [PATCH] drm/amdgpu: add safeguards for accessing mmhub CG registers

2022-01-26 Thread Yu, Lang
[Public]

Hi Lijo,

For cyan skillfish, both adev->cg_flags and adev->pg_flags are zero. I just 
found "RREG32_SOC15(MMHUB, 0, mmMM_ATC_L2_MISC_CG);" in 
mmhub_v2_0_get_clockgating() caused a gpu hang(cat amdgpu_pm_info). I didn't 
check if it's some sort of PG which causes the issue.

Regards,
Lang

From: Lazar, Lijo 
Sent: Wednesday, January 26, 2022 8:06 PM
To: Yu, Lang ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Huang, Ray 
; Yu, Lang 
Subject: Re: [PATCH] drm/amdgpu: add safeguards for accessing mmhub CG registers


[Public]

Hi Lang,

There are ASICs in which driver doesn't enable CG, and then these flags will be 
false. However, the CG will be enabled by another component like VBIOS. Driver 
still reports the CG status eventhough driver doesn't enable it. For those, 
this logic doesn't work.

BTW, could you check if it's some sort of PG which causes the issue?

Thanks,
Lijo


Re: [RFC v3 08/12] drm/amdgpu: Rework reset domain to be refcounted.

2022-01-26 Thread Christian König




Am 25.01.22 um 23:37 schrieb Andrey Grodzovsky:

The reset domain contains register access semaphor
now and so needs to be present as long as each device
in a hive needs it and so it cannot be binded to XGMI
hive life cycle.
Adress this by making reset domain refcounted and pointed
by each member of the hive and the hive itself.

Signed-off-by: Andrey Grodzovsky 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h|  6 +--
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 44 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c  | 36 ++
  drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h  | 10 +
  drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c   | 26 ++---
  drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h   |  2 +-
  drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c  |  4 +-
  drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c  |  4 +-
  drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c  |  4 +-
  9 files changed, 105 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 8e96b9a14452..f2ba460bfd59 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -813,9 +813,7 @@ struct amd_powerplay {
  #define AMDGPU_RESET_MAGIC_NUM 64
  #define AMDGPU_MAX_DF_PERFMONS 4
  
-struct amdgpu_reset_domain {

-   struct workqueue_struct *wq;
-};
+struct amdgpu_reset_domain;
  
  struct amdgpu_device {

struct device   *dev;
@@ -1102,7 +1100,7 @@ struct amdgpu_device {
struct amdgpu_reset_control *reset_cntl;
uint32_t
ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
  
-	struct amdgpu_reset_domain	reset_domain;

+   struct amdgpu_reset_domain  *reset_domain;


Ah! Here it is, I was missing that on the initial patch.


  };
  
  static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index fef952ca8db5..b24829096359 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2313,7 +2313,7 @@ static int amdgpu_device_init_schedulers(struct 
amdgpu_device *adev)
  
  		r = drm_sched_init(>sched, _sched_ops,

   ring->num_hw_submission, 
amdgpu_job_hang_limit,
-  timeout, adev->reset_domain.wq, 
ring->sched_score, ring->name);
+  timeout, adev->reset_domain->wq, 
ring->sched_score, ring->name);
if (r) {
DRM_ERROR("Failed to create scheduler on ring %s.\n",
  ring->name);
@@ -2432,24 +2432,22 @@ static int amdgpu_device_ip_init(struct amdgpu_device 
*adev)
if (r)
goto init_failed;
  
+	/**

+* In case of XGMI grab extra reference for reset domain for this device
+*/
if (adev->gmc.xgmi.num_physical_nodes > 1) {
-   struct amdgpu_hive_info *hive;
-
-   amdgpu_xgmi_add_device(adev);
+   if (amdgpu_xgmi_add_device(adev) == 0) {
+   struct amdgpu_hive_info *hive = 
amdgpu_get_xgmi_hive(adev);
  
-		hive = amdgpu_get_xgmi_hive(adev);

-   if (!hive || !hive->reset_domain.wq) {
-   DRM_ERROR("Failed to obtain reset domain info for XGMI 
hive:%llx", hive->hive_id);
-   r = -EINVAL;
-   goto init_failed;
-   }
+   if (!hive->reset_domain ||
+   
!kref_get_unless_zero(>reset_domain->refcount)) {
+   r = -ENOENT;
+   goto init_failed;
+   }
  
-		adev->reset_domain.wq = hive->reset_domain.wq;

-   } else {
-   adev->reset_domain.wq = 
alloc_ordered_workqueue("amdgpu-reset-dev", 0);
-   if (!adev->reset_domain.wq) {
-   r = -ENOMEM;
-   goto init_failed;
+   /* Drop the early temporary reset domain we created for 
device */
+   kref_put(>reset_domain->refcount, 
amdgpu_reset_destroy_reset_domain);
+   adev->reset_domain = hive->reset_domain;
}
}
  
@@ -3599,6 +3597,15 @@ int amdgpu_device_init(struct amdgpu_device *adev,

return r;
}
  
+	/*

+* Reset domain needs to be present early, before XGMI hive discovered
+* (if any) and intitialized to use reset sem and in_gpu reset flag
+* early on during init.
+*/
+   adev->reset_domain = 
amdgpu_reset_create_reset_domain("amdgpu-reset-dev");
+   if (!adev->reset_domain)
+   return -ENOMEM;
+
/* early init functions */
r = amdgpu_device_ip_early_init(adev);
if (r)
@@ -3949,6 +3956,9 @@ void amdgpu_device_fini_sw(struct amdgpu_device *adev)
 

Re: [RFC v3 01/12] drm/amdgpu: Introduce reset domain

2022-01-26 Thread Christian König

Am 25.01.22 um 23:37 schrieb Andrey Grodzovsky:

Defined a reset_domain struct such that
all the entities that go through reset
together will be serialized one against
another. Do it for both single device and
XGMI hive cases.

Signed-off-by: Andrey Grodzovsky 
Suggested-by: Daniel Vetter 
Suggested-by: Christian König 
Reviewed-by: Christian König 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h|  7 +++
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 20 +++-
  drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c   |  9 +
  drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h   |  2 ++
  4 files changed, 37 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 9f017663ac50..b5ff76aae7e0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -812,6 +812,11 @@ struct amd_powerplay {
  
  #define AMDGPU_RESET_MAGIC_NUM 64

  #define AMDGPU_MAX_DF_PERFMONS 4
+
+struct amdgpu_reset_domain {
+   struct workqueue_struct *wq;
+};
+
  struct amdgpu_device {
struct device   *dev;
struct pci_dev  *pdev;
@@ -1096,6 +1101,8 @@ struct amdgpu_device {
  
  	struct amdgpu_reset_control *reset_cntl;

uint32_t
ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
+
+   struct amdgpu_reset_domain  reset_domain;


I'm a bit confused, shouldn't this be a pointer?

Regards,
Christian.


  };
  
  static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 90d22a376632..0f3e6c078f88 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2391,9 +2391,27 @@ static int amdgpu_device_ip_init(struct amdgpu_device 
*adev)
if (r)
goto init_failed;
  
-	if (adev->gmc.xgmi.num_physical_nodes > 1)

+   if (adev->gmc.xgmi.num_physical_nodes > 1) {
+   struct amdgpu_hive_info *hive;
+
amdgpu_xgmi_add_device(adev);
  
+		hive = amdgpu_get_xgmi_hive(adev);

+   if (!hive || !hive->reset_domain.wq) {
+   DRM_ERROR("Failed to obtain reset domain info for XGMI 
hive:%llx", hive->hive_id);
+   r = -EINVAL;
+   goto init_failed;
+   }
+
+   adev->reset_domain.wq = hive->reset_domain.wq;
+   } else {
+   adev->reset_domain.wq = 
alloc_ordered_workqueue("amdgpu-reset-dev", 0);
+   if (!adev->reset_domain.wq) {
+   r = -ENOMEM;
+   goto init_failed;
+   }
+   }
+
/* Don't init kfd if whole hive need to be reset during init */
if (!adev->gmc.xgmi.pending_reset)
amdgpu_amdkfd_device_init(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
index 567df2db23ac..a858e3457c5c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
@@ -392,6 +392,14 @@ struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct 
amdgpu_device *adev)
goto pro_end;
}
  
+	hive->reset_domain.wq = alloc_ordered_workqueue("amdgpu-reset-hive", 0);

+   if (!hive->reset_domain.wq) {
+   dev_err(adev->dev, "XGMI: failed allocating wq for reset 
domain!\n");
+   kfree(hive);
+   hive = NULL;
+   goto pro_end;
+   }
+
hive->hive_id = adev->gmc.xgmi.hive_id;
INIT_LIST_HEAD(>device_list);
INIT_LIST_HEAD(>node);
@@ -401,6 +409,7 @@ struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct 
amdgpu_device *adev)
task_barrier_init(>tb);
hive->pstate = AMDGPU_XGMI_PSTATE_UNKNOWN;
hive->hi_req_gpu = NULL;
+
/*
 * hive pstate on boot is high in vega20 so we have to go to low
 * pstate on after boot.
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h
index d2189bf7d428..6121aaa292cb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h
@@ -42,6 +42,8 @@ struct amdgpu_hive_info {
AMDGPU_XGMI_PSTATE_MAX_VEGA20,
AMDGPU_XGMI_PSTATE_UNKNOWN
} pstate;
+
+   struct amdgpu_reset_domain reset_domain;
  };
  
  struct amdgpu_pcs_ras_field {




Re: [PATCH] drm/amdgpu: add safeguards for accessing mmhub CG registers

2022-01-26 Thread Lazar, Lijo
[Public]

Hi Lang,

There are ASICs in which driver doesn't enable CG, and then these flags will be 
false. However, the CG will be enabled by another component like VBIOS. Driver 
still reports the CG status eventhough driver doesn't enable it. For those, 
this logic doesn't work.

BTW, could you check if it's some sort of PG which causes the issue?

Thanks,
Lijo


[PATCH 2/2] drm/amdgpu: add sysfs files for XGMI segment size and physical node id

2022-01-26 Thread Christian König
umr needs that to correctly calculate the VRAM base address
inside the MC address space.

Only compile tested!

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 34 
 1 file changed, 34 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
index 68509f619ba3..21a5d07a1abf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
@@ -252,6 +252,26 @@ static ssize_t amdgpu_xgmi_show_device_id(struct device 
*dev,
 
 }
 
+static ssize_t amdgpu_xgmi_show_node_segment_size(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+   struct drm_device *ddev = dev_get_drvdata(dev);
+   struct amdgpu_device *adev = drm_to_adev(ddev);
+
+   return sysfs_emit(buf, "%llu\n", adev->gmc.xgmi.node_segment_size);
+}
+
+static ssize_t amdgpu_xgmi_show_physical_node_id(struct device *dev,
+struct device_attribute *attr,
+char *buf)
+{
+   struct drm_device *ddev = dev_get_drvdata(dev);
+   struct amdgpu_device *adev = drm_to_adev(ddev);
+
+   return sysfs_emit(buf, "%u\n", adev->gmc.xgmi.physical_node_id);
+}
+
 #define AMDGPU_XGMI_SET_FICAA(o)   ((o) | 0x456801)
 static ssize_t amdgpu_xgmi_show_error(struct device *dev,
  struct device_attribute *attr,
@@ -287,6 +307,10 @@ static ssize_t amdgpu_xgmi_show_error(struct device *dev,
 
 
 static DEVICE_ATTR(xgmi_device_id, S_IRUGO, amdgpu_xgmi_show_device_id, NULL);
+static DEVICE_ATTR(xgmi_node_segment_size, S_IRUGO,
+  amdgpu_xgmi_show_node_segment_size, NULL);
+static DEVICE_ATTR(xgmi_physical_node_id, S_IRUGO,
+  amdgpu_xgmi_show_physical_node_id, NULL);
 static DEVICE_ATTR(xgmi_error, S_IRUGO, amdgpu_xgmi_show_error, NULL);
 
 static void amdgpu_xgmi_sysfs_rem_dev_info(struct amdgpu_device *adev,
@@ -295,6 +319,8 @@ static void amdgpu_xgmi_sysfs_rem_dev_info(struct 
amdgpu_device *adev,
char node[10];
 
device_remove_file(adev->dev, _attr_xgmi_device_id);
+   device_remove_file(adev->dev, _attr_xgmi_node_segment_size);
+   device_remove_file(adev->dev, _attr_xgmi_physical_node_id);
device_remove_file(adev->dev, _attr_xgmi_error);
 
if (hive->kobj.parent != (>dev->kobj))
@@ -318,6 +344,14 @@ static int amdgpu_xgmi_sysfs_add_dev_info(struct 
amdgpu_device *adev,
if (r)
goto error;
 
+   r = device_create_file(adev->dev, _attr_xgmi_node_segment_size);
+   if (r)
+   goto error;
+
+   r = device_create_file(adev->dev, _attr_xgmi_physical_node_id);
+   if (r)
+   goto error;
+
/* Create sysfs link to hive info folder on the first device */
if (hive->kobj.parent != (>dev->kobj)) {
r = sysfs_create_link(>dev->kobj, >kobj,
-- 
2.25.1



[PATCH 1/2] drm/amdgpu: cleanup amdgpu_xgmi_sysfs_add_dev_info

2022-01-26 Thread Christian König
Don't initialize variables if it isn't absolutely necessary.

Use amdgpu_xgmi_sysfs_rem_dev_info to cleanup when something goes wrong.

Drop the explicit warnings since the sysfs core warns about things like
duplicate files itself.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 85 +---
 1 file changed, 33 insertions(+), 52 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
index 5929d6f528c9..68509f619ba3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
@@ -289,61 +289,10 @@ static ssize_t amdgpu_xgmi_show_error(struct device *dev,
 static DEVICE_ATTR(xgmi_device_id, S_IRUGO, amdgpu_xgmi_show_device_id, NULL);
 static DEVICE_ATTR(xgmi_error, S_IRUGO, amdgpu_xgmi_show_error, NULL);
 
-static int amdgpu_xgmi_sysfs_add_dev_info(struct amdgpu_device *adev,
-struct amdgpu_hive_info *hive)
-{
-   int ret = 0;
-   char node[10] = { 0 };
-
-   /* Create xgmi device id file */
-   ret = device_create_file(adev->dev, _attr_xgmi_device_id);
-   if (ret) {
-   dev_err(adev->dev, "XGMI: Failed to create device file 
xgmi_device_id\n");
-   return ret;
-   }
-
-   /* Create xgmi error file */
-   ret = device_create_file(adev->dev, _attr_xgmi_error);
-   if (ret)
-   pr_err("failed to create xgmi_error\n");
-
-
-   /* Create sysfs link to hive info folder on the first device */
-   if (hive->kobj.parent != (>dev->kobj)) {
-   ret = sysfs_create_link(>dev->kobj, >kobj,
-   "xgmi_hive_info");
-   if (ret) {
-   dev_err(adev->dev, "XGMI: Failed to create link to hive 
info");
-   goto remove_file;
-   }
-   }
-
-   sprintf(node, "node%d", atomic_read(>number_devices));
-   /* Create sysfs link form the hive folder to yourself */
-   ret = sysfs_create_link(>kobj, >dev->kobj, node);
-   if (ret) {
-   dev_err(adev->dev, "XGMI: Failed to create link from hive 
info");
-   goto remove_link;
-   }
-
-   goto success;
-
-
-remove_link:
-   sysfs_remove_link(>dev->kobj, adev_to_drm(adev)->unique);
-
-remove_file:
-   device_remove_file(adev->dev, _attr_xgmi_device_id);
-
-success:
-   return ret;
-}
-
 static void amdgpu_xgmi_sysfs_rem_dev_info(struct amdgpu_device *adev,
  struct amdgpu_hive_info *hive)
 {
char node[10];
-   memset(node, 0, sizeof(node));
 
device_remove_file(adev->dev, _attr_xgmi_device_id);
device_remove_file(adev->dev, _attr_xgmi_error);
@@ -353,10 +302,42 @@ static void amdgpu_xgmi_sysfs_rem_dev_info(struct 
amdgpu_device *adev,
 
sprintf(node, "node%d", atomic_read(>number_devices));
sysfs_remove_link(>kobj, node);
-
 }
 
+static int amdgpu_xgmi_sysfs_add_dev_info(struct amdgpu_device *adev,
+struct amdgpu_hive_info *hive)
+{
+   char node[10];
+   int r;
+
+   r = device_create_file(adev->dev, _attr_xgmi_device_id);
+   if (r)
+   return r;
+
+   r = device_create_file(adev->dev, _attr_xgmi_error);
+   if (r)
+   goto error;
 
+   /* Create sysfs link to hive info folder on the first device */
+   if (hive->kobj.parent != (>dev->kobj)) {
+   r = sysfs_create_link(>dev->kobj, >kobj,
+ "xgmi_hive_info");
+   if (r)
+   goto error;
+   }
+
+   /* Create sysfs link form the hive folder to yourself */
+   sprintf(node, "node%d", atomic_read(>number_devices));
+   r = sysfs_create_link(>kobj, >dev->kobj, node);
+   if (r)
+   goto error;
+
+   return 0;
+
+error:
+   amdgpu_xgmi_sysfs_rem_dev_info(adev, hive);
+   return r;
+}
 
 struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct amdgpu_device *adev)
 {
-- 
2.25.1



Re: [PATCH] drm/amdgpu: add safeguards for accessing mmhub CG registers

2022-01-26 Thread Christian König

Am 26.01.22 um 12:02 schrieb Lang Yu:

On 01/26/ , Christian König wrote:

Am 26.01.22 um 08:53 schrieb Lang Yu:

We observed a gpu hang when querying mmhub CG status(i.e.,
cat amdgpu_pm_info) on cyan skillfish. Acctually, cyan
skillfish doesn't support any CG features.

Only allow asics which support CG features accessing related
registers. Will add similar safeguards for other IPs in the
furture.

I think you should probably add a macro or function for this check, apart
from that looks good to me.

Thanks for you advice. Is it fine to use such a macro?

#define amdgpu_device_cg_flag_isset(flag) ((adev->cg_flags) & (flag))


No, first of all that can also be a function and doesn't need to be a macro.

Then we should probably encapsulate more functionality or otherwise it 
is rather usless.


Think more about a function like amdgpu_gmc_cg_enabled() instead.

Regards,
Christian.



Regards,
Lang


Christian.


Signed-off-by: Lang Yu 
---
   drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 3 +++
   drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c | 3 +++
   drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 3 +++
   drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c | 3 +++
   drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c | 3 +++
   5 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index 4c9f0c0f3116..1869e2019461 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -550,6 +550,9 @@ static void mmhub_v1_0_get_clockgating(struct amdgpu_device 
*adev, u32 *flags)
   {
int data, data1;
+   if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS)))
+   return;
+
if (amdgpu_sriov_vf(adev))
*flags = 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
index 3b901f941627..f7b9843b36e6 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
@@ -546,6 +546,9 @@ static void mmhub_v1_7_get_clockgating(struct amdgpu_device 
*adev, u32 *flags)
   {
int data, data1;
+   if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS)))
+   return;
+
if (amdgpu_sriov_vf(adev))
*flags = 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
index 3718ff610ab2..3f5f326379b7 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
@@ -686,6 +686,9 @@ static void mmhub_v2_0_get_clockgating(struct amdgpu_device 
*adev, u32 *flags)
   {
int data, data1;
+   if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS)))
+   return;
+
if (amdgpu_sriov_vf(adev))
*flags = 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c
index 9e16da28505a..b23dd9ddfb5c 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c
@@ -580,6 +580,9 @@ static void mmhub_v2_3_get_clockgating(struct amdgpu_device 
*adev, u32 *flags)
   {
int data, data1, data2, data3;
+   if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS)))
+   return;
+
if (amdgpu_sriov_vf(adev))
*flags = 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
index 619106f7d23d..a2d5c8424e2b 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
@@ -651,6 +651,9 @@ static void mmhub_v9_4_get_clockgating(struct amdgpu_device 
*adev, u32 *flags)
   {
int data, data1;
+   if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS)))
+   return;
+
if (amdgpu_sriov_vf(adev))
*flags = 0;




[PATCH] drm/amdgpu: add umc_convert_error_address to simplify code

2022-01-26 Thread Tao Zhou
Make code reusable and more simple.

Signed-off-by: Tao Zhou 
---
 drivers/gpu/drm/amd/amdgpu/umc_v6_7.c | 94 +--
 drivers/gpu/drm/amd/amdgpu/umc_v8_7.c | 82 +--
 2 files changed, 61 insertions(+), 115 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c 
b/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
index 47452b61b615..4abcdda42ac6 100644
--- a/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
@@ -114,21 +114,13 @@ static void 
umc_v6_7_ecc_info_query_ras_error_count(struct amdgpu_device *adev,
}
 }
 
-static void umc_v6_7_ecc_info_query_error_address(struct amdgpu_device *adev,
-struct ras_err_data *err_data,
-uint32_t ch_inst,
-uint32_t umc_inst)
+static void umc_v6_7_convert_error_address(struct amdgpu_device *adev,
+   struct ras_err_data *err_data, uint32_t 
ch_inst,
+   uint32_t umc_inst, uint64_t err_addr,
+   uint64_t mc_umc_status)
 {
-   uint64_t mc_umc_status, err_addr, soc_pa, retired_page, column;
uint32_t channel_index;
-   uint32_t eccinfo_table_idx;
-   struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);
-
-   eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst;
-   channel_index =
-   adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num 
+ ch_inst];
-
-   mc_umc_status = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_status;
+   uint64_t soc_pa, retired_page, column;
 
if (mc_umc_status == 0)
return;
@@ -136,12 +128,13 @@ static void umc_v6_7_ecc_info_query_error_address(struct 
amdgpu_device *adev,
if (!err_data->err_addr)
return;
 
+   channel_index =
+   adev->umc.channel_idx_tbl[umc_inst * 
adev->umc.channel_inst_num + ch_inst];
+
/* calculate error address if ue/ce error is detected */
if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 
&&
(REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 
1 ||
REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 
1)) {
-
-   err_addr = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_addr;
err_addr = REG_GET_FIELD(err_addr, MCA_UMC_UMC0_MCUMC_ADDRT0, 
ErrorAddr);
 
/* translate umc channel address to soc pa, 3 parts are 
included */
@@ -173,6 +166,23 @@ static void umc_v6_7_ecc_info_query_error_address(struct 
amdgpu_device *adev,
}
 }
 
+static void umc_v6_7_ecc_info_query_error_address(struct amdgpu_device *adev,
+struct ras_err_data *err_data,
+uint32_t ch_inst,
+uint32_t umc_inst)
+{
+   uint64_t mc_umc_status, err_addr;
+   uint32_t eccinfo_table_idx;
+   struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);
+
+   eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst;
+   mc_umc_status = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_status;
+   err_addr = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_addr;
+
+   umc_v6_7_convert_error_address(adev, err_data, ch_inst, umc_inst,
+   err_addr, mc_umc_status);
+}
+
 static void umc_v6_7_ecc_info_query_ras_error_address(struct amdgpu_device 
*adev,
 void *ras_error_status)
 {
@@ -348,9 +358,7 @@ static void umc_v6_7_query_error_address(struct 
amdgpu_device *adev,
 uint32_t umc_inst)
 {
uint32_t mc_umc_status_addr;
-   uint32_t channel_index;
-   uint64_t mc_umc_status, mc_umc_addrt0;
-   uint64_t err_addr, soc_pa, retired_page, column;
+   uint64_t mc_umc_status, mc_umc_addrt0, err_addr;
 
mc_umc_status_addr =
SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0);
@@ -358,54 +366,10 @@ static void umc_v6_7_query_error_address(struct 
amdgpu_device *adev,
SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_ADDRT0);
 
mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4);
+   err_addr = RREG64_PCIE((mc_umc_addrt0 + umc_reg_offset) * 4);
 
-   if (mc_umc_status == 0)
-   return;
-
-   if (!err_data->err_addr) {
-   /* clear umc status */
-   WREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4, 0x0ULL);
-   return;
-   }
-
-   channel_index =
-   adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num 
+ ch_inst];
-
-   /* calculate error address if ue/ce error is detected */
-   if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 
&&
-   

Re: [Intel-gfx] [PATCH v2 09/11] drm: Convert open-coded yes/no strings to yesno()

2022-01-26 Thread Lucas De Marchi

On Wed, Jan 26, 2022 at 12:12:50PM +0200, Andy Shevchenko wrote:

On Wed, Jan 26, 2022 at 11:39 AM Lucas De Marchi
 wrote:


linux/string_helpers.h provides a helper to return "yes"/"no" strings.
Replace the open coded versions with str_yes_no(). The places were


oops, I replaced yesno() here but forgot to do so in the title


identified with the following semantic patch:

@@
expression b;
@@

- b ? "yes" : "no"
+ str_yes_no(b)

Then the includes were added, so we include-what-we-use, and parenthesis
adjusted in drivers/gpu/drm/v3d/v3d_debugfs.c. After the conversion we
still see the same binary sizes:

   textdata bss dec hex filename
  511493295 212   54656d580 virtio/virtio-gpu.ko.old
  511493295 212   54656d580 virtio/virtio-gpu.ko
1441491   60340 800 1502631  16eda7 radeon/radeon.ko.old
1441491   60340 800 1502631  16eda7 radeon/radeon.ko
6125369  328538   34000 6487907  62ff63 amd/amdgpu/amdgpu.ko.old
6125369  328538   34000 6487907  62ff63 amd/amdgpu/amdgpu.ko
 411986   104906176  428652   68a6c drm.ko.old
 411986   104906176  428652   68a6c drm.ko
  981291636 264  100029   186bd dp/drm_dp_helper.ko.old
  981291636 264  100029   186bd dp/drm_dp_helper.ko
1973432  1096402352 2085424  1fd230 nouveau/nouveau.ko.old
1973432  1096402352 2085424  1fd230 nouveau/nouveau.ko


This probably won't change for modules, but if you compile in the
linker may try to optimize it. Would be nice to see the old-new for
`make allyesconfig` or equivalent.


just like it would already do, no? I can try and see what happens, but
my feeling is that we won't have any change.



...


seq_printf(m, "\tDP branch device present: %s\n",
-  branch_device ? "yes" : "no");
+  str_yes_no(branch_device));


Can it be now on one line? Same Q for all similar cases in the entire series.


I saw that question in the previous version. I think those are very
subjective is they all go a little bit over 80 chars. Some maintainers
may prefer one way or the other.

Here we are reducing just 3 chars so I assumed that is the preferred
style here.  Also keeping it as is helps with the mass conversion since
it's easily repeatable if another iteration is needed.

thanks
Lucas De Marchi


Re: [PATCH] drm/amdgpu: add safeguards for accessing mmhub CG registers

2022-01-26 Thread Christian König

Am 26.01.22 um 08:53 schrieb Lang Yu:

We observed a gpu hang when querying mmhub CG status(i.e.,
cat amdgpu_pm_info) on cyan skillfish. Acctually, cyan
skillfish doesn't support any CG features.

Only allow asics which support CG features accessing related
registers. Will add similar safeguards for other IPs in the
furture.


I think you should probably add a macro or function for this check, 
apart from that looks good to me.


Christian.



Signed-off-by: Lang Yu 
---
  drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 3 +++
  drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c | 3 +++
  drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 3 +++
  drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c | 3 +++
  drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c | 3 +++
  5 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index 4c9f0c0f3116..1869e2019461 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -550,6 +550,9 @@ static void mmhub_v1_0_get_clockgating(struct amdgpu_device 
*adev, u32 *flags)
  {
int data, data1;
  
+	if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS)))

+   return;
+
if (amdgpu_sriov_vf(adev))
*flags = 0;
  
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

index 3b901f941627..f7b9843b36e6 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
@@ -546,6 +546,9 @@ static void mmhub_v1_7_get_clockgating(struct amdgpu_device 
*adev, u32 *flags)
  {
int data, data1;
  
+	if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS)))

+   return;
+
if (amdgpu_sriov_vf(adev))
*flags = 0;
  
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

index 3718ff610ab2..3f5f326379b7 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
@@ -686,6 +686,9 @@ static void mmhub_v2_0_get_clockgating(struct amdgpu_device 
*adev, u32 *flags)
  {
int data, data1;
  
+	if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS)))

+   return;
+
if (amdgpu_sriov_vf(adev))
*flags = 0;
  
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

index 9e16da28505a..b23dd9ddfb5c 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c
@@ -580,6 +580,9 @@ static void mmhub_v2_3_get_clockgating(struct amdgpu_device 
*adev, u32 *flags)
  {
int data, data1, data2, data3;
  
+	if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS)))

+   return;
+
if (amdgpu_sriov_vf(adev))
*flags = 0;
  
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c

index 619106f7d23d..a2d5c8424e2b 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
@@ -651,6 +651,9 @@ static void mmhub_v9_4_get_clockgating(struct amdgpu_device 
*adev, u32 *flags)
  {
int data, data1;
  
+	if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS)))

+   return;
+
if (amdgpu_sriov_vf(adev))
*flags = 0;
  




[PATCH v2 10/11] tomoyo: Use str_yes_no()

2022-01-26 Thread Lucas De Marchi
Remove the local yesno() implementation and adopt the str_yes_no() from
linux/string_helpers.h.

Signed-off-by: Lucas De Marchi 
Reviewed-by: Sakari Ailus 
---
 security/tomoyo/audit.c  |  2 +-
 security/tomoyo/common.c | 19 +--
 security/tomoyo/common.h |  1 -
 3 files changed, 6 insertions(+), 16 deletions(-)

diff --git a/security/tomoyo/audit.c b/security/tomoyo/audit.c
index d79bf07e16be..023bedd9dfa3 100644
--- a/security/tomoyo/audit.c
+++ b/security/tomoyo/audit.c
@@ -166,7 +166,7 @@ static char *tomoyo_print_header(struct tomoyo_request_info 
*r)
   "#%04u/%02u/%02u %02u:%02u:%02u# profile=%u mode=%s 
granted=%s (global-pid=%u) task={ pid=%u ppid=%u uid=%u gid=%u euid=%u egid=%u 
suid=%u sgid=%u fsuid=%u fsgid=%u }",
   stamp.year, stamp.month, stamp.day, stamp.hour,
   stamp.min, stamp.sec, r->profile, tomoyo_mode[r->mode],
-  tomoyo_yesno(r->granted), gpid, tomoyo_sys_getpid(),
+  str_yes_no(r->granted), gpid, tomoyo_sys_getpid(),
   tomoyo_sys_getppid(),
   from_kuid(_user_ns, current_uid()),
   from_kgid(_user_ns, current_gid()),
diff --git a/security/tomoyo/common.c b/security/tomoyo/common.c
index 5c64927bf2b3..ff17abc96e5c 100644
--- a/security/tomoyo/common.c
+++ b/security/tomoyo/common.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "common.h"
 
 /* String table for operation mode. */
@@ -174,16 +175,6 @@ static bool tomoyo_manage_by_non_root;
 
 /* Utility functions. */
 
-/**
- * tomoyo_yesno - Return "yes" or "no".
- *
- * @value: Bool value.
- */
-const char *tomoyo_yesno(const unsigned int value)
-{
-   return value ? "yes" : "no";
-}
-
 /**
  * tomoyo_addprintf - strncat()-like-snprintf().
  *
@@ -730,8 +721,8 @@ static void tomoyo_print_config(struct tomoyo_io_buffer 
*head, const u8 config)
 {
tomoyo_io_printf(head, "={ mode=%s grant_log=%s reject_log=%s }\n",
 tomoyo_mode[config & 3],
-tomoyo_yesno(config & TOMOYO_CONFIG_WANT_GRANT_LOG),
-tomoyo_yesno(config & TOMOYO_CONFIG_WANT_REJECT_LOG));
+str_yes_no(config & TOMOYO_CONFIG_WANT_GRANT_LOG),
+str_yes_no(config & TOMOYO_CONFIG_WANT_REJECT_LOG));
 }
 
 /**
@@ -1354,8 +1345,8 @@ static bool tomoyo_print_condition(struct 
tomoyo_io_buffer *head,
case 3:
if (cond->grant_log != TOMOYO_GRANTLOG_AUTO)
tomoyo_io_printf(head, " grant_log=%s",
-tomoyo_yesno(cond->grant_log ==
- TOMOYO_GRANTLOG_YES));
+str_yes_no(cond->grant_log ==
+   TOMOYO_GRANTLOG_YES));
tomoyo_set_lf(head);
return true;
}
diff --git a/security/tomoyo/common.h b/security/tomoyo/common.h
index 85246b9df7ca..ca285f362705 100644
--- a/security/tomoyo/common.h
+++ b/security/tomoyo/common.h
@@ -959,7 +959,6 @@ char *tomoyo_read_token(struct tomoyo_acl_param *param);
 char *tomoyo_realpath_from_path(const struct path *path);
 char *tomoyo_realpath_nofollow(const char *pathname);
 const char *tomoyo_get_exe(void);
-const char *tomoyo_yesno(const unsigned int value);
 const struct tomoyo_path_info *tomoyo_compare_name_union
 (const struct tomoyo_path_info *name, const struct tomoyo_name_union *ptr);
 const struct tomoyo_path_info *tomoyo_get_domainname
-- 
2.34.1



[PATCH v2 11/11] cxgb4: Use str_yes_no()

2022-01-26 Thread Lucas De Marchi
Remove the local yesno() implementation and adopt the str_yes_no() from
linux/string_helpers.h.

Signed-off-by: Lucas De Marchi 
---
 .../ethernet/chelsio/cxgb4/cxgb4_debugfs.c| 249 ++
 1 file changed, 137 insertions(+), 112 deletions(-)

diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c 
b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c
index 7d49fd4edc9e..f0d9842962ab 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c
@@ -2015,17 +2015,6 @@ static const struct file_operations rss_debugfs_fops = {
 /* RSS Configuration.
  */
 
-/* Small utility function to return the strings "yes" or "no" if the supplied
- * argument is non-zero.
- */
-static const char *yesno(int x)
-{
-   static const char *yes = "yes";
-   static const char *no = "no";
-
-   return x ? yes : no;
-}
-
 static int rss_config_show(struct seq_file *seq, void *v)
 {
struct adapter *adapter = seq->private;
@@ -2039,51 +2028,64 @@ static int rss_config_show(struct seq_file *seq, void 
*v)
 
rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_A);
seq_printf(seq, "TP_RSS_CONFIG: %#x\n", rssconf);
-   seq_printf(seq, "  Tnl4TupEnIpv6: %3s\n", yesno(rssconf &
-   TNL4TUPENIPV6_F));
-   seq_printf(seq, "  Tnl2TupEnIpv6: %3s\n", yesno(rssconf &
-   TNL2TUPENIPV6_F));
-   seq_printf(seq, "  Tnl4TupEnIpv4: %3s\n", yesno(rssconf &
-   TNL4TUPENIPV4_F));
-   seq_printf(seq, "  Tnl2TupEnIpv4: %3s\n", yesno(rssconf &
-   TNL2TUPENIPV4_F));
-   seq_printf(seq, "  TnlTcpSel: %3s\n", yesno(rssconf & TNLTCPSEL_F));
-   seq_printf(seq, "  TnlIp6Sel: %3s\n", yesno(rssconf & TNLIP6SEL_F));
-   seq_printf(seq, "  TnlVrtSel: %3s\n", yesno(rssconf & TNLVRTSEL_F));
-   seq_printf(seq, "  TnlMapEn:  %3s\n", yesno(rssconf & TNLMAPEN_F));
-   seq_printf(seq, "  OfdHashSave:   %3s\n", yesno(rssconf &
-   OFDHASHSAVE_F));
-   seq_printf(seq, "  OfdVrtSel: %3s\n", yesno(rssconf & OFDVRTSEL_F));
-   seq_printf(seq, "  OfdMapEn:  %3s\n", yesno(rssconf & OFDMAPEN_F));
-   seq_printf(seq, "  OfdLkpEn:  %3s\n", yesno(rssconf & OFDLKPEN_F));
-   seq_printf(seq, "  Syn4TupEnIpv6: %3s\n", yesno(rssconf &
-   SYN4TUPENIPV6_F));
-   seq_printf(seq, "  Syn2TupEnIpv6: %3s\n", yesno(rssconf &
-   SYN2TUPENIPV6_F));
-   seq_printf(seq, "  Syn4TupEnIpv4: %3s\n", yesno(rssconf &
-   SYN4TUPENIPV4_F));
-   seq_printf(seq, "  Syn2TupEnIpv4: %3s\n", yesno(rssconf &
-   SYN2TUPENIPV4_F));
-   seq_printf(seq, "  Syn4TupEnIpv6: %3s\n", yesno(rssconf &
-   SYN4TUPENIPV6_F));
-   seq_printf(seq, "  SynIp6Sel: %3s\n", yesno(rssconf & SYNIP6SEL_F));
-   seq_printf(seq, "  SynVrt6Sel:%3s\n", yesno(rssconf & SYNVRTSEL_F));
-   seq_printf(seq, "  SynMapEn:  %3s\n", yesno(rssconf & SYNMAPEN_F));
-   seq_printf(seq, "  SynLkpEn:  %3s\n", yesno(rssconf & SYNLKPEN_F));
-   seq_printf(seq, "  ChnEn: %3s\n", yesno(rssconf &
-   CHANNELENABLE_F));
-   seq_printf(seq, "  PrtEn: %3s\n", yesno(rssconf &
-   PORTENABLE_F));
-   seq_printf(seq, "  TnlAllLkp: %3s\n", yesno(rssconf &
-   TNLALLLOOKUP_F));
-   seq_printf(seq, "  VrtEn: %3s\n", yesno(rssconf &
-   VIRTENABLE_F));
-   seq_printf(seq, "  CngEn: %3s\n", yesno(rssconf &
-   CONGESTIONENABLE_F));
-   seq_printf(seq, "  HashToeplitz:  %3s\n", yesno(rssconf &
-   HASHTOEPLITZ_F));
-   seq_printf(seq, "  Udp4En:%3s\n", yesno(rssconf & UDPENABLE_F));
-   seq_printf(seq, "  Disable:   %3s\n", yesno(rssconf & DISABLE_F));
+   seq_printf(seq, "  Tnl4TupEnIpv6: %3s\n",
+  str_yes_no(rssconf & TNL4TUPENIPV6_F));
+   seq_printf(seq, "  Tnl2TupEnIpv6: %3s\n",
+  str_yes_no(rssconf & TNL2TUPENIPV6_F));
+   seq_printf(seq, "  Tnl4TupEnIpv4: %3s\n",
+  str_yes_no(rssconf & TNL4TUPENIPV4_F));
+   seq_printf(seq, "  Tnl2TupEnIpv4: %3s\n",
+  str_yes_no(rssconf & TNL2TUPENIPV4_F));
+   seq_printf(seq, "  TnlTcpSel: %3s\n",
+  

[PATCH v2 07/11] drm/amd/display: Use str_yes_no()

2022-01-26 Thread Lucas De Marchi
Remove the local yesno() implementation and adopt the str_yes_no() from
linux/string_helpers.h.

Signed-off-by: Lucas De Marchi 
---
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c  | 14 +-
 1 file changed, 5 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
index 26719efa5396..5ff1076b9130 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include 
 #include 
 
 #include "dc.h"
@@ -49,11 +50,6 @@ struct dmub_debugfs_trace_entry {
uint32_t param1;
 };
 
-static inline const char *yesno(bool v)
-{
-   return v ? "yes" : "no";
-}
-
 /* parse_write_buffer_into_params - Helper function to parse debugfs write 
buffer into an array
  *
  * Function takes in attributes passed to debugfs write entry
@@ -853,12 +849,12 @@ static int psr_capability_show(struct seq_file *m, void 
*data)
if (!(link->connector_signal & SIGNAL_TYPE_EDP))
return -ENODEV;
 
-   seq_printf(m, "Sink support: %s", 
yesno(link->dpcd_caps.psr_caps.psr_version != 0));
+   seq_printf(m, "Sink support: %s", 
str_yes_no(link->dpcd_caps.psr_caps.psr_version != 0));
if (link->dpcd_caps.psr_caps.psr_version)
seq_printf(m, " [0x%02x]", 
link->dpcd_caps.psr_caps.psr_version);
seq_puts(m, "\n");
 
-   seq_printf(m, "Driver support: %s", 
yesno(link->psr_settings.psr_feature_enabled));
+   seq_printf(m, "Driver support: %s", 
str_yes_no(link->psr_settings.psr_feature_enabled));
if (link->psr_settings.psr_version)
seq_printf(m, " [0x%02x]", link->psr_settings.psr_version);
seq_puts(m, "\n");
@@ -1207,8 +1203,8 @@ static int dp_dsc_fec_support_show(struct seq_file *m, 
void *data)
drm_modeset_drop_locks();
drm_modeset_acquire_fini();
 
-   seq_printf(m, "FEC_Sink_Support: %s\n", yesno(is_fec_supported));
-   seq_printf(m, "DSC_Sink_Support: %s\n", yesno(is_dsc_supported));
+   seq_printf(m, "FEC_Sink_Support: %s\n", str_yes_no(is_fec_supported));
+   seq_printf(m, "DSC_Sink_Support: %s\n", str_yes_no(is_dsc_supported));
 
return ret;
 }
-- 
2.34.1



[PATCH v2 05/11] drm/i915: Use str_enabled_disabled()

2022-01-26 Thread Lucas De Marchi
Remove the local enableddisabled() implementation and adopt the
str_enabled_disabled() from linux/string_helpers.h.

Signed-off-by: Lucas De Marchi 
Acked-by: Daniel Vetter 
Acked-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_backlight.c   |  3 ++-
 drivers/gpu/drm/i915/display/intel_display.c | 16 
 .../gpu/drm/i915/display/intel_display_debugfs.c |  8 
 drivers/gpu/drm/i915/display/intel_dsi_vbt.c |  7 ---
 drivers/gpu/drm/i915/gt/intel_breadcrumbs.c  |  3 ++-
 drivers/gpu/drm/i915/gt/intel_engine_cs.c|  2 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c|  2 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c   |  2 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c|  2 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc.c|  4 ++--
 drivers/gpu/drm/i915/i915_debugfs.c  |  2 +-
 drivers/gpu/drm/i915/i915_driver.c   |  4 +++-
 drivers/gpu/drm/i915/i915_utils.h|  6 +-
 drivers/gpu/drm/i915/intel_pm.c  |  4 ++--
 14 files changed, 33 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c 
b/drivers/gpu/drm/i915/display/intel_backlight.c
index 98f7ea44042f..c8e1fc53a881 100644
--- a/drivers/gpu/drm/i915/display/intel_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_backlight.c
@@ -5,6 +5,7 @@
 
 #include 
 #include 
+#include 
 
 #include "intel_backlight.h"
 #include "intel_connector.h"
@@ -1633,7 +1634,7 @@ int intel_backlight_setup(struct intel_connector 
*connector, enum pipe pipe)
drm_dbg_kms(_priv->drm,
"Connector %s backlight initialized, %s, brightness 
%u/%u\n",
connector->base.name,
-   enableddisabled(panel->backlight.enabled),
+   str_enabled_disabled(panel->backlight.enabled),
panel->backlight.level, panel->backlight.max);
 
return 0;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index bd453861088e..8920bdb53b7b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3110,8 +3110,8 @@ static void intel_panel_sanitize_ssc(struct 
drm_i915_private *dev_priv)
if (dev_priv->vbt.lvds_use_ssc != bios_lvds_use_ssc) {
drm_dbg_kms(_priv->drm,
"SSC %s by BIOS, overriding VBT which says 
%s\n",
-   enableddisabled(bios_lvds_use_ssc),
-   
enableddisabled(dev_priv->vbt.lvds_use_ssc));
+   str_enabled_disabled(bios_lvds_use_ssc),
+   
str_enabled_disabled(dev_priv->vbt.lvds_use_ssc));
dev_priv->vbt.lvds_use_ssc = bios_lvds_use_ssc;
}
}
@@ -5648,7 +5648,7 @@ static void intel_dump_pipe_config(const struct 
intel_crtc_state *pipe_config,
pipe_config->bigjoiner ? "master" : "no");
 
drm_dbg_kms(_priv->drm, "splitter: %s, link count %d, overlap %d\n",
-   enableddisabled(pipe_config->splitter.enable),
+   str_enabled_disabled(pipe_config->splitter.enable),
pipe_config->splitter.link_count,
pipe_config->splitter.pixel_overlap);
 
@@ -5736,7 +5736,7 @@ static void intel_dump_pipe_config(const struct 
intel_crtc_state *pipe_config,
drm_dbg_kms(_priv->drm,
"pch pfit: " DRM_RECT_FMT ", %s, force thru: %s\n",
DRM_RECT_ARG(_config->pch_pfit.dst),
-   enableddisabled(pipe_config->pch_pfit.enabled),
+   str_enabled_disabled(pipe_config->pch_pfit.enabled),
str_yes_no(pipe_config->pch_pfit.force_thru));
 
drm_dbg_kms(_priv->drm, "ips: %i, double wide: %i\n",
@@ -10300,7 +10300,7 @@ static void readout_plane_state(struct drm_i915_private 
*dev_priv)
drm_dbg_kms(_priv->drm,
"[PLANE:%d:%s] hw state readout: %s, pipe %c\n",
plane->base.base.id, plane->base.name,
-   enableddisabled(visible), pipe_name(pipe));
+   str_enabled_disabled(visible), pipe_name(pipe));
}
 
for_each_intel_crtc(_priv->drm, crtc) {
@@ -10346,7 +10346,7 @@ static void intel_modeset_readout_hw_state(struct 
drm_device *dev)
drm_dbg_kms(_priv->drm,
"[CRTC:%d:%s] hw state readout: %s\n",
crtc->base.base.id, crtc->base.name,
-   enableddisabled(crtc_state->hw.active));
+   str_enabled_disabled(crtc_state->hw.active));
}
 
cdclk_state->active_pipes = dbuf_state->active_pipes = active_pipes;
@@ -10384,7 +10384,7 

[PATCH v2 06/11] drm/i915: Use str_on_off()

2022-01-26 Thread Lucas De Marchi
Remove the local onoff() implementation and adopt the
str_on_off() from linux/string_helpers.h.

Signed-off-by: Lucas De Marchi 
Acked-by: Daniel Vetter 
Acked-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/g4x_dp.c  | 6 --
 drivers/gpu/drm/i915/display/intel_display.c   | 7 ---
 drivers/gpu/drm/i915/display/intel_display_trace.h | 3 ++-
 drivers/gpu/drm/i915/display/intel_dpll.c  | 3 ++-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c  | 7 +--
 drivers/gpu/drm/i915/display/intel_fdi.c   | 8 +---
 drivers/gpu/drm/i915/display/vlv_dsi_pll.c | 3 ++-
 drivers/gpu/drm/i915/gt/intel_rc6.c| 5 +++--
 drivers/gpu/drm/i915/i915_utils.h  | 5 -
 drivers/gpu/drm/i915/vlv_suspend.c | 3 ++-
 10 files changed, 29 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c 
b/drivers/gpu/drm/i915/display/g4x_dp.c
index f37677df6ebf..3e729bff1232 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -5,6 +5,8 @@
  * DisplayPort support for G4x,ILK,SNB,IVB,VLV,CHV (HSW+ handled by the DDI 
code).
  */
 
+#include 
+
 #include "g4x_dp.h"
 #include "intel_audio.h"
 #include "intel_backlight.h"
@@ -191,7 +193,7 @@ static void assert_dp_port(struct intel_dp *intel_dp, bool 
state)
I915_STATE_WARN(cur_state != state,
"[ENCODER:%d:%s] state assertion failure (expected %s, 
current %s)\n",
dig_port->base.base.base.id, dig_port->base.base.name,
-   onoff(state), onoff(cur_state));
+   str_on_off(state), str_on_off(cur_state));
 }
 #define assert_dp_port_disabled(d) assert_dp_port((d), false)
 
@@ -201,7 +203,7 @@ static void assert_edp_pll(struct drm_i915_private 
*dev_priv, bool state)
 
I915_STATE_WARN(cur_state != state,
"eDP PLL state assertion failure (expected %s, current 
%s)\n",
-   onoff(state), onoff(cur_state));
+   str_on_off(state), str_on_off(cur_state));
 }
 #define assert_edp_pll_enabled(d) assert_edp_pll((d), true)
 #define assert_edp_pll_disabled(d) assert_edp_pll((d), false)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 8920bdb53b7b..49f994f36fce 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -377,7 +377,7 @@ static void wait_for_pipe_scanline_moving(struct intel_crtc 
*crtc, bool state)
if (wait_for(pipe_scanline_is_moving(dev_priv, pipe) == state, 100))
drm_err(_priv->drm,
"pipe %c scanline %s wait timed out\n",
-   pipe_name(pipe), onoff(state));
+   pipe_name(pipe), str_on_off(state));
 }
 
 static void intel_wait_for_pipe_scanline_stopped(struct intel_crtc *crtc)
@@ -435,7 +435,7 @@ void assert_transcoder(struct drm_i915_private *dev_priv,
I915_STATE_WARN(cur_state != state,
"transcoder %s assertion failure (expected %s, current 
%s)\n",
transcoder_name(cpu_transcoder),
-   onoff(state), onoff(cur_state));
+   str_on_off(state), str_on_off(cur_state));
 }
 
 static void assert_plane(struct intel_plane *plane, bool state)
@@ -447,7 +447,8 @@ static void assert_plane(struct intel_plane *plane, bool 
state)
 
I915_STATE_WARN(cur_state != state,
"%s assertion failure (expected %s, current %s)\n",
-   plane->base.name, onoff(state), onoff(cur_state));
+   plane->base.name, str_on_off(state),
+   str_on_off(cur_state));
 }
 
 #define assert_plane_enabled(p) assert_plane(p, true)
diff --git a/drivers/gpu/drm/i915/display/intel_display_trace.h 
b/drivers/gpu/drm/i915/display/intel_display_trace.h
index dcdd242fffd9..2dd5a4b7f5d8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_trace.h
+++ b/drivers/gpu/drm/i915/display/intel_display_trace.h
@@ -9,6 +9,7 @@
 #if !defined(__INTEL_DISPLAY_TRACE_H__) || defined(TRACE_HEADER_MULTI_READ)
 #define __INTEL_DISPLAY_TRACE_H__
 
+#include 
 #include 
 #include 
 
@@ -161,7 +162,7 @@ TRACE_EVENT(intel_memory_cxsr,
   ),
 
TP_printk("%s->%s, pipe A: frame=%u, scanline=%u, pipe B: frame=%u, 
scanline=%u, pipe C: frame=%u, scanline=%u",
- onoff(__entry->old), onoff(__entry->new),
+ str_on_off(__entry->old), str_on_off(__entry->new),
  __entry->frame[PIPE_A], __entry->scanline[PIPE_A],
  __entry->frame[PIPE_B], __entry->scanline[PIPE_B],
  __entry->frame[PIPE_C], __entry->scanline[PIPE_C])
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c 
b/drivers/gpu/drm/i915/display/intel_dpll.c
index 

[PATCH v2 08/11] drm/gem: Sort includes alphabetically

2022-01-26 Thread Lucas De Marchi
Sort includes alphabetically so it's easier to add/remove includes and
know when that is needed.

Signed-off-by: Lucas De Marchi 
---
 drivers/gpu/drm/drm_gem.c | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index 4dcdec6487bb..21631c22b374 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -25,20 +25,20 @@
  *
  */
 
-#include 
-#include 
-#include 
-#include 
-#include 
+#include 
+#include 
 #include 
-#include 
+#include 
+#include 
+#include 
 #include 
+#include 
 #include 
-#include 
-#include 
-#include 
-#include 
 #include 
+#include 
+#include 
+#include 
+#include 
 
 #include 
 #include 
-- 
2.34.1



[PATCH v2 04/11] drm/i915: Use str_enable_disable()

2022-01-26 Thread Lucas De Marchi
Remove the local enabledisable() implementation and adopt the
str_enable_disable() from linux/string_helpers.h.

Signed-off-by: Lucas De Marchi 
Acked-by: Daniel Vetter 
Acked-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_ddi.c   | 4 +++-
 drivers/gpu/drm/i915/display/intel_display_power.c | 4 +++-
 drivers/gpu/drm/i915/display/intel_dp.c| 8 
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c  | 3 ++-
 drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c  | 4 +++-
 drivers/gpu/drm/i915/i915_utils.h  | 5 -
 6 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 2f20abc5122d..4b35a8597632 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -25,6 +25,8 @@
  *
  */
 
+#include 
+
 #include 
 #include 
 
@@ -2152,7 +2154,7 @@ static void 
intel_dp_sink_set_msa_timing_par_ignore_state(struct intel_dp *intel
   enable ? DP_MSA_TIMING_PAR_IGNORE_EN : 0) <= 0)
drm_dbg_kms(>drm,
"Failed to %s MSA_TIMING_PAR_IGNORE in the sink\n",
-   enabledisable(enable));
+   str_enable_disable(enable));
 }
 
 static void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp,
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c 
b/drivers/gpu/drm/i915/display/intel_display_power.c
index 369317805d24..1f77cb9edddf 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -3,6 +3,8 @@
  * Copyright © 2019 Intel Corporation
  */
 
+#include 
+
 #include "i915_drv.h"
 #include "i915_irq.h"
 #include "intel_cdclk.h"
@@ -5302,7 +5304,7 @@ static void gen9_dbuf_slice_set(struct drm_i915_private 
*dev_priv,
state = intel_de_read(dev_priv, reg) & DBUF_POWER_STATE;
drm_WARN(_priv->drm, enable != state,
 "DBuf slice %d power %s timeout!\n",
-slice, enabledisable(enable));
+slice, str_enable_disable(enable));
 }
 
 void gen9_dbuf_slices_update(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 62c1535d696d..933fc316ea53 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1987,7 +1987,7 @@ void intel_dp_sink_set_decompression_state(struct 
intel_dp *intel_dp,
if (ret < 0)
drm_dbg_kms(>drm,
"Failed to %s sink decompression state\n",
-   enabledisable(enable));
+   str_enable_disable(enable));
 }
 
 static void
@@ -2463,7 +2463,7 @@ void intel_dp_configure_protocol_converter(struct 
intel_dp *intel_dp,
if (drm_dp_dpcd_writeb(_dp->aux,
   DP_PROTOCOL_CONVERTER_CONTROL_0, tmp) != 1)
drm_dbg_kms(>drm, "Failed to %s protocol converter HDMI 
mode\n",
-   enabledisable(intel_dp->has_hdmi_sink));
+   str_enable_disable(intel_dp->has_hdmi_sink));
 
tmp = crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444 &&
intel_dp->dfp.ycbcr_444_to_420 ? 
DP_CONVERSION_TO_YCBCR420_ENABLE : 0;
@@ -2472,7 +2472,7 @@ void intel_dp_configure_protocol_converter(struct 
intel_dp *intel_dp,
   DP_PROTOCOL_CONVERTER_CONTROL_1, tmp) != 1)
drm_dbg_kms(>drm,
"Failed to %s protocol converter YCbCr 4:2:0 
conversion mode\n",
-   enabledisable(intel_dp->dfp.ycbcr_444_to_420));
+   str_enable_disable(intel_dp->dfp.ycbcr_444_to_420));
 
tmp = 0;
if (intel_dp->dfp.rgb_to_ycbcr) {
@@ -2510,7 +2510,7 @@ void intel_dp_configure_protocol_converter(struct 
intel_dp *intel_dp,
if (drm_dp_pcon_convert_rgb_to_ycbcr(_dp->aux, tmp) < 0)
drm_dbg_kms(>drm,
   "Failed to %s protocol converter RGB->YCbCr 
conversion mode\n",
-  enabledisable(tmp));
+  str_enable_disable(tmp));
 }
 
 
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index de89d40abd38..31c3c3bceb95 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "i915_drv.h"
@@ -170,7 +171,7 @@ static int ct_control_enable(struct intel_guc_ct *ct, bool 
enable)
 GUC_CTB_CONTROL_ENABLE : 
GUC_CTB_CONTROL_DISABLE);
if (unlikely(err))
CT_PROBE_ERROR(ct, "Failed to control/%s CTB (%pe)\n",
-  enabledisable(enable), ERR_PTR(err));
+ 

[PATCH v2 09/11] drm: Convert open-coded yes/no strings to yesno()

2022-01-26 Thread Lucas De Marchi
linux/string_helpers.h provides a helper to return "yes"/"no" strings.
Replace the open coded versions with str_yes_no(). The places were
identified with the following semantic patch:

@@
expression b;
@@

- b ? "yes" : "no"
+ str_yes_no(b)

Then the includes were added, so we include-what-we-use, and parenthesis
adjusted in drivers/gpu/drm/v3d/v3d_debugfs.c. After the conversion we
still see the same binary sizes:

   textdata bss dec hex filename
  511493295 212   54656d580 virtio/virtio-gpu.ko.old
  511493295 212   54656d580 virtio/virtio-gpu.ko
1441491   60340 800 1502631  16eda7 radeon/radeon.ko.old
1441491   60340 800 1502631  16eda7 radeon/radeon.ko
6125369  328538   34000 6487907  62ff63 amd/amdgpu/amdgpu.ko.old
6125369  328538   34000 6487907  62ff63 amd/amdgpu/amdgpu.ko
 411986   104906176  428652   68a6c drm.ko.old
 411986   104906176  428652   68a6c drm.ko
  981291636 264  100029   186bd dp/drm_dp_helper.ko.old
  981291636 264  100029   186bd dp/drm_dp_helper.ko
1973432  1096402352 2085424  1fd230 nouveau/nouveau.ko.old
1973432  1096402352 2085424  1fd230 nouveau/nouveau.ko

Signed-off-by: Lucas De Marchi 
---
 drivers/gpu/drm/amd/amdgpu/atom.c |  4 +++-
 drivers/gpu/drm/dp/drm_dp.c   |  3 ++-
 drivers/gpu/drm/drm_client_modeset.c  |  3 ++-
 drivers/gpu/drm/drm_gem.c |  3 ++-
 drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.c |  5 -
 drivers/gpu/drm/radeon/atom.c |  3 ++-
 drivers/gpu/drm/v3d/v3d_debugfs.c | 11 ++-
 drivers/gpu/drm/virtio/virtgpu_debugfs.c  |  4 +++-
 8 files changed, 24 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/atom.c 
b/drivers/gpu/drm/amd/amdgpu/atom.c
index 6fa2229b7229..1c5d9388ad0b 100644
--- a/drivers/gpu/drm/amd/amdgpu/atom.c
+++ b/drivers/gpu/drm/amd/amdgpu/atom.c
@@ -25,6 +25,8 @@
 #include 
 #include 
 #include 
+#include 
+
 #include 
 
 #include 
@@ -740,7 +742,7 @@ static void atom_op_jump(atom_exec_context *ctx, int *ptr, 
int arg)
break;
}
if (arg != ATOM_COND_ALWAYS)
-   SDEBUG("   taken: %s\n", execute ? "yes" : "no");
+   SDEBUG("   taken: %s\n", str_yes_no(execute));
SDEBUG("   target: 0x%04X\n", target);
if (execute) {
if (ctx->last_jump == (ctx->start + target)) {
diff --git a/drivers/gpu/drm/dp/drm_dp.c b/drivers/gpu/drm/dp/drm_dp.c
index 6d43325acca5..c43577c8ac4d 100644
--- a/drivers/gpu/drm/dp/drm_dp.c
+++ b/drivers/gpu/drm/dp/drm_dp.c
@@ -28,6 +28,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -1239,7 +1240,7 @@ void drm_dp_downstream_debug(struct seq_file *m,
bool branch_device = drm_dp_is_branch(dpcd);
 
seq_printf(m, "\tDP branch device present: %s\n",
-  branch_device ? "yes" : "no");
+  str_yes_no(branch_device));
 
if (!branch_device)
return;
diff --git a/drivers/gpu/drm/drm_client_modeset.c 
b/drivers/gpu/drm/drm_client_modeset.c
index ced09c7c06f9..e6346a67cd98 100644
--- a/drivers/gpu/drm/drm_client_modeset.c
+++ b/drivers/gpu/drm/drm_client_modeset.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -241,7 +242,7 @@ static void drm_client_connectors_enabled(struct 
drm_connector **connectors,
connector = connectors[i];
enabled[i] = drm_connector_enabled(connector, true);
DRM_DEBUG_KMS("connector %d enabled? %s\n", connector->base.id,
- connector->display_info.non_desktop ? "non 
desktop" : enabled[i] ? "yes" : "no");
+ connector->display_info.non_desktop ? "non 
desktop" : str_yes_no(enabled[i]));
 
any_enabled |= enabled[i];
}
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index 21631c22b374..3c888db59ea4 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -37,6 +37,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -1145,7 +1146,7 @@ void drm_gem_print_info(struct drm_printer *p, unsigned 
int indent,
  drm_vma_node_start(>vma_node));
drm_printf_indent(p, indent, "size=%zu\n", obj->size);
drm_printf_indent(p, indent, "imported=%s\n",
- obj->import_attach ? "yes" : "no");
+ str_yes_no(obj->import_attach));
 
if (obj->funcs->print_info)
obj->funcs->print_info(p, indent, obj);
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.c 
b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.c
index a11637b0f6cc..d063d0dc13c5 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.c
@@ -21,6 +21,9 @@
  *
  * Authors: Ben Skeggs
  */
+

[PATCH v2 02/11] drm/i915: Fix trailing semicolon

2022-01-26 Thread Lucas De Marchi
Remove the trailing semicolon, as correctly warned by checkpatch:

-:1189: WARNING:TRAILING_SEMICOLON: macros should not use a trailing 
semicolon
#1189: FILE: drivers/gpu/drm/i915/intel_device_info.c:119:
+#define PRINT_FLAG(name) drm_printf(p, "%s: %s\n", #name, 
yesno(info->display.name));

Signed-off-by: Lucas De Marchi 
---
 drivers/gpu/drm/i915/intel_device_info.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
b/drivers/gpu/drm/i915/intel_device_info.c
index 93b251b25aba..94da5aa37391 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -114,7 +114,7 @@ void intel_device_info_print_static(const struct 
intel_device_info *info,
DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG);
 #undef PRINT_FLAG
 
-#define PRINT_FLAG(name) drm_printf(p, "%s: %s\n", #name, 
yesno(info->display.name));
+#define PRINT_FLAG(name) drm_printf(p, "%s: %s\n", #name, 
yesno(info->display.name))
DEV_INFO_DISPLAY_FOR_EACH_FLAG(PRINT_FLAG);
 #undef PRINT_FLAG
 }
-- 
2.34.1



[PATCH v2 03/11] drm/i915: Use str_yes_no()

2022-01-26 Thread Lucas De Marchi
Remove the local yesno() implementation and adopt the str_yes_no() from
linux/string_helpers.h.

Signed-off-by: Lucas De Marchi 
Acked-by: Daniel Vetter 
Acked-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_display.c  | 23 +++
 .../drm/i915/display/intel_display_debugfs.c  | 66 +++
 .../drm/i915/display/intel_display_trace.h|  6 +-
 drivers/gpu/drm/i915/display/intel_dp.c   | 12 ++--
 drivers/gpu/drm/i915/display/intel_fbc.c  |  4 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c |  3 +-
 drivers/gpu/drm/i915/display/intel_sprite.c   |  6 +-
 .../gpu/drm/i915/gem/selftests/huge_pages.c   |  9 +--
 .../drm/i915/gem/selftests/i915_gem_context.c |  7 +-
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |  9 +--
 .../drm/i915/gt/intel_execlists_submission.c  |  7 +-
 drivers/gpu/drm/i915/gt/intel_gt_pm.c |  3 +-
 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 52 ---
 drivers/gpu/drm/i915/gt/intel_reset.c |  3 +-
 drivers/gpu/drm/i915/gt/intel_rps.c   | 13 ++--
 drivers/gpu/drm/i915/gt/intel_sseu.c  |  9 ++-
 drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c  | 10 +--
 drivers/gpu/drm/i915/gt/selftest_timeline.c   |  3 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c|  3 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c   |  4 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc.c | 10 +--
 drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c | 20 +++---
 drivers/gpu/drm/i915/i915_debugfs.c   | 15 +++--
 drivers/gpu/drm/i915/i915_gpu_error.c |  9 +--
 drivers/gpu/drm/i915/i915_params.c|  5 +-
 drivers/gpu/drm/i915/i915_utils.h |  5 --
 drivers/gpu/drm/i915/intel_device_info.c  |  8 ++-
 drivers/gpu/drm/i915/intel_dram.c | 10 +--
 drivers/gpu/drm/i915/intel_pm.c   | 10 +--
 drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c  |  4 +-
 drivers/gpu/drm/i915/selftests/i915_active.c  |  3 +-
 31 files changed, 203 insertions(+), 148 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 80bc52425e47..bd453861088e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -32,6 +32,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -3008,7 +3009,7 @@ static int intel_crtc_compute_config(struct intel_crtc 
*crtc,
drm_dbg_kms(_priv->drm,
"requested pixel clock (%d kHz) too high (max: %d 
kHz, double wide: %s)\n",
pipe_mode->crtc_clock, clock_limit,
-   yesno(pipe_config->double_wide));
+   str_yes_no(pipe_config->double_wide));
return -EINVAL;
}
 
@@ -5586,7 +5587,7 @@ static void intel_dump_plane_state(const struct 
intel_plane_state *plane_state)
drm_dbg_kms(>drm,
"[PLANE:%d:%s] fb: [NOFB], visible: %s\n",
plane->base.base.id, plane->base.name,
-   yesno(plane_state->uapi.visible));
+   str_yes_no(plane_state->uapi.visible));
return;
}
 
@@ -5594,7 +5595,7 @@ static void intel_dump_plane_state(const struct 
intel_plane_state *plane_state)
"[PLANE:%d:%s] fb: [FB:%d] %ux%u format = %p4cc modifier = 
0x%llx, visible: %s\n",
plane->base.base.id, plane->base.name,
fb->base.id, fb->width, fb->height, >format->format,
-   fb->modifier, yesno(plane_state->uapi.visible));
+   fb->modifier, str_yes_no(plane_state->uapi.visible));
drm_dbg_kms(>drm, "\trotation: 0x%x, scaler: %d\n",
plane_state->hw.rotation, plane_state->scaler_id);
if (plane_state->uapi.visible)
@@ -5617,7 +5618,7 @@ static void intel_dump_pipe_config(const struct 
intel_crtc_state *pipe_config,
 
drm_dbg_kms(_priv->drm, "[CRTC:%d:%s] enable: %s %s\n",
crtc->base.base.id, crtc->base.name,
-   yesno(pipe_config->hw.enable), context);
+   str_yes_no(pipe_config->hw.enable), context);
 
if (!pipe_config->hw.enable)
goto dump_planes;
@@ -5625,7 +5626,7 @@ static void intel_dump_pipe_config(const struct 
intel_crtc_state *pipe_config,
snprintf_output_types(buf, sizeof(buf), pipe_config->output_types);
drm_dbg_kms(_priv->drm,
"active: %s, output_types: %s (0x%x), output format: %s\n",
-   yesno(pipe_config->hw.active),
+   str_yes_no(pipe_config->hw.active),
buf, pipe_config->output_types,
output_formats(pipe_config->output_format));
 
@@ -5694,7 +5695,7 @@ static void intel_dump_pipe_config(const struct 
intel_crtc_state *pipe_config,
intel_dump_dp_vsc_sdp(dev_priv, 

[PATCH v2 00/11] lib/string_helpers: Add a few string helpers

2022-01-26 Thread Lucas De Marchi
Add some helpers under lib/string_helpers.h so they can be used
throughout the kernel. When I started doing this there were 2 other
previous attempts I know of, not counting the iterations each of them
had:

1) https://lore.kernel.org/all/20191023131308.9420-1-jani.nik...@intel.com/
2) 
https://lore.kernel.org/all/20210215142137.64476-1-andriy.shevche...@linux.intel.com/#t

Now there is also the v1 of this same patch series:
https://lore.kernel.org/all/20220119072450.2890107-1-lucas.demar...@intel.com/

Going through the comments I tried to find some common ground and
justification for what is in here, addressing some of the concerns
raised.

a. This version should be a drop-in replacement for what is currently in
   the tree, with no change in behavior or binary size. For binary
   size what I checked was that the linked objects in the end have the
   same size (gcc 11). From comments in the previous attempts this seems
   also the case for earlier compiler versions

b. I didn't change the function name to choice_* as suggested by Andrew
   Morton in 20191023155619.43e0013f0c8c673a5c508...@linux-foundation.org
   because other people argumented in favor of shorter names for these
   simple helpers - if they are long and people simply not use due to
   that, we failed. However as pointed out in v1 of this patchseries,
   onoff(), yesno(), enabledisable(), enableddisabled() have some
   issues: the last 2 are hard to read and for the first 2 it would not
   be hard to have the symbol to clash with variable names.
   From comments in v1, most people were in favor (or at least not
   opposed) to using str_on_off(), str_yes_no(), str_enable_disable()
   and str_enabled_disabled().

c. Use string_helper.h for these helpers - pulling string.h in the
   compilations units was one of the concerns and I think re-using this
   already existing header is better than creating a new string-choice.h

d. One alternative to all of this suggested by Christian König
   (43456ba7-c372-84cc-4949-dcb817188...@amd.com) would be to add a
   printk format. But besides the comment, he also seemed to like
   the common function. This brought the argument from others that the
   simple yesno()/enabledisable() already used in the code (or new
   renamed version) is easier to remember and use than e.g. %py[DOY]


Changes in v2:

  - Use str_ prefix and separate other words with underscore: it's a
little bit longer, but should improve readability

  - Patches we re-split due to the rename: first patch adds all the new
functions, then additional patches try to do one conversion at a
time. While doing so, there were some fixes for issues already
present along the way

  - Style suggestions from v1 were adopted

In v1 it was suggested to apply this in drm-misc. I will leave this to
maintainers to decide: maybe it would be simpler to merge the first
patches on drm-intel-next, wait for the back merge and merge the rest
through drm-misc - my fear is a big conflict with other work going in
drm-intel-next since the bulk of the rename is there.

I tried to figure out acks and reviews from v1 and apply them to how the
patches are now split.

thanks
Lucas De Marchi

Lucas De Marchi (11):
  lib/string_helpers: Consolidate string helpers implementation
  drm/i915: Fix trailing semicolon
  drm/i915: Use str_yes_no()
  drm/i915: Use str_enable_disable()
  drm/i915: Use str_enabled_disabled()
  drm/i915: Use str_on_off()
  drm/amd/display: Use str_yes_no()
  drm/gem: Sort includes alphabetically
  drm: Convert open-coded yes/no strings to yesno()
  tomoyo: Use str_yes_no()
  cxgb4: Use str_yes_no()

 drivers/gpu/drm/amd/amdgpu/atom.c |   4 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |  14 +-
 drivers/gpu/drm/dp/drm_dp.c   |   3 +-
 drivers/gpu/drm/drm_client_modeset.c  |   3 +-
 drivers/gpu/drm/drm_gem.c |  23 +-
 drivers/gpu/drm/i915/display/g4x_dp.c |   6 +-
 .../gpu/drm/i915/display/intel_backlight.c|   3 +-
 drivers/gpu/drm/i915/display/intel_ddi.c  |   4 +-
 drivers/gpu/drm/i915/display/intel_display.c  |  46 ++--
 .../drm/i915/display/intel_display_debugfs.c  |  74 +++---
 .../drm/i915/display/intel_display_power.c|   4 +-
 .../drm/i915/display/intel_display_trace.h|   9 +-
 drivers/gpu/drm/i915/display/intel_dp.c   |  20 +-
 drivers/gpu/drm/i915/display/intel_dpll.c |   3 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c |   7 +-
 drivers/gpu/drm/i915/display/intel_dsi_vbt.c  |   7 +-
 drivers/gpu/drm/i915/display/intel_fbc.c  |   4 +-
 drivers/gpu/drm/i915/display/intel_fdi.c  |   8 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c |   3 +-
 drivers/gpu/drm/i915/display/intel_sprite.c   |   6 +-
 drivers/gpu/drm/i915/display/vlv_dsi_pll.c|   3 +-
 .../gpu/drm/i915/gem/selftests/huge_pages.c   |   9 +-
 .../drm/i915/gem/selftests/i915_gem_context.c |   7 +-
 drivers/gpu/drm/i915/gt/intel_breadcrumbs.c   |   3 +-
 

[PATCH v2 01/11] lib/string_helpers: Consolidate string helpers implementation

2022-01-26 Thread Lucas De Marchi
There are a few implementations of string helpers in the tree like yesno()
that just returns "yes" or "no" depending on a boolean argument. Those
are helpful to output strings to the user or log.

In order to consolidate them, prefix all of them str_ prefix to make it
clear what they are about and avoid symbol clashes.
Taking the commoon `val ? "yes" : "no"` implementation,  quite a few
users of open coded yesno() could later be converted to the new
function:

$ git grep '?\s*"yes"\s*' | wc -l
286
$ git grep '?\s*"no"\s*' | wc -l
20

The inlined function should keep the const strings local to each
compilation unit, the same way it's now, thus not changing the current
behavior.

Signed-off-by: Lucas De Marchi 
Reviewed-by: Andy Shevchenko 
Acked-by: Jani Nikula 
Acked-by: Daniel Vetter 
---
 include/linux/string_helpers.h | 20 
 1 file changed, 20 insertions(+)

diff --git a/include/linux/string_helpers.h b/include/linux/string_helpers.h
index 7a22921c9db7..4d72258d42fd 100644
--- a/include/linux/string_helpers.h
+++ b/include/linux/string_helpers.h
@@ -106,4 +106,24 @@ void kfree_strarray(char **array, size_t n);
 
 char **devm_kasprintf_strarray(struct device *dev, const char *prefix, size_t 
n);
 
+static inline const char *str_yes_no(bool v)
+{
+   return v ? "yes" : "no";
+}
+
+static inline const char *str_on_off(bool v)
+{
+   return v ? "on" : "off";
+}
+
+static inline const char *str_enable_disable(bool v)
+{
+   return v ? "enable" : "disable";
+}
+
+static inline const char *str_enabled_disabled(bool v)
+{
+   return v ? "enabled" : "disabled";
+}
+
 #endif
-- 
2.34.1



Re: [PATCH 3/3] drm: Convert open yes/no strings to yesno()

2022-01-26 Thread Lucas De Marchi

On Wed, Jan 19, 2022 at 09:30:47PM +0200, Andy Shevchenko wrote:

On Tue, Jan 18, 2022 at 11:24:50PM -0800, Lucas De Marchi wrote:

linux/string_helpers.h provides a helper to return "yes"/"no"
strings. Replace the open coded versions with yesno(). The places were
identified with the following semantic patch:

@@
expression b;
@@

- b ? "yes" : "no"
+ yesno(b)

Then the includes were added, so we include-what-we-use, and parenthesis
adjusted in drivers/gpu/drm/v3d/v3d_debugfs.c. After the conversion we
still see the same binary sizes:

   textdata bss dec hex filename
1442171   60344 800 1503315  16f053 ./drivers/gpu/drm/radeon/radeon.ko
1442171   60344 800 1503315  16f053 ./drivers/gpu/drm/radeon/radeon.ko.old
5985991  324439   33808 6344238  60ce2e ./drivers/gpu/drm/amd/amdgpu/amdgpu.ko
5985991  324439   33808 6344238  60ce2e 
./drivers/gpu/drm/amd/amdgpu/amdgpu.ko.old
 411986   104906176  428652   68a6c ./drivers/gpu/drm/drm.ko
 411986   104906176  428652   68a6c ./drivers/gpu/drm/drm.ko.old
1970292  1095152352 2082159  1fc56f ./drivers/gpu/drm/nouveau/nouveau.ko
1970292  1095152352 2082159  1fc56f ./drivers/gpu/drm/nouveau/nouveau.ko.old


...


 #include 
 #include 
 #include 
+#include 


+ blank line?


+#include 


...


seq_printf(m, "\tDP branch device present: %s\n",
-  branch_device ? "yes" : "no");
+  yesno(branch_device));


Now it's possible to keep this on one line.

...


drm_printf_indent(p, indent, "imported=%s\n",
- obj->import_attach ? "yes" : "no");
+ yesno(obj->import_attach));


81 here, but anyway, ditto!

...


  */


+blank line here?


+#include 
+
 #include "aux.h"
 #include "pad.h"


...


seq_printf(m, "MMU:%s\n",
-  (ident2 & V3D_HUB_IDENT2_WITH_MMU) ? "yes" : "no");
+  yesno(ident2 & V3D_HUB_IDENT2_WITH_MMU));
seq_printf(m, "TFU:%s\n",
-  (ident1 & V3D_HUB_IDENT1_WITH_TFU) ? "yes" : "no");
+  yesno(ident1 & V3D_HUB_IDENT1_WITH_TFU));
seq_printf(m, "TSY:%s\n",
-  (ident1 & V3D_HUB_IDENT1_WITH_TSY) ? "yes" : "no");
+  yesno(ident1 & V3D_HUB_IDENT1_WITH_TSY));
seq_printf(m, "MSO:%s\n",
-  (ident1 & V3D_HUB_IDENT1_WITH_MSO) ? "yes" : "no");
+  yesno(ident1 & V3D_HUB_IDENT1_WITH_MSO));
seq_printf(m, "L3C:%s (%dkb)\n",
-  (ident1 & V3D_HUB_IDENT1_WITH_L3C) ? "yes" : "no",
+  yesno(ident1 & V3D_HUB_IDENT1_WITH_L3C),
   V3D_GET_FIELD(ident2, V3D_HUB_IDENT2_L3C_NKB));


I believe it's fine to join back to have less LOCs (yes, it will be 83 or so,
but I believe in these cases it's very much okay).


now that we are converting to str_yes_no(), we will have a few more
chars. Some maintainers may be more strict on the 80 or 100 chars. I
will assume whatever is in the code base is the preferred form.

thanks
Lucas De Marchi



--
With Best Regards,
Andy Shevchenko