RE: [PATCH] drm/amd/pm: Skip smu_post_init in SRIOV

2020-09-17 Thread Deng, Emily
[AMD Official Use Only - Internal Distribution Only]

Reviewed-by: Emily.Deng 

>-Original Message-
>From: amd-gfx  On Behalf Of
>Jingwen Chen
>Sent: Thursday, September 17, 2020 5:43 PM
>To: amd-gfx@lists.freedesktop.org
>Cc: Chen, JingWen 
>Subject: [PATCH] drm/amd/pm: Skip smu_post_init in SRIOV
>
>smu_post_init needs to enable SMU feature, while this require virtualization
>off. Skip it since this feature is not used in SRIOV.
>
>v2: move the check to the early stage of smu_post_init.
>
>v3: fix typo
>
>Signed-off-by: Jingwen Chen 
>---
> drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 3 +++
> 1 file changed, 3 insertions(+)
>
>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
>b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
>index a027c7fdad56..05cb1fdd15ce 100644
>--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
>+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
>@@ -2631,6 +2631,9 @@ static int navi10_post_smu_init(struct smu_context
>*smu)
> uint64_t feature_mask = 0;
> int ret = 0;
>
>+if (amdgpu_sriov_vf(adev))
>+return 0;
>+
> /* For Naiv1x, enable these features only after DAL initialization */
> if (adev->pm.pp_feature & PP_SOCCLK_DPM_MASK)
> feature_mask |= FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT);
>--
>2.25.1
>
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RE: [PATCH] drm/amd/pm: Skip smu_post_init in SRIOV

2020-09-17 Thread Chen, JingWen
[AMD Public Use]

Typo fixed in v3

Best Regards,
JingWen Chen

> -Original Message-
> From: Chen, Guchun 
> Sent: Thursday, September 17, 2020 5:40 PM
> To: Chen, JingWen ; amd-
> g...@lists.freedesktop.org
> Cc: Chen, JingWen 
> Subject: RE: [PATCH] drm/amd/pm: Skip smu_post_init in SRIOV
> 
> [AMD Public Use]
> 
> You want to call it in SRIOV case or in bare-metal case?
> 
> Regards,
> Guchun
> 
> -Original Message-
> From: amd-gfx  On Behalf Of
> Jingwen Chen
> Sent: Thursday, September 17, 2020 5:17 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chen, JingWen 
> Subject: [PATCH] drm/amd/pm: Skip smu_post_init in SRIOV
> 
> smu_post_init needs to enable SMU feature, while this require virtualization
> off. Skip it since this feature is not used in SRIOV.
> 
> v2: move the check to the early stage of smu_post_init.
> 
> Signed-off-by: Jingwen Chen 
> ---
>  drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> index a027c7fdad56..a950f009c794 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> @@ -2631,6 +2631,9 @@ static int navi10_post_smu_init(struct smu_context
> *smu)
>   uint64_t feature_mask = 0;
>   int ret = 0;
> 
> + if (!amdgpu_sriov_vf(adev))
> + return 0;
> +
>   /* For Naiv1x, enable these features only after DAL initialization */
>   if (adev->pm.pp_feature & PP_SOCCLK_DPM_MASK)
>   feature_mask |=
> FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT);
> --
> 2.25.1
> 
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[PATCH] drm/amd/pm: Skip smu_post_init in SRIOV

2020-09-17 Thread Jingwen Chen
smu_post_init needs to enable SMU feature, while this require
virtualization off. Skip it since this feature is not used in SRIOV.

v2: move the check to the early stage of smu_post_init.

v3: fix typo

Signed-off-by: Jingwen Chen 
---
 drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index a027c7fdad56..05cb1fdd15ce 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -2631,6 +2631,9 @@ static int navi10_post_smu_init(struct smu_context *smu)
uint64_t feature_mask = 0;
int ret = 0;
 
+   if (amdgpu_sriov_vf(adev))
+   return 0;
+
/* For Naiv1x, enable these features only after DAL initialization */
if (adev->pm.pp_feature & PP_SOCCLK_DPM_MASK)
feature_mask |= FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT);
-- 
2.25.1

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RE: [PATCH] drm/amd/pm: Skip smu_post_init in SRIOV

2020-09-17 Thread Chen, Guchun
[AMD Public Use]

You want to call it in SRIOV case or in bare-metal case?

Regards,
Guchun

-Original Message-
From: amd-gfx  On Behalf Of Jingwen Chen
Sent: Thursday, September 17, 2020 5:17 PM
To: amd-gfx@lists.freedesktop.org
Cc: Chen, JingWen 
Subject: [PATCH] drm/amd/pm: Skip smu_post_init in SRIOV

smu_post_init needs to enable SMU feature, while this require virtualization 
off. Skip it since this feature is not used in SRIOV.

v2: move the check to the early stage of smu_post_init.

Signed-off-by: Jingwen Chen 
---
 drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index a027c7fdad56..a950f009c794 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -2631,6 +2631,9 @@ static int navi10_post_smu_init(struct smu_context *smu)
uint64_t feature_mask = 0;
int ret = 0;
 
+   if (!amdgpu_sriov_vf(adev))
+   return 0;
+
/* For Naiv1x, enable these features only after DAL initialization */
if (adev->pm.pp_feature & PP_SOCCLK_DPM_MASK)
feature_mask |= FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT);
--
2.25.1

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RE: [PATCH] drm/amd/pm: Skip smu_post_init in SRIOV

2020-09-17 Thread Chen, JingWen
[AMD Public Use]

Done in v2

Best Regards,
JingWen Chen

> -Original Message-
> From: Chen, Guchun 
> Sent: Thursday, September 17, 2020 4:21 PM
> To: Chen, JingWen ; amd-
> g...@lists.freedesktop.org
> Cc: Chen, JingWen 
> Subject: RE: [PATCH] drm/amd/pm: Skip smu_post_init in SRIOV
> 
> [AMD Public Use]
> 
> Why not moving the check in smu_post_init, and return 0 at the first early
> stage if it's SRIOV case?
> 
> Regards,
> Guchun
> 
> -Original Message-
> From: amd-gfx  On Behalf Of
> Jingwen Chen
> Sent: Thursday, September 17, 2020 4:11 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chen, JingWen 
> Subject: [PATCH] drm/amd/pm: Skip smu_post_init in SRIOV
> 
> smu_post_init needs to enable SMU feature, while this require virtualization
> off. Skip it since this feature is not used in SRIOV.
> 
> Signed-off-by: Jingwen Chen 
> ---
>  drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 10 ++
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index 5c4b74f964fc..79163d0ff762 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -469,10 +469,12 @@ static int smu_late_init(void *handle)
>   if (!smu->pm_enabled)
>   return 0;
> 
> - ret = smu_post_init(smu);
> - if (ret) {
> - dev_err(adev->dev, "Failed to post smu init!\n");
> - return ret;
> + if (!amdgpu_sriov_vf(adev)) {
> + ret = smu_post_init(smu);
> + if (ret) {
> + dev_err(adev->dev, "Failed to post smu init!\n");
> + return ret;
> + }
>   }
> 
>   ret = smu_set_default_od_settings(smu);
> --
> 2.25.1
> 
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[PATCH] drm/amd/pm: Skip smu_post_init in SRIOV

2020-09-17 Thread Jingwen Chen
smu_post_init needs to enable SMU feature, while this require
virtualization off. Skip it since this feature is not used in SRIOV.

v2: move the check to the early stage of smu_post_init.

Signed-off-by: Jingwen Chen 
---
 drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index a027c7fdad56..a950f009c794 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -2631,6 +2631,9 @@ static int navi10_post_smu_init(struct smu_context *smu)
uint64_t feature_mask = 0;
int ret = 0;
 
+   if (!amdgpu_sriov_vf(adev))
+   return 0;
+
/* For Naiv1x, enable these features only after DAL initialization */
if (adev->pm.pp_feature & PP_SOCCLK_DPM_MASK)
feature_mask |= FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT);
-- 
2.25.1

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RE: [PATCH] drm/amd/pm: Skip smu_post_init in SRIOV

2020-09-17 Thread Chen, Guchun
[AMD Public Use]

Why not moving the check in smu_post_init, and return 0 at the first early 
stage if it's SRIOV case?

Regards,
Guchun

-Original Message-
From: amd-gfx  On Behalf Of Jingwen Chen
Sent: Thursday, September 17, 2020 4:11 PM
To: amd-gfx@lists.freedesktop.org
Cc: Chen, JingWen 
Subject: [PATCH] drm/amd/pm: Skip smu_post_init in SRIOV

smu_post_init needs to enable SMU feature, while this require virtualization 
off. Skip it since this feature is not used in SRIOV.

Signed-off-by: Jingwen Chen 
---
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c 
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 5c4b74f964fc..79163d0ff762 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -469,10 +469,12 @@ static int smu_late_init(void *handle)
if (!smu->pm_enabled)
return 0;
 
-   ret = smu_post_init(smu);
-   if (ret) {
-   dev_err(adev->dev, "Failed to post smu init!\n");
-   return ret;
+   if (!amdgpu_sriov_vf(adev)) {
+   ret = smu_post_init(smu);
+   if (ret) {
+   dev_err(adev->dev, "Failed to post smu init!\n");
+   return ret;
+   }
}
 
ret = smu_set_default_od_settings(smu);
--
2.25.1

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[PATCH] drm/amd/pm: Skip smu_post_init in SRIOV

2020-09-17 Thread Jingwen Chen
smu_post_init needs to enable SMU feature, while this require
virtualization off. Skip it since this feature is not used in SRIOV.

Signed-off-by: Jingwen Chen 
---
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c 
b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 5c4b74f964fc..79163d0ff762 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -469,10 +469,12 @@ static int smu_late_init(void *handle)
if (!smu->pm_enabled)
return 0;
 
-   ret = smu_post_init(smu);
-   if (ret) {
-   dev_err(adev->dev, "Failed to post smu init!\n");
-   return ret;
+   if (!amdgpu_sriov_vf(adev)) {
+   ret = smu_post_init(smu);
+   if (ret) {
+   dev_err(adev->dev, "Failed to post smu init!\n");
+   return ret;
+   }
}
 
ret = smu_set_default_od_settings(smu);
-- 
2.25.1

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