Re: CE key

[glen herrmannsfeldt]

> If you're talking about the CE key that switched metering from
> customer to IBM, I have no idea. Those were a real pin-tumbler lock;
> not just a simple latch. They may even have been unique to each
> machine, though I think it would've been impractical to have each CE
> carry a jangling bunch of them around. I've never seen one on eBay,
> but then there's precious little S/360 stuff on there of any kind.

Yes, that one.

I know that DEC used the same key for all the CPUs, and was
guessing that IBM did, too.

Also, I don't know if it would match the blank that ordinary
locksmiths would sell.

thanks,

-- glen

Re: CE key

[Tony Harminc]

On 11 March 2015 at 17:33, glen herrmannsfeldt  wrote:
> I wonder if anyone knows where to find CE keys for S/360 CPUs.

I assume you mean a genuine IBM-logo key, rather than a generic Allen key.

The IBM ones show up on eBay from time to time. I bought a similar DEC
one a few years ago; it's a size or two larger. Here's one on eBay -
the listing has expired, but it's still visible.

http://www.ebay.com/itm/IBM-MACHINE-ACCESS-KEY-WITH-LOGO-/261696520337?nma=true&orig_cvip=true

If you're talking about the CE key that switched metering from
customer to IBM, I have no idea. Those were a real pin-tumbler lock;
not just a simple latch. They may even have been unique to each
machine, though I think it would've been impractical to have each CE
carry a jangling bunch of them around. I've never seen one on eBay,
but then there's precious little S/360 stuff on there of any kind.

Tony H.

Re: CE key

[retired mainframer]

Are you referring to the hex wrench used to open the cabinet doors or the
one used to put the CPU in maintenance mode?

> -Original Message-
> From: IBM Mainframe Assembler List [mailto:ASSEMBLER-
> l...@listserv.uga.edu] On Behalf Of glen herrmannsfeldt
> Sent: Wednesday, March 11, 2015 2:33 PM
> To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
> Subject: CE key
> 
> I wonder if anyone knows where to find CE keys for S/360 CPUs.

CE key

[glen herrmannsfeldt]

I wonder if anyone knows where to find CE keys for S/360 CPUs.

thanks,

-- glen

Re: LZRG??? Does this mean that 56-bit addressing is "a thing"?

[Robin Vowels]

From: "John McKown" 
Sent: Thursday, March 12, 2015 1:49 AM



Given some of the new instructions, such as LGZR, I wish IBM would
publish a manual with a title like: "What were the architects thinking
of? Explanation of the reasons behind the instructions in the z
architecture". Some are obvious, like L, ST, A. But why a single
instruction to do this? Is it _that_ often used? And POPCNT is another
one. Why do I need to know the number of 1 bits in each individual
byte in a GPR?


Useful in some counting operations, where the bits represent a mask.
Though not as a hardware instruction, it was used by about 1961
on DEUCE using an automatic shift operation.  It was 15 times
faster than the conventional way using a loop.

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new instructions (was: LZRG ...)

[glen herrmannsfeldt]

(snip, someone wrote)
>>  And POPCNT is another one. Why do I need to 
>> know the number of 1 bits in each individual byte in a GPR? 
  
On 2015-03-11, at 08:49, John McKown wrote:
> Because CDC had it first?  I suspect that it became a built-in
> function in Pascal, CARD(), because Pascal was developed on a
> CDC which had the hardware.  

As I understand it, it is used in cryptography. 

Also, it can be done fast in hardware and isn't that hard
if you want to do it.

> Is POPCNT an inexpensive extension of the Wallace Tree?

The ones I know of use a carry save adder tree.
I think that is related to the Wallace tree, but I forget the
exact way they work.

> And I suspect FORTRAN's transfer-of-sign, SIGNF() happened 
> because it was a hardware instruction on the 704.

I suppose. But now that IEEE cares about negative zero, it
has an extra use. 

Even without the special instruction, it is easy to do with 
bitwise AND and OR and most hardware.  (Though you have to be
able to get floating point values in a place where you can do
bitwise operations.)

-- glen

Re: LZRG??? Does this mean that 56-bit addressing is "a thing"?

[Rob van der Heij]

On 11 March 2015 at 16:41, Paul Gilmartin <
0014e0e4a59b-dmarc-requ...@listserv.uga.edu> wrote:

> On 2015-03-11, at 08:49, John McKown wrote:
> >  And POPCNT is another
> > one. Why do I need to know the number of 1 bits in each individual
> > byte in a GPR?
> >
> Because CDC had it first?  I suspect that it became a built-in
> function in Pascal, CARD(), because Pascal was developed on a
> CDC which had the hardware.  And I suspect FORTRAN's transfer-
> of-sign, SIGNF() happened because it was a hardware instruction
> on the 704.
>
> Is POPCNT an inexpensive extension of the Wallace Tree?
>

It might also be this particular one is necessary in data compression
things when dealing with hamming weight. But I suspect a strong motivation
is that they needed it for use in the milicode and it was fairly doable to
expose it.

Yes, it would be lots of fun to hear about the why behind things. Like I
was kind of disappointed by the size of the vector in SMID so would love to
hear the things that guide the design.

Rob

Re: LZRG??? Does this mean that 56-bit addressing is "a thing"?

[Gary Weinhold]

Pages 7 to 8 of this presentation:
https://share.confex.com/share/124/webprogram/Session16609.html

Evidently the code with SIMD instructions is the equivalent of what the 
millicode does for SRST, but I may have misinterpreted what was said.  
Using the millicoded instruction is evidently less efficient because 
there is transition time to get into millicode mode.


And I have no idea how it works.

Gary Weinhold
Data Kinetics, Ltd.



On 2015-03-11 12:01, fred.van.der.wi...@mail.ing.nl wrote:
Oh? I would love to see an example of how one can use one of those 
VECTOR FIND or VECTOR STRING RANGE COMPARE instructions to do 
something that approaches what SRST does. I must admit that I have no 
idea how that would work... Fred!

Re: LZRG??? Does this mean that 56-bit addressing is "a thing"?

[Fred . van . der . Windt]

> When Dan Greiner used to present new hardware instructions at SHARE, he used 
> to mention some had uses in micro/millicode.  He talked about instructions he 
> had personally pushed > for because he could see performance benefits by 
> using them in millicode.  Those of us attending couldn't think of any 
> practical uses.
>
>  From my understanding of a  COBOL compiler presentation at SHARE, they cited 
> performance benefits by using the new SIMD instructions to replace search 
> instructions (SRST?),
> because the SIMD instructions were what the millicode used to implement the 
> instruction.

Oh? I would love to see an example of how one can use one of those VECTOR FIND 
or VECTOR STRING RANGE COMPARE instructions to do something that approaches 
what SRST does. I must admit that I have no idea how that would work...

Fred!
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Re: LZRG??? Does this mean that 56-bit addressing is "a thing"?

[Paul Gilmartin]

On 2015-03-11, at 08:49, John McKown wrote:
>  And POPCNT is another
> one. Why do I need to know the number of 1 bits in each individual
> byte in a GPR? 
>  
Because CDC had it first?  I suspect that it became a built-in
function in Pascal, CARD(), because Pascal was developed on a
CDC which had the hardware.  And I suspect FORTRAN's transfer-
of-sign, SIGNF() happened because it was a hardware instruction
on the 704.

Is POPCNT an inexpensive extension of the Wallace Tree?

-- gil

Re: LZRG??? Does this mean that 56-bit addressing is "a thing"?

[David Cole]

Oops. I dyslex'd the whole thing. Nevermind.






At 3/11/2015 04:06 AM, Binyamin Dissen wrote:

Easy alignment to a 256 byte boundary?

Re: LZRG??? Does this mean that 56-bit addressing is "a thing"?

[Gary Weinhold]

When Dan Greiner used to present new hardware instructions at SHARE, he 
used to mention some had uses in micro/millicode.  He talked about 
instructions he had personally pushed for because he could see 
performance benefits by using them in millicode.  Those of us attending 
couldn't think of any practical uses.


From my understanding of a  COBOL compiler presentation at SHARE, they 
cited performance benefits by using the new SIMD instructions to replace 
search instructions (SRST?), because the SIMD instructions were what the 
millicode used to implement the instruction.


Gary Weinhold
Data Kinetics, Ltd.

On 2015-03-11 10:58, Mike Shaw wrote:

​
On Wed, Mar 11, 2015 at 10:49 AM, John McKown 
wrote:


Given some of the new instructions, such as LGZR, I wish IBM would
publish a manual with a title like: "What were the architects thinking
of? Explanation of the reasons behind the instructions in the z
architecture".
​...


"​To make the code compiled by the C/C++ compiler and/or WebSphere / Java
code run faster" is the answer to ANY "Why?" question about new
instructions, IMHO...

​
Mike Shaw
MVS/QuickRef Support Group
Chicago-Soft, Ltd.

Re: LZRG??? Does this mean that 56-bit addressing is "a thing"?

[John McKown]

Given some of the new instructions, such as LGZR, I wish IBM would
publish a manual with a title like: "What were the architects thinking
of? Explanation of the reasons behind the instructions in the z
architecture". Some are obvious, like L, ST, A. But why a single
instruction to do this? Is it _that_ often used? And POPCNT is another
one. Why do I need to know the number of 1 bits in each individual
byte in a GPR? Is it _that_ common a question in application or system
code? I can see the use for LT vice L + LTR

-- 
He's about as useful as a wax frying pan.

10 to the 12th power microphones = 1 Megaphone

Maranatha! <><
John McKown

Re: LZRG??? Does this mean that 56-bit addressing is "a thing"?

[David Cole]

Oops. I dyslex'd the whole thing. Nevermind.






At 3/11/2015 04:06 AM, Binyamin Dissen wrote:

Easy alignment to a 256 byte boundary?

On Tue, 10 Mar 2015 18:57:53 -0400 David Cole  wrote:

:>Per the new PoOps:
:>
:>
:>>LZRG R1,D2(X2,B2) [RXY-a]
:>>
:>>The second operand, with the rightmost byte set to zero, is placed
:>>at the first-operand location. [snip] for LZRG, the first and second
:>>operands are 64 bits.
:>
:>
:>I guess my imagination fails me, so I have to ask... Why?

--
Binyamin Dissen 
http://www.dissensoftware.com

Director, Dissen Software, Bar & Grill - Israel


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