[PATCH] Added sd driver for bcm2835 (Raspberry PI)
---
arch/arm/mach-bcm2835/core.c | 1 +
drivers/mci/Kconfig | 4 +
drivers/mci/Makefile | 1 +
drivers/mci/mci-bcm2835.c| 567 +++
drivers/mci/mci-bcm2835.h| 126 ++
5 files changed, 699 insertions(+)
create mode 100644 drivers/mci/mci-bcm2835.c
create mode 100644 drivers/mci/mci-bcm2835.h
diff --git a/arch/arm/mach-bcm2835/core.c b/arch/arm/mach-bcm2835/core.c
index f44ecd5..906e434 100644
--- a/arch/arm/mach-bcm2835/core.c
+++ b/arch/arm/mach-bcm2835/core.c
@@ -70,6 +70,7 @@ static int bcm2835_dev_init(void)
{
add_generic_device(bcm2835-gpio, 0, NULL, BCM2835_GPIO_BASE, 0xB0,
IORESOURCE_MEM, NULL);
add_generic_device(bcm2835-cs, DEVICE_ID_SINGLE, NULL,
BCM2835_ST_BASE, 0x1C, IORESOURCE_MEM, NULL);
+ add_generic_device(bcm2835_mci, 0, NULL, BCM2835_EMMC_BASE, 0xFC,
IORESOURCE_MEM, NULL);
return 0;
}
coredevice_initcall(bcm2835_dev_init);
diff --git a/drivers/mci/Kconfig b/drivers/mci/Kconfig
index 9558f28..52cb303 100644
--- a/drivers/mci/Kconfig
+++ b/drivers/mci/Kconfig
@@ -45,6 +45,10 @@ config MCI_S3C
Enable this entry to add support to read and write SD cards on a
Samsung S3C24xx based system.
+config MCI_BCM2835
+ bool MCI support for BCM2835
+ depends on ARCH_BCM2835
+
config MCI_IMX
bool i.MX
depends on ARCH_IMX27 || ARCH_IMX31
diff --git a/drivers/mci/Makefile b/drivers/mci/Makefile
index d46d5f5..263f23a 100644
--- a/drivers/mci/Makefile
+++ b/drivers/mci/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_MFD_TWL6030) += twl6030.o
obj-$(CONFIG_MCI_PXA) += pxamci.o
obj-$(CONFIG_MCI_ATMEL) += atmel_mci.o
obj-$(CONFIG_MCI_SPI) += mci_spi.o
+obj-$(CONFIG_MCI_BCM2835) += mci-bcm2835.o
diff --git a/drivers/mci/mci-bcm2835.c b/drivers/mci/mci-bcm2835.c
new file mode 100644
index 000..1b6b98b
--- /dev/null
+++ b/drivers/mci/mci-bcm2835.c
@@ -0,0 +1,567 @@
+/*
+ * Raspberry PI MCI driver
+ *
+ * Portions (e.g. read/write macros, concepts for back-to-back register write
+ * timing workarounds) obviously extracted from the Linux kernel at:
+ * https://github.com/raspberrypi/linux.git rpi-3.6.y
+ *
+ * The Linux kernel code has the following (c) and license, which is hence
+ * propagated to here:
+ *
+ * Support for SDHCI device on 2835
+ * Based on sdhci-bcm2708.c (c) 2010 Broadcom
+ * Inspired by bcm2835_sdhci.c from git://github.com/gonzoua/u-boot-pi.git
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * Author: Wilhelm Lundgren wilhelm.lundg...@cybercom.com
+ */
+
+#include common.h
+#include init.h
+#include mci.h
+#include io.h
+#include malloc.h
+#include clock.h
+#include mci-bcm2835.h
+
+#define to_bcm2835_host(h) container_of(h, struct bcm2835_mci_host, mci)
+static int twoticks_delay;
+struct bcm2835_mci_host {
+ struct mci_host mci;
+ void __iomem *regs;
+ struct device_d *hw_dev;
+ int bus_width;
+ u32 clock;
+ u32 max_clock;
+ u32 version;
+ uint64_t last_write;
+};
+
+void bcm2835_mci_write(struct bcm2835_mci_host *host, u32 reg, u32 val)
+{
+ /*
+* The Arasan has a bugette whereby it may lose the content of
+* successive writes to registers that are within two SD-card clock
+* cycles of each other (a clock domain crossing problem).
+* It seems, however, that the data register does not have this problem.
+* (Which is just as well - otherwise we'd have to nobble the DMA engine
+* too)
+*/
+
+ if (host-last_write != 0)
+ while ((get_time_ns() - host-last_write) twoticks_delay)
+ ;
+ host-last_write = get_time_ns();
+ writel(val, host-regs + reg);
+}
+
+u32 bcm2835_mci_read(struct bcm2835_mci_host *host, u32 reg)
+{
+ return readl(host-regs + reg);
+}
+
+/* Create special write data function since the data
+ * register is not affected by the twoticks_delay bug
+ * and we can thus get better speed here
+ */
+void bcm2835_mci_write_data(struct bcm2835_mci_host *host, u32 *p)
+{
+ writel(*p, host-regs + BCM2835_MCI_DATA);
+}
+
+/* Make a read data functions as well just to keep structure */
+void bcm2835_mci_read_data(struct bcm2835_mci_host *host, u32 *p)
+{
+ *p = readl(host-regs + BCM2835_MCI_DATA);
+}
+
+static int bcm2835_mci_transfer_data(struct
Re: [PATCH] ARM: OMAP5 processors support
On Thu, 2013-04-25 at 15:42 +0300, Uladzimir Bely wrote: 25.04.2013 14:58, Jan Lübbe пишет: On Thu, 2013-04-25 at 12:09 +0300, Uladzimir Bely wrote: diff --git a/arch/arm/boards/omap5_sevm/env/config b/arch/arm/boards/omap5_sevm/env/config new file mode 100644 index 000..9752957 --- /dev/null +++ b/arch/arm/boards/omap5_sevm/env/config @@ -0,0 +1,11 @@ +#!/bin/sh + +machine=omap5 + +autoboot_timeout=2 + +bootargs=console=ttyO2,115200 + +kernel_loc=disk + +PS1=\e[1;32mbarebox@\e[1;31m\h:\w\e[0m Please use defaultenv-2. I'm not too familiar with barebox's defaultenv/defaultenv-2. Our work on omap5 was based mostly on omap5 code from U-Boot and omap4 code from barebox. Mostly, I used pcm049 as an example of omap4-based board in barebox. So arch/arm/boards/omap5_sevm/env/config looks like this one, but includes only most necessary thinks to load to barebox prompt. Please, give me a hint, which board can be used as an example of using defaultenv-2, maybe I'll do something. Take a look at arch/arm/boards/beagle (omap3) or arch/arm/boards/panda (omap4). diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig index 42e5f4a..0ad3864 100644 --- a/arch/arm/mach-omap/Kconfig +++ b/arch/arm/mach-omap/Kconfig @@ -41,6 +41,14 @@ config ARCH_OMAP4 help Say Y here if you are using Texas Instrument's OMAP4 based platform +config ARCH_OMAP5 + bool OMAP5 + select CPU_V7 + select GENERIC_GPIO + select OMAP_CLOCK_SOURCE_S32K + help +Say Y here if you are using Texas Instrument's OMAP5 based platform + config ARCH_AM33XX bool AM33xx select CPU_V7 @@ -115,6 +123,7 @@ config BOARDINFO default Phytec phyCARD-A-L1 if MACH_PCAAL1 default Phytec phyCARD-A-XL2 if MACH_PCAAXL2 default Phytec phyCORE-AM335x if MACH_PCM051 + default Phytec phyCORE omap5_sevm if MACH_OMAP5_SEVM choice prompt Select OMAP board @@ -177,6 +186,13 @@ config MACH_PCAAXL2 help Say Y here if you are using a phyCARD-A-XL1 PCA-A-XL1 +config MACH_OMAP5_SEVM + bool Phytec phyCORE omap5_sevm + depends on ARCH_OMAP5 + help +Say Y here if you are using Phytecs phyCORE omap5_sevm board +based on OMAP5 + config MACH_PCM051 bool Phytec phyCORE pcm051 select OMAP_CLOCK_ALL Isn't the OMAP5 sEVM from TI? We worked with OMAP5-based board, produced by Phytec (Phytec phyCORE-OMAP5), but, as I have mentioned above, code was partially ported from U-Boot's OMAP5-sevm board. I'll correct it. The names should be consistent and match the hardware the new code you are adding in this patch is intended for. -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
OTG Device mode on i.MX51
Hello. Is anyone have successful works OTG in device mode on iMX51? Thanks!. --- ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH] ARM: ccxmx51: Fix OTG Host USB mode
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
arch/arm/boards/ccxmx51/ccxmx51.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boards/ccxmx51/ccxmx51.c
b/arch/arm/boards/ccxmx51/ccxmx51.c
index a14c9bc..df565d9 100644
--- a/arch/arm/boards/ccxmx51/ccxmx51.c
+++ b/arch/arm/boards/ccxmx51/ccxmx51.c
@@ -196,7 +196,8 @@ static const struct spi_board_info ccxmx51_spi_board_info[]
= {
};
static struct imxusb_platformdata ccxmx51_otg_pdata = {
- .flags = MXC_EHCI_MODE_UTMI_16_BIT | MXC_EHCI_POWER_PINS_ENABLED,
+ .flags = MXC_EHCI_MODE_UTMI_16_BIT | MXC_EHCI_INTERNAL_PHY |
+ MXC_EHCI_POWER_PINS_ENABLED,
.mode = IMX_USB_MODE_HOST,
};
--
1.8.1.5
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[PATCH 3/6] MCI/Core: increase the transmission frequency while card detection
According to the SD card spec the detection can happen at 400 kHz Signed-off-by: Juergen Beisert j...@pengutronix.de --- drivers/mci/mci-core.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c index a269aee..9aeaa4d 100644 --- a/drivers/mci/mci-core.c +++ b/drivers/mci/mci-core.c @@ -1371,7 +1371,8 @@ static int mci_card_probe(struct mci *mci) } mci_set_bus_width(mci, MMC_BUS_WIDTH_1); - mci_set_clock(mci, 1); /* set the lowest available clock */ + /* according to the SD card spec the detection can happen at 400 kHz */ + mci_set_clock(mci, 40); /* reset the card */ rc = mci_go_idle(mci); -- 1.8.2.rc2 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 5/6] MCI/MXS: report a better matching error code when the transfer fails
EIO is a better error message to describe the data transfer to or from the SD cards has failed. Signed-off-by: Juergen Beisert j...@pengutronix.de --- drivers/mci/mxs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mci/mxs.c b/drivers/mci/mxs.c index 3045e6a..c15461c 100644 --- a/drivers/mci/mxs.c +++ b/drivers/mci/mxs.c @@ -186,7 +186,7 @@ static int mxs_mci_read_data(struct mxs_mci_host *mxs_mci, void *buffer, unsigne if (length == 0) return 0; - return -EINVAL; + return -EIO; } @@ -223,7 +223,7 @@ static int mxs_mci_write_data(struct mxs_mci_host *mxs_mci, const void *buffer, if (length == 0) return 0; - return -EINVAL; + return -EIO; } /** -- 1.8.2.rc2 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 1/6] MXS/MCI: add forgotten header file
Commit b36f68d74b5379c216429a0f15aeedbd7917e10d now uses the generic mxs_reset_block() routine, but this requires the mxs.h header file for the prototype. Signed-off-by: Juergen Beisert j...@pengutronix.de --- drivers/mci/mxs.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mci/mxs.c b/drivers/mci/mxs.c index 93f5a41..e2ffa43 100644 --- a/drivers/mci/mxs.c +++ b/drivers/mci/mxs.c @@ -37,6 +37,7 @@ #include clock.h #include io.h #include asm/bitops.h +#include mach/mxs.h #include mach/imx-regs.h #include mach/mci.h #include mach/clock.h -- 1.8.2.rc2 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 4/6] MCI/Core: honor transmission limits at the card's side
The host limits are only one limit we must honor when changing the transmission
frequency.
The SD cards have their own limits, so take them also into account.
Signed-off-by: Juergen Beisert j...@pengutronix.de
---
drivers/mci/mci-core.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index 9aeaa4d..42e3d4b 100644
--- a/drivers/mci/mci-core.c
+++ b/drivers/mci/mci-core.c
@@ -605,13 +605,17 @@ static void mci_set_clock(struct mci *mci, unsigned clock)
{
struct mci_host *host = mci-host;
- /* check against any given limits */
+ /* check against any given limits at the host's side */
if (clock host-f_max)
clock = host-f_max;
if (clock host-f_min)
clock = host-f_min;
+ /* check against the limit at the card's side */
+ if (mci-tran_speed != 0 clock mci-tran_speed)
+ clock = mci-tran_speed;
+
host-clock = clock;/* the new target frequency */
mci_set_ios(mci);
}
--
1.8.2.rc2
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[PATCH 2/6] MXS/MCI: don't touch variables in the host structure
MMC_BUS_WIDTH_* macros do not correspond with the real bus width.
After setting a bus width larger than 1 bit the next call to change the
frequency ends in the default handler and the host interface stays silently
at the previous frequency.
Signed-off-by: Juergen Beisert j...@pengutronix.de
---
drivers/mci/mxs.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/mci/mxs.c b/drivers/mci/mxs.c
index e2ffa43..3045e6a 100644
--- a/drivers/mci/mxs.c
+++ b/drivers/mci/mxs.c
@@ -515,23 +515,23 @@ static void mxs_mci_set_ios(struct mci_host *host, struct
mci_ios *ios)
switch (ios-bus_width) {
case MMC_BUS_WIDTH_8:
mxs_mci-bus_width = 2;
- host-bus_width = 8;/* 8 bit is possible */
+ pr_debug(IO settings: changing bus width to 8 bits\n);
break;
case MMC_BUS_WIDTH_4:
mxs_mci-bus_width = 1;
- host-bus_width = 4;/* 4 bit is possible */
+ pr_debug(IO settings: changing bus width to 4 bits\n);
break;
case MMC_BUS_WIDTH_1:
mxs_mci-bus_width = 0;
- host-bus_width = 1;/* 1 bit is possible */
+ pr_debug(IO settings: changing bus width to 1 bit\n);
break;
default:
+ pr_debug(IO settings: unsupported bus width!\n);
return;
}
mxs_mci-clock = mxs_mci_setup_clock_speed(mxs_mci, ios-clock);
- pr_debug(IO settings: bus width=%d, frequency=%u Hz\n,
host-bus_width,
- mxs_mci-clock);
+ pr_debug(IO settings: frequency=%u Hz\n, mxs_mci-clock);
}
/* --- */
--
1.8.2.rc2
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[PATCH 6/6] MCI/Core: move an ugly ifdef to the header file
To avoid the compiler complains about an unused variable when no SPI host is
enabled, use an inline function instead of a macro.
Signed-off-by: Juergen Beisert j...@pengutronix.de
---
drivers/mci/mci-core.c | 3 +--
include/mci.h | 15 +--
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index 42e3d4b..ba7ef55 100644
--- a/drivers/mci/mci-core.c
+++ b/drivers/mci/mci-core.c
@@ -482,9 +482,8 @@ static int sd_change_freq(struct mci *mci)
{
struct mci_cmd cmd;
struct mci_data data;
-#ifdef CONFIG_MCI_SPI
struct mci_host *host = mci-host;
-#endif
+
uint32_t *switch_status = sector_buf;
uint32_t *scr = sector_buf;
int timeout;
diff --git a/include/mci.h b/include/mci.h
index cf9582d..7f514be 100644
--- a/include/mci.h
+++ b/include/mci.h
@@ -54,12 +54,6 @@
#define IS_SD(x) (x-version SD_VERSION_SD)
-#ifdef CONFIG_MCI_SPI
-#define mmc_host_is_spi(host) ((host)-host_caps MMC_CAP_SPI)
-#else
-#define mmc_host_is_spi(host) 0
-#endif
-
#define MMC_DATA_READ 1
#define MMC_DATA_WRITE 2
@@ -330,6 +324,15 @@ struct mci {
char *ext_csd;
};
+static inline bool mmc_host_is_spi(const struct mci_host *host)
+{
+#ifdef CONFIG_MCI_SPI
+ return !!host-host_caps MMC_CAP_SPI;
+#else
+ return false;
+#endif
+}
+
int mci_register(struct mci_host*);
#endif /* _MCI_H_ */
--
1.8.2.rc2
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[RFC only] ARM: i.MX: Fix SDRAM size detect
This is a trying to fix problem described in:
http://lists.infradead.org/pipermail/barebox/2013-April/014182.html
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
arch/arm/mach-imx/esdctl.c | 13 ++---
arch/arm/mach-imx/imx51.c | 21 +
2 files changed, 23 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
index cb57d45..bde02fd 100644
--- a/arch/arm/mach-imx/esdctl.c
+++ b/arch/arm/mach-imx/esdctl.c
@@ -345,7 +345,7 @@ static int imx_esdctl_init(void)
return platform_driver_register(imx_serial_driver);
}
-mem_initcall(imx_esdctl_init);
+//mem_initcall(imx_esdctl_init);
/*
* The i.MX SoCs usually have two SDRAM chipselects. The following
@@ -435,16 +435,7 @@ void __naked __noreturn imx35_barebox_entry(uint32_t
boarddata)
void __naked __noreturn imx51_barebox_entry(uint32_t boarddata)
{
- unsigned long base;
- unsigned long size;
-
- base = MX51_CSD0_BASE_ADDR;
-
- size = imx_v3_sdram_size((void *)MX51_ESDCTL_BASE_ADDR, 0);
- if (size == SZ_256M)
- size += imx_v3_sdram_size((void *)MX51_ESDCTL_BASE_ADDR, 1);
-
- barebox_arm_entry(base, size, boarddata);
+ barebox_arm_entry(MX51_CSD0_BASE_ADDR, SZ_128M, boarddata);
}
void __naked __noreturn imx53_barebox_entry(uint32_t boarddata)
diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c
index 54d99a4..6593b7d 100644
--- a/arch/arm/mach-imx/imx51.c
+++ b/arch/arm/mach-imx/imx51.c
@@ -21,6 +21,8 @@
#include mach/revision.h
#include mach/clock-imx51_53.h
#include mach/generic.h
+#include mach/esdctl.h
+#include asm/memory.h
#define SI_REV 0x48
@@ -76,6 +78,25 @@ static int imx51_init(void)
}
postcore_initcall(imx51_init);
+static int imx51_memory_init(void)
+{
+ void __iomem *esdctl = IOMEM(MX51_ESDCTL_BASE_ADDR + IMX_ESDCTL1);
+ unsigned long add, size = SZ_128M;
+
+ add = get_ram_size((ulong *)(MX51_CSD0_BASE_ADDR + SZ_128M), SZ_128M);
+ if (add) {
+ size += add;
+ if (readl(esdctl) ESDCTL0_SDE)
+ size += get_ram_size((ulong *)MX51_CSD1_BASE_ADDR,
SZ_256M);
+
+ }
+
+ arm_add_mem_device(ram0, MX51_CSD0_BASE_ADDR, size);
+
+ return 0;
+}
+mem_initcall(imx51_memory_init);
+
/*
* Saves the boot source media into the $bootsource environment variable
*
--
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Re: [RFC only] ARM: i.MX: Fix SDRAM size detect
On Fri, Apr 26, 2013 at 02:21:54PM +0400, Alexander Shiyan wrote:
This is a trying to fix problem described in:
http://lists.infradead.org/pipermail/barebox/2013-April/014182.html
Sorry, can you explain what the problem is and how this patch fixes
that?
How I understood it the problem was that your board had the second chip
select enabled without having sdram connected there leading to a wrong
size detection.
void __naked __noreturn imx51_barebox_entry(uint32_t boarddata)
{
- unsigned long base;
- unsigned long size;
-
- base = MX51_CSD0_BASE_ADDR;
-
- size = imx_v3_sdram_size((void *)MX51_ESDCTL_BASE_ADDR, 0);
- if (size == SZ_256M)
- size += imx_v3_sdram_size((void *)MX51_ESDCTL_BASE_ADDR, 1);
-
- barebox_arm_entry(base, size, boarddata);
+ barebox_arm_entry(MX51_CSD0_BASE_ADDR, SZ_128M, boarddata);
}
Here SDRAM size detection is disabled completely and instead 128Mib is
assumed.
+static int imx51_memory_init(void)
+{
+ void __iomem *esdctl = IOMEM(MX51_ESDCTL_BASE_ADDR + IMX_ESDCTL1);
+ unsigned long add, size = SZ_128M;
+
+ add = get_ram_size((ulong *)(MX51_CSD0_BASE_ADDR + SZ_128M), SZ_128M);
Ok, I think the intention here is to test whether we actually have more
than 128Mib. This won't work. get_ram_size works by detecting where in
memory we have mirrored regions. So in case you have 128Mib of real
memory you will detect 128Mib above not knowing that you test the
mirrored region of your actual memory.
+ if (add) {
+ size += add;
+ if (readl(esdctl) ESDCTL0_SDE)
+ size += get_ram_size((ulong *)MX51_CSD1_BASE_ADDR,
SZ_256M);
+
+ }
+
+ arm_add_mem_device(ram0, MX51_CSD0_BASE_ADDR, size);
With this patch you imply that imx_v3_sdram_size does not work which was
never mentioned in the thread you reference.
Can you please post:
- Which values the sdram controller is programmed with
- How much memory you really have
- what barebox detects
Sascha
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Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
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Re: [PATCH] ARM: OMAP5 processors support
On Fri, 2013-04-26 at 13:33 +0300, Uladzimir Bely wrote: diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig index 42e5f4a..0ad3864 100644 --- a/arch/arm/mach-omap/Kconfig +++ b/arch/arm/mach-omap/Kconfig @@ -41,6 +41,14 @@ config ARCH_OMAP4 help Say Y here if you are using Texas Instrument's OMAP4 based platform +config MACH_OMAP5_SEVM + bool Phytec phyCORE omap5_sevm + depends on ARCH_OMAP5 + help +Say Y here if you are using Phytecs phyCORE omap5_sevm board +based on OMAP5 + config MACH_PCM051 bool Phytec phyCORE pcm051 select OMAP_CLOCK_ALL Isn't the OMAP5 sEVM from TI? This question is more complicated. We use Phytec phyCORE OMAP4 board, but with OMAP5 SOC installed. We used omap5_sevm with number 3777 which already exists in arch/arm/tools. Kernel also was compiled for this mach-type. So the board which you use for development is not generally available. Maybe you could call it something like MACH_PCM049_OMAP5 or MACH_PHYCORE_OMAP5_EVAL...? As I understand, new board (Phytec phyCORE OMAP5) must be added to this file (http://www.arm.linux.org.uk/developer/machines/download.php) first, and barebox will use this updated file for this board too. Am I right? How can I add new board here correctly? To request a new machine ID, use http://www.arm.linux.org.uk/developer/machines/?action=new Note that new legacy (non-Device-Tree) boards are no longer accepted into the kernel! For DT-only boards no machine ID is needed at all. Regards, Jan Lübbe -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re[2]: [RFC only] ARM: i.MX: Fix SDRAM size detect
On Fri, Apr 26, 2013 at 02:21:54PM +0400, Alexander Shiyan wrote: This is a trying to fix problem described in: http://lists.infradead.org/pipermail/barebox/2013-April/014182.html Sorry, can you explain what the problem is and how this patch fixes that? How I understood it the problem was that your board had the second chip select enabled without having sdram connected there leading to a wrong size detection. ... + arm_add_mem_device(ram0, MX51_CSD0_BASE_ADDR, size); With this patch you imply that imx_v3_sdram_size does not work which was never mentioned in the thread you reference. Can you please post: - Which values the sdram controller is programmed with - How much memory you really have - what barebox detects Values for ESDCTL is programmed by DCD-data from flash_header. Currently both channels are enabled and configured to 256M. Barebox is NOT detect size of memory, it just a read back these values. At least on every i.MX51 this is not works correctly. In any words: How much we specify in flash_header, this is our detected size. I have a two modules (256M and 512M), barebox works when I manually disable second SDRAM bank and of course say me 256M on both modules. In the patch I am just choose 128M as safe size, then add additional banks. Of course this is wrong if we have repeated memory and/or holes, but I cannot see any other way at now... --- ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [RFC only] ARM: i.MX: Fix SDRAM size detect
On Fri, Apr 26, 2013 at 03:12:56PM +0400, Alexander Shiyan wrote: On Fri, Apr 26, 2013 at 02:21:54PM +0400, Alexander Shiyan wrote: This is a trying to fix problem described in: http://lists.infradead.org/pipermail/barebox/2013-April/014182.html Sorry, can you explain what the problem is and how this patch fixes that? How I understood it the problem was that your board had the second chip select enabled without having sdram connected there leading to a wrong size detection. ... + arm_add_mem_device(ram0, MX51_CSD0_BASE_ADDR, size); With this patch you imply that imx_v3_sdram_size does not work which was never mentioned in the thread you reference. Can you please post: - Which values the sdram controller is programmed with - How much memory you really have - what barebox detects Values for ESDCTL is programmed by DCD-data from flash_header. Yes, that happens on most i.MX using DCD data Currently both channels are enabled and configured to 256M. Barebox is NOT detect size of memory, it just a read back these values. Yes. At least on every i.MX51 this is not works correctly. In any words: How much we specify in flash_header, this is our detected size. Yes. I have a two modules (256M and 512M), How is the layout? for 256M do you have a single chipselect with 256M or two chipselects with 128M each? Can you please post the output of: md 0x83fd9000+0x10 Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re[2]: [RFC only] ARM: i.MX: Fix SDRAM size detect
On Fri, Apr 26, 2013 at 02:21:54PM +0400, Alexander Shiyan wrote: This is a trying to fix problem described in: http://lists.infradead.org/pipermail/barebox/2013-April/014182.html Sorry, can you explain what the problem is and how this patch fixes that? How I understood it the problem was that your board had the second chip select enabled without having sdram connected there leading to a wrong size detection. ... + arm_add_mem_device(ram0, MX51_CSD0_BASE_ADDR, size); With this patch you imply that imx_v3_sdram_size does not work which was never mentioned in the thread you reference. Can you please post: - Which values the sdram controller is programmed with - How much memory you really have - what barebox detects Values for ESDCTL is programmed by DCD-data from flash_header. Yes, that happens on most i.MX using DCD data Currently both channels are enabled and configured to 256M. Barebox is NOT detect size of memory, it just a read back these values. Yes. At least on every i.MX51 this is not works correctly. In any words: How much we specify in flash_header, this is our detected size. Yes. I have a two modules (256M and 512M), How is the layout? for 256M do you have a single chipselect with 256M or two chipselects with 128M each? Single chipselect on 256M module. I.e. second is unused. Can you please post the output of: md 0x83fd9000+0x10 Values exactly same as in flash_header. barebox@ConnectCore i.MX51:/ md 0x83fd9000+0x10 83fd9000: b2a2 3f3584ab b2a2 3f3584ab..5?..5? --- ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: Re: [PATCH] ARM: OMAP5 processors support
As an example, are there any DT-only (without machine ID) boards in barebox? -- With regards, Uladzimir Bely. ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH] ARM: mmu: Use PAGE_ALIGN in dma_free_coherent
We PAGE_ALIGN the size in dma_alloc_coherent so do it also when free the memory.
Use PAGE_SIZE instead of magic numbers.
Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
arch/arm/cpu/mmu.c |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index 34fe5c3..e3ea3b6 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -189,7 +189,7 @@ static int arm_mmu_remap_sdram(struct memory_bank *bank)
ptes, ttb_start, ttb_end);
for (i = 0; i num_ptes; i++) {
- ptes[i] = (phys + i * 4096) | PTE_TYPE_SMALL |
+ ptes[i] = (phys + i * PAGE_SIZE) | PTE_TYPE_SMALL |
pte_flags_cached;
}
@@ -300,7 +300,7 @@ static int mmu_init(void)
asm volatile (mcr p15,0,%0,c3,c0,0 : : r(i) /*:*/);
/* create a flat mapping using 1MiB sections */
- create_sections(0, 0, 4096, PMD_SECT_AP_WRITE | PMD_SECT_AP_READ |
+ create_sections(0, 0, PAGE_SIZE, PMD_SECT_AP_WRITE | PMD_SECT_AP_READ |
PMD_TYPE_SECT);
vectors_init();
@@ -332,7 +332,7 @@ void *dma_alloc_coherent(size_t size)
void *ret;
size = PAGE_ALIGN(size);
- ret = xmemalign(4096, size);
+ ret = xmemalign(PAGE_SIZE, size);
dma_inv_range((unsigned long)ret, (unsigned long)ret + size);
@@ -353,6 +353,7 @@ void *phys_to_virt(unsigned long phys)
void dma_free_coherent(void *mem, size_t size)
{
+ size = PAGE_ALIGN(size);
remap_range(mem, size, pte_flags_cached);
free(mem);
--
1.7.0.4
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[PATCH 2/9] ARM: at91 gpio: Fix possible null pointer dereference
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
arch/arm/mach-at91/gpio.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index c2618c7..0e39a52 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -185,10 +185,10 @@ static struct at91_pinctrl_mux_ops at91sam9x5_ops = {
int at91_mux_pin(unsigned pin, enum at91_mux mux, int use_pullup)
{
struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
- void __iomem *pio = at91_gpio-regbase;
+ void __iomem *pio;
+ struct device_d *dev;
unsigned mask = pin_to_mask(pin);
int bank = pin_to_bank(pin);
- struct device_d *dev = at91_gpio-chip.dev;
if (!at91_gpio)
return -EINVAL;
@@ -197,6 +197,7 @@ int at91_mux_pin(unsigned pin, enum at91_mux mux, int
use_pullup)
if (!pio)
return -EINVAL;
+ dev = at91_gpio-chip.dev;
at91_mux_disable_interrupt(pio, mask);
pin %= MAX_NB_GPIO_PER_BANK;
--
1.8.1.5
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[PATCH 1/9] console: Fix possible null pointer dereference
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
common/console.c | 30 +++---
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/common/console.c b/common/console.c
index beb37bd..965be03 100644
--- a/common/console.c
+++ b/common/console.c
@@ -62,23 +62,23 @@ static int console_std_set(struct device_d *dev, struct
param_d *param,
char active[4];
unsigned int flag = 0, i = 0;
- if (!val)
- dev_param_set_generic(dev, param, NULL);
-
- if (strchr(val, 'i') cdev-f_caps CONSOLE_STDIN) {
- active[i++] = 'i';
- flag |= CONSOLE_STDIN;
- }
+ if (val) {
+ if (strchr(val, 'i') cdev-f_caps CONSOLE_STDIN) {
+ active[i++] = 'i';
+ flag |= CONSOLE_STDIN;
+ }
- if (strchr(val, 'o') cdev-f_caps CONSOLE_STDOUT) {
- active[i++] = 'o';
- flag |= CONSOLE_STDOUT;
- }
+ if (strchr(val, 'o') cdev-f_caps CONSOLE_STDOUT) {
+ active[i++] = 'o';
+ flag |= CONSOLE_STDOUT;
+ }
- if (strchr(val, 'e') cdev-f_caps CONSOLE_STDERR) {
- active[i++] = 'e';
- flag |= CONSOLE_STDERR;
- }
+ if (strchr(val, 'e') cdev-f_caps CONSOLE_STDERR) {
+ active[i++] = 'e';
+ flag |= CONSOLE_STDERR;
+ }
+ } else
+ dev_param_set_generic(dev, param, NULL);
active[i] = 0;
cdev-f_active = flag;
--
1.8.1.5
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[PATCH 3/9] ARM: at91 smc: Fix possible uninitialized variable
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
arch/arm/mach-at91/sam9_smc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
index b48275e..a137da4 100644
--- a/arch/arm/mach-at91/sam9_smc.c
+++ b/arch/arm/mach-at91/sam9_smc.c
@@ -120,12 +120,12 @@ void sam9_smc_read(int id, int cs, struct sam9_smc_config
*config)
static int at91sam9_smc_probe(struct device_d *dev)
{
- int id;
+ int id = dev-id;
- if (dev-id 0) {
+ if (id 0) {
id = 0;
- } else if (dev-id 1) {
- dev_warn(dev, : id 2\n);
+ } else if (id 1) {
+ dev_warn(dev, id 1\n);
return -EIO;
}
--
1.8.1.5
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[PATCH 4/9] MCI: atmel: Fix possible null pointer dereference
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
drivers/mci/atmel_mci.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mci/atmel_mci.c b/drivers/mci/atmel_mci.c
index f032403..c5fd306 100644
--- a/drivers/mci/atmel_mci.c
+++ b/drivers/mci/atmel_mci.c
@@ -262,11 +262,13 @@ static int atmci_read_response(struct atmel_mci *host,
unsigned int stat)
{
struct mci_cmd *cmd = host-cmd;
int i;
- u32 *resp = (u32 *)cmd-response;
+ u32 *resp;
if (!cmd)
return 0;
+ resp = (u32 *)cmd-response;
+
if (stat (ATMCI_RTOE | ATMCI_DTOE)) {
dev_err(host-hw_dev, command/data timeout\n);
return -ETIMEDOUT;
--
1.8.1.5
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[PATCH 6/9] MCI: imx: Fix possible null pointer dereference
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
drivers/mci/imx.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/mci/imx.c b/drivers/mci/imx.c
index 3d9bd0d..c985964 100644
--- a/drivers/mci/imx.c
+++ b/drivers/mci/imx.c
@@ -225,12 +225,13 @@ static int mxcmci_read_response(struct mxcmci_host *host,
unsigned int stat)
{
struct mci_cmd *cmd = host-cmd;
int i;
- u32 a, b, c;
- u32 *resp = (u32 *)cmd-response;
+ u32 a, b, c, *resp;
if (!cmd)
return 0;
+ resp = (u32 *)cmd-response;
+
if (stat STATUS_TIME_OUT_RESP) {
printf(CMD TIMEOUT\n);
return -ETIMEDOUT;
--
1.8.1.5
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[PATCH 7/9] NAND: imx: Fix memory leak
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
drivers/mtd/nand/nand_imx_bbm.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/nand_imx_bbm.c b/drivers/mtd/nand/nand_imx_bbm.c
index 03961a0..135d74e 100644
--- a/drivers/mtd/nand/nand_imx_bbm.c
+++ b/drivers/mtd/nand/nand_imx_bbm.c
@@ -91,7 +91,7 @@ static void *create_bbt(struct mtd_info *mtd)
buf = malloc(mtd-writesize);
if (!buf) {
ret = -ENOMEM;
- goto out;
+ goto out2;
}
numblocks = mtd-size (chip-bbt_erase_shift - 1);
@@ -99,7 +99,7 @@ static void *create_bbt(struct mtd_info *mtd)
for (i = 0; i numblocks;) {
ret = checkbad(mtd, from, buf);
if (ret 0)
- goto out;
+ goto out1;
if (ret) {
bbt[i 3] |= 0x03 (i 0x6);
@@ -112,8 +112,11 @@ static void *create_bbt(struct mtd_info *mtd)
}
return bbt;
-out:
+
+out1:
free(buf);
+out2:
+ free(bbt);
return ERR_PTR(ret);
}
--
1.8.1.5
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[PATCH 8/9] Serial: mpc5xxx: Fix setup mode at port initialization
Signed-off-by: Alexander Shiyan shc_w...@mail.ru --- drivers/serial/serial_mpc5xxx.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/serial/serial_mpc5xxx.c b/drivers/serial/serial_mpc5xxx.c index 532eea3..ed77807 100644 --- a/drivers/serial/serial_mpc5xxx.c +++ b/drivers/serial/serial_mpc5xxx.c @@ -82,12 +82,10 @@ static int __mpc5xxx_serial_init(struct mpc5xxx_psc *psc) psc-sicr = 0; /* configure parity, bit length and so on */ + psc-mode = PSC_MODE_8_BITS | PSC_MODE_PARNONE | PSC_MODE_ONE_STOP; #if defined(CONFIG_MGT5100) - psc-mode = PSC_MODE_ERR | PSC_MODE_8_BITS | PSC_MODE_PARNONE; -#elif defined(CONFIG_MPC5200) - psc-mode = PSC_MODE_8_BITS | PSC_MODE_PARNONE; + psc-mode |= PSC_MODE_ERR; #endif - psc-mode = PSC_MODE_ONE_STOP; /* disable all interrupts */ psc-psc_imr = 0; -- 1.8.1.5 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 9/9] MCI: imx-esdhc: Remove now unneeded check
Signed-off-by: Alexander Shiyan shc_w...@mail.ru --- drivers/mci/imx-esdhc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c index 8194b4d..8133d2e 100644 --- a/drivers/mci/imx-esdhc.c +++ b/drivers/mci/imx-esdhc.c @@ -460,7 +460,7 @@ static int esdhc_init(struct mci_host *mci, struct device_d *dev) regs = host-regs; /* Enable cache snooping */ - if (host !host-no_snoop) + if (!host-no_snoop) esdhc_write32(regs-scr, 0x0040); /* Reset the entire host controller */ -- 1.8.1.5 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 3/9] ARM: at91 smc: Fix possible uninitialized variable
On 20:41 Fri 26 Apr , Alexander Shiyan wrote:
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
arch/arm/mach-at91/sam9_smc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
index b48275e..a137da4 100644
--- a/arch/arm/mach-at91/sam9_smc.c
+++ b/arch/arm/mach-at91/sam9_smc.c
@@ -120,12 +120,12 @@ void sam9_smc_read(int id, int cs, struct
sam9_smc_config *config)
static int at91sam9_smc_probe(struct device_d *dev)
{
you fix nothing here
- int id;
+ int id = dev-id;
- if (dev-id 0) {
+ if (id 0) {
id = 0;
- } else if (dev-id 1) {
- dev_warn(dev, : id 2\n);
+ } else if (id 1) {
+ dev_warn(dev, id 1\n);
return -EIO;
}
--
1.8.1.5
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Re: [PATCH 2/9] ARM: at91 gpio: Fix possible null pointer dereference
On 20:41 Fri 26 Apr , Alexander Shiyan wrote:
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
arch/arm/mach-at91/gpio.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index c2618c7..0e39a52 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -185,10 +185,10 @@ static struct at91_pinctrl_mux_ops at91sam9x5_ops = {
int at91_mux_pin(unsigned pin, enum at91_mux mux, int use_pullup)
{
struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
- void __iomem *pio = at91_gpio-regbase;
+ void __iomem *pio;
+ struct device_d *dev;
unsigned mask = pin_to_mask(pin);
int bank = pin_to_bank(pin);
- struct device_d *dev = at91_gpio-chip.dev;
so crash
if (!at91_gpio)
return -EINVAL;
@@ -197,6 +197,7 @@ int at91_mux_pin(unsigned pin, enum at91_mux mux, int
use_pullup)
if (!pio)
return -EINVAL;
+ dev = at91_gpio-chip.dev;
at91_mux_disable_interrupt(pio, mask);
pin %= MAX_NB_GPIO_PER_BANK;
--
1.8.1.5
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Re[2]: [PATCH 3/9] ARM: at91 smc: Fix possible uninitialized variable
...
arch/arm/mach-at91/sam9_smc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
index b48275e..a137da4 100644
--- a/arch/arm/mach-at91/sam9_smc.c
+++ b/arch/arm/mach-at91/sam9_smc.c
@@ -120,12 +120,12 @@ void sam9_smc_read(int id, int cs, struct
sam9_smc_config *config)
static int at91sam9_smc_probe(struct device_d *dev)
{
you fix nothing here
As far I understand, id can be 0 and 1. In case of dev-id=1, id is not set.
- int id;
+ int id = dev-id;
- if (dev-id 0) {
+ if (id 0) {
id = 0;
- } else if (dev-id 1) {
- dev_warn(dev, : id 2\n);
+ } else if (id 1) {
+ dev_warn(dev, id 1\n);
return -EIO;
}
---
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Re: [PATCH 2/9] ARM: at91 gpio: Fix possible null pointer dereference
On Fri, Apr 26, 2013 at 06:59:46PM +0200, Jean-Christophe PLAGNIOL-VILLARD
wrote:
On 20:41 Fri 26 Apr , Alexander Shiyan wrote:
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
arch/arm/mach-at91/gpio.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index c2618c7..0e39a52 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -185,10 +185,10 @@ static struct at91_pinctrl_mux_ops at91sam9x5_ops = {
int at91_mux_pin(unsigned pin, enum at91_mux mux, int use_pullup)
{
struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
- void __iomem *pio = at91_gpio-regbase;
+ void __iomem *pio;
+ struct device_d *dev;
unsigned mask = pin_to_mask(pin);
int bank = pin_to_bank(pin);
- struct device_d *dev = at91_gpio-chip.dev;
so crash
means what? the original code derefences at91_gpio...
if (!at91_gpio)
return -EINVAL;
...and then checks if at91_gpio is valid which makes no sense.
Sascha
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Re: [PATCH 3/9] ARM: at91 smc: Fix possible uninitialized variable
On Fri, Apr 26, 2013 at 09:09:16PM +0400, Alexander Shiyan wrote:
...
arch/arm/mach-at91/sam9_smc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
index b48275e..a137da4 100644
--- a/arch/arm/mach-at91/sam9_smc.c
+++ b/arch/arm/mach-at91/sam9_smc.c
@@ -120,12 +120,12 @@ void sam9_smc_read(int id, int cs, struct
sam9_smc_config *config)
static int at91sam9_smc_probe(struct device_d *dev)
{
you fix nothing here
As far I understand, id can be 0 and 1. In case of dev-id=1, id is not set.
- int id;
+ int id = dev-id;
- if (dev-id 0) {
+ if (id 0) {
id = 0;
- } else if (dev-id 1) {
- dev_warn(dev, : id 2\n);
+ } else if (id 1) {
+ dev_warn(dev, id 1\n);
Also it fixes the error message.
Sascha
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Re: [PATCH 5/9] MCI: imx-esdhc: Fix possible null pointer dereference
On Fri, Apr 26, 2013 at 08:41:10PM +0400, Alexander Shiyan wrote:
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
drivers/mci/imx-esdhc.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c
index 8c2695c..8194b4d 100644
--- a/drivers/mci/imx-esdhc.c
+++ b/drivers/mci/imx-esdhc.c
@@ -450,10 +450,15 @@ static int esdhc_card_present(struct mci_host *mci)
static int esdhc_init(struct mci_host *mci, struct device_d *dev)
{
struct fsl_esdhc_host *host = to_fsl_esdhc(mci);
- struct fsl_esdhc __iomem *regs = host-regs;
+ struct fsl_esdhc __iomem *regs;
int timeout = 1000;
int ret = 0;
+ if (!host)
+ return -EIO;
How should that happen? The mci core should not call this callback with
a NULL pointer, and if it does, there is a bug in the mci core.
Sascha
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Re: [PATCH 9/9] MCI: imx-esdhc: Remove now unneeded check
On Fri, Apr 26, 2013 at 08:41:14PM +0400, Alexander Shiyan wrote: Signed-off-by: Alexander Shiyan shc_w...@mail.ru --- drivers/mci/imx-esdhc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c index 8194b4d..8133d2e 100644 --- a/drivers/mci/imx-esdhc.c +++ b/drivers/mci/imx-esdhc.c @@ -460,7 +460,7 @@ static int esdhc_init(struct mci_host *mci, struct device_d *dev) regs = host-regs; /* Enable cache snooping */ - if (host !host-no_snoop) + if (!host-no_snoop) esdhc_write32(regs-scr, 0x0040); These lines are removed by: mci: imx-esdhc: remove cache snoop register access So we can skip this patch. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH] Fix ccxmx51 SDRAM size detection
Hi Alexander, The following hopefully fixes your boards. I'm not that happy with the solution, but I can't think of something better. Sorry for the inconvenience. Sascha ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 1/2] ARM: i.MX: Allow disabling SDRAM autodetection
Some boards setup more memory than they actually have. The real memory
size can then be detected later for example by reading a board id.
Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
arch/arm/mach-imx/esdctl.c | 14 ++
arch/arm/mach-imx/include/mach/esdctl.h | 1 +
2 files changed, 15 insertions(+)
diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
index cb57d45..e2025b3 100644
--- a/arch/arm/mach-imx/esdctl.c
+++ b/arch/arm/mach-imx/esdctl.c
@@ -39,6 +39,17 @@ struct imx_esdctl_data {
void (*add_mem)(void *esdctlbase, struct imx_esdctl_data *);
};
+static int imx_esdctl_disabled;
+
+/*
+ * Boards can disable SDRAM detection if it doesn't work for them. In
+ * this case arm_add_mem_device has to be called by board code.
+ */
+void imx_esdctl_disable(void)
+{
+ imx_esdctl_disabled = 1;
+}
+
/*
* v1 - found on i.MX1
*/
@@ -239,6 +250,9 @@ static int imx_esdctl_probe(struct device_d *dev)
if (!base)
return -ENOMEM;
+ if (imx_esdctl_disabled)
+ return 0;
+
data-add_mem(base, data);
return 0;
diff --git a/arch/arm/mach-imx/include/mach/esdctl.h
b/arch/arm/mach-imx/include/mach/esdctl.h
index 26436d9..b7219d9 100644
--- a/arch/arm/mach-imx/include/mach/esdctl.h
+++ b/arch/arm/mach-imx/include/mach/esdctl.h
@@ -136,6 +136,7 @@ void __naked __noreturn imx35_barebox_entry(uint32_t
boarddata);
void __naked __noreturn imx51_barebox_entry(uint32_t boarddata);
void __naked __noreturn imx53_barebox_entry(uint32_t boarddata);
void __naked __noreturn imx6_barebox_entry(uint32_t boarddata);
+void imx_esdctl_disable(void);
#endif
#endif /* __MACH_ESDCTL_V2_H */
--
1.8.2.rc2
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[PATCH 2/2] ARM: i.MX: ccxmx51: detect SDRAM size by board id
This partly reverts:
commit 697e02b74fddd80527e8ababba10239c83dba029
Author: Alexander Shiyan shc_w...@mail.ru
Date: Tue Jan 22 15:08:31 2013 +0400
ARM: ccmx51: Remove SDRAM size settings
This patch removes SDRAM memory size setting from board due
to auto detect last one by ESDCTL.
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
The board originally configured the SDRAM controller for the
maximum size and detected the usable SDRAM size by reading the
board id. This became broken after switching to automatic SDRAM
size detection by reading back ESDCTL values.
This patch brings back the old behaviour.
Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
arch/arm/boards/ccxmx51/ccxmx51.c | 55 --
arch/arm/boards/ccxmx51/ccxmx51.h | 1 +
arch/arm/boards/ccxmx51/lowlevel.c | 4 ++-
3 files changed, 39 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boards/ccxmx51/ccxmx51.c
b/arch/arm/boards/ccxmx51/ccxmx51.c
index a14c9bc..d20cb3b 100644
--- a/arch/arm/boards/ccxmx51/ccxmx51.c
+++ b/arch/arm/boards/ccxmx51/ccxmx51.c
@@ -46,30 +46,31 @@
#include mach/clock-imx51_53.h
#include mach/imx5.h
#include mach/revision.h
+#include mach/esdctl.h
#include ccxmx51.h
static struct ccxmx51_ident ccxmx51_ids[] = {
-/* 0x00 */ { Unknown,0, 0,
0, 0 },
-/* 0x01 */ { Not supported, 0, 0,
0, 0 },
-/* 0x02 */ { i.MX515@800MHz, Wireless, PHY, Ext. Eth, Accel, 0, 1,
1, 1 },
-/* 0x03 */ { i.MX515@800MHz, PHY, Ext. Eth, Accel, 0, 1,
1, 0 },
-/* 0x04 */ { i.MX515@600MHz, Wireless, PHY, Ext. Eth, Accel, 1, 1,
1, 1 },
-/* 0x05 */ { i.MX515@600MHz, PHY, Ext. Eth, Accel, 1, 1,
1, 0 },
-/* 0x06 */ { i.MX515@800MHz, Wireless, PHY, Accel, 0, 1,
0, 1 },
-/* 0x07 */ { i.MX515@800MHz, PHY, Accel, 0, 1,
0, 0 },
-/* 0x08 */ { i.MX515@800MHz, Wireless, PHY, Accel, 0, 1,
0, 1 },
-/* 0x09 */ { i.MX515@800MHz, PHY, Accel, 0, 1,
0, 0 },
-/* 0x0a */ { i.MX515@600MHz, Wireless, PHY, Accel, 1, 1,
0, 1 },
-/* 0x0b */ { i.MX515@600MHz, PHY, Accel, 1, 1,
0, 0 },
-/* 0x0c */ { i.MX515@800MHz, Wireless, PHY, Accel, 0, 1,
0, 1 },
-/* 0x0d */ { i.MX512@800MHz, 0, 0,
0, 0 },
-/* 0x0e */ { i.MX515@800MHz, Wireless, PHY, Accel, 0, 1,
0, 1 },
-/* 0x0f */ { i.MX515@600MHz, PHY, Accel, 1, 1,
0, 0 },
-/* 0x10 */ { i.MX515@600MHz, Wireless, PHY, Accel, 1, 1,
0, 1 },
-/* 0x11 */ { i.MX515@800MHz, PHY, Accel, 0, 1,
0, 0 },
-/* 0x12 */ { i.MX515@600MHz, Wireless, PHY, Accel, 1, 1,
0, 1 },
-/* 0x13 */ { i.MX515@800MHz, PHY, Accel, 0, 1,
0, 0 },
+/* 0x00 */ { Unknown,0,
0, 0, 0, 0 },
+/* 0x01 */ { Not supported, 0,
0, 0, 0, 0 },
+/* 0x02 */ { i.MX515@800MHz, Wireless, PHY, Ext. Eth, Accel,
SZ_512M, 0, 1, 1, 1 },
+/* 0x03 */ { i.MX515@800MHz, PHY, Ext. Eth, Accel,
SZ_512M, 0, 1, 1, 0 },
+/* 0x04 */ { i.MX515@600MHz, Wireless, PHY, Ext. Eth, Accel,
SZ_512M, 1, 1, 1, 1 },
+/* 0x05 */ { i.MX515@600MHz, PHY, Ext. Eth, Accel,
SZ_512M, 1, 1, 1, 0 },
+/* 0x06 */ { i.MX515@800MHz, Wireless, PHY, Accel,
SZ_512M, 0, 1, 0, 1 },
+/* 0x07 */ { i.MX515@800MHz, PHY, Accel,
SZ_512M, 0, 1, 0, 0 },
+/* 0x08 */ { i.MX515@800MHz, Wireless, PHY, Accel,
SZ_256M, 0, 1, 0, 1 },
+/* 0x09 */ { i.MX515@800MHz, PHY, Accel,
SZ_256M, 0, 1, 0, 0 },
+/* 0x0a */ { i.MX515@600MHz, Wireless, PHY, Accel,
SZ_256M, 1, 1, 0, 1 },
+/* 0x0b */ { i.MX515@600MHz, PHY, Accel,
SZ_256M, 1, 1, 0, 0 },
+/* 0x0c */ { i.MX515@800MHz, Wireless, PHY, Accel,
SZ_128M, 0, 1, 0, 1 },
+/* 0x0d */ { i.MX512@800MHz,
SZ_128M, 0, 0, 0, 0 },
+/* 0x0e */ { i.MX515@800MHz, Wireless, PHY, Accel,
SZ_512M, 0, 1, 0, 1 },
+/* 0x0f */ { i.MX515@600MHz, PHY, Accel,
SZ_128M, 1, 1, 0, 0 },
+/* 0x10 */ { i.MX515@600MHz, Wireless, PHY, Accel,
SZ_128M, 1, 1, 0, 1 },
+/* 0x11 */ { i.MX515@800MHz, PHY, Accel,
SZ_128M, 0, 1, 0, 0 },
+/* 0x12 */ { i.MX515@600MHz, Wireless, PHY, Accel,
SZ_512M, 1, 1, 0, 1 },
+/* 0x13 */ { i.MX515@800MHz, PHY, Accel,
SZ_512M, 0, 1, 0, 0 },
};
struct ccxmx51_ident *ccxmx51_id;
@@ -338,6 +339,18 @@
Re: [PATCH] ARM: ccxmx51: Fix OTG Host USB mode
On Fri, Apr 26, 2013 at 01:12:33PM +0400, Alexander Shiyan wrote:
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
Applied, thanks
Sascha
---
arch/arm/boards/ccxmx51/ccxmx51.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boards/ccxmx51/ccxmx51.c
b/arch/arm/boards/ccxmx51/ccxmx51.c
index a14c9bc..df565d9 100644
--- a/arch/arm/boards/ccxmx51/ccxmx51.c
+++ b/arch/arm/boards/ccxmx51/ccxmx51.c
@@ -196,7 +196,8 @@ static const struct spi_board_info
ccxmx51_spi_board_info[] = {
};
static struct imxusb_platformdata ccxmx51_otg_pdata = {
- .flags = MXC_EHCI_MODE_UTMI_16_BIT | MXC_EHCI_POWER_PINS_ENABLED,
+ .flags = MXC_EHCI_MODE_UTMI_16_BIT | MXC_EHCI_INTERNAL_PHY |
+ MXC_EHCI_POWER_PINS_ENABLED,
.mode = IMX_USB_MODE_HOST,
};
--
1.8.1.5
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Re: Re: [PATCH] ARM: OMAP5 processors support
On Fri, Apr 26, 2013 at 01:59:22PM +0300, Uladzimir Bely wrote: As an example, are there any DT-only (without machine ID) boards in barebox? basically you just don't have to call armlinux_set_architecture() Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 6/6] MCI/Core: move an ugly ifdef to the header file
On Fri, Apr 26, 2013 at 11:31:52AM +0200, Juergen Beisert wrote:
To avoid the compiler complains about an unused variable when no SPI host is
enabled, use an inline function instead of a macro.
Signed-off-by: Juergen Beisert j...@pengutronix.de
---
drivers/mci/mci-core.c | 3 +--
include/mci.h | 15 +--
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index 42e3d4b..ba7ef55 100644
--- a/drivers/mci/mci-core.c
+++ b/drivers/mci/mci-core.c
@@ -482,9 +482,8 @@ static int sd_change_freq(struct mci *mci)
{
struct mci_cmd cmd;
struct mci_data data;
-#ifdef CONFIG_MCI_SPI
struct mci_host *host = mci-host;
-#endif
+
uint32_t *switch_status = sector_buf;
uint32_t *scr = sector_buf;
int timeout;
diff --git a/include/mci.h b/include/mci.h
index cf9582d..7f514be 100644
--- a/include/mci.h
+++ b/include/mci.h
@@ -54,12 +54,6 @@
#define IS_SD(x) (x-version SD_VERSION_SD)
-#ifdef CONFIG_MCI_SPI
-#define mmc_host_is_spi(host)((host)-host_caps MMC_CAP_SPI)
-#else
-#define mmc_host_is_spi(host)0
-#endif
-
#define MMC_DATA_READ1
#define MMC_DATA_WRITE 2
@@ -330,6 +324,15 @@ struct mci {
char *ext_csd;
};
+static inline bool mmc_host_is_spi(const struct mci_host *host)
+{
+#ifdef CONFIG_MCI_SPI
+ return !!host-host_caps MMC_CAP_SPI;
negation comes before bitwise and. This always returns 0.
Also you could use IS_ENABLED().
Sascha
+#else
+ return false;
+#endif
+}
+
int mci_register(struct mci_host*);
#endif /* _MCI_H_ */
--
1.8.2.rc2
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Re: Some fixes and improvements while working with the Chumby
On Fri, Apr 26, 2013 at 11:31:46AM +0200, Juergen Beisert wrote: Below a list of some small patches for the MXS MCI driver and the MCI core. Comments are welcome. Squashed 1/6 into the commit breaking it, applied 2/6 to master, 3-5/6 to next. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH] ARM: mmu: Use PAGE_ALIGN in dma_free_coherent
On Fri, Apr 26, 2013 at 03:52:18PM +0200, Jan Weitzel wrote:
We PAGE_ALIGN the size in dma_alloc_coherent so do it also when free the
memory.
Use PAGE_SIZE instead of magic numbers.
Signed-off-by: Jan Weitzel j.weit...@phytec.de
Applied, thanks
Sascha
---
arch/arm/cpu/mmu.c |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index 34fe5c3..e3ea3b6 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -189,7 +189,7 @@ static int arm_mmu_remap_sdram(struct memory_bank *bank)
ptes, ttb_start, ttb_end);
for (i = 0; i num_ptes; i++) {
- ptes[i] = (phys + i * 4096) | PTE_TYPE_SMALL |
+ ptes[i] = (phys + i * PAGE_SIZE) | PTE_TYPE_SMALL |
pte_flags_cached;
}
@@ -300,7 +300,7 @@ static int mmu_init(void)
asm volatile (mcr p15,0,%0,c3,c0,0 : : r(i) /*:*/);
/* create a flat mapping using 1MiB sections */
- create_sections(0, 0, 4096, PMD_SECT_AP_WRITE | PMD_SECT_AP_READ |
+ create_sections(0, 0, PAGE_SIZE, PMD_SECT_AP_WRITE | PMD_SECT_AP_READ |
PMD_TYPE_SECT);
vectors_init();
@@ -332,7 +332,7 @@ void *dma_alloc_coherent(size_t size)
void *ret;
size = PAGE_ALIGN(size);
- ret = xmemalign(4096, size);
+ ret = xmemalign(PAGE_SIZE, size);
dma_inv_range((unsigned long)ret, (unsigned long)ret + size);
@@ -353,6 +353,7 @@ void *phys_to_virt(unsigned long phys)
void dma_free_coherent(void *mem, size_t size)
{
+ size = PAGE_ALIGN(size);
remap_range(mem, size, pte_flags_cached);
free(mem);
--
1.7.0.4
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Re: [PATCH] Fix ccxmx51 SDRAM size detection
The following hopefully fixes your boards. I'm not that happy with the solution, but I can't think of something better. Sorry for the inconvenience. Yes, patchset is may help here. I can test this in a few days. Unfortunately, some other boards can have an option for different memory size, so I will try to create non-destructive (and safe) algorithg to test memory as replacement of get_mem_size. Thanks. --- ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re[2]: [PATCH 5/9] MCI: imx-esdhc: Fix possible null pointer dereference
On Fri, Apr 26, 2013 at 08:41:10PM +0400, Alexander Shiyan wrote:
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
drivers/mci/imx-esdhc.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c
index 8c2695c..8194b4d 100644
--- a/drivers/mci/imx-esdhc.c
+++ b/drivers/mci/imx-esdhc.c
@@ -450,10 +450,15 @@ static int esdhc_card_present(struct mci_host *mci)
static int esdhc_init(struct mci_host *mci, struct device_d *dev)
{
struct fsl_esdhc_host *host = to_fsl_esdhc(mci);
- struct fsl_esdhc __iomem *regs = host-regs;
+ struct fsl_esdhc __iomem *regs;
int timeout = 1000;
int ret = 0;
+ if (!host)
+ return -EIO;
How should that happen? The mci core should not call this callback with
a NULL pointer, and if it does, there is a bug in the mci core.
Pls, just drop 5/9 and 9/9.
Thanks.
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