Re: [PATCH v2 1/2] of: fix up /chosen node even when there are no bootargs
On Tue, May 25, 2021 at 10:53:27AM +0200, Bastian Krause wrote: > On 4/14/21 3:00 PM, Bastian Krause wrote: > > From: Ahmad Fatoum > > > > Currently the /chosen fixups of "reset-source", > > "reset-source-instance", "reset-source-device" and "bootsource" do not > > happen if no bootargs are available. > > > > Fix that by moving the actual bootargs fixup to a dedicated function > > of_write_bootargs() and only return there early on empty bootargs, but > > still perform the /chosen fixups mentioned above. > > > > Signed-off-by: Ahmad Fatoum > > [bst: dropped new line deletions and modified string comparison, moved > > of_write_bootargs() call to original position, add commit message] > > Signed-off-by: Bastian Krause > > --- > > No changes since (implicit) v1. > > --- > > common/oftree.c | 20 +--- > > 1 file changed, 13 insertions(+), 7 deletions(-) > > Gentle ping. Sorry, missed these. Applied now, thanks Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 2/2] bootm: add support for booting compressed images
Hi Lucas,
On Tue, May 25, 2021 at 08:37:33PM +0200, Lucas Stach wrote:
> ARM64 does not have a self extracting image format, but relies on the image
> being externally compressed with one of the standard compression algorithms.
>
> Add support for decompressing the bootm OS image. It is added in common
> code as it may also be useful for other images/architectures.
>
> Signed-off-by: Lucas Stach
> ---
> common/bootm.c | 92 ++
> 1 file changed, 92 insertions(+)
>
> diff --git a/common/bootm.c b/common/bootm.c
> index 092116beb94a..2bfb5cb01593 100644
> --- a/common/bootm.c
> +++ b/common/bootm.c
> @@ -12,6 +12,7 @@
> #include
> #include
> #include
> +#include
>
> static LIST_HEAD(handler_list);
>
> @@ -808,6 +809,85 @@ err_out:
> return ret;
> }
>
> +static int do_bootm_compressed(struct image_data *img_data)
> +{
> + struct bootm_data bootm_data = {
> + .oftree_file = img_data->oftree_file,
> + .initrd_file = img_data->initrd_file,
> + .tee_file = img_data->tee_file,
> + .verbose = img_data->verbose,
> + .verify = img_data->verify,
> + .force = img_data->force,
> + .dryrun = img_data->dryrun,
> + .initrd_address = img_data->initrd_address,
> + .os_address = img_data->os_address,
> + .os_entry = img_data->os_entry,
> + };
> + int from, to, ret;
> + char *dstpath;
> +
> + from = open(img_data->os_file, O_RDONLY);
> + if (from < 0)
> + return -ENODEV;
> +
> + dstpath = make_temp("bootm-compressed");
> + if (!dstpath) {
> + ret = -ENOMEM;
> + goto fail_from;
> + }
> +
> + to = open(dstpath, O_CREAT | O_WRONLY);
> + if (to < 0) {
> + ret = -ENODEV;
> + goto fail_make_temp;
> + }
> +
> + ret = uncompress_fd_to_fd(from, to, uncompress_err_stdout);
> + if (ret)
> + goto fail_to;
> +
> + bootm_data.os_file = dstpath;
> + return bootm_boot(_data);
ret = bootm_boot();
and fall through to free the resources please. Also an unlink(dtspath)
is missing.
Sascha
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 1/3] ARM: protonic: add initial support for the Protonic PRT8MM family of boards
From: David Jander
This board is a low-cost 7" touchscreen virtual terminal for
agricultural applications.
There is no upstream Linux DT yet, so we add a minimal DT for use with the
bootloader in this patch.
Signed-off-by: David Jander
[lst: fixed and cleaned up for upstream]
Signed-off-by: Lucas Stach
---
Documentation/boards/imx/protonic-prt8mm.rst | 10 +
arch/arm/boards/Makefile |1 +
arch/arm/boards/protonic-imx8m/Makefile |3 +
arch/arm/boards/protonic-imx8m/board.c| 92 +
.../defaultenv-prt8m/network/eth0-discover|4 +
.../protonic-imx8m/flash-header-prt8mm.imxcfg |5 +
.../boards/protonic-imx8m/lowlevel-prt8mm.c | 131 ++
.../protonic-imx8m/lpddr4-timing-prt8mm.c | 1994 +
arch/arm/dts/Makefile |1 +
arch/arm/dts/imx8mm-prt8mm.dts| 251 +++
arch/arm/mach-imx/Kconfig | 10 +
images/Makefile.imx |5 +
12 files changed, 2507 insertions(+)
create mode 100644 Documentation/boards/imx/protonic-prt8mm.rst
create mode 100644 arch/arm/boards/protonic-imx8m/Makefile
create mode 100644 arch/arm/boards/protonic-imx8m/board.c
create mode 100644
arch/arm/boards/protonic-imx8m/defaultenv-prt8m/network/eth0-discover
create mode 100644 arch/arm/boards/protonic-imx8m/flash-header-prt8mm.imxcfg
create mode 100644 arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c
create mode 100644 arch/arm/boards/protonic-imx8m/lpddr4-timing-prt8mm.c
create mode 100644 arch/arm/dts/imx8mm-prt8mm.dts
diff --git a/Documentation/boards/imx/protonic-prt8mm.rst
b/Documentation/boards/imx/protonic-prt8mm.rst
new file mode 100644
index ..f8c8b2c88da0
--- /dev/null
+++ b/Documentation/boards/imx/protonic-prt8mm.rst
@@ -0,0 +1,10 @@
+Protonic Holland PRT8MM board
+=
+
+This board is a low-cost 7inch touchscreen virtual terminal for agricultural
applications.
+HW specs:
+
+* SoC: i.MX8M mini
+* RAM: 1GiB LPDDR4
+* eMMC: 16GiB
+* Display: 7inch 800x480 with capacitive touchscreen.
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 40b0af8d30b6..51f5f60857c2 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -105,6 +105,7 @@ obj-$(CONFIG_MACH_PM9261) += pm9261/
obj-$(CONFIG_MACH_PM9263) += pm9263/
obj-$(CONFIG_MACH_PM9G45) += pm9g45/
obj-$(CONFIG_MACH_PROTONIC_IMX6) += protonic-imx6/
+obj-$(CONFIG_MACH_PROTONIC_IMX8M) += protonic-imx8m/
obj-$(CONFIG_MACH_QIL_A9260) += qil-a926x/
obj-$(CONFIG_MACH_QIL_A9G20) += qil-a926x/
obj-$(CONFIG_MACH_RADXA_ROCK) += radxa-rock/
diff --git a/arch/arm/boards/protonic-imx8m/Makefile
b/arch/arm/boards/protonic-imx8m/Makefile
new file mode 100644
index ..51a27f0c2dfd
--- /dev/null
+++ b/arch/arm/boards/protonic-imx8m/Makefile
@@ -0,0 +1,3 @@
+obj-y += board.o
+lwl-y += lowlevel-prt8mm.o lpddr4-timing-prt8mm.o
+bbenv-y += defaultenv-prt8m
diff --git a/arch/arm/boards/protonic-imx8m/board.c
b/arch/arm/boards/protonic-imx8m/board.c
new file mode 100644
index ..08694068507c
--- /dev/null
+++ b/arch/arm/boards/protonic-imx8m/board.c
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: GPL-2.0-only
+// SPDX-FileCopyrightText: 2020 David Jander, Protonic Holland
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static int prt_prt8mm_init_power(void)
+{
+ struct i2c_adapter *adapter = NULL;
+ struct i2c_client client;
+ int ret;
+ char buf[2];
+
+ client.addr = 0x60;
+ adapter = i2c_get_adapter(1);
+ if (!adapter) {
+ printf("i2c bus not found\n");
+ return -ENODEV;
+ }
+ client.adapter = adapter;
+
+ buf[0] = 0xe3;
+ ret = i2c_write_reg(, 0x00, buf, 1); // VSEL0 = 0.95V, force PWM
+ if (ret < 0) {
+ printf("i2c write error\n");
+ return -ENODEV;
+ }
+ buf[0] = 0xe0;
+ ret = i2c_write_reg(, 0x01, buf, 1); // VSEL1 = 0.92V, force PWM
+ if (ret < 0) {
+ printf("i2c write error\n");
+ return -ENODEV;
+ }
+ return 0;
+}
+
+static int prt_prt8mm_probe(struct device_d *dev)
+{
+ int emmc_bbu_flag = 0;
+ int sd_bbu_flag = 0;
+
+ prt_prt8mm_init_power();
+
+ barebox_set_hostname("prt8mm");
+
+ if (bootsource_get() == BOOTSOURCE_MMC) {
+ if (bootsource_get_instance() == 2) {
+ of_device_enable_path("/chosen/environment-emmc");
+ emmc_bbu_flag = BBU_HANDLER_FLAG_DEFAULT;
+ } else {
+ of_device_enable_path("/chosen/environment-sd");
+ sd_bbu_flag = BBU_HANDLER_FLAG_DEFAULT;
+ }
+ } else {
+
[PATCH 2/3] ARM: imx_v8_defconfig: enable PRT8MM board
Signed-off-by: Lucas Stach --- arch/arm/configs/imx_v8_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/imx_v8_defconfig b/arch/arm/configs/imx_v8_defconfig index 06d79f594d5b..db097d1675b8 100644 --- a/arch/arm/configs/imx_v8_defconfig +++ b/arch/arm/configs/imx_v8_defconfig @@ -1,5 +1,6 @@ CONFIG_ARCH_IMX=y CONFIG_IMX_MULTI_BOARDS=y +CONFIG_MACH_PROTONIC_IMX8M=y CONFIG_MACH_ZII_IMX8MQ_DEV=y CONFIG_MACH_NXP_IMX8MM_EVK=y CONFIG_MACH_NXP_IMX8MP_EVK=y -- 2.29.2 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 3/3] ARM: imx_v8_defconfig: enable EHCI
The i.MX8MM USB host controller uses the standard EHCI interface. Enable support in the defconfig to make this work out of the box. Signed-off-by: Lucas Stach --- arch/arm/configs/imx_v8_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/imx_v8_defconfig b/arch/arm/configs/imx_v8_defconfig index db097d1675b8..e1e7b0f91e67 100644 --- a/arch/arm/configs/imx_v8_defconfig +++ b/arch/arm/configs/imx_v8_defconfig @@ -105,6 +105,7 @@ CONFIG_MTD_DATAFLASH=y CONFIG_MTD_M25P80=y CONFIG_USB_HOST=y CONFIG_USB_IMX_CHIPIDEA=y +CONFIG_USB_EHCI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_SERIAL=y -- 2.29.2 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 2/2] bootm: add support for booting compressed images
ARM64 does not have a self extracting image format, but relies on the image
being externally compressed with one of the standard compression algorithms.
Add support for decompressing the bootm OS image. It is added in common
code as it may also be useful for other images/architectures.
Signed-off-by: Lucas Stach
---
common/bootm.c | 92 ++
1 file changed, 92 insertions(+)
diff --git a/common/bootm.c b/common/bootm.c
index 092116beb94a..2bfb5cb01593 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
static LIST_HEAD(handler_list);
@@ -808,6 +809,85 @@ err_out:
return ret;
}
+static int do_bootm_compressed(struct image_data *img_data)
+{
+ struct bootm_data bootm_data = {
+ .oftree_file = img_data->oftree_file,
+ .initrd_file = img_data->initrd_file,
+ .tee_file = img_data->tee_file,
+ .verbose = img_data->verbose,
+ .verify = img_data->verify,
+ .force = img_data->force,
+ .dryrun = img_data->dryrun,
+ .initrd_address = img_data->initrd_address,
+ .os_address = img_data->os_address,
+ .os_entry = img_data->os_entry,
+ };
+ int from, to, ret;
+ char *dstpath;
+
+ from = open(img_data->os_file, O_RDONLY);
+ if (from < 0)
+ return -ENODEV;
+
+ dstpath = make_temp("bootm-compressed");
+ if (!dstpath) {
+ ret = -ENOMEM;
+ goto fail_from;
+ }
+
+ to = open(dstpath, O_CREAT | O_WRONLY);
+ if (to < 0) {
+ ret = -ENODEV;
+ goto fail_make_temp;
+ }
+
+ ret = uncompress_fd_to_fd(from, to, uncompress_err_stdout);
+ if (ret)
+ goto fail_to;
+
+ bootm_data.os_file = dstpath;
+ return bootm_boot(_data);
+
+fail_to:
+ close(to);
+fail_make_temp:
+ free(dstpath);
+fail_from:
+ close(from);
+ return ret;
+}
+
+static struct image_handler bzip2_bootm_handler = {
+ .name = "BZIP2 compressed file",
+ .bootm = do_bootm_compressed,
+ .filetype = filetype_bzip2,
+};
+
+static struct image_handler gzip_bootm_handler = {
+ .name = "GZIP compressed file",
+ .bootm = do_bootm_compressed,
+ .filetype = filetype_gzip,
+};
+
+static struct image_handler lzo_bootm_handler = {
+ .name = "LZO compressed file",
+ .bootm = do_bootm_compressed,
+ .filetype = filetype_lzo_compressed,
+};
+
+static struct image_handler lz4_bootm_handler = {
+ .name = "LZ4 compressed file",
+ .bootm = do_bootm_compressed,
+ .filetype = filetype_lz4_compressed,
+};
+
+static struct image_handler xz_bootm_handler = {
+ .name = "XZ compressed file",
+ .bootm = do_bootm_compressed,
+ .filetype = filetype_xz_compressed,
+};
+
static int bootm_init(void)
{
globalvar_add_simple("bootm.image", NULL);
@@ -830,6 +910,18 @@ static int bootm_init(void)
globalvar_add_simple_enum("bootm.verify", (unsigned int
*)_verify_mode,
bootm_verify_names,
ARRAY_SIZE(bootm_verify_names));
+
+ if (IS_ENABLED(CONFIG_BZLIB))
+ register_image_handler(_bootm_handler);
+ if (IS_ENABLED(CONFIG_ZLIB))
+ register_image_handler(_bootm_handler);
+ if (IS_ENABLED(CONFIG_LZO_DECOMPRESS))
+ register_image_handler(_bootm_handler);
+ if (IS_ENABLED(CONFIG_LZ4_DECOMPRESS))
+ register_image_handler(_bootm_handler);
+ if (IS_ENABLED(CONFIG_XZ_DECOMPRESS))
+ register_image_handler(_bootm_handler);
+
return 0;
}
late_initcall(bootm_init);
--
2.29.2
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 1/2] uncompress: use read_full to fill decompression buffer
The decompression algorithms want all of the requested buffer size
to be filled and don't cope with less bytes being returned.
Use read_full to satisfy this requirement.
Signed-off-by: Lucas Stach
---
lib/uncompress.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/lib/uncompress.c b/lib/uncompress.c
index c47d319dbb5f..5c0d1e9f4d66 100644
--- a/lib/uncompress.c
+++ b/lib/uncompress.c
@@ -24,6 +24,7 @@
#include
#include
#include
+#include
static void *uncompress_buf;
static unsigned int uncompress_size;
@@ -142,7 +143,7 @@ static int uncompress_infd, uncompress_outfd;
static int fill_fd(void *buf, unsigned int len)
{
- return read(uncompress_infd, buf, len);
+ return read_full(uncompress_infd, buf, len);
}
static int flush_fd(void *buf, unsigned int len)
--
2.29.2
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH v3 01/10] clocksource: timer-riscv: select CSR from device tree
Hi,
On 25.05.21 09:19, Antony Pavlov wrote:
> barebox timer-riscv driver supports one of user counters:
>
> * 'cycle', counter for RDCYCLE instruction (CSR 0xc00);
> * 'time', timer for RDTIME instruction (CSR 0xc01).
>
> At the moment in M-mode timer-riscv uses the 'cycle' counter,
> and in S-mode timer-riscv uses the 'time' timer.
>
> Alas picorv32 CPU core supports only the 'cycle' counter.
> VexRiscV CPU core in M-mode supports only the 'time' timer.
>
> This patch makes it possible to use the 'time' timer
> for VexRiscV CPU in M-mode.
It also changes the default for M-Mode from cycle to time.
I can't comment on whether this is ok, I just copied the logic
from Linux.
>
> Signed-off-by: Antony Pavlov
> ---
> arch/riscv/dts/erizo.dtsi | 2 ++
> drivers/clocksource/timer-riscv.c | 24
> 2 files changed, 14 insertions(+), 12 deletions(-)
>
> diff --git a/arch/riscv/dts/erizo.dtsi b/arch/riscv/dts/erizo.dtsi
> index 228711bd69..4eb92ae6f1 100644
> --- a/arch/riscv/dts/erizo.dtsi
> +++ b/arch/riscv/dts/erizo.dtsi
> @@ -22,6 +22,8 @@
>
> timebase-frequency = <2400>;
>
> + barebox,csr-cycle;
> +
> cpu@0 {
> device_type = "cpu";
> compatible = "cliffordwolf,picorv32", "riscv";
> diff --git a/drivers/clocksource/timer-riscv.c
> b/drivers/clocksource/timer-riscv.c
> index cbbe18d9a6..305d1ecea0 100644
> --- a/drivers/clocksource/timer-riscv.c
> +++ b/drivers/clocksource/timer-riscv.c
> @@ -12,9 +12,8 @@
> #include
> #include
> #include
> -#include
>
> -static u64 notrace riscv_timer_get_count_sbi(void)
> +static u64 notrace riscv_timer_get_count_time(void)
> {
> __maybe_unused u32 hi, lo;
>
> @@ -29,7 +28,7 @@ static u64 notrace riscv_timer_get_count_sbi(void)
> return ((u64)hi << 32) | lo;
> }
>
> -static u64 notrace riscv_timer_get_count_rdcycle(void)
> +static u64 notrace riscv_timer_get_count_cycle(void)
> {
> __maybe_unused u32 hi, lo;
>
> @@ -44,24 +43,25 @@ static u64 notrace riscv_timer_get_count_rdcycle(void)
> return ((u64)hi << 32) | lo;
> }
>
> -static u64 notrace riscv_timer_get_count(void)
> -{
> - if (riscv_mode() == RISCV_S_MODE)
> - return riscv_timer_get_count_sbi();
> - else
> - return riscv_timer_get_count_rdcycle();
> -}
> -
> static struct clocksource riscv_clocksource = {
> - .read = riscv_timer_get_count,
> .mask = CLOCKSOURCE_MASK(64),
> .priority = 100,
> };
>
> static int riscv_timer_init(struct device_d* dev)
> {
> + struct device_node *cpu;
> +
> dev_info(dev, "running at %lu Hz\n", riscv_timebase);
>
> + cpu = of_find_node_by_path("/cpus");
> +
> + if (of_property_read_bool(cpu, "barebox,csr-cycle")) {
> + riscv_clocksource.read = riscv_timer_get_count_cycle;
> + } else {
> + riscv_clocksource.read = riscv_timer_get_count_time;
> + }
> +
> riscv_clocksource.mult = clocksource_hz2mult(riscv_timebase,
> riscv_clocksource.shift);
>
> return init_clock(_clocksource);
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH v3 05/10] litex serial: add setbrg callback
Hello Antony,
On 25.05.21 09:36, Antony Pavlov wrote:
> On Tue, 25 May 2021 10:19:47 +0300
> Antony Pavlov wrote:
>
> Hi all!
>
>
>> From: Marek Czerski
>>
>> setbrg callback (set baudrate) is needed by the loadx/loady commands.
>> Because litex serial has fixed baudrate the callback only checks if
>> the requested baudrate is the same as the CONFIG_BAUDRATE.
>> ---
>> drivers/serial/serial_litex.c | 9 -
>> 1 file changed, 8 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/serial/serial_litex.c b/drivers/serial/serial_litex.c
>> index 8562a45ecc..9d35a6e44a 100644
>> --- a/drivers/serial/serial_litex.c
>> +++ b/drivers/serial/serial_litex.c
>> @@ -58,6 +58,13 @@ static int litex_serial_tstc(struct console_device *cdev)
>> return !litex_serial_readb(cdev, UART_RXEMPTY);
>> }
>>
>> +static int litex_setial_setbaudrate(struct console_device *cdev, int
>> baudrate)
>> +{
>> +if (baudrate != CONFIG_BAUDRATE)
>> +return -EINVAL;
>> +return 0;
>> +}
>> +
>
> I have sent this patch separately because it need special attention.
>
> LiteX serial port hardware has fixed baudrate and setbaudrate has no sence.
> On the other hand absent setnbaudrate() litex serial makes impossible
> to use Y-modem data trasfer.
>
> I don't like CONFIG_BAUDRATE here. Can we use
>
> if (baudrate != cdev->baudrate)
> return -EINVAL;
> return 0;
>
> instead?
>
> Please comment!
There are other consoles (efi, linux, virtio) that don't support baud rate
setting either, so I think it makes sense to solve this outside of the
individual console drivers.
One way to go about it is move
if (cdev->baudrate == baudrate)
return 0;
in common/console.c up. Then setting baud rate to the preconfigured value
would succeed everywhere.
> To: Ahmad
> It looks like CONFIG_BAUDRATE is a one more global defconfig parameter
> that complicates "one defconfig for all RISC-V boards" approach.
It's not a deal breaker, users can still use the environment for fine-grained
configuration of the baud rate on a per board basis if they indeed want to
ship the same barebox configuration for LiteX and something else.
The idea of one-defconfig-for-all is that we don't introduce unneeded mutually-
exclusive configurations. This is not the case here.
(I know I still owe you some patches, I will try to get those sent out soon-ish)
Cheers,
Ahmad
>
> P.S. There is typo in litex_seTial_setbaudrate name. I have noted just now.
> It should be fixed of cause.
>
>
>> static int litex_serial_probe(struct device_d *dev)
>> {
>> struct resource *iores;
>> @@ -73,7 +80,7 @@ static int litex_serial_probe(struct device_d *dev)
>> cdev->tstc = _serial_tstc;
>> cdev->putc = _serial_putc;
>> cdev->getc = _serial_getc;
>> -cdev->setbrg = NULL;
>> +cdev->setbrg = _setial_setbaudrate;
>>
>> console_register(cdev);
>>
>> --
>> 2.31.1
>>
>
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 1/4] commands: mount: replace printf by pr_info
On 25.05.21 10:42, Marco Felsch wrote:
> On 21-05-25 07:15, Sascha Hauer wrote:
>> On Fri, May 21, 2021 at 06:34:32PM +0200, Marco Felsch wrote:
>>> This allows us to control the output behaviour e.g. booting silently
>>> to improve boot time.
>>>
>>> Signed-off-by: Marco Felsch
>>> ---
>>> commands/mount.c | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/commands/mount.c b/commands/mount.c
>>> index ff1d8bc5e5..bb2d1d60f4 100644
>>> --- a/commands/mount.c
>>> +++ b/commands/mount.c
>>> @@ -74,7 +74,7 @@ static int do_mount(int argc, char *argv[])
>>> if (IS_ERR(path))
>>> return PTR_ERR(path);
>>>
>>> - printf("mounted /dev/%s on %s\n", devstr, path);
>>> + pr_info("mounted /dev/%s on %s\n", devstr, path);
>>
>> Applied all except this one. This is the output from the mount command
>> and as such it should be printed with printf.
>
> Okay, just out of curiosity. Why should we avoid pr_*() for commands?
One thing that comes to mind: pr_ goes into log (and then into pstore),
printf doesn't.
>> I have no good idea to quiesce such output as we don't have any output
>> redirection. Maybe we need an additional control knob for printf output.
>
> This would be cool :)
I've patches lying around for $(cmd) which would capture the output,
but not print it directly if you don't echo it out. Would that help
you?
Cheers,
Ahmad
>
> Regards,
> Marco
>
> ___
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH v2] ARM: i.MX: sabresd: Add support for i.MX6QP board variant
On 4/22/21 5:14 PM, Bastian Krause wrote:
> On 4/15/21 5:31 PM, Lucas Stach wrote:
>> Am Donnerstag, dem 15.04.2021 um 17:12 +0200 schrieb Sascha Hauer:
>>> On Thu, Apr 15, 2021 at 04:59:30PM +0200, Lucas Stach wrote:
Am Donnerstag, dem 15.04.2021 um 16:03 +0200 schrieb Sascha Hauer:
> The SabreSD comes with different SoC variants. This patch adds support
> for the i.MX6QP based board. the DCD data has been taken from U-Boot
> 2021.04
>
> Signed-off-by: Sascha Hauer
> ---
>
[...]
> new file mode 100644
> index 00..52cc8aa73b
> --- /dev/null
> +++ b/arch/arm/dts/imx6qp-sabresd.dts
> @@ -0,0 +1,42 @@
> +/*
> + * Copyright 2012 Freescale Semiconductor, Inc.
> + * Copyright 2011 Linaro Ltd.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +
> +#include
> +
> +/ {
> + model = "Freescale i.MX6 Quad SABRE Smart Device Board";
> + compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
I'm not sure I like this overwriting of the compatible string. AFAICS
we don't have any instances for "fsl,imx6qp" compatible checks in
either Barebox or Linux kernel, so it shouldn't cause any immediate
damage, but this still feels wrong.
>>>
>>> It's overwritten with the same strings as the included upstream dts has.
>>> Anyway, as you say overwriting them here seems wrong. I removed it.
>>
>> You had me confused for bit here, so I just checked and the compatible
>> in the included upstream dts is different, as expected:
>>
>> compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp";
>>
>> So now that you removed those lines, does you board file need fixing
>> for the different compatibles?
>
> My board works fine (bootspec-wise) with the dropped compatible.
What's the state of this patch, Sascha?
Regards,
Bastian
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH v2 2/2] of: introduce global.linux.bootargs_append
On 4/14/21 3:00 PM, Bastian Krause wrote:
> From: Ahmad Fatoum
>
> By default, barebox overwrites the bootargs in the oftree if it itself
> has any. Make this behavior configurable by adding a new global
> variable.
>
> The new global variable allows either appending barebox' bootargs to the
> original oftree bootargs (global.linux.bootargs_append=1) or overwriting
> the original oftree bootargs (global.linux.bootargs_append=0) as before.
> The default is to overwrite the original bootargs.
>
> Signed-off-by: Ahmad Fatoum
> [bst: dropped a new line removal, extend commit message]
> Signed-off-by: Bastian Krause
> ---
> Changes since (implicit) v1:
> - use global.linux.bootargs_append instead of
> global.linux.bootargs_overwrite
> - since the meaning is the other way around now, change the default and
> the check in of_write_bootargs()
> ---
> common/oftree.c | 22 +-
> 1 file changed, 21 insertions(+), 1 deletion(-)
Gentle ping.
>
> diff --git a/common/oftree.c b/common/oftree.c
> index a8e6587a61..ad2eff362d 100644
> --- a/common/oftree.c
> +++ b/common/oftree.c
> @@ -16,6 +16,7 @@
> #include
> #include
> #include
> +#include
>
> #define MAX_LEVEL32 /* how deeply nested we will go */
>
> @@ -161,9 +162,14 @@ static void watchdog_build_bootargs(struct watchdog
> *watchdog, struct device_nod
> free(buf);
> }
>
> +static int bootargs_append = 0;
> +BAREBOX_MAGICVAR(global.linux.bootargs_append, "append to original oftree
> bootargs");
> +
> static int of_write_bootargs(struct device_node *node)
> {
> const char *str;
> + char *buf = NULL;
> + int ret;
>
> if (IS_ENABLED(CONFIG_SYSTEMD_OF_WATCHDOG))
> watchdog_build_bootargs(boot_get_enabled_watchdog(),
> of_get_parent(node));
> @@ -176,7 +182,20 @@ static int of_write_bootargs(struct device_node *node)
> if (strlen(str) == 0)
> return 0;
>
> - return of_property_write_string(node, "bootargs", str);
> + if (bootargs_append) {
> + const char *oldstr;
> +
> + ret = of_property_read_string(node, "bootargs", );
> + if (!ret) {
> + str = buf = basprintf("%s %s", oldstr, str);
> + if (!buf)
> + return -ENOMEM;
> + }
> + }
> +
> + ret = of_property_write_string(node, "bootargs", str);
> + free(buf);
> + return ret;
> }
>
> static int of_fixup_bootargs(struct device_node *root, void *unused)
> @@ -218,6 +237,7 @@ static int of_fixup_bootargs(struct device_node *root,
> void *unused)
>
> static int of_register_bootargs_fixup(void)
> {
> + globalvar_add_simple_bool("linux.bootargs_append", _append);
> return of_register_fixup(of_fixup_bootargs, NULL);
> }
> late_initcall(of_register_bootargs_fixup);
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH v2 1/2] of: fix up /chosen node even when there are no bootargs
On 4/14/21 3:00 PM, Bastian Krause wrote:
> From: Ahmad Fatoum
>
> Currently the /chosen fixups of "reset-source",
> "reset-source-instance", "reset-source-device" and "bootsource" do not
> happen if no bootargs are available.
>
> Fix that by moving the actual bootargs fixup to a dedicated function
> of_write_bootargs() and only return there early on empty bootargs, but
> still perform the /chosen fixups mentioned above.
>
> Signed-off-by: Ahmad Fatoum
> [bst: dropped new line deletions and modified string comparison, moved
> of_write_bootargs() call to original position, add commit message]
> Signed-off-by: Bastian Krause
> ---
> No changes since (implicit) v1.
> ---
> common/oftree.c | 20 +---
> 1 file changed, 13 insertions(+), 7 deletions(-)
Gentle ping.
>
> diff --git a/common/oftree.c b/common/oftree.c
> index 075b9d6b8b..a8e6587a61 100644
> --- a/common/oftree.c
> +++ b/common/oftree.c
> @@ -161,16 +161,12 @@ static void watchdog_build_bootargs(struct watchdog
> *watchdog, struct device_nod
> free(buf);
> }
>
> -static int of_fixup_bootargs(struct device_node *root, void *unused)
> +static int of_write_bootargs(struct device_node *node)
> {
> - struct device_node *node;
> const char *str;
> - int err;
> - int instance = reset_source_get_instance();
> - struct device_d *dev;
>
> if (IS_ENABLED(CONFIG_SYSTEMD_OF_WATCHDOG))
> - watchdog_build_bootargs(boot_get_enabled_watchdog(), root);
> + watchdog_build_bootargs(boot_get_enabled_watchdog(),
> of_get_parent(node));
>
> str = linux_bootargs_get();
> if (!str)
> @@ -180,13 +176,23 @@ static int of_fixup_bootargs(struct device_node *root,
> void *unused)
> if (strlen(str) == 0)
> return 0;
>
> + return of_property_write_string(node, "bootargs", str);
> +}
> +
> +static int of_fixup_bootargs(struct device_node *root, void *unused)
> +{
> + struct device_node *node;
> + int err;
> + int instance = reset_source_get_instance();
> + struct device_d *dev;
> +
> node = of_create_node(root, "/chosen");
> if (!node)
> return -ENOMEM;
>
> of_property_write_string(node, "barebox-version", release_string);
>
> - err = of_property_write_string(node, "bootargs", str);
> + err = of_write_bootargs(node);
> if (err)
> return err;
>
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH v3 09/10] RISC-V: add LiteX SoC and linux-on-litex-vexriscv support
On Tue, 25 May 2021 09:47:05 +0200 Jan Lübbe wrote: > On Tue, 2021-05-25 at 10:19 +0300, Antony Pavlov wrote: > > LiteX is a Migen-based System on Chip, supporting softcore > > VexRiscv CPU, a 32-bits Linux Capable RISC-V CPU. > > > > See https://github.com/enjoy-digital/litex and > > https://github.com/litex-hub/linux-on-litex-vexriscv > > for details. > > What are your steps for testing this? We have a few ECPIX-5 here, so we should > be able to reproduce this. I use Digilent Arty A7-35T. Here is listex start banner: __ _ __ _ __ / / (_) / | |/_/ / /__/ / __/ -_)> < //_/\__/\__/_/|_| Build your hardware, easily! (c) Copyright 2012-2020 Enjoy-Digital (c) Copyright 2007-2015 M-Labs BIOS built on Mar 26 2021 11:00:44 BIOS CRC passed (3dce0a07) Migen git sha1: 3ffd64c LiteX git sha1: 58701cc4 --=== SoC ==-- CPU:VexRiscv SMP-LINUX @ 100MHz BUS:WISHBONE 32-bit @ 4GiB CSR:32-bit data ROM:64KiB SRAM: 8KiB L2: 0KiB SDRAM: 262144KiB 16-bit @ 800MT/s (CL-6 CWL-5) Here are my steps to run barebox: 1. compile barebox/images/barebox-litex-linux.img; 2. set up your tftp-server (192.168.8.100); connect Arty board via ethernet to tftp-server; 3. copy barebox-litex-linux.img to boot.bin in your tftp-server root dir; 4. burn litex bitstream into FPGA; Litex bios will try to boot from tftp: --== Boot ==-- Booting from serial... Press Q or ESC to abort boot completely. sL5DdSMmkekro Timeout Booting from flash... Error: Invalid image length 0x Booting from SDCard in SD-Mode... Booting from boot.json... Booting from boot.bin... SDCard boot failed. Booting from network... Local IP: 192.168.8.50 Remote IP: 192.168.8.100 Booting from boot.json... Booting from boot.bin... Copying boot.bin to 0x4000... (515567 bytes) Executing booted program at 0x4000 --= Liftoff! ===-- >riscv-timer riscv-timer: running at 1 Hz Switch to console [cs0] barebox 2021.05.0-00097-g95181d249a-dirty #1 Tue May 25 10:16:07 MSK 2021 Board: LiteX VexRiscV-SoC-Linux riscv-timer riscv-timer: running at 1 Hz eth0: got preset MAC address: d8:89:f0:4e:00:10 mdio_bus: miibus0: probed liteeth f0009000@f0009000.of: liteeth driver registered m25p80 w25q128@00: n25q128a13 (16384 Kbytes) netconsole: registered as netconsole-1 malloc space: 0x4eeffc80 -> 0x4fdffc7f (size 15 MiB) Hit any to stop autoboot:2 barebox@LiteX VexRiscV-SoC-Linux:/ > > Regards, > Jan > > > Signed-off-by: Antony Pavlov > > --- > > arch/riscv/Kconfig.socs | 14 +++ > > arch/riscv/boards/Makefile | 1 + > > arch/riscv/boards/litex-linux/Makefile | 3 + > > arch/riscv/boards/litex-linux/lowlevel.c | 22 > > arch/riscv/dts/Makefile | 1 + > > arch/riscv/dts/litex-linux.dts | 92 + > > arch/riscv/dts/litex_soc_linux.dtsi | 49 + > > arch/riscv/include/asm/debug_ll.h| 3 + > > arch/riscv/include/asm/debug_ll_litex.h | 123 +++ > > common/Kconfig | 4 + > > images/Makefile.riscv| 4 + > > 11 files changed, 316 insertions(+) > > > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs > > index 67d19caeb3..3ae66776f0 100644 > > --- a/arch/riscv/Kconfig.socs > > +++ b/arch/riscv/Kconfig.socs > > @@ -42,4 +42,18 @@ config BOARD_HIFIVE > > > > > > > > > > endif > > > > > > > > > > +config SOC_LITEX > > + bool "LiteX SoCs" > > + depends on ARCH_RV32I > > + select HAS_ASM_DEBUG_LL > > + select HAS_NMON > > + select USE_COMPRESSED_DTB > > + select RISCV_TIMER > > + > > +config BOARD_LITEX_LINUX > > + bool "litex linux board" > > + depends on SOC_LITEX > > + select RISCV_M_MODE > > + def_bool y > > + > > endmenu > > diff --git a/arch/riscv/boards/Makefile b/arch/riscv/boards/Makefile > > index 99f22f32b4..0468871fde 100644 > > --- a/arch/riscv/boards/Makefile > > +++ b/arch/riscv/boards/Makefile > > @@ -1,3 +1,4 @@ > > # SPDX-License-Identifier: GPL-2.0 > > obj-$(CONFIG_BOARD_ERIZO_GENERIC) += erizo/ > > obj-$(CONFIG_BOARD_HIFIVE) += hifive/ > > +obj-$(CONFIG_BOARD_LITEX_LINUX)+= litex-linux/ > > diff --git a/arch/riscv/boards/litex-linux/Makefile > > b/arch/riscv/boards/litex-linux/Makefile > > new file mode 100644 > > index 00..3d217ffe0b > > --- /dev/null > > +++ b/arch/riscv/boards/litex-linux/Makefile > > @@ -0,0 +1,3 @@ > > +# SPDX-License-Identifier: GPL-2.0 > > + > > +pbl-y += lowlevel.o > > diff --git a/arch/riscv/boards/litex-linux/lowlevel.c > > b/arch/riscv/boards/litex-linux/lowlevel.c > > new file mode 100644 > > index 00..da23ef5633 > > --- /dev/null > > +++ b/arch/riscv/boards/litex-linux/lowlevel.c > > @@ -0,0 +1,22 @@ > > +//
Re: [PATCH 1/4] commands: mount: replace printf by pr_info
On 21-05-25 07:15, Sascha Hauer wrote:
> On Fri, May 21, 2021 at 06:34:32PM +0200, Marco Felsch wrote:
> > This allows us to control the output behaviour e.g. booting silently
> > to improve boot time.
> >
> > Signed-off-by: Marco Felsch
> > ---
> > commands/mount.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/commands/mount.c b/commands/mount.c
> > index ff1d8bc5e5..bb2d1d60f4 100644
> > --- a/commands/mount.c
> > +++ b/commands/mount.c
> > @@ -74,7 +74,7 @@ static int do_mount(int argc, char *argv[])
> > if (IS_ERR(path))
> > return PTR_ERR(path);
> >
> > - printf("mounted /dev/%s on %s\n", devstr, path);
> > + pr_info("mounted /dev/%s on %s\n", devstr, path);
>
> Applied all except this one. This is the output from the mount command
> and as such it should be printed with printf.
Okay, just out of curiosity. Why should we avoid pr_*() for commands?
> I have no good idea to quiesce such output as we don't have any output
> redirection. Maybe we need an additional control knob for printf output.
This would be cool :)
Regards,
Marco
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH v3 09/10] RISC-V: add LiteX SoC and linux-on-litex-vexriscv support
On Tue, 2021-05-25 at 10:19 +0300, Antony Pavlov wrote:
> LiteX is a Migen-based System on Chip, supporting softcore
> VexRiscv CPU, a 32-bits Linux Capable RISC-V CPU.
>
> See https://github.com/enjoy-digital/litex and
> https://github.com/litex-hub/linux-on-litex-vexriscv
> for details.
What are your steps for testing this? We have a few ECPIX-5 here, so we should
be able to reproduce this.
Regards,
Jan
> Signed-off-by: Antony Pavlov
> ---
> arch/riscv/Kconfig.socs | 14 +++
> arch/riscv/boards/Makefile | 1 +
> arch/riscv/boards/litex-linux/Makefile | 3 +
> arch/riscv/boards/litex-linux/lowlevel.c | 22
> arch/riscv/dts/Makefile | 1 +
> arch/riscv/dts/litex-linux.dts | 92 +
> arch/riscv/dts/litex_soc_linux.dtsi | 49 +
> arch/riscv/include/asm/debug_ll.h| 3 +
> arch/riscv/include/asm/debug_ll_litex.h | 123 +++
> common/Kconfig | 4 +
> images/Makefile.riscv| 4 +
> 11 files changed, 316 insertions(+)
>
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 67d19caeb3..3ae66776f0 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -42,4 +42,18 @@ config BOARD_HIFIVE
>
>
>
>
> endif
>
>
>
>
> +config SOC_LITEX
> + bool "LiteX SoCs"
> + depends on ARCH_RV32I
> + select HAS_ASM_DEBUG_LL
> + select HAS_NMON
> + select USE_COMPRESSED_DTB
> + select RISCV_TIMER
> +
> +config BOARD_LITEX_LINUX
> + bool "litex linux board"
> + depends on SOC_LITEX
> + select RISCV_M_MODE
> + def_bool y
> +
> endmenu
> diff --git a/arch/riscv/boards/Makefile b/arch/riscv/boards/Makefile
> index 99f22f32b4..0468871fde 100644
> --- a/arch/riscv/boards/Makefile
> +++ b/arch/riscv/boards/Makefile
> @@ -1,3 +1,4 @@
> # SPDX-License-Identifier: GPL-2.0
> obj-$(CONFIG_BOARD_ERIZO_GENERIC)+= erizo/
> obj-$(CONFIG_BOARD_HIFIVE) += hifive/
> +obj-$(CONFIG_BOARD_LITEX_LINUX) += litex-linux/
> diff --git a/arch/riscv/boards/litex-linux/Makefile
> b/arch/riscv/boards/litex-linux/Makefile
> new file mode 100644
> index 00..3d217ffe0b
> --- /dev/null
> +++ b/arch/riscv/boards/litex-linux/Makefile
> @@ -0,0 +1,3 @@
> +# SPDX-License-Identifier: GPL-2.0
> +
> +pbl-y += lowlevel.o
> diff --git a/arch/riscv/boards/litex-linux/lowlevel.c
> b/arch/riscv/boards/litex-linux/lowlevel.c
> new file mode 100644
> index 00..da23ef5633
> --- /dev/null
> +++ b/arch/riscv/boards/litex-linux/lowlevel.c
> @@ -0,0 +1,22 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +
> +#include
> +#include
> +#include
> +#include
> +
> +ENTRY_FUNCTION(start_litex_linux, a0, a1, a2)
> +{
> + extern char __dtb_z_litex_linux_start[];
> + void *fdt;
> +
> + barebox_nmon_entry();
> +
> + putc_ll('>');
> +
> + /* On POR, we are running from read-only memory here. */
> +
> + fdt = __dtb_z_litex_linux_start + get_runtime_offset();
> +
> + barebox_riscv_machine_entry(0x4000, SZ_256M, fdt);
> +}
> diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
> index 17fdc9445b..683038189f 100644
> --- a/arch/riscv/dts/Makefile
> +++ b/arch/riscv/dts/Makefile
> @@ -7,5 +7,6 @@ obj- += dummy.o
> pbl-$(CONFIG_BOARD_ERIZO_GENERIC) += erizo-generic.dtb.o
> pbl-$(CONFIG_BOARD_HIFIVE) += hifive-unmatched-a00.dtb.o \
> hifive-unleashed-a00.dtb.o
> +pbl-$(CONFIG_BOARD_LITEX_LINUX) += litex-linux.dtb.o
>
>
>
>
> clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts
> diff --git a/arch/riscv/dts/litex-linux.dts b/arch/riscv/dts/litex-linux.dts
> new file mode 100644
> index 00..d21fa57e30
> --- /dev/null
> +++ b/arch/riscv/dts/litex-linux.dts
> @@ -0,0 +1,92 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +
> +#include "litex_soc_linux.dtsi"
> +
> +#include
> +
> +/ {
> + model = "LiteX VexRiscV-SoC-Linux";
> + compatible = "litex,vexriscv-soc-linux";
> +
> + aliases {
> + rom =
> + sram =
> + };
> +
> + /* ARTY board */
> + rom: rom@ {
> + compatible = "mmio-sram";
> + reg = <0x 0x8000>;
> + read-only;
> + };
> +
> + sram: sram@2000 {
> + compatible = "mmio-sram";
> + reg = <0x2000 0x4000>;
> + };
> +
> + main_ram: memory@4000 {
> + device_type = "memory";
> + reg = <0x4000 0x1000>;
> + };
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> +
> + spiflash: w25q128@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "winbond,w25q128", "jedec,spi-nor";
> + spi-max-frequency = <10400>;
> + reg = <0>;
> + };
> +};
> +
> +/ {
> +
Re: [PATCH v3 05/10] litex serial: add setbrg callback
On Tue, 25 May 2021 10:19:47 +0300
Antony Pavlov wrote:
Hi all!
> From: Marek Czerski
>
> setbrg callback (set baudrate) is needed by the loadx/loady commands.
> Because litex serial has fixed baudrate the callback only checks if
> the requested baudrate is the same as the CONFIG_BAUDRATE.
> ---
> drivers/serial/serial_litex.c | 9 -
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/serial/serial_litex.c b/drivers/serial/serial_litex.c
> index 8562a45ecc..9d35a6e44a 100644
> --- a/drivers/serial/serial_litex.c
> +++ b/drivers/serial/serial_litex.c
> @@ -58,6 +58,13 @@ static int litex_serial_tstc(struct console_device *cdev)
> return !litex_serial_readb(cdev, UART_RXEMPTY);
> }
>
> +static int litex_setial_setbaudrate(struct console_device *cdev, int
> baudrate)
> +{
> + if (baudrate != CONFIG_BAUDRATE)
> + return -EINVAL;
> + return 0;
> +}
> +
I have sent this patch separately because it need special attention.
LiteX serial port hardware has fixed baudrate and setbaudrate has no sence.
On the other hand absent setnbaudrate() litex serial makes impossible
to use Y-modem data trasfer.
I don't like CONFIG_BAUDRATE here. Can we use
if (baudrate != cdev->baudrate)
return -EINVAL;
return 0;
instead?
Please comment!
To: Ahmad
It looks like CONFIG_BAUDRATE is a one more global defconfig parameter
that complicates "one defconfig for all RISC-V boards" approach.
P.S. There is typo in litex_seTial_setbaudrate name. I have noted just now.
It should be fixed of cause.
> static int litex_serial_probe(struct device_d *dev)
> {
> struct resource *iores;
> @@ -73,7 +80,7 @@ static int litex_serial_probe(struct device_d *dev)
> cdev->tstc = _serial_tstc;
> cdev->putc = _serial_putc;
> cdev->getc = _serial_getc;
> - cdev->setbrg = NULL;
> + cdev->setbrg = _setial_setbaudrate;
>
> console_register(cdev);
>
> --
> 2.31.1
>
--
Best regards,
Antony Pavlov
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
[PATCH v3 09/10] RISC-V: add LiteX SoC and linux-on-litex-vexriscv support
LiteX is a Migen-based System on Chip, supporting softcore
VexRiscv CPU, a 32-bits Linux Capable RISC-V CPU.
See https://github.com/enjoy-digital/litex and
https://github.com/litex-hub/linux-on-litex-vexriscv
for details.
Signed-off-by: Antony Pavlov
---
arch/riscv/Kconfig.socs | 14 +++
arch/riscv/boards/Makefile | 1 +
arch/riscv/boards/litex-linux/Makefile | 3 +
arch/riscv/boards/litex-linux/lowlevel.c | 22
arch/riscv/dts/Makefile | 1 +
arch/riscv/dts/litex-linux.dts | 92 +
arch/riscv/dts/litex_soc_linux.dtsi | 49 +
arch/riscv/include/asm/debug_ll.h| 3 +
arch/riscv/include/asm/debug_ll_litex.h | 123 +++
common/Kconfig | 4 +
images/Makefile.riscv| 4 +
11 files changed, 316 insertions(+)
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 67d19caeb3..3ae66776f0 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -42,4 +42,18 @@ config BOARD_HIFIVE
endif
+config SOC_LITEX
+ bool "LiteX SoCs"
+ depends on ARCH_RV32I
+ select HAS_ASM_DEBUG_LL
+ select HAS_NMON
+ select USE_COMPRESSED_DTB
+ select RISCV_TIMER
+
+config BOARD_LITEX_LINUX
+ bool "litex linux board"
+ depends on SOC_LITEX
+ select RISCV_M_MODE
+ def_bool y
+
endmenu
diff --git a/arch/riscv/boards/Makefile b/arch/riscv/boards/Makefile
index 99f22f32b4..0468871fde 100644
--- a/arch/riscv/boards/Makefile
+++ b/arch/riscv/boards/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_BOARD_ERIZO_GENERIC) += erizo/
obj-$(CONFIG_BOARD_HIFIVE) += hifive/
+obj-$(CONFIG_BOARD_LITEX_LINUX)+= litex-linux/
diff --git a/arch/riscv/boards/litex-linux/Makefile
b/arch/riscv/boards/litex-linux/Makefile
new file mode 100644
index 00..3d217ffe0b
--- /dev/null
+++ b/arch/riscv/boards/litex-linux/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+
+pbl-y += lowlevel.o
diff --git a/arch/riscv/boards/litex-linux/lowlevel.c
b/arch/riscv/boards/litex-linux/lowlevel.c
new file mode 100644
index 00..da23ef5633
--- /dev/null
+++ b/arch/riscv/boards/litex-linux/lowlevel.c
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include
+#include
+#include
+#include
+
+ENTRY_FUNCTION(start_litex_linux, a0, a1, a2)
+{
+ extern char __dtb_z_litex_linux_start[];
+ void *fdt;
+
+ barebox_nmon_entry();
+
+ putc_ll('>');
+
+ /* On POR, we are running from read-only memory here. */
+
+ fdt = __dtb_z_litex_linux_start + get_runtime_offset();
+
+ barebox_riscv_machine_entry(0x4000, SZ_256M, fdt);
+}
diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index 17fdc9445b..683038189f 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -7,5 +7,6 @@ obj- += dummy.o
pbl-$(CONFIG_BOARD_ERIZO_GENERIC) += erizo-generic.dtb.o
pbl-$(CONFIG_BOARD_HIFIVE) += hifive-unmatched-a00.dtb.o \
hifive-unleashed-a00.dtb.o
+pbl-$(CONFIG_BOARD_LITEX_LINUX) += litex-linux.dtb.o
clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts
diff --git a/arch/riscv/dts/litex-linux.dts b/arch/riscv/dts/litex-linux.dts
new file mode 100644
index 00..d21fa57e30
--- /dev/null
+++ b/arch/riscv/dts/litex-linux.dts
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "litex_soc_linux.dtsi"
+
+#include
+
+/ {
+ model = "LiteX VexRiscV-SoC-Linux";
+ compatible = "litex,vexriscv-soc-linux";
+
+ aliases {
+ rom =
+ sram =
+ };
+
+ /* ARTY board */
+ rom: rom@ {
+ compatible = "mmio-sram";
+ reg = <0x 0x8000>;
+ read-only;
+ };
+
+ sram: sram@2000 {
+ compatible = "mmio-sram";
+ reg = <0x2000 0x4000>;
+ };
+
+ main_ram: memory@4000 {
+ device_type = "memory";
+ reg = <0x4000 0x1000>;
+ };
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+
+ spiflash: w25q128@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "winbond,w25q128", "jedec,spi-nor";
+ spi-max-frequency = <10400>;
+ reg = <0>;
+ };
+};
+
+/ {
+ ledsgpio: gpio@f000a800 {
+ compatible = "ti,74175";
+ reg = <0xf000a800 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ ld0 {
+ label = "arty:green:ld0";
+ gpios = < 0 GPIO_ACTIVE_HIGH>;
+ };
+
+ ld1 {
+
[PATCH v3 10/10] RISC-V: add litex_linux_defconfig
Signed-off-by: Antony Pavlov --- arch/riscv/configs/litex_linux_defconfig | 76 1 file changed, 76 insertions(+) diff --git a/arch/riscv/configs/litex_linux_defconfig b/arch/riscv/configs/litex_linux_defconfig new file mode 100644 index 00..c93a9cb57c --- /dev/null +++ b/arch/riscv/configs/litex_linux_defconfig @@ -0,0 +1,76 @@ +CONFIG_SOC_LITEX=y +CONFIG_STACK_SIZE=0x2 +CONFIG_MALLOC_SIZE=0xf0 +CONFIG_MALLOC_TLSF=y +CONFIG_PANIC_HANG=y +CONFIG_BAUDRATE=100 +CONFIG_HUSH_FANCY_PROMPT=y +CONFIG_CMDLINE_EDITING=y +CONFIG_AUTO_COMPLETE=y +# CONFIG_TIMESTAMP is not set +CONFIG_BOOTM_SHOW_TYPE=y +CONFIG_BOOTM_VERBOSE=y +CONFIG_BOOTM_INITRD=y +CONFIG_BOOTM_OFTREE=y +CONFIG_BOOTM_OFTREE_UIMAGE=y +CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y +CONFIG_DEBUG_LL=y +CONFIG_LONGHELP=y +CONFIG_CMD_IOMEM=y +CONFIG_CMD_IMD=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_GO=y +CONFIG_CMD_LOADY=y +CONFIG_CMD_EXPORT=y +CONFIG_CMD_CMP=y +CONFIG_CMD_MD5SUM=y +CONFIG_CMD_SHA1SUM=y +CONFIG_CMD_MSLEEP=y +CONFIG_CMD_SLEEP=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MIITOOL=y +CONFIG_CMD_PING=y +CONFIG_CMD_TFTP=y +CONFIG_CMD_ECHO_E=y +CONFIG_CMD_EDIT=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_MM=y +CONFIG_CMD_CLK=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_LED=y +CONFIG_CMD_SPI=y +CONFIG_CMD_LED_TRIGGER=y +CONFIG_CMD_OF_DUMP=y +CONFIG_CMD_TIME=y +CONFIG_CMD_DHRYSTONE=y +CONFIG_NET=y +CONFIG_NET_NFS=y +CONFIG_NET_NETCONSOLE=y +CONFIG_DRIVER_NET_LITEETH=y +CONFIG_AR8327N_PHY=y +CONFIG_AT803X_PHY=y +CONFIG_DAVICOM_PHY=y +CONFIG_DP83867_PHY=y +CONFIG_LXT_PHY=y +CONFIG_MARVELL_PHY=y +CONFIG_MICREL_PHY=y +CONFIG_NATIONAL_PHY=y +CONFIG_REALTEK_PHY=y +CONFIG_SMSC_PHY=y +CONFIG_NET_DSA_MV88E6XXX=y +CONFIG_DRIVER_SPI_LITEX_SPIFLASH=y +CONFIG_MTD=y +# CONFIG_MTD_OOB_DEVICE is not set +CONFIG_MTD_M25P80=y +CONFIG_CLOCKSOURCE_DUMMY_RATE=2 +CONFIG_SRAM=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_LED_GPIO_OF=y +CONFIG_LED_TRIGGERS=y +CONFIG_GPIO_74XX_MMIO=y +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_PINCTRL is not set +CONFIG_FS_TFTP=y +CONFIG_FS_NFS=y +CONFIG_DIGEST_CRC32_GENERIC=y -- 2.31.1 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH v3 08/10] net: add LiteEth driver
LiteEth provides a small footprint and configurable Ethernet core.
LiteEth is part of LiteX libraries whose aims are to lower entry level of
complex FPGA cores by providing simple, elegant and efficient implementations
of components used in today's SoC such as Ethernet, SATA, PCIe, SDRAM
Controller...
Using Migen to describe the HDL allows the core to be highly and easily
configurable.
LiteEth can be used as LiteX library or can be integrated with your standard
design flow by generating the verilog rtl that you will use as a standard core.
See https://github.com/enjoy-digital/liteeth for details.
Signed-off-by: Antony Pavlov
Signed-off-by: Marek Czerski
---
drivers/net/Kconfig | 8 +
drivers/net/Makefile | 1 +
drivers/net/liteeth.c | 376 ++
3 files changed, 385 insertions(+)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 0d55ea7a3b..4818f52603 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -271,6 +271,14 @@ config TSE_USE_DEDICATED_DESC_MEM
reserved with a malloc but directly mapped to the memory
address (defined in config.h)
+config DRIVER_NET_LITEETH
+ bool "LiteX ethernet driver"
+ select PHYLIB
+ select MDIO_BITBANG
+ help
+ This option enables support for the LiteX LiteEth
+ ethernet IP core.
+
source "drivers/net/phy/Kconfig"
source "drivers/net/usb/Kconfig"
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 656d45a868..bb751943f6 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -36,3 +36,4 @@ obj-$(CONFIG_DRIVER_NET_TAP) += tap.o
obj-$(CONFIG_DRIVER_NET_TSE) += altera_tse.o
obj-$(CONFIG_DRIVER_NET_EFI_SNP) += efi-snp.o
obj-$(CONFIG_DRIVER_NET_AG71XX)+= ag71xx.o
+obj-$(CONFIG_DRIVER_NET_LITEETH) += liteeth.o
diff --git a/drivers/net/liteeth.c b/drivers/net/liteeth.c
new file mode 100644
index 00..137cb854c5
--- /dev/null
+++ b/drivers/net/liteeth.c
@@ -0,0 +1,376 @@
+/*
+ * LiteX Liteeth Ethernet
+ *
+ * Copyright 2017 Joel Stanley
+ *
+ * Ported to barebox from linux kernel
+ * Copyright (C) 2019-2021 Antony Pavlov
+ * Copyright (C) 2021 Marek Czerski
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DRV_NAME "liteeth"
+
+#define LITEETH_WRITER_SLOT0x00
+#define LITEETH_WRITER_LENGTH 0x04
+#define LITEETH_WRITER_ERRORS 0x08
+#define LITEETH_WRITER_EV_STATUS 0x0c
+#define LITEETH_WRITER_EV_PENDING 0x10
+#define LITEETH_WRITER_EV_ENABLE 0x14
+#define LITEETH_READER_START 0x18
+#define LITEETH_READER_READY 0x1c
+#define LITEETH_READER_LEVEL 0x20
+#define LITEETH_READER_SLOT0x24
+#define LITEETH_READER_LENGTH 0x28
+#define LITEETH_READER_EV_STATUS 0x2c
+#define LITEETH_READER_EV_PENDING 0x30
+#define LITEETH_READER_EV_ENABLE 0x34
+#define LITEETH_PREAMBLE_CRC 0x38
+#define LITEETH_PREAMBLE_ERRORS0x3c
+#define LITEETH_CRC_ERRORS 0x40
+
+#define LITEETH_PHY_CRG_RESET 0x00
+#define LITEETH_MDIO_W 0x04
+#define MDIO_W_CLKBIT(0)
+#define MDIO_W_OE BIT(1)
+#define MDIO_W_DO BIT(2)
+
+#define LITEETH_MDIO_R 0x08
+#define MDIO_R_DI BIT(0)
+
+#define LITEETH_BUFFER_SIZE0x800
+#define MAX_PKT_SIZE LITEETH_BUFFER_SIZE
+
+struct liteeth {
+ struct device_d *dev;
+ struct eth_device edev;
+ void __iomem *base;
+ void __iomem *mdio_base;
+ struct mii_bus *mii_bus;
+ struct mdiobb_ctrl mdiobb;
+
+ /* Link management */
+ int cur_duplex;
+ int cur_speed;
+
+ /* Tx */
+ int tx_slot;
+ int num_tx_slots;
+ void __iomem *tx_base;
+
+ /* Rx */
+ int rx_slot;
+ int num_rx_slots;
+ void __iomem *rx_base;
+};
+
+static inline void litex_write8(void __iomem *addr, u8 val)
+{
+ writeb(val, addr);
+}
+
+static inline void litex_write16(void __iomem *addr, u16 val)
+{
+ writew(val, addr);
+}
+
+static inline u8 litex_read8(void __iomem *addr)
+{
+ return readb(addr);
+}
+
+static inline u32 litex_read32(void __iomem *addr)
+{
+ return readl(addr);
+}
+
+static void liteeth_mdio_w_modify(struct liteeth *priv, u8 clear, u8 set)
+{
+ void __iomem *mdio_w = priv->mdio_base + LITEETH_MDIO_W;
+
+ litex_write8(mdio_w, (litex_read8(mdio_w) & ~clear) | set);
+}
+
+static void liteeth_mdio_ctrl(struct mdiobb_ctrl *ctrl, u8 mask, int set)
+{
+ struct liteeth *priv = container_of(ctrl, struct liteeth, mdiobb);
+
+ liteeth_mdio_w_modify(priv, mask, set ? mask : 0);
+}
+
+/* MDC pin control */
+static void liteeth_set_mdc(struct mdiobb_ctrl *ctrl, int level)
+{
+
[PATCH v3 06/10] gpio: add driver for 74xx-ICs with MMIO access
This patch adds driver to support GPIO functionality
for 74xx-compatible ICs with MMIO access.
Compatible models include:
1 bit: 741G125 (Input), 741G74 (Output)
2 bits: 742G125 (Input), 7474 (Output)
4 bits: 74125 (Input), 74175 (Output)
6 bits: 74365 (Input), 74174 (Output)
8 bits: 74244 (Input), 74273 (Output)
16 bits: 741624 (Input), 7416374 (Output)
Signed-off-by: Antony Pavlov
Cc: Alexander Shiyan
---
drivers/gpio/Kconfig | 14 +++
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-74xx-mmio.c | 165 ++
3 files changed, 180 insertions(+)
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index a8ee9e58b8..579d5c04b3 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -21,6 +21,20 @@ config GPIO_74164
shift registers. This driver can be used to provide access
to more gpio outputs.
+config GPIO_74XX_MMIO
+ tristate "GPIO driver for 74xx-ICs with MMIO access"
+ depends on OFDEVICE
+ select GPIO_GENERIC
+ help
+ Say yes here to support GPIO functionality for 74xx-compatible ICs
+ with MMIO access. Compatible models include:
+ 1 bit: 741G125 (Input), 741G74 (Output)
+ 2 bits: 742G125 (Input), 7474 (Output)
+ 4 bits: 74125 (Input), 74175 (Output)
+ 6 bits: 74365 (Input), 74174 (Output)
+ 8 bits: 74244 (Input), 74273 (Output)
+ 16 bits:741624 (Input), 7416374 (Output)
+
config GPIO_CLPS711X
bool "GPIO support for CLPS711X"
depends on ARCH_CLPS711X || COMPILE_TEST
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 25e12105d8..41c65fa0ac 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -1,6 +1,7 @@
obj-$(CONFIG_GPIOLIB) += gpiolib.o
obj-$(CONFIG_GPIO_74164) += gpio-74164.o
+obj-$(CONFIG_GPIO_74XX_MMIO) += gpio-74xx-mmio.o
obj-$(CONFIG_MACH_MIPS_ATH79) += gpio-ath79.o
obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o
obj-$(CONFIG_GPIO_CLPS711X)+= gpio-clps711x.o
diff --git a/drivers/gpio/gpio-74xx-mmio.c b/drivers/gpio/gpio-74xx-mmio.c
new file mode 100644
index 00..5b688f4766
--- /dev/null
+++ b/drivers/gpio/gpio-74xx-mmio.c
@@ -0,0 +1,165 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * 74xx MMIO GPIO driver
+ *
+ * Copyright (C) 2014 Alexander Shiyan
+ *
+ * Ported to barebox from linux-v5.4-rc6
+ * Copyright (C) 2019-2021 Antony Pavlov
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#define MMIO_74XX_DIR_IN (0 << 8)
+#define MMIO_74XX_DIR_OUT (1 << 8)
+#define MMIO_74XX_BIT_CNT(x) ((x) & 0xff)
+
+struct mmio_74xx_gpio_priv {
+ struct bgpio_chip bgc;
+ unsigned intflags;
+};
+
+static const struct of_device_id mmio_74xx_gpio_ids[] = {
+ {
+ .compatible = "ti,741g125",
+ .data = (const void *)(MMIO_74XX_DIR_IN | 1),
+ },
+ {
+ .compatible = "ti,742g125",
+ .data = (const void *)(MMIO_74XX_DIR_IN | 2),
+ },
+ {
+ .compatible = "ti,74125",
+ .data = (const void *)(MMIO_74XX_DIR_IN | 4),
+ },
+ {
+ .compatible = "ti,74365",
+ .data = (const void *)(MMIO_74XX_DIR_IN | 6),
+ },
+ {
+ .compatible = "ti,74244",
+ .data = (const void *)(MMIO_74XX_DIR_IN | 8),
+ },
+ {
+ .compatible = "ti,741624",
+ .data = (const void *)(MMIO_74XX_DIR_IN | 16),
+ },
+ {
+ .compatible = "ti,741g74",
+ .data = (const void *)(MMIO_74XX_DIR_OUT | 1),
+ },
+ {
+ .compatible = "ti,7474",
+ .data = (const void *)(MMIO_74XX_DIR_OUT | 2),
+ },
+ {
+ .compatible = "ti,74175",
+ .data = (const void *)(MMIO_74XX_DIR_OUT | 4),
+ },
+ {
+ .compatible = "ti,74174",
+ .data = (const void *)(MMIO_74XX_DIR_OUT | 6),
+ },
+ {
+ .compatible = "ti,74273",
+ .data = (const void *)(MMIO_74XX_DIR_OUT | 8),
+ },
+ {
+ .compatible = "ti,7416374",
+ .data = (const void *)(MMIO_74XX_DIR_OUT | 16),
+ },
+ { }
+};
+
+static inline
+struct mmio_74xx_gpio_priv *to_mmio_74xx_gpio_priv(struct gpio_chip *gc)
+{
+ struct bgpio_chip *bgc =
+ container_of(gc, struct bgpio_chip, gc);
+
+ return container_of(bgc, struct mmio_74xx_gpio_priv, bgc);
+}
+
+static int mmio_74xx_get_direction(struct gpio_chip *gc, unsigned int offset)
+{
+
[PATCH v3 07/10] spi: add litex spiflash driver
Signed-off-by: Antony Pavlov
---
drivers/spi/Kconfig | 3 +
drivers/spi/Makefile | 1 +
drivers/spi/litex_spiflash.c | 241 +++
3 files changed, 245 insertions(+)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 323d93efeb..714d30e909 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -74,6 +74,9 @@ config DRIVER_SPI_IMX_2_3
depends on ARCH_IMX50 || ARCH_IMX51 || ARCH_IMX53 || ARCH_IMX6 ||
ARCH_IMX7 || ARCH_IMX8MQ
default y
+config DRIVER_SPI_LITEX_SPIFLASH
+ bool "Litex SPIFLASH bitbang master driver"
+
config DRIVER_SPI_MXS
bool "i.MX (23,28) SPI Master driver"
depends on ARCH_IMX28
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 908d514a01..ac95ffc1db 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -4,6 +4,7 @@ obj-$(CONFIG_DRIVER_SPI_ATH79) += ath79_spi.o
obj-$(CONFIG_DRIVER_SPI_GPIO) += gpio_spi.o
obj-$(CONFIG_DRIVER_SPI_FSL_QUADSPI) += spi-fsl-qspi.o
obj-$(CONFIG_DRIVER_SPI_IMX) += imx_spi.o
+obj-$(CONFIG_DRIVER_SPI_LITEX_SPIFLASH) += litex_spiflash.o
obj-$(CONFIG_DRIVER_SPI_MVEBU) += mvebu_spi.o
obj-$(CONFIG_DRIVER_SPI_MXS) += mxs_spi.o
obj-$(CONFIG_DRIVER_SPI_ALTERA) += altera_spi.o
diff --git a/drivers/spi/litex_spiflash.c b/drivers/spi/litex_spiflash.c
new file mode 100644
index 00..26ef207699
--- /dev/null
+++ b/drivers/spi/litex_spiflash.c
@@ -0,0 +1,241 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2020 Antony Pavlov
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+struct litex_spiflash_spi {
+ struct spi_master master;
+ void __iomem*regs;
+ u32 val;
+};
+
+#define SPIFLASH_BITBANG 0x0
+#define SPIFLASH_BB_MOSI BIT(0)
+#define SPIFLASH_BB_CLK BIT(1)
+#define SPIFLASH_BB_CSN BIT(2)
+#define SPIFLASH_BB_DIR BIT(3)
+
+#define SPIFLASH_MISO 0x4
+#define SPIFLASH_BITBANG_EN 0x8
+
+static inline u32 litex_spiflash_spi_rr(struct litex_spiflash_spi *sp, int reg)
+{
+ return readl(sp->regs + reg);
+}
+
+static inline void litex_spiflash_spi_wr(struct litex_spiflash_spi *sp, u32
val, int reg)
+{
+ writel(val, sp->regs + reg);
+}
+
+static inline void setbits(struct litex_spiflash_spi *sp, int bits, int on)
+{
+ /*
+* We are the only user of SCSPTR so no locking is required.
+* Reading bit 2 and 0 in SCSPTR gives pin state as input.
+* Writing the same bits sets the output value.
+* This makes regular read-modify-write difficult so we
+* use sp->val to keep track of the latest register value.
+*/
+
+ if (on)
+ sp->val |= bits;
+ else
+ sp->val &= ~bits;
+
+ litex_spiflash_spi_wr(sp, sp->val, SPIFLASH_BITBANG);
+}
+
+static inline struct litex_spiflash_spi *litex_spiflash_spidev_to_sp(struct
spi_device *spi)
+{
+ return container_of(spi->master, struct litex_spiflash_spi, master);
+}
+
+static inline void setsck(struct spi_device *spi, int on)
+{
+ struct litex_spiflash_spi *sc = litex_spiflash_spidev_to_sp(spi);
+
+ setbits(sc, SPIFLASH_BB_CLK, on);
+}
+
+static inline void setmosi(struct spi_device *spi, int on)
+{
+ struct litex_spiflash_spi *sc = litex_spiflash_spidev_to_sp(spi);
+
+ sc->val &= ~SPIFLASH_BB_DIR;
+ setbits(sc, SPIFLASH_BB_MOSI, on);
+}
+
+static inline u32 getmiso(struct spi_device *spi)
+{
+ struct litex_spiflash_spi *sc = litex_spiflash_spidev_to_sp(spi);
+
+ setbits(sc, SPIFLASH_BB_DIR, 1);
+ return !!((litex_spiflash_spi_rr(sc, SPIFLASH_MISO) & 1));
+}
+
+#define spidelay(nsecs) udelay(nsecs/1000)
+
+#include "spi-bitbang-txrx.h"
+
+static inline void litex_spiflash_spi_chipselect(struct litex_spiflash_spi
*sc, int on)
+{
+ setbits(sc, SPIFLASH_BB_CSN, on);
+}
+
+static int litex_spiflash_spi_setup(struct spi_device *spi)
+{
+ struct spi_master *master = spi->master;
+ struct device_d spi_dev = spi->dev;
+
+ if (spi->bits_per_word != 8) {
+ dev_err(master->dev, "master doesn't support %d bits per word
requested by %s\n",
+ spi->bits_per_word, spi_dev.name);
+ return -EINVAL;
+ }
+
+ if ((spi->mode & (SPI_CPHA | SPI_CPOL)) != SPI_MODE_0) {
+ dev_err(master->dev, "master doesn't support SPI_MODE%d
requested by %s\n",
+ spi->mode & (SPI_CPHA | SPI_CPOL), spi_dev.name);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int litex_spiflash_spi_read(struct spi_device *spi, void *buf, size_t
nbyte)
+{
+ ssize_t cnt = 0;
+ u8 *rxf_buf = buf;
+
+ while (cnt < nbyte) {
+ *rxf_buf = bitbang_txrx_be_cpha1(spi, 1000, 1, 0, 8);
+ rxf_buf++;
+ cnt++;
+ }
+
+ return cnt;
+}
+
+static int litex_spiflash_spi_write(struct spi_device *spi,
+
[PATCH v3 04/10] serial: add litex UART driver
Signed-off-by: Antony Pavlov
---
drivers/serial/Makefile | 1 +
drivers/serial/serial_litex.c | 96 +++
2 files changed, 97 insertions(+)
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 5120b17376..45055371ea 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -24,3 +24,4 @@ obj-$(CONFIG_DRIVER_SERIAL_DIGIC) +=
serial_digic.o
obj-$(CONFIG_DRIVER_SERIAL_LPUART) += serial_lpuart.o
obj-$(CONFIG_VIRTIO_CONSOLE) += virtio_console.o
obj-$(CONFIG_SERIAL_SIFIVE)+= serial_sifive.o
+obj-$(CONFIG_SOC_LITEX)+= serial_litex.o
diff --git a/drivers/serial/serial_litex.c b/drivers/serial/serial_litex.c
new file mode 100644
index 00..8562a45ecc
--- /dev/null
+++ b/drivers/serial/serial_litex.c
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Antony Pavlov
+ *
+ */
+
+#include
+#include
+#include
+
+#define UART_RXTX 0x00
+#define UART_TXFULL0x04
+#define UART_RXEMPTY 0x08
+#define UART_EV_PENDING0x10
+#define UART_EV_RX(1 << 1)
+
+static inline uint32_t litex_serial_readb(struct console_device *cdev,
+ uint32_t offset)
+{
+ void __iomem *base = cdev->dev->priv;
+
+ return readb(base + offset);
+}
+
+static inline void litex_serial_writeb(struct console_device *cdev,
+ uint32_t value, uint32_t offset)
+{
+ void __iomem *base = cdev->dev->priv;
+
+ writeb(value, base + offset);
+}
+
+static void litex_serial_putc(struct console_device *cdev, char c)
+{
+ while (litex_serial_readb(cdev, UART_TXFULL))
+ ;
+
+ litex_serial_writeb(cdev, c, UART_RXTX);
+}
+
+static int litex_serial_getc(struct console_device *cdev)
+{
+ int c;
+
+ while (litex_serial_readb(cdev, UART_RXEMPTY))
+ ;
+
+ c = litex_serial_readb(cdev, UART_RXTX);
+
+ /* refresh UART_RXEMPTY by writing UART_EV_RX to UART_EV_PENDING */
+ litex_serial_writeb(cdev, UART_EV_RX, UART_EV_PENDING);
+
+ return c;
+}
+
+static int litex_serial_tstc(struct console_device *cdev)
+{
+ return !litex_serial_readb(cdev, UART_RXEMPTY);
+}
+
+static int litex_serial_probe(struct device_d *dev)
+{
+ struct resource *iores;
+ struct console_device *cdev;
+
+ cdev = xzalloc(sizeof(struct console_device));
+ iores = dev_request_mem_resource(dev, 0);
+ if (IS_ERR(iores))
+ return PTR_ERR(iores);
+
+ dev->priv = IOMEM(iores->start);
+ cdev->dev = dev;
+ cdev->tstc = _serial_tstc;
+ cdev->putc = _serial_putc;
+ cdev->getc = _serial_getc;
+ cdev->setbrg = NULL;
+
+ console_register(cdev);
+
+ return 0;
+}
+
+static __maybe_unused struct of_device_id litex_serial_dt_ids[] = {
+ {
+ .compatible = "litex,uart",
+ }, {
+ /* sentinel */
+ }
+};
+
+static struct driver_d litex_serial_driver = {
+ .name = "litex-uart",
+ .probe = litex_serial_probe,
+ .of_compatible = DRV_OF_COMPAT(litex_serial_dt_ids),
+};
+console_platform_driver(litex_serial_driver);
--
2.31.1
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
[PATCH v3 05/10] litex serial: add setbrg callback
From: Marek Czerski
setbrg callback (set baudrate) is needed by the loadx/loady commands.
Because litex serial has fixed baudrate the callback only checks if
the requested baudrate is the same as the CONFIG_BAUDRATE.
---
drivers/serial/serial_litex.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial_litex.c b/drivers/serial/serial_litex.c
index 8562a45ecc..9d35a6e44a 100644
--- a/drivers/serial/serial_litex.c
+++ b/drivers/serial/serial_litex.c
@@ -58,6 +58,13 @@ static int litex_serial_tstc(struct console_device *cdev)
return !litex_serial_readb(cdev, UART_RXEMPTY);
}
+static int litex_setial_setbaudrate(struct console_device *cdev, int baudrate)
+{
+ if (baudrate != CONFIG_BAUDRATE)
+ return -EINVAL;
+ return 0;
+}
+
static int litex_serial_probe(struct device_d *dev)
{
struct resource *iores;
@@ -73,7 +80,7 @@ static int litex_serial_probe(struct device_d *dev)
cdev->tstc = _serial_tstc;
cdev->putc = _serial_putc;
cdev->getc = _serial_getc;
- cdev->setbrg = NULL;
+ cdev->setbrg = _setial_setbaudrate;
console_register(cdev);
--
2.31.1
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
[PATCH v3 03/10] RISC-V: boards: erizo: make it possible to use nmon
Signed-off-by: Antony Pavlov
Reviewed-by: Ahmad Fatoum
---
arch/riscv/boards/erizo/lowlevel.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/riscv/boards/erizo/lowlevel.c
b/arch/riscv/boards/erizo/lowlevel.c
index fc262ed61b..e75a87466a 100644
--- a/arch/riscv/boards/erizo/lowlevel.c
+++ b/arch/riscv/boards/erizo/lowlevel.c
@@ -3,6 +3,7 @@
#include
#include
#include
+#include
ENTRY_FUNCTION(start_erizo_generic, a0, a1, a2)
{
@@ -10,6 +11,9 @@ ENTRY_FUNCTION(start_erizo_generic, a0, a1, a2)
void *fdt;
debug_ll_init();
+
+ barebox_nmon_entry();
+
putc_ll('>');
/* On POR, we are running from read-only memory here. */
--
2.31.1
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
[PATCH v3 02/10] RISC-V: make it possible to run nmon from PBL C code
After migrating to PBL we can't use nmon assembler macro
in C code anymore. Some changes are introduced to invoke
nmon from PBL C code:
* use 'lla' macro instruction instead of 'la';
* don't touch the 'ra' register, use 'a2' instead;
* add wrapper C function for nmon.
Signed-off-by: Antony Pavlov
Reviewed-by: Ahmad Fatoum
---
arch/riscv/boot/Makefile| 1 +
arch/riscv/boot/nmon_entry.S| 13
arch/riscv/include/asm/riscv_nmon.h | 49 +++--
3 files changed, 46 insertions(+), 17 deletions(-)
diff --git a/arch/riscv/boot/Makefile b/arch/riscv/boot/Makefile
index 968a826d16..80f63a4a0a 100644
--- a/arch/riscv/boot/Makefile
+++ b/arch/riscv/boot/Makefile
@@ -1,4 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
obj-y += start.o
pbl-y += entry.o uncompress.o
+pbl-y += nmon_entry.o
pbl-$(CONFIG_BOARD_GENERIC_DT) += board-dt-2nd.o
diff --git a/arch/riscv/boot/nmon_entry.S b/arch/riscv/boot/nmon_entry.S
new file mode 100644
index 00..ae017d2a1c
--- /dev/null
+++ b/arch/riscv/boot/nmon_entry.S
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#include
+#include
+
+#include "asm/debug_ll.h"
+#include "asm/riscv_nmon.h"
+
+.section .text_bare_init
+
+ENTRY(__barebox_nmon_entry)
+ riscv_nmon
+ ret
+ENDPROC(__barebox_nmon_entry)
diff --git a/arch/riscv/include/asm/riscv_nmon.h
b/arch/riscv/include/asm/riscv_nmon.h
index caf213cdd8..8a44e216d7 100644
--- a/arch/riscv/include/asm/riscv_nmon.h
+++ b/arch/riscv/include/asm/riscv_nmon.h
@@ -16,13 +16,26 @@
#ifndef __ASM_RISCV_NMON_H
#define __ASM_RISCV_NMON_H
+#include
+
#define CODE_ESC 0x1b
+#ifndef __ASSEMBLY__
+
+extern void __barebox_nmon_entry(void);
+
+static inline void barebox_nmon_entry(void)
+{
+ if (IS_ENABLED(CONFIG_NMON))
+ __barebox_nmon_entry();
+}
+
+#else
+
.macro nmon_outs msg
- la a1, \msg
-
- jal _nmon_outs
+ lla a1, \msg
+ jal a2, _nmon_outs
.endm
@@ -73,7 +86,7 @@ nmon_main:
li a0, 'q'
bne s0, a0, 3f
- jal _nmon_outc_a0
+ jal a2, _nmon_outc_a0
j nmon_exit
@@ -90,12 +103,12 @@ nmon_main:
j nmon_main_help
nmon_cmd_d:
- jal _nmon_outc_a0
+ jal a2, _nmon_outc_a0
li a0, ' '
- jal _nmon_outc_a0
+ jal a2, _nmon_outc_a0
- jal _nmon_gethexw
+ jal a2, _nmon_gethexw
nmon_outs msg_nl
@@ -105,28 +118,28 @@ nmon_cmd_d:
j nmon_main
nmon_cmd_w:
- jal _nmon_outc_a0
+ jal a2, _nmon_outc_a0
li a0, ' '
- jal _nmon_outc_a0
+ jal a2, _nmon_outc_a0
- jal _nmon_gethexw
+ jal a2, _nmon_gethexw
moves2, s0
li a0, ' '
- jal _nmon_outc_a0
- jal _nmon_gethexw
+ jal a2, _nmon_outc_a0
+ jal a2, _nmon_gethexw
sw s0, 0(s2)
j nmon_main
nmon_cmd_g:
- jal _nmon_outc_a0
+ jal a2, _nmon_outc_a0
li a0, ' '
- jal _nmon_outc_a0
+ jal a2, _nmon_outc_a0
- jal _nmon_gethexw
+ jal a2, _nmon_gethexw
moves2, s0
nmon_outs msg_nl
@@ -136,7 +149,7 @@ nmon_cmd_g:
_nmon_outc_a0:
debug_ll_outc_a0
- jr ra
+ jr a2
_nmon_outs:
@@ -202,7 +215,7 @@ _get_hex_digit:
moves0, t2
_nmon_jr_ra_exit:
- jr ra
+ jr a2
msg_prompt:
.asciz "\r\nnmon> "
@@ -231,4 +244,6 @@ nmon_exit:
.endm
+#endif /* __ASSEMBLY__ */
+
#endif /* __ASM_RISCV_NMON_H */
--
2.31.1
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
[PATCH v3 01/10] clocksource: timer-riscv: select CSR from device tree
barebox timer-riscv driver supports one of user counters:
* 'cycle', counter for RDCYCLE instruction (CSR 0xc00);
* 'time', timer for RDTIME instruction (CSR 0xc01).
At the moment in M-mode timer-riscv uses the 'cycle' counter,
and in S-mode timer-riscv uses the 'time' timer.
Alas picorv32 CPU core supports only the 'cycle' counter.
VexRiscV CPU core in M-mode supports only the 'time' timer.
This patch makes it possible to use the 'time' timer
for VexRiscV CPU in M-mode.
Signed-off-by: Antony Pavlov
---
arch/riscv/dts/erizo.dtsi | 2 ++
drivers/clocksource/timer-riscv.c | 24
2 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/arch/riscv/dts/erizo.dtsi b/arch/riscv/dts/erizo.dtsi
index 228711bd69..4eb92ae6f1 100644
--- a/arch/riscv/dts/erizo.dtsi
+++ b/arch/riscv/dts/erizo.dtsi
@@ -22,6 +22,8 @@
timebase-frequency = <2400>;
+ barebox,csr-cycle;
+
cpu@0 {
device_type = "cpu";
compatible = "cliffordwolf,picorv32", "riscv";
diff --git a/drivers/clocksource/timer-riscv.c
b/drivers/clocksource/timer-riscv.c
index cbbe18d9a6..305d1ecea0 100644
--- a/drivers/clocksource/timer-riscv.c
+++ b/drivers/clocksource/timer-riscv.c
@@ -12,9 +12,8 @@
#include
#include
#include
-#include
-static u64 notrace riscv_timer_get_count_sbi(void)
+static u64 notrace riscv_timer_get_count_time(void)
{
__maybe_unused u32 hi, lo;
@@ -29,7 +28,7 @@ static u64 notrace riscv_timer_get_count_sbi(void)
return ((u64)hi << 32) | lo;
}
-static u64 notrace riscv_timer_get_count_rdcycle(void)
+static u64 notrace riscv_timer_get_count_cycle(void)
{
__maybe_unused u32 hi, lo;
@@ -44,24 +43,25 @@ static u64 notrace riscv_timer_get_count_rdcycle(void)
return ((u64)hi << 32) | lo;
}
-static u64 notrace riscv_timer_get_count(void)
-{
- if (riscv_mode() == RISCV_S_MODE)
- return riscv_timer_get_count_sbi();
- else
- return riscv_timer_get_count_rdcycle();
-}
-
static struct clocksource riscv_clocksource = {
- .read = riscv_timer_get_count,
.mask = CLOCKSOURCE_MASK(64),
.priority = 100,
};
static int riscv_timer_init(struct device_d* dev)
{
+ struct device_node *cpu;
+
dev_info(dev, "running at %lu Hz\n", riscv_timebase);
+ cpu = of_find_node_by_path("/cpus");
+
+ if (of_property_read_bool(cpu, "barebox,csr-cycle")) {
+ riscv_clocksource.read = riscv_timer_get_count_cycle;
+ } else {
+ riscv_clocksource.read = riscv_timer_get_count_time;
+ }
+
riscv_clocksource.mult = clocksource_hz2mult(riscv_timebase,
riscv_clocksource.shift);
return init_clock(_clocksource);
--
2.31.1
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
[PATCH v3 00/10] RISC-V: add LiteX SoC support; resurrect nmon
Changes since v2: * rebase on top of master branch (f873c7ff2497) + "RISC-V: extend multi-image to support both S- and M-Mode" (http://lists.infradead.org/pipermail/barebox/2021-May/036086.html). * "litex serial: add setbrg callback" patch by Marek Czerski is added for review; * fix "clocksource: timer-riscv: select CSR from device tree" patch; * change gpio IP-block base addresses in litex dts; * gpio-74xx-mmio uses device_get_match_data() now. Changes since v1: * rebased on top of next branch; * new patches are introduced: * clocksource: timer-riscv: select CSR from device tree * RISC-V: make RISCV_SBI and RISCV_M_MODE explicitly mutually exclusive * RISC-V: make it possible to build RV32I multi-image with DEBUG_LL=n * almost all of Ahmad's notes are fixed (e.g. unused header files inclusions are dropped); * NOT FIXED: gpio-74xx-mmio still uses dev_get_drvdata(), not device_get_match_data() Antony Pavlov (9): clocksource: timer-riscv: select CSR from device tree RISC-V: make it possible to run nmon from PBL C code RISC-V: boards: erizo: make it possible to use nmon serial: add litex UART driver gpio: add driver for 74xx-ICs with MMIO access spi: add litex spiflash driver net: add LiteEth driver RISC-V: add LiteX SoC and linux-on-litex-vexriscv support RISC-V: add litex_linux_defconfig Marek Czerski (1): litex serial: add setbrg callback arch/riscv/Kconfig.socs | 14 + arch/riscv/boards/Makefile | 1 + arch/riscv/boards/erizo/lowlevel.c | 4 + arch/riscv/boards/litex-linux/Makefile | 3 + arch/riscv/boards/litex-linux/lowlevel.c | 22 ++ arch/riscv/boot/Makefile | 1 + arch/riscv/boot/nmon_entry.S | 13 + arch/riscv/configs/litex_linux_defconfig | 76 + arch/riscv/dts/Makefile | 1 + arch/riscv/dts/erizo.dtsi| 2 + arch/riscv/dts/litex-linux.dts | 92 ++ arch/riscv/dts/litex_soc_linux.dtsi | 49 +++ arch/riscv/include/asm/debug_ll.h| 3 + arch/riscv/include/asm/debug_ll_litex.h | 123 arch/riscv/include/asm/riscv_nmon.h | 49 ++- common/Kconfig | 4 + drivers/clocksource/timer-riscv.c| 24 +- drivers/gpio/Kconfig | 14 + drivers/gpio/Makefile| 1 + drivers/gpio/gpio-74xx-mmio.c| 165 ++ drivers/net/Kconfig | 8 + drivers/net/Makefile | 1 + drivers/net/liteeth.c| 376 +++ drivers/serial/Makefile | 1 + drivers/serial/serial_litex.c| 103 +++ drivers/spi/Kconfig | 3 + drivers/spi/Makefile | 1 + drivers/spi/litex_spiflash.c | 241 +++ images/Makefile.riscv| 4 + 29 files changed, 1370 insertions(+), 29 deletions(-) create mode 100644 arch/riscv/boards/litex-linux/Makefile create mode 100644 arch/riscv/boards/litex-linux/lowlevel.c create mode 100644 arch/riscv/boot/nmon_entry.S create mode 100644 arch/riscv/configs/litex_linux_defconfig create mode 100644 arch/riscv/dts/litex-linux.dts create mode 100644 arch/riscv/dts/litex_soc_linux.dtsi create mode 100644 arch/riscv/include/asm/debug_ll_litex.h create mode 100644 drivers/gpio/gpio-74xx-mmio.c create mode 100644 drivers/net/liteeth.c create mode 100644 drivers/serial/serial_litex.c create mode 100644 drivers/spi/litex_spiflash.c -- 2.31.1 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 2/2] mci: arasan: configure data transfer only if we actually have data
On Wed, May 19, 2021 at 09:38:55AM +0200, Michael Tretter wrote:
> If we don't have any data to transfer, we must not set the block size
> and block count.
>
> If data is NULL, accessing data to get the block size and block count is
> a NULL pointer dereference.
>
> Signed-off-by: Michael Tretter
> ---
> drivers/mci/arasan-sdhci.c | 10 ++
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mci/arasan-sdhci.c b/drivers/mci/arasan-sdhci.c
> index 399966e8cf10..3d738774e825 100644
> --- a/drivers/mci/arasan-sdhci.c
> +++ b/drivers/mci/arasan-sdhci.c
> @@ -283,10 +283,12 @@ static int arasan_sdhci_send_cmd(struct mci_host *mci,
> struct mci_cmd *cmd,
> sdhci_set_cmd_xfer_mode(>sdhci, cmd, data, false, ,
> );
>
> sdhci_write8(>sdhci, SDHCI_TIMEOUT_CONTROL, TIMEOUT_VAL);
> - sdhci_write16(>sdhci, SDHCI_TRANSFER_MODE, xfer);
> - sdhci_write16(>sdhci, SDHCI_BLOCK_SIZE, SDHCI_DMA_BOUNDARY_512K |
> - SDHCI_TRANSFER_BLOCK_SIZE(data->blocksize));
> - sdhci_write16(>sdhci, SDHCI_BLOCK_COUNT, data->blocks);
> + if (data) {
> + sdhci_write16(>sdhci, SDHCI_TRANSFER_MODE, xfer);
> + sdhci_write16(>sdhci, SDHCI_BLOCK_SIZE,
> + SDHCI_DMA_BOUNDARY_512K |
> SDHCI_TRANSFER_BLOCK_SIZE(data->blocksize));
> + sdhci_write16(>sdhci, SDHCI_BLOCK_COUNT, data->blocks);
> + }
I also stumbled upon this already. Applied, thanks
Sascha
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH 1/2] mci: arasan: wait for data available only on read
On Wed, May 19, 2021 at 09:38:54AM +0200, Michael Tretter wrote: > Only READ data transfers actually send a data available interrupt. > Therefore, check if the transfer is a read and wait for the data only in > this case. > > Signed-off-by: Michael Tretter > --- > > Hi Michael, > > On Tue, 18 May 2021 08:09:47 +, Michael Graichen wrote: > > > This looks familiar. I have a similar patch that sets SDHCI_INT_DATA_AVAIL > > > only if the command is a READ, but I didn't yet have time to verify, that > > > this > > > is the correct fix. > > > > Can you please send it to me? > > Here you are. I am not sure, if the fix is correct. I also added another > patch to handle situations where data is NULL, but I am not entirely sure > about that one either. > > Michael > --- > drivers/mci/arasan-sdhci.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/mci/arasan-sdhci.c b/drivers/mci/arasan-sdhci.c > index 520bf30ff952..399966e8cf10 100644 > --- a/drivers/mci/arasan-sdhci.c > +++ b/drivers/mci/arasan-sdhci.c > @@ -277,7 +277,7 @@ static int arasan_sdhci_send_cmd(struct mci_host *mci, > struct mci_cmd *cmd, > sdhci_write32(>sdhci, SDHCI_INT_STATUS, ~0); > > mask = SDHCI_INT_CMD_COMPLETE; > - if (data) > + if (data && data->flags == MMC_DATA_READ) > mask |= SDHCI_INT_DATA_AVAIL; Waiting for Data avaialable only makes sense when reading. Applied, thanks Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH v2] net: dns: use correct nameserver var name in error message
On Tue, May 25, 2021 at 09:21:33AM +0300, Antony Pavlov wrote:
> The commit d5d342d26368c1 ("net: Make domainname and nameserver globalvars")
> changes net.nameserver variable name to global.net.nameserver.
> This commit changes the variable name in the error message too.
>
> Signed-off-by: Antony Pavlov
> ---
> net/dns.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied, thanks
Sascha
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- |
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
[PATCH v2] net: dns: use correct nameserver var name in error message
The commit d5d342d26368c1 ("net: Make domainname and nameserver globalvars")
changes net.nameserver variable name to global.net.nameserver.
This commit changes the variable name in the error message too.
Signed-off-by: Antony Pavlov
---
net/dns.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/dns.c b/net/dns.c
index ffe98ef9e3..78588b96fd 100644
--- a/net/dns.c
+++ b/net/dns.c
@@ -215,7 +215,7 @@ int resolv(const char *host, IPaddr_t *ip)
nameserver = net_get_nameserver();
if (!nameserver) {
- pr_err("no nameserver specified in $net.nameserver\n");
+ pr_err("no nameserver specified in $global.net.nameserver\n");
return 0;
}
--
2.31.1
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
[PATCH] net: dns: user corrent nameserver var name in error message
The commit d5d342d26368c1 ("net: Make domainname and nameserver globalvars")
changes net.nameserver variable name to global.net.nameserver.
This commit change the variable name in the error message too.
Signed-off-by: Antony Pavlov
---
net/dns.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/dns.c b/net/dns.c
index ffe98ef9e3..78588b96fd 100644
--- a/net/dns.c
+++ b/net/dns.c
@@ -215,7 +215,7 @@ int resolv(const char *host, IPaddr_t *ip)
nameserver = net_get_nameserver();
if (!nameserver) {
- pr_err("no nameserver specified in $net.nameserver\n");
+ pr_err("no nameserver specified in $global.net.nameserver\n");
return 0;
}
--
2.31.1
___
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
