Re: [beagleboard] DS3234 clock on SPI1
Have you updated the device tree compiler ? Here, I'm assuming you simply
upgraded the kernel form an image that initially had 3.8.x installed . . .
http://www.embeddedhobbyist.com/2015/09/beaglebone-black-updating-device-tree-files/
On Sat, Jul 2, 2016 at 2:08 PM, wrote:
>
> Running kernel 4.4 and trying to read a DS3234 clock on the second SPI
> port I can suppress the HDMI pins in uEnv.txt with:
>
> dtb=am335x-boneblack-emmc-overlay.dtb
>
> optargs=cape_disable=bone_capemgr.disable_partno=BB-BONELT-HDMI,BB-BONELT-HDMIN
>
> (uEnv.txt isn't loading the "universal overlay".)
>
> Loading BB-SPIDEV0 and BB-SPI1CLK then produces the expected
> /dev/spidev1.0,
> /dev/spidev1.1 and /dev/rtc1 devices.
>
> dmesg says:
> bone_capemgr bone_capemgr: part_number 'BB-SPI1CLK', version 'N/A'
> bone_capemgr bone_capemgr: slot #6: override
> bone_capemgr bone_capemgr: Using override eeprom data at slot 6
> bone_capemgr bone_capemgr: slot #6: 'Override Board Name,00A0,Override
> Manuf,BB-SPI1CLK'
> ds3234 spi2.0: Control Reg: 0x00
> ds3234 spi2.0: Ctrl/Stat Reg: 0x00
> ds3234 spi2.0: rtc core: registered ds3234 as rtc1
> bone_capemgr bone_capemgr: slot #6: dtbo 'BB-SPI1CLK-00A0.dtbo' loaded;
> overlay id #1
>
> However, there's no spi pingroup, and the relevant pins remain in mode 7
> not mode 3, and are unclaimed:
>
> pin 100 (44e10990.0) 0027 pinctrl-single
> pin 101 (44e10994.0) 0027 pinctrl-single
> pin 102 (44e10998.0) 0027 pinctrl-single
> pin 103 (44e1099c.0) 0027 pinctrl-single
>
> pin 100 (44e10990.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
> pin 101 (44e10994.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
> pin 102 (44e10998.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
> pin 103 (44e1099c.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>
> and reading the clocks gives:
>
> quid ~ # hwclock -f /dev/rtc0 -r
> Sat Jul 2 21:00:10 2016 .954216 seconds
> quid ~ # hwclock -f /dev/rtc1 -r
> hwclock: ioctl(RTC_RD_TIME) to /dev/rtc1 to read the time failed: Invalid
> argument
> quid ~ #
>
> The clock overlay worked in 3.8, and I _think_ I've updated it correctly
> for
> 4.4. Can anyone spot what I've missed?
>
> /*
> ** Dallas DS3234 RTC SPI driver test.
> **
> ** Virtual cape for SPI1 on connector pins P9.29 P9.31 P9.30 P9.28
> **
> ** Pin Identities.
> **
> ** SPI_1 names : CS0, DO,DI,CLK
> ** P9 pins : 28,29,30,31
> ** GPIO3 pins : 17,15,16,14
> ** Processor pins : C12, B13, D12, A13
> ** SRM table 15 ?? : 214, 210, 212, 218
> ** Pingroup labels : 103, 101, ???100
> ** Code offsets: 0x19c, 0x194, 0x198, 0x190
> ** Base pin gpmc_ad0 has address 0x800 giving:
> ** : 0x99c, 0x994, 0x998, 0x990
> ** TRM 9.3 (spi0) : 0x95c, 0x954, 0x958, 0x950
> **
> ** Moved to kernel 4.x GPIO bank numbering.
> */
>
> /dts-v1/;
> /plugin/;
>
> / {
> compatible = "ti,beaglebone", "ti,beaglebone-black";
>
> /* identification */
> part-number = "BB-SPI1CLK";
> version = "00A0";
>
> /* Resources */
> exclusive-use =
> /* Pin header */
> "P9.31",/* spi1_sclk */
> "P9.29",/* spi1_d0 */
> "P9.30",/* spi1_d1 */
> "P9.28",/* spi1_cs0 */
> /* Hardware */
> "spi1";
>
> fragment@0 {
> target = <&am33xx_pinmux>;
> __overlay__ {
> /* Default has all gpios released, mode uart1 */
> pinctrl_spi1: pinctrl_spi1_pins {
> pinctrl-single,pins = <
> 0x190 0x33 /* P9_31 = mcasp0_aclkx.spi1_sclk,
> INPUT_PULLUP | MODE3 */
> 0x194 0x33 /* P9_29 = mcasp0_fsx.spi1_d0,
> INPUT_PULLUP | MODE3 */
> 0x198 0x13 /* P9_30 = mcasp0_axr0.spi1_d1,
> OUTPUT_PULLUP | MODE3 */
> 0x19c 0x13 /* P9_28 = mcasp0_ahclkr.spi1_cs0,
> OUTPUT_PULLUP | MODE3 */
> >;
> };
> };
> };
>
> fragment@1 {
> target = <&spi1>;
> __overlay__ {
> #address-cells = <1>;
> #size-cells = <0>;
> status = "okay";
> pinctrl-names= "default";
> pinctrl-0= <&pinctrl_spi1>;
> cs-gpios = <&gpio3 17 0>; /* Is this needed ??? */
> ds3234@0 {
> #address-cells = <1>;
> #size-cells = <0>;
> compatible = "ds3234";
> reg = <0>;
> spi-max-frequency = <20>; /* Slowed for testing */
> /* spi-cpha ??? */
> };
> };
> };
>
> };
>
>
> --
> For more options, visit http://beagleboard.org/discuss
> ---
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> "BeagleBoard" group.
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> https://groups.google.com/d/msgid/beagleboard/214a0cf1-6d1f-4b
Re: [beagleboard] DS3234 clock on SPI1
Additionally. You did set the time on the RTC before trying to read from it
?
On Sat, Jul 2, 2016 at 2:26 PM, William Hermans wrote:
> Have you updated the device tree compiler ? Here, I'm assuming you simply
> upgraded the kernel form an image that initially had 3.8.x installed . . .
>
>
> http://www.embeddedhobbyist.com/2015/09/beaglebone-black-updating-device-tree-files/
>
> On Sat, Jul 2, 2016 at 2:08 PM, wrote:
>
>>
>> Running kernel 4.4 and trying to read a DS3234 clock on the second SPI
>> port I can suppress the HDMI pins in uEnv.txt with:
>>
>> dtb=am335x-boneblack-emmc-overlay.dtb
>>
>> optargs=cape_disable=bone_capemgr.disable_partno=BB-BONELT-HDMI,BB-BONELT-HDMIN
>>
>> (uEnv.txt isn't loading the "universal overlay".)
>>
>> Loading BB-SPIDEV0 and BB-SPI1CLK then produces the expected
>> /dev/spidev1.0,
>> /dev/spidev1.1 and /dev/rtc1 devices.
>>
>> dmesg says:
>> bone_capemgr bone_capemgr: part_number 'BB-SPI1CLK', version 'N/A'
>> bone_capemgr bone_capemgr: slot #6: override
>> bone_capemgr bone_capemgr: Using override eeprom data at slot 6
>> bone_capemgr bone_capemgr: slot #6: 'Override Board Name,00A0,Override
>> Manuf,BB-SPI1CLK'
>> ds3234 spi2.0: Control Reg: 0x00
>> ds3234 spi2.0: Ctrl/Stat Reg: 0x00
>> ds3234 spi2.0: rtc core: registered ds3234 as rtc1
>> bone_capemgr bone_capemgr: slot #6: dtbo 'BB-SPI1CLK-00A0.dtbo' loaded;
>> overlay id #1
>>
>> However, there's no spi pingroup, and the relevant pins remain in mode 7
>> not mode 3, and are unclaimed:
>>
>> pin 100 (44e10990.0) 0027 pinctrl-single
>> pin 101 (44e10994.0) 0027 pinctrl-single
>> pin 102 (44e10998.0) 0027 pinctrl-single
>> pin 103 (44e1099c.0) 0027 pinctrl-single
>>
>> pin 100 (44e10990.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>> pin 101 (44e10994.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>> pin 102 (44e10998.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>> pin 103 (44e1099c.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>>
>> and reading the clocks gives:
>>
>> quid ~ # hwclock -f /dev/rtc0 -r
>> Sat Jul 2 21:00:10 2016 .954216 seconds
>> quid ~ # hwclock -f /dev/rtc1 -r
>> hwclock: ioctl(RTC_RD_TIME) to /dev/rtc1 to read the time failed: Invalid
>> argument
>> quid ~ #
>>
>> The clock overlay worked in 3.8, and I _think_ I've updated it correctly
>> for
>> 4.4. Can anyone spot what I've missed?
>>
>> /*
>> ** Dallas DS3234 RTC SPI driver test.
>> **
>> ** Virtual cape for SPI1 on connector pins P9.29 P9.31 P9.30 P9.28
>> **
>> ** Pin Identities.
>> **
>> ** SPI_1 names : CS0, DO,DI,CLK
>> ** P9 pins : 28,29,30,31
>> ** GPIO3 pins : 17,15,16,14
>> ** Processor pins : C12, B13, D12, A13
>> ** SRM table 15 ?? : 214, 210, 212, 218
>> ** Pingroup labels : 103, 101, ???100
>> ** Code offsets: 0x19c, 0x194, 0x198, 0x190
>> ** Base pin gpmc_ad0 has address 0x800 giving:
>> ** : 0x99c, 0x994, 0x998, 0x990
>> ** TRM 9.3 (spi0) : 0x95c, 0x954, 0x958, 0x950
>> **
>> ** Moved to kernel 4.x GPIO bank numbering.
>> */
>>
>> /dts-v1/;
>> /plugin/;
>>
>> / {
>> compatible = "ti,beaglebone", "ti,beaglebone-black";
>>
>> /* identification */
>> part-number = "BB-SPI1CLK";
>> version = "00A0";
>>
>> /* Resources */
>> exclusive-use =
>> /* Pin header */
>> "P9.31",/* spi1_sclk */
>> "P9.29",/* spi1_d0 */
>> "P9.30",/* spi1_d1 */
>> "P9.28",/* spi1_cs0 */
>> /* Hardware */
>> "spi1";
>>
>> fragment@0 {
>> target = <&am33xx_pinmux>;
>> __overlay__ {
>> /* Default has all gpios released, mode uart1 */
>> pinctrl_spi1: pinctrl_spi1_pins {
>> pinctrl-single,pins = <
>> 0x190 0x33 /* P9_31 = mcasp0_aclkx.spi1_sclk,
>> INPUT_PULLUP | MODE3 */
>> 0x194 0x33 /* P9_29 = mcasp0_fsx.spi1_d0,
>> INPUT_PULLUP | MODE3 */
>> 0x198 0x13 /* P9_30 = mcasp0_axr0.spi1_d1,
>> OUTPUT_PULLUP | MODE3 */
>> 0x19c 0x13 /* P9_28 = mcasp0_ahclkr.spi1_cs0,
>> OUTPUT_PULLUP | MODE3 */
>> >;
>> };
>> };
>> };
>>
>> fragment@1 {
>> target = <&spi1>;
>> __overlay__ {
>> #address-cells = <1>;
>> #size-cells = <0>;
>> status = "okay";
>> pinctrl-names= "default";
>> pinctrl-0= <&pinctrl_spi1>;
>> cs-gpios = <&gpio3 17 0>; /* Is this needed ??? */
>> ds3234@0 {
>> #address-cells = <1>;
>> #size-cells = <0>;
>> compatible = "ds3234";
>> reg = <0>;
>> spi-max-frequency = <20>; /* Slowed for testing */
>> /* spi-cpha ??? */
>> };
>> };
>> };
>>
>> };
>>
>>
>> --
>> For more options, visit http://beagleboard.org/discuss
>> ---
>> You received this message because you are sub
Re: [beagleboard] DS3234 clock on SPI1
cs-gpios = <&gpio3 17 0>; /* Is this needed ??? */
Double check your pin here make sure it's right. Someone was just saying
yesterday that the GPIO banks got restructured, and some address got
switched around. So it is entirely possible the pin you're after is no
longer on GPIO3 gpio bank.
On Sat, Jul 2, 2016 at 2:33 PM, William Hermans wrote:
> Additionally. You did set the time on the RTC before trying to read from
> it ?
>
> On Sat, Jul 2, 2016 at 2:26 PM, William Hermans wrote:
>
>> Have you updated the device tree compiler ? Here, I'm assuming you simply
>> upgraded the kernel form an image that initially had 3.8.x installed . . .
>>
>>
>> http://www.embeddedhobbyist.com/2015/09/beaglebone-black-updating-device-tree-files/
>>
>> On Sat, Jul 2, 2016 at 2:08 PM, wrote:
>>
>>>
>>> Running kernel 4.4 and trying to read a DS3234 clock on the second SPI
>>> port I can suppress the HDMI pins in uEnv.txt with:
>>>
>>> dtb=am335x-boneblack-emmc-overlay.dtb
>>>
>>> optargs=cape_disable=bone_capemgr.disable_partno=BB-BONELT-HDMI,BB-BONELT-HDMIN
>>>
>>> (uEnv.txt isn't loading the "universal overlay".)
>>>
>>> Loading BB-SPIDEV0 and BB-SPI1CLK then produces the expected
>>> /dev/spidev1.0,
>>> /dev/spidev1.1 and /dev/rtc1 devices.
>>>
>>> dmesg says:
>>> bone_capemgr bone_capemgr: part_number 'BB-SPI1CLK', version 'N/A'
>>> bone_capemgr bone_capemgr: slot #6: override
>>> bone_capemgr bone_capemgr: Using override eeprom data at slot 6
>>> bone_capemgr bone_capemgr: slot #6: 'Override Board Name,00A0,Override
>>> Manuf,BB-SPI1CLK'
>>> ds3234 spi2.0: Control Reg: 0x00
>>> ds3234 spi2.0: Ctrl/Stat Reg: 0x00
>>> ds3234 spi2.0: rtc core: registered ds3234 as rtc1
>>> bone_capemgr bone_capemgr: slot #6: dtbo 'BB-SPI1CLK-00A0.dtbo' loaded;
>>> overlay id #1
>>>
>>> However, there's no spi pingroup, and the relevant pins remain in mode 7
>>> not mode 3, and are unclaimed:
>>>
>>> pin 100 (44e10990.0) 0027 pinctrl-single
>>> pin 101 (44e10994.0) 0027 pinctrl-single
>>> pin 102 (44e10998.0) 0027 pinctrl-single
>>> pin 103 (44e1099c.0) 0027 pinctrl-single
>>>
>>> pin 100 (44e10990.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>>> pin 101 (44e10994.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>>> pin 102 (44e10998.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>>> pin 103 (44e1099c.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
>>>
>>> and reading the clocks gives:
>>>
>>> quid ~ # hwclock -f /dev/rtc0 -r
>>> Sat Jul 2 21:00:10 2016 .954216 seconds
>>> quid ~ # hwclock -f /dev/rtc1 -r
>>> hwclock: ioctl(RTC_RD_TIME) to /dev/rtc1 to read the time failed:
>>> Invalid argument
>>> quid ~ #
>>>
>>> The clock overlay worked in 3.8, and I _think_ I've updated it correctly
>>> for
>>> 4.4. Can anyone spot what I've missed?
>>>
>>> /*
>>> ** Dallas DS3234 RTC SPI driver test.
>>> **
>>> ** Virtual cape for SPI1 on connector pins P9.29 P9.31 P9.30 P9.28
>>> **
>>> ** Pin Identities.
>>> **
>>> ** SPI_1 names : CS0, DO,DI,CLK
>>> ** P9 pins : 28,29,30,31
>>> ** GPIO3 pins : 17,15,16,14
>>> ** Processor pins : C12, B13, D12, A13
>>> ** SRM table 15 ?? : 214, 210, 212, 218
>>> ** Pingroup labels : 103, 101, ???100
>>> ** Code offsets: 0x19c, 0x194, 0x198, 0x190
>>> ** Base pin gpmc_ad0 has address 0x800 giving:
>>> ** : 0x99c, 0x994, 0x998, 0x990
>>> ** TRM 9.3 (spi0) : 0x95c, 0x954, 0x958, 0x950
>>> **
>>> ** Moved to kernel 4.x GPIO bank numbering.
>>> */
>>>
>>> /dts-v1/;
>>> /plugin/;
>>>
>>> / {
>>> compatible = "ti,beaglebone", "ti,beaglebone-black";
>>>
>>> /* identification */
>>> part-number = "BB-SPI1CLK";
>>> version = "00A0";
>>>
>>> /* Resources */
>>> exclusive-use =
>>> /* Pin header */
>>> "P9.31",/* spi1_sclk */
>>> "P9.29",/* spi1_d0 */
>>> "P9.30",/* spi1_d1 */
>>> "P9.28",/* spi1_cs0 */
>>> /* Hardware */
>>> "spi1";
>>>
>>> fragment@0 {
>>> target = <&am33xx_pinmux>;
>>> __overlay__ {
>>> /* Default has all gpios released, mode uart1 */
>>> pinctrl_spi1: pinctrl_spi1_pins {
>>> pinctrl-single,pins = <
>>> 0x190 0x33 /* P9_31 = mcasp0_aclkx.spi1_sclk,
>>> INPUT_PULLUP | MODE3 */
>>> 0x194 0x33 /* P9_29 = mcasp0_fsx.spi1_d0,
>>> INPUT_PULLUP | MODE3 */
>>> 0x198 0x13 /* P9_30 = mcasp0_axr0.spi1_d1,
>>> OUTPUT_PULLUP | MODE3 */
>>> 0x19c 0x13 /* P9_28 = mcasp0_ahclkr.spi1_cs0,
>>> OUTPUT_PULLUP | MODE3 */
>>> >;
>>> };
>>> };
>>> };
>>>
>>> fragment@1 {
>>> target = <&spi1>;
>>> __overlay__ {
>>> #address-cells = <1>;
>>> #size-cells = <0>;
>>> status = "okay";
>>> pinctrl-names= "default";
>>> pinctrl-0= <&pinctrl_spi1>;
>>> cs-gpios = <&gpio3 17 0>; /*
Re: [beagleboard] DS3234 clock on SPI1
Ok, sorry scratch all the above. I remember Robert saying a few days ago
that SPI must be loaded early at boot in order for it to work correctly.
Some kind of glitch. Read teh last post here:
https://groups.google.com/forum/#!searchin/beagleboard/SPI$20Robert|sort:date/beagleboard/vCFU_NWRdgo/7QGgua-QCgAJ
On Sat, Jul 2, 2016 at 2:47 PM, William Hermans wrote:
> cs-gpios = <&gpio3 17 0>; /* Is this needed ??? */
>
> Double check your pin here make sure it's right. Someone was just saying
> yesterday that the GPIO banks got restructured, and some address got
> switched around. So it is entirely possible the pin you're after is no
> longer on GPIO3 gpio bank.
>
> On Sat, Jul 2, 2016 at 2:33 PM, William Hermans wrote:
>
>> Additionally. You did set the time on the RTC before trying to read from
>> it ?
>>
>> On Sat, Jul 2, 2016 at 2:26 PM, William Hermans
>> wrote:
>>
>>> Have you updated the device tree compiler ? Here, I'm assuming you
>>> simply upgraded the kernel form an image that initially had 3.8.x installed
>>> . . .
>>>
>>>
>>> http://www.embeddedhobbyist.com/2015/09/beaglebone-black-updating-device-tree-files/
>>>
>>> On Sat, Jul 2, 2016 at 2:08 PM, wrote:
>>>
Running kernel 4.4 and trying to read a DS3234 clock on the second SPI
port I can suppress the HDMI pins in uEnv.txt with:
dtb=am335x-boneblack-emmc-overlay.dtb
optargs=cape_disable=bone_capemgr.disable_partno=BB-BONELT-HDMI,BB-BONELT-HDMIN
(uEnv.txt isn't loading the "universal overlay".)
Loading BB-SPIDEV0 and BB-SPI1CLK then produces the expected
/dev/spidev1.0,
/dev/spidev1.1 and /dev/rtc1 devices.
dmesg says:
bone_capemgr bone_capemgr: part_number 'BB-SPI1CLK', version 'N/A'
bone_capemgr bone_capemgr: slot #6: override
bone_capemgr bone_capemgr: Using override eeprom data at slot 6
bone_capemgr bone_capemgr: slot #6: 'Override Board Name,00A0,Override
Manuf,BB-SPI1CLK'
ds3234 spi2.0: Control Reg: 0x00
ds3234 spi2.0: Ctrl/Stat Reg: 0x00
ds3234 spi2.0: rtc core: registered ds3234 as rtc1
bone_capemgr bone_capemgr: slot #6: dtbo 'BB-SPI1CLK-00A0.dtbo' loaded;
overlay id #1
However, there's no spi pingroup, and the relevant pins remain in mode 7
not mode 3, and are unclaimed:
pin 100 (44e10990.0) 0027 pinctrl-single
pin 101 (44e10994.0) 0027 pinctrl-single
pin 102 (44e10998.0) 0027 pinctrl-single
pin 103 (44e1099c.0) 0027 pinctrl-single
pin 100 (44e10990.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 101 (44e10994.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 102 (44e10998.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 103 (44e1099c.0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
and reading the clocks gives:
quid ~ # hwclock -f /dev/rtc0 -r
Sat Jul 2 21:00:10 2016 .954216 seconds
quid ~ # hwclock -f /dev/rtc1 -r
hwclock: ioctl(RTC_RD_TIME) to /dev/rtc1 to read the time failed:
Invalid argument
quid ~ #
The clock overlay worked in 3.8, and I _think_ I've updated it
correctly for
4.4. Can anyone spot what I've missed?
/*
** Dallas DS3234 RTC SPI driver test.
**
** Virtual cape for SPI1 on connector pins P9.29 P9.31 P9.30 P9.28
**
** Pin Identities.
**
** SPI_1 names : CS0, DO,DI,CLK
** P9 pins : 28,29,30,31
** GPIO3 pins : 17,15,16,14
** Processor pins : C12, B13, D12, A13
** SRM table 15 ?? : 214, 210, 212, 218
** Pingroup labels : 103, 101, ???100
** Code offsets: 0x19c, 0x194, 0x198, 0x190
** Base pin gpmc_ad0 has address 0x800 giving:
** : 0x99c, 0x994, 0x998, 0x990
** TRM 9.3 (spi0) : 0x95c, 0x954, 0x958, 0x950
**
** Moved to kernel 4.x GPIO bank numbering.
*/
/dts-v1/;
/plugin/;
/ {
compatible = "ti,beaglebone", "ti,beaglebone-black";
/* identification */
part-number = "BB-SPI1CLK";
version = "00A0";
/* Resources */
exclusive-use =
/* Pin header */
"P9.31",/* spi1_sclk */
"P9.29",/* spi1_d0 */
"P9.30",/* spi1_d1 */
"P9.28",/* spi1_cs0 */
/* Hardware */
"spi1";
fragment@0 {
target = <&am33xx_pinmux>;
__overlay__ {
/* Default has all gpios released, mode uart1 */
pinctrl_spi1: pinctrl_spi1_pins {
pinctrl-single,pins = <
0x190 0x33 /* P9_31 = mcasp0_aclkx.spi1_sclk,
INPUT_PULLUP | MODE3 */
0x194 0x33 /* P9_29 = mcasp0_fsx.spi1_d0,
INPUT_PULLUP | MODE3 */
0x198 0x13 /* P9_30 = mcasp0_axr0.spi1_d1,
OUTPUT_PULLUP | MODE3 */
>>
Re: [beagleboard] DS3234 clock on SPI1
Additionally . . . > dtb=am335x-boneblack-emmc-overlay.dtb > optargs=cape_disable=bone_capemgr.disable_partno=BB-BONELT-HDMI,BB-BONELT-HDMIN Your optargs line is not longer required. Using the am335x-boneblack-emmc-overlay.dtb board file disables hdmi video and audio already. > bone_capemgr bone_capemgr: slot #6: dtbo 'BB-SPI1CLK-00A0.dtbo' loaded; overlay id #1 Your overlay seems to be loaded correctly. One other thing caught my eye that I'm not sure is right or not. P9.28, your CS pin, is active low ? Is that correct ? I was reading this: http://www.sciencegizmo.com.au/?p=105 But if you look towards the bottom for his device tree overlay for the rPI *DS3234 Real Time Clock Bitbang Device Tree Overlay* gpio-mosi = <&gpio 5 0>; gpio-miso = <&gpio 6 0>; gpio-sck = <&gpio 13 0>; *cs-gpios = <&gpio 12 1>;* He has the CS / CE line as active high. So perhaps a moot point, but it caught my eye. > quid ~ # hwclock -f /dev/rtc1 -r > hwclock: ioctl(RTC_RD_TIME) to /dev/rtc1 to read the time failed: Invalid argument The only time I've personally seen this hwclock error is when I attempt to use a non rtc0 ( -> /dev/rtc ) clock without being root. e.g. $ sudo hwclock -r -rtc /dev/rtc1 <--- not run as root user, so will fail with default file permissions. But I'm also using an ds3232( I2C ). Did you double check to make sure the rtc-ds3234 module was loaded via lsmod ? On Sat, Jul 2, 2016 at 3:01 PM, William Hermans wrote: > Ok, sorry scratch all the above. I remember Robert saying a few days ago > that SPI must be loaded early at boot in order for it to work correctly. > Some kind of glitch. Read teh last post here: > https://groups.google.com/forum/#!searchin/beagleboard/SPI$20Robert|sort:date/beagleboard/vCFU_NWRdgo/7QGgua-QCgAJ > > On Sat, Jul 2, 2016 at 2:47 PM, William Hermans wrote: > >> cs-gpios = <&gpio3 17 0>; /* Is this needed ??? */ >> >> Double check your pin here make sure it's right. Someone was just saying >> yesterday that the GPIO banks got restructured, and some address got >> switched around. So it is entirely possible the pin you're after is no >> longer on GPIO3 gpio bank. >> >> On Sat, Jul 2, 2016 at 2:33 PM, William Hermans >> wrote: >> >>> Additionally. You did set the time on the RTC before trying to read from >>> it ? >>> >>> On Sat, Jul 2, 2016 at 2:26 PM, William Hermans >>> wrote: >>> Have you updated the device tree compiler ? Here, I'm assuming you simply upgraded the kernel form an image that initially had 3.8.x installed . . . http://www.embeddedhobbyist.com/2015/09/beaglebone-black-updating-device-tree-files/ On Sat, Jul 2, 2016 at 2:08 PM, wrote: > > Running kernel 4.4 and trying to read a DS3234 clock on the second SPI > port I can suppress the HDMI pins in uEnv.txt with: > > dtb=am335x-boneblack-emmc-overlay.dtb > > optargs=cape_disable=bone_capemgr.disable_partno=BB-BONELT-HDMI,BB-BONELT-HDMIN > > (uEnv.txt isn't loading the "universal overlay".) > > Loading BB-SPIDEV0 and BB-SPI1CLK then produces the expected > /dev/spidev1.0, > /dev/spidev1.1 and /dev/rtc1 devices. > > dmesg says: > bone_capemgr bone_capemgr: part_number 'BB-SPI1CLK', version 'N/A' > bone_capemgr bone_capemgr: slot #6: override > bone_capemgr bone_capemgr: Using override eeprom data at slot 6 > bone_capemgr bone_capemgr: slot #6: 'Override Board Name,00A0,Override > Manuf,BB-SPI1CLK' > ds3234 spi2.0: Control Reg: 0x00 > ds3234 spi2.0: Ctrl/Stat Reg: 0x00 > ds3234 spi2.0: rtc core: registered ds3234 as rtc1 > bone_capemgr bone_capemgr: slot #6: dtbo 'BB-SPI1CLK-00A0.dtbo' > loaded; overlay id #1 > > However, there's no spi pingroup, and the relevant pins remain in mode > 7 > not mode 3, and are unclaimed: > > pin 100 (44e10990.0) 0027 pinctrl-single > pin 101 (44e10994.0) 0027 pinctrl-single > pin 102 (44e10998.0) 0027 pinctrl-single > pin 103 (44e1099c.0) 0027 pinctrl-single > > pin 100 (44e10990.0): (MUX UNCLAIMED) (GPIO UNCLAIMED) > pin 101 (44e10994.0): (MUX UNCLAIMED) (GPIO UNCLAIMED) > pin 102 (44e10998.0): (MUX UNCLAIMED) (GPIO UNCLAIMED) > pin 103 (44e1099c.0): (MUX UNCLAIMED) (GPIO UNCLAIMED) > > and reading the clocks gives: > > quid ~ # hwclock -f /dev/rtc0 -r > Sat Jul 2 21:00:10 2016 .954216 seconds > quid ~ # hwclock -f /dev/rtc1 -r > hwclock: ioctl(RTC_RD_TIME) to /dev/rtc1 to read the time failed: > Invalid argument > quid ~ # > > The clock overlay worked in 3.8, and I _think_ I've updated it > correctly for > 4.4. Can anyone spot what I've missed? > > /* > ** Dallas DS3234 RTC SPI driver test. > ** > ** Virtual cape for SPI1 on connector pins P9.29 P9.31 P9.30 P9.2
