Re: [casper] adc5g Compilation Frequencies

2017-09-12 Thread Franco 

Ok, thanks for the advice.

Franco


On 12/09/17 18:28, John Ford wrote:

Hi Franco.

No, it does not work if you ignore these warnings.  It sort of works.  
Which is worse, IMO...


You should dither your sampling rate until you find something thta 
works and design the system to work with that.


John


On Tue, Sep 12, 2017 at 2:09 PM, Franco > wrote:


Interesting, thanks for the info. Do you know if it is safe to
operate the ADC outside does assigned constraints, assuming the
model meets timing closure?

Franco


On 12/09/17 17:34, David MacMahon wrote:

Hi, Franco,

I'm not extensively familiar with the inner workings of the
AGC5G yellow block, but I suspect the limitation is caused by
the somewhat obscure constraints imposed by the MMCM in the
Virtex 6.  This limitation also affects the ADC16 yellow
block.  More details can be found here:


https://casper.berkeley.edu/wiki/ADC16x250-8#ADC16_Sample_Rate_vs_Virtex-6_MMCM_Limitations



Hope this helps,
Dave

On Sep 12, 2017, at 14:37, Franco > wrote:

Dear Casperites,

Recently I've been testing adc5g block for different
compilation frequency, I figured that the block can be
compiled at [540, 960] U [1080, 2500] MHz, for every other
frequency it gives you a "An optimum PLL solution is not
available!" error. This restrictions come from the Matlab
script 'xps_adc5g.m' that generates the block. The block
does some computation I don't understand to to set the PLL
parameters (or fails to do). Does someone has information
about why this block has that particular behavior? I want
to compile a model at 1000MHz, and I wonder if it is possible.

Many Thanks,

Franco Curotto

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Re: [casper] adc5g Compilation Frequencies

2017-09-12 Thread John Ford 
Hi Franco.

No, it does not work if you ignore these warnings.  It sort of works.
Which is worse, IMO...

You should dither your sampling rate until you find something thta works
and design the system to work with that.

John


On Tue, Sep 12, 2017 at 2:09 PM, Franco  wrote:

> Interesting, thanks for the info. Do you know if it is safe to operate the
> ADC outside does assigned constraints, assuming the model meets timing
> closure?
>
> Franco
>
>
> On 12/09/17 17:34, David MacMahon wrote:
>
>> Hi, Franco,
>>
>> I'm not extensively familiar with the inner workings of the AGC5G yellow
>> block, but I suspect the limitation is caused by the somewhat obscure
>> constraints imposed by the MMCM in the Virtex 6.  This limitation also
>> affects the ADC16 yellow block.  More details can be found here:
>>
>> https://casper.berkeley.edu/wiki/ADC16x250-8#ADC16_Sample_Ra
>> te_vs_Virtex-6_MMCM_Limitations
>>
>> Hope this helps,
>> Dave
>>
>> On Sep 12, 2017, at 14:37, Franco  wrote:
>>>
>>> Dear Casperites,
>>>
>>> Recently I've been testing adc5g block for different compilation
>>> frequency, I figured that the block can be compiled at [540, 960] U [1080,
>>> 2500] MHz, for every other frequency it gives you a "An optimum PLL
>>> solution is not available!" error. This restrictions come from the Matlab
>>> script 'xps_adc5g.m' that generates the block. The block does some
>>> computation I don't understand to to set the PLL parameters (or fails to
>>> do). Does someone has information about why this block has that particular
>>> behavior? I want to compile a model at 1000MHz, and I wonder if it is
>>> possible.
>>>
>>> Many Thanks,
>>>
>>> Franco Curotto
>>>
>>> --
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>>> Groups "casper@lists.berkeley.edu" group.
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>>>
>>
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Re: [casper] adc5g Compilation Frequencies

2017-09-12 Thread Franco 
Interesting, thanks for the info. Do you know if it is safe to operate 
the ADC outside does assigned constraints, assuming the model meets 
timing closure?


Franco

On 12/09/17 17:34, David MacMahon wrote:

Hi, Franco,

I'm not extensively familiar with the inner workings of the AGC5G yellow block, 
but I suspect the limitation is caused by the somewhat obscure constraints 
imposed by the MMCM in the Virtex 6.  This limitation also affects the ADC16 
yellow block.  More details can be found here:

https://casper.berkeley.edu/wiki/ADC16x250-8#ADC16_Sample_Rate_vs_Virtex-6_MMCM_Limitations

Hope this helps,
Dave


On Sep 12, 2017, at 14:37, Franco  wrote:

Dear Casperites,

Recently I've been testing adc5g block for different compilation frequency, I figured 
that the block can be compiled at [540, 960] U [1080, 2500] MHz, for every other 
frequency it gives you a "An optimum PLL solution is not available!" error. 
This restrictions come from the Matlab script 'xps_adc5g.m' that generates the block. The 
block does some computation I don't understand to to set the PLL parameters (or fails to 
do). Does someone has information about why this block has that particular behavior? I 
want to compile a model at 1000MHz, and I wonder if it is possible.

Many Thanks,

Franco Curotto

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Re: [casper] update the uboot file for ROACH2

2017-09-12 Thread Heystek Grobler 
Good day!

I had a simular problem at the beginning of the year with a ROACH1 board.
What are the symptoms of your board? What happens when you hit the power
button?

Kind regards

Heystek



On Tue, 12 Sep 2017 at 6:50 PM pei...@xao.ac.cn  wrote:

> Hi All,
>
> We have a ROACH2 board couldn't boot up, does anyone has experience about
> how to update the uboot file for ROACH2?
> We found some old memo but we are not sure which macros(mac) file is
> correct.
>
>
> Best wishes,
> Pei Xin
> Xinjiang Astronomical Observatory, CAS
>
> --
> pei...@xao.ac.cn
>
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Re: [casper] adc5g Compilation Frequencies

2017-09-12 Thread David MacMahon 
Hi, Franco,

I'm not extensively familiar with the inner workings of the AGC5G yellow block, 
but I suspect the limitation is caused by the somewhat obscure constraints 
imposed by the MMCM in the Virtex 6.  This limitation also affects the ADC16 
yellow block.  More details can be found here:

https://casper.berkeley.edu/wiki/ADC16x250-8#ADC16_Sample_Rate_vs_Virtex-6_MMCM_Limitations

Hope this helps,
Dave

> On Sep 12, 2017, at 14:37, Franco  wrote:
> 
> Dear Casperites,
> 
> Recently I've been testing adc5g block for different compilation frequency, I 
> figured that the block can be compiled at [540, 960] U [1080, 2500] MHz, for 
> every other frequency it gives you a "An optimum PLL solution is not 
> available!" error. This restrictions come from the Matlab script 
> 'xps_adc5g.m' that generates the block. The block does some computation I 
> don't understand to to set the PLL parameters (or fails to do). Does someone 
> has information about why this block has that particular behavior? I want to 
> compile a model at 1000MHz, and I wonder if it is possible.
> 
> Many Thanks,
> 
> Franco Curotto
> 
> -- 
> You received this message because you are subscribed to the Google Groups 
> "casper@lists.berkeley.edu" group.
> To unsubscribe from this group and stop receiving emails from it, send an 
> email to casper+unsubscr...@lists.berkeley.edu.
> To post to this group, send email to casper@lists.berkeley.edu.

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[casper] adc5g Compilation Frequencies

2017-09-12 Thread Franco 

Dear Casperites,

Recently I've been testing adc5g block for different compilation 
frequency, I figured that the block can be compiled at [540, 960] U 
[1080, 2500] MHz, for every other frequency it gives you a "An optimum 
PLL solution is not available!" error. This restrictions come from the 
Matlab script 'xps_adc5g.m' that generates the block. The block does 
some computation I don't understand to to set the PLL parameters (or 
fails to do). Does someone has information about why this block has that 
particular behavior? I want to compile a model at 1000MHz, and I wonder 
if it is possible.


Many Thanks,

Franco Curotto

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[casper] update the uboot file for ROACH2

2017-09-12 Thread pei...@xao.ac.cn 
Hi All,

We have a ROACH2 board couldn't boot up, does anyone has experience about how 
to update the uboot file for ROACH2?
We found some old memo but we are not sure which macros(mac) file is correct.


Best wishes,
Pei Xin 
Xinjiang Astronomical Observatory, CAS



pei...@xao.ac.cn

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