[casper] FPGA boards - Donation.

2023-12-27 Thread Indrajit Barve 

Dear CASPER team,

Seasons greetings..

I am looking for CASPER FPGA board (ROACH 1 or 2)+ 2 Ch ADC. If anyone 
willing to donate it. Please let us know.


Will write you more about the project in detail.

Thanks and regards

Indrajit

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Re: [casper] ROACH 1 root file system image

2023-10-28 Thread Indrajit Barve 
Dear Dr Colm Bracken,I shared the image file here.https://drive.google.com/file/d/13MJ5ad3qi0VIggE98t6lKSJPtqeOScb7/view?usp=drivesdkThanks and regards Indrajit On 27 Oct 2023 19:28, Colm Bracken  wrote: Caution: This email originated outside IIA. 
Hello All,I hope everyone is well.Does anyone have a backup of the UBOOT disk image for ROACH 1?The link that previously hosted the image is now dead, my backup file is corrupted it seems.Thanks a Million,Colm-- Dr
Colm Bracken
Lecturer
Maynooth University Experimental Physics


Maynooth University, Maynooth, Co. Kildare, Ireland.

T: +353 1 708 3641 
E: colm.brac...@mu.ie W: www.maynoothuniversity.ieFollow my work on https://nuim.academia.edu/ColmBracken

 

And

Research
Associate

Astronomy & Astrophysics Section
School of Cosmic Physics
Dublin Institute for Advanced Studies
31 Fitzwilliam Place
Dublin 2, D02 XF86T: +353 1 440 6656 ext 352 
E: cbrac...@cp.dias.ie W: www.dias.ie/2017/06/22/dr-colm-brackenFollow my work on https://nuim.academia.edu/ColmBracken



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Re: [casper] Save the raw data output from the ADC

2023-03-08 Thread Indrajit Barve 

Dear Wang,


I use ROACH 1 with iADC.  Block library's may be different. Logic you 
can use it by replacing the ADC block with your ADC library and 10 GBe 
library.


Thanks and regards

Indrajit


On 08/03/23 1:46 pm, Wang wrote:


Caution: This email originated outside IIA.

Hi Indrajit,

May I ask what is the environment in which you built the model?

And do you have a description of the model？

The model is not complete after I opened it.

Regards
Wang


在2023年3月8日星期三 UTC+8 15:20:54 写道：

Hi Wang,


Generally, I use Burst mode (Non continues ) of RAW voltage
recording for ADC testing and other testing, Herewith I shared the
design file which packs the raw voltage (iADC) into the 10 Gbe.


https://drive.google.com/file/d/17766ANxnbz9Um-RdTiUrtZl5KOQAhNqq/view?usp=sharing

Thanks and regards

Indrajit


On 08/03/23 12:41 pm, Wang wrote:


Caution: This email originated outside IIA.

Hi CASPER，

I built the FX correlator using ROACH2 and GPU server.

Now there is a problem, I want to save the raw data that the ADC
board outputs. I don't know how to do that.

Has anyone thought about this problem or has a way to save ADC
output data?

I would appreciate a lot if you could reply me!

BW！
Wang
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Re: [casper] Save the raw data output from the ADC

2023-03-07 Thread Indrajit Barve 

Hi Wang,


Generally, I use Burst mode (Non continues ) of RAW voltage recording 
for ADC testing and other testing, Herewith I shared the design file 
which packs the raw voltage (iADC) into the 10 Gbe.


https://drive.google.com/file/d/17766ANxnbz9Um-RdTiUrtZl5KOQAhNqq/view?usp=sharing

Thanks and regards

Indrajit


On 08/03/23 12:41 pm, Wang wrote:


Caution: This email originated outside IIA.

Hi CASPER，

I built the FX correlator using ROACH2 and GPU server.

Now there is a problem, I want to save the raw data that the ADC board 
outputs. I don't know how to do that.


Has anyone thought about this problem or has a way to save ADC output 
data?


I would appreciate a lot if you could reply me!

BW！
Wang
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Re: [casper] RA Instruments using CASPER hardware and tools

2022-09-02 Thread Indrajit Barve 

Dear Morag,


GLOSS (Gauribidanur LOw frequency Solar Spectrograph) ROACH 1 + iADC

Gaauribidanur pulsar array (ROACH + QUAD ADC).

Thanks and regards

Indrajit


On 31/08/22 4:23 pm, Morag Brown wrote:


Caution: This email originated outside IIA.

Ciao dalla Sardegna, collaborati!

I'm hoping to put together a more up-to-date list of instruments that 
have been built using CASPER hardware and tools. The most current list 
was compiled in 2016 for the "A Decade of Developing Radio-Astronomy 
Instrumentation using CASPER Open-Source Technology" paper by Jack et 
al, so it could probably use updating.


The list is currently as follows:

*Spectrometers and packetizers -*
Fly’s Eye
GUPPY
CASPER
BPSR
GAVRT
SERENDIP V.v
HiTREKS
NUPPI
Skynet
RATTY
cycSpec
C-BASS
HIPSTER
KuPol
VEGAS
ALMA Phasing Project
Leuschner
R2DBE
DSN Transient Observatory
VGOS
AVN-Ghana
COMAP

*MKID readout systems -*
Columbia MKID
Mustang2
DARKNESS
MEC
BLAST-TNG
HOLMES
*
*
*Correlators and beamformers -*
KAT7
PAPER
ATA
LEDA
ARI
MAD
pocketcorr
Medicina FFTT
GMRT
Meteor
AMI
MeerKAT AR-1
FLAG
BIRALES
Starburst
AMiBA
EOVSA
SWARM
MeerKAT
HERA

If you are not (or know of any instruments that are not) on this list, 
please reach out to me for it to be added?


Grazie!
Morag



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[casper] CASPER Hardware page showing 404 error

2021-12-23 Thread Indrajit Barve 
Dear Casper team,

The link to the following hardware page is showing error 404 on github webpage: 
https://github.com/casper-astro/casper-hardware/blob/master/ADC2x400-14 and old 
CASPER : http://casper.astro.berkeley.edu/wiki/Hardware
Any updates on that.
Season's Greetings
Thanks and regards
Indrajit

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[casper] TDM data FIR LP filter

2020-09-11 Thread Indrajit Barve 
Hello all,

Medicina team / GMRT team
Is there any TDM (X64 ADC )data 32 tap FIR LP filter green block or custom 
Xilinx block.
I am looking into the VEGAS design but it is a parallel streams of the data 
going into the filter section.

Thanks and regards
Indrajit Barve
indra...@iiap.res.in 
(https://link.getmailspring.com/link/020c4e36-0071-48f3-9c4a-677b6260d...@getmailspring.com/0?redirect=mailto%3Aindrajit%40iiap.res.in=Y2FzcGVyQGxpc3RzLmJlcmtlbGV5LmVkdQ%3D%3D)
Radio Astronomy Group 
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[casper] SNAP board writing and reading the registers issue.

2019-12-17 Thread Indrajit Barve 
Dear all,

I could able to program the .bof file on snap program using the old casperfpga 
package.
I am able to see the register values at using the listdev. Where I am trying to 
write and read those registers I am getting errors.

is that KATCP version issues ?
fpga.listdev()
Out[2]:
['adc16_controller',
'adc16_use_synth',
'adc16_wb_ram0',
'adc16_wb_ram1',
'adc16_wb_ram2',
'frame_cnt',
'lmx_ctrl',
'payload_length',
'reset_counts',
'sharaed_bram',
'sys_block',
'sys_board_id',
'sys_clkcounter',
'sys_rev',
'sys_rev_rcs',
'sys_scratchpad',
'xadc']

In [1]: run snap_adc.py
---
KatcpRequestFail Traceback (most recent call last)
/usr/lib/python2.7/dist-packages/IPython/utils/py3compat.pyc in execfile(fname, 
*where)
202 else:
203 filename = fname
--> 204 __builtin__.execfile(filename, *where)

/home/pulsar/Documents/python_workspace/snap_adc.py in ()
8 fpga.program()
9 time.sleep(3)
---> 10 fpga.write_int('payload_length', 1024)
11 fpga.write_int('reset_counts', 2)

/usr/local/lib/python2.7/dist-packages/casperfpga/casperfpga.pyc in 
write_int(self, device_name, integer, blindwrite, word_offset)
285 self.blindwrite(device_name, data, word_offset*4)
286 else:
--> 287 self.write(device_name, data, word_offset*4)
288 LOGGER.debug('%s: write_int %8x to register %s at word offset %d '
289 'okay%s.' % (self.host, integer, device_name,

/usr/local/lib/python2.7/dist-packages/casperfpga/casperfpga.pyc in write(self, 
device_name, data, offset)
228 """
229 self.blindwrite(device_name, data, offset)
--> 230 new_data = self.read(device_name, len(data), offset)
231 if new_data != data:
232 unpacked_wrdata = struct.unpack('>L', data[0:4])[0]

/usr/local/lib/python2.7/dist-packages/casperfpga/katcp_fpga.pyc in read(self, 
device_name, size, offset)
252 require_ok=True,
253 request_args=(device_name, str(offset),
--> 254 str(size)))
255 return reply.arguments[1]
256

/usr/local/lib/python2.7/dist-packages/casperfpga/katcp_fpga.pyc in 
katcprequest(self, name, request_timeout, require_ok, request_args)
161 'Request %s on host %s failed.\n\t'
162 'Request: %s\n\tReply: %s' %
--> 163 (request.name, self.host, request, reply))
164 elif reply.arguments[0] == katcp.Message.INVALID:
165 raise KatcpRequestInvalid(

KatcpRequestFail: Request read on host 192.168.41.159 failed.
Request: ?read payload_length 0 4
Reply: !read fail

Indrajit Barve
indra...@iiap.res.in (mailto:indra...@iiap.res.in)
Radio Astronomy Group (https://maps.google.com/?q=Radio%20Astronomy%20Group%20)

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Re: [casper] SNAP getting started and error on block placement

2019-12-04 Thread Indrajit Barve 
Hi Jack and all,

Longback I used with Matlab 2016b and Xilinx Vivado 2016.4 , But unfortunately 
that PC disk got into issues, So some one using with the above version of 
matlab and Vivado can share their mlib-devel folder.
Thanks and regards

Indrajit Barve

indra...@iiap.res.in (mailto:indra...@iiap.res.in)
Radio Astronomy Group (https://maps.google.com/?q=Radio%20Astronomy%20Group%20)

On Dec 4 2019, at 11:15 pm, Jack Hickish  wrote:
> Hi Indrajit,
>
> Not sure if this is your problem, but the current master branch requires 
> Matlab 2018a and Vivado 2019.1.1 (you need to install the update from 2019.1 
> -> 2019.1.1) as per the docs at 
> https://casper-toolflow.readthedocs.io/en/latest/src/Installing-the-Toolflow.html
>
> By some miracle does that solve your problem?
>
> Cheers
> Jack
>
>
> On Wed, 4 Dec 2019 at 06:22, Indrajit Barve  (mailto:indra...@iiap.res.in)> wrote:
> > Hello all,
> >
> > I just downloaded the casper mlib-devel-master form github. Edited the 
> > paths on startsg.local and I am using Matlab 2016b and Vivado 2016.4 . I am 
> > using Ubuntu 16.04
> > Is the recent versions of mlib-devel-master has some compatibility issues 
> > with above mentioned Matlab and Vivado. and I am getting the error " The 
> > selected library block ' xps_library/Platforms/SNAP' No longer exists. 
> > (please see the attachement)
> >
> > Can some one help me to fix this.
> > Indrajit Barve
> > indra...@iiap.res.in (mailto:indra...@iiap.res.in)
> > Radio Astronomy Group 
> > (https://maps.google.com/?q=Radio%20Astronomy%20Group%20)
> >
> >
> >
> >
> >
> >
> >
> >
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Re: [casper] ROACH Network is unreachable

2019-06-21 Thread Indrajit Barve 
Hello All,

>From my experience with the similar situation format the SD card and load the 
>Linux image newly and set it for acquisition.

Indrajit Barve
indra...@iiap.res.in (mailto:indra...@iiap.res.in)
080-22541492 (tel:080-22541492)

On Jun 21 2019, at 10:43 am, David MacMahon  wrote:
> Assuming you want to use DHCP, what happens if you comment out (or remove) 
> the “iface eth0 inet static” line (and the “address” and “netmask” lines)?
>
> > On Jun 20, 2019, at 18:17, zhang laiyu  wrote:
> > Thanks you.
> > the contents of /etc/network/interfaces:
> >
> > auto eth0
> > iface eth0 inet dhcp
> > iface eth0 inet static
> > address 10.0.0.21
> > netmask 255.255.255.0
> >
> > when I want to start the network, I got some warning:
> > roach:~# /etc/init.d/networking restart
> > Reconfiguring network interfaces...ifdown: failed to open statefile /etc/ne
> > ifup: failed to open statefile /etc/network/run/ifstate: Stale NFS file hae
> > failed.
> >
> > I aslo use this:
> > auto eth0
> > #iface eth0 inet dhcp
> > iface eth0 inet static
> > address 10.0.0.21
> > netmask 255.255.255.0
> >
> > But can not start the network.
> > if I run dhclient and can get IP address.
> >
> >
> > > -Original Messages-
> > > From: "David MacMahon" 
> > > Sent Time: 2019-06-20 22:26:41 (Thursday)
> > > To: casper@lists.berkeley.edu
> > > Cc: "zhang laiyu" , jackhick...@gmail.com
> > > Subject: Re: [casper] ROACH Network is unreachable
> > >
> > > To further Marc’s query: when you mmcboot into the broken system, what 
> > > are the contents of /etc/network/interfaces?
> > > Dave
> > > > > On Jun 20, 2019, at 04:06, Marc  wrote:
> > > > > On 6/20/19, zhang laiyu  wrote:
> > > > > Hi，Marc, Jack
> > > > > I make some progress but it was not solved.
> > > > > I boot the ROACH by 'run mmcboot' and did not got an IP address. And
> > > > > then log in RAOCH as root and try issuing the commands:
> > > > > dhclient -r
> > > > > dhclient
> > > > > ifconfig
> > > > > Then ROACH was assigned an ip address. And can use telnet to login
> > > > > ROACH.
> > > > > But when I reboot the ROACH, ROACH Network is still unreachable.I have
> > > > > to issuing the commands:dhclient again.
> > > > > I also open two ports ( tcp port 53 and udp port 67) in the server.But
> > > > > it still does not work.
> > > > > I think that the DHCP connection doesn't work during boot.But I do not
> > > > > the reason.
> > > >
> > > >
> > > > So if you boot into the broken system and connect via serial cable
> > > > what does the output of
> > > >
> > > > /sbin/ifconfig eth0
> > > > say ? Is there no IP address configured, or is it set to the wrong one
> > > > ? If it is set incorrectly there may be some startup script which has
> > > > some old/stale values set.
> > > > You could try to add a
> > > >
> > > > set -x
> > > > to some of the startup scripts, so that they echo the commands they 
> > > > execute
> > > > regards
> > > > marc
> > > > --
> > > > You received this message because you are subscribed to the Google 
> > > > Groups "casper@lists.berkeley.edu" group.
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> > > > an email to casper+unsubscr...@lists.berkeley.edu.
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> > >
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> >
> >
> >
> > --
> > Cheers!
> > > 
> >
> > ZHANG Laiyu
> > Phone(China) 010-88236415
> >

[casper] casperfpga package issue.

2019-05-09 Thread Indrajit Barve 
Dear Adam,

I followed the steps which you have given in the bellow link to install 
casperfpga package.
https://www.mail-archive.com/casper@lists.berkeley.edu/msg06436.html
https://docs.google.com/document/d/1mqDIwhHo3981_Rq9Ma6Dl8UnQUzPah6DKQ55fsaeI4c/edit
By following the steps via git . Hope it downloads the latest version of katcp 
and casperfpga.
I am using ROACH1 and I am trying to program the device and I am getting the 
following errors.


import time,struct,sys,logging,casperfpga
from struct import *
fpga = casperfpga.katcp_fpga.KatcpFpga('100.100.100.1',7147,10)
bitstream='spectrum_test14_2019_May_09_1616.bof'
fpga.system_info['program_filename'] = bitstream
fpga.program()
time.sleep(3)

'module' object has no attribute 'katcp_fpga'
I tried the other ways
roach = casperfpga.CasperFpga('100.100.100.1')
roach.upload_to_ram_and_program('spectrum_test14_2019_May_09_1616.fpg')

---
TypeError Traceback (most recent call last)
 in ()
> 1 roach.upload_to_ram_and_program('spectrum_test14_2019_May_09_1616.fpg')

/usr/local/lib/python2.7/dist-packages/casperfpga-3.2.dev644+devel.3377047-py2.7-linux-x86_64.egg/casperfpga/casperfpga.pyc
 in upload_to_ram_and_program(self, filename, wait_complete, legacy_reg_map, 
chunk_size, initialise_objects)
278 filename = self.bitstream
279 rv = self.transport.upload_to_ram_and_program(
--> 280 filename=filename, wait_complete=wait_complete, chunk_size=chunk_size)
281 if not wait_complete:
282 return True

TypeError: upload_to_ram_and_program() got an unexpected keyword argument 
'chunk_size'
+

Indrajit Barve
indra...@iiap.res.in (mailto:indra...@iiap.res.in)
080-22541492 (tel:080-22541492)

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Re: [casper] Data-Width Conversion in FIFO

2019-04-29 Thread Indrajit Barve 
Hello Andrew,
​
I also made a block similar to yours using two single port ram. Some small 
delay values need to be adjusted. I tried to open your .slx design file. It has 
some broken links and I tried to remove them and ran a simulation but I am not 
getting the output as expected. May be during Intialisation something going 
wrong and creating the broken link. Can you please check.

Hello Jack , David
Thanks for your inputs.
Indrajit Barve
indra...@iiap.res.in (mailto:indra...@iiap.res.in)
080-22541492 (tel:080-22541492)

On Apr 25 2019, at 6:12 pm, Andrew Martens  wrote:
> Hi Indrajit
>
> This should do something like what you want to do I think.
> Cheers
> Andrew
>
>
> On Thu, Apr 25, 2019 at 6:53 AM Indrajit Barve  (mailto:indra...@iiap.res.in)> wrote:
> > Hello all,
> >
> > I would like to implement a FIFO with input port data type depth and width 
> > of 2048 X 32 and output port data type 1024 X 64. Basically looking a 
> > similar module like this 
> > https://www.xilinx.com/support/documentation/application_notes/xapp261.pdf 
> > . or how to implement / configure Data-Width Conversion for a FIFO on 
> > ROACH1 .
> > Thanks
> > Indrajit
> >
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[casper] Data-Width Conversion in FIFO

2019-04-24 Thread Indrajit Barve 
Hello all,

I would like to implement a FIFO with input port data type depth and width of 
2048 X 32 and output port data type 1024 X 64. Basically looking a similar 
module like this 
https://www.xilinx.com/support/documentation/application_notes/xapp261.pdf . or 
how to implement / configure Data-Width Conversion for a FIFO on ROACH1 .
Thanks
Indrajit

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