[casper] IP address // IBOB

2014-03-11 Thread Rolando Paz 
Hi all again.

I'm trying to understand why when I set the bit file to the FPGA IBOB,
change the IBOB IP address 169.254.177.32 to 192.168.49.32, port 7?

I updated my libraries with
https://casper.berkeley.edu/wiki/images/6/60/6q05d3bE_udp_patch.tar.gz

Then I compiled the new design. I got the bit file to use UDP.

After programming the FPGA with the new bit file happens the IP address
change.

Is this normal behavior?

Best Regards

Rolando Paz

Re: [casper] IP address // IBOB

2014-03-11 Thread G Jones 
Hi Rolando,
Yes, the IP configuration is done in lwipinit.c which I think is part of
the modification in the UDP patch. You can modify it there to whatever you
like.

Glenn


On Tue, Mar 11, 2014 at 12:16 PM, Rolando Paz flx...@gmail.com wrote:

 Hi all again.

 I'm trying to understand why when I set the bit file to the FPGA IBOB,
 change the IBOB IP address 169.254.177.32 to 192.168.49.32, port 7?

 I updated my libraries with
 https://casper.berkeley.edu/wiki/images/6/60/6q05d3bE_udp_patch.tar.gz

 Then I compiled the new design. I got the bit file to use UDP.

 After programming the FPGA with the new bit file happens the IP address
 change.

 Is this normal behavior?

 Best Regards

 Rolando Paz

Re: [casper] IP address // IBOB

2014-03-11 Thread G Jones 
That char ip[4] ={192,168,0,0} sets the top bits of the IP address. If you
look further down in the code, you'll see how fullmac (the MAC hardware
address) is set from the I/O pins, and then ip[3] is set from this too. You
can change this however you want.


On Tue, Mar 11, 2014 at 1:32 PM, Rolando Paz flx...@gmail.com wrote:

 Hi Glenn

 lwipinit.c has the shown in the image lwipinit_c.png

 You can tell me what I should change in lwipinit.c to correct the IP
 address and port?

 Best Regards

 Rolando Paz




 2014-03-11 10:44 GMT-06:00 G Jones glenn.calt...@gmail.com:

 Hi Rolando,
 Yes, the IP configuration is done in lwipinit.c which I think is part of
 the modification in the UDP patch. You can modify it there to whatever you
 like.

 Glenn


 On Tue, Mar 11, 2014 at 12:16 PM, Rolando Paz flx...@gmail.com wrote:

 Hi all again.

 I'm trying to understand why when I set the bit file to the FPGA IBOB,
 change the IBOB IP address 169.254.177.32 to 192.168.49.32, port 7?

 I updated my libraries with
 https://casper.berkeley.edu/wiki/images/6/60/6q05d3bE_udp_patch.tar.gz

 Then I compiled the new design. I got the bit file to use UDP.

 After programming the FPGA with the new bit file happens the IP address
 change.

 Is this normal behavior?

 Best Regards

 Rolando Paz