from:"Jacques Pienaar via cfe\-commits"

[clang-tools-extra] [clang] [flang] [llvm] [compiler-rt] [mlir] [mlir][tosa] Add dialect version. (PR #79514)

2024-02-01 Thread Jacques Pienaar via cfe-commits

jpienaar wrote:

> > To be able to flag incompatible bytecode files rather than have it fail 
> > later in mysterious ways. E.g., allows for a more strict failure.
> 
> That would require some sort of principles and policy around the changes that 
> affect the serialization of this and the maintenance of this version number, 
> I haven't seen a discussion about this: did I miss it?
> 
> Also, TOSA isn't a hermetic dialect: it includes other IR entities from other 
> dialects, and changing these would impact this story as well.

I think you are assuming guarantees here that doesn't exist. This is best 
effort, allows for it/but doesn't make it happen nor enforcement or any such. 
Primarily around TOSA ops and which builtin dialect attributes are used. E.g., 
"bump this if you discover you also need a atomic change TF repo side" kind of 
level: this doesn't remove the need for the change TF repo side along with LLVM 
revision bump, but this does allow for folks using TF via pip and TOSA 
ingestion as well to have a binary interop that keeps working. No requirement 
being placed on community. While allowing folks that care about enabling such 
cases to have it working.

So this is a mechanism with policy TBD.

> IR entities from other dialects

Correct changing builtin dialect serialization would affect this. I think we 
should consider enabling detecting that indeed. If the builtin dialect 
serialization changes, one could get some really random results :) Even 
considered tying those to the bytecode version itself given the impact a change 
could have. That is a good discussion to have but separate from this.

https://github.com/llvm/llvm-project/pull/79514
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[mlir] [libcxx] [flang] [libc] [clang] [lldb] [llvm] [mlir] Skip invalid test on big endian platform (s390x) (PR #80246)

2024-02-01 Thread Jacques Pienaar via cfe-commits


https://github.com/jpienaar approved this pull request.


https://github.com/llvm/llvm-project/pull/80246
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[llvm] [flang] [compiler-rt] [clang-tools-extra] [mlir] [clang] [mlir][tosa] Add dialect version. (PR #79514)

2024-01-31 Thread Jacques Pienaar via cfe-commits

jpienaar wrote:

> This lack some information to me:
> 
> * What is the purpose of this?

To be able to flag incompatible bytecode files rather than have it fail later 
in mysterious ways. E.g., allows for a more strict failure.

> * What kind of compatibility is this supposed to provide?

None today. Aspirational to use to avoid making cross repo changes in more 
atomic manner.

> * What is the versioning scheme?

Version is just a single number but this doesn't mean this is versioned in any 
deep way vs being able to flag incompatible versions (some small update hooks 
such as for things like where i64 attribute is changed to i8 etc could be 
utilized, no promises yet on these existing for any extent of time). Main goal 
is really to reduce cross repo sync changes without initially any additional 
expectations.

Currently there aren't even any tests to flag if a version bump is needed. That 
would be nice, but no policy there yet.

https://github.com/llvm/llvm-project/pull/79514
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[mlir] [llvm] [clang] [compiler-rt] [flang] [clang-tools-extra] [mlir][tosa] Add dialect version. (PR #79514)

2024-01-30 Thread Jacques Pienaar via cfe-commits


https://github.com/jpienaar updated 
https://github.com/llvm/llvm-project/pull/79514

>From 06386cb0d21bb8e210e5ee3eef26df39680fc1d1 Mon Sep 17 00:00:00 2001
From: Jacques Pienaar 
Date: Sat, 21 Oct 2023 17:06:33 -0700
Subject: [PATCH] [mlir][tosa] Add dialect version.

This adds a singular number for the bytecode version. Considered adding
spec related version, but decided that against that as

1) I think one may want to capture the minimum spec to execute
   separately (and it may be function of the ops in the module);
2) Its unrelated to reading the bytecode or upgrade/downgrade. So
   linking these together felt like linking error domains.
---
 mlir/include/mlir/Dialect/Tosa/IR/TosaOps.h |  7 +++
 mlir/lib/Dialect/Tosa/IR/TosaOps.cpp| 22 -
 2 files changed, 24 insertions(+), 5 deletions(-)

diff --git a/mlir/include/mlir/Dialect/Tosa/IR/TosaOps.h 
b/mlir/include/mlir/Dialect/Tosa/IR/TosaOps.h
index a9bc3351f4cff..062fb28f5ebe3 100644
--- a/mlir/include/mlir/Dialect/Tosa/IR/TosaOps.h
+++ b/mlir/include/mlir/Dialect/Tosa/IR/TosaOps.h
@@ -34,6 +34,13 @@ class PatternRewriter;
 
 namespace tosa {
 
+struct TosaDialectVersion : public mlir::DialectVersion {
+  TosaDialectVersion() = default;
+  TosaDialectVersion(uint32_t dialectVersion)
+  : dialectVersion(dialectVersion){};
+  uint32_t dialectVersion = 0;
+};
+
 ParseResult parseTypeOrAttr(OpAsmParser , TypeAttr ,
 Attribute );
 void printTypeOrAttr(OpAsmPrinter , Operation *op, TypeAttr type,
diff --git a/mlir/lib/Dialect/Tosa/IR/TosaOps.cpp 
b/mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
index 729116da45e47..b4035cadce331 100644
--- a/mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
+++ b/mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
@@ -97,18 +97,30 @@ struct TosaDialectBytecodeInterface : public 
BytecodeDialectInterface {
   }
 
   void writeVersion(DialectBytecodeWriter ) const final {
-// TODO: Populate.
+// This is currently not being written currently to allow readers to update
+// first.
+#if 0
+// TODO: This could be refined to not just pick current version.
+auto version = TosaDialectVersion();
+writer.writeVarInt(version.dialectVersion);
+#endif
   }
 
   std::unique_ptr
   readVersion(DialectBytecodeReader ) const final {
-// TODO: Populate
-reader.emitError("Dialect does not support versioning");
-return nullptr;
+uint64_t dialectVersion;
+if (failed(reader.readVarInt(dialectVersion)))
+  return nullptr;
+auto version = std::make_unique();
+version->dialectVersion = dialectVersion;
+return version;
   }
 
   LogicalResult upgradeFromVersion(Operation *topLevelOp,
-   const DialectVersion _) const final 
{
+   const DialectVersion ) const final {
+const auto  = static_cast(version);
+// No upgrades currently defined.
+(void)tosaVersion;
 return success();
   }
 };

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[clang] [clang-tools-extra] [llvm] [libc] [flang] [mlir] [compiler-rt] [libcxx] [mlir][spirv] Implement gpu::TargetAttrInterface (PR #69949)

2023-11-05 Thread Jacques Pienaar via cfe-commits



@@ -15,6 +15,7 @@
 
 #include "Utils.h"
 #include "mlir/Dialect/GPU/IR/GPUDialect.h"
+#include "mlir/Dialect/SPIRV/IR/SPIRVAttributes.h"

jpienaar wrote:

This feels off: you have GPU dialect transforms depending on SPIRV 
attributes/dialect (esp in header). Why is this pass in GPU dialect rather than 
SPIRV one?

https://github.com/llvm/llvm-project/pull/69949
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[clang-tools-extra] [mlir] Add config for PDL (PR #69927)

2023-10-27 Thread Jacques Pienaar via cfe-commits

jpienaar wrote:

> Can you expand on the motivation? Why is it a problem that PDL is always 
> included? Your description isn’t very explicit on the impact.

Done. Its not PDL specific, I think it is a problem if any dialect is always 
included even if not used :) The others just have a simple method to elide.

https://github.com/llvm/llvm-project/pull/69927
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[clang] [mlir] Add config for PDL (PR #69927)

2023-10-27 Thread Jacques Pienaar via cfe-commits

jpienaar wrote:

> Can you expand on the motivation? Why is it a problem that PDL is always 
> included? Your description isn’t very explicit on the impact.

Done. Its not PDL specific, I think it is a problem if any dialect is always 
included even if not used :) The others just have a simple method to elide.

https://github.com/llvm/llvm-project/pull/69927
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[clang-tools-extra] [mlir] Add config for PDL (PR #69927)

2023-10-27 Thread Jacques Pienaar via cfe-commits


https://github.com/jpienaar edited 
https://github.com/llvm/llvm-project/pull/69927
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[clang] [mlir] Add config for PDL (PR #69927)

2023-10-27 Thread Jacques Pienaar via cfe-commits


https://github.com/jpienaar edited 
https://github.com/llvm/llvm-project/pull/69927
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[clang-tools-extra] [mlir] Add config for PDL (PR #69927)

2023-10-23 Thread Jacques Pienaar via cfe-commits


https://github.com/jpienaar updated 
https://github.com/llvm/llvm-project/pull/69927

>From eea36708d838411d70eb99265c3a2f3aabb91460 Mon Sep 17 00:00:00 2001
From: Jacques Pienaar 
Date: Sun, 22 Oct 2023 09:33:40 -0700
Subject: [PATCH] [mlir] Add config for PDL

Make it so that PDL can be optionally disabled. PDL is different than
other dialects as its included in rewrite framework. This results in
these being included even where it isn't used and not removed during
compilation. Add option to disable for workloads where it isn't needed
or used. This ends up being rather invasive due to how PDL is included.
Ideally we'd have less ifdefs, not particularly happy with those, but
given how integrated it is, couldn't see simple alternative.

PDL is enabled by default (and not optional bazel).

This only works with tests disabled. With tests enabled this still
compiles but tests fail as there is no lit config to disable tests that
depend on PDL yet.
---
 mlir/CMakeLists.txt   | 12 ++--
 mlir/cmake/modules/AddMLIR.cmake  |  3 +
 mlir/examples/CMakeLists.txt  |  4 +-
 mlir/examples/minimal-opt/README.md   |  7 ++-
 mlir/include/mlir/Config/mlir-config.h.cmake  |  3 +
 mlir/include/mlir/Conversion/Passes.td|  2 +
 mlir/include/mlir/Dialect/CMakeLists.txt  |  6 +-
 .../mlir/Dialect/Transform/CMakeLists.txt |  4 +-
 mlir/include/mlir/IR/PatternMatch.h   | 17 +
 mlir/include/mlir/InitAllDialects.h   |  9 ++-
 mlir/include/mlir/InitAllExtensions.h | 11 +++-
 .../mlir/Rewrite/FrozenRewritePatternSet.h|  6 ++
 mlir/include/mlir/Rewrite/PatternApplicator.h |  5 ++
 .../mlir/Transforms/DialectConversion.h   |  2 +
 mlir/lib/CAPI/Dialect/CMakeLists.txt  | 18 +++---
 mlir/lib/Conversion/CMakeLists.txt|  4 +-
 mlir/lib/Dialect/Bufferization/CMakeLists.txt |  4 +-
 .../Bufferization/TransformOps/CMakeLists.txt |  1 -
 mlir/lib/Dialect/CMakeLists.txt   |  6 +-
 mlir/lib/Dialect/Transform/CMakeLists.txt |  4 +-
 mlir/lib/IR/PatternMatch.cpp  |  2 +
 mlir/lib/Rewrite/CMakeLists.txt   | 24 +--
 mlir/lib/Rewrite/FrozenRewritePatternSet.cpp  | 13 +++-
 mlir/lib/Rewrite/PatternApplicator.cpp| 26 +++-
 mlir/lib/Tools/CMakeLists.txt |  6 +-
 .../Transforms/Utils/DialectConversion.cpp|  2 +
 mlir/python/CMakeLists.txt| 62 ++-
 mlir/test/CAPI/CMakeLists.txt | 16 ++---
 mlir/test/CMakeLists.txt  | 20 --
 mlir/test/lib/Dialect/CMakeLists.txt  |  5 +-
 mlir/test/lib/Rewrite/CMakeLists.txt  |  3 +-
 mlir/test/lib/Tools/CMakeLists.txt|  4 +-
 mlir/test/lib/Transforms/CMakeLists.txt   | 28 ++---
 mlir/tools/CMakeLists.txt |  4 +-
 mlir/tools/mlir-lsp-server/CMakeLists.txt | 10 ++-
 .../tools/mlir-lsp-server/mlir-lsp-server.cpp |  4 ++
 mlir/tools/mlir-opt/CMakeLists.txt| 10 ++-
 mlir/tools/mlir-opt/mlir-opt.cpp  | 16 +++--
 mlir/unittests/Conversion/CMakeLists.txt  |  4 +-
 mlir/unittests/Dialect/CMakeLists.txt |  4 +-
 .../llvm-project-overlay/mlir/BUILD.bazel |  1 +
 41 files changed, 283 insertions(+), 109 deletions(-)

diff --git a/mlir/CMakeLists.txt b/mlir/CMakeLists.txt
index ac120aad0d1eda7..d0db9e341765b3d 100644
--- a/mlir/CMakeLists.txt
+++ b/mlir/CMakeLists.txt
@@ -132,6 +132,8 @@ set(MLIR_ENABLE_NVPTXCOMPILER 0 CACHE BOOL
 "Statically link the nvptxlibrary instead of calling ptxas as a subprocess 
\
 for compiling PTX to cubin")
 
+set(MLIR_ENABLE_PDL 1 CACHE BOOL "Enable PDL")
+
 option(MLIR_INCLUDE_TESTS
"Generate build targets for the MLIR unit tests."
${LLVM_INCLUDE_TESTS})
@@ -179,12 +181,14 @@ include_directories( ${MLIR_INCLUDE_DIR})
 # from another directory like tools
 add_subdirectory(tools/mlir-tblgen)
 add_subdirectory(tools/mlir-linalg-ods-gen)
-add_subdirectory(tools/mlir-pdll)
-
 set(MLIR_TABLEGEN_EXE "${MLIR_TABLEGEN_EXE}" CACHE INTERNAL "")
 set(MLIR_TABLEGEN_TARGET "${MLIR_TABLEGEN_TARGET}" CACHE INTERNAL "")
-set(MLIR_PDLL_TABLEGEN_EXE "${MLIR_PDLL_TABLEGEN_EXE}" CACHE INTERNAL "")
-set(MLIR_PDLL_TABLEGEN_TARGET "${MLIR_PDLL_TABLEGEN_TARGET}" CACHE INTERNAL "")
+
+if(MLIR_ENABLE_PDL)
+  add_subdirectory(tools/mlir-pdll)
+  set(MLIR_PDLL_TABLEGEN_EXE "${MLIR_PDLL_TABLEGEN_EXE}" CACHE INTERNAL "")
+  set(MLIR_PDLL_TABLEGEN_TARGET "${MLIR_PDLL_TABLEGEN_TARGET}" CACHE INTERNAL 
"")
+endif()
 
 add_subdirectory(include/mlir)
 add_subdirectory(lib)
diff --git a/mlir/cmake/modules/AddMLIR.cmake b/mlir/cmake/modules/AddMLIR.cmake
index 544abe43688820e..f20a2bc75d5433b 100644
--- a/mlir/cmake/modules/AddMLIR.cmake
+++ b/mlir/cmake/modules/AddMLIR.cmake
@@ -6,6 +6,9 @@ include(LLVMDistributionSupport)
 file(REMOVE ${CMAKE_BINARY_DIR}/tablegen_compile_commands.yml)
 
 function(mlir_tablegen ofn)
+  if

[clang] [mlir] Add config for PDL (PR #69927)

2023-10-23 Thread Jacques Pienaar via cfe-commits


https://github.com/jpienaar updated 
https://github.com/llvm/llvm-project/pull/69927

>From eea36708d838411d70eb99265c3a2f3aabb91460 Mon Sep 17 00:00:00 2001
From: Jacques Pienaar 
Date: Sun, 22 Oct 2023 09:33:40 -0700
Subject: [PATCH] [mlir] Add config for PDL

Make it so that PDL can be optionally disabled. PDL is different than
other dialects as its included in rewrite framework. This results in
these being included even where it isn't used and not removed during
compilation. Add option to disable for workloads where it isn't needed
or used. This ends up being rather invasive due to how PDL is included.
Ideally we'd have less ifdefs, not particularly happy with those, but
given how integrated it is, couldn't see simple alternative.

PDL is enabled by default (and not optional bazel).

This only works with tests disabled. With tests enabled this still
compiles but tests fail as there is no lit config to disable tests that
depend on PDL yet.
---
 mlir/CMakeLists.txt   | 12 ++--
 mlir/cmake/modules/AddMLIR.cmake  |  3 +
 mlir/examples/CMakeLists.txt  |  4 +-
 mlir/examples/minimal-opt/README.md   |  7 ++-
 mlir/include/mlir/Config/mlir-config.h.cmake  |  3 +
 mlir/include/mlir/Conversion/Passes.td|  2 +
 mlir/include/mlir/Dialect/CMakeLists.txt  |  6 +-
 .../mlir/Dialect/Transform/CMakeLists.txt |  4 +-
 mlir/include/mlir/IR/PatternMatch.h   | 17 +
 mlir/include/mlir/InitAllDialects.h   |  9 ++-
 mlir/include/mlir/InitAllExtensions.h | 11 +++-
 .../mlir/Rewrite/FrozenRewritePatternSet.h|  6 ++
 mlir/include/mlir/Rewrite/PatternApplicator.h |  5 ++
 .../mlir/Transforms/DialectConversion.h   |  2 +
 mlir/lib/CAPI/Dialect/CMakeLists.txt  | 18 +++---
 mlir/lib/Conversion/CMakeLists.txt|  4 +-
 mlir/lib/Dialect/Bufferization/CMakeLists.txt |  4 +-
 .../Bufferization/TransformOps/CMakeLists.txt |  1 -
 mlir/lib/Dialect/CMakeLists.txt   |  6 +-
 mlir/lib/Dialect/Transform/CMakeLists.txt |  4 +-
 mlir/lib/IR/PatternMatch.cpp  |  2 +
 mlir/lib/Rewrite/CMakeLists.txt   | 24 +--
 mlir/lib/Rewrite/FrozenRewritePatternSet.cpp  | 13 +++-
 mlir/lib/Rewrite/PatternApplicator.cpp| 26 +++-
 mlir/lib/Tools/CMakeLists.txt |  6 +-
 .../Transforms/Utils/DialectConversion.cpp|  2 +
 mlir/python/CMakeLists.txt| 62 ++-
 mlir/test/CAPI/CMakeLists.txt | 16 ++---
 mlir/test/CMakeLists.txt  | 20 --
 mlir/test/lib/Dialect/CMakeLists.txt  |  5 +-
 mlir/test/lib/Rewrite/CMakeLists.txt  |  3 +-
 mlir/test/lib/Tools/CMakeLists.txt|  4 +-
 mlir/test/lib/Transforms/CMakeLists.txt   | 28 ++---
 mlir/tools/CMakeLists.txt |  4 +-
 mlir/tools/mlir-lsp-server/CMakeLists.txt | 10 ++-
 .../tools/mlir-lsp-server/mlir-lsp-server.cpp |  4 ++
 mlir/tools/mlir-opt/CMakeLists.txt| 10 ++-
 mlir/tools/mlir-opt/mlir-opt.cpp  | 16 +++--
 mlir/unittests/Conversion/CMakeLists.txt  |  4 +-
 mlir/unittests/Dialect/CMakeLists.txt |  4 +-
 .../llvm-project-overlay/mlir/BUILD.bazel |  1 +
 41 files changed, 283 insertions(+), 109 deletions(-)

diff --git a/mlir/CMakeLists.txt b/mlir/CMakeLists.txt
index ac120aad0d1eda7..d0db9e341765b3d 100644
--- a/mlir/CMakeLists.txt
+++ b/mlir/CMakeLists.txt
@@ -132,6 +132,8 @@ set(MLIR_ENABLE_NVPTXCOMPILER 0 CACHE BOOL
 "Statically link the nvptxlibrary instead of calling ptxas as a subprocess 
\
 for compiling PTX to cubin")
 
+set(MLIR_ENABLE_PDL 1 CACHE BOOL "Enable PDL")
+
 option(MLIR_INCLUDE_TESTS
"Generate build targets for the MLIR unit tests."
${LLVM_INCLUDE_TESTS})
@@ -179,12 +181,14 @@ include_directories( ${MLIR_INCLUDE_DIR})
 # from another directory like tools
 add_subdirectory(tools/mlir-tblgen)
 add_subdirectory(tools/mlir-linalg-ods-gen)
-add_subdirectory(tools/mlir-pdll)
-
 set(MLIR_TABLEGEN_EXE "${MLIR_TABLEGEN_EXE}" CACHE INTERNAL "")
 set(MLIR_TABLEGEN_TARGET "${MLIR_TABLEGEN_TARGET}" CACHE INTERNAL "")
-set(MLIR_PDLL_TABLEGEN_EXE "${MLIR_PDLL_TABLEGEN_EXE}" CACHE INTERNAL "")
-set(MLIR_PDLL_TABLEGEN_TARGET "${MLIR_PDLL_TABLEGEN_TARGET}" CACHE INTERNAL "")
+
+if(MLIR_ENABLE_PDL)
+  add_subdirectory(tools/mlir-pdll)
+  set(MLIR_PDLL_TABLEGEN_EXE "${MLIR_PDLL_TABLEGEN_EXE}" CACHE INTERNAL "")
+  set(MLIR_PDLL_TABLEGEN_TARGET "${MLIR_PDLL_TABLEGEN_TARGET}" CACHE INTERNAL 
"")
+endif()
 
 add_subdirectory(include/mlir)
 add_subdirectory(lib)
diff --git a/mlir/cmake/modules/AddMLIR.cmake b/mlir/cmake/modules/AddMLIR.cmake
index 544abe43688820e..f20a2bc75d5433b 100644
--- a/mlir/cmake/modules/AddMLIR.cmake
+++ b/mlir/cmake/modules/AddMLIR.cmake
@@ -6,6 +6,9 @@ include(LLVMDistributionSupport)
 file(REMOVE ${CMAKE_BINARY_DIR}/tablegen_compile_commands.yml)
 
 function(mlir_tablegen ofn)
+  if

[clang-tools-extra] a9f9f3d - Correct typos (NFC)

2022-12-16 Thread Jacques Pienaar via cfe-commits


Author: Sprite
Date: 2022-12-16T10:51:26-08:00
New Revision: a9f9f3dff474b7bdb19129eaf625d3ef0084a975

URL: 
https://github.com/llvm/llvm-project/commit/a9f9f3dff474b7bdb19129eaf625d3ef0084a975
DIFF: 
https://github.com/llvm/llvm-project/commit/a9f9f3dff474b7bdb19129eaf625d3ef0084a975.diff

LOG: Correct typos (NFC)

Just found some typos while reading the llvm/circt project.

compliment -> complement
emitsd -> emits

Added: 


Modified: 
clang-tools-extra/clang-tidy/abseil/DurationRewriter.cpp
clang/lib/StaticAnalyzer/Core/TextDiagnostics.cpp
clang/test/CodeGen/X86/x86-GCC-inline-asm-Y-constraints.c
llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
llvm/lib/CodeGen/CodeGenPrepare.cpp
llvm/lib/CodeGen/SplitKit.h
llvm/test/MC/X86/x86-GCC-inline-asm-Y-constraints.ll
mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td

Removed: 




diff  --git a/clang-tools-extra/clang-tidy/abseil/DurationRewriter.cpp 
b/clang-tools-extra/clang-tidy/abseil/DurationRewriter.cpp
index ce012653941d4..43f8ed709651b 100644
--- a/clang-tools-extra/clang-tidy/abseil/DurationRewriter.cpp
+++ b/clang-tools-extra/clang-tidy/abseil/DurationRewriter.cpp
@@ -273,7 +273,7 @@ std::string rewriteExprFromNumberToDuration(
 const Expr *Node) {
   const Expr  = *Node->IgnoreParenImpCasts();
 
-  // First check to see if we can undo a complimentary function call.
+  // First check to see if we can undo a complementary function call.
   if (llvm::Optional MaybeRewrite =
   rewriteInverseDurationCall(Result, Scale, RootNode))
 return *MaybeRewrite;
@@ -291,7 +291,7 @@ std::string rewriteExprFromNumberToTime(
 const Expr *Node) {
   const Expr  = *Node->IgnoreParenImpCasts();
 
-  // First check to see if we can undo a complimentary function call.
+  // First check to see if we can undo a complementary function call.
   if (llvm::Optional MaybeRewrite =
   rewriteInverseTimeCall(Result, Scale, RootNode))
 return *MaybeRewrite;

diff  --git a/clang/lib/StaticAnalyzer/Core/TextDiagnostics.cpp 
b/clang/lib/StaticAnalyzer/Core/TextDiagnostics.cpp
index bc1c3efaa8548..05f4d19ebda0e 100644
--- a/clang/lib/StaticAnalyzer/Core/TextDiagnostics.cpp
+++ b/clang/lib/StaticAnalyzer/Core/TextDiagnostics.cpp
@@ -31,8 +31,8 @@ using namespace ento;
 using namespace tooling;
 
 namespace {
-/// Emitsd minimal diagnostics (report message + notes) for the 'none' output
-/// type to the standard error, or to compliment many others. Emits detailed
+/// Emits minimal diagnostics (report message + notes) for the 'none' output
+/// type to the standard error, or to complement many others. Emits detailed
 /// diagnostics in textual format for the 'text' output type.
 class TextDiagnostics : public PathDiagnosticConsumer {
   PathDiagnosticConsumerOptions DiagOpts;

diff  --git a/clang/test/CodeGen/X86/x86-GCC-inline-asm-Y-constraints.c 
b/clang/test/CodeGen/X86/x86-GCC-inline-asm-Y-constraints.c
index 07bd045677db9..92313b00fa5dd 100644
--- a/clang/test/CodeGen/X86/x86-GCC-inline-asm-Y-constraints.c
+++ b/clang/test/CodeGen/X86/x86-GCC-inline-asm-Y-constraints.c
@@ -1,6 +1,6 @@
 // RUN: %clang_cc1 -ffreestanding  -triple=x86_64-apple-darwin -target-cpu skx 
%s -emit-llvm -o - | FileCheck %s
 #include 
-// This test is complimented by the .ll test under llvm/test/MC/X86/. 
+// This test is complemented by the .ll test under llvm/test/MC/X86/. 
 // At this level we can only check if the constarints are passed correctly
 // from inline asm to llvm IR.
 

diff  --git a/llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst 
b/llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
index a2501110b595d..882531473947f 100644
--- a/llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
+++ b/llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
@@ -222,7 +222,7 @@ evaluation error, than having to force an implementation to 
support potentially
 infinite precision offsets to allow it to correctly track a series of positive
 and negative offsets that may transiently overflow or underflow, but end up in
 range. This is simple for the arithmetic operations as they are defined in 
terms
-of two's compliment arithmetic on a base type of a fixed size. Therefore, the
+of two's complement arithmetic on a base type of a fixed size. Therefore, the
 offset operation define that integer overflow is ill-formed. This is in 
contrast
 to the ``DW_OP_plus``, ``DW_OP_plus_uconst``, and ``DW_OP_minus`` arithmetic
 operations which define that it causes wrap-around.

diff  --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp 
b/llvm/lib/CodeGen/CodeGenPrepare.cpp
index e6fea6f81c2ab..ab27fcbe2fd2b 100644
--- a/llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -4024,11 +4024,11 @@ bool AddressingModeMatcher::matchScaledValue(Value 
*ScaleReg, int64_t Scale,
 auto IVInc = getIVIncrement(PN, );

[clang] 270d580 - [analyzer] Avoid unused variable warning in opt build

2020-06-12 Thread Jacques Pienaar via cfe-commits


Author: Jacques Pienaar
Date: 2020-06-12T09:48:49-07:00
New Revision: 270d580a0e9ff2f2e1b6240fccedee7c25dc3bfa

URL: 
https://github.com/llvm/llvm-project/commit/270d580a0e9ff2f2e1b6240fccedee7c25dc3bfa
DIFF: 
https://github.com/llvm/llvm-project/commit/270d580a0e9ff2f2e1b6240fccedee7c25dc3bfa.diff

LOG: [analyzer] Avoid unused variable warning in opt build

Added: 


Modified: 
clang/lib/StaticAnalyzer/Frontend/CheckerRegistry.cpp

Removed: 




diff  --git a/clang/lib/StaticAnalyzer/Frontend/CheckerRegistry.cpp 
b/clang/lib/StaticAnalyzer/Frontend/CheckerRegistry.cpp
index 4a7e0d91ea23..461d08f3d2c7 100644
--- a/clang/lib/StaticAnalyzer/Frontend/CheckerRegistry.cpp
+++ b/clang/lib/StaticAnalyzer/Frontend/CheckerRegistry.cpp
@@ -297,7 +297,9 @@ CheckerRegistry::CheckerRegistry(
  "A strong dependency mustn't have weak dependencies!");
   assert(WeakDepPair.second != DepPair.second &&
  "A strong dependency mustn't be a weak dependency as well!");
+  (void)WeakDepPair;
 }
+(void)DepPair;
   }
 #endif
 



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Re: [PATCH] D70172: [CUDA][HIP][OpenMP] Emit deferred diagnostics by a post-parsing AST travese

2020-02-18 Thread Jacques Pienaar via cfe-commits

How did you come to this conclusion?
https://buildkite.com/mlir/mlir-core/builds/2790#9ecce42d-5a20-4e52-8621-c7c0dcee7aa7
is
a clean build at e8e078c8bf7987b95298062a644bac9eed26f988 that is just
before 1b978ddba05cb15e22b4e75adb5e7362ad861987 (if I look at commits on
github) and at fb44b9db95a333efdfa9a33ddc1778f97428f5f5 that is just after
20c5968e0953d978be4d9d1062801e8758c393b5 it is also green. And I have
hourly builds that are green for days before.

-- Jacques

On Mon, Feb 17, 2020 at 4:51 PM Liu, Yaxun (Sam)  wrote:

> [AMD Official Use Only - Internal Distribution Only]
>
> It seems to be caused by some commit hash before
> 20c5968e0953d978be4d9d1062801e8758c393b5.
>
> Sam
>
> -Original Message-
> From: Jacques Pienaar via Phabricator 
> Sent: Monday, February 17, 2020 10:58 AM
> To: Liu, Yaxun (Sam) ; t...@google.com;
> rjmcc...@gmail.com; rich...@metafoo.co.uk; jdoerf...@anl.gov;
> a.bat...@hotmail.com
> Cc: jpien...@google.com; mask...@google.com; michael.hl...@gmail.com;
> mariya.podchishcha...@intel.com; alexey.ba...@intel.com;
> zhang.guans...@gmail.com; her...@google.com; r...@google.com;
> cfe-commits@lists.llvm.org; mlek...@skidmore.edu; blitzrak...@gmail.com;
> shen...@google.com
> Subject: [PATCH] D70172: [CUDA][HIP][OpenMP] Emit deferred diagnostics by
> a post-parsing AST travese
>
> [CAUTION: External Email]
>
> jpienaar added a comment.
>
> This seems to result in triggering clang/lib/CodeGen/CGExpr.cpp:2626 when
> compiling mlir/lib/Transforms/AffineDataCopyGeneration.cpp with clang build
> with assertions on (clean build at e8e078c <
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Freviews.llvm.org%2FrGe8e078c8bf7987b95298062a644bac9eed26f988data=02%7C01%7Cyaxun.liu%40amd.com%7C929d8d11429a4c4072e108d7b3db6042%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637175627129064872sdata=J%2FZKM2oBbn9XTXKRLgonFUWYktyIjlKQF5LVmwmvnkQ%3Dreserved=0>
> just before this change, broken at this, assert triggering at build fix
> commit).
>
>
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbuildkite.com%2Fmlir%2Fmlir-core%2Fbuilds%2F2792%23a54fb239-718b-4f0b-a309-f83e46ceb252data=02%7C01%7Cyaxun.liu%40amd.com%7C929d8d11429a4c4072e108d7b3db6042%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637175627129064872sdata=nma5u9l5h6tkzQEX0hVfYe6VJQBXubt%2FCOF%2BWyWSujM%3Dreserved=0
>
>
> Repository:
>   rG LLVM Github Monorepo
>
> CHANGES SINCE LAST ACTION
>
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Freviews.llvm.org%2FD70172%2Fnew%2Fdata=02%7C01%7Cyaxun.liu%40amd.com%7C929d8d11429a4c4072e108d7b3db6042%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637175627129064872sdata=yGGqSBdf6zVYW7IDFW57UEagQAyvaOfn2a8xu%2BaIr9o%3Dreserved=0
>
>
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Freviews.llvm.org%2FD70172data=02%7C01%7Cyaxun.liu%40amd.com%7C929d8d11429a4c4072e108d7b3db6042%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637175627129064872sdata=sbHpgiR9tKyv0%2F4ZnuhUX%2BFaIHdtwoHTyOJxX1%2F46mg%3Dreserved=0
>
>
>


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Re: [PATCH] D9168: [NVPTX] Check if callsite is defined when computing argument allignment

2016-09-20 Thread Jacques Pienaar via cfe-commits

jpienaar accepted this revision.
jpienaar added a reviewer: jpienaar.
jpienaar added a comment.
This revision is now accepted and ready to land.

Looks good to me, do you need help submitting?



Comment at: lib/Target/NVPTX/NVPTXISelLowering.cpp:1032
@@ +1031,3 @@
+  if (!CS) {
+// callsize is zero, fallback to ABI type alignment
+return DL.getABITypeAlignment(Ty);

s/callsize/Call site/ ?


https://reviews.llvm.org/D9168



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Re: [PATCH] D9168: [NVPTX] Check if callsite is defined when computing argument allignment

2016-09-20 Thread Jacques Pienaar via cfe-commits

jpienaar added a comment.

Cool. I didn't know the review system allows having the patch updated like this 
:) It still reports me as the author and you as a subscriber. I don't think 
that matters.



Comment at: lib/Target/NVPTX/NVPTXISelLowering.cpp:1033
@@ +1032,3 @@
+  const DataLayout ) const {
+  if (CS) {
+unsigned Align = 0;

There is a preference to early exits. So perhaps:
  if (!CS)
return DL.getABITTypeAlignment(Ty);


Comment at: lib/Target/NVPTX/NVPTXISelLowering.cpp:1131
@@ -1128,3 +1130,3 @@
 
-unsigned align = getArgumentAlignment(Callee, CS, Ty, paramCount + 1);
+unsigned align = getArgumentAlignment(Callee, CS, Ty, paramCount + 1, 
DL);
 // declare .param .align  .b8 .param[];

Move this to a new line to avoid exceeding 80 chars.

There are a couple of other formatting changes needed to. The simplest way is 
to use clang-format. To have the changes you added reformatted you could use 
clang-format-diff.py:
svn diff --diff-cmd=diff -x-U0 | 
./tools/clang/tools/clang-format/clang-format-diff.py 


Comment at: test/CodeGen/NVPTX/zero-cs.ll:1
@@ +1,2 @@
+; RUN: not llc < %s -march=nvptx 2>&1 | FileCheck %s
+

Could you add a comment explaining what this test is testing?

So this test case would fail previously (dereference null pointer) and now pass 
(return error)?


https://reviews.llvm.org/D9168



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Re: [PATCH] D9168: [NVPTX] Check if callsite is defined when computing argument allignment

2016-09-19 Thread Jacques Pienaar via cfe-commits

@Valentin: It would be great if you could give it a go. I tried
resurrecting it earlier today but noticed getDataLayout() had been removed
and then I got tied up with other pending work.

On Mon, Sep 19, 2016 at 5:11 PM, Valentin Churavy 
wrote:

> vchuravy added a comment.
>
> @jpienaar are you planning to work on this again? Or should I give it a go?
>
>
> https://reviews.llvm.org/D9168
>
>
>
>
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Re: [PATCH] D9168: [NVPTX] Check if callsite is defined when computing argument allignment

2016-09-19 Thread Jacques Pienaar via cfe-commits

jpienaar added a comment.

Oh, sorry, I didn't see your response before I clicked abandoned. It has been a 
while, so this patch is pretty stale.


https://reviews.llvm.org/D9168



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Re: r267496 - [lanai] Update handling of structs in arguments to be passed in registers.

2016-04-26 Thread Jacques Pienaar via cfe-commits

Thanks for fixing this. My apologies for breaking this and not noticing &
fixing it earlier. Is there any way to test the Windows build without a
Windows machine at my disposal?

On Mon, Apr 25, 2016 at 6:59 PM, Kostya Serebryany <k...@google.com> wrote:

> Hopefully fixed by r267513.
>
> On Mon, Apr 25, 2016 at 6:46 PM, Kostya Serebryany <k...@google.com> wrote:
>
>> +rnk
>>
>> On Mon, Apr 25, 2016 at 5:09 PM, Jacques Pienaar via cfe-commits <
>> cfe-commits@lists.llvm.org> wrote:
>>
>>> Author: jpienaar
>>> Date: Mon Apr 25 19:09:29 2016
>>> New Revision: 267496
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=267496=rev
>>> Log:
>>> [lanai] Update handling of structs in arguments to be passed in
>>> registers.
>>>
>>> Previously aggregate types were passed byval, change the ABI to pass
>>> these in registers instead.
>>>
>>>
>>> Modified:
>>> cfe/trunk/lib/CodeGen/TargetInfo.cpp
>>> cfe/trunk/test/CodeGen/lanai-arguments.c
>>>
>>> Modified: cfe/trunk/lib/CodeGen/TargetInfo.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/
>>> TargetInfo.cpp?rev=267496=267495=267496=diff
>>> 
>>> ==
>>> --- cfe/trunk/lib/CodeGen/TargetInfo.cpp (original)
>>> +++ cfe/trunk/lib/CodeGen/TargetInfo.cpp Mon Apr 25 19:09:29 2016
>>> @@ -6691,6 +6691,7 @@ public:
>>>I.info = classifyArgumentType(I.type, State);
>>>}
>>>
>>> +  ABIArgInfo getIndirectResult(QualType Ty, bool ByVal, CCState )
>>> const;
>>>ABIArgInfo classifyArgumentType(QualType RetTy, CCState ) const;
>>>  };
>>>  } // end anonymous namespace
>>> @@ -6712,21 +6713,72 @@ bool LanaiABIInfo::shouldUseInReg(QualTy
>>>return true;
>>>  }
>>>
>>> +ABIArgInfo LanaiABIInfo::getIndirectResult(QualType Ty, bool ByVal,
>>> +   CCState ) const {
>>> +  if (!ByVal) {
>>> +if (State.FreeRegs) {
>>> +  --State.FreeRegs; // Non-byval indirects just use one pointer.
>>> +  return getNaturalAlignIndirectInReg(Ty);
>>> +}
>>> +return getNaturalAlignIndirect(Ty, false);
>>> +  }
>>> +
>>> +  // Compute the byval alignment.
>>> +  constexpr unsigned MinABIStackAlignInBytes = 4;
>>>
>>
>> This broke the build on Windows;
>>
>> C:\b\slave\sanitizer-windows\llvm\tools\clang\lib\CodeGen\TargetInfo.cpp(6727)
>>  : error C2065: 'constexpr' : undeclared identifier
>>
>>
>>
>>
>>
>>> +  unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8;
>>> +  return ABIArgInfo::getIndirect(CharUnits::fromQuantity(4),
>>> /*ByVal=*/true,
>>> + /*Realign=*/TypeAlign >
>>> + MinABIStackAlignInBytes);
>>> +}
>>> +
>>>  ABIArgInfo LanaiABIInfo::classifyArgumentType(QualType Ty,
>>>CCState ) const {
>>> -  if (isAggregateTypeForABI(Ty))
>>> -return getNaturalAlignIndirect(Ty);
>>> +  // Check with the C++ ABI first.
>>> +  const RecordType *RT = Ty->getAs();
>>> +  if (RT) {
>>> +CGCXXABI::RecordArgABI RAA = getRecordArgABI(RT, getCXXABI());
>>> +if (RAA == CGCXXABI::RAA_Indirect) {
>>> +  return getIndirectResult(Ty, /*ByVal=*/false, State);
>>> +} else if (RAA == CGCXXABI::RAA_DirectInMemory) {
>>> +  return getNaturalAlignIndirect(Ty, /*ByRef=*/true);
>>> +}
>>> +  }
>>> +
>>> +  if (isAggregateTypeForABI(Ty)) {
>>> +// Structures with flexible arrays are always indirect.
>>> +if (RT && RT->getDecl()->hasFlexibleArrayMember())
>>> +  return getIndirectResult(Ty, /*ByVal=*/true, State);
>>> +
>>> +// Ignore empty structs/unions.
>>> +if (isEmptyRecord(getContext(), Ty, true))
>>> +  return ABIArgInfo::getIgnore();
>>> +
>>> +llvm::LLVMContext  = getVMContext();
>>> +unsigned SizeInRegs = (getContext().getTypeSize(Ty) + 31) / 32;
>>> +if (SizeInRegs <= State.FreeRegs) {
>>> +  llvm::IntegerType *Int32 = llvm::Type::getInt32Ty(LLVMContext);
>>> +  SmallVector Elements(SizeInRegs, Int32);
>>> +  llvm::Type *Result =

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

2016-03-28 Thread Jacques Pienaar via cfe-commits

This revision was automatically updated to reflect the committed changes.
jpienaar marked an inline comment as done.
Closed by commit rL264655: [lanai] Add Lanai backend to clang driver. (authored 
by jpienaar).

Changed prior to commit:
  http://reviews.llvm.org/D17002?vs=51806=51838#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D17002

Files:
  cfe/trunk/lib/Basic/Targets.cpp
  cfe/trunk/lib/CodeGen/TargetInfo.cpp
  cfe/trunk/lib/Driver/Driver.cpp
  cfe/trunk/lib/Driver/ToolChains.h
  cfe/trunk/lib/Driver/Tools.cpp
  cfe/trunk/lib/Driver/Tools.h
  cfe/trunk/test/CodeGen/lanai-arguments.c
  cfe/trunk/test/CodeGen/lanai-regparm.c
  cfe/trunk/test/CodeGen/target-data.c
  cfe/trunk/test/Driver/lanai-toolchain.c
  cfe/trunk/test/Driver/lanai-unknown-unknown.cpp
  cfe/trunk/test/Preprocessor/init.c

Index: cfe/trunk/test/Preprocessor/init.c
===
--- cfe/trunk/test/Preprocessor/init.c
+++ cfe/trunk/test/Preprocessor/init.c
@@ -8414,6 +8414,9 @@
 // RUN: %clang_cc1 -triple arm-linux-androideabi -E -dM < /dev/null | FileCheck -match-full-lines -check-prefix ANDROID %s
 // ANDROID:#define __ANDROID__ 1
 //
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -E -dM < /dev/null | FileCheck -match-full-lines -check-prefix LANAI %s
+// LANAI: #define __lanai__ 1
+//
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-unknown-freebsd < /dev/null | FileCheck -match-full-lines -check-prefix PPC64-FREEBSD %s
 // PPC64-FREEBSD-NOT: #define __LONG_DOUBLE_128__ 1
 //
Index: cfe/trunk/test/CodeGen/lanai-arguments.c
===
--- cfe/trunk/test/CodeGen/lanai-arguments.c
+++ cfe/trunk/test/CodeGen/lanai-arguments.c
@@ -0,0 +1,75 @@
+// RUN: %clang_cc1 -triple lanai-unknown-unknown %s -emit-llvm -o - \
+// RUN:   | FileCheck %s
+
+// Basic argument/attribute tests for Lanai.
+
+// CHECK: define void @f0(i32 inreg %i, i32 inreg %j, i64 inreg %k)
+void f0(int i, long j, long long k) {}
+
+typedef struct {
+  int aa;
+  int bb;
+} s1;
+// CHECK: define void @f1(%struct.s1* byval align 4 %i)
+void f1(s1 i) {}
+
+typedef struct {
+  int cc;
+} s2;
+// CHECK: define void @f2(%struct.s2* noalias sret %agg.result)
+s2 f2() {
+  s2 foo;
+  return foo;
+}
+
+typedef struct {
+  int cc;
+  int dd;
+} s3;
+// CHECK: define void @f3(%struct.s3* noalias sret %agg.result)
+s3 f3() {
+  s3 foo;
+  return foo;
+}
+
+// CHECK: define void @f4(i64 inreg %i)
+void f4(long long i) {}
+
+// CHECK: define void @f5(i8 inreg %a, i16 inreg %b)
+void f5(char a, short b) {}
+
+// CHECK: define void @f6(i8 inreg %a, i16 inreg %b)
+void f6(unsigned char a, unsigned short b) {}
+
+enum my_enum {
+  ENUM1,
+  ENUM2,
+  ENUM3,
+};
+// Enums should be treated as the underlying i32.
+// CHECK: define void @f7(i32 inreg %a)
+void f7(enum my_enum a) {}
+
+enum my_big_enum {
+  ENUM4 = 0x,
+};
+// Big enums should be treated as the underlying i64.
+// CHECK: define void @f8(i64 inreg %a)
+void f8(enum my_big_enum a) {}
+
+union simple_union {
+  int a;
+  char b;
+};
+// Unions should be passed as byval structs.
+// CHECK: define void @f9(%union.simple_union* byval align 4 %s)
+void f9(union simple_union s) {}
+
+typedef struct {
+  int b4 : 4;
+  int b3 : 3;
+  int b8 : 8;
+} bitfield1;
+// Bitfields should be passed as byval structs.
+// CHECK: define void @f10(%struct.bitfield1* byval align 4 %bf1)
+void f10(bitfield1 bf1) {}
Index: cfe/trunk/test/CodeGen/target-data.c
===
--- cfe/trunk/test/CodeGen/target-data.c
+++ cfe/trunk/test/CodeGen/target-data.c
@@ -86,6 +86,10 @@
 // RUN: FileCheck %s -check-prefix=WEBASSEMBLY64
 // WEBASSEMBLY64: target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
 
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -o - -emit-llvm %s | \
+// RUN: FileCheck %s -check-prefix=LANAI
+// LANAI: target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
+
 // RUN: %clang_cc1 -triple powerpc-unknown -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=PPC
 // PPC: target datalayout = "E-m:e-p:32:32-i64:64-n32"
Index: cfe/trunk/test/CodeGen/lanai-regparm.c
===
--- cfe/trunk/test/CodeGen/lanai-regparm.c
+++ cfe/trunk/test/CodeGen/lanai-regparm.c
@@ -0,0 +1,18 @@
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -mregparm 4 %s -emit-llvm -o - | FileCheck %s
+
+void f1(int a, int b, int c, int d,
+int e, int f, int g, int h);
+
+void f2(int a, int b) __attribute((regparm(0)));
+
+void f0() {
+// CHECK: call void @f1(i32 inreg 1, i32 inreg 2, i32 inreg 3, i32 inreg 4,
+// CHECK: i32 5, i32 6, i32 7, i32 8)
+  f1(1, 2, 3, 4, 5, 6, 7, 8);
+// CHECK: call void @f2(i32 1, i32 2)
+  f2(1, 2);
+}
+
+// CHECK: declare void @f1(i32 inreg, i32 inreg, i32 inreg, i32 inreg,
+// CHECK: i32, i32, i32, i32)
+// CHECK: declare void @f2(i32, i32)
Index:

r264655 - [lanai] Add Lanai backend to clang driver.

2016-03-28 Thread Jacques Pienaar via cfe-commits

Author: jpienaar
Date: Mon Mar 28 16:02:54 2016
New Revision: 264655

URL: http://llvm.org/viewvc/llvm-project?rev=264655=rev
Log:
[lanai] Add Lanai backend to clang driver.

Changes to clang to add Lanai backend. Adds a new target, ABI and toolchain.

General Lanai backend discussion on llvm-dev thread "[RFC] Lanai backend" 
(http://lists.llvm.org/pipermail/llvm-dev/2016-February/095118.html).

Differential Revision: http://reviews.llvm.org/D17002


Added:
cfe/trunk/test/CodeGen/lanai-arguments.c
cfe/trunk/test/CodeGen/lanai-regparm.c
cfe/trunk/test/Driver/lanai-toolchain.c
cfe/trunk/test/Driver/lanai-unknown-unknown.cpp
Modified:
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/lib/CodeGen/TargetInfo.cpp
cfe/trunk/lib/Driver/Driver.cpp
cfe/trunk/lib/Driver/ToolChains.h
cfe/trunk/lib/Driver/Tools.cpp
cfe/trunk/lib/Driver/Tools.h
cfe/trunk/test/CodeGen/target-data.c
cfe/trunk/test/Preprocessor/init.c

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=264655=264654=264655=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Mon Mar 28 16:02:54 2016
@@ -5950,6 +5950,111 @@ const Builtin::Info HexagonTargetInfo::B
 #include "clang/Basic/BuiltinsHexagon.def"
 };
 
+class LanaiTargetInfo : public TargetInfo {
+  // Class for Lanai (32-bit).
+  // The CPU profiles supported by the Lanai backend
+  enum CPUKind {
+CK_NONE,
+CK_V11,
+  } CPU;
+
+  static const TargetInfo::GCCRegAlias GCCRegAliases[];
+  static const char *const GCCRegNames[];
+
+public:
+  LanaiTargetInfo(const llvm::Triple ) : TargetInfo(Triple) {
+// Description string has to be kept in sync with backend.
+resetDataLayout("E"// Big endian
+"-m:e" // ELF name manging
+"-p:32:32" // 32 bit pointers, 32 bit aligned
+"-i64:64"  // 64 bit integers, 64 bit aligned
+"-a:0:32"  // 32 bit alignment of objects of aggregate type
+"-n32" // 32 bit native integer width
+"-S64" // 64 bit natural stack alignment
+);
+
+// Setting RegParmMax equal to what mregparm was set to in the old
+// toolchain
+RegParmMax = 4;
+
+// Set the default CPU to V11
+CPU = CK_V11;
+
+// Temporary approach to make everything at least word-aligned and allow 
for
+// safely casting between pointers with different alignment requirements.
+// TODO: Remove this when there are no more cast align warnings on the
+// firmware.
+MinGlobalAlign = 32;
+  }
+
+  void getTargetDefines(const LangOptions ,
+MacroBuilder ) const override {
+// Define __lanai__ when building for target lanai.
+Builder.defineMacro("__lanai__");
+
+// Set define for the CPU specified.
+switch (CPU) {
+case CK_V11:
+  Builder.defineMacro("__LANAI_V11__");
+  break;
+case CK_NONE:
+  llvm_unreachable("Unhandled target CPU");
+}
+  }
+
+  bool setCPU(const std::string ) override {
+CPU = llvm::StringSwitch(Name)
+  .Case("v11", CK_V11)
+  .Default(CK_NONE);
+
+return CPU != CK_NONE;
+  }
+
+  bool hasFeature(StringRef Feature) const override {
+return llvm::StringSwitch(Feature).Case("lanai", 
true).Default(false);
+  }
+
+  ArrayRef getGCCRegNames() const override;
+
+  ArrayRef getGCCRegAliases() const override;
+
+  BuiltinVaListKind getBuiltinVaListKind() const override {
+return TargetInfo::VoidPtrBuiltinVaList;
+  }
+
+  ArrayRef getTargetBuiltins() const override { return None; }
+
+  bool validateAsmConstraint(const char *,
+ TargetInfo::ConstraintInfo ) const override {
+return false;
+  }
+
+  const char *getClobbers() const override { return ""; }
+};
+
+const char *const LanaiTargetInfo::GCCRegNames[] = {
+"r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",  "r8",  "r9",  
"r10",
+"r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", 
"r21",
+"r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"};
+
+ArrayRef LanaiTargetInfo::getGCCRegNames() const {
+  return llvm::makeArrayRef(GCCRegNames);
+}
+
+const TargetInfo::GCCRegAlias LanaiTargetInfo::GCCRegAliases[] = {
+{{"pc"}, "r2"},
+{{"sp"}, "r4"},
+{{"fp"}, "r5"},
+{{"rv"}, "r8"},
+{{"rr1"}, "r10"},
+{{"rr2"}, "r11"},
+{{"rca"}, "r15"},
+};
+
+ArrayRef LanaiTargetInfo::getGCCRegAliases() const {
+  return llvm::makeArrayRef(GCCRegAliases);
+}
+
 // Shared base class for SPARC v8 (32-bit) and SPARC v9 (64-bit).
 class SparcTargetInfo : public TargetInfo {
   static const TargetInfo::GCCRegAlias GCCRegAliases[];
@@ -7672,6 +,9 @@ static TargetInfo *AllocateTarget(const
   case llvm::Triple::hexagon:
 return new

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

2016-03-28 Thread Jacques Pienaar via cfe-commits

jpienaar added a comment.

Updated, thanks



Comment at: lib/CodeGen/TargetInfo.cpp:6622-6626
@@ +6621,7 @@
+
+  if (const BuiltinType *BT = T->getAs()) {
+BuiltinType::Kind K = BT->getKind();
+if (K == BuiltinType::Float || K == BuiltinType::Double)
+  return Float;
+  }
+  return Integer;

majnemer wrote:
> Is floating point supported?
No, good point. I think we can remove this and introduce it again if floating 
point is supported.


http://reviews.llvm.org/D17002



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Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

2016-03-28 Thread Jacques Pienaar via cfe-commits

jpienaar updated this revision to Diff 51806.
jpienaar marked 6 inline comments as done.
jpienaar added a comment.

Removed unnecessary floating point classification (only integer is supported) 
and performed suggested cleanups.


http://reviews.llvm.org/D17002

Files:
  lib/Basic/Targets.cpp
  lib/CodeGen/TargetInfo.cpp
  lib/Driver/Driver.cpp
  lib/Driver/ToolChains.h
  lib/Driver/Tools.cpp
  lib/Driver/Tools.h
  test/CodeGen/lanai-arguments.c
  test/CodeGen/lanai-regparm.c
  test/CodeGen/target-data.c
  test/Driver/lanai-toolchain.c
  test/Driver/lanai-unknown-unknown.cpp
  test/Preprocessor/init.c

Index: test/Preprocessor/init.c
===
--- test/Preprocessor/init.c
+++ test/Preprocessor/init.c
@@ -8414,6 +8414,9 @@
 // RUN: %clang_cc1 -triple arm-linux-androideabi -E -dM < /dev/null | FileCheck -match-full-lines -check-prefix ANDROID %s
 // ANDROID:#define __ANDROID__ 1
 //
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -E -dM < /dev/null | FileCheck -match-full-lines -check-prefix LANAI %s
+// LANAI: #define __lanai__ 1
+//
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-unknown-freebsd < /dev/null | FileCheck -match-full-lines -check-prefix PPC64-FREEBSD %s
 // PPC64-FREEBSD-NOT: #define __LONG_DOUBLE_128__ 1
 //
Index: test/Driver/lanai-unknown-unknown.cpp
===
--- test/Driver/lanai-unknown-unknown.cpp
+++ test/Driver/lanai-unknown-unknown.cpp
@@ -0,0 +1,86 @@
+// RUN: %clang -target lanai-unknown-unknown -### %s -emit-llvm-only -c 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=ECHO
+// RUN: %clang -target lanai-unknown-unknown %s -emit-llvm -S -o - \
+// RUN:   | FileCheck %s
+
+// ECHO: {{.*}} "-cc1" {{.*}}lanai-unknown-unknown.c
+
+typedef __builtin_va_list va_list;
+typedef __SIZE_TYPE__ size_t;
+typedef __PTRDIFF_TYPE__ ptrdiff_t;
+
+extern "C" {
+
+// CHECK: @align_c = global i32 1
+int align_c = __alignof(char);
+
+// CHECK: @align_s = global i32 2
+int align_s = __alignof(short);
+
+// CHECK: @align_i = global i32 4
+int align_i = __alignof(int);
+
+// CHECK: @align_l = global i32 4
+int align_l = __alignof(long);
+
+// CHECK: @align_ll = global i32 8
+int align_ll = __alignof(long long);
+
+// CHECK: @align_p = global i32 4
+int align_p = __alignof(void*);
+
+// CHECK: @align_vl = global i32 4
+int align_vl = __alignof(va_list);
+
+// Check types
+
+// CHECK: signext i8 @check_char()
+char check_char() { return 0; }
+
+// CHECK: signext i16 @check_short()
+short check_short() { return 0; }
+
+// CHECK: i32 @check_int()
+int check_int() { return 0; }
+
+// CHECK: i32 @check_long()
+long check_long() { return 0; }
+
+// CHECK: i64 @check_longlong()
+long long check_longlong() { return 0; }
+
+// CHECK: zeroext i8 @check_uchar()
+unsigned char check_uchar() { return 0; }
+
+// CHECK: zeroext i16 @check_ushort()
+unsigned short check_ushort() { return 0; }
+
+// CHECK: i32 @check_uint()
+unsigned int check_uint() { return 0; }
+
+// CHECK: i32 @check_ulong()
+unsigned long check_ulong() { return 0; }
+
+// CHECK: i64 @check_ulonglong()
+unsigned long long check_ulonglong() { return 0; }
+
+// CHECK: i32 @check_size_t()
+size_t check_size_t() { return 0; }
+
+}
+
+template void Switch();
+template<> void Switch<4>();
+template<> void Switch<8>();
+template<> void Switch<16>();
+
+void check_pointer_size() {
+  // CHECK: SwitchILi4
+  Switch();
+
+  // CHECK: SwitchILi8
+  Switch();
+
+  // CHECK: SwitchILi4
+  Switch();
+}
Index: test/Driver/lanai-toolchain.c
===
--- test/Driver/lanai-toolchain.c
+++ test/Driver/lanai-toolchain.c
@@ -0,0 +1,2 @@
+// RUN: %clang -target lanai-unknown-unknown -v 2> %t
+// RUN: grep 'Target: lanai-unknown-unknown' %t
Index: test/CodeGen/target-data.c
===
--- test/CodeGen/target-data.c
+++ test/CodeGen/target-data.c
@@ -86,6 +86,10 @@
 // RUN: FileCheck %s -check-prefix=WEBASSEMBLY64
 // WEBASSEMBLY64: target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
 
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -o - -emit-llvm %s | \
+// RUN: FileCheck %s -check-prefix=LANAI
+// LANAI: target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
+
 // RUN: %clang_cc1 -triple powerpc-unknown -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=PPC
 // PPC: target datalayout = "E-m:e-p:32:32-i64:64-n32"
Index: test/CodeGen/lanai-regparm.c
===
--- test/CodeGen/lanai-regparm.c
+++ test/CodeGen/lanai-regparm.c
@@ -0,0 +1,18 @@
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -mregparm 4 %s -emit-llvm -o - | FileCheck %s
+
+void f1(int a, int b, int c, int d,
+int e, int f, int g, int h);
+
+void f2(int a, int b) __attribute((regparm(0)));
+
+void f0() {
+// CHECK: call void @f1(i32 inreg

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

2016-03-28 Thread Jacques Pienaar via cfe-commits

jpienaar added a comment.

Friendly ping.


http://reviews.llvm.org/D17002



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Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

2016-03-07 Thread Jacques Pienaar via cfe-commits

jpienaar updated this revision to Diff 49969.
jpienaar added a comment.

Updated to use resetDataLayout.


http://reviews.llvm.org/D17002

Files:
  lib/Basic/Targets.cpp
  lib/CodeGen/TargetInfo.cpp
  lib/Driver/Driver.cpp
  lib/Driver/ToolChains.h
  lib/Driver/Tools.cpp
  lib/Driver/Tools.h
  test/CodeGen/lanai-arguments.c
  test/CodeGen/lanai-regparm.c
  test/CodeGen/target-data.c
  test/Driver/lanai-toolchain.c
  test/Driver/lanai-unknown-unknown.cpp
  test/Preprocessor/init.c

Index: test/Preprocessor/init.c
===
--- test/Preprocessor/init.c
+++ test/Preprocessor/init.c
@@ -8414,6 +8414,9 @@
 // RUN: %clang_cc1 -triple arm-linux-androideabi -E -dM < /dev/null | FileCheck -match-full-lines -check-prefix ANDROID %s
 // ANDROID:#define __ANDROID__ 1
 //
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -E -dM < /dev/null | FileCheck -match-full-lines -check-prefix LANAI %s
+// LANAI: #define __lanai__ 1
+//
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-unknown-freebsd < /dev/null | FileCheck -match-full-lines -check-prefix PPC64-FREEBSD %s
 // PPC64-FREEBSD-NOT: #define __LONG_DOUBLE_128__ 1
 //
Index: test/Driver/lanai-unknown-unknown.cpp
===
--- test/Driver/lanai-unknown-unknown.cpp
+++ test/Driver/lanai-unknown-unknown.cpp
@@ -0,0 +1,86 @@
+// RUN: %clang -target lanai-unknown-unknown -### %s -emit-llvm-only -c 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=ECHO
+// RUN: %clang -target lanai-unknown-unknown %s -emit-llvm -S -o - \
+// RUN:   | FileCheck %s
+
+// ECHO: {{.*}} "-cc1" {{.*}}lanai-unknown-unknown.c
+
+typedef __builtin_va_list va_list;
+typedef __SIZE_TYPE__ size_t;
+typedef __PTRDIFF_TYPE__ ptrdiff_t;
+
+extern "C" {
+
+// CHECK: @align_c = global i32 1
+int align_c = __alignof(char);
+
+// CHECK: @align_s = global i32 2
+int align_s = __alignof(short);
+
+// CHECK: @align_i = global i32 4
+int align_i = __alignof(int);
+
+// CHECK: @align_l = global i32 4
+int align_l = __alignof(long);
+
+// CHECK: @align_ll = global i32 8
+int align_ll = __alignof(long long);
+
+// CHECK: @align_p = global i32 4
+int align_p = __alignof(void*);
+
+// CHECK: @align_vl = global i32 4
+int align_vl = __alignof(va_list);
+
+// Check types
+
+// CHECK: signext i8 @check_char()
+char check_char() { return 0; }
+
+// CHECK: signext i16 @check_short()
+short check_short() { return 0; }
+
+// CHECK: i32 @check_int()
+int check_int() { return 0; }
+
+// CHECK: i32 @check_long()
+long check_long() { return 0; }
+
+// CHECK: i64 @check_longlong()
+long long check_longlong() { return 0; }
+
+// CHECK: zeroext i8 @check_uchar()
+unsigned char check_uchar() { return 0; }
+
+// CHECK: zeroext i16 @check_ushort()
+unsigned short check_ushort() { return 0; }
+
+// CHECK: i32 @check_uint()
+unsigned int check_uint() { return 0; }
+
+// CHECK: i32 @check_ulong()
+unsigned long check_ulong() { return 0; }
+
+// CHECK: i64 @check_ulonglong()
+unsigned long long check_ulonglong() { return 0; }
+
+// CHECK: i32 @check_size_t()
+size_t check_size_t() { return 0; }
+
+}
+
+template void Switch();
+template<> void Switch<4>();
+template<> void Switch<8>();
+template<> void Switch<16>();
+
+void check_pointer_size() {
+  // CHECK: SwitchILi4
+  Switch();
+
+  // CHECK: SwitchILi8
+  Switch();
+
+  // CHECK: SwitchILi4
+  Switch();
+}
Index: test/Driver/lanai-toolchain.c
===
--- test/Driver/lanai-toolchain.c
+++ test/Driver/lanai-toolchain.c
@@ -0,0 +1,2 @@
+// RUN: %clang -target lanai-unknown-unknown -v 2> %t
+// RUN: grep 'Target: lanai-unknown-unknown' %t
Index: test/CodeGen/target-data.c
===
--- test/CodeGen/target-data.c
+++ test/CodeGen/target-data.c
@@ -86,6 +86,10 @@
 // RUN: FileCheck %s -check-prefix=WEBASSEMBLY64
 // WEBASSEMBLY64: target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
 
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -o - -emit-llvm %s | \
+// RUN: FileCheck %s -check-prefix=LANAI
+// LANAI: target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
+
 // RUN: %clang_cc1 -triple powerpc-unknown -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=PPC
 // PPC: target datalayout = "E-m:e-p:32:32-i64:64-n32"
Index: test/CodeGen/lanai-regparm.c
===
--- test/CodeGen/lanai-regparm.c
+++ test/CodeGen/lanai-regparm.c
@@ -0,0 +1,18 @@
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -mregparm 4 %s -emit-llvm -o - | FileCheck %s
+
+void f1(int a, int b, int c, int d,
+int e, int f, int g, int h);
+
+void f2(int a, int b) __attribute((regparm(0)));
+
+void f0() {
+// CHECK: call void @f1(i32 inreg 1, i32 inreg 2, i32 inreg 3, i32 inreg 4,
+// CHECK: i32 5, i32 6, i32 7, i32 8)
+  f1(1, 2, 3, 4, 5, 6, 7, 8);
+// CHECK:

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

2016-03-02 Thread Jacques Pienaar via cfe-commits

jpienaar updated this revision to Diff 49688.
jpienaar added a comment.

Removed unused variables in LanaiTargetInfo.


http://reviews.llvm.org/D17002

Files:
  lib/Basic/Targets.cpp
  lib/CodeGen/TargetInfo.cpp
  lib/Driver/Driver.cpp
  lib/Driver/ToolChains.h
  lib/Driver/Tools.cpp
  lib/Driver/Tools.h
  test/CodeGen/lanai-arguments.c
  test/CodeGen/lanai-regparm.c
  test/CodeGen/target-data.c
  test/Driver/lanai-toolchain.c
  test/Driver/lanai-unknown-unknown.cpp
  test/Preprocessor/init.c

Index: test/Preprocessor/init.c
===
--- test/Preprocessor/init.c
+++ test/Preprocessor/init.c
@@ -8412,6 +8412,9 @@
 // RUN: %clang_cc1 -triple arm-linux-androideabi -E -dM < /dev/null | FileCheck -match-full-lines -check-prefix ANDROID %s
 // ANDROID:#define __ANDROID__ 1
 //
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -E -dM < /dev/null | FileCheck -match-full-lines -check-prefix LANAI %s
+// LANAI: #define __lanai__ 1
+//
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-unknown-freebsd < /dev/null | FileCheck -match-full-lines -check-prefix PPC64-FREEBSD %s
 // PPC64-FREEBSD-NOT: #define __LONG_DOUBLE_128__ 1
 //
Index: test/Driver/lanai-unknown-unknown.cpp
===
--- test/Driver/lanai-unknown-unknown.cpp
+++ test/Driver/lanai-unknown-unknown.cpp
@@ -0,0 +1,86 @@
+// RUN: %clang -target lanai-unknown-unknown -### %s -emit-llvm-only -c 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=ECHO
+// RUN: %clang -target lanai-unknown-unknown %s -emit-llvm -S -o - \
+// RUN:   | FileCheck %s
+
+// ECHO: {{.*}} "-cc1" {{.*}}lanai-unknown-unknown.c
+
+typedef __builtin_va_list va_list;
+typedef __SIZE_TYPE__ size_t;
+typedef __PTRDIFF_TYPE__ ptrdiff_t;
+
+extern "C" {
+
+// CHECK: @align_c = global i32 1
+int align_c = __alignof(char);
+
+// CHECK: @align_s = global i32 2
+int align_s = __alignof(short);
+
+// CHECK: @align_i = global i32 4
+int align_i = __alignof(int);
+
+// CHECK: @align_l = global i32 4
+int align_l = __alignof(long);
+
+// CHECK: @align_ll = global i32 8
+int align_ll = __alignof(long long);
+
+// CHECK: @align_p = global i32 4
+int align_p = __alignof(void*);
+
+// CHECK: @align_vl = global i32 4
+int align_vl = __alignof(va_list);
+
+// Check types
+
+// CHECK: signext i8 @check_char()
+char check_char() { return 0; }
+
+// CHECK: signext i16 @check_short()
+short check_short() { return 0; }
+
+// CHECK: i32 @check_int()
+int check_int() { return 0; }
+
+// CHECK: i32 @check_long()
+long check_long() { return 0; }
+
+// CHECK: i64 @check_longlong()
+long long check_longlong() { return 0; }
+
+// CHECK: zeroext i8 @check_uchar()
+unsigned char check_uchar() { return 0; }
+
+// CHECK: zeroext i16 @check_ushort()
+unsigned short check_ushort() { return 0; }
+
+// CHECK: i32 @check_uint()
+unsigned int check_uint() { return 0; }
+
+// CHECK: i32 @check_ulong()
+unsigned long check_ulong() { return 0; }
+
+// CHECK: i64 @check_ulonglong()
+unsigned long long check_ulonglong() { return 0; }
+
+// CHECK: i32 @check_size_t()
+size_t check_size_t() { return 0; }
+
+}
+
+template void Switch();
+template<> void Switch<4>();
+template<> void Switch<8>();
+template<> void Switch<16>();
+
+void check_pointer_size() {
+  // CHECK: SwitchILi4
+  Switch();
+
+  // CHECK: SwitchILi8
+  Switch();
+
+  // CHECK: SwitchILi4
+  Switch();
+}
Index: test/Driver/lanai-toolchain.c
===
--- test/Driver/lanai-toolchain.c
+++ test/Driver/lanai-toolchain.c
@@ -0,0 +1,2 @@
+// RUN: %clang -target lanai-unknown-unknown -v 2> %t
+// RUN: grep 'Target: lanai-unknown-unknown' %t
Index: test/CodeGen/target-data.c
===
--- test/CodeGen/target-data.c
+++ test/CodeGen/target-data.c
@@ -86,6 +86,10 @@
 // RUN: FileCheck %s -check-prefix=WEBASSEMBLY64
 // WEBASSEMBLY64: target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
 
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -o - -emit-llvm %s | \
+// RUN: FileCheck %s -check-prefix=LANAI
+// LANAI: target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
+
 // RUN: %clang_cc1 -triple powerpc-unknown -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=PPC
 // PPC: target datalayout = "E-m:e-p:32:32-i64:64-n32"
Index: test/CodeGen/lanai-regparm.c
===
--- test/CodeGen/lanai-regparm.c
+++ test/CodeGen/lanai-regparm.c
@@ -0,0 +1,18 @@
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -mregparm 4 %s -emit-llvm -o - | FileCheck %s
+
+void f1(int a, int b, int c, int d,
+int e, int f, int g, int h);
+
+void f2(int a, int b) __attribute((regparm(0)));
+
+void f0() {
+// CHECK: call void @f1(i32 inreg 1, i32 inreg 2, i32 inreg 3, i32 inreg 4,
+// CHECK: i32 5, i32 6, i32 7, i32 8)
+  f1(1, 2, 3, 4, 5, 6, 7,

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

2016-02-25 Thread Jacques Pienaar via cfe-commits

jpienaar added reviewers: eliben, jyknight, chandlerc.
jpienaar updated this revision to Diff 49119.
jpienaar added a comment.

Updated preprocessor test init.c to use -match-full-lines.


http://reviews.llvm.org/D17002

Files:
  lib/Basic/Targets.cpp
  lib/CodeGen/TargetInfo.cpp
  lib/Driver/Driver.cpp
  lib/Driver/ToolChains.h
  lib/Driver/Tools.cpp
  lib/Driver/Tools.h
  test/CodeGen/lanai-arguments.c
  test/CodeGen/lanai-regparm.c
  test/CodeGen/target-data.c
  test/Driver/lanai-toolchain.c
  test/Driver/lanai-unknown-unknown.cpp
  test/Preprocessor/init.c

Index: test/Preprocessor/init.c
===
--- test/Preprocessor/init.c
+++ test/Preprocessor/init.c
@@ -8412,6 +8412,9 @@
 // RUN: %clang_cc1 -triple arm-linux-androideabi -E -dM < /dev/null | FileCheck -match-full-lines -check-prefix ANDROID %s
 // ANDROID:#define __ANDROID__ 1
 //
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -E -dM < /dev/null | FileCheck -match-full-lines -check-prefix LANAI %s
+// LANAI: #define __lanai__ 1
+//
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-unknown-freebsd < /dev/null | FileCheck -match-full-lines -check-prefix PPC64-FREEBSD %s
 // PPC64-FREEBSD-NOT: #define __LONG_DOUBLE_128__ 1
 //
Index: test/Driver/lanai-unknown-unknown.cpp
===
--- test/Driver/lanai-unknown-unknown.cpp
+++ test/Driver/lanai-unknown-unknown.cpp
@@ -0,0 +1,86 @@
+// RUN: %clang -target lanai-unknown-unknown -### %s -emit-llvm-only -c 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=ECHO
+// RUN: %clang -target lanai-unknown-unknown %s -emit-llvm -S -o - \
+// RUN:   | FileCheck %s
+
+// ECHO: {{.*}} "-cc1" {{.*}}lanai-unknown-unknown.c
+
+typedef __builtin_va_list va_list;
+typedef __SIZE_TYPE__ size_t;
+typedef __PTRDIFF_TYPE__ ptrdiff_t;
+
+extern "C" {
+
+// CHECK: @align_c = global i32 1
+int align_c = __alignof(char);
+
+// CHECK: @align_s = global i32 2
+int align_s = __alignof(short);
+
+// CHECK: @align_i = global i32 4
+int align_i = __alignof(int);
+
+// CHECK: @align_l = global i32 4
+int align_l = __alignof(long);
+
+// CHECK: @align_ll = global i32 8
+int align_ll = __alignof(long long);
+
+// CHECK: @align_p = global i32 4
+int align_p = __alignof(void*);
+
+// CHECK: @align_vl = global i32 4
+int align_vl = __alignof(va_list);
+
+// Check types
+
+// CHECK: signext i8 @check_char()
+char check_char() { return 0; }
+
+// CHECK: signext i16 @check_short()
+short check_short() { return 0; }
+
+// CHECK: i32 @check_int()
+int check_int() { return 0; }
+
+// CHECK: i32 @check_long()
+long check_long() { return 0; }
+
+// CHECK: i64 @check_longlong()
+long long check_longlong() { return 0; }
+
+// CHECK: zeroext i8 @check_uchar()
+unsigned char check_uchar() { return 0; }
+
+// CHECK: zeroext i16 @check_ushort()
+unsigned short check_ushort() { return 0; }
+
+// CHECK: i32 @check_uint()
+unsigned int check_uint() { return 0; }
+
+// CHECK: i32 @check_ulong()
+unsigned long check_ulong() { return 0; }
+
+// CHECK: i64 @check_ulonglong()
+unsigned long long check_ulonglong() { return 0; }
+
+// CHECK: i32 @check_size_t()
+size_t check_size_t() { return 0; }
+
+}
+
+template void Switch();
+template<> void Switch<4>();
+template<> void Switch<8>();
+template<> void Switch<16>();
+
+void check_pointer_size() {
+  // CHECK: SwitchILi4
+  Switch();
+
+  // CHECK: SwitchILi8
+  Switch();
+
+  // CHECK: SwitchILi4
+  Switch();
+}
Index: test/Driver/lanai-toolchain.c
===
--- test/Driver/lanai-toolchain.c
+++ test/Driver/lanai-toolchain.c
@@ -0,0 +1,2 @@
+// RUN: %clang -target lanai-unknown-unknown -v 2> %t
+// RUN: grep 'Target: lanai-unknown-unknown' %t
Index: test/CodeGen/target-data.c
===
--- test/CodeGen/target-data.c
+++ test/CodeGen/target-data.c
@@ -86,6 +86,10 @@
 // RUN: FileCheck %s -check-prefix=WEBASSEMBLY64
 // WEBASSEMBLY64: target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
 
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -o - -emit-llvm %s | \
+// RUN: FileCheck %s -check-prefix=LANAI
+// LANAI: target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
+
 // RUN: %clang_cc1 -triple powerpc-unknown -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=PPC
 // PPC: target datalayout = "E-m:e-p:32:32-i64:64-n32"
Index: test/CodeGen/lanai-regparm.c
===
--- test/CodeGen/lanai-regparm.c
+++ test/CodeGen/lanai-regparm.c
@@ -0,0 +1,18 @@
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -mregparm 4 %s -emit-llvm -o - | FileCheck %s
+
+void f1(int a, int b, int c, int d,
+int e, int f, int g, int h);
+
+void f2(int a, int b) __attribute((regparm(0)));
+
+void f0() {
+// CHECK: call void @f1(i32 inreg 1, i32 inreg 2, i32 inreg 3, i32 inreg 4,

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

2016-02-16 Thread Jacques Pienaar via cfe-commits

jpienaar added inline comments.


Comment at: test/CodeGen/lanai-arguments.c:1
@@ +1,2 @@
+// RUN: %clang_cc1 -triple wasm32-unknown-unknown %s -emit-llvm -o - \
+// RUN:   | FileCheck %s -check-prefix=LANAI

eliben wrote:
> why wasm triple?
Fixed, thanks.


http://reviews.llvm.org/D17002



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Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

2016-02-16 Thread Jacques Pienaar via cfe-commits

jpienaar updated the summary for this revision.
jpienaar updated this revision to Diff 48119.
jpienaar marked an inline comment as done.
jpienaar added a comment.
Herald added a subscriber: joker.eph.

Move mregparm check to Tools.cpp and correct triple used in test.


http://reviews.llvm.org/D17002

Files:
  lib/Basic/Targets.cpp
  lib/CodeGen/TargetInfo.cpp
  lib/Driver/Driver.cpp
  lib/Driver/ToolChains.h
  lib/Driver/Tools.cpp
  lib/Driver/Tools.h
  test/CodeGen/lanai-arguments.c
  test/CodeGen/lanai-regparm.c
  test/CodeGen/target-data.c
  test/Driver/lanai-toolchain.c
  test/Driver/lanai-unknown-unknown.cpp
  test/Preprocessor/init.c

Index: test/Preprocessor/init.c
===
--- test/Preprocessor/init.c
+++ test/Preprocessor/init.c
@@ -8412,6 +8412,9 @@
 // RUN: %clang_cc1 -triple arm-linux-androideabi -E -dM < /dev/null | FileCheck -check-prefix ANDROID %s
 // ANDROID: __ANDROID__ 1
 //
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -E -dM < /dev/null | FileCheck -check-prefix LANAI %s
+// LANAI: __lanai__ 1
+//
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-unknown-freebsd < /dev/null | FileCheck -check-prefix PPC64-FREEBSD %s
 // PPC64-FREEBSD-NOT: #define __LONG_DOUBLE_128__ 1
 //
Index: test/Driver/lanai-unknown-unknown.cpp
===
--- test/Driver/lanai-unknown-unknown.cpp
+++ test/Driver/lanai-unknown-unknown.cpp
@@ -0,0 +1,86 @@
+// RUN: %clang -target lanai-unknown-unknown -### %s -emit-llvm-only -c 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=ECHO
+// RUN: %clang -target lanai-unknown-unknown %s -emit-llvm -S -o - \
+// RUN:   | FileCheck %s
+
+// ECHO: {{.*}} "-cc1" {{.*}}lanai-unknown-unknown.c
+
+typedef __builtin_va_list va_list;
+typedef __SIZE_TYPE__ size_t;
+typedef __PTRDIFF_TYPE__ ptrdiff_t;
+
+extern "C" {
+
+// CHECK: @align_c = global i32 1
+int align_c = __alignof(char);
+
+// CHECK: @align_s = global i32 2
+int align_s = __alignof(short);
+
+// CHECK: @align_i = global i32 4
+int align_i = __alignof(int);
+
+// CHECK: @align_l = global i32 4
+int align_l = __alignof(long);
+
+// CHECK: @align_ll = global i32 8
+int align_ll = __alignof(long long);
+
+// CHECK: @align_p = global i32 4
+int align_p = __alignof(void*);
+
+// CHECK: @align_vl = global i32 4
+int align_vl = __alignof(va_list);
+
+// Check types
+
+// CHECK: signext i8 @check_char()
+char check_char() { return 0; }
+
+// CHECK: signext i16 @check_short()
+short check_short() { return 0; }
+
+// CHECK: i32 @check_int()
+int check_int() { return 0; }
+
+// CHECK: i32 @check_long()
+long check_long() { return 0; }
+
+// CHECK: i64 @check_longlong()
+long long check_longlong() { return 0; }
+
+// CHECK: zeroext i8 @check_uchar()
+unsigned char check_uchar() { return 0; }
+
+// CHECK: zeroext i16 @check_ushort()
+unsigned short check_ushort() { return 0; }
+
+// CHECK: i32 @check_uint()
+unsigned int check_uint() { return 0; }
+
+// CHECK: i32 @check_ulong()
+unsigned long check_ulong() { return 0; }
+
+// CHECK: i64 @check_ulonglong()
+unsigned long long check_ulonglong() { return 0; }
+
+// CHECK: i32 @check_size_t()
+size_t check_size_t() { return 0; }
+
+}
+
+template void Switch();
+template<> void Switch<4>();
+template<> void Switch<8>();
+template<> void Switch<16>();
+
+void check_pointer_size() {
+  // CHECK: SwitchILi4
+  Switch();
+
+  // CHECK: SwitchILi8
+  Switch();
+
+  // CHECK: SwitchILi4
+  Switch();
+}
Index: test/Driver/lanai-toolchain.c
===
--- test/Driver/lanai-toolchain.c
+++ test/Driver/lanai-toolchain.c
@@ -0,0 +1,2 @@
+// RUN: %clang -target lanai-unknown-unknown -v 2> %t
+// RUN: grep 'Target: lanai-unknown-unknown' %t
Index: test/CodeGen/target-data.c
===
--- test/CodeGen/target-data.c
+++ test/CodeGen/target-data.c
@@ -86,6 +86,10 @@
 // RUN: FileCheck %s -check-prefix=WEBASSEMBLY64
 // WEBASSEMBLY64: target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
 
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -o - -emit-llvm %s | \
+// RUN: FileCheck %s -check-prefix=LANAI
+// LANAI: target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
+
 // RUN: %clang_cc1 -triple powerpc-unknown -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=PPC
 // PPC: target datalayout = "E-m:e-p:32:32-i64:64-n32"
Index: test/CodeGen/lanai-regparm.c
===
--- test/CodeGen/lanai-regparm.c
+++ test/CodeGen/lanai-regparm.c
@@ -0,0 +1,18 @@
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -mregparm 4 %s -emit-llvm -o - | FileCheck %s
+
+void f1(int a, int b, int c, int d,
+int e, int f, int g, int h);
+
+void f2(int a, int b) __attribute((regparm(0)));
+
+void f0() {
+// CHECK: call void @f1(i32 inreg 1, i32 inreg 2, i32 inreg 3,

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

2016-02-09 Thread Jacques Pienaar via cfe-commits

jpienaar updated this revision to Diff 47408.
jpienaar added a comment.

Added clang-level tests.


http://reviews.llvm.org/D17002

Files:
  lib/Basic/Targets.cpp
  lib/CodeGen/TargetInfo.cpp
  lib/Driver/Driver.cpp
  lib/Driver/ToolChains.h
  lib/Driver/Tools.cpp
  lib/Driver/Tools.h
  test/CodeGen/lanai-arguments.c
  test/CodeGen/lanai-regparm.c
  test/CodeGen/target-data.c
  test/Driver/lanai-toolchain.c
  test/Driver/lanai-unknown-unknown.cpp
  test/Preprocessor/init.c

Index: test/Preprocessor/init.c
===
--- test/Preprocessor/init.c
+++ test/Preprocessor/init.c
@@ -8412,6 +8412,9 @@
 // RUN: %clang_cc1 -triple arm-linux-androideabi -E -dM < /dev/null | FileCheck -check-prefix ANDROID %s
 // ANDROID: __ANDROID__ 1
 //
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -E -dM < /dev/null | FileCheck -check-prefix LANAI %s
+// LANAI: __lanai__ 1
+//
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-unknown-freebsd < /dev/null | FileCheck -check-prefix PPC64-FREEBSD %s
 // PPC64-FREEBSD-NOT: #define __LONG_DOUBLE_128__ 1
 //
Index: test/Driver/lanai-unknown-unknown.cpp
===
--- test/Driver/lanai-unknown-unknown.cpp
+++ test/Driver/lanai-unknown-unknown.cpp
@@ -0,0 +1,86 @@
+// RUN: %clang -target lanai-unknown-unknown -### %s -emit-llvm-only -c 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=ECHO
+// RUN: %clang -target lanai-unknown-unknown %s -emit-llvm -S -o - \
+// RUN:   | FileCheck %s
+
+// ECHO: {{.*}} "-cc1" {{.*}}lanai-unknown-unknown.c
+
+typedef __builtin_va_list va_list;
+typedef __SIZE_TYPE__ size_t;
+typedef __PTRDIFF_TYPE__ ptrdiff_t;
+
+extern "C" {
+
+// CHECK: @align_c = global i32 1
+int align_c = __alignof(char);
+
+// CHECK: @align_s = global i32 2
+int align_s = __alignof(short);
+
+// CHECK: @align_i = global i32 4
+int align_i = __alignof(int);
+
+// CHECK: @align_l = global i32 4
+int align_l = __alignof(long);
+
+// CHECK: @align_ll = global i32 8
+int align_ll = __alignof(long long);
+
+// CHECK: @align_p = global i32 4
+int align_p = __alignof(void*);
+
+// CHECK: @align_vl = global i32 4
+int align_vl = __alignof(va_list);
+
+// Check types
+
+// CHECK: signext i8 @check_char()
+char check_char() { return 0; }
+
+// CHECK: signext i16 @check_short()
+short check_short() { return 0; }
+
+// CHECK: i32 @check_int()
+int check_int() { return 0; }
+
+// CHECK: i32 @check_long()
+long check_long() { return 0; }
+
+// CHECK: i64 @check_longlong()
+long long check_longlong() { return 0; }
+
+// CHECK: zeroext i8 @check_uchar()
+unsigned char check_uchar() { return 0; }
+
+// CHECK: zeroext i16 @check_ushort()
+unsigned short check_ushort() { return 0; }
+
+// CHECK: i32 @check_uint()
+unsigned int check_uint() { return 0; }
+
+// CHECK: i32 @check_ulong()
+unsigned long check_ulong() { return 0; }
+
+// CHECK: i64 @check_ulonglong()
+unsigned long long check_ulonglong() { return 0; }
+
+// CHECK: i32 @check_size_t()
+size_t check_size_t() { return 0; }
+
+}
+
+template void Switch();
+template<> void Switch<4>();
+template<> void Switch<8>();
+template<> void Switch<16>();
+
+void check_pointer_size() {
+  // CHECK: SwitchILi4
+  Switch();
+
+  // CHECK: SwitchILi8
+  Switch();
+
+  // CHECK: SwitchILi4
+  Switch();
+}
Index: test/Driver/lanai-toolchain.c
===
--- test/Driver/lanai-toolchain.c
+++ test/Driver/lanai-toolchain.c
@@ -0,0 +1,2 @@
+// RUN: %clang -target lanai-unknown-unknown -v 2> %t
+// RUN: grep 'Target: lanai-unknown-unknown' %t
Index: test/CodeGen/target-data.c
===
--- test/CodeGen/target-data.c
+++ test/CodeGen/target-data.c
@@ -86,6 +86,10 @@
 // RUN: FileCheck %s -check-prefix=WEBASSEMBLY64
 // WEBASSEMBLY64: target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
 
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -o - -emit-llvm %s | \
+// RUN: FileCheck %s -check-prefix=LANAI
+// LANAI: target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
+
 // RUN: %clang_cc1 -triple powerpc-unknown -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=PPC
 // PPC: target datalayout = "E-m:e-p:32:32-i64:64-n32"
Index: test/CodeGen/lanai-regparm.c
===
--- test/CodeGen/lanai-regparm.c
+++ test/CodeGen/lanai-regparm.c
@@ -0,0 +1,18 @@
+// RUN: %clang_cc1 -triple lanai-unknown-unknown -mregparm 4 %s -emit-llvm -o - | FileCheck %s
+
+void f1(int a, int b, int c, int d,
+int e, int f, int g, int h);
+
+void f2(int a, int b) __attribute((regparm(0)));
+
+void f0() {
+// CHECK: call void @f1(i32 inreg 1, i32 inreg 2, i32 inreg 3, i32 inreg 4,
+// CHECK: i32 5, i32 6, i32 7, i32 8)
+  f1(1, 2, 3, 4, 5, 6, 7, 8);
+// CHECK: call void @f2(i32 1, i32 2)
+  f2(1, 2);
+}
+
+// CHECK: declare void

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

2016-02-09 Thread Jacques Pienaar via cfe-commits

jpienaar marked 3 inline comments as done.
jpienaar added a comment.

Updated thanks.



Comment at: lib/CodeGen/TargetInfo.cpp:6498
@@ +6497,3 @@
+
+  Class classify(QualType Ty) const;
+

We only had one DefaultNumRegisterParameters that we supported 
(DefaultNumRegisterParameters=4) so I just propagated the constant, removed the 
member variable and added a comment at its use.


http://reviews.llvm.org/D17002



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Re: [PATCH] D15305: [CUDA] Do not allow dynamic initialization of global device side variables.

2016-02-01 Thread Jacques Pienaar via cfe-commits

jpienaar added a comment.

@jlebar: We defer it to your and Richard's approval. Thanks


http://reviews.llvm.org/D15305



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Re: [PATCH] D15309: [CUDA] emit vtables only for classes with methods usable on this side of compilation.

2015-12-17 Thread Jacques Pienaar via cfe-commits

jpienaar accepted this revision.
jpienaar added a comment.
This revision is now accepted and ready to land.

Looks good, thanks



Comment at: test/CodeGenCUDA/device-vtable.cu:37
@@ +36,3 @@
+  virtual void h_method();
+  __device__ virtual void d_method();
+};

Does the comment need to be updated to reflect vtable with NULL pointers?


http://reviews.llvm.org/D15309



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Re: [PATCH] D15309: [CUDA] emit vtables only for classes with methods usable on this side of compilation.

2015-12-09 Thread Jacques Pienaar via cfe-commits

jpienaar added a comment.

Looks good to me.



Comment at: lib/AST/RecordLayoutBuilder.cpp:2003
@@ +2002,3 @@
+return nullptr;
+  if (!Context.getLangOpts().CUDAIsDevice && !MD->hasAttr() 
&&
+  MD->hasAttr())

Add a comment to explain asymmetry. Perhaps a general comment at the start of 
this section explaining would be the most useful.


Comment at: test/CodeGenCUDA/device-vtable.cu:36
@@ +35,3 @@
+// only device methods would be available during host or device
+// compilation. For now we'll not emit such vtable at all.
+class HD  {

What is the current behavior in this case? Should an error be reported?


http://reviews.llvm.org/D15309



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Re: [PATCH] D12917: [CUDA] Allow parsing of host and device code simultaneously.

2015-09-17 Thread Jacques Pienaar via cfe-commits

jpienaar added a comment.

Nice, so this will allow parsing/AST construction with builtins from 2 
architectures but will fail to compile if a builtin for the host/device is 
called from device/host.

You mention this is not generally possible. Can you give some examples?



Comment at: include/clang/Driver/CC1Options.td:329
@@ -328,1 +328,3 @@
+def aux_triple : Separate<["-"], "aux-triple">,
+  HelpText<"Auxiliary triple.">;
 def code_completion_at : Separate<["-"], "code-completion-at">,

You use aux target in all the errors to the user so perhaps for consistency 
"Triple for aux target". It could be more self-documenting too ("Triple for aux 
target used during CUDA compilation."?) as I don't know if a lot of people 
would be able to guess what the auxiliary triple is or where it is used.


Comment at: include/clang/Frontend/CompilerInstance.h:355
@@ -350,3 +354,3 @@
 
-  /// Replace the current diagnostics engine.
+  /// Replace the current Target
   void setTarget(TargetInfo *Value);

Nit: period at the end for uniformity.


http://reviews.llvm.org/D12917



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[clang-tools-extra] [clang] [flang] [llvm] [compiler-rt] [mlir] [mlir][tosa] Add dialect version. (PR #79514)

[mlir] [libcxx] [flang] [libc] [clang] [lldb] [llvm] [mlir] Skip invalid test on big endian platform (s390x) (PR #80246)

[llvm] [flang] [compiler-rt] [clang-tools-extra] [mlir] [clang] [mlir][tosa] Add dialect version. (PR #79514)

[mlir] [llvm] [clang] [compiler-rt] [flang] [clang-tools-extra] [mlir][tosa] Add dialect version. (PR #79514)

[clang] [clang-tools-extra] [llvm] [libc] [flang] [mlir] [compiler-rt] [libcxx] [mlir][spirv] Implement gpu::TargetAttrInterface (PR #69949)

[clang-tools-extra] [mlir] Add config for PDL (PR #69927)

[clang] [mlir] Add config for PDL (PR #69927)

[clang-tools-extra] [mlir] Add config for PDL (PR #69927)

[clang] [mlir] Add config for PDL (PR #69927)

[clang-tools-extra] [mlir] Add config for PDL (PR #69927)

[clang] [mlir] Add config for PDL (PR #69927)

[clang-tools-extra] a9f9f3d - Correct typos (NFC)

[clang] 270d580 - [analyzer] Avoid unused variable warning in opt build

Re: [PATCH] D70172: [CUDA][HIP][OpenMP] Emit deferred diagnostics by a post-parsing AST travese

Re: [PATCH] D9168: [NVPTX] Check if callsite is defined when computing argument allignment

Re: [PATCH] D9168: [NVPTX] Check if callsite is defined when computing argument allignment

Re: [PATCH] D9168: [NVPTX] Check if callsite is defined when computing argument allignment

Re: [PATCH] D9168: [NVPTX] Check if callsite is defined when computing argument allignment

Re: r267496 - [lanai] Update handling of structs in arguments to be passed in registers.

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

r264655 - [lanai] Add Lanai backend to clang driver.

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

Re: [PATCH] D17002: [lanai] Add Lanai backend to clang driver

Re: [PATCH] D15305: [CUDA] Do not allow dynamic initialization of global device side variables.

Re: [PATCH] D15309: [CUDA] emit vtables only for classes with methods usable on this side of compilation.

Re: [PATCH] D15309: [CUDA] emit vtables only for classes with methods usable on this side of compilation.

Re: [PATCH] D12917: [CUDA] Allow parsing of host and device code simultaneously.

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