[PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'
benshi001 closed this revision. benshi001 added a comment. Closed by https://reviews.llvm.org/rG80cd505914dfc2f38f57341f9bef9d208fdc238e https://github.com/llvm/llvm-project/commit/80cd505914dfc2f38f57341f9bef9d208fdc238e Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154588/new/ https://reviews.llvm.org/D154588 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'
benshi001 updated this revision to Diff 545952. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154588/new/ https://reviews.llvm.org/D154588 Files: llvm/lib/Target/CSKY/CSKYISelLowering.cpp llvm/lib/Target/CSKY/CSKYInstrInfo.td llvm/test/CodeGen/CSKY/intrinsic.ll Index: llvm/test/CodeGen/CSKY/intrinsic.ll === --- llvm/test/CodeGen/CSKY/intrinsic.ll +++ llvm/test/CodeGen/CSKY/intrinsic.ll @@ -11,6 +11,33 @@ ret i32 %nlz } +define i32 @cttz_0(i32 %x) { +; CHECK-LABEL: cttz_0: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT:bez32 a0, .LBB1_2 +; CHECK-NEXT: # %bb.1: # %cond.false +; CHECK-NEXT:brev32 a0, a0 +; CHECK-NEXT:ff1.32 a0, a0 +; CHECK-NEXT:rts16 +; CHECK-NEXT: .LBB1_2: +; CHECK-NEXT:movi16 a0, 32 +; CHECK-NEXT:rts16 +entry: + %ntz = call i32 @llvm.cttz.i32(i32 %x, i1 0) + ret i32 %ntz +} + +define i32 @cttz_1(i32 %x) { +; CHECK-LABEL: cttz_1: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT:brev32 a0, a0 +; CHECK-NEXT:ff1.32 a0, a0 +; CHECK-NEXT:rts16 +entry: + %ntz = call i32 @llvm.cttz.i32(i32 %x, i1 1) + ret i32 %ntz +} + define i32 @bswap(i32 %x) { ; CHECK-LABEL: bswap: ; CHECK: # %bb.0: # %entry @@ -33,4 +60,5 @@ declare i32 @llvm.bswap.i32(i32) declare i32 @llvm.ctlz.i32 (i32, i1) +declare i32 @llvm.cttz.i32 (i32, i1) declare i32 @llvm.bitreverse.i32(i32) Index: llvm/lib/Target/CSKY/CSKYInstrInfo.td === --- llvm/lib/Target/CSKY/CSKYInstrInfo.td +++ llvm/lib/Target/CSKY/CSKYInstrInfo.td @@ -1429,6 +1429,7 @@ let Predicates = [iHas2E3] in { def : Pat<(bitreverse GPR:$rx), (BREV32 GPR:$rx)>; def : Pat<(bswap GPR:$rx), (REVB32 GPR:$rx)>; +def : Pat<(i32 (cttz GPR:$rx)), (FF1 (BREV32 GPR:$rx))>; } def : Pat<(i32 (ctlz GPR:$rx)), (FF1 GPR:$rx)>; } Index: llvm/lib/Target/CSKY/CSKYISelLowering.cpp === --- llvm/lib/Target/CSKY/CSKYISelLowering.cpp +++ llvm/lib/Target/CSKY/CSKYISelLowering.cpp @@ -59,7 +59,6 @@ setOperationAction(ISD::UREM, MVT::i32, Expand); setOperationAction(ISD::UDIVREM, MVT::i32, Expand); setOperationAction(ISD::SDIVREM, MVT::i32, Expand); - setOperationAction(ISD::CTTZ, MVT::i32, Expand); setOperationAction(ISD::CTPOP, MVT::i32, Expand); setOperationAction(ISD::ROTR, MVT::i32, Expand); setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); @@ -103,6 +102,7 @@ if (!Subtarget.has2E3()) { setOperationAction(ISD::ABS, MVT::i32, Expand); setOperationAction(ISD::BITREVERSE, MVT::i32, Expand); +setOperationAction(ISD::CTTZ, MVT::i32, Expand); setOperationAction(ISD::SDIV, MVT::i32, Expand); setOperationAction(ISD::UDIV, MVT::i32, Expand); } Index: llvm/test/CodeGen/CSKY/intrinsic.ll === --- llvm/test/CodeGen/CSKY/intrinsic.ll +++ llvm/test/CodeGen/CSKY/intrinsic.ll @@ -11,6 +11,33 @@ ret i32 %nlz } +define i32 @cttz_0(i32 %x) { +; CHECK-LABEL: cttz_0: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT:bez32 a0, .LBB1_2 +; CHECK-NEXT: # %bb.1: # %cond.false +; CHECK-NEXT:brev32 a0, a0 +; CHECK-NEXT:ff1.32 a0, a0 +; CHECK-NEXT:rts16 +; CHECK-NEXT: .LBB1_2: +; CHECK-NEXT:movi16 a0, 32 +; CHECK-NEXT:rts16 +entry: + %ntz = call i32 @llvm.cttz.i32(i32 %x, i1 0) + ret i32 %ntz +} + +define i32 @cttz_1(i32 %x) { +; CHECK-LABEL: cttz_1: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT:brev32 a0, a0 +; CHECK-NEXT:ff1.32 a0, a0 +; CHECK-NEXT:rts16 +entry: + %ntz = call i32 @llvm.cttz.i32(i32 %x, i1 1) + ret i32 %ntz +} + define i32 @bswap(i32 %x) { ; CHECK-LABEL: bswap: ; CHECK: # %bb.0: # %entry @@ -33,4 +60,5 @@ declare i32 @llvm.bswap.i32(i32) declare i32 @llvm.ctlz.i32 (i32, i1) +declare i32 @llvm.cttz.i32 (i32, i1) declare i32 @llvm.bitreverse.i32(i32) Index: llvm/lib/Target/CSKY/CSKYInstrInfo.td === --- llvm/lib/Target/CSKY/CSKYInstrInfo.td +++ llvm/lib/Target/CSKY/CSKYInstrInfo.td @@ -1429,6 +1429,7 @@ let Predicates = [iHas2E3] in { def : Pat<(bitreverse GPR:$rx), (BREV32 GPR:$rx)>; def : Pat<(bswap GPR:$rx), (REVB32 GPR:$rx)>; +def : Pat<(i32 (cttz GPR:$rx)), (FF1 (BREV32 GPR:$rx))>; } def : Pat<(i32 (ctlz GPR:$rx)), (FF1 GPR:$rx)>; } Index: llvm/lib/Target/CSKY/CSKYISelLowering.cpp === --- llvm/lib/Target/CSKY/CSKYISelLowering.cpp +++ llvm/lib/Target/CSKY/CSKYISelLowering.cpp @@ -59,7 +59,6 @@ setOperationAction(ISD::UREM, MVT::i32, Expand); setOperationAction(ISD::UDIVREM, MVT::i32, Expand); setOperationAction(ISD::SDIVREM, MVT::i32, Expand); - setOperationAction(ISD::CTTZ, MVT::i32, Expand); setOperationAction(ISD::CTPOP,
[PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'
zixuan-wu added inline comments. Comment at: llvm/test/CodeGen/CSKY/intrinsic.ll:21 +entry: + %ntz = call i32 @llvm.cttz.i32(i32 %x, i1 1) + ret i32 %ntz I think we can also test the condition that the second argument is zero. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154588/new/ https://reviews.llvm.org/D154588 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'
benshi001 added inline comments. Comment at: llvm/test/CodeGen/CSKY/intrinsic.ll:36 +define i16 @bswap16(i16 %x) { +; CHECK-LABEL: bswap16: +; CHECK: # %bb.0: # %entry zixuan-wu wrote: > Again. It's related to cttz? I have made another patch for these additional tests. https://reviews.llvm.org/D156543 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154588/new/ https://reviews.llvm.org/D154588 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'
benshi001 marked 2 inline comments as done. benshi001 added inline comments. Comment at: clang/test/CodeGen/CSKY/csky-builtins.c:67 + return __builtin_bswap64(x); +} zixuan-wu wrote: > Those are target-independent intrinsics/builtins. I think it's no more need > to test for specific target such as csky again, unless it's different > behavior or output. removed. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154588/new/ https://reviews.llvm.org/D154588 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'
benshi001 updated this revision to Diff 545158. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154588/new/ https://reviews.llvm.org/D154588 Files: llvm/lib/Target/CSKY/CSKYISelLowering.cpp llvm/lib/Target/CSKY/CSKYInstrInfo.td llvm/test/CodeGen/CSKY/intrinsic.ll Index: llvm/test/CodeGen/CSKY/intrinsic.ll === --- llvm/test/CodeGen/CSKY/intrinsic.ll +++ llvm/test/CodeGen/CSKY/intrinsic.ll @@ -11,6 +11,17 @@ ret i32 %nlz } +define i32 @cttz(i32 %x) { +; CHECK-LABEL: cttz: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT:brev32 a0, a0 +; CHECK-NEXT:ff1.32 a0, a0 +; CHECK-NEXT:rts16 +entry: + %ntz = call i32 @llvm.cttz.i32(i32 %x, i1 1) + ret i32 %ntz +} + define i32 @bswap(i32 %x) { ; CHECK-LABEL: bswap: ; CHECK: # %bb.0: # %entry @@ -33,4 +44,5 @@ declare i32 @llvm.bswap.i32(i32) declare i32 @llvm.ctlz.i32 (i32, i1) +declare i32 @llvm.cttz.i32 (i32, i1) declare i32 @llvm.bitreverse.i32(i32) Index: llvm/lib/Target/CSKY/CSKYInstrInfo.td === --- llvm/lib/Target/CSKY/CSKYInstrInfo.td +++ llvm/lib/Target/CSKY/CSKYInstrInfo.td @@ -1429,6 +1429,7 @@ let Predicates = [iHas2E3] in { def : Pat<(bitreverse GPR:$rx), (BREV32 GPR:$rx)>; def : Pat<(bswap GPR:$rx), (REVB32 GPR:$rx)>; +def : Pat<(i32 (cttz GPR:$rx)), (FF1 (BREV32 GPR:$rx))>; } def : Pat<(i32 (ctlz GPR:$rx)), (FF1 GPR:$rx)>; } Index: llvm/lib/Target/CSKY/CSKYISelLowering.cpp === --- llvm/lib/Target/CSKY/CSKYISelLowering.cpp +++ llvm/lib/Target/CSKY/CSKYISelLowering.cpp @@ -59,7 +59,6 @@ setOperationAction(ISD::UREM, MVT::i32, Expand); setOperationAction(ISD::UDIVREM, MVT::i32, Expand); setOperationAction(ISD::SDIVREM, MVT::i32, Expand); - setOperationAction(ISD::CTTZ, MVT::i32, Expand); setOperationAction(ISD::CTPOP, MVT::i32, Expand); setOperationAction(ISD::ROTR, MVT::i32, Expand); setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); @@ -103,6 +102,7 @@ if (!Subtarget.has2E3()) { setOperationAction(ISD::ABS, MVT::i32, Expand); setOperationAction(ISD::BITREVERSE, MVT::i32, Expand); +setOperationAction(ISD::CTTZ, MVT::i32, Expand); setOperationAction(ISD::SDIV, MVT::i32, Expand); setOperationAction(ISD::UDIV, MVT::i32, Expand); } Index: llvm/test/CodeGen/CSKY/intrinsic.ll === --- llvm/test/CodeGen/CSKY/intrinsic.ll +++ llvm/test/CodeGen/CSKY/intrinsic.ll @@ -11,6 +11,17 @@ ret i32 %nlz } +define i32 @cttz(i32 %x) { +; CHECK-LABEL: cttz: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT:brev32 a0, a0 +; CHECK-NEXT:ff1.32 a0, a0 +; CHECK-NEXT:rts16 +entry: + %ntz = call i32 @llvm.cttz.i32(i32 %x, i1 1) + ret i32 %ntz +} + define i32 @bswap(i32 %x) { ; CHECK-LABEL: bswap: ; CHECK: # %bb.0: # %entry @@ -33,4 +44,5 @@ declare i32 @llvm.bswap.i32(i32) declare i32 @llvm.ctlz.i32 (i32, i1) +declare i32 @llvm.cttz.i32 (i32, i1) declare i32 @llvm.bitreverse.i32(i32) Index: llvm/lib/Target/CSKY/CSKYInstrInfo.td === --- llvm/lib/Target/CSKY/CSKYInstrInfo.td +++ llvm/lib/Target/CSKY/CSKYInstrInfo.td @@ -1429,6 +1429,7 @@ let Predicates = [iHas2E3] in { def : Pat<(bitreverse GPR:$rx), (BREV32 GPR:$rx)>; def : Pat<(bswap GPR:$rx), (REVB32 GPR:$rx)>; +def : Pat<(i32 (cttz GPR:$rx)), (FF1 (BREV32 GPR:$rx))>; } def : Pat<(i32 (ctlz GPR:$rx)), (FF1 GPR:$rx)>; } Index: llvm/lib/Target/CSKY/CSKYISelLowering.cpp === --- llvm/lib/Target/CSKY/CSKYISelLowering.cpp +++ llvm/lib/Target/CSKY/CSKYISelLowering.cpp @@ -59,7 +59,6 @@ setOperationAction(ISD::UREM, MVT::i32, Expand); setOperationAction(ISD::UDIVREM, MVT::i32, Expand); setOperationAction(ISD::SDIVREM, MVT::i32, Expand); - setOperationAction(ISD::CTTZ, MVT::i32, Expand); setOperationAction(ISD::CTPOP, MVT::i32, Expand); setOperationAction(ISD::ROTR, MVT::i32, Expand); setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); @@ -103,6 +102,7 @@ if (!Subtarget.has2E3()) { setOperationAction(ISD::ABS, MVT::i32, Expand); setOperationAction(ISD::BITREVERSE, MVT::i32, Expand); +setOperationAction(ISD::CTTZ, MVT::i32, Expand); setOperationAction(ISD::SDIV, MVT::i32, Expand); setOperationAction(ISD::UDIV, MVT::i32, Expand); } ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'
benshi001 updated this revision to Diff 545152. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154588/new/ https://reviews.llvm.org/D154588 Files: llvm/lib/Target/CSKY/CSKYISelLowering.cpp llvm/lib/Target/CSKY/CSKYInstrInfo.td llvm/test/CodeGen/CSKY/intrinsic.ll Index: llvm/test/CodeGen/CSKY/intrinsic.ll === --- llvm/test/CodeGen/CSKY/intrinsic.ll +++ llvm/test/CodeGen/CSKY/intrinsic.ll @@ -11,6 +11,17 @@ ret i32 %nlz } +define i32 @cttz(i32 %x) { +; CHECK-LABEL: cttz: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT:brev32 a0, a0 +; CHECK-NEXT:ff1.32 a0, a0 +; CHECK-NEXT:rts16 +entry: + %ntz = call i32 @llvm.cttz.i32(i32 %x, i1 1) + ret i32 %ntz +} + define i32 @bswap(i32 %x) { ; CHECK-LABEL: bswap: ; CHECK: # %bb.0: # %entry @@ -21,8 +32,19 @@ ret i32 %revb32 } -define i32 @bitreverse(i32 %x) { -; CHECK-LABEL: bitreverse: +define i16 @bswap16(i16 %x) { +; CHECK-LABEL: bswap16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT:revb16 a0, a0 +; CHECK-NEXT:lsri16 a0, a0, 16 +; CHECK-NEXT:rts16 +entry: + %revb16 = call i16 @llvm.bswap.i16(i16 %x) + ret i16 %revb16 +} + +define i32 @bitreverse_32(i32 %x) { +; CHECK-LABEL: bitreverse_32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT:brev32 a0, a0 ; CHECK-NEXT:rts16 @@ -31,6 +53,20 @@ ret i32 %brev32 } +define i16 @bitreverse_16(i16 %x) { +; CHECK-LABEL: bitreverse_16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT:brev32 a0, a0 +; CHECK-NEXT:lsri16 a0, a0, 16 +; CHECK-NEXT:rts16 +entry: + %brev = call i16 @llvm.bitreverse.i16(i16 %x) + ret i16 %brev +} + declare i32 @llvm.bswap.i32(i32) +declare i16 @llvm.bswap.i16(i16) declare i32 @llvm.ctlz.i32 (i32, i1) +declare i32 @llvm.cttz.i32 (i32, i1) declare i32 @llvm.bitreverse.i32(i32) +declare i16 @llvm.bitreverse.i16(i16) Index: llvm/lib/Target/CSKY/CSKYInstrInfo.td === --- llvm/lib/Target/CSKY/CSKYInstrInfo.td +++ llvm/lib/Target/CSKY/CSKYInstrInfo.td @@ -1429,6 +1429,7 @@ let Predicates = [iHas2E3] in { def : Pat<(bitreverse GPR:$rx), (BREV32 GPR:$rx)>; def : Pat<(bswap GPR:$rx), (REVB32 GPR:$rx)>; +def : Pat<(i32 (cttz GPR:$rx)), (FF1 (BREV32 GPR:$rx))>; } def : Pat<(i32 (ctlz GPR:$rx)), (FF1 GPR:$rx)>; } Index: llvm/lib/Target/CSKY/CSKYISelLowering.cpp === --- llvm/lib/Target/CSKY/CSKYISelLowering.cpp +++ llvm/lib/Target/CSKY/CSKYISelLowering.cpp @@ -59,7 +59,6 @@ setOperationAction(ISD::UREM, MVT::i32, Expand); setOperationAction(ISD::UDIVREM, MVT::i32, Expand); setOperationAction(ISD::SDIVREM, MVT::i32, Expand); - setOperationAction(ISD::CTTZ, MVT::i32, Expand); setOperationAction(ISD::CTPOP, MVT::i32, Expand); setOperationAction(ISD::ROTR, MVT::i32, Expand); setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); @@ -103,6 +102,7 @@ if (!Subtarget.has2E3()) { setOperationAction(ISD::ABS, MVT::i32, Expand); setOperationAction(ISD::BITREVERSE, MVT::i32, Expand); +setOperationAction(ISD::CTTZ, MVT::i32, Expand); setOperationAction(ISD::SDIV, MVT::i32, Expand); setOperationAction(ISD::UDIV, MVT::i32, Expand); } Index: llvm/test/CodeGen/CSKY/intrinsic.ll === --- llvm/test/CodeGen/CSKY/intrinsic.ll +++ llvm/test/CodeGen/CSKY/intrinsic.ll @@ -11,6 +11,17 @@ ret i32 %nlz } +define i32 @cttz(i32 %x) { +; CHECK-LABEL: cttz: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT:brev32 a0, a0 +; CHECK-NEXT:ff1.32 a0, a0 +; CHECK-NEXT:rts16 +entry: + %ntz = call i32 @llvm.cttz.i32(i32 %x, i1 1) + ret i32 %ntz +} + define i32 @bswap(i32 %x) { ; CHECK-LABEL: bswap: ; CHECK: # %bb.0: # %entry @@ -21,8 +32,19 @@ ret i32 %revb32 } -define i32 @bitreverse(i32 %x) { -; CHECK-LABEL: bitreverse: +define i16 @bswap16(i16 %x) { +; CHECK-LABEL: bswap16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT:revb16 a0, a0 +; CHECK-NEXT:lsri16 a0, a0, 16 +; CHECK-NEXT:rts16 +entry: + %revb16 = call i16 @llvm.bswap.i16(i16 %x) + ret i16 %revb16 +} + +define i32 @bitreverse_32(i32 %x) { +; CHECK-LABEL: bitreverse_32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT:brev32 a0, a0 ; CHECK-NEXT:rts16 @@ -31,6 +53,20 @@ ret i32 %brev32 } +define i16 @bitreverse_16(i16 %x) { +; CHECK-LABEL: bitreverse_16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT:brev32 a0, a0 +; CHECK-NEXT:lsri16 a0, a0, 16 +; CHECK-NEXT:rts16 +entry: + %brev = call i16 @llvm.bitreverse.i16(i16 %x) + ret i16 %brev +} + declare i32 @llvm.bswap.i32(i32) +declare i16 @llvm.bswap.i16(i16) declare i32 @llvm.ctlz.i32 (i32, i1) +declare i32 @llvm.cttz.i32 (i32, i1) declare i32 @llvm.bitreverse.i32(i32) +declare i16 @llvm.bitreverse.i16(i16) Index:
[PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'
zixuan-wu added inline comments. Comment at: clang/test/CodeGen/CSKY/csky-builtins.c:1 +// RUN: %clang_cc1 -triple csky -emit-llvm -o - %s | FileCheck %s + benshi001 wrote: > This file is pure test, has nothing to do with `llvm.cttz`, just to avoid > another patch. Don't make unrelated patch together in one single commit. Comment at: clang/test/CodeGen/CSKY/csky-builtins.c:67 + return __builtin_bswap64(x); +} Those are target-independent intrinsics/builtins. I think it's no more need to test for specific target such as csky again, unless it's different behavior or output. Comment at: llvm/test/CodeGen/CSKY/intrinsic.ll:36 +define i16 @bswap16(i16 %x) { +; CHECK-LABEL: bswap16: +; CHECK: # %bb.0: # %entry Again. It's related to cttz? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154588/new/ https://reviews.llvm.org/D154588 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'
benshi001 added a comment. ping ... Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154588/new/ https://reviews.llvm.org/D154588 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'
benshi001 added inline comments. Comment at: clang/test/CodeGen/CSKY/csky-builtins.c:1 +// RUN: %clang_cc1 -triple csky -emit-llvm -o - %s | FileCheck %s + This file is pure test, has nothing to do with `llvm.cttz`, just to avoid another patch. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154588/new/ https://reviews.llvm.org/D154588 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'
benshi001 updated this revision to Diff 538356. benshi001 set the repository for this revision to rG LLVM Github Monorepo. Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154588/new/ https://reviews.llvm.org/D154588 Files: clang/test/CodeGen/CSKY/csky-builtins.c llvm/lib/Target/CSKY/CSKYISelLowering.cpp llvm/lib/Target/CSKY/CSKYInstrInfo.td llvm/test/CodeGen/CSKY/intrinsic.ll Index: llvm/test/CodeGen/CSKY/intrinsic.ll === --- llvm/test/CodeGen/CSKY/intrinsic.ll +++ llvm/test/CodeGen/CSKY/intrinsic.ll @@ -11,6 +11,17 @@ ret i32 %nlz } +define i32 @cttz(i32 %x) { +; CHECK-LABEL: cttz: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT:brev32 a0, a0 +; CHECK-NEXT:ff1.32 a0, a0 +; CHECK-NEXT:rts16 +entry: + %ntz = call i32 @llvm.cttz.i32(i32 %x, i1 1) + ret i32 %ntz +} + define i32 @bswap(i32 %x) { ; CHECK-LABEL: bswap: ; CHECK: # %bb.0: # %entry @@ -21,8 +32,19 @@ ret i32 %revb32 } -define i32 @bitreverse(i32 %x) { -; CHECK-LABEL: bitreverse: +define i16 @bswap16(i16 %x) { +; CHECK-LABEL: bswap16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT:revb16 a0, a0 +; CHECK-NEXT:lsri16 a0, a0, 16 +; CHECK-NEXT:rts16 +entry: + %revb16 = call i16 @llvm.bswap.i16(i16 %x) + ret i16 %revb16 +} + +define i32 @bitreverse_32(i32 %x) { +; CHECK-LABEL: bitreverse_32: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT:brev32 a0, a0 ; CHECK-NEXT:rts16 @@ -31,6 +53,20 @@ ret i32 %brev32 } +define i16 @bitreverse_16(i16 %x) { +; CHECK-LABEL: bitreverse_16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT:brev32 a0, a0 +; CHECK-NEXT:lsri16 a0, a0, 16 +; CHECK-NEXT:rts16 +entry: + %brev = call i16 @llvm.bitreverse.i16(i16 %x) + ret i16 %brev +} + declare i32 @llvm.bswap.i32(i32) +declare i16 @llvm.bswap.i16(i16) declare i32 @llvm.ctlz.i32 (i32, i1) +declare i32 @llvm.cttz.i32 (i32, i1) declare i32 @llvm.bitreverse.i32(i32) +declare i16 @llvm.bitreverse.i16(i16) Index: llvm/lib/Target/CSKY/CSKYInstrInfo.td === --- llvm/lib/Target/CSKY/CSKYInstrInfo.td +++ llvm/lib/Target/CSKY/CSKYInstrInfo.td @@ -1429,6 +1429,7 @@ let Predicates = [iHas2E3] in { def : Pat<(bitreverse GPR:$rx), (BREV32 GPR:$rx)>; def : Pat<(bswap GPR:$rx), (REVB32 GPR:$rx)>; +def : Pat<(i32 (cttz GPR:$rx)), (FF1 (BREV32 GPR:$rx))>; } def : Pat<(i32 (ctlz GPR:$rx)), (FF1 GPR:$rx)>; } Index: llvm/lib/Target/CSKY/CSKYISelLowering.cpp === --- llvm/lib/Target/CSKY/CSKYISelLowering.cpp +++ llvm/lib/Target/CSKY/CSKYISelLowering.cpp @@ -59,7 +59,6 @@ setOperationAction(ISD::UREM, MVT::i32, Expand); setOperationAction(ISD::UDIVREM, MVT::i32, Expand); setOperationAction(ISD::SDIVREM, MVT::i32, Expand); - setOperationAction(ISD::CTTZ, MVT::i32, Expand); setOperationAction(ISD::CTPOP, MVT::i32, Expand); setOperationAction(ISD::ROTR, MVT::i32, Expand); setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); @@ -103,6 +102,7 @@ if (!Subtarget.has2E3()) { setOperationAction(ISD::ABS, MVT::i32, Expand); setOperationAction(ISD::BITREVERSE, MVT::i32, Expand); +setOperationAction(ISD::CTTZ, MVT::i32, Expand); setOperationAction(ISD::SDIV, MVT::i32, Expand); setOperationAction(ISD::UDIV, MVT::i32, Expand); } Index: clang/test/CodeGen/CSKY/csky-builtins.c === --- /dev/null +++ clang/test/CodeGen/CSKY/csky-builtins.c @@ -0,0 +1,67 @@ +// RUN: %clang_cc1 -triple csky -emit-llvm -o - %s | FileCheck %s + +unsigned char bitrev8(unsigned char data) { + // CHECK: define{{.*}} i8 @bitrev8 + // CHECK: i8 @llvm.bitreverse.i8(i8 + return __builtin_bitreverse8(data); +} + +unsigned short bitrev16(unsigned short data) { + // CHECK: define{{.*}} i16 @bitrev16 + // CHECK: i16 @llvm.bitreverse.i16(i16 + return __builtin_bitreverse16(data); +} + +unsigned long bitrev32(unsigned long data) { + // CHECK: define{{.*}} i32 @bitrev32 + // CHECK: i32 @llvm.bitreverse.i32(i32 + return __builtin_bitreverse32(data); +} + +unsigned long long bitrev64(unsigned long long data) { + // CHECK: define{{.*}} i64 @bitrev64 + // CHECK: i64 @llvm.bitreverse.i64(i64 + return __builtin_bitreverse64(data); +} + +unsigned char rotleft8(unsigned char x, unsigned char y) { + // CHECK: define{{.*}} i8 @rotleft8 + // CHECK: i8 @llvm.fshl.i8(i8 + return __builtin_rotateleft8(x, y); +} + +unsigned short rotleft16(unsigned short x, unsigned short y) { + // CHECK: define{{.*}} i16 @rotleft16 + // CHECK: i16 @llvm.fshl.i16(i16 + return __builtin_rotateleft16(x, y); +} + +unsigned long rotleft32(unsigned long x, unsigned long y) { + // CHECK: define{{.*}} i32 @rotleft32 + // CHECK: i32