[clang] [llvm] [RISCV][MC] Add support for experimental Zcmop extension (PR #76395)

2023-12-26 Thread Yeting Kuo via cfe-commits 


@@ -0,0 +1,30 @@
+//===-- RISCVInstrInfoZcmop.td -*- tablegen 
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file describes the RISC-V instructions from the standard Compressed
+// May-Be-Operations Extension (Zcmop).
+// This version is still experimental as the 'Zcmop' extension hasn't been
+// ratified yet. It is based on v0.2 of the specification.
+//
+//===--===//
+
+let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
+class CMOPInst imm3, string opcodestr>
+: RVInst16CI<0b011, 0b01, (outs), (ins), opcodestr, ""> {
+  let Inst{6-2} = 0;
+  let Inst{7} = 1;
+  let Inst{10-8} = imm3;
+  let Inst{12-11} = 0;
+}
+
+foreach i = 0...7 in {
+let Predicates = [HasStdExtZcmop, HasStdExtCOrZca] in {

yetingk wrote:

`HasStdExtCOrZca` could be implied by `HasStdExtZcmop`, so I think you don't 
need list it.

https://github.com/llvm/llvm-project/pull/76395
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[clang] [llvm] [RISCV][MC] Add support for experimental Zcmop extension (PR #76395)

2023-12-26 Thread Yeting Kuo via cfe-commits 

https://github.com/yetingk edited 
https://github.com/llvm/llvm-project/pull/76395
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[clang] [llvm] [RISCV][MC] Add support for experimental Zcmop extension (PR #76395)

2023-12-26 Thread Yeting Kuo via cfe-commits 

https://github.com/yetingk edited 
https://github.com/llvm/llvm-project/pull/76395
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[clang] [llvm] [RISCV][MC] Add support for experimental Zcmop extension (PR #76395)

2023-12-26 Thread Yeting Kuo via cfe-commits 


@@ -693,6 +693,13 @@ def HasStdExtZimop : 
Predicate<"Subtarget->hasStdExtZimop()">,
AssemblerPredicate<(all_of FeatureStdExtZimop),
"'Zimop' (May-Be-Operations)">;
 
+def FeatureStdExtZcmop : SubtargetFeature<"experimental-zcmop", 
"HasStdExtZcmop", "true",
+  "'Zcmop' (Compressed 
May-Be-Operations)",
+  [FeatureStdExtZca]>;

yetingk wrote:

The spec says Zcmop requires Zca. Is this means Zcmop imply Zca? I am not sure 
with this.

https://github.com/llvm/llvm-project/pull/76395
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[clang] [llvm] [RISCV][MC] Add support for experimental Zcmop extension (PR #76395)

2023-12-26 Thread Craig Topper via cfe-commits 


@@ -693,6 +693,13 @@ def HasStdExtZimop : 
Predicate<"Subtarget->hasStdExtZimop()">,
AssemblerPredicate<(all_of FeatureStdExtZimop),
"'Zimop' (May-Be-Operations)">;
 
+def FeatureStdExtZcmop : SubtargetFeature<"experimental-zcmop", 
"HasStdExtZcmop", "true",
+  "'Zcmop' (Compressed 
May-Be-Operations)",
+  [FeatureStdExtZca]>;

topperc wrote:

I think so. The specs have been very inconsistent on terminology. The 
fundamental issue is that the specs define hardware and don't think about how 
`-march` in tools works. What the spec is saying is that if your hardware 
supports Zcmop, it must support Zca.

https://github.com/llvm/llvm-project/pull/76395
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[clang] [llvm] [RISCV][MC] Add support for experimental Zcmop extension (PR #76395)

2023-12-26 Thread Craig Topper via cfe-commits 


@@ -693,6 +693,13 @@ def HasStdExtZimop : 
Predicate<"Subtarget->hasStdExtZimop()">,
AssemblerPredicate<(all_of FeatureStdExtZimop),
"'Zimop' (May-Be-Operations)">;
 
+def FeatureStdExtZcmop : SubtargetFeature<"experimental-zcmop", 
"HasStdExtZcmop", "true",
+  "'Zcmop' (Compressed 
May-Be-Operations)",
+  [FeatureStdExtZca]>;

topperc wrote:

Any features implications in RISCV.td must also exist in RISCVISAInfo.cpp.

https://github.com/llvm/llvm-project/pull/76395
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[clang] [llvm] [RISCV][MC] Add support for experimental Zcmop extension (PR #76395)

2023-12-26 Thread Craig Topper via cfe-commits 


@@ -0,0 +1,30 @@
+//===-- RISCVInstrInfoZcmop.td -*- tablegen 
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file describes the RISC-V instructions from the standard Compressed
+// May-Be-Operations Extension (Zcmop).
+// This version is still experimental as the 'Zcmop' extension hasn't been
+// ratified yet. It is based on v0.2 of the specification.
+//
+//===--===//
+
+let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
+class CMOPInst imm3, string opcodestr>
+: RVInst16CI<0b011, 0b01, (outs), (ins), opcodestr, ""> {
+  let Inst{6-2} = 0;
+  let Inst{7} = 1;
+  let Inst{10-8} = imm3;
+  let Inst{12-11} = 0;
+}
+
+foreach i = 0...7 in {
+let Predicates = [HasStdExtZcmop, HasStdExtCOrZca] in {

topperc wrote:

Reduce indentation to 2 spaces

https://github.com/llvm/llvm-project/pull/76395
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[clang] [llvm] [RISCV][MC] Add support for experimental Zcmop extension (PR #76395)

2023-12-26 Thread Kito Cheng via cfe-commits 


@@ -693,6 +693,13 @@ def HasStdExtZimop : 
Predicate<"Subtarget->hasStdExtZimop()">,
AssemblerPredicate<(all_of FeatureStdExtZimop),
"'Zimop' (May-Be-Operations)">;
 
+def FeatureStdExtZcmop : SubtargetFeature<"experimental-zcmop", 
"HasStdExtZcmop", "true",
+  "'Zcmop' (Compressed 
May-Be-Operations)",
+  [FeatureStdExtZca]>;

kito-cheng wrote:

My understanding for those terminology on RISC-V ISA spec is: imply == depend 
== require

See comment from Krste and Andrew in this issue: 
https://github.com/riscv/riscv-v-spec/issues/723#issuecomment-922153867

https://github.com/llvm/llvm-project/pull/76395
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[clang] [llvm] [RISCV][MC] Add support for experimental Zcmop extension (PR #76395)

2023-12-26 Thread Wang Pengcheng via cfe-commits 

https://github.com/wangpc-pp updated 
https://github.com/llvm/llvm-project/pull/76395

>From 20fd01b09bb196cf53807b44161482d56a43920b Mon Sep 17 00:00:00 2001
From: wangpc 
Date: Tue, 26 Dec 2023 20:46:13 +0800
Subject: [PATCH 1/3] [RISCV][MC] Add support for experimental Zcmop extension

This implements experimental support for the Zcmop extension as
specified here: 
https://github.com/riscv/riscv-isa-manual/blob/main/src/zimop.adoc.

This change adds only MC support.
---
 .../test/Preprocessor/riscv-target-features.c |  9 
 llvm/docs/RISCVUsage.rst  |  3 ++
 llvm/lib/Support/RISCVISAInfo.cpp |  2 +
 llvm/lib/Target/RISCV/RISCVFeatures.td|  7 
 llvm/lib/Target/RISCV/RISCVInstrInfo.td   |  1 +
 llvm/lib/Target/RISCV/RISCVInstrInfoZcmop.td  | 30 +
 llvm/test/CodeGen/RISCV/attributes.ll |  4 ++
 llvm/test/MC/RISCV/rv32zcmop-invalid.s|  7 
 llvm/test/MC/RISCV/rvzcmop-valid.s| 42 +++
 llvm/unittests/Support/RISCVISAInfoTest.cpp   |  1 +
 10 files changed, 106 insertions(+)
 create mode 100644 llvm/lib/Target/RISCV/RISCVInstrInfoZcmop.td
 create mode 100644 llvm/test/MC/RISCV/rv32zcmop-invalid.s
 create mode 100644 llvm/test/MC/RISCV/rvzcmop-valid.s

diff --git a/clang/test/Preprocessor/riscv-target-features.c 
b/clang/test/Preprocessor/riscv-target-features.c
index 2111b3f1c5832b..661f1fb55159c7 100644
--- a/clang/test/Preprocessor/riscv-target-features.c
+++ b/clang/test/Preprocessor/riscv-target-features.c
@@ -121,6 +121,7 @@
 // CHECK-NOT: __riscv_zicfilp {{.*$}}
 // CHECK-NOT: __riscv_zicond {{.*$}}
 // CHECK-NOT: __riscv_zimop {{.*$}}
+// CHECK-NOT: __riscv_zcmop {{.*$}}
 // CHECK-NOT: __riscv_ztso {{.*$}}
 // CHECK-NOT: __riscv_zvbb {{.*$}}
 // CHECK-NOT: __riscv_zvbc {{.*$}}
@@ -1080,6 +1081,14 @@
 // RUN: -o - | FileCheck --check-prefix=CHECK-ZIMOP-EXT %s
 // CHECK-ZIMOP-EXT: __riscv_zimop  1000{{$}}
 
+// RUN: %clang --target=riscv32 -menable-experimental-extensions \
+// RUN: -march=rv32i_zcmop0p2 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZCMOP-EXT %s
+// RUN: %clang --target=riscv64 -menable-experimental-extensions \
+// RUN: -march=rv32i_zcmop0p2 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZCMOP-EXT %s
+// CHECK-ZCMOP-EXT: __riscv_zcmop  2000{{$}}
+
 // RUN: %clang --target=riscv32-unknown-linux-gnu 
-menable-experimental-extensions \
 // RUN: -march=rv32iztso0p1 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-ZTSO-EXT %s
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index 3125f2d7c9cfdb..836a4e9ff08e55 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -224,6 +224,9 @@ The primary goal of experimental support is to assist in 
the process of ratifica
 ``experimental-zimop``
   LLVM implements the `v0.1 proposed specification 
`__.
 
+``experimental-zcmop``
+  LLVM implements the `v0.2 proposed specification 
`__.
+
 To use an experimental extension from `clang`, you must add 
`-menable-experimental-extensions` to the command line, and specify the exact 
version of the experimental extension you are using.  To use an experimental 
extension with LLVM's internal developer tools (e.g. `llc`, `llvm-objdump`, 
`llvm-mc`), you must prefix the extension name with `experimental-`.  Note that 
you don't need to specify the version with internal tools, and shouldn't 
include the `experimental-` prefix with `clang`.
 
 Vendor Extensions
diff --git a/llvm/lib/Support/RISCVISAInfo.cpp 
b/llvm/lib/Support/RISCVISAInfo.cpp
index e71e96e3417e46..36d453a53c1057 100644
--- a/llvm/lib/Support/RISCVISAInfo.cpp
+++ b/llvm/lib/Support/RISCVISAInfo.cpp
@@ -191,6 +191,8 @@ static const RISCVSupportedExtension SupportedExtensions[] 
= {
 static const RISCVSupportedExtension SupportedExperimentalExtensions[] = {
 {"zacas", RISCVExtensionVersion{1, 0}},
 
+{"zcmop", RISCVExtensionVersion{0, 2}},
+
 {"zfbfmin", RISCVExtensionVersion{0, 8}},
 
 {"zicfilp", RISCVExtensionVersion{0, 4}},
diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td 
b/llvm/lib/Target/RISCV/RISCVFeatures.td
index a6e7c15b50e978..adf3c84b586a25 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -693,6 +693,13 @@ def HasStdExtZimop : 
Predicate<"Subtarget->hasStdExtZimop()">,
AssemblerPredicate<(all_of FeatureStdExtZimop),
"'Zimop' (May-Be-Operations)">;
 
+def FeatureStdExtZcmop : SubtargetFeature<"experimental-zcmop", 
"HasStdExtZcmop", "true",
+  "'Zcmop' (Compressed 
May-Be-Operations)",
+  [FeatureStdExtZca]>;
+def HasStdExtZcmop : Predicate<"Subtarget->hasStdExtZcmop()">,
+   Ass

[clang] [llvm] [RISCV][MC] Add support for experimental Zcmop extension (PR #76395)

2023-12-27 Thread Yeting Kuo via cfe-commits 

https://github.com/yetingk approved this pull request.

LGTM. But please wait for @topperc's review.

https://github.com/llvm/llvm-project/pull/76395
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[clang] [llvm] [RISCV][MC] Add support for experimental Zcmop extension (PR #76395)

2023-12-27 Thread Wang Pengcheng via cfe-commits 

https://github.com/wangpc-pp closed 
https://github.com/llvm/llvm-project/pull/76395
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