Author: yaxunl Date: Thu Apr 6 14:18:36 2017 New Revision: 299691 URL: http://llvm.org/viewvc/llvm-project?rev=299691&view=rev Log: [AMDGPU] Temporarily change constant address space from 4 to 2 for the new address space mapping
Change constant address space from 4 to 2 for the new address space mapping in Clang. Differential Revision: https://reviews.llvm.org/D31771 Modified: cfe/trunk/lib/Basic/Targets.cpp cfe/trunk/test/CodeGenOpenCL/address-space-constant-initializers.cl cfe/trunk/test/CodeGenOpenCL/amdgpu-env-amdgiz.cl Modified: cfe/trunk/lib/Basic/Targets.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=299691&r1=299690&r2=299691&view=diff ============================================================================== --- cfe/trunk/lib/Basic/Targets.cpp (original) +++ cfe/trunk/lib/Basic/Targets.cpp Thu Apr 6 14:18:36 2017 @@ -2042,10 +2042,10 @@ static const LangAS::Map AMDGPUPrivateIs static const LangAS::Map AMDGPUGenericIsZeroMap = { 1, // opencl_global 3, // opencl_local - 4, // opencl_constant + 2, // opencl_constant 0, // opencl_generic 1, // cuda_device - 4, // cuda_constant + 2, // cuda_constant 3 // cuda_shared }; @@ -2062,7 +2062,7 @@ static const char *const DataLayoutStrin "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"; static const char *const DataLayoutStringSIGenericIsZero = - "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32" + "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:32:32" "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128" "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"; @@ -2077,7 +2077,7 @@ class AMDGPUTargetInfo final : public Ta Generic = 0; Global = 1; Local = 3; - Constant = 4; + Constant = 2; Private = 5; } else { Generic = 4; Modified: cfe/trunk/test/CodeGenOpenCL/address-space-constant-initializers.cl URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenOpenCL/address-space-constant-initializers.cl?rev=299691&r1=299690&r2=299691&view=diff ============================================================================== --- cfe/trunk/test/CodeGenOpenCL/address-space-constant-initializers.cl (original) +++ cfe/trunk/test/CodeGenOpenCL/address-space-constant-initializers.cl Thu Apr 6 14:18:36 2017 @@ -1,4 +1,6 @@ // RUN: %clang_cc1 %s -ffake-address-space-map -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 %s -triple amdgcn-amd-amdhsa-opencl -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 %s -triple amdgcn-amd-amdhsa-amdgizcl -emit-llvm -o - | FileCheck %s typedef struct { int i; Modified: cfe/trunk/test/CodeGenOpenCL/amdgpu-env-amdgiz.cl URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenOpenCL/amdgpu-env-amdgiz.cl?rev=299691&r1=299690&r2=299691&view=diff ============================================================================== --- cfe/trunk/test/CodeGenOpenCL/amdgpu-env-amdgiz.cl (original) +++ cfe/trunk/test/CodeGenOpenCL/amdgpu-env-amdgiz.cl Thu Apr 6 14:18:36 2017 @@ -4,6 +4,6 @@ // RUN: %clang_cc1 %s -O0 -triple amdgcn---amdgizcl -emit-llvm -o - | FileCheck -check-prefix=GIZ %s // CHECK: target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64" -// GIZ: target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64" +// GIZ: target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64" void foo(void) {} _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits