[coreboot] Patch merged into master: 89461d8 port_enable and port_reset must change atomically.
the following patch was just integrated into master: commit 89461d88a0e163ab5fee96908a4195035fe800f5 Author: Steven A. Falco sfa...@coincident.com Date: Fri Jul 15 21:44:35 2011 -0400 port_enable and port_reset must change atomically. I have observed two separate EHCI host bridges that do not tolerate using C bit-fields to directly manipulate the portsc_t register. The reason for this is that the EHCI spec says that port_enable must go to 0 at the time that port_reset goes to 1. Naturally this cannot be done using direct bit-field manipulation. Instead, we use a temporary variable, change the bit-fields there, then atomically write the new value back to the hardware. Signed-off-by: Steven A. Falco sfa...@coincident.com Change-Id: If138faee43e0293efa203b86f7893fdf1e811269 See http://review.coreboot.org/101 for details. -gerrit -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] New patch to review: 662ddf3 Fix coreboot revision detection
Patrick Georgi (patr...@georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/110 -gerrit commit 662ddf3cfcb85266aed897825c2f6abda0919d7e Author: Patrick Georgi patr...@georgi-clan.de Date: Sun Jul 17 11:32:51 2011 +0200 Fix coreboot revision detection Neither do we publish coreboot via svn, nor is git-svn a useful indicator anymore. Instead, fetch a shortened commit id. Change-Id: I1b990384553209a7d39ecf7f5e8a2db7c7e34d0b Signed-off-by: Patrick Georgi patr...@georgi-clan.de --- Makefile.inc |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index 2b3ea8d..65550e6 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -19,7 +19,7 @@ ### # misleadingly named, this is the coreboot version -REV=-r$(shell if [ -d $(top)/.svn -a -f `which svnversion` ]; then svnversion $(top); else if [ -d $(top)/.git -a -f `which git` ]; then git --git-dir=/$(top)/.git log|grep git-svn-id|cut -f 2 -d@|cut -f 1 -d' '|sort -g|tail -1; fi; fi) +REV=-r$(shell if [ -d $(top)/.git -a -f `which git` ]; then git --git-dir=/$(top)/.git show -s --pretty=format:%h; fi) export KERNELVERSION := 4.0$(REV) ### -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] New patch to review: e2e5c9b buildgcc: Break if parts of the toolchain are missing We test for the presence of a couple of tools and even print an error. But the tool didn't stop there.
Patrick Georgi (patr...@georgi-clan.de) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/111
-gerrit
commit e2e5c9b848ff94fa02714a9fd4047fe65add2fd0
Author: Patrick Georgi patr...@georgi-clan.de
Date: Sun Jul 17 11:36:10 2011 +0200
buildgcc: Break if parts of the toolchain are missing
We test for the presence of a couple of tools and even print an error.
But the tool didn't stop there.
Change-Id: I40dcf7894408ea7b24d5f68c76df4b7541f469bd
Signed-off-by: Patrick Georgi patr...@georgi-clan.de
---
util/crossgcc/buildgcc |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
index 9211cfd..355b01a 100755
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
@@ -88,9 +88,9 @@ searchgnu()
exit 1
}
-TAR=`searchgnu tar`
-PATCH=`searchgnu patch`
-MAKE=`searchgnu make`
+TAR=`searchgnu tar` || exit $?
+PATCH=`searchgnu patch` || exit $?
+MAKE=`searchgnu make` || exit $?
cleanup()
{
--
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[coreboot] Patch set updated: c7d7cdb Un-perl commit-msg hook
Patrick Georgi (patr...@georgi-clan.de) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/78
-gerrit
commit c7d7cdb0bd994c887cab6f617497b20069be8a2d
Author: Patrick Georgi patr...@georgi-clan.de
Date: Sat Jul 2 00:35:02 2011 +0200
Un-perl commit-msg hook
To simplify installation on mingw a bit (even though git remains a pain),
drop the perl dependency the commit-msg hook introduced to the coreboot
development environment.
It's replaced by awk which we use elsewhere already (and is a more
lightweight
utility in any case)
Change-Id: I67adfe1ec43c898735d4bae4819ceb53e83c303b
Signed-off-by: Patrick Georgi patr...@georgi-clan.de
---
util/gitconfig/commit-msg | 121 -
1 files changed, 87 insertions(+), 34 deletions(-)
diff --git a/util/gitconfig/commit-msg b/util/gitconfig/commit-msg
index 789bad3..548f373 100755
--- a/util/gitconfig/commit-msg
+++ b/util/gitconfig/commit-msg
@@ -1,5 +1,4 @@
#!/bin/sh
-# From Gerrit Code Review 2.1.7-rc2
#
# Part of Gerrit Code Review (http://code.google.com/p/gerrit/)
#
@@ -37,56 +36,110 @@ add_ChangeId() {
return
fi
+ # Does Change-Id: already exist? if so, exit (no change).
if grep -i '^Change-Id:' $MSG /dev/null
then
return
fi
id=`_gen_ChangeId`
- perl -e '
- $MSG = shift;
- $id = shift;
- $CHANGE_ID_AFTER = shift;
+ T=$MSG.tmp.$$
+ AWK=awk
+ if [ -x /usr/xpg4/bin/awk ]; then
+ # Solaris AWK is just too broken
+ AWK=/usr/xpg4/bin/awk
+ fi
+ $AWK '
+ # Skip lines starting with # without any spaces before it.
+ /^#/ { next }
- undef $/;
- open(I, $MSG); $_ = I; close I;
- s|^diff --git a/.*||ms;
- s|^#.*$||mg;
- exit unless $_;
+ # Skip the line starting with the diff command and everything after it,
+ # up to the end of the file, assuming it is only patch data.
+ # If more than one line before the diff was empty, strip all but one.
+ /^diff --git a/ {
+ if (blankLines 1) {
+ blankLines = 1
+ }
+ while (getline) { }
+ next
+ }
- @message = split /\n/;
- $haveFooter = 0;
- $startFooter = @message;
- for($line = @message - 1; $line = 0; $line--) {
- $_ = $message[$line];
+ # Handle comments and continuations in tags ([foo: bar] etc)
+ (caught == 1) /^[ []/ {
+ if (lines != ) {
+ lines = lines \n
+ }
+ lines = lines $0
+ next
+ }
- if (/^[a-zA-Z0-9-]+:/ !m,^[a-z0-9-]+://,) {
- $haveFooter++;
- next;
+ # Handle normal lines (ie. not starting with some tag like
Signed-off-by:).
+ # If normal text appears after tags were caught, handle them as
normal text, too.
+ # Also count blank lines in blankLines.
+ !/^[a-zA-Z0-9-]+:/ || /^[a-zA-Z0-9-]+:\/\// {
+ if ($0 == ) {
+ blankLines++
+ next
+ } else {
+ for (i = 0; i blankLines; i++) {
+ print
}
- next if /^[ []/;
- $startFooter = $line if ($haveFooter /^\r?$/);
- last;
+ blankLines = 0
}
+ if (caught == 1) {
+ caught = 0
+ print lines
+ lines =
+ }
+ print $0
+ next
+ }
- @footer = @message[$startFooter+1..@message];
- @message = @message[0..$startFooter];
- push(@footer, ) unless @footer;
-
- for ($line = 0; $line @footer; $line++) {
- $_ = $footer[$line];
- next if /^($CHANGE_ID_AFTER):/i;
- last;
+ # Handle tags. They are caught and collected in the lines variable
+ {
+ caught = 1
+ if (lines != ) {
+ lines = lines \n;
}
- splice(@footer, $line, 0, Change-Id: I$id);
+ lines = lines $0
+ }
- $_ = join(\n, @message, @footer);
- open(O, $MSG); print O; close O;
- ' $MSG $id $CHANGE_ID_AFTER
+ # Tag handling:
+ # If last line before tags was not blank, there were no tags.
+ # In that case, print everything, plus a blank line, followed by
Change-Id.
+ # Otherwise there were
[coreboot] Patch set updated: 036c126 buildgcc: Break if parts of the toolchain are missing
Patrick Georgi (patr...@georgi-clan.de) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/111
-gerrit
commit 036c126975c8c2edb198759d06ee1694c26068aa
Author: Patrick Georgi patr...@georgi-clan.de
Date: Sun Jul 17 11:36:10 2011 +0200
buildgcc: Break if parts of the toolchain are missing
We test for the presence of a couple of tools and even print an error.
But the tool didn't stop there.
Change-Id: I40dcf7894408ea7b24d5f68c76df4b7541f469bd
Signed-off-by: Patrick Georgi patr...@georgi-clan.de
---
util/crossgcc/buildgcc |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
index 9211cfd..355b01a 100755
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
@@ -88,9 +88,9 @@ searchgnu()
exit 1
}
-TAR=`searchgnu tar`
-PATCH=`searchgnu patch`
-MAKE=`searchgnu make`
+TAR=`searchgnu tar` || exit $?
+PATCH=`searchgnu patch` || exit $?
+MAKE=`searchgnu make` || exit $?
cleanup()
{
--
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http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Flashing via TPM
On Sun, Jul 17, 2011 at 12:38 PM, Andrew Bolster m...@andrewbolster.infowrote: Tom, Thank you for your response. I'll investigate the SPI angle. Is there any structure for collecting information like this within the coreboot community about specific boards for those of us who are more soft than hardware? The Flashrom wiki page and mailing list are great places to start. There are a few in-system SPI programmers you can try which are supported by Flashrom, such as the Bus Pirate ($30). -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Coreboot on the Thinkpad T61p ?
On 07/16/11 01:55 PM, Peter Stuge wrote: Patrick Arnoux wrote: we don't have any documentation for the i965 (crestline) Memory Controller Not sure if this is the relevant document, .. Mobile Intel® 965 Express Chipset Family Datasheet It isn't. This is only a shallow overview of the chipset. The neccessary documentation requires two levels of NDAs with Intel which in turn requires a solid business case. Further, having access to the right application engineers within Intel during development can easily make the difference of several man-months of forward and reverse engineering, trial and error and guesswork. (Ie. the NDAed docs are also not exhaustive. //Peter This shallow overview weighs in at over 500 pages. I guess it means we are not in Kansas anymore. These NDAed docs must rival War and Peace. As I am still very much interested in the T61, and if you all don't mind, I would like to ask a couple of questions : A) My first thought was to start from the T60, modify whatever needed to be and thank you ma'am Simplistic, yes, but are the T60 and T61 so fundamentally different that this is never going to fly. B) Besides the i965 Controller, what other chips do we need documentation for on the T61 ? C) If I can get to the point where control is handed over to the on disk Boot Block (mind you, this can be USB, DVD, CD, PCMCIA, or Hard disk), do I care anymore about the BIOS. Does an Operating System ;Solaris, Linux, Unix or whatever just goes on about its business and really couldn't give two hoots about whether and what kind of BIOS exists on the machine. D) If there are indeed system calls made to the BIOS, what are they and what are the affected chips. E) What is the minimum level of hardware initialization that needs to be done in order to be able to load an OS. F) Bottom line, I am not interested in an all singing, all dancing BIOS, I just want to load the OS and to paraphrase a quote from Linus T. I just ran into, he just wants the BIOS to load the OS and get the double F out of the way! I would really appreciate it if people with knowledge of any of the above points would take the time to comment about what they know and I will take it upon myself to summarize. And if you feel like telling me to go Read The FAQ or the Fine Manual, please, point me in the right direction. It would also be appreciated. Patrick -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [RFC] Universal panic-room serial console, for x86 BIOS bootblock
Pete Batard wrote:
]Also, if it's not too much to ask and if the code works without
]FORCE_PANIC, I wouldn't mind finding out where it breaks if not using
]the 48 MHz init (using forced base/type/ldn).
]
]I have now committed your patch to svn. Will still need to figure out
]what the best approach might be with regards to 48 MHz SIO init.
Hello Pete,
I do not have that board setup at the moment so I cannot try it without
FORCE_PANIC. It seems like a baud rate change could substitute for the LPC
clock frequency programming, but so far that does not work as expected.
I have an AMD SB900 board with Nuvoton NCT6776F. To make the serial port
work on this board, two pieces of non-generic code are needed.
1) SIO com1 pins default to GPIO and must switched to serial port use:
// logical device 2 (UART A) defaults to base 3f8, irq 4, enabled
// all that is needed for early serial is to switch some dual function
// pins from gpio use (default) to serial port use. Clearing cr2a bit 7
// does this.
u8 reg8;
pnp_enter_ext_func_mode(dev);
reg8 = pnp_read_config(dev, 0x2a);
reg8 = ~(1 7);
pnp_write_config(dev, 0x2a, reg8);
pnp_exit_ext_func_mode(dev);
2) LPC clock frequency programming and enable:
static void sb900_clocks(void)
{
u8 reg8;
u32 reg32;
volatile u32 *acpi_mmio28 = (void *) (0xFED8 + 0xE00 + 0x28);
volatile u32 *acpi_mmio40 = (void *) (0xFED8 + 0xE00 + 0x40);
// Program AcpiMmioEn to enable MMIO access to ClkDrvSth2, MiscClkCntrl
registers
outb(0x24, 0xCD6);
reg8 = inb(0xCD7);
reg8 |= 1;
reg8 = ~(1 1);
outb(reg8, 0xCD7);
// Program ClkDrvSth2 OSCOUT1_CLK_sel for 48 MHz (default is 14 MHz)
reg32 = *acpi_mmio28;
reg32 = ~(7 16);
reg32 |= 2 16;
*acpi_mmio28 = reg32;
// Program MiscClkCntrl OSCOUT1_Clk_OutputEn to zero to enable LPC clock
reg32 = *acpi_mmio40;
reg32 = ~(1 2); // Auxiliary Clock1, OSCOUT1 clock output enable
*acpi_mmio40 = reg32;
}
Thanks,
Scott
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