[coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Zvi Vered]

Hello,

I have an Intel's ATOM Bay Trail board. The output of "inteltool" is:

CPU: ID 0x30679, Processor Type 0x0, Family 0x6, Model 0x37, Stepping 0x9
Northbridge: 8086:0f00 (Bay Trail)
Southbridge: 8086:0f1c (Bay Trail)
IGD: 8086:0f31 (unknown)

In coreboot configuration I selected:
Mainboard -> Mainboard model -> Bayley Bay FSP-based CRB
The default ROM chip size is 2MB.
This is also the size of coreboot.rom created after "make"

The board has 8MB BIOS flash.
It's delivered with a BIOS programming utility that runs under EFI shell.

The original BIOS has 2 versions: rom (5MB) and bin (8MB)
I tried to burn the 2MB coreboot.rom with the vendor's BIOS utlity.

I got:
3 - Error: ROM file size does not match existing BIOS size.
Should I convert coreboot.rom to coreboot.bin ? How ?
If not, how can I program coreboot.rom ?

Thank you,
Zvika
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Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Jose Trujillo via coreboot]

Hello Zvika:

First get the correct original full 8MB FW from the manufacturer or dump it 
from the board with the command in EFI:
"ftp -d BYT_orig.bin" and double save it.

2.- in coreboot/util/ifdtool do make and sudo make install.
3.- in terminal go to the FW directory and do:"ifdtool BYT_orig.bin -f 
fw_layout.txt"
  a).- in "fw_layout.txt" you will get the BIOS area size from the original 
FW (just substract).
  b).- if the size of the original BIOS is bigger or equal than coreboot 
build you are good to go ahead.
4.- copy/move "BYT_orig.bin" in the directory which resides the coreboot folder 
(not inside the coreboot folder) and do:
 ifdtool -i BIOS:./coreboot/build/coreboot.rom CB_baytrail.bin
5.- flash it:   "fpt -f CB_baytrail.bin" booting from UEFI.

If the build was correctly done and followed accurately those steps the system 
should boot.

Good luck,
Jose Trujillo.

‐‐‐ Original Message ‐‐‐
On Monday, September 24, 2018 10:18 PM, Zvi Vered  wrote:

> Hello,
>
> I have an Intel's ATOM Bay Trail board. The output of "inteltool" is:
>
> CPU: ID 0x30679, Processor Type 0x0, Family 0x6, Model 0x37, Stepping 0x9
> Northbridge: 8086:0f00 (Bay Trail)
> Southbridge: 8086:0f1c (Bay Trail)
> IGD: 8086:0f31 (unknown)
>
> In coreboot configuration I selected:
> Mainboard -> Mainboard model -> Bayley Bay FSP-based CRB
> The default ROM chip size is 2MB.
> This is also the size of coreboot.rom created after "make"
>
> The board has 8MB BIOS flash.
> It's delivered with a BIOS programming utility that runs under EFI shell.
>
> The original BIOS has 2 versions: rom (5MB) and bin (8MB)
> I tried to burn the 2MB coreboot.rom with the vendor's BIOS utlity.
>
> I got:
> 3 - Error: ROM file size does not match existing BIOS size.
> Should I convert coreboot.rom to coreboot.bin ? How ?
> If not, how can I program coreboot.rom ?
>
> Thank you,
> Zvika-- 
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https://mail.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Nico Huber]

Hello Zvika,

On 9/24/18 9:18 PM, Zvi Vered wrote:
> I have an Intel's ATOM Bay Trail board. The output of "inteltool" is:
> 
> CPU: ID 0x30679, Processor Type 0x0, Family 0x6, Model 0x37, Stepping 0x9
> Northbridge: 8086:0f00 (Bay Trail)
> Southbridge: 8086:0f1c (Bay Trail)
> IGD: 8086:0f31 (unknown)
> 
> In coreboot configuration I selected:
> Mainboard -> Mainboard model -> Bayley Bay FSP-based CRB
> The default ROM chip size is 2MB.
> This is also the size of coreboot.rom created after "make"
> 
> The board has 8MB BIOS flash.
> It's delivered with a BIOS programming utility that runs under EFI shell.

is your board related to the Bayley Bay CRB? or is it just a random new
Bay Trail board? I'm not sure how much Bay Trail boards differ, but
usually you have to adapt a lot settings in coreboot for a new board
(like the ROM size). I always advice to check the GPIO and other pin
settings first, before trying to boot a new board.

> The original BIOS has 2 versions: rom (5MB) and bin (8MB)
> I tried to burn the 2MB coreboot.rom with the vendor's BIOS utlity.

That's not a good idea. In case the board doesn't boot anymore after-
wards (which is likely for a first shot), you need an external flash
programmer anyway.

Nico

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Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Jose Trujillo via coreboot]

Zvika:
Sorry I Forgot:
"CB_baytrail.bin" is just a renamed copy of "BYT_orig.bin".
After that command a new file will be named: "BYT_orig.bin.new"
Jose.

‐‐‐ Original Message ‐‐‐
On Tuesday, September 25, 2018 10:16 AM, Jose Trujillo 
 wrote:

> Hello Zvika:
>
> First get the correct original full 8MB FW from the manufacturer or dump it 
> from the board with the command in EFI:
> "ftp -d BYT_orig.bin" and double save it.
>
> 2.- in coreboot/util/ifdtool do make and sudo make install.
> 3.- in terminal go to the FW directory and do:"ifdtool BYT_orig.bin -f 
> fw_layout.txt"
>   a).- in "fw_layout.txt" you will get the BIOS area size from the 
> original FW (just substract).
>   b).- if the size of the original BIOS is bigger or equal than coreboot 
> build you are good to go ahead.
> 4.- copy/move "BYT_orig.bin" in the directory which resides the coreboot 
> folder (not inside the coreboot folder) and do:
>  ifdtool -i BIOS:./coreboot/build/coreboot.rom CB_baytrail.bin
> 5.- flash it:   "fpt -f CB_baytrail.bin" booting from UEFI.
>
> If the build was correctly done and followed accurately those steps the 
> system should boot.
>
> Good luck,
> Jose Trujillo.
>
> ‐‐‐ Original Message ‐‐‐
> On Monday, September 24, 2018 10:18 PM, Zvi Vered  wrote:
>
>> Hello,
>>
>> I have an Intel's ATOM Bay Trail board. The output of "inteltool" is:
>>
>> CPU: ID 0x30679, Processor Type 0x0, Family 0x6, Model 0x37, Stepping 0x9
>> Northbridge: 8086:0f00 (Bay Trail)
>> Southbridge: 8086:0f1c (Bay Trail)
>> IGD: 8086:0f31 (unknown)
>>
>> In coreboot configuration I selected:
>> Mainboard -> Mainboard model -> Bayley Bay FSP-based CRB
>> The default ROM chip size is 2MB.
>> This is also the size of coreboot.rom created after "make"
>>
>> The board has 8MB BIOS flash.
>> It's delivered with a BIOS programming utility that runs under EFI shell.
>>
>> The original BIOS has 2 versions: rom (5MB) and bin (8MB)
>> I tried to burn the 2MB coreboot.rom with the vendor's BIOS utlity.
>>
>> I got:
>> 3 - Error: ROM file size does not match existing BIOS size.
>> Should I convert coreboot.rom to coreboot.bin ? How ?
>> If not, how can I program coreboot.rom ?
>>
>> Thank you,
>> Zvika-- 
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Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Zvi Vered]

Hi Jose,

Thank you very much for the detail information.
The output of ifdtool in layout.txt is:
:0fff fd
0030:007f bios
1000:002f me

So the original bios size is 0x50 = 5MB

You wrote:
 if the size of the original BIOS is bigger or equal than coreboot build
you are good to go ahead.

The original "ROM chip size" in menuconfig is 2MB. Should I change it to
8MB ?

I'm aware my board is not identical to the "Bayley Bay FSP-based CRB"
Should I use another board as reference ?

Best regards,
Zvika


On Tue, Sep 25, 2018 at 10:16 AM Jose Trujillo 
wrote:

> Hello Zvika:
>
> First get the correct original full 8MB FW from the manufacturer or dump
> it from the board with the command in EFI:
> "ftp -d BYT_orig.bin" and double save it.
>
> 2.- in coreboot/util/ifdtool do make and sudo make install.
> 3.- in terminal go to the FW directory and do:"ifdtool BYT_orig.bin -f
> fw_layout.txt"
>   a).- in "fw_layout.txt" you will get the BIOS area size from the
> original FW (just substract).
>   b).- if the size of the original BIOS is bigger or equal than
> coreboot build you are good to go ahead.
> 4.- copy/move "BYT_orig.bin" in the directory which resides the coreboot
> folder (not inside the coreboot folder) and do:
>  ifdtool -i BIOS:./coreboot/build/coreboot.rom CB_baytrail.bin
> 5.- flash it:   "fpt -f CB_baytrail.bin" booting from UEFI.
>
> If the build was correctly done and followed accurately those steps the
> system should boot.
>
> Good luck,
> Jose Trujillo.
>
> ‐‐‐ Original Message ‐‐‐
> On Monday, September 24, 2018 10:18 PM, Zvi Vered 
> wrote:
>
> Hello,
>
> I have an Intel's ATOM Bay Trail board. The output of "inteltool" is:
>
> CPU: ID 0x30679, Processor Type 0x0, Family 0x6, Model 0x37, Stepping 0x9
> Northbridge: 8086:0f00 (Bay Trail)
> Southbridge: 8086:0f1c (Bay Trail)
> IGD: 8086:0f31 (unknown)
>
> In coreboot configuration I selected:
> Mainboard -> Mainboard model -> Bayley Bay FSP-based CRB
> The default ROM chip size is 2MB.
> This is also the size of coreboot.rom created after "make"
>
> The board has 8MB BIOS flash.
> It's delivered with a BIOS programming utility that runs under EFI shell.
>
> The original BIOS has 2 versions: rom (5MB) and bin (8MB)
> I tried to burn the 2MB coreboot.rom with the vendor's BIOS utlity.
>
> I got:
> 3 - Error: ROM file size does not match existing BIOS size.
> Should I convert coreboot.rom to coreboot.bin ? How ?
> If not, how can I program coreboot.rom ?
>
> Thank you,
> Zvika
>
>
>
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Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Jose Trujillo via coreboot]

You are welcome,

No, don't change it, you change the size of coreboot only if during the 
building process "make" complain that there is not enough space but in your 
case your build was already successful leave it like that.

In the rare circumstance that more space is required you can increase coreboot 
size to 4MB and istill will fit into your system 5MB of space available.

"ifdtool" will inject coreboot in the top of the BYT_orig.bin and save as 
BYT_orig.bin.new that you can flash to your system.

Please follow Nico's recommendations and be aware that is highly likely that 
the system will not boot the first time and you will need an external 
programmer for restoring the system.

Have a good day,
Jose Trujillo.

‐‐‐ Original Message ‐‐‐
On Tuesday, September 25, 2018 11:59 PM, Zvi Vered  wrote:

> Hi Jose,
>
> Thank you very much for the detail information.
> The output of ifdtool in layout.txt is:
> :0fff fd
> 0030:007f bios
> 1000:002f me
>
> So the original bios size is 0x50 = 5MB
>
> You wrote:
>  if the size of the original BIOS is bigger or equal than coreboot build you 
> are good to go ahead.
>
> The original "ROM chip size" in menuconfig is 2MB. Should I change it to 8MB ?
>
> I'm aware my board is not identical to the "Bayley Bay FSP-based CRB"
> Should I use another board as reference ?
>
> Best regards,
> Zvika
>
> On Tue, Sep 25, 2018 at 10:16 AM Jose Trujillo  
> wrote:
>
>> Hello Zvika:
>>
>> First get the correct original full 8MB FW from the manufacturer or dump it 
>> from the board with the command in EFI:
>> "ftp -d BYT_orig.bin" and double save it.
>>
>> 2.- in coreboot/util/ifdtool do make and sudo make install.
>> 3.- in terminal go to the FW directory and do:"ifdtool BYT_orig.bin -f 
>> fw_layout.txt"
>>   a).- in "fw_layout.txt" you will get the BIOS area size from the 
>> original FW (just substract).
>>   b).- if the size of the original BIOS is bigger or equal than coreboot 
>> build you are good to go ahead.
>> 4.- copy/move "BYT_orig.bin" in the directory which resides the coreboot 
>> folder (not inside the coreboot folder) and do:
>>  ifdtool -i BIOS:./coreboot/build/coreboot.rom CB_baytrail.bin
>> 5.- flash it:   "fpt -f CB_baytrail.bin" booting from UEFI.
>>
>> If the build was correctly done and followed accurately those steps the 
>> system should boot.
>>
>> Good luck,
>> Jose Trujillo.
>>
>> ‐‐‐ Original Message ‐‐‐
>> On Monday, September 24, 2018 10:18 PM, Zvi Vered  wrote:
>>
>>> Hello,
>>>
>>> I have an Intel's ATOM Bay Trail board. The output of "inteltool" is:
>>>
>>> CPU: ID 0x30679, Processor Type 0x0, Family 0x6, Model 0x37, Stepping 0x9
>>> Northbridge: 8086:0f00 (Bay Trail)
>>> Southbridge: 8086:0f1c (Bay Trail)
>>> IGD: 8086:0f31 (unknown)
>>>
>>> In coreboot configuration I selected:
>>> Mainboard -> Mainboard model -> Bayley Bay FSP-based CRB
>>> The default ROM chip size is 2MB.
>>> This is also the size of coreboot.rom created after "make"
>>>
>>> The board has 8MB BIOS flash.
>>> It's delivered with a BIOS programming utility that runs under EFI shell.
>>>
>>> The original BIOS has 2 versions: rom (5MB) and bin (8MB)
>>> I tried to burn the 2MB coreboot.rom with the vendor's BIOS utlity.
>>>
>>> I got:
>>> 3 - Error: ROM file size does not match existing BIOS size.
>>> Should I convert coreboot.rom to coreboot.bin ? How ?
>>> If not, how can I program coreboot.rom ?
>>>
>>> Thank you,
>>> Zvika-- 
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Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Nico Huber]

Hi,

On 9/26/18 9:19 AM, Jose Trujillo via coreboot wrote:
> No, don't change it, you change the size of coreboot only if during the
> building process "make" complain that there is not enough space but in
> your case your build was already successful leave it like that.

this advice seems very weird to me. I'm not experienced with Bay Trail.
But unless there is a bug in the Bay Trail code, you should always set
the correct ROM_SIZE (to the full flash chip size). Otherwise you may
introduce bugs in code that relies on this setting (e.g. saving the
MRC cache might fail and so would S3 resume).

CBFS_SIZE however is the setting to adjust according to your needs. It
should be at most the size of the BIOS region.

> 
> In the rare circumstance that more space is required you can increase
> coreboot size to 4MB and istill will fit into your system 5MB of space
> available.
> 
> "ifdtool" will inject coreboot in the top of the BYT_orig.bin and save
> as BYT_orig.bin.new that you can flash to your system.

I assume this doesn't work oob if you set ROM_SIZE correctly. But it is
unnecessary to craft a single file by hand. You can either only flash
the BIOS region (recommended) or add the other regions in coreboot's
config (HAVE_{IFD,ME,GBE}_BIN).

Nico

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Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Nico Huber]

Hi Zvika,

On 9/25/18 10:59 PM, Zvi Vered wrote:
> Thank you very much for the detail information.
> The output of ifdtool in layout.txt is:
> :0fff fd
> 0030:007f bios
> 1000:002f me
> 
> So the original bios size is 0x50 = 5MB
> 
> You wrote:
>  if the size of the original BIOS is bigger or equal than coreboot build
> you are good to go ahead.
> 
> The original "ROM chip size" in menuconfig is 2MB. Should I change it to
> 8MB ?

yes, and CBFS_SIZE should be set to something <= 0x50.

> 
> I'm aware my board is not identical to the "Bayley Bay FSP-based CRB"
> Should I use another board as reference ?

You should use whatever reference is closest to your board. Major dif-
ferences to look out for are: GPIO/pin config, embedded controller (it's
unlikely that coreboot already has code for yours), how the RAM is con-
nected (e.g. DIMMs or soldered down?). Well, and everything else in the
mainboard's directory.

If your board is not obviously similar to a supported board, you have a
lot of work ahead of you.

Nico

> 
> Best regards,
> Zvika
> 
> 
> On Tue, Sep 25, 2018 at 10:16 AM Jose Trujillo 
> wrote:
> 
>> Hello Zvika:
>>
>> First get the correct original full 8MB FW from the manufacturer or dump
>> it from the board with the command in EFI:
>> "ftp -d BYT_orig.bin" and double save it.
>>
>> 2.- in coreboot/util/ifdtool do make and sudo make install.
>> 3.- in terminal go to the FW directory and do:"ifdtool BYT_orig.bin -f
>> fw_layout.txt"
>>   a).- in "fw_layout.txt" you will get the BIOS area size from the
>> original FW (just substract).
>>   b).- if the size of the original BIOS is bigger or equal than
>> coreboot build you are good to go ahead.
>> 4.- copy/move "BYT_orig.bin" in the directory which resides the coreboot
>> folder (not inside the coreboot folder) and do:
>>  ifdtool -i BIOS:./coreboot/build/coreboot.rom CB_baytrail.bin
>> 5.- flash it:   "fpt -f CB_baytrail.bin" booting from UEFI.
>>
>> If the build was correctly done and followed accurately those steps the
>> system should boot.
>>
>> Good luck,
>> Jose Trujillo.
>>
>> ‐‐‐ Original Message ‐‐‐
>> On Monday, September 24, 2018 10:18 PM, Zvi Vered 
>> wrote:
>>
>> Hello,
>>
>> I have an Intel's ATOM Bay Trail board. The output of "inteltool" is:
>>
>> CPU: ID 0x30679, Processor Type 0x0, Family 0x6, Model 0x37, Stepping 0x9
>> Northbridge: 8086:0f00 (Bay Trail)
>> Southbridge: 8086:0f1c (Bay Trail)
>> IGD: 8086:0f31 (unknown)
>>
>> In coreboot configuration I selected:
>> Mainboard -> Mainboard model -> Bayley Bay FSP-based CRB
>> The default ROM chip size is 2MB.
>> This is also the size of coreboot.rom created after "make"
>>
>> The board has 8MB BIOS flash.
>> It's delivered with a BIOS programming utility that runs under EFI shell.
>>
>> The original BIOS has 2 versions: rom (5MB) and bin (8MB)
>> I tried to burn the 2MB coreboot.rom with the vendor's BIOS utlity.
>>
>> I got:
>> 3 - Error: ROM file size does not match existing BIOS size.
>> Should I convert coreboot.rom to coreboot.bin ? How ?
>> If not, how can I program coreboot.rom ?
>>
>> Thank you,
>> Zvika
>>
>>
>>
> 
> 


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Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Jose Trujillo via coreboot]

You are right Nico,

I just forgot the troubles this caused me.
I am sorry Vika... My mistake.

I can confirm with Nico:
ROM chip size = 8MB (your case)
CBFS_SIZE = 2 to 5MB (your specific case)

My recommended approach is using the original Intel FW with already included 
the FD, TXE.

I never tested adding regions to coreboot but you can try.

To have better chances of success you should be dumping hardware settings 
booting with your original "BIOS" (look for the attached file).

Check if the system is "Memory down"or/and ECC because it will be needed to 
edit FSP (if using it).
Dump memory settings with the following commands:

sudo dnf install i2c-tools-perl
sudo modprobe eeprom
decode-dimms

If you have not done this already there is still a long way to go.
Don't get intimidated, just do it, if you have questions just ask I will 
try to help

Good luck,
Jose.


‐‐‐ Original Message ‐‐‐
On Wednesday, September 26, 2018 6:28 PM, Nico Huber  wrote:

> Hi,
>
> On 9/26/18 9:19 AM, Jose Trujillo via coreboot wrote:
>
> > No, don't change it, you change the size of coreboot only if during the
> > building process "make" complain that there is not enough space but in
> > your case your build was already successful leave it like that.
>
> this advice seems very weird to me. I'm not experienced with Bay Trail.
> But unless there is a bug in the Bay Trail code, you should always set
> the correct ROM_SIZE (to the full flash chip size). Otherwise you may
> introduce bugs in code that relies on this setting (e.g. saving the
> MRC cache might fail and so would S3 resume).
>
> CBFS_SIZE however is the setting to adjust according to your needs. It
> should be at most the size of the BIOS region.
>
> > In the rare circumstance that more space is required you can increase
> > coreboot size to 4MB and istill will fit into your system 5MB of space
> > available.
> > "ifdtool" will inject coreboot in the top of the BYT_orig.bin and save
> > as BYT_orig.bin.new that you can flash to your system.
>
> I assume this doesn't work oob if you set ROM_SIZE correctly. But it is
> unnecessary to craft a single file by hand. You can either only flash
> the BIOS region (recommended) or add the other regions in coreboot's
> config (HAVE_{IFD,ME,GBE}_BIN).
>
> Nico




Motherboard Porting Guide
Description: Binary data
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Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Zvi Vered]

Hi Jose,

You wrote:
"My recommended approach is using the original Intel FW with already
included the FD, TXE".

What is "original intel FW" ?
What is FD, TXE ?

After creating coreboot.rom should I always use the original BIOS with
ifdtool to convert rom to bin ?

Thank you,
Zvika

On Wed, Sep 26, 2018 at 7:27 PM Jose Trujillo 
wrote:

> You are right Nico,
>
> I just forgot the troubles this caused me.
> I am sorry Vika... My mistake.
>
> I can confirm with Nico:
> ROM chip size = 8MB (your case)
> CBFS_SIZE = 2 to 5MB (your specific case)
>
> My recommended approach is using the original Intel FW with already
> included the FD, TXE.
>
> I never tested adding regions to coreboot but you can try.
>
> To have better chances of success you should be dumping hardware settings
> booting with your original "BIOS" (look for the attached file).
>
> Check if the system is "Memory down"or/and ECC because it will be needed
> to edit FSP (if using it).
> Dump memory settings with the following commands:
>
> sudo dnf install i2c-tools-perl
> sudo modprobe eeprom
> decode-dimms
>
> If you have not done this already there is still a long way to go.
> Don't get intimidated, just do it, if you have questions just ask I
> will try to help
>
> Good luck,
> Jose.
>
>
> ‐‐‐ Original Message ‐‐‐
> On Wednesday, September 26, 2018 6:28 PM, Nico Huber 
> wrote:
>
> > Hi,
> >
> > On 9/26/18 9:19 AM, Jose Trujillo via coreboot wrote:
> >
> > > No, don't change it, you change the size of coreboot only if during the
> > > building process "make" complain that there is not enough space but in
> > > your case your build was already successful leave it like that.
> >
> > this advice seems very weird to me. I'm not experienced with Bay Trail.
> > But unless there is a bug in the Bay Trail code, you should always set
> > the correct ROM_SIZE (to the full flash chip size). Otherwise you may
> > introduce bugs in code that relies on this setting (e.g. saving the
> > MRC cache might fail and so would S3 resume).
> >
> > CBFS_SIZE however is the setting to adjust according to your needs. It
> > should be at most the size of the BIOS region.
> >
> > > In the rare circumstance that more space is required you can increase
> > > coreboot size to 4MB and istill will fit into your system 5MB of space
> > > available.
> > > "ifdtool" will inject coreboot in the top of the BYT_orig.bin and save
> > > as BYT_orig.bin.new that you can flash to your system.
> >
> > I assume this doesn't work oob if you set ROM_SIZE correctly. But it is
> > unnecessary to craft a single file by hand. You can either only flash
> > the BIOS region (recommended) or add the other regions in coreboot's
> > config (HAVE_{IFD,ME,GBE}_BIN).
> >
> > Nico
>
>
>
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Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Jose Trujillo via coreboot]

Zvika:

There are 2 ways to build coreboot: (choose one)
1.- Including IFD, TXE, GBE etc inside coreboot CBFS.
2.- Using the original firmware(FW) with IFD, TXE, GBE already in flash and 
just rewrite coreboot on top of the BIOS block.

Your original computer Firmware = Intel FW + "BIOS"

Intel FW = IFD +PD+ME/TXE+GBE
BIOS=AMI-Phoenix etc...

IFD=Intel Firmware Descriptor Table.
PD=Parameters
ME=Management Engine (For "Core" kind of processors).
TXE=Trusted Execution Engine (For "Atom" kind of processors).
GBE=Network card firmware.

Zvika said:
"After creating coreboot.rom should I always use the original BIOS with ifdtool 
to convert rom to bin ?"
Answer:
No, there are other methods and tools that can do the merge (ifdtool and 
Intel's FIT are working fine for me)

After the creation of the coreboot build you have 2 ways of doing the flashing 
for your case: (with fpt).
1.- Flash the full 8MB (Intel FW+coreboot) if the SPI flash is blank or have 
unknown firmware.
 Use IFDTool in this case to inject coreboot to Intel FW. then flash it 
with fpt .
2.- Flash only the BIOS block (5MB your specific case) in this case ask someone 
else how to do it with fpt

I hope this answered your questions.
Jose..

‐‐‐ Original Message ‐‐‐
On Saturday, September 29, 2018 12:24 AM, Zvi Vered  wrote:

> Hi Jose,
>
> You wrote:
> "My recommended approach is using the original Intel FW with already included 
> the FD, TXE".
>
> What is "original intel FW" ?
> What is FD, TXE ?
>
> After creating coreboot.rom should I always use the original BIOS with 
> ifdtool to convert rom to bin ?
>
> Thank you,
> Zvika
>
> On Wed, Sep 26, 2018 at 7:27 PM Jose Trujillo  wrote:
>
>> You are right Nico,
>>
>> I just forgot the troubles this caused me.
>> I am sorry Vika... My mistake.
>>
>> I can confirm with Nico:
>> ROM chip size = 8MB (your case)
>> CBFS_SIZE = 2 to 5MB (your specific case)
>>
>> My recommended approach is using the original Intel FW with already included 
>> the FD, TXE.
>>
>> I never tested adding regions to coreboot but you can try.
>>
>> To have better chances of success you should be dumping hardware settings 
>> booting with your original "BIOS" (look for the attached file).
>>
>> Check if the system is "Memory down"or/and ECC because it will be needed to 
>> edit FSP (if using it).
>> Dump memory settings with the following commands:
>>
>> sudo dnf install i2c-tools-perl
>> sudo modprobe eeprom
>> decode-dimms
>>
>> If you have not done this already there is still a long way to go.
>> Don't get intimidated, just do it, if you have questions just ask I will 
>> try to help
>>
>> Good luck,
>> Jose.
>>
>> ‐‐‐ Original Message ‐‐‐
>> On Wednesday, September 26, 2018 6:28 PM, Nico Huber  wrote:
>>
>>> Hi,
>>>
>>> On 9/26/18 9:19 AM, Jose Trujillo via coreboot wrote:
>>>
>>> > No, don't change it, you change the size of coreboot only if during the
>>> > building process "make" complain that there is not enough space but in
>>> > your case your build was already successful leave it like that.
>>>
>>> this advice seems very weird to me. I'm not experienced with Bay Trail.
>>> But unless there is a bug in the Bay Trail code, you should always set
>>> the correct ROM_SIZE (to the full flash chip size). Otherwise you may
>>> introduce bugs in code that relies on this setting (e.g. saving the
>>> MRC cache might fail and so would S3 resume).
>>>
>>> CBFS_SIZE however is the setting to adjust according to your needs. It
>>> should be at most the size of the BIOS region.
>>>
>>> > In the rare circumstance that more space is required you can increase
>>> > coreboot size to 4MB and istill will fit into your system 5MB of space
>>> > available.
>>> > "ifdtool" will inject coreboot in the top of the BYT_orig.bin and save
>>> > as BYT_orig.bin.new that you can flash to your system.
>>>
>>> I assume this doesn't work oob if you set ROM_SIZE correctly. But it is
>>> unnecessary to craft a single file by hand. You can either only flash
>>> the BIOS region (recommended) or add the other regions in coreboot's
>>> config (HAVE_{IFD,ME,GBE}_BIN).
>>>
>>> Nico-- 
coreboot mailing list: coreboot@coreboot.org
https://mail.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Zvi Vered]

Hi Jose, All,

Highly appreciate your answers.
It seems the vital information in your replies are not documented.

The original vendor's rom file size is 5MB.
Do you think I can create a 5MB coreboot.rom ?

It seems that AfuEfix64.efi supplied by vendor is looking for 5MB rom file
like the original one. For any other file size, AfuEfix64 fails.

Thank you,
Zvika

On Mon, Oct 1, 2018 at 2:08 PM Jose Trujillo 
wrote:

> Zvika:
>
> There are 2 ways to build coreboot: (choose one)
> 1.- Including IFD, TXE, GBE etc inside coreboot CBFS.
> 2.- Using the original firmware(FW) with IFD, TXE, GBE already in flash
> and just rewrite coreboot on top of the BIOS block.
>
> Your original computer Firmware = Intel FW + "BIOS"
>
> Intel FW = IFD +PD+ME/TXE+GBE
> BIOS=AMI-Phoenix etc...
>
> IFD=Intel Firmware Descriptor Table.
> PD=Parameters
> ME=Management Engine (For "Core" kind of processors).
> TXE=Trusted Execution Engine (For "Atom" kind of processors).
> GBE=Network card firmware.
>
> Zvika said:
> "After creating coreboot.rom should I always use the original BIOS with
> ifdtool to convert rom to bin ?"
> Answer:
> No, there are other methods and tools that can do the merge (ifdtool
> and Intel's FIT are working fine for me)
>
> After the creation of the coreboot build you have 2 ways of doing the
> flashing for your case: (with fpt).
> 1.- Flash the full 8MB (Intel FW+coreboot) if the SPI flash is blank or
> have unknown firmware.
>  Use IFDTool in this case to inject coreboot to Intel FW. then
> flash it with fpt .
> 2.- Flash only the BIOS block (5MB your specific case) in this case ask
> someone else how to do it with fpt
>
> I hope this answered your questions.
> Jose..
>
> ‐‐‐ Original Message ‐‐‐
> On Saturday, September 29, 2018 12:24 AM, Zvi Vered 
> wrote:
>
> Hi Jose,
>
> You wrote:
> "My recommended approach is using the original Intel FW with already
> included the FD, TXE".
>
> What is "original intel FW" ?
> What is FD, TXE ?
>
> After creating coreboot.rom should I always use the original BIOS with
> ifdtool to convert rom to bin ?
>
> Thank you,
> Zvika
>
> On Wed, Sep 26, 2018 at 7:27 PM Jose Trujillo 
> wrote:
>
>> You are right Nico,
>>
>> I just forgot the troubles this caused me.
>> I am sorry Vika... My mistake.
>>
>> I can confirm with Nico:
>> ROM chip size = 8MB (your case)
>> CBFS_SIZE = 2 to 5MB (your specific case)
>>
>> My recommended approach is using the original Intel FW with already
>> included the FD, TXE.
>>
>> I never tested adding regions to coreboot but you can try.
>>
>> To have better chances of success you should be dumping hardware settings
>> booting with your original "BIOS" (look for the attached file).
>>
>> Check if the system is "Memory down"or/and ECC because it will be needed
>> to edit FSP (if using it).
>> Dump memory settings with the following commands:
>>
>> sudo dnf install i2c-tools-perl
>> sudo modprobe eeprom
>> decode-dimms
>>
>> If you have not done this already there is still a long way to go.
>> Don't get intimidated, just do it, if you have questions just ask I
>> will try to help
>>
>> Good luck,
>> Jose.
>>
>>
>> ‐‐‐ Original Message ‐‐‐
>> On Wednesday, September 26, 2018 6:28 PM, Nico Huber 
>> wrote:
>>
>> > Hi,
>> >
>> > On 9/26/18 9:19 AM, Jose Trujillo via coreboot wrote:
>> >
>> > > No, don't change it, you change the size of coreboot only if during
>> the
>> > > building process "make" complain that there is not enough space but in
>> > > your case your build was already successful leave it like that.
>> >
>> > this advice seems very weird to me. I'm not experienced with Bay Trail.
>> > But unless there is a bug in the Bay Trail code, you should always set
>> > the correct ROM_SIZE (to the full flash chip size). Otherwise you may
>> > introduce bugs in code that relies on this setting (e.g. saving the
>> > MRC cache might fail and so would S3 resume).
>> >
>> > CBFS_SIZE however is the setting to adjust according to your needs. It
>> > should be at most the size of the BIOS region.
>> >
>> > > In the rare circumstance that more space is required you can increase
>> > > coreboot size to 4MB and istill will fit into your system 5MB of space
>> > > available.
>> > > "ifdtool" will inject coreboot in the top of the BYT_orig.bin and save
>> > > as BYT_orig.bin.new that you can flash to your system.
>> >
>> > I assume this doesn't work oob if you set ROM_SIZE correctly. But it is
>> > unnecessary to craft a single file by hand. You can either only flash
>> > the BIOS region (recommended) or add the other regions in coreboot's
>> > config (HAVE_{IFD,ME,GBE}_BIN).
>> >
>> > Nico
>>
>>
>>
>
-- 
coreboot mailing list: coreboot@coreboot.org
https://mail.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Jose Trujillo via coreboot]

You can do that but I have never done this way and I cannot help you with that.

Someone else can advise on this?

‐‐‐ Original Message ‐‐‐
On Tuesday, October 2, 2018 9:39 PM, Zvi Vered  wrote:

> Hi Jose, All,
>
> Highly appreciate your answers.
> It seems the vital information in your replies are not documented.
>
> The original vendor's rom file size is 5MB.
> Do you think I can create a 5MB coreboot.rom ?
>
> It seems that AfuEfix64.efi supplied by vendor is looking for 5MB rom file 
> like the original one. For any other file size, AfuEfix64 fails.
>
> Thank you,
> Zvika
>
> On Mon, Oct 1, 2018 at 2:08 PM Jose Trujillo  wrote:
>
>> Zvika:
>>
>> There are 2 ways to build coreboot: (choose one)
>> 1.- Including IFD, TXE, GBE etc inside coreboot CBFS.
>> 2.- Using the original firmware(FW) with IFD, TXE, GBE already in flash and 
>> just rewrite coreboot on top of the BIOS block.
>>
>> Your original computer Firmware = Intel FW + "BIOS"
>>
>> Intel FW = IFD +PD+ME/TXE+GBE
>> BIOS=AMI-Phoenix etc...
>>
>> IFD=Intel Firmware Descriptor Table.
>> PD=Parameters
>> ME=Management Engine (For "Core" kind of processors).
>> TXE=Trusted Execution Engine (For "Atom" kind of processors).
>> GBE=Network card firmware.
>>
>> Zvika said:
>> "After creating coreboot.rom should I always use the original BIOS with 
>> ifdtool to convert rom to bin ?"
>> Answer:
>> No, there are other methods and tools that can do the merge (ifdtool and 
>> Intel's FIT are working fine for me)
>>
>> After the creation of the coreboot build you have 2 ways of doing the 
>> flashing for your case: (with fpt).
>> 1.- Flash the full 8MB (Intel FW+coreboot) if the SPI flash is blank or have 
>> unknown firmware.
>>  Use IFDTool in this case to inject coreboot to Intel FW. then flash 
>> it with fpt .
>> 2.- Flash only the BIOS block (5MB your specific case) in this case ask 
>> someone else how to do it with fpt
>>
>> I hope this answered your questions.
>> Jose..
>>
>> ‐‐‐ Original Message ‐‐‐
>> On Saturday, September 29, 2018 12:24 AM, Zvi Vered  
>> wrote:
>>
>>> Hi Jose,
>>>
>>> You wrote:
>>> "My recommended approach is using the original Intel FW with already 
>>> included the FD, TXE".
>>>
>>> What is "original intel FW" ?
>>> What is FD, TXE ?
>>>
>>> After creating coreboot.rom should I always use the original BIOS with 
>>> ifdtool to convert rom to bin ?
>>>
>>> Thank you,
>>> Zvika
>>>
>>> On Wed, Sep 26, 2018 at 7:27 PM Jose Trujillo  
>>> wrote:
>>>
 You are right Nico,

 I just forgot the troubles this caused me.
 I am sorry Vika... My mistake.

 I can confirm with Nico:
 ROM chip size = 8MB (your case)
 CBFS_SIZE = 2 to 5MB (your specific case)

 My recommended approach is using the original Intel FW with already 
 included the FD, TXE.

 I never tested adding regions to coreboot but you can try.

 To have better chances of success you should be dumping hardware settings 
 booting with your original "BIOS" (look for the attached file).

 Check if the system is "Memory down"or/and ECC because it will be needed 
 to edit FSP (if using it).
 Dump memory settings with the following commands:

 sudo dnf install i2c-tools-perl
 sudo modprobe eeprom
 decode-dimms

 If you have not done this already there is still a long way to go.
 Don't get intimidated, just do it, if you have questions just ask I 
 will try to help

 Good luck,
 Jose.

 ‐‐‐ Original Message ‐‐‐
 On Wednesday, September 26, 2018 6:28 PM, Nico Huber  wrote:

> Hi,
>
> On 9/26/18 9:19 AM, Jose Trujillo via coreboot wrote:
>
> > No, don't change it, you change the size of coreboot only if during the
> > building process "make" complain that there is not enough space but in
> > your case your build was already successful leave it like that.
>
> this advice seems very weird to me. I'm not experienced with Bay Trail.
> But unless there is a bug in the Bay Trail code, you should always set
> the correct ROM_SIZE (to the full flash chip size). Otherwise you may
> introduce bugs in code that relies on this setting (e.g. saving the
> MRC cache might fail and so would S3 resume).
>
> CBFS_SIZE however is the setting to adjust according to your needs. It
> should be at most the size of the BIOS region.
>
> > In the rare circumstance that more space is required you can increase
> > coreboot size to 4MB and istill will fit into your system 5MB of space
> > available.
> > "ifdtool" will inject coreboot in the top of the BYT_orig.bin and save
> > as BYT_orig.bin.new that you can flash to your system.
>
> I assume this doesn't work oob if you set ROM_SIZE correctly. But it is
> unnecessary to craft a single file by hand. You can either only flash
> the BIOS region (recommended) or add the ot

Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Mariusz Szafrański via coreboot]

Hi Jose,

In your case set:
ROM chip size = 8MB (your case)
CBFS_SIZE <= 5MB (your specific case)

This will build 8M file. After that just cut last 5M of this 8M file 
(using any hexeditor) or use something like below from command line:


dd if=coreboot.rom of=corebootout.rom bs=1M skip=3

(before doing that double check if original vendor`s rom file size is 
5242880 bytes long)


Mariusz


W dniu 03.10.2018 o 08:53, Jose Trujillo via coreboot pisze:
You can do that but I have never done this way and I cannot help you 
with that.


Someone else can advise on this?

‐‐‐ Original Message ‐‐‐
On Tuesday, October 2, 2018 9:39 PM, Zvi Vered  wrote:


Hi Jose, All,

Highly appreciate your answers.
It seems the vital information in your replies are not documented.

The original vendor's rom file size is 5MB.
Do you think I can create a 5MB coreboot.rom ?

It seems that AfuEfix64.efi supplied by vendor is looking for 5MB rom 
file like the original one. For any other file size, AfuEfix64 fails.


Thank you,
Zvika

On Mon, Oct 1, 2018 at 2:08 PM Jose Trujillo > wrote:


Zvika:

There are 2 ways to build coreboot: (choose one)
1.- Including IFD, TXE, GBE etc inside coreboot CBFS.
2.- Using the original firmware(FW) with IFD, TXE, GBE already in
flash and just rewrite coreboot on top of the BIOS block.

Your original computer Firmware = Intel FW + "BIOS"

Intel FW = IFD +PD+ME/TXE+GBE
BIOS=AMI-Phoenix etc...

IFD=Intel Firmware Descriptor Table.
PD=Parameters
ME=Management Engine (For "Core" kind of processors).
TXE=Trusted Execution Engine (For "Atom" kind of processors).
GBE=Network card firmware.

Zvika said:
"After creating coreboot.rom should I always use the original
BIOS with ifdtool to convert rom to bin ?"
Answer:
No, there are other methods and tools that can do the merge
(ifdtool and Intel's FIT are working fine for me)

After the creation of the coreboot build you have 2 ways of doing
the flashing for your case: (with fpt).
1.- Flash the full 8MB (Intel FW+coreboot) if the SPI flash is
blank or have unknown firmware.
 Use IFDTool in this case to inject coreboot to Intel FW.
then flash it with fpt .
2.- Flash only the BIOS block (5MB your specific case) in this
case ask someone else how to do it with fpt

I hope this answered your questions.
Jose..

‐‐‐ Original Message ‐‐‐
On Saturday, September 29, 2018 12:24 AM, Zvi Vered
mailto:vered...@gmail.com>> wrote:


Hi Jose,

You wrote:
"My recommended approach is using the original Intel FW with
already included the FD, TXE".

What is "original intel FW" ?
What is FD, TXE ?

After creating coreboot.rom should I always use the original
BIOS with ifdtool to convert rom to bin ?

Thank you,
Zvika

On Wed, Sep 26, 2018 at 7:27 PM Jose Trujillo
mailto:ce.au...@protonmail.com>> wrote:

You are right Nico,

I just forgot the troubles this caused me.
I am sorry Vika... My mistake.

I can confirm with Nico:
ROM chip size = 8MB (your case)
CBFS_SIZE = 2 to 5MB (your specific case)

My recommended approach is using the original Intel FW with
already included the FD, TXE.

I never tested adding regions to coreboot but you can try.

To have better chances of success you should be dumping
hardware settings booting with your original "BIOS" (look
for the attached file).

Check if the system is "Memory down"or/and ECC because it
will be needed to edit FSP (if using it).
Dump memory settings with the following commands:

sudo dnf install i2c-tools-perl
sudo modprobe eeprom
decode-dimms

If you have not done this already there is still a long way
to go.
Don't get intimidated, just do it, if you have questions
just ask I will try to help

Good luck,
Jose.


‐‐‐ Original Message ‐‐‐
On Wednesday, September 26, 2018 6:28 PM, Nico Huber
mailto:nic...@gmx.de>> wrote:

> Hi,
>
> On 9/26/18 9:19 AM, Jose Trujillo via coreboot wrote:
>
> > No, don't change it, you change the size of coreboot
only if during the
> > building process "make" complain that there is not
enough space but in
> > your case your build was already successful leave it
like that.
>
> this advice seems very weird to me. I'm not experienced
with Bay Trail.
> But unless there is a bug in the Bay Trail code, you
should always set
> the correct ROM_SIZE (to the full flash chip size).
Otherwise you may
> introduce bugs in code that relies on this setting (e.g.
saving the
> MRC cache might fail a

Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Jose Trujillo via coreboot]

Thank you Mariusz.

‐‐‐ Original Message ‐‐‐
On Wednesday, October 3, 2018 12:46 PM, Mariusz Szafrański via coreboot 
 wrote:

> Hi Jose,
>
> In your case set:
> ROM chip size = 8MB (your case)
> CBFS_SIZE <= 5MB (your specific case)
>
> This will build 8M file. After that just cut last 5M of this 8M file (using 
> any hexeditor) or use something like below from command line:
>
> dd if=coreboot.rom of=corebootout.rom bs=1M skip=3
>
> (before doing that double check if original vendor`s rom file size is 5242880 
> bytes long)
>
> Mariusz
>
> W dniu 03.10.2018 o 08:53, Jose Trujillo via coreboot pisze:
>
>> You can do that but I have never done this way and I cannot help you with 
>> that.
>>
>> Someone else can advise on this?
>>
>> ‐‐‐ Original Message ‐‐‐
>> On Tuesday, October 2, 2018 9:39 PM, Zvi Vered 
>> [](mailto:vered...@gmail.com) wrote:
>>
>>> Hi Jose, All,
>>>
>>> Highly appreciate your answers.
>>> It seems the vital information in your replies are not documented.
>>>
>>> The original vendor's rom file size is 5MB.
>>> Do you think I can create a 5MB coreboot.rom ?
>>>
>>> It seems that AfuEfix64.efi supplied by vendor is looking for 5MB rom file 
>>> like the original one. For any other file size, AfuEfix64 fails.
>>>
>>> Thank you,
>>> Zvika
>>>
>>> On Mon, Oct 1, 2018 at 2:08 PM Jose Trujillo  
>>> wrote:
>>>
 Zvika:

 There are 2 ways to build coreboot: (choose one)
 1.- Including IFD, TXE, GBE etc inside coreboot CBFS.
 2.- Using the original firmware(FW) with IFD, TXE, GBE already in flash 
 and just rewrite coreboot on top of the BIOS block.

 Your original computer Firmware = Intel FW + "BIOS"

 Intel FW = IFD +PD+ME/TXE+GBE
 BIOS=AMI-Phoenix etc...

 IFD=Intel Firmware Descriptor Table.
 PD=Parameters
 ME=Management Engine (For "Core" kind of processors).
 TXE=Trusted Execution Engine (For "Atom" kind of processors).
 GBE=Network card firmware.

 Zvika said:
 "After creating coreboot.rom should I always use the original BIOS with 
 ifdtool to convert rom to bin ?"
 Answer:
 No, there are other methods and tools that can do the merge (ifdtool 
 and Intel's FIT are working fine for me)

 After the creation of the coreboot build you have 2 ways of doing the 
 flashing for your case: (with fpt).
 1.- Flash the full 8MB (Intel FW+coreboot) if the SPI flash is blank or 
 have unknown firmware.
  Use IFDTool in this case to inject coreboot to Intel FW. then 
 flash it with fpt .
 2.- Flash only the BIOS block (5MB your specific case) in this case ask 
 someone else how to do it with fpt

 I hope this answered your questions.
 Jose..

 ‐‐‐ Original Message ‐‐‐
 On Saturday, September 29, 2018 12:24 AM, Zvi Vered  
 wrote:

> Hi Jose,
>
> You wrote:
> "My recommended approach is using the original Intel FW with already 
> included the FD, TXE".
>
> What is "original intel FW" ?
> What is FD, TXE ?
>
> After creating coreboot.rom should I always use the original BIOS with 
> ifdtool to convert rom to bin ?
>
> Thank you,
> Zvika
>
> On Wed, Sep 26, 2018 at 7:27 PM Jose Trujillo  
> wrote:
>
>> You are right Nico,
>>
>> I just forgot the troubles this caused me.
>> I am sorry Vika... My mistake.
>>
>> I can confirm with Nico:
>> ROM chip size = 8MB (your case)
>> CBFS_SIZE = 2 to 5MB (your specific case)
>>
>> My recommended approach is using the original Intel FW with already 
>> included the FD, TXE.
>>
>> I never tested adding regions to coreboot but you can try.
>>
>> To have better chances of success you should be dumping hardware 
>> settings booting with your original "BIOS" (look for the attached file).
>>
>> Check if the system is "Memory down"or/and ECC because it will be needed 
>> to edit FSP (if using it).
>> Dump memory settings with the following commands:
>>
>> sudo dnf install i2c-tools-perl
>> sudo modprobe eeprom
>> decode-dimms
>>
>> If you have not done this already there is still a long way to go.
>> Don't get intimidated, just do it, if you have questions just ask I 
>> will try to help
>>
>> Good luck,
>> Jose.
>>
>> ‐‐‐ Original Message ‐‐‐
>> On Wednesday, September 26, 2018 6:28 PM, Nico Huber  
>> wrote:
>>
>>> Hi,
>>>
>>> On 9/26/18 9:19 AM, Jose Trujillo via coreboot wrote:
>>>
>>> > No, don't change it, you change the size of coreboot only if during 
>>> > the
>>> > building process "make" complain that there is not enough space but in
>>> > your case your build was already successful leave it like that.
>>>
>>> this advice seems very weird to me. I'm not experienced with Bay Trail.
>>> But u

Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Zvi Vered]

Hi Mariusz, Jose, All,

Mariusz - Thank you very much for the solution.
Jose - You wrote "I have never done this way...".
Can you please suggest a better alternative ?

Thank you,
Zvika


On Wed, Oct 3, 2018 at 8:39 PM Mariusz Szafrański via coreboot <
coreboot@coreboot.org> wrote:

> Hi Jose,
>
> In your case set:
> ROM chip size = 8MB (your case)
> CBFS_SIZE <= 5MB (your specific case)
>
> This will build 8M file. After that just cut last 5M of this 8M file
> (using any hexeditor) or use something like below from command line:
>
> dd if=coreboot.rom of=corebootout.rom bs=1M skip=3
>
> (before doing that double check if original vendor`s rom file size is
> 5242880 bytes long)
>
> Mariusz
>
>
> W dniu 03.10.2018 o 08:53, Jose Trujillo via coreboot pisze:
>
> You can do that but I have never done this way and I cannot help you with
> that.
>
> Someone else can advise on this?
>
> ‐‐‐ Original Message ‐‐‐
> On Tuesday, October 2, 2018 9:39 PM, Zvi Vered 
>  wrote:
>
> Hi Jose, All,
>
> Highly appreciate your answers.
> It seems the vital information in your replies are not documented.
>
> The original vendor's rom file size is 5MB.
> Do you think I can create a 5MB coreboot.rom ?
>
> It seems that AfuEfix64.efi supplied by vendor is looking for 5MB rom file
> like the original one. For any other file size, AfuEfix64 fails.
>
> Thank you,
> Zvika
>
> On Mon, Oct 1, 2018 at 2:08 PM Jose Trujillo 
> wrote:
>
>> Zvika:
>>
>> There are 2 ways to build coreboot: (choose one)
>> 1.- Including IFD, TXE, GBE etc inside coreboot CBFS.
>> 2.- Using the original firmware(FW) with IFD, TXE, GBE already in flash
>> and just rewrite coreboot on top of the BIOS block.
>>
>> Your original computer Firmware = Intel FW + "BIOS"
>>
>> Intel FW = IFD +PD+ME/TXE+GBE
>> BIOS=AMI-Phoenix etc...
>>
>> IFD=Intel Firmware Descriptor Table.
>> PD=Parameters
>> ME=Management Engine (For "Core" kind of processors).
>> TXE=Trusted Execution Engine (For "Atom" kind of processors).
>> GBE=Network card firmware.
>>
>> Zvika said:
>> "After creating coreboot.rom should I always use the original BIOS with
>> ifdtool to convert rom to bin ?"
>> Answer:
>> No, there are other methods and tools that can do the merge (ifdtool
>> and Intel's FIT are working fine for me)
>>
>> After the creation of the coreboot build you have 2 ways of doing the
>> flashing for your case: (with fpt).
>> 1.- Flash the full 8MB (Intel FW+coreboot) if the SPI flash is blank or
>> have unknown firmware.
>>  Use IFDTool in this case to inject coreboot to Intel FW. then
>> flash it with fpt .
>> 2.- Flash only the BIOS block (5MB your specific case) in this case ask
>> someone else how to do it with fpt
>>
>> I hope this answered your questions.
>> Jose..
>>
>> ‐‐‐ Original Message ‐‐‐
>> On Saturday, September 29, 2018 12:24 AM, Zvi Vered 
>> wrote:
>>
>> Hi Jose,
>>
>> You wrote:
>> "My recommended approach is using the original Intel FW with already
>> included the FD, TXE".
>>
>> What is "original intel FW" ?
>> What is FD, TXE ?
>>
>> After creating coreboot.rom should I always use the original BIOS with
>> ifdtool to convert rom to bin ?
>>
>> Thank you,
>> Zvika
>>
>> On Wed, Sep 26, 2018 at 7:27 PM Jose Trujillo 
>> wrote:
>>
>>> You are right Nico,
>>>
>>> I just forgot the troubles this caused me.
>>> I am sorry Vika... My mistake.
>>>
>>> I can confirm with Nico:
>>> ROM chip size = 8MB (your case)
>>> CBFS_SIZE = 2 to 5MB (your specific case)
>>>
>>> My recommended approach is using the original Intel FW with already
>>> included the FD, TXE.
>>>
>>> I never tested adding regions to coreboot but you can try.
>>>
>>> To have better chances of success you should be dumping hardware
>>> settings booting with your original "BIOS" (look for the attached file).
>>>
>>> Check if the system is "Memory down"or/and ECC because it will be needed
>>> to edit FSP (if using it).
>>> Dump memory settings with the following commands:
>>>
>>> sudo dnf install i2c-tools-perl
>>> sudo modprobe eeprom
>>> decode-dimms
>>>
>>> If you have not done this already there is still a long way to go.
>>> Don't get intimidated, just do it, if you have questions just ask I
>>> will try to help
>>>
>>> Good luck,
>>> Jose.
>>>
>>>
>>> ‐‐‐ Original Message ‐‐‐
>>> On Wednesday, September 26, 2018 6:28 PM, Nico Huber 
>>> wrote:
>>>
>>> > Hi,
>>> >
>>> > On 9/26/18 9:19 AM, Jose Trujillo via coreboot wrote:
>>> >
>>> > > No, don't change it, you change the size of coreboot only if during
>>> the
>>> > > building process "make" complain that there is not enough space but
>>> in
>>> > > your case your build was already successful leave it like that.
>>> >
>>> > this advice seems very weird to me. I'm not experienced with Bay Trail.
>>> > But unless there is a bug in the Bay Trail code, you should always set
>>> > the correct ROM_SIZE (to the full flash chip size). Otherwise you may
>>> > introduce bugs in code that relies on this setting (e.g. 

Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Jose Trujillo via coreboot]

Zvika:
Doing a full flash doesn't work for you, this is what I been doing.
Try to use flashrom from linux if you want to do the full flash (may be it will 
work).

An external programmer would be the optimal choice.

Did you tried what Mariusz said?
Jose.

‐‐‐ Original Message ‐‐‐
On Thursday, October 4, 2018 6:20 PM, Zvi Vered  wrote:

> Hi Mariusz, Jose, All,
>
> Mariusz - Thank you very much for the solution.
> Jose - You wrote "I have never done this way...".
> Can you please suggest a better alternative ?
>
> Thank you,
> Zvika
>
> On Wed, Oct 3, 2018 at 8:39 PM Mariusz Szafrański via coreboot 
>  wrote:
>
>> Hi Jose,
>>
>> In your case set:
>> ROM chip size = 8MB (your case)
>> CBFS_SIZE <= 5MB (your specific case)
>>
>> This will build 8M file. After that just cut last 5M of this 8M file (using 
>> any hexeditor) or use something like below from command line:
>>
>> dd if=coreboot.rom of=corebootout.rom bs=1M skip=3
>>
>> (before doing that double check if original vendor`s rom file size is 
>> 5242880 bytes long)
>>
>> Mariusz
>>
>> W dniu 03.10.2018 o 08:53, Jose Trujillo via coreboot pisze:
>>
>>> You can do that but I have never done this way and I cannot help you with 
>>> that.
>>>
>>> Someone else can advise on this?
>>>
>>> ‐‐‐ Original Message ‐‐‐
>>> On Tuesday, October 2, 2018 9:39 PM, Zvi Vered 
>>> [](mailto:vered...@gmail.com) wrote:
>>>
 Hi Jose, All,

 Highly appreciate your answers.
 It seems the vital information in your replies are not documented.

 The original vendor's rom file size is 5MB.
 Do you think I can create a 5MB coreboot.rom ?

 It seems that AfuEfix64.efi supplied by vendor is looking for 5MB rom file 
 like the original one. For any other file size, AfuEfix64 fails.

 Thank you,
 Zvika

 On Mon, Oct 1, 2018 at 2:08 PM Jose Trujillo  
 wrote:

> Zvika:
>
> There are 2 ways to build coreboot: (choose one)
> 1.- Including IFD, TXE, GBE etc inside coreboot CBFS.
> 2.- Using the original firmware(FW) with IFD, TXE, GBE already in flash 
> and just rewrite coreboot on top of the BIOS block.
>
> Your original computer Firmware = Intel FW + "BIOS"
>
> Intel FW = IFD +PD+ME/TXE+GBE
> BIOS=AMI-Phoenix etc...
>
> IFD=Intel Firmware Descriptor Table.
> PD=Parameters
> ME=Management Engine (For "Core" kind of processors).
> TXE=Trusted Execution Engine (For "Atom" kind of processors).
> GBE=Network card firmware.
>
> Zvika said:
> "After creating coreboot.rom should I always use the original BIOS with 
> ifdtool to convert rom to bin ?"
> Answer:
> No, there are other methods and tools that can do the merge (ifdtool 
> and Intel's FIT are working fine for me)
>
> After the creation of the coreboot build you have 2 ways of doing the 
> flashing for your case: (with fpt).
> 1.- Flash the full 8MB (Intel FW+coreboot) if the SPI flash is blank or 
> have unknown firmware.
>  Use IFDTool in this case to inject coreboot to Intel FW. then 
> flash it with fpt .
> 2.- Flash only the BIOS block (5MB your specific case) in this case ask 
> someone else how to do it with fpt
>
> I hope this answered your questions.
> Jose..
>
> ‐‐‐ Original Message ‐‐‐
> On Saturday, September 29, 2018 12:24 AM, Zvi Vered  
> wrote:
>
>> Hi Jose,
>>
>> You wrote:
>> "My recommended approach is using the original Intel FW with already 
>> included the FD, TXE".
>>
>> What is "original intel FW" ?
>> What is FD, TXE ?
>>
>> After creating coreboot.rom should I always use the original BIOS with 
>> ifdtool to convert rom to bin ?
>>
>> Thank you,
>> Zvika
>>
>> On Wed, Sep 26, 2018 at 7:27 PM Jose Trujillo  
>> wrote:
>>
>>> You are right Nico,
>>>
>>> I just forgot the troubles this caused me.
>>> I am sorry Vika... My mistake.
>>>
>>> I can confirm with Nico:
>>> ROM chip size = 8MB (your case)
>>> CBFS_SIZE = 2 to 5MB (your specific case)
>>>
>>> My recommended approach is using the original Intel FW with already 
>>> included the FD, TXE.
>>>
>>> I never tested adding regions to coreboot but you can try.
>>>
>>> To have better chances of success you should be dumping hardware 
>>> settings booting with your original "BIOS" (look for the attached file).
>>>
>>> Check if the system is "Memory down"or/and ECC because it will be 
>>> needed to edit FSP (if using it).
>>> Dump memory settings with the following commands:
>>>
>>> sudo dnf install i2c-tools-perl
>>> sudo modprobe eeprom
>>> decode-dimms
>>>
>>> If you have not done this already there is still a long way to go.
>>> Don't get intimidated, just do it, if you have questions just ask I 
>>> w

Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Zvi Vered]

Hi Jose,

I probably made a mistake and erased the main BIOS chip (and also the
secondary one)
Currently my target is not booting OS at all.
So I can not try Mariusz procedure.
Hope to have an identical target soon.

Thank you very much for your help,
Zvika

On Thu, Oct 4, 2018 at 6:31 PM Jose Trujillo 
wrote:

> Zvika:
> Doing a full flash doesn't work for you, this is what I been doing.
> Try to use flashrom from linux if you want to do the full flash (may be it
> will work).
>
> An external programmer would be the optimal choice.
>
> Did you tried what Mariusz said?
> Jose.
>
>
>
> ‐‐‐ Original Message ‐‐‐
> On Thursday, October 4, 2018 6:20 PM, Zvi Vered 
> wrote:
>
> Hi Mariusz, Jose, All,
>
> Mariusz - Thank you very much for the solution.
> Jose - You wrote "I have never done this way...".
> Can you please suggest a better alternative ?
>
> Thank you,
> Zvika
>
>
> On Wed, Oct 3, 2018 at 8:39 PM Mariusz Szafrański via coreboot <
> coreboot@coreboot.org> wrote:
>
>> Hi Jose,
>>
>> In your case set:
>> ROM chip size = 8MB (your case)
>> CBFS_SIZE <= 5MB (your specific case)
>>
>> This will build 8M file. After that just cut last 5M of this 8M file
>> (using any hexeditor) or use something like below from command line:
>>
>> dd if=coreboot.rom of=corebootout.rom bs=1M skip=3
>>
>> (before doing that double check if original vendor`s rom file size is
>> 5242880 bytes long)
>>
>> Mariusz
>>
>>
>> W dniu 03.10.2018 o 08:53, Jose Trujillo via coreboot pisze:
>>
>> You can do that but I have never done this way and I cannot help you with
>> that.
>>
>> Someone else can advise on this?
>>
>> ‐‐‐ Original Message ‐‐‐
>> On Tuesday, October 2, 2018 9:39 PM, Zvi Vered 
>>  wrote:
>>
>> Hi Jose, All,
>>
>> Highly appreciate your answers.
>> It seems the vital information in your replies are not documented.
>>
>> The original vendor's rom file size is 5MB.
>> Do you think I can create a 5MB coreboot.rom ?
>>
>> It seems that AfuEfix64.efi supplied by vendor is looking for 5MB rom
>> file like the original one. For any other file size, AfuEfix64 fails.
>>
>> Thank you,
>> Zvika
>>
>> On Mon, Oct 1, 2018 at 2:08 PM Jose Trujillo 
>> wrote:
>>
>>> Zvika:
>>>
>>> There are 2 ways to build coreboot: (choose one)
>>> 1.- Including IFD, TXE, GBE etc inside coreboot CBFS.
>>> 2.- Using the original firmware(FW) with IFD, TXE, GBE already in flash
>>> and just rewrite coreboot on top of the BIOS block.
>>>
>>> Your original computer Firmware = Intel FW + "BIOS"
>>>
>>> Intel FW = IFD +PD+ME/TXE+GBE
>>> BIOS=AMI-Phoenix etc...
>>>
>>> IFD=Intel Firmware Descriptor Table.
>>> PD=Parameters
>>> ME=Management Engine (For "Core" kind of processors).
>>> TXE=Trusted Execution Engine (For "Atom" kind of processors).
>>> GBE=Network card firmware.
>>>
>>> Zvika said:
>>> "After creating coreboot.rom should I always use the original BIOS with
>>> ifdtool to convert rom to bin ?"
>>> Answer:
>>> No, there are other methods and tools that can do the merge (ifdtool
>>> and Intel's FIT are working fine for me)
>>>
>>> After the creation of the coreboot build you have 2 ways of doing the
>>> flashing for your case: (with fpt).
>>> 1.- Flash the full 8MB (Intel FW+coreboot) if the SPI flash is blank or
>>> have unknown firmware.
>>>  Use IFDTool in this case to inject coreboot to Intel FW. then
>>> flash it with fpt .
>>> 2.- Flash only the BIOS block (5MB your specific case) in this case ask
>>> someone else how to do it with fpt
>>>
>>> I hope this answered your questions.
>>> Jose..
>>>
>>> ‐‐‐ Original Message ‐‐‐
>>> On Saturday, September 29, 2018 12:24 AM, Zvi Vered 
>>> wrote:
>>>
>>> Hi Jose,
>>>
>>> You wrote:
>>> "My recommended approach is using the original Intel FW with already
>>> included the FD, TXE".
>>>
>>> What is "original intel FW" ?
>>> What is FD, TXE ?
>>>
>>> After creating coreboot.rom should I always use the original BIOS with
>>> ifdtool to convert rom to bin ?
>>>
>>> Thank you,
>>> Zvika
>>>
>>> On Wed, Sep 26, 2018 at 7:27 PM Jose Trujillo 
>>> wrote:
>>>
 You are right Nico,

 I just forgot the troubles this caused me.
 I am sorry Vika... My mistake.

 I can confirm with Nico:
 ROM chip size = 8MB (your case)
 CBFS_SIZE = 2 to 5MB (your specific case)

 My recommended approach is using the original Intel FW with already
 included the FD, TXE.

 I never tested adding regions to coreboot but you can try.

 To have better chances of success you should be dumping hardware
 settings booting with your original "BIOS" (look for the attached file).

 Check if the system is "Memory down"or/and ECC because it will be
 needed to edit FSP (if using it).
 Dump memory settings with the following commands:

 sudo dnf install i2c-tools-perl
 sudo modprobe eeprom
 decode-dimms

 If you have not done this already there is still a long way to go.
 Don't get intimidated,

Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Zvi Vered]

Hi Jose, Mariusz,All,

The vendor's rom file size is: 5,242,880 bytes

After running:
dd if=coreboot.rom of=coreboot.rom.new bs=1M skip=3

I got a new file with the same size.

I tried to program this new file and got the following message from the
vendor's utlity:

WARNING !
This Image file doesn't match current System design!
Force update it will destroy the System's Activation Key.
We do not recommend flashing your BIOS.
  Press "Y" to force update BIOS.
  Press "N" to quit flash.
- Please select one of the options:

I ignored the warning and programmed the BIOS.

After reset, I got nothing.

What is "System's Activation Key" ?
I'm sure that FSP (and other files) for my board are not properly
configured yet.
But I suspect this is not the reason for the message.

Thank you,
Zvika


On Thu, Oct 4, 2018 at 9:47 PM Zvi Vered  wrote:

> Hi Jose,
>
> I probably made a mistake and erased the main BIOS chip (and also the
> secondary one)
> Currently my target is not booting OS at all.
> So I can not try Mariusz procedure.
> Hope to have an identical target soon.
>
> Thank you very much for your help,
> Zvika
>
> On Thu, Oct 4, 2018 at 6:31 PM Jose Trujillo 
> wrote:
>
>> Zvika:
>> Doing a full flash doesn't work for you, this is what I been doing.
>> Try to use flashrom from linux if you want to do the full flash (may be
>> it will work).
>>
>> An external programmer would be the optimal choice.
>>
>> Did you tried what Mariusz said?
>> Jose.
>>
>>
>>
>> ‐‐‐ Original Message ‐‐‐
>> On Thursday, October 4, 2018 6:20 PM, Zvi Vered 
>> wrote:
>>
>> Hi Mariusz, Jose, All,
>>
>> Mariusz - Thank you very much for the solution.
>> Jose - You wrote "I have never done this way...".
>> Can you please suggest a better alternative ?
>>
>> Thank you,
>> Zvika
>>
>>
>> On Wed, Oct 3, 2018 at 8:39 PM Mariusz Szafrański via coreboot <
>> coreboot@coreboot.org> wrote:
>>
>>> Hi Jose,
>>>
>>> In your case set:
>>> ROM chip size = 8MB (your case)
>>> CBFS_SIZE <= 5MB (your specific case)
>>>
>>> This will build 8M file. After that just cut last 5M of this 8M file
>>> (using any hexeditor) or use something like below from command line:
>>>
>>> dd if=coreboot.rom of=corebootout.rom bs=1M skip=3
>>>
>>> (before doing that double check if original vendor`s rom file size is
>>> 5242880 bytes long)
>>>
>>> Mariusz
>>>
>>>
>>> W dniu 03.10.2018 o 08:53, Jose Trujillo via coreboot pisze:
>>>
>>> You can do that but I have never done this way and I cannot help you
>>> with that.
>>>
>>> Someone else can advise on this?
>>>
>>> ‐‐‐ Original Message ‐‐‐
>>> On Tuesday, October 2, 2018 9:39 PM, Zvi Vered 
>>>  wrote:
>>>
>>> Hi Jose, All,
>>>
>>> Highly appreciate your answers.
>>> It seems the vital information in your replies are not documented.
>>>
>>> The original vendor's rom file size is 5MB.
>>> Do you think I can create a 5MB coreboot.rom ?
>>>
>>> It seems that AfuEfix64.efi supplied by vendor is looking for 5MB rom
>>> file like the original one. For any other file size, AfuEfix64 fails.
>>>
>>> Thank you,
>>> Zvika
>>>
>>> On Mon, Oct 1, 2018 at 2:08 PM Jose Trujillo 
>>> wrote:
>>>
 Zvika:

 There are 2 ways to build coreboot: (choose one)
 1.- Including IFD, TXE, GBE etc inside coreboot CBFS.
 2.- Using the original firmware(FW) with IFD, TXE, GBE already in flash
 and just rewrite coreboot on top of the BIOS block.

 Your original computer Firmware = Intel FW + "BIOS"

 Intel FW = IFD +PD+ME/TXE+GBE
 BIOS=AMI-Phoenix etc...

 IFD=Intel Firmware Descriptor Table.
 PD=Parameters
 ME=Management Engine (For "Core" kind of processors).
 TXE=Trusted Execution Engine (For "Atom" kind of processors).
 GBE=Network card firmware.

 Zvika said:
 "After creating coreboot.rom should I always use the original BIOS with
 ifdtool to convert rom to bin ?"
 Answer:
 No, there are other methods and tools that can do the merge
 (ifdtool and Intel's FIT are working fine for me)

 After the creation of the coreboot build you have 2 ways of doing the
 flashing for your case: (with fpt).
 1.- Flash the full 8MB (Intel FW+coreboot) if the SPI flash is blank or
 have unknown firmware.
  Use IFDTool in this case to inject coreboot to Intel FW. then
 flash it with fpt .
 2.- Flash only the BIOS block (5MB your specific case) in this case ask
 someone else how to do it with fpt

 I hope this answered your questions.
 Jose..

 ‐‐‐ Original Message ‐‐‐
 On Saturday, September 29, 2018 12:24 AM, Zvi Vered 
 wrote:

 Hi Jose,

 You wrote:
 "My recommended approach is using the original Intel FW with already
 included the FD, TXE".

 What is "original intel FW" ?
 What is FD, TXE ?

 After creating coreboot.rom should I always use the original BIOS with
 ifdtool to convert rom to bin ?

 Thank you,
>>>

Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Jose Trujillo via coreboot]

I have no idea bro
I cannot help you with that.
I am just curious  Which brand and model of board are you using?

‐‐‐ Original Message ‐‐‐
On Friday, October 5, 2018 6:05 AM, Zvi Vered  wrote:

> Hi Jose, Mariusz,All,
>
> The vendor's rom file size is: 5,242,880 bytes
>
> After running:
> dd if=coreboot.rom of=coreboot.rom.new bs=1M skip=3
>
> I got a new file with the same size.
>
> I tried to program this new file and got the following message from the 
> vendor's utlity:
>
> WARNING !
> This Image file doesn't match current System design!
> Force update it will destroy the System's Activation Key.
> We do not recommend flashing your BIOS.
>   Press "Y" to force update BIOS.
>   Press "N" to quit flash.
> - Please select one of the options:
>
> I ignored the warning and programmed the BIOS.
>
> After reset, I got nothing.
>
> What is "System's Activation Key" ?
> I'm sure that FSP (and other files) for my board are not properly configured 
> yet.
> But I suspect this is not the reason for the message.
>
> Thank you,
> Zvika
>
> On Thu, Oct 4, 2018 at 9:47 PM Zvi Vered  wrote:
>
>> Hi Jose,
>>
>> I probably made a mistake and erased the main BIOS chip (and also the 
>> secondary one)
>> Currently my target is not booting OS at all.
>> So I can not try Mariusz procedure.
>> Hope to have an identical target soon.
>>
>> Thank you very much for your help,
>> Zvika
>>
>> On Thu, Oct 4, 2018 at 6:31 PM Jose Trujillo  wrote:
>>
>>> Zvika:
>>> Doing a full flash doesn't work for you, this is what I been doing.
>>> Try to use flashrom from linux if you want to do the full flash (may be it 
>>> will work).
>>>
>>> An external programmer would be the optimal choice.
>>>
>>> Did you tried what Mariusz said?
>>> Jose.
>>>
>>> ‐‐‐ Original Message ‐‐‐
>>> On Thursday, October 4, 2018 6:20 PM, Zvi Vered  wrote:
>>>
 Hi Mariusz, Jose, All,

 Mariusz - Thank you very much for the solution.
 Jose - You wrote "I have never done this way...".
 Can you please suggest a better alternative ?

 Thank you,
 Zvika

 On Wed, Oct 3, 2018 at 8:39 PM Mariusz Szafrański via coreboot 
  wrote:

> Hi Jose,
>
> In your case set:
> ROM chip size = 8MB (your case)
> CBFS_SIZE <= 5MB (your specific case)
>
> This will build 8M file. After that just cut last 5M of this 8M file 
> (using any hexeditor) or use something like below from command line:
>
> dd if=coreboot.rom of=corebootout.rom bs=1M skip=3
>
> (before doing that double check if original vendor`s rom file size is 
> 5242880 bytes long)
>
> Mariusz
>
> W dniu 03.10.2018 o 08:53, Jose Trujillo via coreboot pisze:
>
>> You can do that but I have never done this way and I cannot help you 
>> with that.
>>
>> Someone else can advise on this?
>>
>> ‐‐‐ Original Message ‐‐‐
>> On Tuesday, October 2, 2018 9:39 PM, Zvi Vered 
>> [](mailto:vered...@gmail.com) wrote:
>>
>>> Hi Jose, All,
>>>
>>> Highly appreciate your answers.
>>> It seems the vital information in your replies are not documented.
>>>
>>> The original vendor's rom file size is 5MB.
>>> Do you think I can create a 5MB coreboot.rom ?
>>>
>>> It seems that AfuEfix64.efi supplied by vendor is looking for 5MB rom 
>>> file like the original one. For any other file size, AfuEfix64 fails.
>>>
>>> Thank you,
>>> Zvika
>>>
>>> On Mon, Oct 1, 2018 at 2:08 PM Jose Trujillo  
>>> wrote:
>>>
 Zvika:

 There are 2 ways to build coreboot: (choose one)
 1.- Including IFD, TXE, GBE etc inside coreboot CBFS.
 2.- Using the original firmware(FW) with IFD, TXE, GBE already in 
 flash and just rewrite coreboot on top of the BIOS block.

 Your original computer Firmware = Intel FW + "BIOS"

 Intel FW = IFD +PD+ME/TXE+GBE
 BIOS=AMI-Phoenix etc...

 IFD=Intel Firmware Descriptor Table.
 PD=Parameters
 ME=Management Engine (For "Core" kind of processors).
 TXE=Trusted Execution Engine (For "Atom" kind of processors).
 GBE=Network card firmware.

 Zvika said:
 "After creating coreboot.rom should I always use the original BIOS 
 with ifdtool to convert rom to bin ?"
 Answer:
 No, there are other methods and tools that can do the merge 
 (ifdtool and Intel's FIT are working fine for me)

 After the creation of the coreboot build you have 2 ways of doing the 
 flashing for your case: (with fpt).
 1.- Flash the full 8MB (Intel FW+coreboot) if the SPI flash is blank 
 or have unknown firmware.
  Use IFDTool in this case to inject coreboot to Intel FW. then 
 flash it with fpt .
 2.- Flash only the BIOS block (5MB your specific case) in

Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Mariusz Szafrański via coreboot]

Also have no idea :(
My solution should work when vendor`s utility just put unmodified whole 
5M coreboot.rom.new at top of the flash chip space.

But this could not be true and vendor`s utility is doing something else :(
(e.g. put it on other location, split it and place chunks on non 
continuous areas or injects some kind of "id" or "keys" before flashing)


Mariusz

W dniu 05.10.2018 o 10:50, Jose Trujillo pisze:

I have no idea bro
I cannot help you with that.
I am just curious  Which brand and model of board are you using?

‐‐‐ Original Message ‐‐‐
On Friday, October 5, 2018 6:05 AM, Zvi Vered  wrote:


Hi Jose, Mariusz,All,

The vendor's rom file size is: 5,242,880 bytes

After running:
dd if=coreboot.rom of=coreboot.rom.new bs=1M skip=3

I got a new file with the same size.

I tried to program this new file and got the following message from 
the vendor's utlity:


WARNING !
This Image file doesn't match current System design!
Force update it will destroy the System's Activation Key.
We do not recommend flashing your BIOS.
  Press "Y" to force update BIOS.
  Press "N" to quit flash.
- Please select one of the options:

I ignored the warning and programmed the BIOS.

After reset, I got nothing.

What is "System's Activation Key" ?
I'm sure that FSP (and other files) for my board are not properly 
configured yet.

But I suspect this is not the reason for the message.

Thank you,
Zvika


On Thu, Oct 4, 2018 at 9:47 PM Zvi Vered > wrote:


Hi Jose,

I probably made a mistake and erased the main BIOS chip (and also
the secondary one)
Currently my target is not booting OS at all.
So I can not try Mariusz procedure.
Hope to have an identical target soon.

Thank you very much for your help,
Zvika

On Thu, Oct 4, 2018 at 6:31 PM Jose Trujillo
mailto:ce.au...@protonmail.com>> wrote:

Zvika:
Doing a full flash doesn't work for you, this is what I been
doing.
Try to use flashrom from linux if you want to do the full
flash (may be it will work).

An external programmer would be the optimal choice.

Did you tried what Mariusz said?
Jose.



‐‐‐ Original Message ‐‐‐
On Thursday, October 4, 2018 6:20 PM, Zvi Vered
mailto:vered...@gmail.com>> wrote:


Hi Mariusz, Jose, All,

Mariusz - Thank you very much for the solution.
Jose - You wrote "I have never done this way...".
Can you please suggest a better alternative ?

Thank you,
Zvika


On Wed, Oct 3, 2018 at 8:39 PM Mariusz Szafrański via
coreboot mailto:coreboot@coreboot.org>> wrote:

Hi Jose,

In your case set:
ROM chip size = 8MB (your case)
CBFS_SIZE <= 5MB (your specific case)

This will build 8M file. After that just cut last 5M of
this 8M file (using any hexeditor) or use something like
below from command line:

dd if=coreboot.rom of=corebootout.rom bs=1M skip=3

(before doing that double check if original vendor`s rom
file size is 5242880 bytes long)

Mariusz


W dniu 03.10.2018 o 08:53, Jose Trujillo via coreboot pisze:

You can do that but I have never done this way and I
cannot help you with that.

Someone else can advise on this?

‐‐‐ Original Message ‐‐‐
On Tuesday, October 2, 2018 9:39 PM, Zvi Vered
  wrote:


Hi Jose, All,

Highly appreciate your answers.
It seems the vital information in your replies are not
documented.

The original vendor's rom file size is 5MB.
Do you think I can create a 5MB coreboot.rom ?

It seems that AfuEfix64.efi supplied by vendor is
looking for 5MB rom file like the original one. For
any other file size, AfuEfix64 fails.

Thank you,
Zvika

On Mon, Oct 1, 2018 at 2:08 PM Jose Trujillo
mailto:ce.au...@protonmail.com>> wrote:

Zvika:

There are 2 ways to build coreboot: (choose one)
1.- Including IFD, TXE, GBE etc inside
coreboot CBFS.
2.- Using the original firmware(FW) with IFD, TXE,
GBE already in flash and just rewrite coreboot on
top of the BIOS block.

Your original computer Firmware = Intel FW + "BIOS"

Intel FW = IFD +PD+ME/TXE+GBE
BIOS=AMI-Phoenix etc...

IFD=Intel Firmware Descriptor Table.
PD=Parameters
ME=Management Engine (For "Core" kind of processors).
TXE=Trusted Execution Engine (For "Atom" kind of
processors).

Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Zvi Vered]

Hi Jose, Mariusz, All,

The vendor is Adlink. The board is called LEC-BTS
https://www.adlinktech.com/Products/Computer_on_Modules/SMARC/LEC-BTS?lang=en
The CPU is Intel's Bay Trail.

According to the help of flashrom, it works with bin files only.
So I should take coreboot.rom and stitch it to the parts of the original
vendor's bin file.
Am I right?

Thank you,
Zvika

On Fri, Oct 5, 2018 at 12:12 PM Mariusz Szafrański via coreboot <
coreboot@coreboot.org> wrote:

> Also have no idea :(
> My solution should work when vendor`s utility just put unmodified whole 5M
> coreboot.rom.new at top of the flash chip space.
> But this could not be true and vendor`s utility is doing something else :(
> (e.g. put it on other location, split it and place chunks on non
> continuous areas or injects some kind of "id" or "keys" before flashing)
>
> Mariusz
> W dniu 05.10.2018 o 10:50, Jose Trujillo pisze:
>
> I have no idea bro
> I cannot help you with that.
> I am just curious  Which brand and model of board are you using?
>
> ‐‐‐ Original Message ‐‐‐
> On Friday, October 5, 2018 6:05 AM, Zvi Vered 
>  wrote:
>
> Hi Jose, Mariusz,All,
>
> The vendor's rom file size is: 5,242,880 bytes
>
> After running:
> dd if=coreboot.rom of=coreboot.rom.new bs=1M skip=3
>
> I got a new file with the same size.
>
> I tried to program this new file and got the following message from the
> vendor's utlity:
>
> WARNING !
> This Image file doesn't match current System design!
> Force update it will destroy the System's Activation Key.
> We do not recommend flashing your BIOS.
>   Press "Y" to force update BIOS.
>   Press "N" to quit flash.
> - Please select one of the options:
>
> I ignored the warning and programmed the BIOS.
>
> After reset, I got nothing.
>
> What is "System's Activation Key" ?
> I'm sure that FSP (and other files) for my board are not properly
> configured yet.
> But I suspect this is not the reason for the message.
>
> Thank you,
> Zvika
>
>
> On Thu, Oct 4, 2018 at 9:47 PM Zvi Vered  wrote:
>
>> Hi Jose,
>>
>> I probably made a mistake and erased the main BIOS chip (and also the
>> secondary one)
>> Currently my target is not booting OS at all.
>> So I can not try Mariusz procedure.
>> Hope to have an identical target soon.
>>
>> Thank you very much for your help,
>> Zvika
>>
>> On Thu, Oct 4, 2018 at 6:31 PM Jose Trujillo 
>> wrote:
>>
>>> Zvika:
>>> Doing a full flash doesn't work for you, this is what I been doing.
>>> Try to use flashrom from linux if you want to do the full flash (may be
>>> it will work).
>>>
>>> An external programmer would be the optimal choice.
>>>
>>> Did you tried what Mariusz said?
>>> Jose.
>>>
>>>
>>>
>>> ‐‐‐ Original Message ‐‐‐
>>> On Thursday, October 4, 2018 6:20 PM, Zvi Vered 
>>> wrote:
>>>
>>> Hi Mariusz, Jose, All,
>>>
>>> Mariusz - Thank you very much for the solution.
>>> Jose - You wrote "I have never done this way...".
>>> Can you please suggest a better alternative ?
>>>
>>> Thank you,
>>> Zvika
>>>
>>>
>>> On Wed, Oct 3, 2018 at 8:39 PM Mariusz Szafrański via coreboot <
>>> coreboot@coreboot.org> wrote:
>>>
 Hi Jose,

 In your case set:
 ROM chip size = 8MB (your case)
 CBFS_SIZE <= 5MB (your specific case)

 This will build 8M file. After that just cut last 5M of this 8M file
 (using any hexeditor) or use something like below from command line:

 dd if=coreboot.rom of=corebootout.rom bs=1M skip=3

 (before doing that double check if original vendor`s rom file size is
 5242880 bytes long)

 Mariusz


 W dniu 03.10.2018 o 08:53, Jose Trujillo via coreboot pisze:

 You can do that but I have never done this way and I cannot help you
 with that.

 Someone else can advise on this?

 ‐‐‐ Original Message ‐‐‐
 On Tuesday, October 2, 2018 9:39 PM, Zvi Vered 
  wrote:

 Hi Jose, All,

 Highly appreciate your answers.
 It seems the vital information in your replies are not documented.

 The original vendor's rom file size is 5MB.
 Do you think I can create a 5MB coreboot.rom ?

 It seems that AfuEfix64.efi supplied by vendor is looking for 5MB rom
 file like the original one. For any other file size, AfuEfix64 fails.

 Thank you,
 Zvika

 On Mon, Oct 1, 2018 at 2:08 PM Jose Trujillo 
 wrote:

> Zvika:
>
> There are 2 ways to build coreboot: (choose one)
> 1.- Including IFD, TXE, GBE etc inside coreboot CBFS.
> 2.- Using the original firmware(FW) with IFD, TXE, GBE already in
> flash and just rewrite coreboot on top of the BIOS block.
>
> Your original computer Firmware = Intel FW + "BIOS"
>
> Intel FW = IFD +PD+ME/TXE+GBE
> BIOS=AMI-Phoenix etc...
>
> IFD=Intel Firmware Descriptor Table.
> PD=Parameters
> ME=Management Engine (For "Core" kind of processors).
> TXE=Trusted Execution Engine (For "Atom" kind 

Re: [coreboot] Burn 2MB coreboot.rom on 8MB flash chip

[Nico Huber]

Hi Zvi,

On 10/5/18 8:46 PM, Zvi Vered wrote:
> According to the help of flashrom, it works with bin files only.
> So I should take coreboot.rom and stitch it to the parts of the original
> vendor's bin file.

there is no standard for neither .bin nor .rom files. Most often these
file-name extensions just mean the file contains raw data.

If any program implies a special meaning to .rom or .bin, then that
meaning is vendor specific.

So to flashrom, .rom and .bin is the same. Flashrom doesn't look at the
file contents at all. It just copies them to the flash chip (much like
the `dd` command copies file contents no matter what they are).

If you tell flashrom to write a complete file that doesn't contain a
firmware descriptor, then the system can't boot anymore. But if you have
a descriptor and other required firmware parts in the flash already, you
can tell flashrom to only flash the BIOS region, e.g.:

  # flashrom -p ... --ifd -i bios -w coreboot.rom

This is just more convenient and reliable than stitching files (but the
result should be the same).

Nico

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