Re: [coreboot] BDX-DE PCI init fail
On Fri, Jan 26, 2018 at 12:23 AM, Hilbert Tu(杜睿哲_Pegatron) < hilbert...@pegatroncorp.com> wrote: > Hi guys, > > > > Sorry for the late. I spent some time try to use U-Boot as payload but > still get infinite reboot…maybe wrong TSC clock frequency in my dts file. > > About using the Grub2 as payload, it is now working after I modify > “–unit=1” to “—unit=0” :P That’s why it hangs… > > Thanks for all your help. > I'm happy to hear of your success! It will be great if you figure out the issue with the u-boot payload as well. > -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hi guys, Sorry for the late. I spent some time try to use U-Boot as payload but still get infinite reboot…maybe wrong TSC clock frequency in my dts file. About using the Grub2 as payload, it is now working after I modify “–unit=1” to “—unit=0” :P That’s why it hangs… Thanks for all your help. -Hilbert This e-mail and its attachment may contain information that is confidential or privileged, and are solely for the use of the individual to whom this e-mail is addressed. If you are not the intended recipient or have received it accidentally, please immediately notify the sender by reply e-mail and destroy all copies of this email and its attachment. Please be advised that any unauthorized use, disclosure, distribution or copying of this email or its attachment is strictly prohibited. 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hilbert, David is right. GRUB2 should be also Legacy installable. I am simply forgetting stuff, since I am not in BSP domain anymore, these days. Today early morning I started my Fedora 27, and it failed to enter grub.cfg for unknown reason (file was wiped out for some reason?!). It is, after all, an easy fix, I estimated 10 minutes for that, but it took me (amazingly) an hour to recover grub.cfg. It is matter of practice... It is. ;-) Zoran ___ On Tue, Jan 16, 2018 at 6:14 AM, David Hendricks <david.hendri...@gmail.com> wrote: > Hi Hilbert, > > On Mon, Jan 15, 2018 at 12:51 AM, Hilbert Tu(杜睿哲_Pegatron) < > hilbert...@pegatroncorp.com> wrote: > >> Hi Zoran, >> >> That information was dumped when I use SeaBIOS as coreboot's payload. I >> don't know why it is related to GRUB_legacy. If I use GRUB2 as payload, it >> just hangs there. I am still struggling on this :( >> > > If you are using serial console, did you remember to enable serial output > in grub.cfg? There is a GRUB2 wiki page on coreboot.org which you might > find helpful (if you haven't already read it): > https://www.coreboot.org/GRUB2 > > > By the way, I saw following message in the log. Should I choose >> NodeManager Mode? Do you know what's different? > > >> >>[SPS] SiliconEnabling Mode >> >> >> Thanks. >> -Hilbert >> >> -Original Message- >> From: Zoran Stojsavljevic [mailto:zoran.stojsavlje...@gmail.com] >> Sent: Thursday, January 11, 2018 7:27 PM >> To: Hilbert Tu(杜睿哲_Pegatron) >> Cc: Zeh, Werner; coreboot@coreboot.org; David Hendricks >> Subject: Re: [coreboot] BDX-DE PCI init fail >> >> > Booting from Hard Disk... >> > Booting from :7c00 >> >> It is booting from the thirty second Kbyte of HDD (sector 62, sector 0 >> is MBR), where the beginning of GRUB Legacy is placed/implanted, >> called core.img or similar name. >> >> https://wiki.archlinux.org/index.php/GRUB_Legacy >> >> Well, you have succeed, by all means. Problem solved! ;-) >> >> Zoran >> ___ >> >> On Thu, Jan 11, 2018 at 12:06 PM, Hilbert Tu(杜睿哲_Pegatron) >> <hilbert...@pegatroncorp.com> wrote: >> > Hi Werner, >> > >> > Thanks for your information. It works but still has same result. The >> result is like following. My usb stick is ext4fs formatted and has kernel >> and rootfs files. I wish SeaBIOS can give me a shell like Grub so that I >> can specify how to boot next. Or should I create a bootable usb stick? >> > >> > >> > = PEIM FSP is Completed = >> > >> > Returned from FspNotify(EnumInitPhaseReadyToBoot) >> > Jumping to boot code at 000ff06e(7eff6000) >> > CPU0: stack: 00128000 - 00129000, lowest used address 00128b00, stack >> used: 1280 bytes >> > entry= 0x000ff06e >> > lb_start = 0x0010 >> > lb_size = 0x0012d6d0 >> > buffer = 0x7ed66000 >> > SeaBIOS (version rel-1.10.2-0-g5f4c7b1) >> > BUILD: gcc: (coreboot toolchain v1.44 March 3rd, 2017) 6.3.0 binutils: >> (GNU Binutils) 2.28 >> > Found mainboard Intel Camelback Mountain CRB >> > Relocating init from 0x000e3860 to 0x7ef74cc0 (size 49824) >> > Found CBFS header at 0xffe00138 >> > multiboot: eax=0, ebx=0 >> > Found 25 PCI devices (max PCI bus is 05) >> > Copying SMBIOS entry point from 0x7efc1000 to 0x000f7140 >> > Copying ACPI RSDP from 0x7efd2000 to 0x000f7110 >> > Using pmtimer, ioport 0x408 >> > WARNING - Timeout at tis_wait_sts:160! >> > WARNING - Timeout at tis_wait_sts:160! >> > Scan for VGA option rom >> > XHCI init on dev 00:14.0: regs @ 0xfea0, 21 ports, 32 slots, 32 >> byte contexts >> > XHCIprotocol USB 2.00, 8 ports (offset 1), def 3001 >> > XHCIprotocol USB 3.00, 6 ports (offset 16), def 1000 >> > XHCIextcap 0xc1 @ 0xfea08040 >> > XHCIextcap 0xc0 @ 0xfea08070 >> > XHCIextcap 0x1 @ 0xfea0846c >> > EHCI init on dev 00:1a.0 (regs=0xfea18020) >> > EHCI init on dev 00:1d.0 (regs=0xfea19020) >> > WARNING - Timeout at i8042_flush:71! >> > ebda moved from 9f000 to 9e800 >> > AHCI controller at 00:1f.2, iobase 0xfea17000, irq 5 >> > Found 0 lpt ports >> > Found 2 serial ports >> > XHCI no devices found >> > Searching bootorder for: /pci@i0cf8/usb@1d/hub@1/storage@1/*@0/*@0,0 >> > Searching bootorder for: /pci@i0cf8/usb@1d/hub@1/usb-*@1 >> > USB MSC vendor='Generic-' product='Multiple Reader' rev='1.11' type=0 >> rem
Re: [coreboot] BDX-DE PCI init fail
Hi Hilbert, On Mon, Jan 15, 2018 at 12:51 AM, Hilbert Tu(杜睿哲_Pegatron) < hilbert...@pegatroncorp.com> wrote: > Hi Zoran, > > That information was dumped when I use SeaBIOS as coreboot's payload. I > don't know why it is related to GRUB_legacy. If I use GRUB2 as payload, it > just hangs there. I am still struggling on this :( > If you are using serial console, did you remember to enable serial output in grub.cfg? There is a GRUB2 wiki page on coreboot.org which you might find helpful (if you haven't already read it): https://www.coreboot.org/GRUB2 By the way, I saw following message in the log. Should I choose NodeManager > Mode? Do you know what's different? > >>[SPS] SiliconEnabling Mode > > > Thanks. > -Hilbert > > -Original Message- > From: Zoran Stojsavljevic [mailto:zoran.stojsavlje...@gmail.com] > Sent: Thursday, January 11, 2018 7:27 PM > To: Hilbert Tu(杜睿哲_Pegatron) > Cc: Zeh, Werner; coreboot@coreboot.org; David Hendricks > Subject: Re: [coreboot] BDX-DE PCI init fail > > > Booting from Hard Disk... > > Booting from :7c00 > > It is booting from the thirty second Kbyte of HDD (sector 62, sector 0 > is MBR), where the beginning of GRUB Legacy is placed/implanted, > called core.img or similar name. > > https://wiki.archlinux.org/index.php/GRUB_Legacy > > Well, you have succeed, by all means. Problem solved! ;-) > > Zoran > ___ > > On Thu, Jan 11, 2018 at 12:06 PM, Hilbert Tu(杜睿哲_Pegatron) > <hilbert...@pegatroncorp.com> wrote: > > Hi Werner, > > > > Thanks for your information. It works but still has same result. The > result is like following. My usb stick is ext4fs formatted and has kernel > and rootfs files. I wish SeaBIOS can give me a shell like Grub so that I > can specify how to boot next. Or should I create a bootable usb stick? > > > > > > = PEIM FSP is Completed = > > > > Returned from FspNotify(EnumInitPhaseReadyToBoot) > > Jumping to boot code at 000ff06e(7eff6000) > > CPU0: stack: 00128000 - 00129000, lowest used address 00128b00, stack > used: 1280 bytes > > entry= 0x000ff06e > > lb_start = 0x0010 > > lb_size = 0x0012d6d0 > > buffer = 0x7ed66000 > > SeaBIOS (version rel-1.10.2-0-g5f4c7b1) > > BUILD: gcc: (coreboot toolchain v1.44 March 3rd, 2017) 6.3.0 binutils: > (GNU Binutils) 2.28 > > Found mainboard Intel Camelback Mountain CRB > > Relocating init from 0x000e3860 to 0x7ef74cc0 (size 49824) > > Found CBFS header at 0xffe00138 > > multiboot: eax=0, ebx=0 > > Found 25 PCI devices (max PCI bus is 05) > > Copying SMBIOS entry point from 0x7efc1000 to 0x000f7140 > > Copying ACPI RSDP from 0x7efd2000 to 0x000f7110 > > Using pmtimer, ioport 0x408 > > WARNING - Timeout at tis_wait_sts:160! > > WARNING - Timeout at tis_wait_sts:160! > > Scan for VGA option rom > > XHCI init on dev 00:14.0: regs @ 0xfea0, 21 ports, 32 slots, 32 byte > contexts > > XHCIprotocol USB 2.00, 8 ports (offset 1), def 3001 > > XHCIprotocol USB 3.00, 6 ports (offset 16), def 1000 > > XHCIextcap 0xc1 @ 0xfea08040 > > XHCIextcap 0xc0 @ 0xfea08070 > > XHCIextcap 0x1 @ 0xfea0846c > > EHCI init on dev 00:1a.0 (regs=0xfea18020) > > EHCI init on dev 00:1d.0 (regs=0xfea19020) > > WARNING - Timeout at i8042_flush:71! > > ebda moved from 9f000 to 9e800 > > AHCI controller at 00:1f.2, iobase 0xfea17000, irq 5 > > Found 0 lpt ports > > Found 2 serial ports > > XHCI no devices found > > Searching bootorder for: /pci@i0cf8/usb@1d/hub@1/storage@1/*@0/*@0,0 > > Searching bootorder for: /pci@i0cf8/usb@1d/hub@1/usb-*@1 > > USB MSC vendor='Generic-' product='Multiple Reader' rev='1.11' type=0 > removable=1 > > ehci_wait_td error - status=80e42 > > Initialized USB HUB (0 ports used) > > USB MSC blksize=512 sectors=30777344 > > Initialized USB HUB (1 ports used) > > All threads complete. > > Scan for option roms > > Running option rom at c000:0003 > > Running option rom at c100:0003 > > Searching bootorder for: /pci@i0cf8/pci-bridge@2,2/*@0 > > Searching bootorder for: /pci@i0cf8/pci-bridge@2,2/*@0,1 > > > > Press ESC for boot menu. > > > > WARNING - Timeout at tis_wait_sts:160! > > Searching bootorder for: HALT > > drive 0x000f70c0: PCHS=0/0/0 translation=lba LCHS=1024/255/63 s=30777344 > > Space available for UMB: c2000-efb00, f6960-f70c0 > > Returned 184320 bytes of ZoneHigh > > e820 map has 9 items: > > 0: - 0009e800 = 1 RAM > > 1: 0009e800 - 000a = 2 RESERVED > >
Re: [coreboot] BDX-DE PCI init fail
Hi Zoran, Anyway, thanks. I have learnt a lot from the discussion. Thank you all. -Hilbert This e-mail and its attachment may contain information that is confidential or privileged, and are solely for the use of the individual to whom this e-mail is addressed. If you are not the intended recipient or have received it accidentally, please immediately notify the sender by reply e-mail and destroy all copies of this email and its attachment. Please be advised that any unauthorized use, disclosure, distribution or copying of this email or its attachment is strictly prohibited. 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
As my best understanding is, you need to install GRUB Legacy for Legacy (SeaBIOS) to boot. To do this, you need to boot from UEFI BIOS to GRUB2, then to Ubuntu (to install GRUB Legay. 0.97). Please, read: https://ubuntuforums.org/showthread.php?t=1298932 They (GRUB 0.97 abd GRUB 2.0) can co-exist there days, and the result of this is the option in BIOS and Bootable USB called MBR + UEFI mode. SPS stands for: Server Platform Services, and as I understand this, this is layer above ME, managing Servers (BDX-DE is a server). As well as AMT. It belongs to ME part of INTEL platform. Sorry I could not help you more. No time. Zoran ___ On Mon, Jan 15, 2018 at 9:51 AM, Hilbert Tu(杜睿哲_Pegatron) <hilbert...@pegatroncorp.com> wrote: > Hi Zoran, > > That information was dumped when I use SeaBIOS as coreboot's payload. I don't > know why it is related to GRUB_legacy. If I use GRUB2 as payload, it just > hangs there. I am still struggling on this :( > By the way, I saw following message in the log. Should I choose NodeManager > Mode? Do you know what's different? > >>>[SPS] SiliconEnabling Mode > > > Thanks. > -Hilbert > > -Original Message- > From: Zoran Stojsavljevic [mailto:zoran.stojsavlje...@gmail.com] > Sent: Thursday, January 11, 2018 7:27 PM > To: Hilbert Tu(杜睿哲_Pegatron) > Cc: Zeh, Werner; coreboot@coreboot.org; David Hendricks > Subject: Re: [coreboot] BDX-DE PCI init fail > >> Booting from Hard Disk... >> Booting from :7c00 > > It is booting from the thirty second Kbyte of HDD (sector 62, sector 0 > is MBR), where the beginning of GRUB Legacy is placed/implanted, > called core.img or similar name. > > https://wiki.archlinux.org/index.php/GRUB_Legacy > > Well, you have succeed, by all means. Problem solved! ;-) > > Zoran > ___ > > On Thu, Jan 11, 2018 at 12:06 PM, Hilbert Tu(杜睿哲_Pegatron) > <hilbert...@pegatroncorp.com> wrote: >> Hi Werner, >> >> Thanks for your information. It works but still has same result. The result >> is like following. My usb stick is ext4fs formatted and has kernel and >> rootfs files. I wish SeaBIOS can give me a shell like Grub so that I can >> specify how to boot next. Or should I create a bootable usb stick? >> >> >> = PEIM FSP is Completed = >> >> Returned from FspNotify(EnumInitPhaseReadyToBoot) >> Jumping to boot code at 000ff06e(7eff6000) >> CPU0: stack: 00128000 - 00129000, lowest used address 00128b00, stack used: >> 1280 bytes >> entry= 0x000ff06e >> lb_start = 0x0010 >> lb_size = 0x0012d6d0 >> buffer = 0x7ed66000 >> SeaBIOS (version rel-1.10.2-0-g5f4c7b1) >> BUILD: gcc: (coreboot toolchain v1.44 March 3rd, 2017) 6.3.0 binutils: (GNU >> Binutils) 2.28 >> Found mainboard Intel Camelback Mountain CRB >> Relocating init from 0x000e3860 to 0x7ef74cc0 (size 49824) >> Found CBFS header at 0xffe00138 >> multiboot: eax=0, ebx=0 >> Found 25 PCI devices (max PCI bus is 05) >> Copying SMBIOS entry point from 0x7efc1000 to 0x000f7140 >> Copying ACPI RSDP from 0x7efd2000 to 0x000f7110 >> Using pmtimer, ioport 0x408 >> WARNING - Timeout at tis_wait_sts:160! >> WARNING - Timeout at tis_wait_sts:160! >> Scan for VGA option rom >> XHCI init on dev 00:14.0: regs @ 0xfea0, 21 ports, 32 slots, 32 byte >> contexts >> XHCIprotocol USB 2.00, 8 ports (offset 1), def 3001 >> XHCIprotocol USB 3.00, 6 ports (offset 16), def 1000 >> XHCIextcap 0xc1 @ 0xfea08040 >> XHCIextcap 0xc0 @ 0xfea08070 >> XHCIextcap 0x1 @ 0xfea0846c >> EHCI init on dev 00:1a.0 (regs=0xfea18020) >> EHCI init on dev 00:1d.0 (regs=0xfea19020) >> WARNING - Timeout at i8042_flush:71! >> ebda moved from 9f000 to 9e800 >> AHCI controller at 00:1f.2, iobase 0xfea17000, irq 5 >> Found 0 lpt ports >> Found 2 serial ports >> XHCI no devices found >> Searching bootorder for: /pci@i0cf8/usb@1d/hub@1/storage@1/*@0/*@0,0 >> Searching bootorder for: /pci@i0cf8/usb@1d/hub@1/usb-*@1 >> USB MSC vendor='Generic-' product='Multiple Reader' rev='1.11' type=0 >> removable=1 >> ehci_wait_td error - status=80e42 >> Initialized USB HUB (0 ports used) >> USB MSC blksize=512 sectors=30777344 >> Initialized USB HUB (1 ports used) >> All threads complete. >> Scan for option roms >> Running option rom at c000:0003 >> Running option rom at c100:0003 >> Searching bootorder for: /pci@i0cf8/pci-bridge@2,2/*@0 >> Searching bootorder for: /pci@i0cf8/pci-bridge@2,2/*@0,1 >> >> Press ESC for boot menu. >> >> WARNING - Timeout at tis_wait_sts:160
Re: [coreboot] BDX-DE PCI init fail
> Booting from Hard Disk... > Booting from :7c00 It is booting from the thirty second Kbyte of HDD (sector 62, sector 0 is MBR), where the beginning of GRUB Legacy is placed/implanted, called core.img or similar name. https://wiki.archlinux.org/index.php/GRUB_Legacy Well, you have succeed, by all means. Problem solved! ;-) Zoran ___ On Thu, Jan 11, 2018 at 12:06 PM, Hilbert Tu(杜睿哲_Pegatron)wrote: > Hi Werner, > > Thanks for your information. It works but still has same result. The result > is like following. My usb stick is ext4fs formatted and has kernel and rootfs > files. I wish SeaBIOS can give me a shell like Grub so that I can specify how > to boot next. Or should I create a bootable usb stick? > > > = PEIM FSP is Completed = > > Returned from FspNotify(EnumInitPhaseReadyToBoot) > Jumping to boot code at 000ff06e(7eff6000) > CPU0: stack: 00128000 - 00129000, lowest used address 00128b00, stack used: > 1280 bytes > entry= 0x000ff06e > lb_start = 0x0010 > lb_size = 0x0012d6d0 > buffer = 0x7ed66000 > SeaBIOS (version rel-1.10.2-0-g5f4c7b1) > BUILD: gcc: (coreboot toolchain v1.44 March 3rd, 2017) 6.3.0 binutils: (GNU > Binutils) 2.28 > Found mainboard Intel Camelback Mountain CRB > Relocating init from 0x000e3860 to 0x7ef74cc0 (size 49824) > Found CBFS header at 0xffe00138 > multiboot: eax=0, ebx=0 > Found 25 PCI devices (max PCI bus is 05) > Copying SMBIOS entry point from 0x7efc1000 to 0x000f7140 > Copying ACPI RSDP from 0x7efd2000 to 0x000f7110 > Using pmtimer, ioport 0x408 > WARNING - Timeout at tis_wait_sts:160! > WARNING - Timeout at tis_wait_sts:160! > Scan for VGA option rom > XHCI init on dev 00:14.0: regs @ 0xfea0, 21 ports, 32 slots, 32 byte > contexts > XHCIprotocol USB 2.00, 8 ports (offset 1), def 3001 > XHCIprotocol USB 3.00, 6 ports (offset 16), def 1000 > XHCIextcap 0xc1 @ 0xfea08040 > XHCIextcap 0xc0 @ 0xfea08070 > XHCIextcap 0x1 @ 0xfea0846c > EHCI init on dev 00:1a.0 (regs=0xfea18020) > EHCI init on dev 00:1d.0 (regs=0xfea19020) > WARNING - Timeout at i8042_flush:71! > ebda moved from 9f000 to 9e800 > AHCI controller at 00:1f.2, iobase 0xfea17000, irq 5 > Found 0 lpt ports > Found 2 serial ports > XHCI no devices found > Searching bootorder for: /pci@i0cf8/usb@1d/hub@1/storage@1/*@0/*@0,0 > Searching bootorder for: /pci@i0cf8/usb@1d/hub@1/usb-*@1 > USB MSC vendor='Generic-' product='Multiple Reader' rev='1.11' type=0 > removable=1 > ehci_wait_td error - status=80e42 > Initialized USB HUB (0 ports used) > USB MSC blksize=512 sectors=30777344 > Initialized USB HUB (1 ports used) > All threads complete. > Scan for option roms > Running option rom at c000:0003 > Running option rom at c100:0003 > Searching bootorder for: /pci@i0cf8/pci-bridge@2,2/*@0 > Searching bootorder for: /pci@i0cf8/pci-bridge@2,2/*@0,1 > > Press ESC for boot menu. > > WARNING - Timeout at tis_wait_sts:160! > Searching bootorder for: HALT > drive 0x000f70c0: PCHS=0/0/0 translation=lba LCHS=1024/255/63 s=30777344 > Space available for UMB: c2000-efb00, f6960-f70c0 > Returned 184320 bytes of ZoneHigh > e820 map has 9 items: > 0: - 0009e800 = 1 RAM > 1: 0009e800 - 000a = 2 RESERVED > 2: 000f - 0010 = 2 RESERVED > 3: 0010 - 7efae000 = 1 RAM > 4: 7efae000 - 9000 = 2 RESERVED > 5: feb0 - feb1 = 2 RESERVED > 6: feb8 - fef0 = 2 RESERVED > 7: ff00 - 0001 = 2 RESERVED > 8: 0001 - 00028000 = 1 RAM > enter handle_19: > NULL > Booting from Hard Disk... > Booting from :7c00 > > -Hilbert > > This e-mail and its attachment may contain information that is confidential > or privileged, and are solely for the use of the individual to whom this > e-mail is addressed. If you are not the intended recipient or have received > it accidentally, please immediately notify the sender by reply e-mail and > destroy all copies of this email and its attachment. Please be advised that > any unauthorized use, disclosure, distribution or copying of this email or > its attachment is strictly prohibited. > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hi Werner, Thanks for your information. It works but still has same result. The result is like following. My usb stick is ext4fs formatted and has kernel and rootfs files. I wish SeaBIOS can give me a shell like Grub so that I can specify how to boot next. Or should I create a bootable usb stick? = PEIM FSP is Completed = Returned from FspNotify(EnumInitPhaseReadyToBoot) Jumping to boot code at 000ff06e(7eff6000) CPU0: stack: 00128000 - 00129000, lowest used address 00128b00, stack used: 1280 bytes entry= 0x000ff06e lb_start = 0x0010 lb_size = 0x0012d6d0 buffer = 0x7ed66000 SeaBIOS (version rel-1.10.2-0-g5f4c7b1) BUILD: gcc: (coreboot toolchain v1.44 March 3rd, 2017) 6.3.0 binutils: (GNU Binutils) 2.28 Found mainboard Intel Camelback Mountain CRB Relocating init from 0x000e3860 to 0x7ef74cc0 (size 49824) Found CBFS header at 0xffe00138 multiboot: eax=0, ebx=0 Found 25 PCI devices (max PCI bus is 05) Copying SMBIOS entry point from 0x7efc1000 to 0x000f7140 Copying ACPI RSDP from 0x7efd2000 to 0x000f7110 Using pmtimer, ioport 0x408 WARNING - Timeout at tis_wait_sts:160! WARNING - Timeout at tis_wait_sts:160! Scan for VGA option rom XHCI init on dev 00:14.0: regs @ 0xfea0, 21 ports, 32 slots, 32 byte contexts XHCIprotocol USB 2.00, 8 ports (offset 1), def 3001 XHCIprotocol USB 3.00, 6 ports (offset 16), def 1000 XHCIextcap 0xc1 @ 0xfea08040 XHCIextcap 0xc0 @ 0xfea08070 XHCIextcap 0x1 @ 0xfea0846c EHCI init on dev 00:1a.0 (regs=0xfea18020) EHCI init on dev 00:1d.0 (regs=0xfea19020) WARNING - Timeout at i8042_flush:71! ebda moved from 9f000 to 9e800 AHCI controller at 00:1f.2, iobase 0xfea17000, irq 5 Found 0 lpt ports Found 2 serial ports XHCI no devices found Searching bootorder for: /pci@i0cf8/usb@1d/hub@1/storage@1/*@0/*@0,0 Searching bootorder for: /pci@i0cf8/usb@1d/hub@1/usb-*@1 USB MSC vendor='Generic-' product='Multiple Reader' rev='1.11' type=0 removable=1 ehci_wait_td error - status=80e42 Initialized USB HUB (0 ports used) USB MSC blksize=512 sectors=30777344 Initialized USB HUB (1 ports used) All threads complete. Scan for option roms Running option rom at c000:0003 Running option rom at c100:0003 Searching bootorder for: /pci@i0cf8/pci-bridge@2,2/*@0 Searching bootorder for: /pci@i0cf8/pci-bridge@2,2/*@0,1 Press ESC for boot menu. WARNING - Timeout at tis_wait_sts:160! Searching bootorder for: HALT drive 0x000f70c0: PCHS=0/0/0 translation=lba LCHS=1024/255/63 s=30777344 Space available for UMB: c2000-efb00, f6960-f70c0 Returned 184320 bytes of ZoneHigh e820 map has 9 items: 0: - 0009e800 = 1 RAM 1: 0009e800 - 000a = 2 RESERVED 2: 000f - 0010 = 2 RESERVED 3: 0010 - 7efae000 = 1 RAM 4: 7efae000 - 9000 = 2 RESERVED 5: feb0 - feb1 = 2 RESERVED 6: feb8 - fef0 = 2 RESERVED 7: ff00 - 0001 = 2 RESERVED 8: 0001 - 00028000 = 1 RAM enter handle_19: NULL Booting from Hard Disk... Booting from :7c00 -Hilbert This e-mail and its attachment may contain information that is confidential or privileged, and are solely for the use of the individual to whom this e-mail is addressed. If you are not the intended recipient or have received it accidentally, please immediately notify the sender by reply e-mail and destroy all copies of this email and its attachment. Please be advised that any unauthorized use, disclosure, distribution or copying of this email or its attachment is strictly prohibited. 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hi Hilbert. > The SeaBIOS .config is always been reset when I recompile the coreboot. I am > trying to figure out how to avoid that. Just cd into the seabios-folder and make menuconfig. Save your config after modification. Now copy the resulting .config file somewhere (your coreboot directory for example). Now make menuconfig for coreboot and here, if you have selected SeaBIOS as payload, you can provide a .config file for SeaBIOS. Add the path to the saved .config file from SeaBIOS and you are good to go. Werner > -Ursprüngliche Nachricht- > Von: Hilbert Tu(杜睿哲_Pegatron) [mailto:hilbert...@pegatroncorp.com] > Gesendet: Donnerstag, 11. Januar 2018 04:32 > An: Zeh, Werner (DF MC MTS R HW 1); coreboot@coreboot.org > Cc: David Hendricks; Leo5 Huang(黃儀祥_Pegatron); Zoran Stojsavljevic > Betreff: RE: [coreboot] BDX-DE PCI init fail > > Hi Werner, > > The SeaBIOS .config is always been reset when I recompile the coreboot. I am > trying to figure out how to avoid that. > > Hi Zoran, > > I did not get grub2 prompt shell so I cannot do anything. I don't use UEFI or > Legacy. I just use grub2 as coreboot's payload and if there > is a shell prompt, then I can bring my linux kernel up. > > -Hilbert > > -Original Message- > From: Zeh, Werner [mailto:werner@siemens.com] > Sent: Wednesday, January 10, 2018 1:34 PM > To: Hilbert Tu(杜睿哲_Pegatron); coreboot@coreboot.org > Cc: David Hendricks; Leo5 Huang(黃儀祥_Pegatron); Zoran Stojsavljevic > Subject: AW: [coreboot] BDX-DE PCI init fail > > Hi Hilbert. > > It might be nothing but if I have a look at your last attached log I can't > see SeaBIOS finding any USB devices. There is just one Error > mentioned: > >ehci_wait_td error - status=80e42 > > So what is special with SeaBIOS and Broadwell-DE: you have to unset the > config switch called "CONFIG_MALLOC_UPPERMEMORY" > in SeaBIOS config. > With this option set SeaBIOS has issues with USB on Broadwell-DE. It might > help you, just check it and give it a try if not unset already. > > Werner > > > -Ursprüngliche Nachricht- > > Von: coreboot [mailto:coreboot-boun...@coreboot.org] Im Auftrag von > > Zoran Stojsavljevic > > Gesendet: Mittwoch, 10. Januar 2018 05:57 > > An: Hilbert Tu(杜睿哲_Pegatron) > > Cc: Werner Zeh; David Hendricks; coreboot@coreboot.org; Leo5 > > Huang(黃儀祥_Pegatron) > > Betreff: Re: [coreboot] BDX-DE PCI init fail > > > > > grub> > > > > Yup, you have reached the GRUB2 shell. I have no idea what the underlying > > system is yuo have done this? UEFI or Legacy? > > > > If UEFI, this USB will NOT work for Coreboot + SeaBIOS. If Legacy, then I > > have no idea why it does not work (it should)!? > > > > If UEFI, then you might reconsider https://rufus.akeo.ie/ (5 minutes job to > > create Legacy bootable USB): > > [1] Partition scheme MBR used on BIOS; [2] File System probably FAT32 > > (should work). > > > > Good Luck! > > Zoran > > ___ > > > > On Wed, Jan 10, 2018 at 2:49 AM, Hilbert Tu(杜睿哲_Pegatron) > > <hilbert...@pegatroncorp.com> wrote: > > > Hi Zoran, > > > > > > I have my USB stick formatted with ext4fs and I am pretty sure the image > > > inside is bootable. > > > What I mean to get a prompt shell is like following so that I can specify > > > my commands. > > > > > > grub> linux (usb0,1)/bzImage console=ttyS1,115200 console=tty1 > > > grub> root=/dev/ra > > > m ramdisk_size=102400 > > > grub> initrd > > > grub> (usb0,1)/core-image-minimal-initramfs-mohonpeak64.cpio.gz > > > grub> boot > > > > > > But right now it just hangs there and I am looking into GIPO > > > settings or maybe I have some wrong settings in ACPI table:( > > > > > > -Hilbert > > > > > > This e-mail and its attachment may contain information that is > > > confidential or privileged, and are solely for the use of the > > > individual to > > whom this e-mail is addressed. If you are not the intended recipient > > or have received it accidentally, please immediately notify the sender > > by reply e-mail and destroy all copies of this email and its attachment. > > Please be advised that any unauthorized use, disclosure, > distribution or copying of this email or its attachment is strictly > prohibited. > > > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆 > > > 郵件 > > > 通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 > > -- > > coreboot mailing list: coreboot@coreboot.org > > https://mail.coreboot.org/mailman/listinfo/coreboot -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hi Werner, The SeaBIOS .config is always been reset when I recompile the coreboot. I am trying to figure out how to avoid that. Hi Zoran, I did not get grub2 prompt shell so I cannot do anything. I don't use UEFI or Legacy. I just use grub2 as coreboot's payload and if there is a shell prompt, then I can bring my linux kernel up. -Hilbert -Original Message- From: Zeh, Werner [mailto:werner@siemens.com] Sent: Wednesday, January 10, 2018 1:34 PM To: Hilbert Tu(杜睿哲_Pegatron); coreboot@coreboot.org Cc: David Hendricks; Leo5 Huang(黃儀祥_Pegatron); Zoran Stojsavljevic Subject: AW: [coreboot] BDX-DE PCI init fail Hi Hilbert. It might be nothing but if I have a look at your last attached log I can't see SeaBIOS finding any USB devices. There is just one Error mentioned: >ehci_wait_td error - status=80e42 So what is special with SeaBIOS and Broadwell-DE: you have to unset the config switch called "CONFIG_MALLOC_UPPERMEMORY" in SeaBIOS config. With this option set SeaBIOS has issues with USB on Broadwell-DE. It might help you, just check it and give it a try if not unset already. Werner > -Ursprüngliche Nachricht- > Von: coreboot [mailto:coreboot-boun...@coreboot.org] Im Auftrag von Zoran > Stojsavljevic > Gesendet: Mittwoch, 10. Januar 2018 05:57 > An: Hilbert Tu(杜睿哲_Pegatron) > Cc: Werner Zeh; David Hendricks; coreboot@coreboot.org; Leo5 > Huang(黃儀祥_Pegatron) > Betreff: Re: [coreboot] BDX-DE PCI init fail > > > grub> > > Yup, you have reached the GRUB2 shell. I have no idea what the underlying > system is yuo have done this? UEFI or Legacy? > > If UEFI, this USB will NOT work for Coreboot + SeaBIOS. If Legacy, then I > have no idea why it does not work (it should)!? > > If UEFI, then you might reconsider https://rufus.akeo.ie/ (5 minutes job to > create Legacy bootable USB): > [1] Partition scheme MBR used on BIOS; > [2] File System probably FAT32 (should work). > > Good Luck! > Zoran > ___ > > On Wed, Jan 10, 2018 at 2:49 AM, Hilbert Tu(杜睿哲_Pegatron) > <hilbert...@pegatroncorp.com> wrote: > > Hi Zoran, > > > > I have my USB stick formatted with ext4fs and I am pretty sure the image > > inside is bootable. > > What I mean to get a prompt shell is like following so that I can specify > > my commands. > > > > grub> linux (usb0,1)/bzImage console=ttyS1,115200 console=tty1 > > grub> root=/dev/ra > > m ramdisk_size=102400 > > grub> initrd (usb0,1)/core-image-minimal-initramfs-mohonpeak64.cpio.gz > > grub> boot > > > > But right now it just hangs there and I am looking into GIPO settings > > or maybe I have some wrong settings in ACPI table:( > > > > -Hilbert > > > > This e-mail and its attachment may contain information that is confidential > > or privileged, and are solely for the use of the individual to > whom this e-mail is addressed. If you are not the intended recipient or have > received it accidentally, please immediately notify the > sender by reply e-mail and destroy all copies of this email and its > attachment. Please be advised that any unauthorized use, > disclosure, distribution or copying of this email or its attachment is > strictly prohibited. > > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件 > > 通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 > -- > coreboot mailing list: coreboot@coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hi Hilbert. It might be nothing but if I have a look at your last attached log I can't see SeaBIOS finding any USB devices. There is just one Error mentioned: >ehci_wait_td error - status=80e42 So what is special with SeaBIOS and Broadwell-DE: you have to unset the config switch called "CONFIG_MALLOC_UPPERMEMORY" in SeaBIOS config. With this option set SeaBIOS has issues with USB on Broadwell-DE. It might help you, just check it and give it a try if not unset already. Werner > -Ursprüngliche Nachricht- > Von: coreboot [mailto:coreboot-boun...@coreboot.org] Im Auftrag von Zoran > Stojsavljevic > Gesendet: Mittwoch, 10. Januar 2018 05:57 > An: Hilbert Tu(杜睿哲_Pegatron) > Cc: Werner Zeh; David Hendricks; coreboot@coreboot.org; Leo5 > Huang(黃儀祥_Pegatron) > Betreff: Re: [coreboot] BDX-DE PCI init fail > > > grub> > > Yup, you have reached the GRUB2 shell. I have no idea what the underlying > system is yuo have done this? UEFI or Legacy? > > If UEFI, this USB will NOT work for Coreboot + SeaBIOS. If Legacy, then I > have no idea why it does not work (it should)!? > > If UEFI, then you might reconsider https://rufus.akeo.ie/ (5 minutes job to > create Legacy bootable USB): > [1] Partition scheme MBR used on BIOS; > [2] File System probably FAT32 (should work). > > Good Luck! > Zoran > ___ > > On Wed, Jan 10, 2018 at 2:49 AM, Hilbert Tu(杜睿哲_Pegatron) > <hilbert...@pegatroncorp.com> wrote: > > Hi Zoran, > > > > I have my USB stick formatted with ext4fs and I am pretty sure the image > > inside is bootable. > > What I mean to get a prompt shell is like following so that I can specify > > my commands. > > > > grub> linux (usb0,1)/bzImage console=ttyS1,115200 console=tty1 > > grub> root=/dev/ra > > m ramdisk_size=102400 > > grub> initrd (usb0,1)/core-image-minimal-initramfs-mohonpeak64.cpio.gz > > grub> boot > > > > But right now it just hangs there and I am looking into GIPO settings > > or maybe I have some wrong settings in ACPI table:( > > > > -Hilbert > > > > This e-mail and its attachment may contain information that is confidential > > or privileged, and are solely for the use of the individual to > whom this e-mail is addressed. If you are not the intended recipient or have > received it accidentally, please immediately notify the > sender by reply e-mail and destroy all copies of this email and its > attachment. Please be advised that any unauthorized use, > disclosure, distribution or copying of this email or its attachment is > strictly prohibited. > > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件 > > 通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 > -- > coreboot mailing list: coreboot@coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
> grub> Yup, you have reached the GRUB2 shell. I have no idea what the underlying system is yuo have done this? UEFI or Legacy? If UEFI, this USB will NOT work for Coreboot + SeaBIOS. If Legacy, then I have no idea why it does not work (it should)!? If UEFI, then you might reconsider https://rufus.akeo.ie/ (5 minutes job to create Legacy bootable USB): [1] Partition scheme MBR used on BIOS; [2] File System probably FAT32 (should work). Good Luck! Zoran ___ On Wed, Jan 10, 2018 at 2:49 AM, Hilbert Tu(杜睿哲_Pegatron)wrote: > Hi Zoran, > > I have my USB stick formatted with ext4fs and I am pretty sure the image > inside is bootable. > What I mean to get a prompt shell is like following so that I can specify my > commands. > > grub> linux (usb0,1)/bzImage console=ttyS1,115200 console=tty1 root=/dev/ra > m ramdisk_size=102400 > grub> initrd (usb0,1)/core-image-minimal-initramfs-mohonpeak64.cpio.gz > grub> boot > > But right now it just hangs there and I am looking into GIPO settings or > maybe I have some wrong settings in ACPI table:( > > -Hilbert > > This e-mail and its attachment may contain information that is confidential > or privileged, and are solely for the use of the individual to whom this > e-mail is addressed. If you are not the intended recipient or have received > it accidentally, please immediately notify the sender by reply e-mail and > destroy all copies of this email and its attachment. Please be advised that > any unauthorized use, disclosure, distribution or copying of this email or > its attachment is strictly prohibited. > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hi Zoran, I have my USB stick formatted with ext4fs and I am pretty sure the image inside is bootable. What I mean to get a prompt shell is like following so that I can specify my commands. grub> linux (usb0,1)/bzImage console=ttyS1,115200 console=tty1 root=/dev/ra m ramdisk_size=102400 grub> initrd (usb0,1)/core-image-minimal-initramfs-mohonpeak64.cpio.gz grub> boot But right now it just hangs there and I am looking into GIPO settings or maybe I have some wrong settings in ACPI table:( -Hilbert This e-mail and its attachment may contain information that is confidential or privileged, and are solely for the use of the individual to whom this e-mail is addressed. If you are not the intended recipient or have received it accidentally, please immediately notify the sender by reply e-mail and destroy all copies of this email and its attachment. Please be advised that any unauthorized use, disclosure, distribution or copying of this email or its attachment is strictly prohibited. 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
> 1. There is a 8GB DDR4 memory in my system. YUP, it is clearly visible from e820. I do not know too much about setup parameters for DDRs, so it is hard for me to get the DDRX (X) from MRC logs you have attached at the beginning of this email thread. I assumed DDR3. > 2. I don't attach any HDD/SSD and I'll try to use Grub2 to access > my kernel through USB interface. But I wish I can get shell prompt > first before starting kernel. Suppose there should be a prompt for > Grub2 or SeaBIOS, doesn't it? It certainly does. It just depend how did you configure your Live Linux on your USB stick (should be MBR partition header, and probably USB stick should be formatted as ext4 or NTFS). Please, look here: https://rufus.akeo.ie/ . Please, note that on this figure: https://rufus.akeo.ie/pics/rufus_en.png partition scheme should be only MBR, and File System I use in legacy case is NOT FAT32, NTFS usually (maybe ext2 or ext4). Under these conditions, USB should show to you GRUB2 setup screen (my best guess). Zoran ___ On Tue, Jan 9, 2018 at 12:22 PM, Hilbert Tu(杜睿哲_Pegatron)wrote: > Hi Zoran, > > 1. There is a 8GB DDR4 memory in my system. > 2. I don't attach any HDD/SSD and I'll try to use Grub2 to access my kernel > through USB interface. But I wish I can get shell prompt first before > starting kernel. Suppose there should be a prompt for Grub2 or SeaBIOS, > doesn't it? > > -Hilbert > > This e-mail and its attachment may contain information that is confidential > or privileged, and are solely for the use of the individual to whom this > e-mail is addressed. If you are not the intended recipient or have received > it accidentally, please immediately notify the sender by reply e-mail and > destroy all copies of this email and its attachment. Please be advised that > any unauthorized use, disclosure, distribution or copying of this email or > its attachment is strictly prohibited. > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hi Zoran, 1. There is a 8GB DDR4 memory in my system. 2. I don't attach any HDD/SSD and I'll try to use Grub2 to access my kernel through USB interface. But I wish I can get shell prompt first before starting kernel. Suppose there should be a prompt for Grub2 or SeaBIOS, doesn't it? -Hilbert This e-mail and its attachment may contain information that is confidential or privileged, and are solely for the use of the individual to whom this e-mail is addressed. If you are not the intended recipient or have received it accidentally, please immediately notify the sender by reply e-mail and destroy all copies of this email and its attachment. Please be advised that any unauthorized use, disclosure, distribution or copying of this email or its attachment is strictly prohibited. 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hello Hilbert, I looked into the Coreboot logs (SeaBIOS ones, you have posted recently). My comments with: <<=== ___ ress ESC for boot menu. Searching bootorder for: HALT Space available for UMB: c2000-ee800, f6940-f70d0 Returned 192512 bytes of ZoneHigh e820 map has 9 items: <<=== Sounds very correct: you have in total 8GB of physical DDR3, aren't you? 0: - 0009fc00 = 1 RAM 1: 0009fc00 - 000a = 2 RESERVED 2: 000f - 0010 = 2 RESERVED 3: 0010 - 7efb = 1 RAM 4: 7efb - 9000 = 2 RESERVED 5: feb0 - feb1 = 2 RESERVED 6: feb8 - fef0 = 2 RESERVED 7: ff00 - 0001 = 2 RESERVED 8: 0001 - 00028000 = 1 RAM enter handle_19: NULL Booting from ROM... Booting from c000:0b91 enter handle_18: NULL Booting from ROM... Booting from c100:0b91 enter handle_18: NULL Booting from Floppy... Boot failed: could not read the boot disk enter handle_18: NULL Booting from Hard Disk... Boot failed: could not read the boot disk <<== This also sounds correct. enter handle_18: NULL No bootable device. Retrying in 60 seconds. Rebooting. In resume (status=0) In 32bit resume Attempting a hard reboot ACPI hard reset 1:cf9 (6) ___ I have no idea if yuo have there attached HDD/SSD drive? If you do, with GRUB2 + Linux (whatever Linux distro it is), it depends how the drive is configured? Either for UEFI (will NOT work), either for UEFI + MBR or MBR only - should work. You need to investigate what yuor attached drive is: cat, dog, or combination (UEFI, MBR, or MBR + UEFI)? Please, upgrade me with the info I requested (memory and drive)? Thank you, Zoran ___ On Fri, Jan 5, 2018 at 6:17 AM, Hilbert Tu(杜睿哲_Pegatron)wrote: > Hi David, > > > > After trying to use SeaBIOS as payload, I got more information about reboot > issue as attached file. While U-Boot just reboots directly and Grub hangs, > the SeaBIOS’s dump complains “No bootable device” at the end. Do you think > is it the cause of reboot? Can I say my U-Boot and Grub versions are not > supporting BDX-DE? > > > > -Hilbert > > This e-mail and its attachment may contain information that is confidential > or privileged, and are solely for the use of the individual to whom this > e-mail is addressed. If you are not the intended recipient or have received > it accidentally, please immediately notify the sender by reply e-mail and > destroy all copies of this email and its attachment. Please be advised that > any unauthorized use, disclosure, distribution or copying of this email or > its attachment is strictly prohibited. > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hello Hilbert, After work (somewhere around 19:00 PM CET), I'll look into your logs. Please, stay tuned. I am simply sold out, and have no time for anything else... I will have some advises for you, hopefully! Zoran ___ On Mon, Jan 8, 2018 at 11:57 AM, Hilbert Tu(杜睿哲_Pegatron)wrote: > Hi David, > > > > When I saw following message, I got different result when using different > payload for coreboot: > > == > > Returned from FspNotify(EnumInitPhaseReadyToBoot) > > Jumping to boot code at 000ff06e(7eff6000) > > CPU0: stack: 00129000 - 0012a000, lowest used address 00129b00, stack used: > 1280 bytes > > entry= 0x000ff06e > > lb_start = 0x0010 > > lb_size = 0x001302f0 > > buffer = 0x7ed6 > > === > > > > If U-Boot is used as payload, it just rebooted and restarted again. > > If Grub2 is used as payload, it just hung there. > > If SeaBios is used as payload, the result is like following attached file: > > http://mail.coreboot.org/pipermail/coreboot/attachments/20180105/209695a1/attachment.txt > > Do you have any idea about this? Is there any action I can do to clarify > what cause reboot? Thanks. > > > > -Hilbert > > > > This e-mail and its attachment may contain information that is confidential > or privileged, and are solely for the use of the individual to whom this > e-mail is addressed. If you are not the intended recipient or have received > it accidentally, please immediately notify the sender by reply e-mail and > destroy all copies of this email and its attachment. Please be advised that > any unauthorized use, disclosure, distribution or copying of this email or > its attachment is strictly prohibited. > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hi David, When I saw following message, I got different result when using different payload for coreboot: == Returned from FspNotify(EnumInitPhaseReadyToBoot) Jumping to boot code at 000ff06e(7eff6000) CPU0: stack: 00129000 - 0012a000, lowest used address 00129b00, stack used: 1280 bytes entry= 0x000ff06e lb_start = 0x0010 lb_size = 0x001302f0 buffer = 0x7ed6 === If U-Boot is used as payload, it just rebooted and restarted again. If Grub2 is used as payload, it just hung there. If SeaBios is used as payload, the result is like following attached file: http://mail.coreboot.org/pipermail/coreboot/attachments/20180105/209695a1/attachment.txt Do you have any idea about this? Is there any action I can do to clarify what cause reboot? Thanks. -Hilbert This e-mail and its attachment may contain information that is confidential or privileged, and are solely for the use of the individual to whom this e-mail is addressed. If you are not the intended recipient or have received it accidentally, please immediately notify the sender by reply e-mail and destroy all copies of this email and its attachment. Please be advised that any unauthorized use, disclosure, distribution or copying of this email or its attachment is strictly prohibited. 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hi David, After trying to use SeaBIOS as payload, I got more information about reboot issue as attached file. While U-Boot just reboots directly and Grub hangs, the SeaBIOS’s dump complains “No bootable device” at the end. Do you think is it the cause of reboot? Can I say my U-Boot and Grub versions are not supporting BDX-DE? -Hilbert This e-mail and its attachment may contain information that is confidential or privileged, and are solely for the use of the individual to whom this e-mail is addressed. If you are not the intended recipient or have received it accidentally, please immediately notify the sender by reply e-mail and destroy all copies of this email and its attachment. Please be advised that any unauthorized use, disclosure, distribution or copying of this email or its attachment is strictly prohibited. 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 = PEIM FSP is Completed = Returned from FspNotify(EnumInitPhaseReadyToBoot) Jumping to boot code at 000ff06e(7eff6000) CPU0: stack: 00129000 - 0012a000, lowest used address 00129b00, stack used: 1280 bytes entry= 0x000ff06e lb_start = 0x0010 lb_size = 0x001302f0 buffer = 0x7ed6 SeaBIOS (version rel-1.10.2-0-g5f4c7b1) BUILD: gcc: (coreboot toolchain v1.47 August 16th, 2017) 6.3.0 binutils: (GNU Binutils) 2.28 Found mainboard Intel Camelback Mountain CRB Relocating init from 0x000e3940 to 0x7ef74da0 (size 49600) Found CBFS header at 0xffe00138 multiboot: eax=0, ebx=0 Found 25 PCI devices (max PCI bus is 05) Copying SMBIOS entry point from 0x7efc1000 to 0x000f7120 Copying ACPI RSDP from 0x7efd2000 to 0x000f70f0 Using pmtimer, ioport 0x408 Scan for VGA option rom XHCI init on dev 00:14.0: regs @ 0xfea0, 21 ports, 32 slots, 32 byte contexts XHCIprotocol USB 2.00, 8 ports (offset 1), def 3001 XHCIprotocol USB 3.00, 6 ports (offset 16), def 1000 XHCIextcap 0xc1 @ 0xfea08040 XHCIextcap 0xc0 @ 0xfea08070 XHCIextcap 0x1 @ 0xfea0846c EHCI init on dev 00:1a.0 (regs=0xfea18020) EHCI init on dev 00:1d.0 (regs=0xfea19020) WARNING - Timeout at i8042_flush:71! AHCI controller at 00:1f.2, iobase 0xfea17000, irq 0 Found 0 lpt ports Found 2 serial ports XHCI no devices found ehci_wait_td error - status=80e42 Initialized USB HUB (0 ports used) Initialized USB HUB (0 ports used) All threads complete. Scan for option roms Running option rom at c000:0003 Running option rom at c100:0003 Searching bootorder for: /pci@i0cf8/pci-bridge@2,2/*@0 Searching bootorder for: /pci@i0cf8/pci-bridge@2,2/*@0,1 Press ESC for boot menu. Searching bootorder for: HALT Space available for UMB: c2000-ee800, f6940-f70d0 Returned 192512 bytes of ZoneHigh e820 map has 9 items: 0: - 0009fc00 = 1 RAM 1: 0009fc00 - 000a = 2 RESERVED 2: 000f - 0010 = 2 RESERVED 3: 0010 - 7efb = 1 RAM 4: 7efb - 9000 = 2 RESERVED 5: feb0 - feb1 = 2 RESERVED 6: feb8 - fef0 = 2 RESERVED 7: ff00 - 0001 = 2 RESERVED 8: 0001 - 00028000 = 1 RAM enter handle_19: NULL Booting from ROM... Booting from c000:0b91 enter handle_18: NULL Booting from ROM... Booting from c100:0b91 enter handle_18: NULL Booting from Floppy... Boot failed: could not read the boot disk enter handle_18: NULL Booting from Hard Disk... Boot failed: could not read the boot disk enter handle_18: NULL No bootable device. Retrying in 60 seconds. Rebooting. In resume (status=0) In 32bit resume Attempting a hard reboot ACPI hard reset 1:cf9 (6)-- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hi Hilbert, For what it's worth, I was able to boot Linux as the payload without any obvious problems. It might be good to try other payloads, or see if you can enable serial console earlier in u-boot to find exactly where it reboots. Here is my CPUID and microcode info printed by coreboot during ramstage: microcode: sig=0x50664 pf=0x10 revision=0xf0c CPUID: 00050664 Cores: 32 Stepping: Y0 Revision ID: 05 So it appears I am using the production CPU and microcode that Zoran suggested. To obtain this, I downloaded SRV_P_203.exe from Intel's website and converted M1050664_0F0C.TXT into a C-style header that can be included by coreboot's build system. On Thu, Jan 4, 2018 at 3:19 AM, Hilbert Tu(杜睿哲_Pegatron) < hilbert...@pegatroncorp.com> wrote: > Hi Zoran, > > About this issue, I decide to follow David's suggestion to comment out the > SMBus clock gating and then it can continue booting until load my U-Boot > payload. But then it enters infinite reboot as previous attached log > "smbus_init_fail_max_dump2.txt". I am not sure if is a side effect or > just a new issue. Do you have any recommendation about the reboot? By the > way, we have our own BDX-DE board, not Camelback CRB. But just use similar > configuration. Thanks. > > -Hilbert > This e-mail and its attachment may contain information that is > confidential or privileged, and are solely for the use of the individual to > whom this e-mail is addressed. If you are not the intended recipient or > have received it accidentally, please immediately notify the sender by > reply e-mail and destroy all copies of this email and its attachment. > Please be advised that any unauthorized use, disclosure, distribution or > copying of this email or its attachment is strictly prohibited. > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件, > 請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 > -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
> ... I am not sure if is a side effect or just a new issue. Do you have any > recommendation about the reboot? [1] The complete boot log is beneficial as far as you have progressed... Isn't it? But you can also try SeaBIOS as payload (let go with simple ones), and see how far you'll go with it? [2] Would be nice to try all of this on your own proprietary board (I hope you have there CPUID 0x50664), and see how it goes (with logs, as well)?! Bis Heute Abend, oder Morgen, Zoran ___ On Thu, Jan 4, 2018 at 12:19 PM, Hilbert Tu(杜睿哲_Pegatron)wrote: > Hi Zoran, > > About this issue, I decide to follow David's suggestion to comment out the > SMBus clock gating and then it can continue booting until load my U-Boot > payload. But then it enters infinite reboot as previous attached log > "smbus_init_fail_max_dump2.txt". I am not sure if is a side effect or just a > new issue. Do you have any recommendation about the reboot? By the way, we > have our own BDX-DE board, not Camelback CRB. But just use similar > configuration. Thanks. > > -Hilbert > This e-mail and its attachment may contain information that is confidential > or privileged, and are solely for the use of the individual to whom this > e-mail is addressed. If you are not the intended recipient or have received > it accidentally, please immediately notify the sender by reply e-mail and > destroy all copies of this email and its attachment. Please be advised that > any unauthorized use, disclosure, distribution or copying of this email or > its attachment is strictly prohibited. > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hi Zoran, About this issue, I decide to follow David's suggestion to comment out the SMBus clock gating and then it can continue booting until load my U-Boot payload. But then it enters infinite reboot as previous attached log "smbus_init_fail_max_dump2.txt". I am not sure if is a side effect or just a new issue. Do you have any recommendation about the reboot? By the way, we have our own BDX-DE board, not Camelback CRB. But just use similar configuration. Thanks. -Hilbert This e-mail and its attachment may contain information that is confidential or privileged, and are solely for the use of the individual to whom this e-mail is addressed. If you are not the intended recipient or have received it accidentally, please immediately notify the sender by reply e-mail and destroy all copies of this email and its attachment. Please be advised that any unauthorized use, disclosure, distribution or copying of this email or its attachment is strictly prohibited. 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
YES, U R correct. BDX-DE supoosed to be SoC, as I now recall. It was once upon a time/a long time back, about 2.5 to 3 years ago I played with this stuff. You supposed NOT to use anything beneath 0x50663 (forget 0x50661/2). I have no idea why you are using PPR 0x50663, the production part (PR) is actually 0x50664. My best guess, you are using some CRB (CamelBack Mountain CRB?!) as given, with FSP v 1.0. And I recall, this should work... Out of box, although I never tried it with FSP. I tried it with the internal AMI/INTEL UEFI and Fedora 23, IIRC?! I tried 0x50661 and 0x50662, but also with internal AMI/INTEL UEFI. Werner (if he recalls the stuff, since Werner most certainly played with FSP on CamelBack Mountain CRB) can help... If?! Zoran On Thu, Jan 4, 2018 at 10:06 AM, Hilbert Tu(杜睿哲_Pegatron)wrote: > Hi Zoran, > > I don't understand. We don't have extra MCU and, from following message, we > also have correct microcode. Why you mean we should have " PPR 0x50663 PPR > PCH "? My understanding is they are in/just the same chip...Please help to > clarify. Thanks. > >>>microcode: sig=0x50663 pf=0x10 revision=0x70e >>><<=== >>>CPUID: 00050663 > > -Hilbert > This e-mail and its attachment may contain information that is confidential > or privileged, and are solely for the use of the individual to whom this > e-mail is addressed. If you are not the intended recipient or have received > it accidentally, please immediately notify the sender by reply e-mail and > destroy all copies of this email and its attachment. Please be advised that > any unauthorized use, disclosure, distribution or copying of this email or > its attachment is strictly prohibited. > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hi Zoran, I don't understand. We don't have extra MCU and, from following message, we also have correct microcode. Why you mean we should have " PPR 0x50663 PPR PCH "? My understanding is they are in/just the same chip...Please help to clarify. Thanks. >>microcode: sig=0x50663 pf=0x10 revision=0x70e >><<=== >>CPUID: 00050663 -Hilbert This e-mail and its attachment may contain information that is confidential or privileged, and are solely for the use of the individual to whom this e-mail is addressed. If you are not the intended recipient or have received it accidentally, please immediately notify the sender by reply e-mail and destroy all copies of this email and its attachment. Please be advised that any unauthorized use, disclosure, distribution or copying of this email or its attachment is strictly prohibited. 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hello Hilbert, I have glanced through your full log. It does not tell me direct failure, I see that you are stuck with PCIe 00:1F.3 . But it does tell me much more than your initial log. Mainly, the first part (good 70%) is MRC algorithm executed in the ROM stage. At the end of the romstage the early PCH init takes place. And, also interesting thing is that DMI links use beneath QPI links, in nutshell seems that DMI links are initially initialized as QPI links, then changed to DMI protocol?! Then you get to the RAM stage, where an interesting function (enumerating PCIe buses on PCH) gets executed (forgot the name, NotifyPeim-blah... Or similar, it gets called twice): The interesting part is marked with << : coreboot-coreboot-unknown Wed Jan 3 06:02:08 UTC 2018 ramstage starting... Moving GDT to 7effe9e0...ok BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0 CBFS: 'Master Header Locator' located CBFS at [100:1fffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset 3c80 size 5400 microcode: sig=0x50663 pf=0x10 revision=0x70e <<=== CPUID: 00050663 Cores: 2 Stepping: V2 Revision ID: 05 msr(17) = 0010 msr(ce) = 20080833f2810c00 BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 29408 exit 0 Enumerating buses... Please, read the following Coreboot thread: https://mail.coreboot.org/pipermail/coreboot/2016-July/081645.html You'll see there that there are four (4) CPUIDs for BDX-DE: 0x50661, 0x50662, 0x50663 and 0x50664! I know that 0x50663 is PPR (Pre PR), whilst 0x50664 is PR (Production Release). For 0x50661/2 the story is much more complicated, you do not want to know that/you do not need to know that. What you should be aware of is the MCU. If you use wrong MCU with the wrong sku, then it'll exibit the similar "features" you have discovered. In other words you have to track for 0x50663 the proper MCUs, and you also might change the sku (to use PR 0x50664, and proper MCUs for it). And one more (VERY important) thing: you should use for PPR 0x50663 PPR PCH, and for PR 0x50664 PR PCH. Mixtures would not work! Good Luck! Zoran ___ On Thu, Jan 4, 2018 at 5:37 AM, Hilbert Tu(杜睿哲_Pegatron) <hilbert...@pegatroncorp.com> wrote: > Hi David, > > > > Yes, actually I have same try like you to comment out the SMBus clock > gating. But the result is it started to reboot again after jumping to boot > code as attached. I use U-Boot as payload. If grub was used, it just hanged > there. Did you have same condition before? Thanks. > > > > -Hilbert > > > > From: David Hendricks [mailto:david.hendri...@gmail.com] > Sent: Thursday, January 04, 2018 7:56 AM > To: Hilbert Tu(杜睿哲_Pegatron) > Cc: Zoran Stojsavljevic; coreboot@coreboot.org > Subject: Re: [coreboot] BDX-DE PCI init fail > > > > Hi Hilbert, > > > > On Wed, Jan 3, 2018 at 12:56 AM, Hilbert Tu(杜睿哲_Pegatron) > <hilbert...@pegatroncorp.com> wrote: > > Hi Zoran, > > I have changed to maximal log level and found SMBus init was failed when > enabling clock gating. Do you have any comments about this? Thanks. > > > > Yes, looking back at my notes from earlier that is also how I got past the > issue - by commenting out the following lines in > src/soc/intel/fsp_broadwell_de/smbus.c: > /* Enable clock gating */ >reg32 =read32(rcba + 0x341c); >reg32 |= (1 << 5); >write32(rcba + 0x341c, reg32); > > I suspected that reading the register is where it hung, however I did not > have a chance to root cause the issue or try to enable clock gating > elsewhere. The system worked without clock gating enabled, though. > > > > I also tested another Broadwell-DE device that did not require the same > hack, but it used different memory and a different processor stepping > (stepping 3 instead of stepping 4) which may have made a difference. > > > > This e-mail and its attachment may contain information that is confidential > or privileged, and are solely for the use of the individual to whom this > e-mail is addressed. If you are not the intended recipient or have received > it accidentally, please immediately notify the sender by reply e-mail and > destroy all copies of this email and its attachment. Please be advised that > any unauthorized use, disclosure, distribution or copying of this email or > its attachment is strictly prohibited. > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hi Hilbert, On Wed, Jan 3, 2018 at 12:56 AM, Hilbert Tu(杜睿哲_Pegatron) < hilbert...@pegatroncorp.com> wrote: > Hi Zoran, > > I have changed to maximal log level and found SMBus init was failed when > enabling clock gating. Do you have any comments about this? Thanks. > Yes, looking back at my notes from earlier that is also how I got past the issue - by commenting out the following lines in src/soc/intel/fsp_broadwell_de/smbus.c: /* Enable clock gating */ reg32 =read32(rcba + 0x341c); reg32 |= (1 << 5); write32(rcba + 0x341c, reg32); I suspected that reading the register is where it hung, however I did not have a chance to root cause the issue or try to enable clock gating elsewhere. The system worked without clock gating enabled, though. I also tested another Broadwell-DE device that did not require the same hack, but it used different memory and a different processor stepping (stepping 3 instead of stepping 4) which may have made a difference. -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hi Zoran, The log was just at following link: http://mail.coreboot.org/pipermail/coreboot/attachments/20171227/b07eb74e/attachment.txt With messages: MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled By the way, I have tried to use U-Boot and Grub2 as payload, but I don't think the payload was executed since it failed at PCI 00:1f.3 init. -Hilbert -Original Message- From: Zoran Stojsavljevic [mailto:zoran.stojsavlje...@gmail.com] Sent: Saturday, December 30, 2017 2:32 PM To: Hilbert Tu(杜睿哲_Pegatron) Cc: David Hendricks; coreboot@coreboot.org Subject: Re: [coreboot] BDX-DE PCI init fail > I still have same issue even tried to comment out the 1f.3 device in > ./src/mainboard/intel/camel- backmountain_fsp/devicetree.cb then > rebuild coreboot. You wrote that you submitted the log. Is this the full log? I doubt. I do NOT see physical memory layout as well as MTRR layout. Could you, please, submit the full/complete log? Which payload are you using? SeaBIOS? Thank you, Zoran On Fri, Dec 29, 2017 at 5:58 AM, Hilbert Tu(杜睿哲_Pegatron) <hilbert...@pegatroncorp.com> wrote: > Hi David, > > > > Thanks for your information. > > I still have same issue even tried to comment out the 1f.3 device in > ./src/mainboard/intel/camelbackmountain_fsp/devicetree.cb then rebuild > coreboot. > > Could you let me know how to do that? > > > > -Hilbert > > > > From: David Hendricks [mailto:david.hendri...@gmail.com] > Sent: Friday, December 29, 2017 9:46 AM > To: Hilbert Tu(杜睿哲_Pegatron) > Cc: coreboot@coreboot.org > Subject: Re: [coreboot] BDX-DE PCI init fail > > > > Hi Hilbert, > > Have you had any luck? I have a board with a similar problem. > Commenting out the entry for device 1f.3 in devicetree.cb seemed to > help (I copied src/mainboard/intel/camelbackmountain_fsp for my project). > > > > On Wed, Dec 27, 2017 at 2:17 AM, Hilbert Tu(杜睿哲_Pegatron) > <hilbert...@pegatroncorp.com> wrote: > > Hi, > > > > I am porting coreboot on Intel BDX-DE platform and it gets stuck when > init PCI 00:1f.3. This device should be SMBus, serial management bus. > But I don’t know why this happened. Does anyone can give me some hint? > Attached is my boot up log. Thanks in advance. > > > > -Hilbert > > This e-mail and its attachment may contain information that is > confidential or privileged, and are solely for the use of the > individual to whom this e-mail is addressed. If you are not the > intended recipient or have received it accidentally, please > immediately notify the sender by reply e-mail and destroy all copies > of this email and its attachment. Please be advised that any > unauthorized use, disclosure, distribution or copying of this email or its > attachment is strictly prohibited. > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件 > 通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 > > > -- > coreboot mailing list: coreboot@coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot > > > > > -- > coreboot mailing list: coreboot@coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot This e-mail and its attachment may contain information that is confidential or privileged, and are solely for the use of the individual to whom this e-mail is addressed. If you are not the intended recipient or have received it accidentally, please immediately notify the sender by reply e-mail and destroy all copies of this email and its attachment. Please be advised that any unauthorized use, disclosure, distribution or copying of this email or its attachment is strictly prohibited. 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hello Hilbert, I am currently at job, so I do not have any time to look into it/into your maximal log, enabled now. Somebody from Google folks assigned to Coreboot might want to chime in. :-) I will look to your log later tonite. Thank you, Zoran On Wed, Jan 3, 2018 at 9:56 AM, Hilbert Tu(杜睿哲_Pegatron) <hilbert...@pegatroncorp.com> wrote: > Hi Zoran, > > I have changed to maximal log level and found SMBus init was failed when > enabling clock gating. Do you have any comments about this? Thanks. > > -Hilbert > > -Original Message- > From: Hilbert Tu(杜睿哲_Pegatron) > Sent: Tuesday, January 02, 2018 9:41 AM > To: 'Zoran Stojsavljevic' > Cc: David Hendricks; coreboot@coreboot.org > Subject: Re: [coreboot] BDX-DE PCI init fail > > Hi Zoran, > > The log was just at following link: > http://mail.coreboot.org/pipermail/coreboot/attachments/20171227/b07eb74e/attachment.txt > With messages: > > MTRR check > Fixed MTRRs : Enabled > Variable MTRRs: Enabled > > By the way, I have tried to use U-Boot and Grub2 as payload, but I don't > think the payload was executed since it failed at PCI 00:1f.3 init. > > -Hilbert > > -Original Message- > From: Zoran Stojsavljevic [mailto:zoran.stojsavlje...@gmail.com] > Sent: Saturday, December 30, 2017 2:32 PM > To: Hilbert Tu(杜睿哲_Pegatron) > Cc: David Hendricks; coreboot@coreboot.org > Subject: Re: [coreboot] BDX-DE PCI init fail > >> I still have same issue even tried to comment out the 1f.3 device in >> ./src/mainboard/intel/camel- backmountain_fsp/devicetree.cb then >> rebuild coreboot. > > You wrote that you submitted the log. Is this the full log? I doubt. I do NOT > see physical memory layout as well as MTRR layout. > > Could you, please, submit the full/complete log? > > Which payload are you using? SeaBIOS? > > Thank you, > Zoran > > On Fri, Dec 29, 2017 at 5:58 AM, Hilbert Tu(杜睿哲_Pegatron) > <hilbert...@pegatroncorp.com> wrote: >> Hi David, >> >> >> >> Thanks for your information. >> >> I still have same issue even tried to comment out the 1f.3 device in >> ./src/mainboard/intel/camelbackmountain_fsp/devicetree.cb then rebuild >> coreboot. >> >> Could you let me know how to do that? >> >> >> >> -Hilbert >> >> >> >> From: David Hendricks [mailto:david.hendri...@gmail.com] >> Sent: Friday, December 29, 2017 9:46 AM >> To: Hilbert Tu(杜睿哲_Pegatron) >> Cc: coreboot@coreboot.org >> Subject: Re: [coreboot] BDX-DE PCI init fail >> >> >> >> Hi Hilbert, >> >> Have you had any luck? I have a board with a similar problem. >> Commenting out the entry for device 1f.3 in devicetree.cb seemed to >> help (I copied src/mainboard/intel/camelbackmountain_fsp for my project). >> >> >> >> On Wed, Dec 27, 2017 at 2:17 AM, Hilbert Tu(杜睿哲_Pegatron) >> <hilbert...@pegatroncorp.com> wrote: >> >> Hi, >> >> >> >> I am porting coreboot on Intel BDX-DE platform and it gets stuck when >> init PCI 00:1f.3. This device should be SMBus, serial management bus. >> But I don’t know why this happened. Does anyone can give me some hint? >> Attached is my boot up log. Thanks in advance. >> >> >> >> -Hilbert >> >> This e-mail and its attachment may contain information that is >> confidential or privileged, and are solely for the use of the >> individual to whom this e-mail is addressed. If you are not the >> intended recipient or have received it accidentally, please >> immediately notify the sender by reply e-mail and destroy all copies >> of this email and its attachment. Please be advised that any >> unauthorized use, disclosure, distribution or copying of this email or its >> attachment is strictly prohibited. >> 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件 >> 通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 >> >> >> -- >> coreboot mailing list: coreboot@coreboot.org >> https://mail.coreboot.org/mailman/listinfo/coreboot >> >> >> >> >> -- >> coreboot mailing list: coreboot@coreboot.org >> https://mail.coreboot.org/mailman/listinfo/coreboot > This e-mail and its attachment may contain information that is confidential > or privileged, and are solely for the use of the individual to whom this > e-mail is addressed. If you are not the intended recipient or have received > it accidentally, please immediately notify the sender by reply e-mail and > destroy all copies of this email and its attachment. Please be advised that > any unauthorized use, disclosure, distribution or copying of this email or > its attachment is strictly prohibited. > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
> I still have same issue even tried to comment out > the 1f.3 device in ./src/mainboard/intel/camel- > backmountain_fsp/devicetree.cb then rebuild coreboot. You wrote that you submitted the log. Is this the full log? I doubt. I do NOT see physical memory layout as well as MTRR layout. Could you, please, submit the full/complete log? Which payload are you using? SeaBIOS? Thank you, Zoran On Fri, Dec 29, 2017 at 5:58 AM, Hilbert Tu(杜睿哲_Pegatron) <hilbert...@pegatroncorp.com> wrote: > Hi David, > > > > Thanks for your information. > > I still have same issue even tried to comment out the 1f.3 device in > ./src/mainboard/intel/camelbackmountain_fsp/devicetree.cb then rebuild > coreboot. > > Could you let me know how to do that? > > > > -Hilbert > > > > From: David Hendricks [mailto:david.hendri...@gmail.com] > Sent: Friday, December 29, 2017 9:46 AM > To: Hilbert Tu(杜睿哲_Pegatron) > Cc: coreboot@coreboot.org > Subject: Re: [coreboot] BDX-DE PCI init fail > > > > Hi Hilbert, > > Have you had any luck? I have a board with a similar problem. Commenting out > the entry for device 1f.3 in devicetree.cb seemed to help (I copied > src/mainboard/intel/camelbackmountain_fsp for my project). > > > > On Wed, Dec 27, 2017 at 2:17 AM, Hilbert Tu(杜睿哲_Pegatron) > <hilbert...@pegatroncorp.com> wrote: > > Hi, > > > > I am porting coreboot on Intel BDX-DE platform and it gets stuck when init > PCI 00:1f.3. This device should be SMBus, serial management bus. But I don’t > know why this happened. Does anyone can give me some hint? Attached is my > boot up log. Thanks in advance. > > > > -Hilbert > > This e-mail and its attachment may contain information that is confidential > or privileged, and are solely for the use of the individual to whom this > e-mail is addressed. If you are not the intended recipient or have received > it accidentally, please immediately notify the sender by reply e-mail and > destroy all copies of this email and its attachment. Please be advised that > any unauthorized use, disclosure, distribution or copying of this email or > its attachment is strictly prohibited. > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 > > > -- > coreboot mailing list: coreboot@coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot > > > > > -- > coreboot mailing list: coreboot@coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hi David, Thanks for your information. I still have same issue even tried to comment out the 1f.3 device in ./src/mainboard/intel/camelbackmountain_fsp/devicetree.cb then rebuild coreboot. Could you let me know how to do that? -Hilbert From: David Hendricks [mailto:david.hendri...@gmail.com] Sent: Friday, December 29, 2017 9:46 AM To: Hilbert Tu(杜睿哲_Pegatron) Cc: coreboot@coreboot.org Subject: Re: [coreboot] BDX-DE PCI init fail Hi Hilbert, Have you had any luck? I have a board with a similar problem. Commenting out the entry for device 1f.3 in devicetree.cb seemed to help (I copied src/mainboard/intel/camelbackmountain_fsp for my project). On Wed, Dec 27, 2017 at 2:17 AM, Hilbert Tu(杜睿哲_Pegatron) <hilbert...@pegatroncorp.com<mailto:hilbert...@pegatroncorp.com>> wrote: Hi, I am porting coreboot on Intel BDX-DE platform and it gets stuck when init PCI 00:1f.3. This device should be SMBus, serial management bus. But I don’t know why this happened. Does anyone can give me some hint? Attached is my boot up log. Thanks in advance. -Hilbert This e-mail and its attachment may contain information that is confidential or privileged, and are solely for the use of the individual to whom this e-mail is addressed. If you are not the intended recipient or have received it accidentally, please immediately notify the sender by reply e-mail and destroy all copies of this email and its attachment. Please be advised that any unauthorized use, disclosure, distribution or copying of this email or its attachment is strictly prohibited. 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 -- coreboot mailing list: coreboot@coreboot.org<mailto:coreboot@coreboot.org> https://mail.coreboot.org/mailman/listinfo/coreboot -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] BDX-DE PCI init fail
Hi Hilbert, Have you had any luck? I have a board with a similar problem. Commenting out the entry for device 1f.3 in devicetree.cb seemed to help (I copied src/mainboard/intel/camelbackmountain_fsp for my project). On Wed, Dec 27, 2017 at 2:17 AM, Hilbert Tu(杜睿哲_Pegatron) < hilbert...@pegatroncorp.com> wrote: > Hi, > > > > I am porting coreboot on Intel BDX-DE platform and it gets stuck when init > PCI 00:1f.3. This device should be SMBus, serial management bus. But I > don’t know why this happened. Does anyone can give me some hint? Attached > is my boot up log. Thanks in advance. > > > > -Hilbert > This e-mail and its attachment may contain information that is > confidential or privileged, and are solely for the use of the individual to > whom this e-mail is addressed. If you are not the intended recipient or > have received it accidentally, please immediately notify the sender by > reply e-mail and destroy all copies of this email and its attachment. > Please be advised that any unauthorized use, disclosure, distribution or > copying of this email or its attachment is strictly prohibited. > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊,僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子 > 郵件,請立即回覆郵件通知寄件人,並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為,皆嚴格禁止。 > > -- > coreboot mailing list: coreboot@coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot > -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot