[PATCH] davinci: Correct the number of GPIO pins for da850/omap-l138

2009-08-11 Thread Sudhakar Rajashekhara
DA850/OMAP-L138 has 144 pins configurable as GPIO, but
currently this has been configured as 128. This patch
corrects it.

Also, this patch adds the base address for GPIO pins
greater than 128.

Signed-off-by: Sudhakar Rajashekhara sudhakar@ti.com
---
 arch/arm/mach-davinci/da850.c |2 +-
 arch/arm/mach-davinci/include/mach/gpio.h |2 ++
 arch/arm/mach-davinci/include/mach/irqs.h |4 ++--
 3 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 22205a3..c5efc51 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -623,7 +623,7 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
.intc_irq_num   = DA850_N_CP_INTC_IRQ,
.timer_info = da850_timer_info,
.gpio_base  = IO_ADDRESS(DA8XX_GPIO_BASE),
-   .gpio_num   = 128,
+   .gpio_num   = 144,
.gpio_irq   = IRQ_DA8XX_GPIO0,
.serial_dev = da8xx_serial_device,
.emac_pdata = da8xx_emac_pdata,
diff --git a/arch/arm/mach-davinci/include/mach/gpio.h 
b/arch/arm/mach-davinci/include/mach/gpio.h
index ebcc29b..4f032b3 100644
--- a/arch/arm/mach-davinci/include/mach/gpio.h
+++ b/arch/arm/mach-davinci/include/mach/gpio.h
@@ -78,6 +78,8 @@ __gpio_to_controller(unsigned gpio)
ptr = base + 0x60;
else if (gpio  32 * 4)
ptr = base + 0x88;
+   else if (gpio  32 * 5)
+   ptr = base + 0xb0;
else
ptr = NULL;
return ptr;
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h 
b/arch/arm/mach-davinci/include/mach/irqs.h
index 6047c2d..7f755cc 100644
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/include/mach/irqs.h
@@ -397,8 +397,8 @@
 
 #define DA850_N_CP_INTC_IRQ101
 
-/* da830/da850 currently has the most gpio pins (128) */
-#define DAVINCI_N_GPIO 128
+/* da850 currently has the most gpio pins (144) */
+#define DAVINCI_N_GPIO 144
 /* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */
 #define NR_IRQS(DA850_N_CP_INTC_IRQ + 
DAVINCI_N_GPIO)
 
-- 
1.5.6

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SoC analyzer installation setup required

2009-08-11 Thread Ayeesha_Begum

Hi,

Could you please send me SoC Analyzer (dvt.exe) ?

Thanks  Regards,
Ayeesha


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[PATCH v2 1/2] ASoC: DaVinci: McASP driver enhacements

2009-08-11 Thread Chaithrika U S
On DA830/OMAP-L137 and DA850/OMAP-L138 SoCs, the McASP peripheral has FIFO
support. This FIFO provides additional data buffering. It also provides
tolerance to variation in host/DMA controller response times.
The read and write FIFO sizes are 256 bytes each. If FIFO is enabled,
the DMA events from McASP are sent to the FIFO which in turn sends DMA requests
to the host CPU according to the thresholds programmed.
More details of the FIFO operation can be found at
http://focus.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=
sprufm1fileType=pdf

This patch adds support for FIFO configuration. The platform data has a
version field which differentiates the McASP on different SoCs.

Signed-off-by: Chaithrika U S chaithr...@ti.com
---
In this version of the patch, the davinci-i2s driver changes have been done
to account acnt member introduced in the dma_params structure. Also, the DAI
format addition has been removed from this patch.

Applies to ALSA GIT tree on branch topic/asoc at
http://git.kernel.org/?p=linux/kernel/git/tiwai/sound-2.6.git;a=shortlog;
h=topic/asoc

 sound/soc/davinci/davinci-i2s.c   |1 +
 sound/soc/davinci/davinci-mcasp.c |  105 ++---
 sound/soc/davinci/davinci-mcasp.h |5 ++
 sound/soc/davinci/davinci-pcm.c   |4 +-
 sound/soc/davinci/davinci-pcm.h   |1 +
 5 files changed, 107 insertions(+), 9 deletions(-)

diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc/davinci/davinci-i2s.c
index 2a56fb7..12a6c54 100644
--- a/sound/soc/davinci/davinci-i2s.c
+++ b/sound/soc/davinci/davinci-i2s.c
@@ -406,6 +406,7 @@ static int davinci_i2s_hw_params(struct snd_pcm_substream 
*substream,
return -EINVAL;
}
 
+   dma_params-acnt  = dma_params-data_type;
rcr |= DAVINCI_MCBSP_RCR_RFRLEN1(1);
xcr |= DAVINCI_MCBSP_XCR_XFRLEN1(1);
 
diff --git a/sound/soc/davinci/davinci-mcasp.c 
b/sound/soc/davinci/davinci-mcasp.c
index f0c0347..e672f43 100644
--- a/sound/soc/davinci/davinci-mcasp.c
+++ b/sound/soc/davinci/davinci-mcasp.c
@@ -102,6 +102,11 @@
 /* Receive Buffer for Serializer n */
 #define DAVINCI_MCASP_RXBUF_REG0x280
 
+/* McASP FIFO Registers */
+#define DAVINCI_MCASP_WFIFOCTL (0x1010)
+#define DAVINCI_MCASP_WFIFOSTS (0x1014)
+#define DAVINCI_MCASP_RFIFOCTL (0x1018)
+#define DAVINCI_MCASP_RFIFOSTS (0x101C)
 
 /*
  * DAVINCI_MCASP_PWREMUMGT_REG - Power Down and Emulation Management
@@ -276,6 +281,13 @@
  */
 #define TXDATADMADIS   BIT(0)
 
+/*
+ * DAVINCI_MCASP_W[R]FIFOCTL - Write/Read FIFO Control Register bits
+ */
+#define FIFO_ENABLEBIT(16)
+#define NUMEVT_MASK(0xFF  8)
+#define NUMDMA_MASK(0xFF)
+
 #define DAVINCI_MCASP_NUM_SERIALIZER   16
 
 static inline void mcasp_set_bits(void __iomem *reg, u32 val)
@@ -345,6 +357,9 @@ static void mcasp_start_rx(struct davinci_audio_dev *dev)
 
 static void mcasp_start_tx(struct davinci_audio_dev *dev)
 {
+   u8 offset = 0, i;
+   u32 cnt;
+
mcasp_set_ctl_reg(dev-base + DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST);
mcasp_set_ctl_reg(dev-base + DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST);
mcasp_set_ctl_reg(dev-base + DAVINCI_MCASP_GBLCTLX_REG, TXSERCLR);
@@ -353,6 +368,19 @@ static void mcasp_start_tx(struct davinci_audio_dev *dev)
mcasp_set_ctl_reg(dev-base + DAVINCI_MCASP_GBLCTLX_REG, TXSMRST);
mcasp_set_ctl_reg(dev-base + DAVINCI_MCASP_GBLCTLX_REG, TXFSRST);
mcasp_set_reg(dev-base + DAVINCI_MCASP_TXBUF_REG, 0);
+   for (i = 0; i  dev-num_serializer; i++) {
+   if (dev-serial_dir[i] == TX_MODE) {
+   offset = i;
+   break;
+   }
+   }
+
+   /* wait for TX ready */
+   cnt = 0;
+   while (!(mcasp_get_reg(dev-base + DAVINCI_MCASP_XRSRCTL_REG(offset)) 
+TXSTATE)  (cnt  10))
+   cnt++;
+
mcasp_set_reg(dev-base + DAVINCI_MCASP_TXBUF_REG, 0);
 }
 
@@ -362,6 +390,13 @@ static void davinci_mcasp_start(struct davinci_audio_dev 
*dev, int stream)
mcasp_start_tx(dev);
else
mcasp_start_rx(dev);
+
+   /* enable FIFO */
+   if (dev-txnumevt)
+   mcasp_set_bits(dev-base + DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE);
+
+   if (dev-rxnumevt)
+   mcasp_set_bits(dev-base + DAVINCI_MCASP_RFIFOCTL, FIFO_ENABLE);
 }
 
 static void mcasp_stop_rx(struct davinci_audio_dev *dev)
@@ -382,6 +417,13 @@ static void davinci_mcasp_stop(struct davinci_audio_dev 
*dev, int stream)
mcasp_stop_tx(dev);
else
mcasp_stop_rx(dev);
+
+   /* disable FIFO */
+   if (dev-txnumevt)
+   mcasp_clr_bits(dev-base + DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE);
+
+   if (dev-rxnumevt)
+   mcasp_clr_bits(dev-base + DAVINCI_MCASP_RFIFOCTL, FIFO_ENABLE);
 }
 
 static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
@@ -401,7 +443,6 @@ static int 

[PATCH v2 2/2] ASoC: DaVinci: Add a DAI format to McASP driver

2009-08-11 Thread Chaithrika U S
The patch adds a DAI format: Codec bit clock master and frame sync slave,
to the driver.

Signed-off-by: Chaithrika U S chaithr...@ti.com
---
This patch has been separated out from the first patch of this series.
In the previous version, this was part of the McASP driver FIFO support patch.

Applies to ALSA GIT tree on branch topic/asoc at
http://git.kernel.org/?p=linux/kernel/git/tiwai/sound-2.6.git;a=shortlog;
h=topic/asoc

 sound/soc/davinci/davinci-mcasp.c |   10 ++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/sound/soc/davinci/davinci-mcasp.c 
b/sound/soc/davinci/davinci-mcasp.c
index e672f43..eca22d7 100644
--- a/sound/soc/davinci/davinci-mcasp.c
+++ b/sound/soc/davinci/davinci-mcasp.c
@@ -443,6 +443,16 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai 
*cpu_dai,
 
mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, (0x7  26));
break;
+   case SND_SOC_DAIFMT_CBM_CFS:
+   /* codec is clock master and frame slave */
+   mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);
+   mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE);
+
+   mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);
+   mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE);
+
+   mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, (0x2d  26));
+   break;
case SND_SOC_DAIFMT_CBM_CFM:
/* codec is clock and frame master */
mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);
-- 
1.5.6

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[PATCH v2] ARM: DaVinci: Audio support for DA830 EVM

2009-08-11 Thread Chaithrika U S
Define resources for McASP1 used on DA830/OMAP-L137 EVM, add platform
device defintion, initialization function.
Additionally, this patch also adds version and FIFO related
members to platform data structure.

Signed-off-by: Chaithrika U S chaithr...@ti.com
---
Applies to DaVinci GIT tree.
In this version of the patch, the init fucntion, resource and platform device
definitions have neen moved to the devices-da8xx.c file.

 arch/arm/mach-davinci/board-da830-evm.c|   27 +
 arch/arm/mach-davinci/da830.c  |7 +++--
 arch/arm/mach-davinci/devices-da8xx.c  |   36 
 arch/arm/mach-davinci/include/mach/asp.h   |   15 +++
 arch/arm/mach-davinci/include/mach/da8xx.h |3 ++
 5 files changed, 85 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c 
b/arch/arm/mach-davinci/board-da830-evm.c
index 9025669..a45340d 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -23,6 +23,7 @@
 #include mach/irqs.h
 #include mach/cp_intc.h
 #include mach/da8xx.h
+#include mach/asp.h
 
 #define DA830_EVM_PHY_MASK 0x0
 #define DA830_EVM_MDIO_FREQUENCY   220 /* PHY bus frequency */
@@ -51,6 +52,25 @@ static struct davinci_uart_config da830_evm_uart_config 
__initdata = {
.enabled_uarts = 0x7,
 };
 
+static u8 da830_iis_serializer_direction[] = {
+   RX_MODE,INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
+   INACTIVE_MODE,  TX_MODE,INACTIVE_MODE,  INACTIVE_MODE,
+   INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
+};
+
+static struct snd_platform_data da830_evm_snd_data = {
+   .tx_dma_offset  = 0x2000,
+   .rx_dma_offset  = 0x2000,
+   .op_mode= DAVINCI_MCASP_IIS_MODE,
+   .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
+   .tdm_slots  = 2,
+   .serial_dir = da830_iis_serializer_direction,
+   .eventq_no  = EVENTQ_0,
+   .version= MCASP_VERSION_2,
+   .txnumevt   = 1,
+   .rxnumevt   = 1,
+};
+
 static __init void da830_evm_init(void)
 {
struct davinci_soc_info *soc_info = davinci_soc_info;
@@ -93,6 +113,13 @@ static __init void da830_evm_init(void)
davinci_serial_init(da830_evm_uart_config);
i2c_register_board_info(1, da830_evm_i2c_devices,
ARRAY_SIZE(da830_evm_i2c_devices));
+
+   ret = da8xx_pinmux_setup(da830_mcasp1_pins);
+   if (ret)
+   pr_warning(da830_evm_init: mcasp1 mux setup failed: %d\n,
+   ret);
+
+   da8xx_init_mcasp(1, da830_evm_snd_data);
 }
 
 #ifdef CONFIG_SERIAL_8250_CONSOLE
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 3a9b634..19b2748 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -23,6 +23,7 @@
 #include mach/common.h
 #include mach/time.h
 #include mach/da8xx.h
+#include mach/asp.h
 
 #include clock.h
 #include mux.h
@@ -411,9 +412,9 @@ static struct davinci_clk da830_clks[] = {
CLK(eqep.0,   NULL,   eqep0_clk),
CLK(eqep.1,   NULL,   eqep1_clk),
CLK(da830_lcdc,   NULL,   lcdc_clk),
-   CLK(soc-audio.0,  NULL,   mcasp0_clk),
-   CLK(soc-audio.1,  NULL,   mcasp1_clk),
-   CLK(soc-audio.2,  NULL,   mcasp2_clk),
+   CLK(davinci-mcasp.0,  NULL,   mcasp0_clk),
+   CLK(davinci-mcasp.1,  NULL,   mcasp1_clk),
+   CLK(davinci-mcasp.2,  NULL,   mcasp2_clk),
CLK(musb_hdrc,NULL,   usb20_clk),
CLK(NULL,   aemif,aemif_clk),
CLK(NULL,   aintc,aintc_clk),
diff --git a/arch/arm/mach-davinci/devices-da8xx.c 
b/arch/arm/mach-davinci/devices-da8xx.c
index 11c0971..fe0baaf 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -281,7 +281,43 @@ static struct platform_device da8xx_emac_device = {
.resource   = da8xx_emac_resources,
 };
 
+static struct resource da830_mcasp1_resources[] = {
+   {
+   .name   = mcasp1,
+   .start  = DAVINCI_DA830_MCASP1_REG_BASE,
+   .end= DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
+   .flags  = IORESOURCE_MEM,
+   },
+   /* TX event */
+   {
+   .start  = DAVINCI_DA830_DMA_MCASP1_AXEVT,
+   .end= DAVINCI_DA830_DMA_MCASP1_AXEVT,
+   .flags  = IORESOURCE_DMA,
+   },
+   /* RX event */
+   {
+   .start  = DAVINCI_DA830_DMA_MCASP1_AREVT,
+   .end= DAVINCI_DA830_DMA_MCASP1_AREVT,
+   .flags  = IORESOURCE_DMA,
+   },
+};
+
+static struct platform_device da830_mcasp1_device = {
+   .name   = davinci-mcasp,
+   .id = 1,
+   .num_resources  = 

(no subject)

2009-08-11 Thread Chaithrika U S
Define resources for McASP used on DA850/OMAP-L138 EVM, add platform
device defintion and Pin Mux configurations.

Signed-off-by: Chaithrika U S chaithr...@ti.com
---
Applies on DaVinci GIT tree.
This patch is dependent on the following patch which I have
submitted earlier:
[PATCH v2] ARM: DaVinci: Audio support for DA830 EVM

 arch/arm/mach-davinci/board-da850-evm.c  |   29 ++
 arch/arm/mach-davinci/da850.c|   39 ++
 arch/arm/mach-davinci/devices-da8xx.c|   34 +-
 arch/arm/mach-davinci/include/mach/asp.h |7 +
 arch/arm/mach-davinci/include/mach/mux.h |   25 +++
 5 files changed, 133 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da850-evm.c 
b/arch/arm/mach-davinci/board-da850-evm.c
index d989346..52bfe4c 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -38,6 +38,28 @@ static struct davinci_uart_config da850_evm_uart_config 
__initdata = {
.enabled_uarts = 0x7,
 };
 
+/* davinci da850 evm audio machine driver */
+static u8 da850_iis_serializer_direction[] = {
+   INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
+   INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
+   INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  TX_MODE,
+   RX_MODE,INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
+};
+
+static struct snd_platform_data da850_evm_snd_data = {
+   .tx_dma_offset  = 0x2000,
+   .rx_dma_offset  = 0x2000,
+   .op_mode= DAVINCI_MCASP_IIS_MODE,
+   .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
+   .tdm_slots  = 2,
+   .serial_dir = da850_iis_serializer_direction,
+   .eventq_no  = EVENTQ_1,
+   .version= MCASP_VERSION_2,
+   .txnumevt   = 1,
+   .rxnumevt   = 1,
+};
+
+
 static __init void da850_evm_init(void)
 {
struct davinci_soc_info *soc_info = davinci_soc_info;
@@ -86,6 +108,13 @@ static __init void da850_evm_init(void)
 */
__raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
__raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
+
+   ret = da8xx_pinmux_setup(da850_mcasp_pins);
+   if (ret)
+   pr_warning(da850_evm_init: mcasp mux setup failed: %d\n,
+   ret);
+
+   da8xx_init_mcasp(0, da850_evm_snd_data);
 }
 
 #ifdef CONFIG_SERIAL_8250_CONSOLE
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 4a43ae2..e33b226 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -289,6 +289,13 @@ static struct clk emac_clk = {
.lpsc   = DA8XX_LPSC1_CPGMAC,
 };
 
+static struct clk mcasp_clk = {
+   .name   = mcasp,
+   .parent = pll0_sysclk2,
+   .lpsc   = DA8XX_LPSC1_McASP0,
+   .psc_ctlr   = 1,
+};
+
 static struct davinci_clk da850_clks[] = {
CLK(NULL,   ref,  ref_clk),
CLK(NULL,   pll0, pll0_clk),
@@ -326,6 +333,7 @@ static struct davinci_clk da850_clks[] = {
CLK(NULL,   arm,  arm_clk),
CLK(NULL,   rmii, rmii_clk),
CLK(davinci_emac.1,   NULL,   emac_clk),
+   CLK(davinci-mcasp.0,  NULL,   mcasp_clk),
CLK(NULL,   NULL,   NULL),
 };
 
@@ -370,6 +378,30 @@ static const struct mux_config da850_pins[] = {
MUX_CFG(DA850, MII_RXD_2,   3,  20, 15, 8,  false)
MUX_CFG(DA850, MII_RXD_1,   3,  24, 15, 8,  false)
MUX_CFG(DA850, MII_RXD_0,   3,  28, 15, 8,  false)
+   /* McASP function */
+   MUX_CFG(DA850,  ACLKR,  0,  0,  15, 1,  false)
+   MUX_CFG(DA850,  ACLKX,  0,  4,  15, 1,  false)
+   MUX_CFG(DA850,  AFSR,   0,  8,  15, 1,  false)
+   MUX_CFG(DA850,  AFSX,   0,  12, 15, 1,  false)
+   MUX_CFG(DA850,  AHCLKR, 0,  16, 15, 1,  false)
+   MUX_CFG(DA850,  AHCLKX, 0,  20, 15, 1,  false)
+   MUX_CFG(DA850,  AMUTE,  0,  24, 15, 1,  false)
+   MUX_CFG(DA850,  AXR_15, 1,  0,  15, 1,  false)
+   MUX_CFG(DA850,  AXR_14, 1,  4,  15, 1,  false)
+   MUX_CFG(DA850,  AXR_13, 1,  8,  15, 1,  false)
+   MUX_CFG(DA850,  AXR_12, 1,  12, 15, 1,  false)
+   MUX_CFG(DA850,  AXR_11, 1,  16, 15, 1,  false)
+   MUX_CFG(DA850,  AXR_10, 1,  20, 15, 1,  false)
+   MUX_CFG(DA850,  AXR_9,  1,  24, 15, 1,  false)
+   MUX_CFG(DA850,  AXR_8,  1,  28, 15, 

[PATCH] ARM: DaVinci: Audio support for DA850/OMAP-L138 EVM

2009-08-11 Thread Chaithrika U S
Define resources for McASP used on DA850/OMAP-L138 EVM, add platform
device defintion and Pin Mux configurations.

Signed-off-by: Chaithrika U S chaithr...@ti.com
---
Applies on DaVinci GIT tree.
This patch is dependent on the following patch which I have
submitted earlier:
[PATCH v2] ARM: DaVinci: Audio support for DA830 EVM

 arch/arm/mach-davinci/board-da850-evm.c  |   29 ++
 arch/arm/mach-davinci/da850.c|   39 ++
 arch/arm/mach-davinci/devices-da8xx.c|   34 +-
 arch/arm/mach-davinci/include/mach/asp.h |7 +
 arch/arm/mach-davinci/include/mach/mux.h |   25 +++
 5 files changed, 133 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da850-evm.c 
b/arch/arm/mach-davinci/board-da850-evm.c
index d989346..52bfe4c 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -38,6 +38,28 @@ static struct davinci_uart_config da850_evm_uart_config 
__initdata = {
.enabled_uarts = 0x7,
 };
 
+/* davinci da850 evm audio machine driver */
+static u8 da850_iis_serializer_direction[] = {
+   INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
+   INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
+   INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  TX_MODE,
+   RX_MODE,INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
+};
+
+static struct snd_platform_data da850_evm_snd_data = {
+   .tx_dma_offset  = 0x2000,
+   .rx_dma_offset  = 0x2000,
+   .op_mode= DAVINCI_MCASP_IIS_MODE,
+   .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
+   .tdm_slots  = 2,
+   .serial_dir = da850_iis_serializer_direction,
+   .eventq_no  = EVENTQ_1,
+   .version= MCASP_VERSION_2,
+   .txnumevt   = 1,
+   .rxnumevt   = 1,
+};
+
+
 static __init void da850_evm_init(void)
 {
struct davinci_soc_info *soc_info = davinci_soc_info;
@@ -86,6 +108,13 @@ static __init void da850_evm_init(void)
 */
__raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
__raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
+
+   ret = da8xx_pinmux_setup(da850_mcasp_pins);
+   if (ret)
+   pr_warning(da850_evm_init: mcasp mux setup failed: %d\n,
+   ret);
+
+   da8xx_init_mcasp(0, da850_evm_snd_data);
 }
 
 #ifdef CONFIG_SERIAL_8250_CONSOLE
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 4a43ae2..e33b226 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -289,6 +289,13 @@ static struct clk emac_clk = {
.lpsc   = DA8XX_LPSC1_CPGMAC,
 };
 
+static struct clk mcasp_clk = {
+   .name   = mcasp,
+   .parent = pll0_sysclk2,
+   .lpsc   = DA8XX_LPSC1_McASP0,
+   .psc_ctlr   = 1,
+};
+
 static struct davinci_clk da850_clks[] = {
CLK(NULL,   ref,  ref_clk),
CLK(NULL,   pll0, pll0_clk),
@@ -326,6 +333,7 @@ static struct davinci_clk da850_clks[] = {
CLK(NULL,   arm,  arm_clk),
CLK(NULL,   rmii, rmii_clk),
CLK(davinci_emac.1,   NULL,   emac_clk),
+   CLK(davinci-mcasp.0,  NULL,   mcasp_clk),
CLK(NULL,   NULL,   NULL),
 };
 
@@ -370,6 +378,30 @@ static const struct mux_config da850_pins[] = {
MUX_CFG(DA850, MII_RXD_2,   3,  20, 15, 8,  false)
MUX_CFG(DA850, MII_RXD_1,   3,  24, 15, 8,  false)
MUX_CFG(DA850, MII_RXD_0,   3,  28, 15, 8,  false)
+   /* McASP function */
+   MUX_CFG(DA850,  ACLKR,  0,  0,  15, 1,  false)
+   MUX_CFG(DA850,  ACLKX,  0,  4,  15, 1,  false)
+   MUX_CFG(DA850,  AFSR,   0,  8,  15, 1,  false)
+   MUX_CFG(DA850,  AFSX,   0,  12, 15, 1,  false)
+   MUX_CFG(DA850,  AHCLKR, 0,  16, 15, 1,  false)
+   MUX_CFG(DA850,  AHCLKX, 0,  20, 15, 1,  false)
+   MUX_CFG(DA850,  AMUTE,  0,  24, 15, 1,  false)
+   MUX_CFG(DA850,  AXR_15, 1,  0,  15, 1,  false)
+   MUX_CFG(DA850,  AXR_14, 1,  4,  15, 1,  false)
+   MUX_CFG(DA850,  AXR_13, 1,  8,  15, 1,  false)
+   MUX_CFG(DA850,  AXR_12, 1,  12, 15, 1,  false)
+   MUX_CFG(DA850,  AXR_11, 1,  16, 15, 1,  false)
+   MUX_CFG(DA850,  AXR_10, 1,  20, 15, 1,  false)
+   MUX_CFG(DA850,  AXR_9,  1,  24, 15, 1,  false)
+   MUX_CFG(DA850,  AXR_8,  1,  28, 15, 

RE:

2009-08-11 Thread chaithrika
All,

Please ignore this mail/patch as the subject line is missing!

Regards, 
Chaithrika

On Wed, Aug 12, 2009 at 02:32:27, Chaithrika U S wrote:
 Define resources for McASP used on DA850/OMAP-L138 EVM, add platform
device defintion and Pin Mux configurations.
 
 Signed-off-by: Chaithrika U S chaithr...@ti.com
 ---
 Applies on DaVinci GIT tree.
 This patch is dependent on the following patch which I have submitted
earlier:
   [PATCH v2] ARM: DaVinci: Audio support for DA830 EVM
 
  arch/arm/mach-davinci/board-da850-evm.c  |   29 ++
  arch/arm/mach-davinci/da850.c|   39
++
  arch/arm/mach-davinci/devices-da8xx.c|   34
+-
  arch/arm/mach-davinci/include/mach/asp.h |7 +
  arch/arm/mach-davinci/include/mach/mux.h |   25 +++
  5 files changed, 133 insertions(+), 1 deletions(-)
 
 diff --git a/arch/arm/mach-davinci/board-da850-evm.c
b/arch/arm/mach-davinci/board-da850-evm.c
 index d989346..52bfe4c 100644
 --- a/arch/arm/mach-davinci/board-da850-evm.c
 +++ b/arch/arm/mach-davinci/board-da850-evm.c
 @@ -38,6 +38,28 @@ static struct davinci_uart_config da850_evm_uart_config
__initdata = {
   .enabled_uarts = 0x7,
  };
  
 +/* davinci da850 evm audio machine driver */ static u8 
 +da850_iis_serializer_direction[] = {
 + INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
 + INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
 + INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  TX_MODE,
 + RX_MODE,INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
 +};
 +
 +static struct snd_platform_data da850_evm_snd_data = {
 + .tx_dma_offset  = 0x2000,
 + .rx_dma_offset  = 0x2000,
 + .op_mode= DAVINCI_MCASP_IIS_MODE,
 + .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
 + .tdm_slots  = 2,
 + .serial_dir = da850_iis_serializer_direction,
 + .eventq_no  = EVENTQ_1,
 + .version= MCASP_VERSION_2,
 + .txnumevt   = 1,
 + .rxnumevt   = 1,
 +};
 +
 +
  static __init void da850_evm_init(void)  {
   struct davinci_soc_info *soc_info = davinci_soc_info; @@ -86,6
+108,13 @@ static __init void da850_evm_init(void)
*/
   __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
   __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
 +
 + ret = da8xx_pinmux_setup(da850_mcasp_pins);
 + if (ret)
 + pr_warning(da850_evm_init: mcasp mux setup failed: %d\n,
 + ret);
 +
 + da8xx_init_mcasp(0, da850_evm_snd_data);
  }
  
  #ifdef CONFIG_SERIAL_8250_CONSOLE
 diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 4a43ae2..e33b226 100644
 --- a/arch/arm/mach-davinci/da850.c
 +++ b/arch/arm/mach-davinci/da850.c
 @@ -289,6 +289,13 @@ static struct clk emac_clk = {
   .lpsc   = DA8XX_LPSC1_CPGMAC,
  };
  
 +static struct clk mcasp_clk = {
 + .name   = mcasp,
 + .parent = pll0_sysclk2,
 + .lpsc   = DA8XX_LPSC1_McASP0,
 + .psc_ctlr   = 1,
 +};
 +
  static struct davinci_clk da850_clks[] = {
   CLK(NULL,   ref,  ref_clk),
   CLK(NULL,   pll0, pll0_clk),
 @@ -326,6 +333,7 @@ static struct davinci_clk da850_clks[] = {
   CLK(NULL,   arm,  arm_clk),
   CLK(NULL,   rmii, rmii_clk),
   CLK(davinci_emac.1,   NULL,   emac_clk),
 + CLK(davinci-mcasp.0,  NULL,   mcasp_clk),
   CLK(NULL,   NULL,   NULL),
  };
  
 @@ -370,6 +378,30 @@ static const struct mux_config da850_pins[] = {
   MUX_CFG(DA850, MII_RXD_2,   3,  20, 15, 8,
false)
   MUX_CFG(DA850, MII_RXD_1,   3,  24, 15, 8,
false)
   MUX_CFG(DA850, MII_RXD_0,   3,  28, 15, 8,
false)
 + /* McASP function */
 + MUX_CFG(DA850,  ACLKR,  0,  0,  15, 1,
false)
 + MUX_CFG(DA850,  ACLKX,  0,  4,  15, 1,
false)
 + MUX_CFG(DA850,  AFSR,   0,  8,  15, 1,
false)
 + MUX_CFG(DA850,  AFSX,   0,  12, 15, 1,
false)
 + MUX_CFG(DA850,  AHCLKR, 0,  16, 15, 1,
false)
 + MUX_CFG(DA850,  AHCLKX, 0,  20, 15, 1,
false)
 + MUX_CFG(DA850,  AMUTE,  0,  24, 15, 1,
false)
 + MUX_CFG(DA850,  AXR_15, 1,  0,  15, 1,
false)
 + MUX_CFG(DA850,  AXR_14, 1,  4,  15, 1,
false)
 + MUX_CFG(DA850,  AXR_13, 1,  8,  15, 1,
false)
 + MUX_CFG(DA850,  AXR_12, 1,  12, 15, 1,
false)
 + MUX_CFG(DA850,  AXR_11, 1,  16, 15, 1,
false)
 + MUX_CFG(DA850,  AXR_10, 1,  20, 15, 1,
false)
 + MUX_CFG(DA850,  AXR_9,  1,  24, 15, 1,
false)
 + 

[PATCH] davinci: Add platform support for da850/omap-l138 GLCD

2009-08-11 Thread Sudhakar Rajashekhara
This patch adds platform support for the graphic display
(Sharp LK043T1DG01) found on DA850/OMAP-L138 based EVM.

Signed-off-by: Sudhakar Rajashekhara sudhakar@ti.com
---
 arch/arm/mach-davinci/board-da850-evm.c|   71 
 arch/arm/mach-davinci/da850.c  |   42 
 arch/arm/mach-davinci/devices-da8xx.c  |   59 +++
 arch/arm/mach-davinci/include/mach/da8xx.h |3 +
 arch/arm/mach-davinci/include/mach/mux.h   |   26 ++
 5 files changed, 201 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da850-evm.c 
b/arch/arm/mach-davinci/board-da850-evm.c
index d989346..45575e5 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -17,6 +17,8 @@
 #include linux/console.h
 #include linux/i2c.h
 #include linux/i2c/at24.h
+#include linux/gpio.h
+#include linux/delay.h
 
 #include asm/mach-types.h
 #include asm/mach/arch.h
@@ -25,6 +27,7 @@
 #include mach/irqs.h
 #include mach/cp_intc.h
 #include mach/da8xx.h
+#include mach/psc.h
 
 #define DA850_EVM_PHY_MASK 0x1
 #define DA850_EVM_MDIO_FREQUENCY   220 /* PHY bus frequency */
@@ -38,6 +41,59 @@ static struct davinci_uart_config da850_evm_uart_config 
__initdata = {
.enabled_uarts = 0x7,
 };
 
+int da850_lcd_hw_init(void)
+{
+   /* GPIO 2[15] is used for LCD back light - 16 * 2 + 15 = 47 */
+   int bl_gpio_num = 47;
+
+   /* GPIO 8[10] is used for LCD power - 16 * 8 + 10 = 138 */
+   int pwr_gpio_num = 138;
+   int status;
+
+   status = gpio_request(bl_gpio_num, lcd bl\n);
+   if (status  0)
+   return status;
+
+   status = gpio_request(pwr_gpio_num, lcd pwr\n);
+   if (status  0)
+   return status;
+
+   gpio_direction_output(bl_gpio_num, 0);
+   gpio_direction_output(pwr_gpio_num, 0);
+
+   /* disable lcd backlight */
+   gpio_set_value(bl_gpio_num, 0);
+
+   /* disable lcd power */
+   gpio_set_value(pwr_gpio_num, 0);
+
+   /* wait for sometime */
+   mdelay(3);
+
+   /* disable lcdc */
+   davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, 1, DA8XX_LPSC1_LCDC, 0);
+
+   /* wait for sometime */
+   mdelay(1);
+
+   /* enable lcd power */
+   gpio_set_value(pwr_gpio_num, 1);
+
+   /* enable lcdc */
+   davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, 1, DA8XX_LPSC1_LCDC, 1);
+
+   /* wait for sometime */
+   mdelay(3);
+
+   /* enable lcd backlight */
+   gpio_set_value(bl_gpio_num, 1);
+
+   gpio_free(bl_gpio_num);
+   gpio_free(pwr_gpio_num);
+
+   return 0;
+}
+
 static __init void da850_evm_init(void)
 {
struct davinci_soc_info *soc_info = davinci_soc_info;
@@ -86,6 +142,21 @@ static __init void da850_evm_init(void)
 */
__raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
__raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
+
+   ret = da8xx_pinmux_setup(da850_lcdcntl_pins);
+   if (ret)
+   pr_warning(da850_evm_init: lcdcntl mux setup failed: %d\n,
+   ret);
+
+   ret = da850_lcd_hw_init();
+   if (ret)
+   pr_warning(da850_evm_init: lcd initialization failed: %d\n,
+   ret);
+
+   ret = da8xx_register_lcdc();
+   if (ret)
+   pr_warning(da850_evm_init: lcdc registration failed: %d\n,
+   ret);
 }
 
 #ifdef CONFIG_SERIAL_8250_CONSOLE
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index c5efc51..69acb6e 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -290,6 +290,13 @@ static struct clk emac_clk = {
.psc_ctlr   = 1,
 };
 
+static struct clk lcdc_clk = {
+   .name   = lcdc,
+   .parent = pll0_sysclk2,
+   .lpsc   = DA8XX_LPSC1_LCDC,
+   .psc_ctlr   = 1,
+};
+
 static struct davinci_clk da850_clks[] = {
CLK(NULL,   ref,  ref_clk),
CLK(NULL,   pll0, pll0_clk),
@@ -327,6 +334,7 @@ static struct davinci_clk da850_clks[] = {
CLK(NULL,   arm,  arm_clk),
CLK(NULL,   rmii, rmii_clk),
CLK(davinci_emac.1,   NULL,   emac_clk),
+   CLK(da8xx_lcdc.0, NULL,   lcdc_clk),
CLK(NULL,   NULL,   NULL),
 };
 
@@ -373,6 +381,30 @@ static const struct mux_config da850_pins[] = {
MUX_CFG(DA850, MII_RXD_0,   3,  28, 15, 8,  false)
MUX_CFG(DA850, MDIO_CLK,4,  0,  15, 8,  false)
MUX_CFG(DA850, MDIO_D,  4,  4,  15, 8,  false)
+   /* LCD function */
+   MUX_CFG(DA850, LCD_D_7, 16, 8,  15, 2,  false)
+   MUX_CFG(DA850, LCD_D_6, 16, 12, 15, 2,  false)
+   

RE: [PATCH v5] davinci: fb: Frame Buffer driver for TI DA8xx/OMAP-L1xx

2009-08-11 Thread Sudhakar Rajashekhara
On Tue, Aug 11, 2009 at 05:04:43, Kevin Hilman wrote:
 [ distribution trimmed to Davinci only. ]
 
 Sudhakar Rajashekhara sudhakar@ti.com writes:
 
  Adds LCD controller (LCDC) driver for TI's DA8xx/OMAP-L1xx
  architecture. LCDC specifications can be found at
  http://www.ti.com/litv/pdf/sprufm0a.
 
  LCDC on DA8xx consists of two independent controllers, the
  Raster Controller and the LCD Interface Display Driver (LIDD)
  controller. LIDD further supports character and graphic displays.
 
  This patch adds support for the graphic display (Sharp LQ035Q3DG01)
  found on the DA830 based EVM. The EVM details can be found at:
  http://support.spectrumdigital.com/boards/dskda830/revc/.
 
  Signed-off-by: Sudhakar Rajashekhara sudhakar@ti.com
  Signed-off-by: Pavel Kiryukhin pkiryuk...@ru.mvista.com
  Signed-off-by: Steve Chen sc...@mvista.com
  Acked-by: Krzysztof Helt krzysztof...@wp.pl
 
 As of 06 Aug, looks like Andrew has this in -mm.  
 Pulling into DaVinci git while awaiting merge.
 
Kevin,

This pull has resulted only in updating the drivers/video/Kconfig
file and modifications/additions to other files is missing. Can you
please verify this?

Regards, Sudhakar


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RE: [PATCH] davinci: Add platform support for da850/omap-l138 GLCD

2009-08-11 Thread Nori, Sekhar
Sudhakar,

On Wed, Aug 12, 2009 at 03:28:02, Rajashekhara, Sudhakar wrote:
 This patch adds platform support for the graphic display
 (Sharp LK043T1DG01) found on DA850/OMAP-L138 based EVM.

 Signed-off-by: Sudhakar Rajashekhara sudhakar@ti.com
 ---
  arch/arm/mach-davinci/board-da850-evm.c|   71 
 
  arch/arm/mach-davinci/da850.c  |   42 
  arch/arm/mach-davinci/devices-da8xx.c  |   59 +++
  arch/arm/mach-davinci/include/mach/da8xx.h |3 +
  arch/arm/mach-davinci/include/mach/mux.h   |   26 ++
  5 files changed, 201 insertions(+), 0 deletions(-)

 diff --git a/arch/arm/mach-davinci/board-da850-evm.c 
 b/arch/arm/mach-davinci/board-da850-evm.c
 index d989346..45575e5 100644
 --- a/arch/arm/mach-davinci/board-da850-evm.c
 +++ b/arch/arm/mach-davinci/board-da850-evm.c
 @@ -17,6 +17,8 @@
  #include linux/console.h
  #include linux/i2c.h
  #include linux/i2c/at24.h
 +#include linux/gpio.h
 +#include linux/delay.h

  #include asm/mach-types.h
  #include asm/mach/arch.h
 @@ -25,6 +27,7 @@
  #include mach/irqs.h
  #include mach/cp_intc.h
  #include mach/da8xx.h
 +#include mach/psc.h

  #define DA850_EVM_PHY_MASK   0x1
  #define DA850_EVM_MDIO_FREQUENCY 220 /* PHY bus frequency */
 @@ -38,6 +41,59 @@ static struct davinci_uart_config da850_evm_uart_config 
 __initdata = {
   .enabled_uarts = 0x7,
  };

 +int da850_lcd_hw_init(void)

This should be static?

 +{
 + /* GPIO 2[15] is used for LCD back light - 16 * 2 + 15 = 47 */
 + int bl_gpio_num = 47;
 +
 + /* GPIO 8[10] is used for LCD power - 16 * 8 + 10 = 138 */
 + int pwr_gpio_num = 138;

These could probably be #defines instead of
variables.

 + int status;
 +
 + status = gpio_request(bl_gpio_num, lcd bl\n);
 + if (status  0)
 + return status;
 +
 + status = gpio_request(pwr_gpio_num, lcd pwr\n);
 + if (status  0)
 + return status;

We are missing gpio_free of back light GPIO
here.

 +
 + gpio_direction_output(bl_gpio_num, 0);
 + gpio_direction_output(pwr_gpio_num, 0);
 +
 + /* disable lcd backlight */
 + gpio_set_value(bl_gpio_num, 0);
 +
 + /* disable lcd power */
 + gpio_set_value(pwr_gpio_num, 0);
 +
 + /* wait for sometime */
 + mdelay(3);

Can you explain the reasoning behind
the delay in the comment?

 +
 + /* disable lcdc */
 + davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, 1, DA8XX_LPSC1_LCDC, 0);

Hmm, why is this needed? Hopefully the LCD clock has
not been enabled by this time.

 +
 + /* wait for sometime */
 + mdelay(1);

Some explanation required here too.

 +
 + /* enable lcd power */
 + gpio_set_value(pwr_gpio_num, 1);
 +
 + /* enable lcdc */
 + davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, 1, DA8XX_LPSC1_LCDC, 1);
 +
 + /* wait for sometime */
 + mdelay(3);
 +
 + /* enable lcd backlight */
 + gpio_set_value(bl_gpio_num, 1);
 +
 + gpio_free(bl_gpio_num);
 + gpio_free(pwr_gpio_num);
 +
 + return 0;
 +}
 +
  static __init void da850_evm_init(void)
  {
   struct davinci_soc_info *soc_info = davinci_soc_info;
 @@ -86,6 +142,21 @@ static __init void da850_evm_init(void)
*/
   __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
   __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
 +
 + ret = da8xx_pinmux_setup(da850_lcdcntl_pins);
 + if (ret)
 + pr_warning(da850_evm_init: lcdcntl mux setup failed: %d\n,
 + ret);
 +
 + ret = da850_lcd_hw_init();
 + if (ret)
 + pr_warning(da850_evm_init: lcd initialization failed: %d\n,
 + ret);
 +
 + ret = da8xx_register_lcdc();
 + if (ret)
 + pr_warning(da850_evm_init: lcdc registration failed: %d\n,
 + ret);
  }

  #ifdef CONFIG_SERIAL_8250_CONSOLE
 diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
 index c5efc51..69acb6e 100644
 --- a/arch/arm/mach-davinci/da850.c
 +++ b/arch/arm/mach-davinci/da850.c
 @@ -290,6 +290,13 @@ static struct clk emac_clk = {
   .psc_ctlr   = 1,
  };

 +static struct clk lcdc_clk = {
 + .name   = lcdc,
 + .parent = pll0_sysclk2,
 + .lpsc   = DA8XX_LPSC1_LCDC,
 + .psc_ctlr   = 1,
 +};
 +
  static struct davinci_clk da850_clks[] = {
   CLK(NULL,   ref,  ref_clk),
   CLK(NULL,   pll0, pll0_clk),
 @@ -327,6 +334,7 @@ static struct davinci_clk da850_clks[] = {
   CLK(NULL,   arm,  arm_clk),
   CLK(NULL,   rmii, rmii_clk),
   CLK(davinci_emac.1,   NULL,   emac_clk),
 + CLK(da8xx_lcdc.0, NULL,   lcdc_clk),
   CLK(NULL,   NULL,   NULL),
  };

 @@ -373,6 +381,30 @@ static const struct mux_config da850_pins[] = {
   MUX_CFG(DA850, MII_RXD_0,   

Re: [RFC][PATCH] DM365 RTC Support

2009-08-11 Thread Sergei Shtylyov

Hello.

s-paul...@ti.com wrote:


From: Sandeep Paulraj s-paul...@ti.com



Patch adds support for the RTC Driver in DM365.
Apart from receiving comments on the driver itself
I would also like comments on where i am registering the
RTC Driver for DM365. At present i register the RTC
device in SOC specific file(dm365.c).
RTC INTMUX should most probably be done in some other way
than what i am doing at the moment.
I Added this just before registering the RTC.

Did some basic testing using this driver. hwclock
command works. Also transitions between months/years/leap years
has been verified


   Unfortunately, the very first test in rtc-test doesn't work -- program 
hangs. I'll now point out the bugs in the driver leading to this...



Signed-off-by: Sandeep Paulraj s-paul...@ti.com



diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 4d430a6..bb85129 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c

[...]

@@ -593,6 +594,25 @@ static struct platform_device dm365_emac_device = {
.resource   = dm365_emac_resources,
 };
 
+static struct resource dm365_rtc_resources[] = {

+   {
+   .start = DM365_RTC_BASE,
+   .end = DM365_RTC_BASE + SZ_1K - 1,
+   .flags = IORESOURCE_MEM,
+   },
+   {
+   .start = 29,


   Isn't there a macro for that?


+   .flags = IORESOURCE_IRQ,
+   },
+};
+


[...]


diff --git a/drivers/rtc/rtc-dm365.c b/drivers/rtc/rtc-dm365.c
new file mode 100644
index 000..e417678
--- /dev/null
+++ b/drivers/rtc/rtc-dm365.c
@@ -0,0 +1,671 @@


[...]


+
+#define DM365_RTC_BASE 0x01c69000


   Shouldn't be here (as already noted)...

[...]


+/* DM365_RTCIF_DMA_CMD_REG bit fields */
+#define DM365_RTCIF_DMA_CMD_BUSY   (131)


   Please put spaces before and after  to comply with the kernel style. 
Or use BIT().



+#define DM365_RTCIF_DMA_CMD_SIZE_2WORD (125)
+#define DM365_RTCIF_DMA_CMD_DIR_READ   (124)
+#define DM365_RTCIF_DMA_CMD_BYTEENA1_LSB   (120)
+#define DM365_RTCIF_DMA_CMD_BYTEENA1_2ND_LSB   (121)
+#define DM365_RTCIF_DMA_CMD_BYTEENA1_3RD_LSB   (122)
+#define DM365_RTCIF_DMA_CMD_BYTEENA1_MSB   (123)
+#define DM365_RTCIF_DMA_CMD_BYTEENA1_MASK  (0x00F0)
+#define DM365_RTCIF_DMA_CMD_BYTEENA0_LSB   (116)
+#define DM365_RTCIF_DMA_CMD_BYTEENA0_2ND_LSB   (117)
+#define DM365_RTCIF_DMA_CMD_BYTEENA0_3RD_LSB   (118)
+#define DM365_RTCIF_DMA_CMD_BYTEENA0_MSB   (119)
+#define DM365_RTCIF_DMA_CMD_BYTEENA0_MASK  (0x000F)
+
+#define DM365_RTCIF_INT_ENA_RTCSS_INTENA   (11)
+#define DM365_RTCIF_INT_ENA_RTCIF_INTENA   (10)


   An empty line missing?


+#define DM365_RTCIF_INT_FLG_RTCSS_INTFLG   (11)
+#define DM365_RTCIF_INT_FLG_RTCIF_INTFLG   (10)


[...]


+/* RTCSS_RTC_CTRL_REG bit fields: */
+#define RTCSS_RTC_CTRL_WDTBUS  (17)


   The bit is called WDTBUSY, not WDTBUS...


+#define rtcif_read(addr)   __raw_readl( \
+   (unsigned int *)((u32)dm365_rtc_base + (u32)(addr)))
+#define rtcif_write(val, addr) __raw_writel(val, \
+   (unsigned int *)((u32)dm365_rtc_base + (u32)(addr)))


   Should be inline functions...


+static irqreturn_t dm365_rtc_isr(int irq, void *class_dev)
+{
+   unsigned long events = 0;
+   u32 irq_flg;
+
+   irq_flg = rtcif_read(DM365_RTCIF_INT_FLG_REG);
+
+   if ((irq_flg  DM365_RTCIF_INT_FLG_MASK)) {
+   if (irq_flg  DM365_RTCIF_INT_FLG_RTCIF_INTFLG) {
+   rtcif_write(DM365_RTCIF_INT_ENA_RTCSS_INTENA |
+   DM365_RTCIF_INT_ENA_RTCIF_INTENA,
+   DM365_RTCIF_INT_FLG_REG);
+   } else
+   events |= RTC_IRQF | RTC_AF;


   I don't see where you set RTC_UF despite handling RTC_UIE_{ON,OFF} ioctl.


+static int dm365_rtc_update_timer(unsigned int cmd)
+{
+   u8 rtc_ctrl;
+
+   rtc_ctrl = rtcss_read_rtc(RTCSS_RTC_CTRL_REG);
+
+   switch (cmd) {
+   case RTC_UIE_ON:
+   while
+   (rtcss_read_rtc(RTCSS_RTC_CTRL_REG) 
+   RTCSS_RTC_CTRL_WDTBUS);
+   rtc_ctrl |= RTCSS_RTC_CTRL_TE;
+   rtcss_write_rtc(rtc_ctrl, RTCSS_RTC_CTRL_REG);
+   rtcss_write_rtc(0x0, RTCSS_RTC_CLKC_CNT);
+   rtc_ctrl |= RTCSS_RTC_CTRL_TIEN | RTCSS_RTC_CTRL_TMMD_FREERUN;


   Wait, the source of the update interrupt is not just free-running 
counter set to 1 second -- it must be synchronized to the RTC time regisers 
update. This timer doesn't have a real update interrupt, so, as David ahve 
already suggested, you shouldn't handle these ioctl's, relying on 
CONFIG_RTC_DEV_UIE_EMUL intead...



+   rtcss_write_rtc(rtc_ctrl, RTCSS_RTC_CTRL_REG);
+   rtcss_write_rtc(0x80, RTCSS_RTC_TMR0_REG);
+   rtcss_write_rtc(0x0, RTCSS_RTC_TMR1_REG);


   It appears 

[PATCH 2/4 - v2] V4L: ccdc driver - adding support for camera capture

2009-08-11 Thread m-karicheri2
From: Muralidharan Karicheri m-kariche...@ti.com

There was no comment against v1 of the patch. So no change in this file

Reviewed-by: Hans Verkuil hverk...@xs4all.nl

Signed-off-by: Muralidharan Karicheri m-kariche...@ti.com
---
Applies to V4L-DVB linux-next repository
 drivers/media/video/davinci/dm355_ccdc.c  |   16 +++-
 drivers/media/video/davinci/dm644x_ccdc.c |   13 +
 include/media/davinci/dm355_ccdc.h|2 +-
 include/media/davinci/dm644x_ccdc.h   |2 +-
 4 files changed, 22 insertions(+), 11 deletions(-)

diff --git a/drivers/media/video/davinci/dm355_ccdc.c 
b/drivers/media/video/davinci/dm355_ccdc.c
index 4629cab..4efffc2 100644
--- a/drivers/media/video/davinci/dm355_ccdc.c
+++ b/drivers/media/video/davinci/dm355_ccdc.c
@@ -92,7 +92,7 @@ static struct ccdc_params_raw ccdc_hw_params_raw = {
 
 /* Object for CCDC ycbcr mode */
 static struct ccdc_params_ycbcr ccdc_hw_params_ycbcr = {
-   .win = CCDC_WIN_PAL,
+   .win = CCDC_WIN_NTSC,
.pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
.frm_fmt = CCDC_FRMFMT_INTERLACED,
.fid_pol = VPFE_PINPOL_POSITIVE,
@@ -548,7 +548,7 @@ static int ccdc_config_vdfc(struct ccdc_vertical_dft *dfc)
  */
 static void ccdc_config_csc(struct ccdc_csc *csc)
 {
-   u32 val1, val2;
+   u32 val1 = 0, val2;
int i;
 
if (!csc-enable)
@@ -925,8 +925,11 @@ static int ccdc_set_hw_if_params(struct vpfe_hw_if_param 
*params)
ccdc_hw_params_ycbcr.vd_pol = params-vdpol;
ccdc_hw_params_ycbcr.hd_pol = params-hdpol;
break;
+   case VPFE_RAW_BAYER:
+   ccdc_hw_params_raw.vd_pol = params-vdpol;
+   ccdc_hw_params_raw.hd_pol = params-hdpol;
+   break;
default:
-   /* TODO add support for raw bayer here */
return -EINVAL;
}
return 0;
@@ -961,9 +964,12 @@ static struct ccdc_hw_device ccdc_hw_dev = {
 
 static int dm355_ccdc_init(void)
 {
+   int ret;
+
printk(KERN_NOTICE dm355_ccdc_init\n);
-   if (vpfe_register_ccdc_device(ccdc_hw_dev)  0)
-   return -1;
+   ret = vpfe_register_ccdc_device(ccdc_hw_dev);
+   if (ret  0)
+   return ret;
printk(KERN_NOTICE %s is registered with vpfe.\n,
ccdc_hw_dev.name);
return 0;
diff --git a/drivers/media/video/davinci/dm644x_ccdc.c 
b/drivers/media/video/davinci/dm644x_ccdc.c
index 2f19a91..5dff8d9 100644
--- a/drivers/media/video/davinci/dm644x_ccdc.c
+++ b/drivers/media/video/davinci/dm644x_ccdc.c
@@ -65,7 +65,7 @@ static struct ccdc_params_raw ccdc_hw_params_raw = {
 static struct ccdc_params_ycbcr ccdc_hw_params_ycbcr = {
.pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
.frm_fmt = CCDC_FRMFMT_INTERLACED,
-   .win = CCDC_WIN_PAL,
+   .win = CCDC_WIN_NTSC,
.fid_pol = VPFE_PINPOL_POSITIVE,
.vd_pol = VPFE_PINPOL_POSITIVE,
.hd_pol = VPFE_PINPOL_POSITIVE,
@@ -825,8 +825,10 @@ static int ccdc_set_hw_if_params(struct vpfe_hw_if_param 
*params)
ccdc_hw_params_ycbcr.vd_pol = params-vdpol;
ccdc_hw_params_ycbcr.hd_pol = params-hdpol;
break;
+   case VPFE_RAW_BAYER:
+   ccdc_hw_params_raw.vd_pol = params-vdpol;
+   ccdc_hw_params_raw.hd_pol = params-hdpol;
default:
-   /* TODO add support for raw bayer here */
return -EINVAL;
}
return 0;
@@ -861,9 +863,12 @@ static struct ccdc_hw_device ccdc_hw_dev = {
 
 static int dm644x_ccdc_init(void)
 {
+   int ret;
+
printk(KERN_NOTICE dm644x_ccdc_init\n);
-   if (vpfe_register_ccdc_device(ccdc_hw_dev)  0)
-   return -1;
+   ret = vpfe_register_ccdc_device(ccdc_hw_dev);
+   if (ret  0)
+   return ret;
printk(KERN_NOTICE %s is registered with vpfe.\n,
ccdc_hw_dev.name);
return 0;
diff --git a/include/media/davinci/dm355_ccdc.h 
b/include/media/davinci/dm355_ccdc.h
index df8a7b1..9395900 100644
--- a/include/media/davinci/dm355_ccdc.h
+++ b/include/media/davinci/dm355_ccdc.h
@@ -254,7 +254,7 @@ struct ccdc_config_params_raw {
 #ifdef __KERNEL__
 #include linux/io.h
 
-#define CCDC_WIN_PAL   {0, 0, 720, 576}
+#define CCDC_WIN_NTSC  {0, 0, 720, 480}
 #define CCDC_WIN_VGA   {0, 0, 640, 480}
 
 struct ccdc_params_ycbcr {
diff --git a/include/media/davinci/dm644x_ccdc.h 
b/include/media/davinci/dm644x_ccdc.h
index 3e178eb..e34a54a 100644
--- a/include/media/davinci/dm644x_ccdc.h
+++ b/include/media/davinci/dm644x_ccdc.h
@@ -131,7 +131,7 @@ struct ccdc_config_params_raw {
 #define NUM_EXTRALINES 8
 
 /* settings for commonly used video formats */
-#define CCDC_WIN_PAL {0, 0, 720, 576}
+#define CCDC_WIN_NTSC {0, 0, 720, 480}
 /* ntsc square pixel */
 #define CCDC_WIN_VGA   {0, 0, (640 + NUM_EXTRAPIXELS), (480 + NUM_EXTRALINES)}
 
-- 
1.6.0.4


[PATCH 1/4 - v2] V4L: vpfe capture driver - adding support for camera capture

2009-08-11 Thread m-karicheri2
From: Muralidharan Karicheri m-kariche...@ti.com

This patch incorporated comments received against v1 patch series.

Following are the major comments incorporated:-
1) retained vpfe_g_std() since for vbi support g_std handling in v4l2 
framework
   is not sufficient.
2) rename name field in vpfe_subdev_info to module_name and camera to 
is_camera.
   also grouped bit field variables

Additional features added on top v1 patch:-
2) vpfe_enable/disable_clock restructered to allow configuration of 
required
   clocks in vpfe_capture configuration. This is required for upcoming 
DM365
   support.

Reviewed-by: Hans Verkuil hverk...@xs4all.nl

Signed-off-by: Muralidharan Karicheri m-kariche...@ti.com
---
Applies to V4L-DVB linux-next repository
 drivers/media/video/davinci/vpfe_capture.c |  545 +---
 include/media/davinci/vpfe_capture.h   |   30 ++-
 2 files changed, 436 insertions(+), 139 deletions(-)

diff --git a/drivers/media/video/davinci/vpfe_capture.c 
b/drivers/media/video/davinci/vpfe_capture.c
index 402ce43..ff43446 100644
--- a/drivers/media/video/davinci/vpfe_capture.c
+++ b/drivers/media/video/davinci/vpfe_capture.c
@@ -59,10 +59,8 @@
  *TODO list
  * - Support multiple REQBUF after open
  * - Support for de-allocating buffers through REQBUF
- * - Support for Raw Bayer RGB capture
  * - Support for chaining Image Processor
  * - Support for static allocation of buffers
- * - Support for USERPTR IO
  * - Support for STREAMON before QBUF
  * - Support for control ioctls
  */
@@ -79,11 +77,24 @@
 static int debug;
 static u32 numbuffers = 3;
 static u32 bufsize = (720 * 576 * 2);
+static int interface;
 
+module_param(interface, bool, S_IRUGO);
 module_param(numbuffers, uint, S_IRUGO);
 module_param(bufsize, uint, S_IRUGO);
-module_param(debug, int, 0644);
-
+module_param(debug, bool, 0644);
+
+/**
+ * VPFE capture can be used for capturing video such as from TVP5146 or TVP7002
+ * and for capture raw bayer data from camera sensors such as MT9T031. At this
+ * point there is problem in co-existence of mt9t031 and tvp5146 due to i2c
+ * address collision. So set the variable below from bootargs to do either 
video
+ * capture or camera capture.
+ * interface = 0 - video capture (from TVP514x or such),
+ * interface = 1 - Camera capture (from MT9T031 or such)
+ * Re-visit this when we fix the co-existence issue
+ */
+MODULE_PARM_DESC(interface, interface 0-1 (default:0));
 MODULE_PARM_DESC(numbuffers, buffer count (default:3));
 MODULE_PARM_DESC(bufsize, buffer size in bytes (default:720 x 576 x 2));
 MODULE_PARM_DESC(debug, Debug level 0-1);
@@ -143,6 +154,7 @@ static const struct vpfe_pixel_format vpfe_pix_fmts[] = {
.pixelformat = V4L2_PIX_FMT_SBGGR8,
},
.bpp = 1,
+   .subdev_pix_fmt = V4L2_PIX_FMT_SGRBG10,
},
{
.fmtdesc = {
@@ -152,6 +164,7 @@ static const struct vpfe_pixel_format vpfe_pix_fmts[] = {
.pixelformat = V4L2_PIX_FMT_SBGGR16,
},
.bpp = 2,
+   .subdev_pix_fmt = V4L2_PIX_FMT_SGRBG10,
},
{
.fmtdesc = {
@@ -161,6 +174,7 @@ static const struct vpfe_pixel_format vpfe_pix_fmts[] = {
.pixelformat = V4L2_PIX_FMT_SGRBG10DPCM8,
},
.bpp = 1,
+   .subdev_pix_fmt = V4L2_PIX_FMT_SGRBG10,
},
{
.fmtdesc = {
@@ -170,6 +184,7 @@ static const struct vpfe_pixel_format vpfe_pix_fmts[] = {
.pixelformat = V4L2_PIX_FMT_UYVY,
},
.bpp = 2,
+   .subdev_pix_fmt = V4L2_PIX_FMT_UYVY,
},
{
.fmtdesc = {
@@ -179,6 +194,7 @@ static const struct vpfe_pixel_format vpfe_pix_fmts[] = {
.pixelformat = V4L2_PIX_FMT_YUYV,
},
.bpp = 2,
+   .subdev_pix_fmt = V4L2_PIX_FMT_UYVY,
},
{
.fmtdesc = {
@@ -188,12 +204,15 @@ static const struct vpfe_pixel_format vpfe_pix_fmts[] = {
.pixelformat = V4L2_PIX_FMT_NV12,
},
.bpp = 1,
+   .subdev_pix_fmt = V4L2_PIX_FMT_UYVY,
},
 };
 
-/*
- * vpfe_lookup_pix_format()
- * lookup an entry in the vpfe pix format table based on pix_format
+/**
+ * vpfe_lookup_pix_format() - lookup an entry in the vpfe pix format table
+ * @pix_format: v4l pix format
+ * This function lookup an entry in the vpfe pix format table based on
+ * pix_format
  */
 static const struct vpfe_pixel_format *vpfe_lookup_pix_format(u32 pix_format)
 {
@@ -241,19 +260,19 @@ int vpfe_register_ccdc_device(struct ccdc_hw_device *dev)
 * walk through it during vpfe probe
  

[PATCH 4/4 - v2] DaVinci:platform changes to support vpfe camera capture

2009-08-11 Thread m-karicheri2
From: Muralidharan Karicheri m-kariche...@ti.com

Incorporated some minor comments against v1 of the patch. In addition added
support for clock configuration.

NOTE: depends on vpfe capture initial set of patches which are merged to v4l-dvb
linux-next repository.

Reviewed-by: Hans Verkuil hverk...@xs4all.nl

Signed-off-by: Muralidharan Karicheri m-kariche...@ti.com
---
Applies to DaVinci tree
 arch/arm/mach-davinci/board-dm355-evm.c  |  140 +-
 arch/arm/mach-davinci/board-dm644x-evm.c |6 +-
 2 files changed, 140 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-davinci/board-dm355-evm.c 
b/arch/arm/mach-davinci/board-dm355-evm.c
index af09de4..f683559 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -24,6 +24,7 @@
 #include media/tvp514x.h
 #include linux/spi/spi.h
 #include linux/spi/eeprom.h
+#include linux/i2c/dm355evm_msp.h
 
 #include asm/setup.h
 #include asm/mach-types.h
@@ -138,14 +139,58 @@ static void dm355evm_mmcsd_gpios(unsigned gpio)
dm355evm_mmc_gpios = gpio;
 }
 
+#define PCA9543A_I2C_ADDR   (0x73)
+
+static struct i2c_client *pca9543a;
+
+static int pca9543a_probe(struct i2c_client *client,
+   const struct i2c_device_id *id)
+{
+   pca9543a = client;
+   return 0;
+}
+
+static int pca9543a_remove(struct i2c_client *client)
+{
+   pca9543a = NULL;
+   return 0;
+}
+
+static const struct i2c_device_id pca9543a_ids[] = {
+   { PCA9543A, 0, },
+   { /* end of list */ },
+};
+
+/* This is for i2c driver for the MT9T031 header i2c switch */
+static struct i2c_driver pca9543a_driver = {
+   .driver.name= PCA9543A,
+   .id_table   = pca9543a_ids,
+   .probe  = pca9543a_probe,
+   .remove = pca9543a_remove,
+};
+
 static struct i2c_board_info dm355evm_i2c_info[] = {
{   I2C_BOARD_INFO(dm355evm_msp, 0x25),
.platform_data = dm355evm_mmcsd_gpios,
},
+   {
+   I2C_BOARD_INFO(PCA9543A, 0x73),
+   },
/* { plus irq  }, */
/* { I2C_BOARD_INFO(tlv320aic3x, 0x1b), }, */
 };
 
+/* have_sensor() - Check if we have support for sensor interface */
+static inline int have_sensor(void)
+{
+#if defined(CONFIG_SOC_CAMERA_MT9T031) || \
+defined(CONFIG_SOC_CAMERA_MT9T031_MODULE)
+   return 1;
+#else
+   return 0;
+#endif
+}
+
 static void __init evm_init_i2c(void)
 {
davinci_init_i2c(i2c_pdata);
@@ -153,7 +198,8 @@ static void __init evm_init_i2c(void)
gpio_request(5, dm355evm_msp);
gpio_direction_input(5);
dm355evm_i2c_info[0].irq = gpio_to_irq(5);
-
+   if (have_sensor())
+   i2c_add_driver(pca9543a_driver);
i2c_register_board_info(1, dm355evm_i2c_info,
ARRAY_SIZE(dm355evm_i2c_info));
 }
@@ -182,6 +228,72 @@ static struct platform_device dm355evm_dm9000 = {
.num_resources  = ARRAY_SIZE(dm355evm_dm9000_rsrc),
 };
 
+/**
+ * dm355_enable_i2c_switch() - Enable/Disable I2C switch PCA9543A for sensor
+ * @en: enable/disbale flag
+ */
+static int dm355evm_enable_i2c_switch(int en)
+{
+   static char val = 1;
+   int status;
+   struct i2c_msg msg = {
+   .flags = 0,
+   .len = 1,
+   .buf = val,
+   };
+
+   if (!en)
+   val = 0;
+
+   if (!pca9543a)
+   return -ENXIO;
+
+   msg.addr = pca9543a-addr;
+   /* turn i2c switch, pca9543a, on/off */
+   status = i2c_transfer(pca9543a-adapter, msg, 1);
+   return status;
+}
+
+/**
+ * dm355evm_setup_video_input() - setup video data path and i2c
+ * @id: sub device id
+ */
+static int dm355evm_setup_video_input(enum vpfe_subdev_id id)
+{
+   int ret;
+
+   switch (id) {
+   case VPFE_SUBDEV_MT9T031:
+   {
+   ret = dm355evm_msp_write(MSP_VIDEO_IMAGER,
+DM355EVM_MSP_VIDEO_IN);
+   if (ret = 0)
+   ret = dm355evm_enable_i2c_switch(1);
+   else
+   /* switch off i2c switch since we failed */
+   ret = dm355evm_enable_i2c_switch(0);
+   break;
+   }
+   case VPFE_SUBDEV_TVP5146:
+   {
+   ret = dm355evm_msp_write(0, DM355EVM_MSP_VIDEO_IN);
+   break;
+   }
+   default:
+   return -EINVAL;
+   }
+   return (ret = 0 ? 0 : ret);
+}
+
+/* Input available at the mt9t031 */
+static struct v4l2_input mt9t031_inputs[] = {
+   {
+   .index = 0,
+   .name = Camera,
+   .type = V4L2_INPUT_TYPE_CAMERA,
+   }
+};
+
 static struct tvp514x_platform_data tvp5146_pdata = {
.clk_polarity = 0,
.hs_polarity = 1,
@@ -205,7 +317,7 @@ static struct v4l2_input tvp5146_inputs[] = {
},
 };
 
-/*
+/**
  * this is the route info for connecting 

Re: saDisplay + DM6467 showing black an white image in SD Display

2009-08-11 Thread Vinayagam Mariappan
Hi,

I have checked with H264 Stream  with D1 resolution using TI DM6467 Demo
Application. Its working.

But It doest work with our customized MPEG-4 Decoder. I am doubting only my
codec interface

Do you have simple codec interface using VIDEC2 using two output buffer?

Please do help me to fix this issueThis is first time I am doing all
this kind of interface so confusing me.

Regards,
Vinayagam M





On Mon, Aug 10, 2009 at 4:02 PM, Deepika Makhija 
deepika.makh...@einfochips.com wrote:

  Hi  Vinayagam,

 H264 sample streams are available on TI Extranet:
 https://www-a.ti.com/extranet/cm/product/dvevmsw/dspswext/general/dm355_dvevm.shtml

 Consider TI's decode application,  file
 dvsdk_demos_1_40_00_18/dm6467/decode/video.c is used to set the decoder
 parameters, where Vdec2_Params_DEFAULT and Vdec2_DynamicParams_DEFAULT are
 used to set the default decoder parameters, whose value is mentioned in dmai
 module,  you have to modify height/width of these as per your resolution.
 Same would be the case with
 dvsdk_demos_1_40_00_18/dm6467/decode/display.c where default display
 parameters are set with Display_Attrs_DM6467_VID_DEFAULT.

 Regards,
 Deepika


 Vinayagam Mariappan wrote:

 Hi,

 I have only H264 TI Codec Lib but I do not find H264 Stream for D1.
 Do you have any sample file?

 Please send me if you have one...

 Its confusing me to Integrate with our customized codec...  As I know, I
 have to do minimal changes to get our customized codec to work with our TI
 Demo Application.
 Could you please me specific things to see?
 Do you have any idea which specific enum directly look into it...?

 Regards,
 Vinayagam M


 On Mon, Aug 3, 2009 at 1:40 PM, Deepika Makhija 
 deepika.makh...@einfochips.com wrote:

 Hi,

 Nice to hear that your saDisplay is working now.

 we are not getting video.But I get video data till App. Can you please
 describe in detail, up till which module you are getting correct output.

 I would suggest instead of integrating your decoder, first try to modify
 the application to work at D1 resolution with TI codecs, which are capable
 of decoding D1 resolution also,  for that you would have to change few enums
 in the application. Once that path is clear than integrate your decoder.

 Regards,
 Deepika

 Vinayagam Mariappan wrote:

 Hi Deepika,
  I just made the saDisplay to work properly.
   Now I have to change the Decoder Application to work with our
 customized decoder which always give video out with D1 resolution...
  The TI Demo Application is for HD Display and I change that to work for
 SD Display. When I integrate our customized decoder with demo application,
 we are not getting video.But I get video data till App.
  Where will be the problem...
  Regards,
 Vinayagam M

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 --
 Regards,
 Vinayagam M

 VeNMSOL Technologies,

 #7A, First Cross Street, Ganapathy Colony,

 Ekkaduthangal, Chennai - 600 032,India.

 Tel:+91-44-4353 0168;Mobile:+91-9445-019919

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 Thanks  Regards,
 Deepika Makhija
 eInfochips Ltd.
 Tel. No. +91-79-26563705 Ext. 218www.einfochips.com


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 are intended solely for the use of the addressee and may contain legally
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Regarding increase in Sever Thread stack size

2009-08-11 Thread Sandeep YEDIRE
Hello all,
is there anyway to increase server thread stack size for one particular codec? 
What is max limit ?
 Many Thanks,
Sandeep.Yedire 


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