Re: SS20: SMP trouble...

2005-10-28 Thread Romain Dolbeau

Marco Gaiarin wrote:


I've swapped this SM50 with another SM50 module (again, different part
number but also different ``look'': no TI logo on heatsink, ...), and
the other got two identical (same part number) SM50, and their SS20
work flawlessy...


check your parts number on 

*some* level of mixing are acceptable, some are not ;
the rough guideline is, you can't mix major revisions of
CPU and/or cache controller. Lots of gory details
are available on 

HTH

--
Romain Dolbeau
<[EMAIL PROTECTED]>


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Re: SS20: SMP trouble...

2005-10-28 Thread Marco Gaiarin
Mandi! Shawn Boyette
  In chel di` si favelave...

> IIRC, the 50MHz modules for the SS20 are not SMP-safe|capable due to
> the lack of on-board L2 cache. Or maybe it was the Blackbird MMU that
> came with the 2M L2 cache which is standard on all the faster CPU
> modules. Either way, it doesn't work.

I've swapped this SM50 with another SM50 module (again, different part
number but also different ``look'': no TI logo on heatsink, ...), and
the other got two identical (same part number) SM50, and their SS20
work flawlessy...

I'm not so lucky? ;(

-- 
dott. Marco Gaiarin GNUPG Key ID: 240A3D66
  Associazione ``La Nostra Famiglia''http://www.sv.lnf.it/
  Polo FVG  -  Via della Bontà, 7 - 33078  -  San Vito al Tagliamento (PN)
  gaio(at)sv.lnf.it tel +39-0434-842711fax +39-0434-842797

Grazie parlamento europeo!
http://punto-informatico.it/p.asp?i=53925&r=PI


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Re: SS20: SMP trouble...

2005-10-27 Thread Hendrik Sattler
Am Donnerstag, 27. Oktober 2005 14:52 schrieb Shawn Boyette:
> On 10/27/05, Marco Gaiarin <[EMAIL PROTECTED]> wrote:
> > They are not the same (different part number, different placement of
> > some passive components, ...) but hold the same TI CPU and are both
> > recognized by the system as 390Z50[1].
>
> IIRC, the 50MHz modules for the SS20 are not SMP-safe|capable due to
> the lack of on-board L2 cache. Or maybe it was the Blackbird MMU that
> came with the 2M L2 cache which is standard on all the faster CPU
> modules. Either way, it doesn't work.

I had several (now two) 50MHz 0MB-Cache Modules like described above, here, in 
a SS20 clone with PROM 2.22. Those worked with SMP-kernel in both Debian 
Woody and Sarge, and with a Solaris 8 installation (yes, both CPUs were 
running).
Still very slow, though, but stable for some hours. I ran X with Solaris but 
not with Debian.

HS


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Re: SS20: SMP trouble...

2005-10-27 Thread Shawn Boyette
On 10/27/05, Marco Gaiarin <[EMAIL PROTECTED]> wrote:
> They are not the same (different part number, different placement of
> some passive components, ...) but hold the same TI CPU and are both
> recognized by the system as 390Z50[1].

IIRC, the 50MHz modules for the SS20 are not SMP-safe|capable due to
the lack of on-board L2 cache. Or maybe it was the Blackbird MMU that
came with the 2M L2 cache which is standard on all the faster CPU
modules. Either way, it doesn't work.

--
Shawn Boyette
<[EMAIL PROTECTED]>


SS20: SMP trouble...

2005-10-27 Thread Marco Gaiarin

I've an old SS20 laying around, that works flawlessy but slowly in UP
mode.
Some day ago i was finally able to get another cpu.

They are not the same (different part number, different placement of
some passive components, ...) but hold the same TI CPU and are both
recognized by the system as 390Z50[1].


I've tried to boot the standard 2.4.27 debian sarge smp kernel, and
oops() somewhere early in the init phase.
I've aso tried to rebuild a custom 2.4.31 kernel with smp, and something
goes better, the box arrive at XDM startup more or less, but die with:

Oct 26 16:15:55 (none) kernel: Unimplemented Sparc TRAP, type = 2b
Oct 26 16:15:55 (none) kernel:   \|/  \|/
Oct 26 16:15:55 (none) kernel:   "@'/ ,. \"
Oct 26 16:15:55 (none) kernel:   /_| \__/ |_\
Oct 26 16:15:55 (none) kernel:  \__U_/
Oct 26 16:15:55 (none) kernel: head(490): Whee... Hello Mr. Penguin
Oct 26 16:15:55 (none) kernel: PSR: 4181 PC: 00010ccc NPC: 00010cd0 Y: 
Not tainted
Oct 26 16:15:55 (none) kernel: g0:  g1: f000 g2:  g3: 
0001 g4: efffee84 g5: 00474c00 g6: ff00 g7: 50015640
Oct 26 16:15:55 (none) kernel: o0: f4ca5afc o1: f4a06a20 o2: 000153b0 o3: 
 o4: 5003a062 o5: 0001 sp: efffece0 o7: 00010c6c
Oct 26 16:15:55 (none) kernel: l0: f4a06a20 l1: f4ca5ae0 l2: f4ca5afc l3: 
 l4: f49d8000 l5: 0001 l6: 0177ff8e l7: 50172094
Oct 26 16:15:55 (none) kernel: i0: f49d9fb0 i1: 0001 i2:  i3: 
000153b0 i4: 50019788 i5: 0314 fp: efffed48 i7: 000153c0
Oct 26 16:15:55 (none) kernel: Instruction DUMP:   81c3e008 ae03c017 
<9de3bf98> 0300  2f56  7ffb  ae05e0f0  8210601c

Really i cannot mix CPU modules that have different part number or i'm
hitting some other bug?

prtconf -vp say me:

Node 0xffd67150
psr-implementation:  0004
psr-version:  0001
implementation:  
version:  
name: 'TI,TMS390Z50'
cache-physical?:
dcache-line-size:  0020
dcache-nlines:  0080
dcache-associativity:  0004
icache-line-size:  0040
icache-nlines:  0040
icache-associativity:  0005
mmu-nctx:  0001
ncaches:  0002
sparc-version:  0008
reg:  000f.f8fc.0004
device_type: 'cpu'
cache-coherence?:
mid:  0008
page-size:  1000
context-table:  .18fc.0004
mailbox-virtual:  ffeef000.0001
mailbox:  .18fad000.0001

Node 0xffd67420
psr-implementation:  0004
psr-version:  
implementation:  
version:  0004
name: 'TI,TMS390Z50'
cache-physical?:
dcache-line-size:  0020
dcache-nlines:  0080
dcache-associativity:  0004
icache-line-size:  0040
icache-nlines:  0040
icache-associativity:  0005
mmu-nctx:  0001
ncaches:  0002
sparc-version:  0008
reg:  000f.fafc.0004
device_type: 'cpu'
cache-coherence?:
mid:  000a
page-size:  1000
context-table:  .18fc.0004
mailbox-virtual:  ffeef002.0001
mailbox:  .18fad002.0001


Thanks.


PS: it is normal that if i boot in UP mode i've to switch off (no
reboot) the box to properly boot in SMP mode?


[1]: hem, really, i've had to swap the CPUs, putting the cpus in one way
the box refuse to start (no even welcome screen, monitor dpms-off),
swapping the cpu the box boot.

-- 
dott. Marco Gaiarin GNUPG Key ID: 240A3D66
  Associazione ``La Nostra Famiglia''http://www.sv.lnf.it/
  Polo FVG  -  Via della Bontà, 7 - 33078  -  San Vito al Tagliamento (PN)
  gaio(at)sv.lnf.it tel +39-0434-842711fax +39-0434-842797

Grazie parlamento europeo!
http://punto-informatico.it/p.asp?i=53925&r=PI