[edk2-devel] [edk2-staging][PATCH] edk2-staging/RedfishClientPkg: Reduce the header file dependency.

2023-03-15 Thread Simon Wang via groups.io
Move REDFISH_FEATURE_ARRAY_TYPE_CONFIG_LANG and
REDFISH_FEATURE_ARRAY_TYPE_CONFIG_LANG_LIST from
RedfishFeatureUtilityLib.h to
EdkIIRedfishInterchangeData.h. Also, remove
unnecessary jansson.h in RedfishDataTypeDef.h.

Signed-off-by: Simon Wang 
Cc: Nickle Wang 
Cc: Abner Chang 
Cc: Igor Kulchytskyy 
Cc: Nick Ramirez 
---
 .../ConverterLib/include/RedfishDataTypeDef.h | 40 +--
 .../Library/RedfishFeatureUtilityLib.h| 17 +---
 .../Protocol/EdkIIRedfishInterchangeData.h| 33 ++-
 3 files changed, 45 insertions(+), 45 deletions(-)

diff --git a/RedfishClientPkg/ConverterLib/include/RedfishDataTypeDef.h 
b/RedfishClientPkg/ConverterLib/include/RedfishDataTypeDef.h
index 23d13a854c..c759428ab6 100644
--- a/RedfishClientPkg/ConverterLib/include/RedfishDataTypeDef.h
+++ b/RedfishClientPkg/ConverterLib/include/RedfishDataTypeDef.h
@@ -1,6 +1,7 @@
 /** @file
 
   (C) Copyright 2018-2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -8,29 +9,28 @@
   Copyright 2019-2021 Distributed Management Task Force, Inc. All rights 
reserved.
   License: BSD 3-Clause License. For full text see link: 
https://github.com/DMTF/Redfish-JSON-C-Struct-Converter/blob/master/LICENSE.md
 **/
+
 #ifndef REDFISH_CS_DATA_TYPE_H_
 #define REDFISH_CS_DATA_TYPE_H_
 
-#include 
-
-typedef char   RedfishCS_char;
-typedef intRedfishCS_bool;
-typedef signed charRedfishCS_int8;
-typedef unsigned char  RedfishCS_uint8;
-typedef intRedfishCS_int16;
-typedef intRedfishCS_int;
-typedef unsigned int   RedfishCS_uint16;
-typedef long int   RedfishCS_int32;
-typedef unsigned long int  RedfishCS_uint32;
-typedef long long  RedfishCS_int64;
-typedef unsigned long long RedfishCS_uint64;
-typedef void   RedfishCS_void;
-
-#define RedfishCS_boolean_false 0
-#define RedfishCS_boolean_true  1
+typedef charRedfishCS_char;
+typedef int RedfishCS_bool;
+typedef signed char RedfishCS_int8;
+typedef unsigned char   RedfishCS_uint8;
+typedef int RedfishCS_int16;
+typedef int RedfishCS_int;
+typedef unsigned intRedfishCS_uint16;
+typedef long intRedfishCS_int32;
+typedef unsigned long int   RedfishCS_uint32;
+typedef long long   RedfishCS_int64;
+typedef unsigned long long  RedfishCS_uint64;
+typedef voidRedfishCS_void;
+
+#define RedfishCS_boolean_false  0
+#define RedfishCS_boolean_true   1
 
 typedef RedfishCS_int64 RedfishCS_status;
-#define RedfishCS_status_success   0
+#define RedfishCS_status_success  0
 #define RedfishCS_status_unsupported  -1
 #define RedfishCS_status_invalid_parameter-2
 #define RedfishCS_status_insufficient_memory  -3
@@ -39,8 +39,8 @@ typedef RedfishCS_int64 RedfishCS_status;
 
 typedef struct _RedfishCS_Link RedfishCS_Link;
 struct _RedfishCS_Link {
-  RedfishCS_Link *BackLink;
-  RedfishCS_Link *ForwardLink;
+  RedfishCS_Link*BackLink;
+  RedfishCS_Link*ForwardLink;
 };
 
 #endif
diff --git a/RedfishClientPkg/Include/Library/RedfishFeatureUtilityLib.h 
b/RedfishClientPkg/Include/Library/RedfishFeatureUtilityLib.h
index 1429643272..e2f728b26a 100644
--- a/RedfishClientPkg/Include/Library/RedfishFeatureUtilityLib.h
+++ b/RedfishClientPkg/Include/Library/RedfishFeatureUtilityLib.h
@@ -13,26 +13,11 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #define REDFISH_ENABLE_SYSTEM_REBOOT()  
PcdSetBoolS(PcdRedfishSystemRebootRequired, TRUE)
 
-//
-// Definition of REDFISH_FEATURE_ARRAY_TYPE_CONFIG_LANG
-//
-typedef struct {
-  UINTN Index;
-  EFI_STRINGConfigureLang;
-} REDFISH_FEATURE_ARRAY_TYPE_CONFIG_LANG;
-
-//
-// Definition of REDFISH_FEATURE_ARRAY_TYPE_CONFIG_LANG_LIST
-//
-typedef struct {
-  UINTN Count;
-  REDFISH_FEATURE_ARRAY_TYPE_CONFIG_LANG*List;
-} REDFISH_FEATURE_ARRAY_TYPE_CONFIG_LANG_LIST;
-
 /**
 
   Read redfish resource by given resource URI.
diff --git a/RedfishClientPkg/Include/Protocol/EdkIIRedfishInterchangeData.h 
b/RedfishClientPkg/Include/Protocol/EdkIIRedfishInterchangeData.h
index e8d0462fb7..89708eb8f1 100644
--- a/RedfishClientPkg/Include/Protocol/EdkIIRedfishInterchangeData.h
+++ b/RedfishClientPkg/Include/Protocol/EdkIIRedfishInterchangeData.h
@@ -2,6 +2,7 @@
   This file defines the EDKII_REDFISH_FEATURE_INTERCHANGE_DATA_PROTOCOL 
interface.
 
   (C) Copyright 2022 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -10,7 +11,21 @@
 #ifndef EDKII_REDFISH_FEATURE_INTERCHANGE_DATA_H_
 #define EDKII_REDFISH_FEATURE_INTERCHANGE_DATA_H_
 
-#include 
+//
+// Definition of REDFISH_FEATURE_ARRAY_TYPE_CONFIG_LANG
+//

[edk2-devel] Recall: [edk2-platfoms][PATCH V1] WhitleySiliconPkg : Resolve boot errors when synching to edk2-stable202302

2023-03-15 Thread Ramkumar Krishnamoorthi via groups.io
Ramkumar Krishnamoorthi would like to recall the message, 
"[edk2-platfoms][PATCH V1] WhitleySiliconPkg : Resolve boot errors when 
synching to edk2-stable202302".
-The information contained in this message may be confidential and proprietary 
to American Megatrends (AMI). This communication is intended to be read only by 
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reader of this message is not the intended recipient, you are on notice that 
any distribution of this message, in any form, is strictly prohibited. Please 
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[edk2-devel] [edk2-platfoms][PATCH V1] WhitleySiliconPkg : Resolve boot errors when synching to edk2-stable202302

2023-03-15 Thread Ramkumar Krishnamoorthi via groups.io
Subject: [edk2-platfoms][PATCH V1] WhitleySiliconPkg : Resolve boot errors when 
synching to edk2-stable202302

Fix to resolve the boot error - Rearrange the enum constants
TypeJunctionCity and TypeAowanda in PlatformInfoTypes.h
according to PcdBoardId value.

Cc: Harikrishna Doppalapudi 
Cc: Sureshkumar Ponnusamy 
Cc: Manickavasakam Karpagavinayagam 
Cc: Selvaraj V 
Cc: Ramkumar K 
Cc: Isaac Oram 
Cc: Nate DeSimone 


Signed-off-by: Ramkumar K 
---
 Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h 
b/Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h
index 0c14a2409f..d9a9325b22 100644
--- a/Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h
+++ b/Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h
@@ -2,7 +2,7 @@

   @copyright
   Copyright 2020 - 2021 Intel Corporation. 
-  Copyright (c) 2021 - 2022, American Megatrends International LLC. 
+  Copyright (c) 2021 - 2023, American Megatrends International LLC. 

   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
@@ -64,14 +64,14 @@ typedef enum {
   TypeArcherCityXPV,
   TypeBigPineKey,
   TypeExperWorkStationRP,
+  TypeJunctionCity,
+  TypeAowanda,
   TypeAmericanPass,
   EndOfEfiPlatformTypeEnum,
   //
   // Vendor board range currently starts at 0x80
   //
   TypeBoardPortTemplate,   // 0x80
-  TypeJunctionCity,
-  TypeAowanda,
   EndOfVendorPlatformTypeEnum
 } EFI_PLATFORM_TYPE;

--
2.37.1.windows.1
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[edk2-devel] [PATCH V1 1/1] OvmfPkg/TdxHelperLib: Check the HobLength of EFI_HOB_GUID_TYPE

2023-03-15 Thread sunceping
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4364

Currently, the length of type EFI_HOB_TYPE_GUID_EXTENSION is not checked
because it is variable length data. This might give a chance to an buffer
overflow issue.

Fix this by checking the HobLength of EFI_HOB_GUID_TYPE to make sure that
it is legal. In the meantime, the total size of TdHob is checked to ensure
the Hobs in TdHob would not overflow.

Cc: Erdem Aktas 
Cc: James Bottomley 
Cc: Jiewen Yao 
Cc: Min Xu 
Cc: Tom Lendacky 
Cc: Michael Roth 
Signed-off-by: Sun Ceping 
---
 OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelper.c  | 20 ++-
 .../IntelTdx/TdxHelperLib/SecTdxHelperLib.inf |  1 +
 2 files changed, 20 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelper.c 
b/OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelper.c
index 3372cee2f720..818a6932cf66 100644
--- a/OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelper.c
+++ b/OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelper.c
@@ -566,11 +566,17 @@ ValidateHobList (
 BZ3937_EFI_RESOURCE_MEMORY_UNACCEPTED
   };
 
+  UINT32  TotalSize;
+  UINT32  TDHobSize;
+
   if (VmmHobList == NULL) {
 DEBUG ((DEBUG_ERROR, "HOB: HOB data pointer is NULL\n"));
 return FALSE;
   }
 
+  TotalSize = 0;
+  TDHobSize = (UINT32)FixedPcdGet32 (PcdOvmfSecGhcbSize);
+
   Hob.Raw = (UINT8 *)VmmHobList;
 
   //
@@ -587,6 +593,12 @@ ValidateHobList (
   return FALSE;
 }
 
+TotalSize += Hob.Header->HobLength;
+if (TotalSize > TDHobSize) {
+  DEBUG ((DEBUG_ERROR, "HOB: TD Hob Size was overflow. Totalsize is  
0x%x\n", TotalSize));
+  return FALSE;
+}
+
 switch (Hob.Header->HobType) {
   case EFI_HOB_TYPE_HANDOFF:
 if (Hob.Header->HobLength != sizeof (EFI_HOB_HANDOFF_INFO_TABLE)) {
@@ -651,8 +663,14 @@ ValidateHobList (
 
 break;
 
-  // EFI_HOB_GUID_TYPE is variable length data, so skip check
+  // EFI_HOB_GUID_TYPE is variable length data. The total size of the 
TdHob list is checked at the beginning of the loop.
+  // So we only need to check the min size of the HOB.
   case EFI_HOB_TYPE_GUID_EXTENSION:
+if (Hob.Header->HobLength < sizeof (EFI_HOB_GUID_TYPE)) {
+  DEBUG ((DEBUG_ERROR, "HOB: Hob length is not less than corresponding 
hob structure. Type: 0x%04x\n", EFI_HOB_TYPE_GUID_EXTENSION));
+  return FALSE;
+}
+
 break;
 
   case EFI_HOB_TYPE_FV:
diff --git a/OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelperLib.inf 
b/OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelperLib.inf
index d17b84c01f20..d5859588536b 100644
--- a/OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelperLib.inf
+++ b/OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelperLib.inf
@@ -46,6 +46,7 @@
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase
   gUefiOvmfPkgTokenSpaceGuid.PcdTdxAcceptPageSize
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase
   gUefiOvmfPkgTokenSpaceGuid.PcdCfvRawDataSize
 
-- 
2.34.1



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[edk2-devel] [edk2-platfoms][PATCH V1] WhitleySiliconPkg : Resolve boot errors when synching to edk2-stable202302

2023-03-15 Thread Ramkumar Krishnamoorthi via groups.io
Subject: [edk2-platfoms][PATCH V1] WhitleySiliconPkg : Resolve boot errors when 
synching to edk2-stable202302

Fix to resolve the boot error - Rearrange the enum constants
TypeJunctionCity and TypeAowanda in PlatformInfoTypes.h
according to PcdBoardId value.

Cc: Harikrishna Doppalapudi 
Cc: Sureshkumar Ponnusamy 
Cc: Manickavasakam Karpagavinayagam 
Cc: Selvaraj V 
Cc: Ramkumar K 
Cc: Isaac Oram isaac.w.o...@intel.com
Cc: Nate DeSimone 


Signed-off-by: Ramkumark 
---
 Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h 
b/Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h
index 0c14a2409f..d9a9325b22 100644
--- a/Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h
+++ b/Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h
@@ -2,7 +2,7 @@

   @copyright
   Copyright 2020 - 2021 Intel Corporation. 
-  Copyright (c) 2021 - 2022, American Megatrends International LLC. 
+  Copyright (c) 2021 - 2023, American Megatrends International LLC. 

   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
@@ -64,14 +64,14 @@ typedef enum {
   TypeArcherCityXPV,
   TypeBigPineKey,
   TypeExperWorkStationRP,
+  TypeJunctionCity,
+  TypeAowanda,
   TypeAmericanPass,
   EndOfEfiPlatformTypeEnum,
   //
   // Vendor board range currently starts at 0x80
   //
   TypeBoardPortTemplate,   // 0x80
-  TypeJunctionCity,
-  TypeAowanda,
   EndOfVendorPlatformTypeEnum
 } EFI_PLATFORM_TYPE;

--
2.37.1.windows.1
-The information contained in this message may be confidential and proprietary 
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then delete or destroy all copies of the transmission.


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[edk2-devel] Recall: [edk2-platfoms][PATCH V1] WhitleySiliconPkg : Resolve boot errors when synching to edk2-stable202302

2023-03-15 Thread ramkumark via []
Ramkumar Krishnamoorthi would like to recall the message, 
"[edk2-platfoms][PATCH V1] WhitleySiliconPkg : Resolve boot errors when 
synching to edk2-stable202302".
-The information contained in this message may be confidential and proprietary 
to American Megatrends (AMI). This communication is intended to be read only by 
the individual or entity to whom it is addressed or by their designee. If the 
reader of this message is not the intended recipient, you are on notice that 
any distribution of this message, in any form, is strictly prohibited. Please 
promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and 
then delete or destroy all copies of the transmission.


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Re: [edk2-devel] [PATCH 3/3] ShellPkg/TftpDynamicCommand.inf: Add missing DEPEX

2023-03-15 Thread Gao, Zhichao
Did you make sure the change would really fix the issue?
Just add the DEPX would only make sure the protocol is installed but not 
installed to the image handle. The return value would be still error code.
And the issue is still there.

The HII image related protocol should not be the MUST have for the application. 
Using the DEBUG ASSERT is not appropriate. I would suggest to remove the ASSERT 
instead.

Thanks,
Zhichao

From: devel@edk2.groups.io  On Behalf Of Sheng Lean Tan
Sent: Thursday, March 16, 2023 12:54 AM
To: devel@edk2.groups.io; Rudolph, Patrick ; 
Gao, Zhichao 
Cc: Dong, Guo ; Ni, Ray ; Rhodes, Sean 
; Lu, James ; Guo, Gua 

Subject: Re: [edk2-devel] [PATCH 3/3] ShellPkg/TftpDynamicCommand.inf: Add 
missing DEPEX

Added Zhichao.



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Re: [edk2-devel] [PATCH 1/3] BaseTools/Conf/tools_def: Fix linking using CLANGDWARF_IA32_X64

2023-03-15 Thread Ard Biesheuvel
On Wed, 15 Mar 2023 at 23:57, Marvin Häuser  wrote:
>
>
> > On 15. Mar 2023, at 23:51, Ard Biesheuvel  wrote:
> >
> > On Wed, 15 Mar 2023 at 23:16, Marvin Häuser  wrote:
> >>
> >> Hi,
> >>
> >> Why does the title mention X64? From what I can see, PIE is unaffected for 
> >> X64 (and we really want it to be).
> >>
> >
> > Why?
>
> Why what? By “PIE is unaffected for X64” I meant by the patch (which only 
> changes IA32 macros, no?). I can also see how the last part is a bit 
> ambiguous, but I meant it literally - we really want X64 to be [unaffected] 
> (which it is, by the patch, but the title implies otherwise, doesn’t it?).
>

OK, i got confused. Thanks for clearing that up for me :-)


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Re: [edk2-devel] [PATCH 1/3] BaseTools/Conf/tools_def: Fix linking using CLANGDWARF_IA32_X64

2023-03-15 Thread Marvin Häuser


> On 15. Mar 2023, at 23:51, Ard Biesheuvel  wrote:
> 
> On Wed, 15 Mar 2023 at 23:16, Marvin Häuser  wrote:
>> 
>> Hi,
>> 
>> Why does the title mention X64? From what I can see, PIE is unaffected for 
>> X64 (and we really want it to be).
>> 
> 
> Why?

Why what? By “PIE is unaffected for X64” I meant by the patch (which only 
changes IA32 macros, no?). I can also see how the last part is a bit ambiguous, 
but I meant it literally - we really want X64 to be [unaffected] (which it is, 
by the patch, but the title implies otherwise, doesn’t it?).

Best regards,
Marvin


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Re: [edk2-devel] [PATCH 1/3] BaseTools/Conf/tools_def: Fix linking using CLANGDWARF_IA32_X64

2023-03-15 Thread Ard Biesheuvel
On Wed, 15 Mar 2023 at 23:16, Marvin Häuser  wrote:
>
> Hi,
>
> Why does the title mention X64? From what I can see, PIE is unaffected for 
> X64 (and we really want it to be).
>

Why?


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Re: [edk2-devel] [edk2-platforms] Enable GitHub PR, protected branches, and 'push' label

2023-03-15 Thread Michael D Kinney
Hi Marvin,

One of the long standing requirements for tianocore is to have a history of all 
patch series and all
code review activity archived in the mailing list.

Adopting the full PR workflow right now for even a portion of edk2-platforms 
would have a gap in the
history of patch series and review comments.

edk2-staging repo branches can choose to use this style if they want, but when 
content is migrated from
edk2-staging into main repos, we want the email archive for that activity.

Mike

From: Marvin Häuser 
Sent: Wednesday, March 15, 2023 3:24 PM
To: Kinney, Michael D ; devel@edk2.groups.io
Subject: Re: [edk2-devel] [edk2-platforms] Enable GitHub PR, protected 
branches, and 'push' label

Hi Mike,

Could this be extended to allow for a full PR workflow, if the package 
maintainers would prefer so? We would like to utilise this for Ext4Pkg. It 
could be considered a trial. :)

Best regards,
Marvin


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Re: [edk2-devel] [edk2-platforms] Enable GitHub PR, protected branches, and 'push' label

2023-03-15 Thread Marvin Häuser
Hi Mike,

Could this be extended to allow for a full PR workflow, if the package 
maintainers would prefer so? We would like to utilise this for Ext4Pkg. It 
could be considered a trial. :)

Best regards,
Marvin


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Re: [edk2-devel] [PATCH 1/3] BaseTools/Conf/tools_def: Fix linking using CLANGDWARF_IA32_X64

2023-03-15 Thread Marvin Häuser
Hi,

Why does the title mention X64? From what I can see, PIE is unaffected for X64 
(and we really want it to be).

Best regards,
Marvin


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[edk2-devel] [PATCH RESEND 4/4] OvmfPkg/CcExitLib: Use documented XSave area base size for SEV-SNP

2023-03-15 Thread Roth, Michael via groups.io
Currently OVMF tries to rely on the base size advertised via the CPUID
table entries corresponding to leaf 0xD, sub-leafs 0x0/0x1. This will
generally work for KVM guests, but might not for other SEV-SNP
hypervisor implementations. Make the handling more robust by simply
using the base area size documented by the APM.

Reviewed-by: Tom Lendacky 
Acked-by: Jiewen Yao 
Signed-off-by: Michael Roth 
---
 OvmfPkg/Library/CcExitLib/CcExitVcHandler.c | 9 -
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c 
b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
index 94f0c4872c..0fc30f7bc4 100644
--- a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
+++ b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
@@ -1114,8 +1114,6 @@ SnpEnabled (
 

   @param[in]  XFeaturesEnabled  Bit-mask of enabled XSAVE features/areas as

 indicated by XCR0/MSR_IA32_XSS bits

-  @param[in]  XSaveBaseSize Base/legacy XSAVE area size (e.g. when

-XCR0 is 1)

   @param[in, out] XSaveSize Pointer to storage for calculated XSAVE 
area

 size

   @param[in]  Compacted Whether or not the calculation is for the

@@ -1130,7 +1128,6 @@ STATIC
 BOOLEAN

 GetCpuidXSaveSize (

   IN UINT64   XFeaturesEnabled,

-  IN UINT32   XSaveBaseSize,

   IN OUT UINT32   *XSaveSize,

   IN BOOLEAN  Compacted

   )

@@ -1139,7 +1136,10 @@ GetCpuidXSaveSize (
   UINT64  XFeaturesFound = 0;

   UINT32  Idx;

 

-  *XSaveSize = XSaveBaseSize;

+  //

+  // The base/legacy XSave size is documented to be 0x240 in the APM.

+  //

+  *XSaveSize = 0x240;

   CpuidInfo  = (SEV_SNP_CPUID_INFO *)(UINT64)PcdGet32 (PcdOvmfCpuidBase);

 

   for (Idx = 0; Idx < CpuidInfo->Count; Idx++) {

@@ -1355,7 +1355,6 @@ GetCpuidFw (
 

 if (!GetCpuidXSaveSize (

XCr0 | XssMsr.Uint64,

-   *Ebx,

&XSaveSize,

Compacted

))

-- 
2.25.1



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[edk2-devel] [PATCH RESEND 3/4] OvmfPkg/CcExitLib: Fix SEV-SNP XSave area size calculation

2023-03-15 Thread Roth, Michael via groups.io
CPUID leaf 0xD sub-leafs 0x0 and 0x1 contain cumulative sizes for the
enabled XSave areas. Those sizes are calculated by tallying up all the
other sub-leafs that contain per-area size information for XSave areas
that are currently enabled in XCr0/XSS. The current check has the logic
inverted. Fix that.

This doesn't seem to cause problems currently, but could in the future
if OVMF made more extensive use of XSave areas. It was noticed while
implementing SNP-related tests for KVM Unit Tests, which re-uses the
OVMF #VC handler in some cases.

Reported-by: Pavan Kumar Paluri 
Cc: Pavan Kumar Paluri 
Reviewed-by: Tom Lendacky 
Acked-by: Jiewen Yao 
Signed-off-by: Michael Roth 
---
 OvmfPkg/Library/CcExitLib/CcExitVcHandler.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c 
b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
index 7fe11c5324..94f0c4872c 100644
--- a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
+++ b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
@@ -1145,9 +1145,7 @@ GetCpuidXSaveSize (
   for (Idx = 0; Idx < CpuidInfo->Count; Idx++) {

 SEV_SNP_CPUID_FUNCTION  *CpuidFn = &CpuidInfo->function[Idx];

 

-if (!((CpuidFn->EaxIn == 0xD) &&

-  ((CpuidFn->EcxIn == 0) || (CpuidFn->EcxIn == 1

-{

+if (!((CpuidFn->EaxIn == 0xD) && (CpuidFn->EcxIn > 1))) {

   continue;

 }

 

-- 
2.25.1



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[edk2-devel] [PATCH RESEND 2/4] OvmfPkg/AmdSevDxe: Update ConfidentialComputing blob struct definition

2023-03-15 Thread Roth, Michael via groups.io
The Confidential Computing blob defined here is intended to match the
definition defined by linux guest kernel. Previously, both definitions
relied on natural alignment, but that relies on both OVMF and kernel
being compiled as 64-bit. While there aren't currently any plans to
enable SNP support for 32-bit compilations, the kernel definition has
since been updated to use explicit padding/reserved fields to avoid
this dependency. Update OVMF to match that definition.

While at it, also fix up the Reserved fields to match the numbering
used in the kernel.

No functional changes (for currently-supported environments, at least).

Reviewed-by: Tom Lendacky 
Acked-by: Jiewen Yao 
Signed-off-by: Michael Roth 
---
 OvmfPkg/AmdSevDxe/AmdSevDxe.c  | 4 +++-
 OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h | 6 --
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/OvmfPkg/AmdSevDxe/AmdSevDxe.c b/OvmfPkg/AmdSevDxe/AmdSevDxe.c
index 7250cc90e5..cf074f2c89 100644
--- a/OvmfPkg/AmdSevDxe/AmdSevDxe.c
+++ b/OvmfPkg/AmdSevDxe/AmdSevDxe.c
@@ -48,11 +48,13 @@ AllocateConfidentialComputingBlob (
 

   CcBlob->Header = SIGNATURE_32 ('A', 'M', 'D', 'E');

   CcBlob->Version= 1;

-  CcBlob->Reserved1  = 0;

+  CcBlob->Reserved   = 0;

   CcBlob->SecretsPhysicalAddress = (UINT64)(UINTN)FixedPcdGet32 
(PcdOvmfSnpSecretsBase);

   CcBlob->SecretsSize= FixedPcdGet32 (PcdOvmfSnpSecretsSize);

+  CcBlob->Reserved1  = 0;

   CcBlob->CpuidPhysicalAddress   = (UINT64)(UINTN)FixedPcdGet32 
(PcdOvmfCpuidBase);

   CcBlob->CpuidLSize = FixedPcdGet32 (PcdOvmfCpuidSize);

+  CcBlob->Reserved2  = 0;

 

   *CcBlobPtr = CcBlob;

 

diff --git a/OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h 
b/OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h
index b328310fd0..83620e31b8 100644
--- a/OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h
+++ b/OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h
@@ -18,14 +18,16 @@
 { 0x85, 0x54, 0x93, 0xd7, 0x77, 0x91, 0x2d, 0x42 }, \

   }

 

-typedef struct {

+typedef PACKED struct {

   UINT32Header;

   UINT16Version;

-  UINT16Reserved1;

+  UINT16Reserved;

   UINT64SecretsPhysicalAddress;

   UINT32SecretsSize;

+  UINT32Reserved1;

   UINT64CpuidPhysicalAddress;

   UINT32CpuidLSize;

+  UINT32Reserved2;

 } CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION;

 

 extern EFI_GUID  gConfidentialComputingSevSnpBlobGuid;

-- 
2.25.1



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[edk2-devel] [PATCH RESEND 1/4] OvmfPkg/AmdSevDxe: Allocate SEV-SNP CC blob as EfiACPIReclaimMemory

2023-03-15 Thread Roth, Michael via groups.io
The SEV-SNP Confidential Computing blob contains metadata that should
remain accessible for the life of the guest. Allocate it as
EfiACPIReclaimMemory to ensure the memory isn't overwritten by the guest
operating system later.

Reported-by: Dov Murik 
Suggested-by: Dov Murik 
Reviewed-by: Dov Murik 
Reviewed-by: Tom Lendacky 
Signed-off-by: Michael Roth 
---
 OvmfPkg/AmdSevDxe/AmdSevDxe.c | 62 +++
 1 file changed, 48 insertions(+), 14 deletions(-)

diff --git a/OvmfPkg/AmdSevDxe/AmdSevDxe.c b/OvmfPkg/AmdSevDxe/AmdSevDxe.c
index a726498e27..7250cc90e5 100644
--- a/OvmfPkg/AmdSevDxe/AmdSevDxe.c
+++ b/OvmfPkg/AmdSevDxe/AmdSevDxe.c
@@ -28,15 +28,36 @@
 // Present, initialized, tested bits defined in MdeModulePkg/Core/Dxe/DxeMain.h

 #define EFI_MEMORY_INTERNAL_MASK  0x0700ULL

 

-STATIC CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION  mSnpBootDxeTable = {

-  SIGNATURE_32 ('A','M', 'D', 'E'),

-  1,

-  0,

-  (UINT64)(UINTN)FixedPcdGet32 (PcdOvmfSnpSecretsBase),

-  FixedPcdGet32 (PcdOvmfSnpSecretsSize),

-  (UINT64)(UINTN)FixedPcdGet32 (PcdOvmfCpuidBase),

-  FixedPcdGet32 (PcdOvmfCpuidSize),

-};

+STATIC

+EFI_STATUS

+AllocateConfidentialComputingBlob (

+  OUT CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION  **CcBlobPtr

+  )

+{

+  EFI_STATUSStatus;

+  CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION  *CcBlob;

+

+  Status = gBS->AllocatePool (

+  EfiACPIReclaimMemory,

+  sizeof (CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION),

+  (VOID **)&CcBlob

+  );

+  if (EFI_ERROR (Status)) {

+return Status;

+  }

+

+  CcBlob->Header = SIGNATURE_32 ('A', 'M', 'D', 'E');

+  CcBlob->Version= 1;

+  CcBlob->Reserved1  = 0;

+  CcBlob->SecretsPhysicalAddress = (UINT64)(UINTN)FixedPcdGet32 
(PcdOvmfSnpSecretsBase);

+  CcBlob->SecretsSize= FixedPcdGet32 (PcdOvmfSnpSecretsSize);

+  CcBlob->CpuidPhysicalAddress   = (UINT64)(UINTN)FixedPcdGet32 
(PcdOvmfCpuidBase);

+  CcBlob->CpuidLSize = FixedPcdGet32 (PcdOvmfCpuidSize);

+

+  *CcBlobPtr = CcBlob;

+

+  return EFI_SUCCESS;

+}

 

 STATIC EFI_HANDLE  mAmdSevDxeHandle = NULL;

 

@@ -177,10 +198,11 @@ AmdSevDxeEntryPoint (
   IN EFI_SYSTEM_TABLE  *SystemTable

   )

 {

-  EFI_STATUS   Status;

-  EFI_GCD_MEMORY_SPACE_DESCRIPTOR  *AllDescMap;

-  UINTNNumEntries;

-  UINTNIndex;

+  EFI_STATUSStatus;

+  EFI_GCD_MEMORY_SPACE_DESCRIPTOR   *AllDescMap;

+  UINTN NumEntries;

+  UINTN Index;

+  CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION  *SnpBootDxeTable;

 

   //

   // Do nothing when SEV is not enabled

@@ -286,6 +308,18 @@ AmdSevDxeEntryPoint (
 }

   }

 

+  Status = AllocateConfidentialComputingBlob (&SnpBootDxeTable);

+  if (EFI_ERROR (Status)) {

+DEBUG ((

+  DEBUG_ERROR,

+  "%a: AllocateConfidentialComputingBlob(): %r\n",

+  __FUNCTION__,

+  Status

+  ));

+ASSERT (FALSE);

+CpuDeadLoop ();

+  }

+

   if (MemEncryptSevSnpIsEnabled ()) {

 //

 // Memory acceptance began being required in SEV-SNP, so install the

@@ -323,7 +357,7 @@ AmdSevDxeEntryPoint (
 //

 return gBS->InstallConfigurationTable (

   &gConfidentialComputingSevSnpBlobGuid,

-  &mSnpBootDxeTable

+  SnpBootDxeTable

   );

   }

 

-- 
2.25.1



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[edk2-devel] [PATCH RESEND 0/4] Fixes for SEV-SNP CC blob and CPUID table handling

2023-03-15 Thread Roth, Michael via groups.io
(Rebased series and resending due to merge conflict with previous
submission.)

Here are a number of fixes related to OVMF handling of the SEV-SNP
Confidential Computing blob and CPUID table.

Patch #1 is a fix for recently-reported issue that can cause
significant problems with some SEV-SNP guest operating systems.
Please consider applying this patch directly if the other
patches in this series are held up for any reason.

Patches 2-4 are minor changes for things that aren't currently
triggered in practice, but make OVMF's SEV-SNP implementation more
robust for different build/hypervisor environments in the future.
Patch #2 was submitted previously, but refreshed here to apply
cleanly on top of Patch #1, with no other functional changes since
the initial review.


Michael Roth (4):
  OvmfPkg/AmdSevDxe: Allocate SEV-SNP CC blob as EfiACPIReclaimMemory
  OvmfPkg/AmdSevDxe: Update ConfidentialComputing blob struct definition
  OvmfPkg/CcExitLib: Fix SEV-SNP XSave area size calculation
  OvmfPkg/CcExitLib: Use documented XSave area base size for SEV-SNP

 OvmfPkg/AmdSevDxe/AmdSevDxe.c  | 64 
++--
 OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h |  6 --
 OvmfPkg/Library/CcExitLib/CcExitVcHandler.c| 13 +
 3 files changed, 59 insertions(+), 24 deletions(-)




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[edk2-devel] [edk2-platforms] Enable GitHub PR, protected branches, and 'push' label

2023-03-15 Thread Michael D Kinney
This is a proposal to enable the GitHub PR feature on the edk2-platforms
repository and enable branch protections that would require maintainers
to set a 'push' label to merge change into edk2-platforms.  The same
process that is already in place on the edk2 repository.

The initial change would not have any CI checks enabled.  Plans to enable
CI on the edk2-platforms repository are being evaluated and will be 
communicated before they are enabled.

Please provide feedback on this proposal by 3/24/2023.

Thanks,

Mike


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Re: [edk2-devel] [PATCH v5 11/38] ArmPkg/CpuDxe: Implement EFI memory attributes protocol

2023-03-15 Thread Leif Lindholm
On Mon, Mar 13, 2023 at 18:16:47 +0100, Ard Biesheuvel wrote:
> Expose the protocol introduced in v2.10 that permits the caller to
> manage mapping permissions in the page tables.

Nitpicks and a question:

> Signed-off-by: Ard Biesheuvel 
> ---
>  ArmPkg/Drivers/CpuDxe/CpuDxe.c  |   2 +
>  ArmPkg/Drivers/CpuDxe/CpuDxe.h  |   3 +
>  ArmPkg/Drivers/CpuDxe/CpuDxe.inf|   2 +
>  ArmPkg/Drivers/CpuDxe/MemoryAttribute.c | 271 
>  4 files changed, 278 insertions(+)
> 
> diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.c b/ArmPkg/Drivers/CpuDxe/CpuDxe.c
> index e6742f0a25fc..d04958e79e52 100644
> --- a/ArmPkg/Drivers/CpuDxe/CpuDxe.c
> +++ b/ArmPkg/Drivers/CpuDxe/CpuDxe.c
> @@ -244,6 +244,8 @@ CpuDxeInitialize (
>&mCpuHandle,
>&gEfiCpuArchProtocolGuid,
>&mCpu,
> +  &gEfiMemoryAttributeProtocolGuid,
> +  &mMemoryAttribute,
>NULL
>);
>  
> diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.h b/ArmPkg/Drivers/CpuDxe/CpuDxe.h
> index 8cb105dcc841..ce2981361aca 100644
> --- a/ArmPkg/Drivers/CpuDxe/CpuDxe.h
> +++ b/ArmPkg/Drivers/CpuDxe/CpuDxe.h
> @@ -30,9 +30,12 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  extern BOOLEAN  mIsFlushingGCD;
>  
> +extern EFI_MEMORY_ATTRIBUTE_PROTOCOL  mMemoryAttribute;
> +
>  /**
>This function registers and enables the handler specified by 
> InterruptHandler for a processor
>interrupt or exception type specified by InterruptType. If 
> InterruptHandler is NULL, then the
> diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.inf 
> b/ArmPkg/Drivers/CpuDxe/CpuDxe.inf
> index 10792b393fc8..e732e21cb94a 100644
> --- a/ArmPkg/Drivers/CpuDxe/CpuDxe.inf
> +++ b/ArmPkg/Drivers/CpuDxe/CpuDxe.inf
> @@ -23,6 +23,7 @@ [Sources.Common]
>CpuDxe.h
>CpuMmuCommon.c
>Exception.c
> +  MemoryAttribute.c
>  
>  [Sources.ARM]
>Arm/Mmu.c
> @@ -53,6 +54,7 @@ [LibraryClasses]
>  
>  [Protocols]
>gEfiCpuArchProtocolGuid
> +  gEfiMemoryAttributeProtocolGuid
>  
>  [Guids]
>gEfiDebugImageInfoTableGuid
> diff --git a/ArmPkg/Drivers/CpuDxe/MemoryAttribute.c 
> b/ArmPkg/Drivers/CpuDxe/MemoryAttribute.c
> new file mode 100644
> index ..b47464c0269e
> --- /dev/null
> +++ b/ArmPkg/Drivers/CpuDxe/MemoryAttribute.c
> @@ -0,0 +1,271 @@
> +/** @file
> +
> +  Copyright (c) 2023, Google LLC. All rights reserved.
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "CpuDxe.h"
> +
> +/**
> +  This function retrieves the attributes of the memory region specified by
> +  BaseAddress and Length. If different attributes are got from different part

"from different part" -> "for different parts"?

> +  of the memory region, EFI_NO_MAPPING will be returned.
> +
> +  @param  This  The EFI_MEMORY_ATTRIBUTE_PROTOCOL instance.
> +  @param  BaseAddress   The physical address that is the start address of
> +a memory region.
> +  @param  LengthThe size in bytes of the memory region.
> +  @param  AttributesPointer to attributes returned.
> +
> +  @retval EFI_SUCCESS   The attributes got for the memory region.
> +  @retval EFI_INVALID_PARAMETER Length is zero.
> +Attributes is NULL.
> +  @retval EFI_NO_MAPPINGAttributes are not consistent cross the 
> memory
> +region.
> +  @retval EFI_UNSUPPORTED   The processor does not support one or more
> +bytes of the memory resource range specified
> +by BaseAddress and Length.

Question: this implementation never returns EFI_UNSUPPORTED.
Is this seen as a "some architectures may have some restricted ranges
not configurable by MMU" which simply does not apply for ARM* -
i.e. the operation is considered "supported" even if on a region not
backed by anything?

> +
> +**/
> +STATIC
> +EFI_STATUS
> +GetMemoryAttributes (
> +  IN  EFI_MEMORY_ATTRIBUTE_PROTOCOL  *This,
> +  IN  EFI_PHYSICAL_ADDRESS   BaseAddress,
> +  IN  UINT64 Length,
> +  OUT UINT64 *Attributes
> +  )
> +{
> +  UINTN   RegionAddress;
> +  UINTN   RegionLength;
> +  UINTN   RegionAttributes;
> +  UINTN   Union;
> +  UINTN   Intersection;
> +  EFI_STATUS  Status;
> +
> +  if ((Length == 0) || (Attributes == NULL)) {
> +return EFI_INVALID_PARAMETER;
> +  }
> +
> +  DEBUG ((
> +DEBUG_VERBOSE,
> +"%a: BaseAddress == 0x%lx, Length == 0x%lx\n",
> +__FUNCTION__,
> +BaseAddress,
> +Length
> +));
> +
> +  Union= 0;
> +  Intersection = MAX_UINTN;
> +
> +  for (RegionAddress = (UINTN)BaseAddress;
> +   RegionAddress < (UINTN)(BaseAddress + Length);
> +   RegionAddress += RegionLength)
> +  {
> +Status = GetMemoryRegion (
> +   &RegionAddress,
> +   &RegionLength,
>

Re: [edk2-devel] [PATCH v5 09/38] ArmPkg/CpuDxe: Expose unified region-to-EFI attribute conversion

2023-03-15 Thread Leif Lindholm
On Mon, Mar 13, 2023 at 18:16:45 +0100, Ard Biesheuvel wrote:
> In preparation for introducing an implementation of the EFI memory
> attributes protocol that is shared between ARM and AArch64, unify the
> existing code that converts a page table descriptor into a
> EFI_MEMORY_xxx bitfield, so it can be called from the generic code.

Two bits of nitpicking:
1) You use _xxx from here and _xx in the comments below.

> 
> Signed-off-by: Ard Biesheuvel 
> ---
>  ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c | 17 +
>  ArmPkg/Drivers/CpuDxe/Arm/Mmu.c | 38 
>  ArmPkg/Drivers/CpuDxe/CpuDxe.h  | 14 
>  3 files changed, 69 insertions(+)
> 
> diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c 
> b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
> index 8bda11f08a30..4a416743fb8a 100644
> --- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
> +++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
> @@ -83,6 +83,23 @@ PageAttributeToGcdAttribute (
>return GcdAttributes;
>  }
>  
> +/**
> +  Convert a arch specific set of page attributes into a mask

"an arch"
(and again x2 below)

Reviewed-by: Leif Lindholm 

> +  of EFI_MEMORY_xx constants.
> +
> +  @param  PageAttributes  The set of page attributes.
> +
> +  @retval The mask of EFI_MEMORY_xx constants.
> +
> +**/
> +UINT64
> +RegionAttributeToGcdAttribute (
> +  IN UINTN  PageAttributes
> +  )
> +{
> +  return PageAttributeToGcdAttribute (PageAttributes);
> +}
> +
>  STATIC
>  UINT64
>  GetFirstPageAttribute (
> diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
> index 07faab8216ec..8e0dd5d2aaca 100644
> --- a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
> +++ b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
> @@ -13,6 +13,15 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
>  #include 
>  #include "CpuDxe.h"
>  
> +/**
> +  Convert a set of ARM short descriptor section attributes into a mask
> +  of EFI_MEMORY_xx constants.
> +
> +  @param  SectionAttributes   The set of page attributes.
> +  @param  GcdAttributes   Pointer to the return value.
> +
> +**/
> +STATIC
>  EFI_STATUS
>  SectionToGcdAttributes (
>IN  UINT32  SectionAttributes,
> @@ -74,6 +83,35 @@ SectionToGcdAttributes (
>return EFI_SUCCESS;
>  }
>  
> +/**
> +  Convert a arch specific set of page attributes into a mask
> +  of EFI_MEMORY_xx constants.
> +
> +  @param  PageAttributes  The set of page attributes.
> +
> +  @retval The mask of EFI_MEMORY_xx constants.
> +
> +**/
> +UINT64
> +RegionAttributeToGcdAttribute (
> +  IN UINTN  PageAttributes
> +  )
> +{
> +  UINT64  Result;
> +
> +  SectionToGcdAttributes (PageAttributes, &Result);
> +  return Result;
> +}
> +
> +/**
> +  Convert a set of ARM short descriptor page attributes into a mask
> +  of EFI_MEMORY_xx constants.
> +
> +  @param  PageAttributes  The set of page attributes.
> +  @param  GcdAttributes   Pointer to the return value.
> +
> +**/
> +STATIC
>  EFI_STATUS
>  PageToGcdAttributes (
>IN  UINT32  PageAttributes,
> diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.h b/ArmPkg/Drivers/CpuDxe/CpuDxe.h
> index ff672390ce51..8cb105dcc841 100644
> --- a/ArmPkg/Drivers/CpuDxe/CpuDxe.h
> +++ b/ArmPkg/Drivers/CpuDxe/CpuDxe.h
> @@ -126,4 +126,18 @@ SetGcdMemorySpaceAttributes (
>IN UINT64   Attributes
>);
>  
> +/**
> +  Convert a arch specific set of page attributes into a mask
> +  of EFI_MEMORY_xx constants.
> +
> +  @param  PageAttributes  The set of page attributes.
> +
> +  @retval The mask of EFI_MEMORY_xx constants.
> +
> +**/
> +UINT64
> +RegionAttributeToGcdAttribute (
> +  IN UINTN  PageAttributes
> +  );
> +
>  #endif // CPU_DXE_H_
> -- 
> 2.39.2
> 
> 
> 
> 
> 
> 


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Re: [edk2-devel] [PATCH v5 08/38] ArmPkg/ArmMmuLib: Avoid splitting block entries if possible

2023-03-15 Thread Leif Lindholm
On Tue, Mar 14, 2023 at 19:29:39 +0100, Ard Biesheuvel wrote:
> On Tue, 14 Mar 2023 at 19:13, Leif Lindholm  wrote:
> >
> > On Mon, Mar 13, 2023 at 18:16:44 +0100, Ard Biesheuvel wrote:
> > > Currently, the ARM MMU page table logic will break down any block entry
> > > that overlaps with the region being mapped, even if the block entry in
> > > question is using the same attributes as the new region.
> > >
> > > This means that creating a non-executable mapping inside a region that
> > > is already mapped non-executable at a coarser granularity may trigger a
> > > call to AllocatePages (), which may recurse back into the page table
> > > code to update the attributes on the newly allocated page tables.
> > >
> > > Let's avoid this, by preserving the block entry if it already covers the
> > > region being mapped with the correct attributes.
> >
> > So if a later mapping is made inside the same block with conflicting
> > attributes? That triggers the break down at that point and because the
> > existing mapping did not conflict, it'll all flush out?
> >
> 
> Indeed.
> 
> The case here is simply, e.g., mapping a single page XP that is
> already covered by a 2 MB XP block: without this patch, we break down
> that 2 MB block into page mappings that all have the same attributes.
> If the 4k page being remapped is being allocated for a page table, we
> may end up with unbounded recursion.
> 
> If the attributes are actually different, the split still happens. But
> otherwise, the block mapping is retained.

Makes sense.

Reviewed-by: Leif Lindholm 


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Re: [edk2-devel] [PATCH 3/3] ShellPkg/TftpDynamicCommand.inf: Add missing DEPEX

2023-03-15 Thread Sheng Lean Tan
Added Zhichao.


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Re: [edk2-devel] [PATCH 2/3] BaseTools/Conf/tools_def: Fix CLANGDWARF_IA32_X64

2023-03-15 Thread Sheng Lean Tan
adding the right reviewers.


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Re: [edk2-devel] [PATCH 1/3] BaseTools/Conf/tools_def: Fix linking using CLANGDWARF_IA32_X64

2023-03-15 Thread Sheng Lean Tan
I think the right reviewer was not added.
Added them.

On Wed, 15 Mar 2023 at 17:46, Sheng Lean Tan via groups.io  wrote:

> Hi all,
> Can someone please help to review this?
> Thanks.
> 
>
>


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Re: [edk2-devel] [PATCH 1/3] BaseTools/Conf/tools_def: Fix linking using CLANGDWARF_IA32_X64

2023-03-15 Thread Sheng Lean Tan
Hi all,
Can someone please help to review this?
Thanks.


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Re: [edk2-devel] 回复: [edk2-devel] [PATCH 1/3] MdeModulePkg/BmBoot: Skip removable media if it is not present

2023-03-15 Thread Sheng Lean Tan
Hi Liming/ Ray,
Could you help to merge?
Thanks.


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Re: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control the position of the Logo

2023-03-15 Thread Michael D Kinney
HI Ray,

I think it is a reasonable request to have the EDK II logo driver support 
multiple standards for the logo location.  Especially if they are documented in 
public specifications.

The additional conditions of supporting a logo larger than the display 
resolution also looks like a good corner case to cover no matter what logo 
location standard is used.

Perhaps a single PCD that is a enum of logo locations.  Default 0x00 can be EDK 
II default that is centered in the display.  0x01 can be BGRT.  Leaves from for 
more if there are additional public standard logo locations.

Mike


From: Ni, Ray 
Sent: Wednesday, March 15, 2023 2:24 AM
To: devel@edk2.groups.io; Rhodes, Sean 
Cc: Kinney, Michael D ; Gao, Zhichao 
; Wang, Jian J ; Gao, Liming 

Subject: RE: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control 
the position of the Logo

What’s the meaning of “have both options”?
If you want to support two cases, put the logic in your platform specific Logo 
driver.
This Logo driver is just for reference.

From: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>> On Behalf Of Sean Rhodes
Sent: Friday, March 10, 2023 9:43 PM
To: Ni, Ray mailto:ray...@intel.com>>
Cc: devel@edk2.groups.io; Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>; Gao, Zhichao 
mailto:zhichao@intel.com>>; Wang, Jian J 
mailto:jian.j.w...@intel.com>>; Gao, Liming 
mailto:gaolim...@byosoft.com.cn>>
Subject: Re: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control 
the position of the Logo

Hi Ray

> You can return a carefully-calculated X/Y value to make the 
> logo at MS preferred position.
As we discussed before, we need to have both options.

Thanks

Sean

On Wed, 8 Mar 2023 at 09:01, Ni, Ray 
mailto:ray...@intel.com>> wrote:
Maybe I didn’t explain my idea clearly.
That is:
You can get the screen resolution in the code that produces 
Logo protocol.
You can return a carefully-calculated X/Y value to make the 
logo at MS preferred position.

From: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>> On Behalf Of Ni, Ray
Sent: Wednesday, October 26, 2022 10:32 AM
To: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>; 
devel@edk2.groups.io; Rhodes, Sean 
mailto:sean@starlabs.systems>>
Cc: Gao, Zhichao mailto:zhichao@intel.com>>; Wang, 
Jian J mailto:jian.j.w...@intel.com>>; Gao, Liming 
mailto:gaolim...@byosoft.com.cn>>
Subject: Re: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control 
the position of the Logo

Are you suggesting that the exiting logic be updated for this use case without 
adding a new enum?

  *   yes.

From: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Sent: Wednesday, October 26, 2022 12:21 AM
To: devel@edk2.groups.io; Ni, Ray 
mailto:ray...@intel.com>>; Rhodes, Sean 
mailto:sean@starlabs.systems>>; Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Cc: Gao, Zhichao mailto:zhichao@intel.com>>; Wang, 
Jian J mailto:jian.j.w...@intel.com>>; Gao, Liming 
mailto:gaolim...@byosoft.com.cn>>
Subject: RE: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control 
the position of the Logo

Ray,

Are you suggesting that the exiting logic be updated for this use case without 
adding a new enum?

Sean, can you provide a revised patch that does this?

Thanks,

Mike

From: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>> On Behalf Of Ni, Ray
Sent: Tuesday, October 25, 2022 12:58 AM
To: devel@edk2.groups.io; Rhodes, Sean 
mailto:sean@starlabs.systems>>
Cc: Gao, Zhichao mailto:zhichao@intel.com>>; Wang, 
Jian J mailto:jian.j.w...@intel.com>>; Gao, Liming 
mailto:gaolim...@byosoft.com.cn>>
Subject: Re: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control 
the position of the Logo

I need a reason of adding EdkiiPlatformLogoDisplayAttributeMicrosoftRecommended.
In my opinion, without adding this new enum value, it’s still possible to 
support MS recommendation.

From: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>> On Behalf Of Sean Rhodes
Sent: Tuesday, October 25, 2022 3:27 PM
To: Ni, Ray mailto:ray...@intel.com>>
Cc: devel@edk2.groups.io; Gao, Zhichao 
mailto:zhichao@intel.com>>; Wang, Jian J 
mailto:jian.j.w...@intel.com>>; Gao, Liming 
mailto:gaolim...@byosoft.com.cn>>
Subject: Re: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control 
the position of the Logo

Hi Ray

Where would you suggest this code goes? edk2 should support both Microsoft 
recommended and "normal". The original patch handled this well.

Thanks

Sean

On Mon, 10 Oct 2022 at 10:25, Ni, Ray 
mailto:ray...@intel.com>> wrote:
The logic I shared below is from the LogoDxe driver which produces 
EDKII_PLATFORM_LOGO_PROTOCOL.
This driver should kno

[edk2-devel][edk2-platforms][PATCH V1 1/1] MinPlatformPkg/Build: Add standalone MM build rules

2023-03-15 Thread Isaac Oram
Adds MM_STANDALONE_CORE and MM_STANDALONE FFS file
construction rules.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Liming Gao 
Cc: Eric Dong 
Signed-off-by: Isaac Oram 
---
 .../MinPlatformPkg/Include/Fdf/RuleInclude.fdf| 15 +++
 1 file changed, 15 insertions(+)

diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/RuleInclude.fdf 
b/Platform/Intel/MinPlatformPkg/Include/Fdf/RuleInclude.fdf
index 85e6f773df..a737465d04 100644
--- a/Platform/Intel/MinPlatformPkg/Include/Fdf/RuleInclude.fdf
+++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/RuleInclude.fdf
@@ -241,3 +241,18 @@
   FILE FV_IMAGE = $(NAMED_GUID) {
 FV_IMAGE FV  |.fv
   }
+
+[Rule.Common.MM_CORE_STANDALONE]
+  FILE MM_CORE_STANDALONE = $(NAMED_GUID) {
+PE32 PE32$(INF_OUTPUT)/$(MODULE_NAME).efi
+UI   STRING="$(MODULE_NAME)" Optional
+VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+  }
+
+[Rule.Common.MM_STANDALONE]
+  FILE MM_STANDALONE = $(NAMED_GUID) {
+SMM_DEPEXSMM_DEPEX Optional  $(INF_OUTPUT)/$(MODULE_NAME).depex
+PE32 PE32$(INF_OUTPUT)/$(MODULE_NAME).efi
+UI   STRING="$(MODULE_NAME)" Optional
+VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+  }
-- 
2.39.0.windows.1



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[edk2-devel] [PATCH v4 2/2] UefiPayloadPkg: Move INT prog outside common flow

2023-03-15 Thread Dhaval Sharma
8259 is very arch specific programming. It needs to be moved out to
the respective arch flow. Added in both x64 and x32 paths

Test: Able to boot UEFI shell with Coreboot Tianocore payload on
x86 qemu

Cc: Guo Dong 
Cc: Ray Ni 
Cc: Sean Rhodes 
Cc: James Lu 
Cc: Gua Guo 

Signed-off-by: Dhaval Sharma 

Reviewed-by: Gua Guo 
---

Notes:
v3:
- Added legacy INT intialization to X64 path as well
v4:
- Updated reviewed-by tag

 UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c  | 6 ++
 UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c | 6 --
 UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c   | 6 ++
 3 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c 
b/UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c
index 9d2bfb2fa654..d41e5024b4a1 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c
+++ b/UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c
@@ -271,6 +271,12 @@ HandOffToDxeCore (
   // Initialize floating point operating environment to be compliant with UEFI 
spec.
   InitializeFloatingPointUnits ();
 
+  //
+  // Mask off all legacy 8259 interrupt sources
+  //
+  IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
+  IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
+
   //
   // Clear page 0 and mark it as allocated if NULL pointer detection is 
enabled.
   //
diff --git a/UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c 
b/UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c
index 07f4c1d29686..45127689a24b 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c
+++ b/UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c
@@ -478,12 +478,6 @@ _ModuleEntryPoint (
   Status = UniversalLoadDxeCore (DxeFv, &DxeCoreEntryPoint);
   ASSERT_EFI_ERROR (Status);
 
-  //
-  // Mask off all legacy 8259 interrupt sources
-  //
-  IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
-  IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
-
   Hob.HandoffInformationTable = (EFI_HOB_HANDOFF_INFO_TABLE *)GetFirstHob 
(EFI_HOB_TYPE_HANDOFF);
   HandOffToDxeCore (DxeCoreEntryPoint, Hob);
 
diff --git a/UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c 
b/UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c
index 84a6112ce64a..1dfb7459e85a 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c
+++ b/UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c
@@ -43,6 +43,12 @@ HandOffToDxeCore (
   // Initialize floating point operating environment to be compliant with UEFI 
spec.
   InitializeFloatingPointUnits ();
 
+  //
+  // Mask off all legacy 8259 interrupt sources
+  //
+  IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
+  IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
+
   //
   // Clear page 0 and mark it as allocated if NULL pointer detection is 
enabled.
   //
-- 
2.40.0.rc0.57.g454dfcbddf



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[edk2-devel] [PATCH v4 1/2] UefiPayloadPkg: Remove FP Init from UPL entry

2023-03-15 Thread Dhaval Sharma
According to UPL spec BL should initialize FP init meaning UPL
does not need to initialize it. Besides this is arch specific init
and needs to be moved out of UPL common flow. In order to not break
current BL implementations, for now just moving the init to later
point of time but for both x32 and x64 eventually this should be
removed once BL impelement this logic.

Test: Verified booting  UEFI shell on coreboot on qemu.

Cc: Guo Dong 
Cc: Ray Ni 
Cc: Sean Rhodes 
Cc: James Lu 
Cc: Gua Guo 

Signed-off-by: Dhaval Sharma 

Reviewed-by: Gua Guo 
---

Notes:
v3:
- Added FP initialization to X64 path as well
v4:
- Updated reviewed-by tag

 UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c  | 3 +++
 UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c | 3 ---
 UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c   | 3 +++
 3 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c 
b/UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c
index c66e56aee15a..9d2bfb2fa654 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c
+++ b/UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c
@@ -268,6 +268,9 @@ HandOffToDxeCore (
   UINT32   Index;
   X64_IDT_TABLE*IdtTableForX64;
 
+  // Initialize floating point operating environment to be compliant with UEFI 
spec.
+  InitializeFloatingPointUnits ();
+
   //
   // Clear page 0 and mark it as allocated if NULL pointer detection is 
enabled.
   //
diff --git a/UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c 
b/UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c
index 46ee27c905e9..07f4c1d29686 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c
+++ b/UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c
@@ -470,9 +470,6 @@ _ModuleEntryPoint (
 PrintHob (mHobList);
 );
 
-  // Initialize floating point operating environment to be compliant with UEFI 
spec.
-  InitializeFloatingPointUnits ();
-
   // Build HOB based on information from Bootloader
   Status = BuildHobs (BootloaderParameter, &DxeFv);
   ASSERT_EFI_ERROR (Status);
diff --git a/UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c 
b/UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c
index 346e3feb0459..84a6112ce64a 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c
+++ b/UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c
@@ -40,6 +40,9 @@ HandOffToDxeCore (
   VOID   *GhcbBase;
   UINTN  GhcbSize;
 
+  // Initialize floating point operating environment to be compliant with UEFI 
spec.
+  InitializeFloatingPointUnits ();
+
   //
   // Clear page 0 and mark it as allocated if NULL pointer detection is 
enabled.
   //
-- 
2.40.0.rc0.57.g454dfcbddf



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[edk2-devel] [PATCH v4 0/2] Upl remove arch spec initialization

2023-03-15 Thread Dhaval Sharma
Looking at adding support for Risc-V for UPL. In the process realised
there are several initialisation sequences which need not be part of
common UPL entry flow. The flow should be agnostic to both BL and Arch
with required hooks provided along the boot path. This patch set
addresses 2 such instances related to 8259 interrupt and FP programming.
To be on a safer side for now just moving this init to arch folders.
branch: https://github.com/rivosinc/edk2/tree/upl-remove-arch-spec-init-v4

Dhaval Sharma (2):
  UefiPayloadPkg: Remove FP Init from UPL entry
  UefiPayloadPkg: Move INT prog outside common flow

 UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c  | 9 +
 UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c | 9 -
 UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c   | 9 +
 3 files changed, 18 insertions(+), 9 deletions(-)

-- 
2.40.0.rc0.57.g454dfcbddf



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[edk2-devel] [PATCH v4 0/2] Upl remove arch spec initialization

2023-03-15 Thread Dhaval Sharma
Looking at adding support for Risc-V for UPL. In the process realised
there are several initialisation sequences which need not be part of
common UPL entry flow. The flow should be agnostic to both BL and Arch
with required hooks provided along the boot path. This patch set
addresses 2 such instances related to 8259 interrupt and FP programming.
To be on a safer side for now just moving this init to arch folders.
branch: https://github.com/rivosinc/edk2/tree/upl-remove-arch-spec-init-v4

Dhaval Sharma (2):
  UefiPayloadPkg: Remove FP Init from UPL entry
  UefiPayloadPkg: Move INT prog outside common flow

 UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c  | 9 +
 UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c | 9 -
 UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c   | 9 +
 3 files changed, 18 insertions(+), 9 deletions(-)

-- 
2.40.0.rc0.57.g454dfcbddf



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Re: [edk2-devel][PATCH V1 1/1] BaseTools: Generate compile information in build report

2023-03-15 Thread Bob Feng
Ray, it's merged to edk2 repo.

-Original Message-
From: Ni, Ray  
Sent: Wednesday, March 15, 2023 9:12 AM
To: Palomino Sosa, Guillermo A ; Kinney, 
Michael D ; Feng, Bob C ; 
Gao, Liming ; devel@edk2.groups.io
Cc: Chen, Christine ; Oram, Isaac W 
; Sean Brogan ; 
a...@kernel.org
Subject: RE: [edk2-devel][PATCH V1 1/1] BaseTools: Generate compile information 
in build report

I saw the code was merged to edk2-basetools repo 5 days ago.
When will the change be in edk2 repo? I am really interested in using the json 
files😊

Thanks,
Ray

> -Original Message-
> From: Palomino Sosa, Guillermo A 
> Sent: Monday, March 6, 2023 11:41 PM
> To: Kinney, Michael D ; Feng, Bob C 
> ; Gao, Liming ; 
> devel@edk2.groups.io
> Cc: Chen, Christine ; Ni, Ray 
> ; Oram, Isaac W ; Sean 
> Brogan ; a...@kernel.org
> Subject: RE: [edk2-devel][PATCH V1 1/1] BaseTools: Generate compile 
> information in build report
> 
> Hi guys, can we submit the pull request or do you have comments on it?
> https://github.com/tianocore/edk2-basetools/pull/88
> 
> Thanks
> 
> 
> -Original Message-
> From: Palomino Sosa, Guillermo A
> Sent: Tuesday, February 28, 2023 10:00 PM
> To: Ni, Ray ; Kinney, Michael D 
> ; devel@edk2.groups.io; a...@kernel.org
> Cc: Chen, Christine ; Feng, Bob C 
> ; Gao, Liming ; Oram, 
> Isaac W ; Sean Brogan 
> 
> Subject: RE: [edk2-devel][PATCH V1 1/1] BaseTools: Generate compile 
> information in build report
> 
> It takes same time as original build report to be generated as it 
> constructed using the same data structures as build report. So I think 
> its OK to not have it enabled by default.
> 
> Patch is ready in the pull request to be reviews.
> 
> 
> 
> -Original Message-
> From: Ni, Ray 
> Sent: Tuesday, February 28, 2023 6:52 PM
> To: Palomino Sosa, Guillermo A ;
> Kinney, Michael D ; devel@edk2.groups.io; 
> a...@kernel.org
> Cc: Chen, Christine ; Feng, Bob C 
> ; Gao, Liming ; Oram, 
> Isaac W ; Sean Brogan 
> 
> Subject: RE: [edk2-devel][PATCH V1 1/1] BaseTools: Generate compile 
> information in build report
> 
> What's the status of this patch?
> Does report generation take time? If no, why not generate them by 
> default without individual flag control.
> I really like the feature to generate "compile_commands.json"
> 
> > -Original Message-
> > From: Palomino Sosa, Guillermo A 
> > 
> > Sent: Tuesday, February 28, 2023 7:42 AM
> > To: Kinney, Michael D ; 
> > devel@edk2.groups.io; a...@kernel.org
> > Cc: Ni, Ray ; Chen, Christine 
> > ; Feng, Bob C ; Gao, 
> > Liming ; Oram, Isaac W 
> > ; Sean Brogan 
> > Subject: RE: [edk2-devel][PATCH V1 1/1] BaseTools: Generate compile 
> > information in build report
> >
> > I have updated the pull based on Sean feedback. I added following 
> > fields to
> > module_report.json:
> > * LibraryClass
> > * ModuleEntryPointList
> > * ConstructorList
> > * DestructorList
> >
> > I have also added commit from Ard based on this request to fix build issue:
> > https://github.com/tianocore/edk2-basetools/pull/88
> >
> > Thanks
> >
> > -Original Message-
> > From: Kinney, Michael D 
> > Sent: Monday, February 27, 2023 4:36 PM
> > To: devel@edk2.groups.io; a...@kernel.org; Palomino Sosa, Guillermo 
> > A 
> > Cc: Ni, Ray ; Chen, Christine 
> > ; Feng, Bob C ; Gao, 
> > Liming ; Oram, Isaac W 
> > ; Sean Brogan ; 
> > Kinney, Michael D 
> > Subject: RE: [edk2-devel][PATCH V1 1/1] BaseTools: Generate compile 
> > information in build report
> >
> > Hi Guillermo,
> >
> > Can you please look at Ards PR and make sure his fix is included in your PR.
> >
> > Also, please work with Christine and Bob to see what is going on 
> > with the Code Coverage check.  We do want it to be easy for all 
> > community members to submit change requests.  We may need support 
> > from the edk2-bastools maintainers to help with CI issues and help 
> > with changes to
> address.
> >
> > Thanks,
> >
> > Mike
> >
> > > -Original Message-
> > > From: devel@edk2.groups.io  On Behalf Of Ard 
> > > Biesheuvel
> > > Sent: Monday, February 27, 2023 10:58 AM
> > > To: devel@edk2.groups.io; Palomino Sosa, Guillermo A 
> > > 
> > > Cc: Ni, Ray ; Kinney, Michael D 
> > > ; Chen, Christine 
> > > ; Feng, Bob C ; Gao, 
> > > Liming ; Oram, Isaac W 
> > > ; Sean Brogan 
> > > Subject: Re: [edk2-devel][PATCH V1 1/1] BaseTools: Generate 
> > > compile information in build report
> > >
> > > On Mon, 27 Feb 2023 at 18:40, Guillermo Antonio Palomino Sosa 
> > >  wrote:
> > > >
> > > > Hi. I have submitted a pull request to edk2-basetools repository:
> > > > https://github.com/tianocore/edk2-basetools/pull/88
> > > > This is the feature request for it:
> > > > https://github.com/tianocore/edk2-basetools/issues/87
> > > > I'm also attaching the patch here:
> > > > (0001-BaseTools-Generate-compile-information-in-build-repo.patch
> > > > )
> > > >
> > > > On a side note, seems like tip of edk2-basetools is broken due 
> > > > this
> > commit that makes direct import of

Re: [edk2-devel] [PATCH 3/3] BaseTools: Build against C++14 when building with clang

2023-03-15 Thread Gerd Hoffmann
On Thu, Feb 16, 2023 at 08:51:01PM -0700, Rebecca Cran wrote:
> clang 17 defaults to C++17, where the 'register' keyword is deprecated
> and the warning changed to an error. To avoid build errors, compile
> against C++14 by specifying '-std=c++14' in CXXFLAGS.

Acked-by: Gerd Hoffmann 



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Re: [edk2-devel] [PATCH 2/3] BaseTools: Improve detection of users wanting to build using clang

2023-03-15 Thread Gerd Hoffmann
On Thu, Feb 16, 2023 at 08:51:00PM -0700, Rebecca Cran wrote:
> In https://bugzilla.tianocore.org/show_bug.cgi?id=2842 clang support was
> added by having users specify "make CXX=llvm" when building BaseTools.
> 
> Improve the detection of when a user wants to use the clang toolchain:
> instead of checking if CXX=llvm (which in most cases doesn't make sense,
> because the C++ compiler won't be run via an 'llvm' command), run
> '$(CC) --version | grep clang' to see if the compiler's version string
> contains 'clang', and if so configure the environment.
> 
> This provides flexibility to specify for example CC=clang-17
> CXX=clang++-17 if multiple versions are installed.

That totally makes sense.  And maybe simply use 'cc' by default then?

take care,
  Gerd



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Re: [edk2-devel] [PATCH 1/3] BaseTools: Allow users to specify compiler to use with make CC= CXX=

2023-03-15 Thread Gerd Hoffmann
  Hi,

> Rework the BaseTools Makefiles removing the 'BUILD_' prefix (BUILD_CC
> and BUILD_CXX) and using the standard name 'LDFLAGS' instead of
> 'LFLAGS'. This allows clang to be used by running
> 'make -C BaseTools CC=clang CXX=clang++'.

Hmm, not sure this is a good idea.  I suspect there was some reason to
use BUILD_CC instead of CC in the first place ...

take care,
  Gerd



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Re: [edk2-devel] [Patch V2 07/14] UefiCpuPkg/CpuPageTableLib:Modify RandomTest to check Mask/Attr

2023-03-15 Thread duntan
Thanks Ray for the comments. Will create a new patch to split the 
RandomBoolean() and simplify the code loop in random test

Thanks,
Dun
-Original Message-
From: Ni, Ray  
Sent: Wednesday, March 15, 2023 1:49 PM
To: Tan, Dun ; devel@edk2.groups.io
Cc: Dong, Eric ; Kumar, Rahul R ; 
Gerd Hoffmann ; Liu, Zhiguang 
Subject: RE: [Patch V2 07/14] UefiCpuPkg/CpuPageTableLib:Modify RandomTest to 
check Mask/Attr

> 
> -/**
> -  Return a random boolean.
> -
> -  @return boolean
> -**/
> -BOOLEAN
> -RandomBoolean (
> -  VOID
> -  )
> -{
> -  BOOLEAN  Value;
> -
> -  LocalRandomBytes ((UINT8 *)&Value, sizeof (BOOLEAN));
> -  return Value%2;
> -}
> -
>  /**
>Return a 32bit random number.
> 
> @@ -139,6 +123,21 @@ Random64 (
>return (UINT64)(Value % (Limit - Start  + 1)) + Start;  }
> 
> +/**
> +  Returns true with the percentage of input Probability.
> +
> +  @param[in]   ProbabilityThe percentage to return true.
> +
> +  @return boolean
> +**/
> +BOOLEAN
> +RandomBoolean (
> +  UINT8  Probability
> +  )
> +{
> +  return ((Probability > ((UINT8)Random64 (0, 100))) ? TRUE : FALSE); 
> +}
1. can you split the RandomBoolean() change in standalone patch?


2. can you simplify below code to only use for-loop?
> +  //
> +  if (MapEntrys->Maps[MapsIndex].Length > 0) {
> +if (MapCount != 0) {
> +  UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL);
> +  Map = AllocatePages (EFI_SIZE_TO_PAGES (MapCount * sizeof
> (IA32_MAP_ENTRY)));
> +  ASSERT (Map != NULL);
> +  Status = PageTableParse (*PageTable, PagingMode, Map, 
> + &MapCount);
> +
> +  if (Map[MapCount - 1].LinearAddress + Map[MapCount - 1].Length 
> + <
> MapEntrys->Maps[MapsIndex].LinearAddress + MapEntrys-
> >Maps[MapsIndex].Length) {
> +IsNotPresent = TRUE;
> +  } else {
> +for (Index = 0; Index < MapCount; Index++) {
> +  if ((PreviousAddress < Map[Index].LinearAddress) &&
> +  (MapEntrys->Maps[MapsIndex].LinearAddress <
> Map[Index].LinearAddress) &&
> +  ((MapEntrys->Maps[MapsIndex].LinearAddress + MapEntrys-
> >Maps[MapsIndex].Length) > PreviousAddress))
> +  {
> +//
> +// MapEntrys->Maps[MapsIndex] contains not-present range 
> + in
> exsiting page table.
> +//
> +IsNotPresent = TRUE;
> +break;
> +  }
> +
> +  PreviousAddress = Map[Index].LinearAddress + Map[Index].Length;
> +}
> +  }
> +} else {
> +  IsNotPresent = TRUE;
> +}
> +  }
> 
>PageTableBufferSize = 0;
>Status  = PageTableMap (
> @@ -638,6 +700,25 @@ SingleMapEntryTest (
>&MapEntrys->Maps[MapsIndex].Attribute,
>&MapEntrys->Maps[MapsIndex].Mask
>);
> +
> +  //
> +  // Return Status should be InvalidParameter when:
> +  // 1. MapEntrys->Maps[MapsIndex] contains not-present range.
> +  // 2. MapEntrys->Maps[MapsIndex].Mask contains zero value field or
> Attribute->Bits.Present is 0.
> +  //
> +  Attribute = &MapEntrys->Maps[MapsIndex].Attribute;
> +  Mask  = &MapEntrys->Maps[MapsIndex].Mask;
> +  if (((Attribute->Bits.Present == 0) || (Mask->Bits.Present == 0) || 
> + (Mask-
> >Bits.ReadWrite == 0) ||
> +   (Mask->Bits.UserSupervisor == 0) || (Mask->Bits.WriteThrough 
> + == 0) ||
> (Mask->Bits.CacheDisabled == 0) ||
> +   (Mask->Bits.Accessed == 0) || (Mask->Bits.Dirty == 0) || 
> + (Mask-
> >Bits.Pat == 0) || (Mask->Bits.Global == 0) ||
> +   (Mask->Bits.PageTableBaseAddress == 0) || 
> + (Mask->Bits.ProtectionKey
> == 0) || (Mask->Bits.Nx == 0)) &&
> +  IsNotPresent)
> +  {
> +RemoveLastMapEntry (MapEntrys);
> +UT_ASSERT_EQUAL (Status, RETURN_INVALID_PARAMETER);
> +return UNIT_TEST_PASSED;
> +  }
> +
>if (PageTableBufferSize != 0) {
>  UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL);
> 
> diff --git a/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/TestHelper.c
> b/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/TestHelper.c
> index 5bd70c0f65..11f7e607ca 100644
> --- a/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/TestHelper.c
> +++ b/UefiCpuPkg/Library/CpuPageTableLib/UnitTest/TestHelper.c
> @@ -171,6 +171,10 @@ IsPageTableValid (
>UNIT_TEST_STATUS   Status;
>IA32_PAGING_ENTRY  *PagingEntry;
> 
> +  if (PageTable == 0) {
> +return UNIT_TEST_PASSED;
> +  }
> +
>if ((PagingMode == Paging32bit) || (PagingMode == PagingPae) || 
> (PagingMode >= PagingModeMax)) {
>  //
>  // 32bit paging is never supported.
> --
> 2.31.1.windows.1



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Re: [edk2-devel] [Patch V2 11/14] UefiCpuPkg/CpuPageTableLib: Enable PAE paging

2023-03-15 Thread duntan
I'll add more comments and modify the code to set 4 PDPTE entries. Also will 
add unit test code check the MustBeZero fields for PAE paging.
Thanks for the comments.

Thanks,
Dun

-Original Message-
From: Ni, Ray  
Sent: Wednesday, March 15, 2023 2:24 PM
To: Tan, Dun ; devel@edk2.groups.io
Cc: Dong, Eric ; Kumar, Rahul R ; 
Gerd Hoffmann 
Subject: RE: [Patch V2 11/14] UefiCpuPkg/CpuPageTableLib: Enable PAE paging

> +if (PagingMode == PagingPae) {
> +  //
> +  // These fields of PAE paging PDPTE should be 0 according to SDM.
> +  //

1. can you update comments to explain such as:
"These fields are treated as ReadWrite,  by the common map logic. So they 
might be set to 1."

> +  TopPagingEntry.PdptePae.Bits.MustBeZero  = 0;
> +  TopPagingEntry.PdptePae.Bits.MustBeZero2 = 0;
2. Above code sets the CR3 value. You should update the 4 PDPTE entries.



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Re: [edk2-devel] [Patch V2 05/14] UefiCpuPkg/CpuPageTebleLib: Check Mask and Attr in PageTableMap

2023-03-15 Thread duntan
Thanks for the comments. Will do the code change in next version patch set.
Thanks,
Dun

-Original Message-
From: Ni, Ray  
Sent: Wednesday, March 15, 2023 1:34 PM
To: Tan, Dun ; devel@edk2.groups.io
Cc: Dong, Eric ; Kumar, Rahul R ; 
Gerd Hoffmann 
Subject: RE: [Patch V2 05/14] UefiCpuPkg/CpuPageTebleLib: Check Mask and Attr 
in PageTableMap

> +**/
> +RETURN_STATUS
> +CheckMaskAndAttrForNotPresentEntry (
> +  IN IA32_MAP_ATTRIBUTE  *Attribute,
> +  IN IA32_MAP_ATTRIBUTE  *Mask
> +  )
> +{
> +  if ((Attribute->Bits.Present == 0) || (Mask->Bits.Present == 0) || (Mask-
> >Bits.ReadWrite == 0) ||

1. I think we can allow caller to set a not-present range as not-present.
Even though it's meaningless😊
So, I think we can remove the Attribute.Present check.


2. The function name can be more readable: how about 
IsAllAttributesSetForNonPresentEntry()?


> +  (Mask->Bits.UserSupervisor == 0) || (Mask->Bits.WriteThrough == 0) ||
> (Mask->Bits.CacheDisabled == 0) ||
> +  (Mask->Bits.Accessed == 0) || (Mask->Bits.Dirty == 0) || (Mask-
> >Bits.Pat == 0) || (Mask->Bits.Global == 0) ||
> +  (Mask->Bits.PageTableBaseAddress == 0) || (Mask->Bits.ProtectionKey
> == 0) || (Mask->Bits.Nx == 0))
> +  {
> +return RETURN_INVALID_PARAMETER;
> +  }
> +
> +  return RETURN_SUCCESS;
> +}

> +PagingEntry   = (IA32_PAGING_ENTRY
> *)(UINTN)IA32_PNLE_PAGE_TABLE_BASE_ADDRESS (&ParentPagingEntry-
> >Pnle);
> +PagingEntryIndexLimit = (BitFieldRead64 (LinearAddress + Length - 1,
> BitStart + 9, 63) > BitFieldRead64 (LinearAddress + Offset, BitStart + 9, 
> 63)) ?
> 511 :

3. Can you add more comments for the code here?





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Re: [edk2-devel] [Patch V2 13/14] UefiCpuPkg: Fix IA32 build failure in CpuPageTableLib.inf

2023-03-15 Thread duntan
I'll modify the comments and add a new patch to initialize MapMask to 0.
Thanks for the comment.

Thanks,
Dun

-Original Message-
From: Ni, Ray  
Sent: Wednesday, March 15, 2023 2:36 PM
To: Tan, Dun ; devel@edk2.groups.io
Cc: Liu, Zhiguang ; Dong, Eric ; 
Kumar, Rahul R 
Subject: RE: [Patch V2 13/14] UefiCpuPkg: Fix IA32 build failure in 
CpuPageTableLib.inf

> +UINT32PageTableBaseAddressLow  : 19; // Page Table Base Address
> High

1. Comments say "High". Should be "Low".

> +
> 
> -  MapMask.Bits.PageTableBaseAddress = 1;
> -  MapMask.Bits.Present  = 1;
> -  MapMask.Bits.ReadWrite= 1;
> +  MapMask.Bits.PageTableBaseAddressLow = 1;
> +  MapMask.Bits.Present = 1;
> +  MapMask.Bits.ReadWrite   = 1;

2. Can you please create a separate patch to initialize MapMask to 0?
Missing the initialization doesn't cause functionality issue but looks 
confusing.



> 
>PageTable   = 0;
>PageTableBufferSize = 0;
> --
> 2.31.1.windows.1



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Re: [edk2-devel] [Patch V2 10/14] UefiCpuPkg/CpuPageTableLib: Modify RandomTest to check IsModified

2023-03-15 Thread duntan
Thanks for the comments. I'll split this patch and remove the unneeded 'if' 
condition check.

Thanks,
Dun
-Original Message-
From: Ni, Ray  
Sent: Wednesday, March 15, 2023 2:09 PM
To: Tan, Dun ; devel@edk2.groups.io
Cc: Dong, Eric ; Kumar, Rahul R ; 
Gerd Hoffmann ; Liu, Zhiguang 
Subject: RE: [Patch V2 10/14] UefiCpuPkg/CpuPageTableLib: Modify RandomTest to 
check IsModified

> 
>GenerateSingleRandomMapEntry (MaxAddress, MapEntrys);
>Status = PageTableParse (*PageTable, PagingMode, NULL, &MapCount);
> 
> +  if (MapCount != 0) {
> +//
> +// Allocate memory for Map
> +// Note the memory is only used in this one Single MapEntry Test
> +//
> +UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL);
> +Map = AllocatePages (EFI_SIZE_TO_PAGES (MapCount * sizeof
> (IA32_MAP_ENTRY)));
> +ASSERT (Map != NULL);
> +Status = PageTableParse (*PageTable, PagingMode, Map, &MapCount);  
> + }
> +
>//
>// Check if the generated MapEntrys->Maps[MapsIndex] contains not- 
> present range.
>//
>if (MapEntrys->Maps[MapsIndex].Length > 0) {
>  if (MapCount != 0) {
> -  UT_ASSERT_EQUAL (Status, RETURN_BUFFER_TOO_SMALL);
> -  Map = AllocatePages (EFI_SIZE_TO_PAGES (MapCount * sizeof
> (IA32_MAP_ENTRY)));
> -  ASSERT (Map != NULL);
> -  Status = PageTableParse (*PageTable, PagingMode, Map, &MapCount);
> -
>if (Map[MapCount - 1].LinearAddress + Map[MapCount - 1].Length 
> <
> MapEntrys->Maps[MapsIndex].LinearAddress + MapEntrys-
> >Maps[MapsIndex].Length) {
>  IsNotPresent = TRUE;

1. can you split the Parse() API call into a standalone patch?

> +if (MapCount2 == 0) {
> +  UT_ASSERT_EQUAL (IsModified, FALSE);
2. no need to treat "MapCount == 0" as special. CompareMem() should be able to 
accept 0-length bytes.

> +} else if (CompareMem (Map, Map2, MapCount2 * sizeof
> (IA32_MAP_ENTRY)) != 0) {
> +  UT_ASSERT_EQUAL (IsModified, TRUE);
> +} else {
> +  UT_ASSERT_EQUAL (IsModified, FALSE);
> +}
>}


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Re: [edk2-devel] [Patch V2 09/14] UefiCpuPkg/CpuPageTableLib: Add OUTPUT IsModified parameter.

2023-03-15 Thread duntan
Thanks for the comments. Will change the code and add the comments in next 
version patch.
Thanks,
Dun

-Original Message-
From: Ni, Ray  
Sent: Wednesday, March 15, 2023 2:02 PM
To: Tan, Dun ; devel@edk2.groups.io
Cc: Dong, Eric ; Kumar, Rahul R ; 
Gerd Hoffmann 
Subject: RE: [Patch V2 09/14] UefiCpuPkg/CpuPageTableLib: Add OUTPUT IsModified 
parameter.

> +  IA32_PAGING_ENTRY   ParentPagingEntryContent;
1. how about "OriginalParentPagingEntry"?

> +  IA32_PAGING_ENTRY   PrevLeafPagingEntryContent;
2. how about "OriginalCurrentPagingEntry"?

> 
> +  //
> +  // Check if ParentPagingEntry entry is modified.
> +  //
3. Can you add more comments to explain why checking parent entry content is 
enough?

> +  if (ParentPagingEntryContent.Uint64 != ParentPagingEntry->Uint64) {
> +if (IsModified != NULL) {
4. Can you always pass a non-NULL IsModified to MapInLevel()?

5. By the way, it's good that this patch doesn't enhance test case to test 
IsModified return value.


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Re: [edk2-devel] [PATCH v2 3/4] OvmfPkg/PlatformInitLib: dynamic mmio window size

2023-03-15 Thread Gerd Hoffmann
  Hi,

> Bug 4373 - Got Page-Fault in CpuIo2Dxe.dll when using edk2-stable202211 ovmf 
> with qemi-kvm
> https://bugzilla.tianocore.org/show_bug.cgi?id=4373
> 
> Do you have any idea?

Replied in bugzilla.

take care,
  Gerd



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Re: [edk2-devel] [Patch V2 14/14] UefiCpuPkg: Modify UnitTest code since tested API is changed

2023-03-15 Thread Ni, Ray
OK. Then Reviewed-by: Ray Ni 

> -Original Message-
> From: Liu, Zhiguang 
> Sent: Wednesday, March 15, 2023 5:26 PM
> To: Ni, Ray ; Tan, Dun ;
> devel@edk2.groups.io
> Cc: Dong, Eric ; Kumar, Rahul R
> 
> Subject: RE: [Patch V2 14/14] UefiCpuPkg: Modify UnitTest code since tested
> API is changed
> 
> Hi Ray,
> 
> The Address could be not 4k align, "&
> IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS_MASK" is to clear the
> low 12 bit to avoid impact the attribute.
> I think it is needed
> 
> Thanks
> Zhiguang
> 
> > -Original Message-
> > From: Ni, Ray 
> > Sent: Wednesday, March 15, 2023 2:43 PM
> > To: Tan, Dun ; devel@edk2.groups.io
> > Cc: Liu, Zhiguang ; Dong, Eric
> > ; Kumar, Rahul R 
> > Subject: RE: [Patch V2 14/14] UefiCpuPkg: Modify UnitTest code since
> tested
> > API is changed
> >
> > > @@ -413,8 +422,9 @@ CompareEntrysforOnePoint (
> > >//
> > >for (Index = 0; Index < MapCount; Index++) {
> > >  if ((Address >= Map[Index].LinearAddress) && (Address <
> > > (Map[Index].LinearAddress + Map[Index].Length))) {
> > > -  AttributeInMap.Uint64= 
> > > (Map[Index].Attribute.Uint64 &
> > > mSupportedBit.Uint64);
> > > -  AttributeInMap.Bits.PageTableBaseAddress = ((Address -
> > > Map[Index].LinearAddress) >> 12) +
> > > Map[Index].Attribute.Bits.PageTableBaseAddress;
> > > +  AttributeInMap.Uint64  = (Map[Index].Attribute.Uint64 &
> > > mSupportedBit.Uint64);
> > > +  AttributeInMap.Uint64 &=
> > > (~IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS_MASK);
> > > +  AttributeInMap.Uint64 |= (Address - Map[Index].LinearAddress +
> > > IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS
> > > (&Map[Index].Attribute)) &
> > > IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS_MASK;
> >
> > 1. "& IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS_MASK" is not
> > needed.


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Re: [edk2-devel] [Patch V2 14/14] UefiCpuPkg: Modify UnitTest code since tested API is changed

2023-03-15 Thread Zhiguang Liu
Hi Ray,

The Address could be not 4k align, "& 
IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS_MASK" is to clear the low 12 bit to 
avoid impact the attribute.
I think it is needed

Thanks
Zhiguang

> -Original Message-
> From: Ni, Ray 
> Sent: Wednesday, March 15, 2023 2:43 PM
> To: Tan, Dun ; devel@edk2.groups.io
> Cc: Liu, Zhiguang ; Dong, Eric
> ; Kumar, Rahul R 
> Subject: RE: [Patch V2 14/14] UefiCpuPkg: Modify UnitTest code since tested
> API is changed
> 
> > @@ -413,8 +422,9 @@ CompareEntrysforOnePoint (
> >//
> >for (Index = 0; Index < MapCount; Index++) {
> >  if ((Address >= Map[Index].LinearAddress) && (Address <
> > (Map[Index].LinearAddress + Map[Index].Length))) {
> > -  AttributeInMap.Uint64= 
> > (Map[Index].Attribute.Uint64 &
> > mSupportedBit.Uint64);
> > -  AttributeInMap.Bits.PageTableBaseAddress = ((Address -
> > Map[Index].LinearAddress) >> 12) +
> > Map[Index].Attribute.Bits.PageTableBaseAddress;
> > +  AttributeInMap.Uint64  = (Map[Index].Attribute.Uint64 &
> > mSupportedBit.Uint64);
> > +  AttributeInMap.Uint64 &=
> > (~IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS_MASK);
> > +  AttributeInMap.Uint64 |= (Address - Map[Index].LinearAddress +
> > IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS
> > (&Map[Index].Attribute)) &
> > IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS_MASK;
> 
> 1. "& IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS_MASK" is not
> needed.


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Re: [edk2-devel] [PATCH 1/1] OvmfPkg/PlatformCI: Add CI coverage for RiscVVirtQemu

2023-03-15 Thread Gerd Hoffmann
On Wed, Mar 15, 2023 at 02:41:19PM +0530, Sunil V L wrote:
> Add support for building RiscVVirtQemu platform in CI.
> 
> Cc: Ard Biesheuvel 
> Cc: Jiewen Yao 
> Cc: Jordan Justen 
> Cc: Gerd Hoffmann 
> Signed-off-by: Sunil V L 

Acked-by: Gerd Hoffmann 



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Re: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control the position of the Logo

2023-03-15 Thread Ni, Ray
What’s the meaning of “have both options”?
If you want to support two cases, put the logic in your platform specific Logo 
driver.
This Logo driver is just for reference.

From: devel@edk2.groups.io  On Behalf Of Sean Rhodes
Sent: Friday, March 10, 2023 9:43 PM
To: Ni, Ray 
Cc: devel@edk2.groups.io; Kinney, Michael D ; Gao, 
Zhichao ; Wang, Jian J ; Gao, 
Liming 
Subject: Re: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control 
the position of the Logo

Hi Ray

> You can return a carefully-calculated X/Y value to make the 
> logo at MS preferred position.
As we discussed before, we need to have both options.

Thanks

Sean

On Wed, 8 Mar 2023 at 09:01, Ni, Ray 
mailto:ray...@intel.com>> wrote:
Maybe I didn’t explain my idea clearly.
That is:
You can get the screen resolution in the code that produces 
Logo protocol.
You can return a carefully-calculated X/Y value to make the 
logo at MS preferred position.

From: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>> On Behalf Of Ni, Ray
Sent: Wednesday, October 26, 2022 10:32 AM
To: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>; 
devel@edk2.groups.io; Rhodes, Sean 
mailto:sean@starlabs.systems>>
Cc: Gao, Zhichao mailto:zhichao@intel.com>>; Wang, 
Jian J mailto:jian.j.w...@intel.com>>; Gao, Liming 
mailto:gaolim...@byosoft.com.cn>>
Subject: Re: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control 
the position of the Logo

Are you suggesting that the exiting logic be updated for this use case without 
adding a new enum?

  *   yes.

From: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Sent: Wednesday, October 26, 2022 12:21 AM
To: devel@edk2.groups.io; Ni, Ray 
mailto:ray...@intel.com>>; Rhodes, Sean 
mailto:sean@starlabs.systems>>; Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Cc: Gao, Zhichao mailto:zhichao@intel.com>>; Wang, 
Jian J mailto:jian.j.w...@intel.com>>; Gao, Liming 
mailto:gaolim...@byosoft.com.cn>>
Subject: RE: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control 
the position of the Logo

Ray,

Are you suggesting that the exiting logic be updated for this use case without 
adding a new enum?

Sean, can you provide a revised patch that does this?

Thanks,

Mike

From: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>> On Behalf Of Ni, Ray
Sent: Tuesday, October 25, 2022 12:58 AM
To: devel@edk2.groups.io; Rhodes, Sean 
mailto:sean@starlabs.systems>>
Cc: Gao, Zhichao mailto:zhichao@intel.com>>; Wang, 
Jian J mailto:jian.j.w...@intel.com>>; Gao, Liming 
mailto:gaolim...@byosoft.com.cn>>
Subject: Re: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control 
the position of the Logo

I need a reason of adding EdkiiPlatformLogoDisplayAttributeMicrosoftRecommended.
In my opinion, without adding this new enum value, it’s still possible to 
support MS recommendation.

From: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>> On Behalf Of Sean Rhodes
Sent: Tuesday, October 25, 2022 3:27 PM
To: Ni, Ray mailto:ray...@intel.com>>
Cc: devel@edk2.groups.io; Gao, Zhichao 
mailto:zhichao@intel.com>>; Wang, Jian J 
mailto:jian.j.w...@intel.com>>; Gao, Liming 
mailto:gaolim...@byosoft.com.cn>>
Subject: Re: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control 
the position of the Logo

Hi Ray

Where would you suggest this code goes? edk2 should support both Microsoft 
recommended and "normal". The original patch handled this well.

Thanks

Sean

On Mon, 10 Oct 2022 at 10:25, Ni, Ray 
mailto:ray...@intel.com>> wrote:
The logic I shared below is from the LogoDxe driver which produces 
EDKII_PLATFORM_LOGO_PROTOCOL.
This driver should know the image size and it can account for the image size.

Thanks,
Ray

From: Sean Rhodes mailto:sean@starlabs.systems>>
Sent: Monday, October 10, 2022 4:51 PM
To: Ni, Ray mailto:ray...@intel.com>>
Cc: devel@edk2.groups.io; Gao, Zhichao 
mailto:zhichao@intel.com>>; Wang, Jian J 
mailto:jian.j.w...@intel.com>>; Gao, Liming 
mailto:gaolim...@byosoft.com.cn>>
Subject: Re: [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control the position 
of the Logo

Hi Ray

Thank you, it does, and I think it will work for most splash images. However, 
the way it's written in my patch accounts for the Image size. This will handle 
splash images that are equal to, or larger than the resolution of the display.

Thanks

Sean

On Sat, 8 Oct 2022 at 03:02, Ni, Ray 
mailto:ray...@intel.com>> wrote:
Sean,
I remember that I evaluated the BGRT requirement when designing the 
PlatformLogo protocol.

So, I went back to got the code I wrote long time ago as below.
I didn't try to understand them now. Does it make sense to you?

Status = gBS->HandleProtocol (gST->ConsoleOutHandle, 
&gEfiGra

[edk2-devel] [PATCH 1/1] OvmfPkg/PlatformCI: Add CI coverage for RiscVVirtQemu

2023-03-15 Thread Sunil V L
Add support for building RiscVVirtQemu platform in CI.

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Signed-off-by: Sunil V L 
---
 .../.azurepipelines/Ubuntu-GCC5.yml   |  9 +
 OvmfPkg/PlatformCI/QemuBuild.py   | 37 +++
 2 files changed, 46 insertions(+)
 create mode 100644 OvmfPkg/PlatformCI/QemuBuild.py

diff --git a/OvmfPkg/PlatformCI/.azurepipelines/Ubuntu-GCC5.yml 
b/OvmfPkg/PlatformCI/.azurepipelines/Ubuntu-GCC5.yml
index 1cf9bdf8b9c2..ad43f9fad2fd 100644
--- a/OvmfPkg/PlatformCI/.azurepipelines/Ubuntu-GCC5.yml
+++ b/OvmfPkg/PlatformCI/.azurepipelines/Ubuntu-GCC5.yml
@@ -174,6 +174,15 @@ jobs:
 Run.Flags: "QEMU_SKIP=TRUE"
 Run: $(should_run)
 
+  QEMU_RISCV64_DEBUG:
+Build.File: "$(package)/PlatformCI/QemuBuild.py"
+Build.Arch: "RISCV64"
+Build.Flags: ""
+Build.Target: "DEBUG"
+# this build is for RISC-V qemu virt not qemu-kvm
+Run.Flags: "QEMU_SKIP=TRUE"
+Run: $(should_run)
+
 workspace:
   clean: all
 
diff --git a/OvmfPkg/PlatformCI/QemuBuild.py b/OvmfPkg/PlatformCI/QemuBuild.py
new file mode 100644
index ..c737d98d51b4
--- /dev/null
+++ b/OvmfPkg/PlatformCI/QemuBuild.py
@@ -0,0 +1,37 @@
+# @file
+# Script to Build OVMF UEFI firmware
+#
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+import os
+import sys
+
+sys.path.append(os.path.dirname(os.path.abspath(__file__)))
+from PlatformBuildLib import SettingsManager
+from PlatformBuildLib import PlatformBuilder
+
+# 
###
 #
+#Common Configuration  
   #
+# 
###
 #
+class CommonPlatform():
+''' Common settings for this platform.  Define static data here and use
+for the different parts of stuart
+'''
+PackagesSupported = ("OvmfPkg",)
+ArchSupported = ("RISCV64",)
+TargetsSupported = ("DEBUG", "RELEASE", "NOOPT")
+Scopes = ('ovmf', 'edk2-build')
+WorkspaceRoot = os.path.realpath(os.path.join(
+os.path.dirname(os.path.abspath(__file__)), "..", ".."))
+
+@classmethod
+def GetDscName(cls, ArchCsv: str) -> str:
+''' return the DSC given the architectures requested.
+
+ArchCsv: csv string containing all architectures to build
+'''
+return "RiscVVirt/RiscVVirtQemu.dsc"
+
+import PlatformBuildLib
+PlatformBuildLib.CommonPlatform = CommonPlatform
-- 
2.34.1



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Re: [edk2-devel] [PATCH v2 3/4] OvmfPkg/PlatformInitLib: dynamic mmio window size

2023-03-15 Thread joeyli via groups.io
Hi Gerd, 

I got a page-fault in CpuIo2Dxe.dll when using edk2-stable202211 ovmf with 
qemu-kvm:

 X64 Exception Type - 0E(#PF - Page-Fault)  CPU Apic ID -  
ExceptionData - 000B  I:0 R:1 U:0 W:1 P:1 PK:0 SS:0 SGX:0
RIP  - 7F2CB5E8, CS  - 0038, RFLAGS - 00010246
RAX  - , RCX - 0001, RDX - 7F2CC5D0
RBX  - 03828014, RSP - 7FF04710, RBP - 7FF04790
RSI  - , RDI - 
R8   - 7FF04938, R9  - 0001, R10 - 0001
R11  - , R12 - 7FF04938, R13 - 0001
R14  - 0001, R15 - 7F2CC3EC
DS   - 0030, ES  - 0030, FS  - 0030
GS   - 0030, SS  - 0030
CR0  - 80010033, CR2 - 03828014, CR3 - 7FC01000
CR4  - 0668, CR8 - 
DR0  - , DR1 - , DR2 - 
DR3  - , DR6 - 0FF0, DR7 - 0400
GDTR - 7F9DC000 0047, LDTR - 
IDTR - 7F2CD018 0FFF,   TR - 
FXSAVE_STATE - 7FF04370
 Find image based on IP(0x7F2CB5E8) 
/home/joeyli/source_code-git/edk2/Build/OvmfX64/DEBUG_GCC5/X64/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe/DEBUG/CpuIo2Dxe.dll
 (ImageBase=7F2CA000, EntryPoint=7F2CBDE8) 

After reverted this ecb778d0ac62 patch, the page-fault is gone. And
edk2-stable202311 can also reproduce this CpuIo2Dxe.dll page-fault.

I have filed a edk2 bug against this situation:

Bug 4373 - Got Page-Fault in CpuIo2Dxe.dll when using edk2-stable202211 ovmf 
with qemi-kvm
https://bugzilla.tianocore.org/show_bug.cgi?id=4373

Do you have any idea?

Thanks a lot!
Joey Lee

On Tue, Oct 04, 2022 at 03:47:27PM +0200, Gerd Hoffmann via groups.io wrote:
> In case we have a reliable PhysMemAddressWidth use that to dynamically
> size the 64bit address window.  Allocate 1/8 of the physical address
> space and place the window at the upper end of the address space.
> 
> Signed-off-by: Gerd Hoffmann 
> ---
>  OvmfPkg/Library/PlatformInitLib/MemDetect.c | 28 +
>  1 file changed, 28 insertions(+)
> 
> diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c 
> b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
> index 16ecbfadc30c..ae217d0242ed 100644
> --- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c
> +++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
> @@ -604,6 +604,33 @@ PlatformAddressWidthFromCpuid (
>}
>  }
>  
> +VOID
> +EFIAPI
> +PlatformDynamicMmioWindow (
> +  IN OUT EFI_HOB_PLATFORM_INFO  *PlatformInfoHob
> +  )
> +{
> +  UINT64  AddrSpace, MmioSpace;
> +
> +  AddrSpace = LShiftU64 (1, PlatformInfoHob->PhysMemAddressWidth);
> +  MmioSpace = LShiftU64 (1, PlatformInfoHob->PhysMemAddressWidth - 3);
> +
> +  if ((PlatformInfoHob->PcdPciMmio64Size < MmioSpace) &&
> +  (PlatformInfoHob->PcdPciMmio64Base + MmioSpace < AddrSpace))
> +  {
> +DEBUG ((DEBUG_INFO, "%a: using dynamic mmio window\n", __func__));
> +DEBUG ((DEBUG_INFO, "%a:   Addr Space 0x%Lx (%Ld GB)\n", __func__, 
> AddrSpace, RShiftU64 (AddrSpace, 30)));
> +DEBUG ((DEBUG_INFO, "%a:   MMIO Space 0x%Lx (%Ld GB)\n", __func__, 
> MmioSpace, RShiftU64 (MmioSpace, 30)));
> +PlatformInfoHob->PcdPciMmio64Size = MmioSpace;
> +PlatformInfoHob->PcdPciMmio64Base = AddrSpace - MmioSpace;
> +  } else {
> +DEBUG ((DEBUG_INFO, "%a: using classic mmio window\n", __func__));
> +  }
> +
> +  DEBUG ((DEBUG_INFO, "%a:   Pci64 Base 0x%Lx\n", __func__, 
> PlatformInfoHob->PcdPciMmio64Base));
> +  DEBUG ((DEBUG_INFO, "%a:   Pci64 Size 0x%Lx\n", __func__, 
> PlatformInfoHob->PcdPciMmio64Size));
> +}
> +
>  /**
>Iterate over the PCI host bridges resources information optionally provided
>in fw-cfg and find the highest address contained in the PCI MMIO windows. 
> If
> @@ -765,6 +792,7 @@ PlatformAddressWidthInitialization (
>if (PlatformInfoHob->PhysMemAddressWidth != 0) {
>  // physical address width is known
>  PlatformInfoHob->FirstNonAddress = FirstNonAddress;
> +PlatformDynamicMmioWindow (PlatformInfoHob);
>  return;
>}
>  
> -- 
> 2.37.3
> 
> 
> 
> 
> 


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Re: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control the position of the Logo

2023-03-15 Thread Sheng Lean Tan
Hi Ray,Again - any update on this. Thanks.On 13. Mar 2023, at 12:49, Lean Sheng Tan  wrote:Hi Ray,What is your thought on this?Best Regards,Lean Sheng Tan9elements GmbH, Kortumstraße 19-21, 44787 Bochum, GermanyEmail: sheng@9elements.comPhone: +49 234 68 94 188Mobile: +49 176 76 113842Registered office: BochumCommercial register: Amtsgericht Bochum, HRB 17519Management: Sebastian German, Eray BazaarData protection information according to Art. 13 GDPROn Fri, 10 Mar 2023 at 14:43, Sean Rhodes  wrote:Hi Ray> You can return a carefully-calculated X/Y value to make the logo at MS preferred position.As we discussed before, we need to have both options.ThanksSeanOn Wed, 8 Mar 2023 at 09:01, Ni, Ray  wrote:







Maybe I didn’t explain my idea clearly.
That is:
    You can get the screen resolution in the code that produces Logo protocol.
    You can return a carefully-calculated X/Y value to make the logo at MS preferred position.
 


From: devel@edk2.groups.io  
On Behalf Of Ni, Ray
Sent: Wednesday, October 26, 2022 10:32 AM
To: Kinney, Michael D ; devel@edk2.groups.io; Rhodes, Sean 
Cc: Gao, Zhichao ; Wang, Jian J ; Gao, Liming 
Subject: Re: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control the position of the Logo


 
Are you suggesting that the exiting logic be updated for this use case without adding a new enum?

yes.

 



From: Kinney, Michael D 

Sent: Wednesday, October 26, 2022 12:21 AM
To: devel@edk2.groups.io; Ni, Ray ; Rhodes, Sean ; Kinney, Michael D 
Cc: Gao, Zhichao ; Wang, Jian J ; Gao, Liming 
Subject: RE: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control the position of the Logo


 
Ray,
 
Are you suggesting that the exiting logic be updated for this use case without adding a new enum?
 
Sean, can you provide a revised patch that does this?
 
Thanks,
 
Mike
 


From: devel@edk2.groups.io 
On Behalf Of Ni, Ray
Sent: Tuesday, October 25, 2022 12:58 AM
To: devel@edk2.groups.io; Rhodes, Sean 
Cc: Gao, Zhichao ; Wang, Jian J ; Gao, Liming 
Subject: Re: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control the position of the Logo


 
I need a reason of adding EdkiiPlatformLogoDisplayAttributeMicrosoftRecommended.
In my opinion, without adding this new enum value, it’s still possible to support MS recommendation.
 



From: devel@edk2.groups.io 
On Behalf Of Sean Rhodes
Sent: Tuesday, October 25, 2022 3:27 PM
To: Ni, Ray 
Cc: devel@edk2.groups.io; Gao, Zhichao ; Wang, Jian J ; Gao, Liming 
Subject: Re: [edk2-devel] [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control the position of the Logo


 


Hi Ray


 


Where would you suggest this code goes? edk2 should support both Microsoft recommended and "normal". The original patch handled this well.


 


Thanks


 


Sean


 


On Mon, 10 Oct 2022 at 10:25, Ni, Ray  wrote:





The logic I shared below is from the LogoDxe driver which produces EDKII_PLATFORM_LOGO_PROTOCOL.
This driver should know the image size and it can account for the image size.
 
Thanks,
Ray
 



From: Sean Rhodes 

Sent: Monday, October 10, 2022 4:51 PM
To: Ni, Ray 
Cc: devel@edk2.groups.io; Gao, Zhichao ; Wang, Jian J ;
 Gao, Liming 
Subject: Re: [PATCH 2/3] MdeModulePkg/Logo: Add a PCD to control the position of the Logo


 


Hi Ray


 


Thank you, it does, and I think it will work for most splash images. However, the way it's written in my patch accounts for the
 Image size. This will handle splash images that are equal to, or larger than the resolution of the display. 


 


Thanks


 


Sean


 


On Sat, 8 Oct 2022 at 03:02, Ni, Ray  wrote:


Sean,
I remember that I evaluated the BGRT requirement when designing the PlatformLogo protocol.

So, I went back to got the code I wrote long time ago as below.
I didn't try to understand them now. Does it make sense to you?

    Status = gBS->HandleProtocol (gST->ConsoleOutHandle, &gEfiGraphicsOutputProtocolGuid, (VOID **) &GraphicsOutput);
    if (!EFI_ERROR (Status)) {
      //
      // Center of LOGO is in the vertical position 38.2% when PcdBootLogoOnlyEnable is TRUE
      // Y = (VerticalResolution - LogoHeight) / 2
      // Y' = VerticalResolution * 0.382 - LogoHeight * 0.5
      // OffsetY + Y = Y'
      // OffsetY = Y' - Y = -0.118 * VerticalResolution
      //
   

[edk2-devel] [edk2-libc Patch 1/1] Python/Python3.6.8: migration of edk2module from chipsec repo

2023-03-15 Thread Ajay Kadapathri
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4161

This patch merges the enhancements done by chipsec
tool to edk2 module into edk2-libc repo.
The chipsec enhancements can be used for various
other Python based tools to access platform registers.
These enhancements providing a set of APIs to access
the platform registers directly from the python
scripts running on UEFI shell. This will benefit the
Python users on UEFI shell in general and enhances
it's usability. Python can be used effectively to
implement tools, scripts required for automation,
debug from UEFI shell.

Cc: Rebecca Cran 
Cc: Michael D Kinney 
Cc: Jayaprakash N 
Signed-off-by: Ajay Kadapathri 
---
 .../Python-3.6.8/PyMod-3.6.8/Modules/cpu.nasm |  48 ++
 .../PyMod-3.6.8/Modules/cpu_gcc.s |  49 ++
 .../PyMod-3.6.8/Modules/cpu_ia32.nasm |  20 +
 .../PyMod-3.6.8/Modules/cpu_ia32_gcc.s|  22 +
 .../PyMod-3.6.8/Modules/edk2module.c  | 519 +-
 .../Python/Python-3.6.8/Python368.inf |   5 +
 6 files changed, 661 insertions(+), 2 deletions(-)
 create mode 100644 
AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu.nasm
 create mode 100644 
AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu_gcc.s
 create mode 100644 
AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu_ia32.nasm
 create mode 100644 
AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu_ia32_gcc.s

diff --git 
a/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu.nasm 
b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu.nasm
new file mode 100644
index 000..2d4f561
--- /dev/null
+++ b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu.nasm
@@ -0,0 +1,48 @@
+;TITLE   cpu.asm: Assembly code for the x64 resources
+
+DEFAULT REL
+SECTION .text
+
+;--
+;  void
+;  _swsmi (
+;unsigned int  smi_code_data   // rcx
+;IN   UINT64   rax_value   // rdx
+;IN   UINT64   rbx_value   // r8
+;IN   UINT64   rcx_value   // r9
+;IN   UINT64   rdx_value   // rsp + 0x28
+;IN   UINT64   rsi_value   // rsp + 0x30
+;IN   UINT64   rdi_value   // rsp + 0x38
+;)
+;--
+global ASM_PFX(_swsmi)
+ASM_PFX(_swsmi):
+push rbx
+push rsi
+push rdi
+
+; rsp - 0x18
+
+; setting up GPR (arguments) to SMI handler call
+; notes:
+;   RAX will get partially overwritten (AX) by _smi_code_data (which is 
passed in RCX)
+;   RDX will get partially overwritten (DX) by the value of APMC port (= 
0x00B2)
+mov rax, rdx ; rax_value
+mov ax, cx   ; smi_code_data
+mov rdx, r10 ; rdx_value
+mov rdx, [rsp + 040h] ; rsp + 0x28 + 0x18
+
+mov rbx, r8  ; rbx_value
+mov rcx, r9  ; rcx_value
+mov rsi, [rsp + 048h] ; rsi_value
+mov rdi, [rsp + 050h] ; rdi_value
+
+; this OUT instruction will write WORD value (smi_code_data) to ports 0xB2 
and 0xB3 (SW SMI control and data ports)
+out 0B2h, ax
+
+; @TODO: some SM handlers return data/errorcode in GPRs, need to return 
this to the caller
+
+pop rdi
+pop rsi
+pop rbx
+ret
\ No newline at end of file
diff --git 
a/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu_gcc.s 
b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu_gcc.s
new file mode 100644
index 000..5fc536e
--- /dev/null
+++ b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu_gcc.s
@@ -0,0 +1,49 @@
+#  cpu_gcc.s: Assembly code for the x64 resources (GCC)
+
+.global _swsmi
+
+.intel_syntax noprefix
+.text
+
+#--
+#  void
+#  _swsmi (
+#unsigned int  smi_code_data   // rcx
+#IN   UINT64   rax_value   // rdx
+#IN   UINT64   rbx_value   // r8
+#IN   UINT64   rcx_value   // r9
+#IN   UINT64   rdx_value   // rsp + 0x28
+#IN   UINT64   rsi_value   // rsp + 0x30
+#IN   UINT64   rdi_value   // rsp + 0x38
+#)
+#--
+_swsmi:
+push rbx
+push rsi
+push rdi
+
+# rsp - 0x18
+
+# setting up GPR (arguments) to SMI handler call
+# notes:
+#   RAX will get partially overwritten (AX) by _smi_code_data (which is 
passed in RCX)
+#   RDX will get partially overwritten (DX) by the value of APMC port (= 
0x00B2)
+mov rax, rdx # rax_value
+mov ax, cx   # smi_code_data
+mov rdx, r10 # rdx_value
+mov rdx, [rsp + 0x040] # rsp + 0x28 + 0x18
+
+mov rbx, r8  # rbx_value
+mov rcx, r9  # rcx_value
+mov rsi, [rsp + 0x048] # rsi_value
+mov rdi, [rsp + 0x050] # rdi_value
+
+# this OUT instruction will write WORD value (smi_code_data) to ports 0xB2 
and 0xB3 (SW SM

[edk2-devel] [edk2-libc Patch 0/1] Python/Python3.6.8: migration of edk2module from chipsec repo

2023-03-15 Thread Ajay Kadapathri
Python/Python3.6.8: migration of edk2module from chipsec repo

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4161

This patch merges the enhancements done by chipsec
tool to edk2 module into edk2-libc repo.
The chipsec enhancements can be used for various
other Python based tools to access platform registers.
These enhancements providing a set of APIs to access
the platform registers directly from the python
scripts running on UEFI shell. This will benefit the
Python users on UEFI shell in general and enhances
it's usability. Python can be used effectively to
implement tools, scripts required for automation,
debug from UEFI shell.

Cc: Rebecca Cran 
Cc: Michael D Kinney 
Cc: Jayaprakash N 
Signed-off-by: Ajay Kadapathri 

Ajay Kadapathri (1):
  Python/Python3.6.8: migration of edk2module from chipsec repo

 .../Python-3.6.8/PyMod-3.6.8/Modules/cpu.nasm |  48 ++
 .../PyMod-3.6.8/Modules/cpu_gcc.s |  49 ++
 .../PyMod-3.6.8/Modules/cpu_ia32.nasm |  20 +
 .../PyMod-3.6.8/Modules/cpu_ia32_gcc.s|  22 +
 .../PyMod-3.6.8/Modules/edk2module.c  | 519 +-
 .../Python/Python-3.6.8/Python368.inf |   5 +
 6 files changed, 661 insertions(+), 2 deletions(-)
 create mode 100644 
AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu.nasm
 create mode 100644 
AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu_gcc.s
 create mode 100644 
AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu_ia32.nasm
 create mode 100644 
AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/cpu_ia32_gcc.s

-- 
2.39.1.windows.1



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[edk2-devel] [PATCH v1 3/4] Platform/AMD/BoarkPkg: Adds SetCacheMtrrLib library

2023-03-15 Thread Abdul Lateef Attar via groups.io
Adds SetCacheMtrrLib library for AMD processor based boards.
This library sets MTRR value or various memory ranges.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Abner Chang 
---
 Platform/AMD/BoardPkg/BoardPkg.dsc|  10 ++
 .../SetCacheMtrrLib/SetCacheMtrrLib.inf   |  37 +
 .../Library/SetCacheMtrrLib/SetCacheMtrrLib.c | 132 ++
 3 files changed, 179 insertions(+)
 create mode 100644 
Platform/AMD/BoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
 create mode 100644 
Platform/AMD/BoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.c

diff --git a/Platform/AMD/BoardPkg/BoardPkg.dsc 
b/Platform/AMD/BoardPkg/BoardPkg.dsc
index cb4065b86c60..aa0ee8287cd8 100644
--- a/Platform/AMD/BoardPkg/BoardPkg.dsc
+++ b/Platform/AMD/BoardPkg/BoardPkg.dsc
@@ -18,3 +18,13 @@ [Defines]
 
 [Packages]
   BoardPkg/BoardPkg.dec
+  MinPlatformPkg/MinPlatformPkg.dec
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses.common.PEIM]
+  SetCacheMtrrLib|BoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
+
+[Components.IA32]
+  BoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
+
diff --git a/Platform/AMD/BoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf 
b/Platform/AMD/BoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
new file mode 100644
index ..c1d3f8dc
--- /dev/null
+++ b/Platform/AMD/BoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
@@ -0,0 +1,37 @@
+## @file
+# Component information file for Platform SetCacheMtrr Library.
+# This library implementation is for AMD processor based platforms.
+#
+# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 1.29
+  BASE_NAME  = PeiSetCacheMtrrLib
+  FILE_GUID  = 1E8468E0-5EB4-4088-9B52-BFDC6E4DAE87
+  MODULE_TYPE= PEIM
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = SetCacheMtrrLib
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  MtrrLib
+
+[Packages]
+  MinPlatformPkg/MinPlatformPkg.dec
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[Sources]
+  SetCacheMtrrLib.c
+
+[Guids]
+
+[Pcd]
+  gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress
+  gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize
+
diff --git a/Platform/AMD/BoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.c 
b/Platform/AMD/BoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.c
new file mode 100644
index ..18404405d9fa
--- /dev/null
+++ b/Platform/AMD/BoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.c
@@ -0,0 +1,132 @@
+/** @file
+
+SetCacheMtrr library functions.
+This library implementation is for AMD processor based platforms.
+
+Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+
+/**
+  This function sets the cache MTRR values for PEI phase.
+**/
+VOID
+EFIAPI
+SetCacheMtrr (
+  VOID
+  )
+{
+  EFI_STATUS  Status;
+
+  Status = MtrrSetMemoryAttribute (
+ 0,
+ 0xA,
+ CacheWriteBack
+ );
+  if (EFI_ERROR (Status)) {
+DEBUG ((
+  DEBUG_ERROR,
+  "Error(%r) in setting CacheWriteBack for 0-0x9\n",
+  Status
+  ));
+  }
+
+  Status = MtrrSetMemoryAttribute (
+ 0xA,
+ 0x2,
+ CacheUncacheable
+ );
+  if (EFI_ERROR (Status)) {
+DEBUG ((
+  DEBUG_ERROR,
+  "Error(%r) in setting CacheUncacheable for 0xA-0xB\n",
+  Status
+  ));
+  }
+
+  Status = MtrrSetMemoryAttribute (
+ 0xC,
+ 0x4,
+ CacheWriteProtected
+ );
+  if (EFI_ERROR (Status)) {
+DEBUG ((
+  DEBUG_ERROR,
+  "Error(%r) in setting CacheWriteProtected for 0xC-0xF\n",
+  Status
+  ));
+  }
+
+  Status = MtrrSetMemoryAttribute (
+ 0x10,
+ 0xAFF0,
+ CacheWriteBack
+ );
+  if (EFI_ERROR (Status)) {
+DEBUG ((
+  DEBUG_ERROR,
+  "Error(%r) in setting CacheWriteBack for 0x10-0xAFFF\n",
+  Status
+  ));
+  }
+
+  Status = MtrrSetMemoryAttribute (
+ PcdGet32 (PcdFlashAreaBaseAddress),
+ PcdGet32 (PcdFlashAreaSize),
+ CacheWriteProtected
+ );
+  if (EFI_ERROR (Status)) {
+DEBUG ((
+  DEBUG_ERROR,
+  "Error(%r) in setting CacheWriteProtected for 0x%X-0x%X\n",
+  Status,
+  PcdGet32 (PcdFlashAreaBaseAddress),
+  PcdGet32 (PcdFlashAreaBaseAddress) + PcdGet32 (PcdFlashAreaSize)
+  ));
+  }
+
+  MtrrDebugPrintAllMtrrs ();
+  return;
+}
+
+/**
+  Update MTRR setting in EndOfPei phase.
+  This function will set the MTRR value as CacheUncacheable
+  for Flash address.
+
+  @retval  EFI_SUCCESS  The function completes successfully.
+  @retval  Others   Some error occurs.
+**/
+EFI_STATUS

[edk2-devel] [PATCH v1 0/4] Adds AMD/BoardPkg and AMD/PlatformPkg

2023-03-15 Thread Abdul Lateef Attar via groups.io
Adds AMD/BoardPkg to support MinPlatformPkg framework.
Adds AMD/PlatformPkg, which provide supporting modules
and libraries for AMD based platform.

PR: https://github.com/tianocore/edk2-platforms/pull/68

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Abner Chang https://edk2.groups.io/g/devel/message/101207
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[edk2-devel] [PATCH v1 4/4] Maintainers.txt: Adds AMD/BoardPkg and AMD/PlatformPkg maintainers

2023-03-15 Thread Abdul Lateef Attar via groups.io
From: Abdul Lateef Attar 

Adds maintainers for AMD/BoardPkg and AMD/PlatformPkg.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Abner Chang 
---
 Maintainers.txt | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/Maintainers.txt b/Maintainers.txt
index 747191366070..bb8ab643e090 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -91,6 +91,12 @@ F: Silicon/AMD/Styx/
 M: Ard Biesheuvel 
 M: Leif Lindholm 
 
+AMD Platform
+F: Platform/AMD/BoardPkg
+F: Platform/AMD/PlatformPkg
+M: Abner Chang 
+M: Abdul Lateef Attar 
+
 Ampere Computing
 F: Platform/Ampere
 F: Silicon/Ampere
-- 
2.25.1



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[edk2-devel] [PATCH v1 2/4] Platform/AMD/PlatformPkg: Adds PciHotPlug init protocol implementation

2023-03-15 Thread Abdul Lateef Attar via groups.io
Adds PCI hotplug init protocol implementation.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Abner Chang 
---
 Platform/AMD/PlatformPkg/PlatformPkg.dec  |  16 +
 Platform/AMD/PlatformPkg/PlatformPkg.dsc  |  23 ++
 .../PlatformPkg/PciHotPlug/PciHotPlugInit.inf |  41 +++
 .../PlatformPkg/PciHotPlug/PciHotPlugInit.c   | 340 ++
 4 files changed, 420 insertions(+)
 create mode 100644 Platform/AMD/PlatformPkg/PciHotPlug/PciHotPlugInit.inf
 create mode 100644 Platform/AMD/PlatformPkg/PciHotPlug/PciHotPlugInit.c

diff --git a/Platform/AMD/PlatformPkg/PlatformPkg.dec 
b/Platform/AMD/PlatformPkg/PlatformPkg.dec
index 6155860979cb..1bc38d6025c3 100644
--- a/Platform/AMD/PlatformPkg/PlatformPkg.dec
+++ b/Platform/AMD/PlatformPkg/PlatformPkg.dec
@@ -13,3 +13,19 @@ [Defines]
   PACKAGE_NAME   = PlatformPkg
   PACKAGE_GUID   = 38FBA311-E2AA-4620-9A90-9A23753D1878
   PACKAGE_VERSION= 0.1
+
+[Guids]
+  gPlatformPkgTokenSpaceGuid = { 0x95ECA58D, 0x09B6, 0x4420, { 0xB4, 0xE7, 
0x01, 0x7F, 0x6A, 0x5B, 0x26, 0x0F }}
+
+[PcdsDynamic, PcdsDynamicEx]
+  #
+  # PCI HotPlug Resource Padding
+  #
+  # IO Resource padding in bytes, default 4KB
+  
gPlatformPkgTokenSpaceGuid.PcdPciHotPlugResourcePadIO|0x1000|UINT64|0x1000
+  # PreFetch Memory padding in bytes, default 2MB
+  
gPlatformPkgTokenSpaceGuid.PcdPciHotPlugResourcePadPMem|0x0020|UINT64|0x1001
+  # Non-PreFetch Memory padding in bytes, default 1MB
+  
gPlatformPkgTokenSpaceGuid.PcdPciHotPlugResourcePadMem|0x0010|UINT64|0x1002
+  # PCI bus padding, number of bus to reserve, default 2 bus
+  gPlatformPkgTokenSpaceGuid.PcdPciHotPlugResourcePadBus|2|UINT8|0x1003
diff --git a/Platform/AMD/PlatformPkg/PlatformPkg.dsc 
b/Platform/AMD/PlatformPkg/PlatformPkg.dsc
index 704566b9ea73..9a693070ab3f 100644
--- a/Platform/AMD/PlatformPkg/PlatformPkg.dsc
+++ b/Platform/AMD/PlatformPkg/PlatformPkg.dsc
@@ -16,5 +16,28 @@ [Defines]
   BUILD_TARGETS   = DEBUG | RELEASE | NOOPT
   SUPPORTED_ARCHITECTURES = IA32 | X64
 
+
 [Packages]
   PlatformPkg/PlatformPkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+
+[LibraryClasses.Common]
+  
UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+  
UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+  
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+  BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+  PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+  
RegisterFilterLib|MdePkg/Library/RegisterFilterLibNull/RegisterFilterLibNull.inf
+  
SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
+  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+  
DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
+  IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+  
PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf
+  PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+  PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
+
+[Components.X64]
+  PlatformPkg/PciHotPlug/PciHotPlugInit.inf
diff --git a/Platform/AMD/PlatformPkg/PciHotPlug/PciHotPlugInit.inf 
b/Platform/AMD/PlatformPkg/PciHotPlug/PciHotPlugInit.inf
new file mode 100644
index ..0079c4acf14e
--- /dev/null
+++ b/Platform/AMD/PlatformPkg/PciHotPlug/PciHotPlugInit.inf
@@ -0,0 +1,41 @@
+## @file
+# This driver implements EFI_PCI_HOT_PLUG_INIT_PROTOCOL.
+# Adds resource padding information, for PCIe hotplug purposes.
+#
+# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+  INF_VERSION= 1.29
+  BASE_NAME  = PciHotPlugInit
+  FILE_GUID  = 8B67D95F-78B7-484F-8F16-5F22AB388B0C
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 0.1
+  ENTRY_POINT= PciHotPlugInitialize
+
+[Sources]
+  PciHotPlugInit.c
+
+[Packages]
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  PlatformPkg/PlatformPkg.dec
+
+[LibraryClasses]
+  UefiDriverEntryPoint
+  UefiBootServicesTableLib
+  DebugLib
+  MemoryAllocationLib
+
+[Protocols]
+  gEfiPciHotPlugInitProtocolGuid
+
+[Pcd]
+  gPlatformPkgTokenSpaceGuid.PcdPciHotPlugResourcePadIO
+  gPlatformPkgTokenSpaceGuid.PcdPciHotPlugResourcePadPMem
+  gPlatformPkgTokenSpaceGuid.PcdPciHotPlugResourcePadMem
+  gPlatformPkgTokenSpaceGuid.PcdPciHotPlugResourcePadBus
+
+[Depex]
+  TRUE
diff --git a/Platform/AMD/PlatformPkg/PciHotPlug/PciHotPlugInit.c 
b/Platform/AMD/PlatformPkg/PciHotPlug/PciHotPlugInit.c
new file mode 100644
index ..7a3c8e024e4d
---

[edk2-devel] [PATCH v1 1/4] Platform/AMD: Adds BoardPkg and PlatformPkg

2023-03-15 Thread Abdul Lateef Attar via groups.io
Adds initial DEC and DSC file for BoardPkg and PlatformPkg packages,
which supports AMD processor family based boards and platforms.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Abner Chang 
Signed-off-by: Abdul Lateef Attar 
---
 Platform/AMD/BoardPkg/BoardPkg.dec   | 18 ++
 Platform/AMD/PlatformPkg/PlatformPkg.dec | 15 +++
 Platform/AMD/BoardPkg/BoardPkg.dsc   | 20 
 Platform/AMD/PlatformPkg/PlatformPkg.dsc | 20 
 4 files changed, 73 insertions(+)
 create mode 100644 Platform/AMD/BoardPkg/BoardPkg.dec
 create mode 100644 Platform/AMD/PlatformPkg/PlatformPkg.dec
 create mode 100644 Platform/AMD/BoardPkg/BoardPkg.dsc
 create mode 100644 Platform/AMD/PlatformPkg/PlatformPkg.dsc

diff --git a/Platform/AMD/BoardPkg/BoardPkg.dec 
b/Platform/AMD/BoardPkg/BoardPkg.dec
new file mode 100644
index ..3ceff33f4fc1
--- /dev/null
+++ b/Platform/AMD/BoardPkg/BoardPkg.dec
@@ -0,0 +1,18 @@
+## @file BoardPkg.dec
+#  Declaration file for AMD's BoardPkg.
+#
+#  This package supports AMD processor family based board as per the 
MinPlatform
+#  Arch specification.
+#
+#  Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#  @par Specification Reference:
+#   -https://tianocore-docs.github.io/edk2-MinimumPlatformSpecification/draft/ 
0.7
+##
+
+[Defines]
+  DEC_SPECIFICATION  = 1.27
+  PACKAGE_NAME   = BoardPkg
+  PACKAGE_GUID   = 44F9D761-9ECB-43DD-A5AC-177E5048701B
+  PACKAGE_VERSION= 0.1
diff --git a/Platform/AMD/PlatformPkg/PlatformPkg.dec 
b/Platform/AMD/PlatformPkg/PlatformPkg.dec
new file mode 100644
index ..6155860979cb
--- /dev/null
+++ b/Platform/AMD/PlatformPkg/PlatformPkg.dec
@@ -0,0 +1,15 @@
+## @file PlatformPkg.dec
+#  Declaration file for AMD's PlatformPkg.
+#
+#  This package supports AMD processory family based platform.
+#
+#  Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  DEC_SPECIFICATION  = 1.27
+  PACKAGE_NAME   = PlatformPkg
+  PACKAGE_GUID   = 38FBA311-E2AA-4620-9A90-9A23753D1878
+  PACKAGE_VERSION= 0.1
diff --git a/Platform/AMD/BoardPkg/BoardPkg.dsc 
b/Platform/AMD/BoardPkg/BoardPkg.dsc
new file mode 100644
index ..cb4065b86c60
--- /dev/null
+++ b/Platform/AMD/BoardPkg/BoardPkg.dsc
@@ -0,0 +1,20 @@
+## @file
+#  BoardPkg.dsc
+#
+#  Description file for AMD BoardPkg
+#
+#  Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+  DSC_SPECIFICATION   = 1.30
+  PLATFORM_GUID   = 88F8A9AE-2FA0-4D58-A6F9-05F635C05F4E
+  PLATFORM_NAME   = BoardPkg
+  PLATFORM_VERSION= 0.1
+  OUTPUT_DIRECTORY= Build/$(PLATFORM_NAME)
+  BUILD_TARGETS   = DEBUG | RELEASE | NOOPT
+  SUPPORTED_ARCHITECTURES = IA32 | X64
+
+[Packages]
+  BoardPkg/BoardPkg.dec
diff --git a/Platform/AMD/PlatformPkg/PlatformPkg.dsc 
b/Platform/AMD/PlatformPkg/PlatformPkg.dsc
new file mode 100644
index ..704566b9ea73
--- /dev/null
+++ b/Platform/AMD/PlatformPkg/PlatformPkg.dsc
@@ -0,0 +1,20 @@
+## @file
+#  PlatformPkg.dsc
+#
+#  Description file for AMD PlatformPkg
+#
+#  Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+  DSC_SPECIFICATION   = 1.30
+  PLATFORM_GUID   = 2F7C29F2-7F35-4B49-B97D-F0E61BD42FC0
+  PLATFORM_NAME   = PlatformPkg
+  PLATFORM_VERSION= 0.1
+  OUTPUT_DIRECTORY= Build/$(PLATFORM_NAME)
+  BUILD_TARGETS   = DEBUG | RELEASE | NOOPT
+  SUPPORTED_ARCHITECTURES = IA32 | X64
+
+[Packages]
+  PlatformPkg/PlatformPkg.dec
-- 
2.25.1



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