Re: [edk2-devel] [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in confidential guests

[Yao, Jiewen]

Reviewed-by: Jiewen Yao 

> -Original Message-
> From: Gerd Hoffmann 
> Sent: Wednesday, April 24, 2024 2:00 PM
> To: devel@edk2.groups.io
> Cc: Oliver Steffen ; Gerd Hoffmann
> ; Ard Biesheuvel ; Yao, Jiewen
> ; Srikanth Aithal 
> Subject: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in 
> confidential
> guests
> 
> The VirtHstiDxe does not work in confidential guests.  There also isn't
> anything we can reasonably test, neither flash storage nor SMM mode will
> be used in that case.  So just skip driver load when running in a
> confidential guest.
> 
> Cc: Ard Biesheuvel 
> Cc: Jiewen Yao 
> Fixes: 506740982bba ("OvmfPkg/VirtHstiDxe: add code flash check")
> Signed-off-by: Gerd Hoffmann 
> Tested-by: Srikanth Aithal 
> ---
>  OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf | 1 +
>  OvmfPkg/VirtHstiDxe/VirtHstiDxe.c   | 6 ++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> index 9514933011e8..b5c237288766 100644
> --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> @@ -49,6 +49,7 @@ [FeaturePcd]
>gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
> 
>  [Pcd]
> +  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr
>gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase
>gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase
> 
> diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> index b6e53a1219d1..efaff0d1f3cb 100644
> --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> @@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
> 
>  #include 
> @@ -140,6 +141,11 @@ VirtHstiDxeEntrypoint (
>EFI_STATUS   Status;
>EFI_EVENTEvent;
> 
> +  if (PcdGet64 (PcdConfidentialComputingGuestAttr)) {
> +DEBUG ((DEBUG_INFO, "%a: confidential guest\n", __func__));
> +return EFI_UNSUPPORTED;
> +  }
> +
>DevId = VirtHstiGetHostBridgeDevId ();
>switch (DevId) {
>  case INTEL_82441_DEVICE_ID:
> --
> 2.44.0



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[edk2-devel] [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in confidential guests

[Gerd Hoffmann]

The VirtHstiDxe does not work in confidential guests.  There also isn't
anything we can reasonably test, neither flash storage nor SMM mode will
be used in that case.  So just skip driver load when running in a
confidential guest.

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Fixes: 506740982bba ("OvmfPkg/VirtHstiDxe: add code flash check")
Signed-off-by: Gerd Hoffmann 
Tested-by: Srikanth Aithal 
---
 OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf | 1 +
 OvmfPkg/VirtHstiDxe/VirtHstiDxe.c   | 6 ++
 2 files changed, 7 insertions(+)

diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf 
b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
index 9514933011e8..b5c237288766 100644
--- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
+++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
@@ -49,6 +49,7 @@ [FeaturePcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
 
 [Pcd]
+  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr
   gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase
 
diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c 
b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
index b6e53a1219d1..efaff0d1f3cb 100644
--- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
+++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
@@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -140,6 +141,11 @@ VirtHstiDxeEntrypoint (
   EFI_STATUS   Status;
   EFI_EVENTEvent;
 
+  if (PcdGet64 (PcdConfidentialComputingGuestAttr)) {
+DEBUG ((DEBUG_INFO, "%a: confidential guest\n", __func__));
+return EFI_UNSUPPORTED;
+  }
+
   DevId = VirtHstiGetHostBridgeDevId ();
   switch (DevId) {
 case INTEL_82441_DEVICE_ID:
-- 
2.44.0



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Re: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib

[Wu, Jiaxin]

Hi Gerd,

AMD version is not work for IA32X64 ovmf.

I checked the detailed: CpuSaveState->x64 is always used for OVMF no matter 
IA32 or X64, while AMD is not, which is decided by the MSR EFER_ADDRESS LMA bit 
check.

There is a potential issue/open in OVMF why need use the X64 CpuSaveState for 
IA32. Before this open resolved, I still prefer to keep use the ovmf specific 
lib instance.

Thanks,
Jiaxin 

> -Original Message-
> From: Wu, Jiaxin
> Sent: Tuesday, April 23, 2024 8:16 PM
> To: Gerd Hoffmann 
> Cc: devel@edk2.groups.io; Ni, Ray ; Zeng, Star
> ; Kumar, Rahul R ; Dong,
> Guo ; Rhodes, Sean ; Lu,
> James ; Guo, Gua ; Ard Biesheuvel
> ; Yao, Jiewen ; Abdul
> Lateef Attar ; Abner Chang
> ; Tom Lendacky 
> Subject: RE: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib
> 
> As I documented in the comment:
> 
> This patch provides the SmmRelocationLib library instance
> for OVMF to handle the logic difference, and it won't change
> the existing implementation code logic.
> 
> But as I said, it depends on you. I will drop the OvmfPkg/SmmRelocationLib
> since confirmed we can use the ADM version for OVMF.
> 
> Thanks,
> Jiaxin
> 
> > -Original Message-
> > From: Gerd Hoffmann 
> > Sent: Tuesday, April 23, 2024 4:43 PM
> > To: Wu, Jiaxin 
> > Cc: devel@edk2.groups.io; Ni, Ray ; Zeng, Star
> > ; Kumar, Rahul R ; Dong,
> > Guo ; Rhodes, Sean ; Lu,
> > James ; Guo, Gua ; Ard
> Biesheuvel
> > ; Yao, Jiewen ; Abdul
> > Lateef Attar ; Abner Chang
> > ; Tom Lendacky 
> > Subject: Re: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib
> >
> > On Tue, Apr 23, 2024 at 07:31:18AM +, Wu, Jiaxin wrote:
> > > Thanks Gerd, I will try the S3 on OVMF.
> > >
> > > And for AmdSmmRelocationLib usage in OVMF, do you prefer:
> > > 1. use the AmdSmmRelocationLib directly in this patch set? Or
> > > 2. still keep the original to create the OvmfPkg/SmmRelocationLib, and
> clean
> > the code in the future patch?
> >
> > Clear preference for (1), why introduce OvmfPkg/SmmRelocationLib only to
> > delete it shortly thereafter?
> >
> > take care,
> >   Gerd



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Re: [edk2-devel] [PATCH v1 0/4] Adjust the QemuFwCfgLibMmio and add PEI stage

[Chao Li]

Hi Gerd and Ard,

Can I submit the V2 this week? I want all OvmfPkg changes to be meged 
before the 202405 feature freeze.



Thanks,
Chao
On 2024/4/22 17:21, Chao Li wrote:


Hi Ard,

Could you take a look at this patch set and give you some suggestions?

On 2024/4/17 18:01, Chao Li wrote:


Hi Gerd,

On 2024/4/17 17:35, Gerd Hoffmann wrote:

On Wed, Apr 17, 2024 at 04:12:56PM +0800, Chao Li wrote:

Patch1: Added three PCDs for QemuFwCfgLibMmio
Patch2: Sparate QemuFwCfgLibMmio.c into two files and default as DXE
stage library.
Patch3: Added QemuFwCfgMmiLib PEI version
Patch4: Rename QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf and
enable it in AARCH64 and RISCV64.

Ok, I see, you are using the PCDs because global variables don't work
in PEI.

Yes. :)

Alternative approach would be to create a HOB for that (see
EFI_HOB_PLATFORM_INFO used by X64).  Not sure this is a good idea
though given that we have three different architectures using that code.
Ard, any advise?
I think HOB might be heavy, and the dynamically PCD is also uses the 
HOB, so this I think this way is more simpler. I'm also looking 
forward Ard's suggestions. :)

   OvmfPkg: Add three PCDs for QemuFwCfgLib
   OvmfPkg: Separate QemuFwCfgLibMmio.c into two files

This patch should be splitted into two, one doing the code split without
functional change, and one which switches from global variables to PCDs
(or HOB).

OK, I will split it in V2.

Otherwise this looks good to me (and I'd suggest to keep and merge this
as separate patch series).

Sure!

take care,
   Gerd










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Re: [edk2-devel] [PATCH v1 1/1] BaseTools/Fmmt.py: Python 3.12 support

[Guo, Gua]

Thanks @gaoliming for the reviewed-by, I've updated the RB info into PR and add 
push label.
https://github.com/tianocore/edk2/pull/5579

Thanks,
Gua
-Original Message-
From: gaoliming  
Sent: Tuesday, April 23, 2024 10:42 PM
To: devel@edk2.groups.io; Guo, Gua 
Cc: 'Rebecca Cran' ; Feng, Bob C ; 
Chen, Christine 
Subject: 回复: [edk2-devel] [PATCH v1 1/1] BaseTools/Fmmt.py: Python 3.12 support

Reviewed-by: Liming Gao 

> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Guo, Gua
> 发送时间: 2024年4月22日 9:50
> 收件人: devel@edk2.groups.io
> 抄送: gua@intel.com; Rebecca Cran ; Liming Gao 
> ; Bob Feng ; Yuwei 
> Chen 
> 主题: [edk2-devel] [PATCH v1 1/1] BaseTools/Fmmt.py: Python 3.12 support
> 
> From: Gua Guo 
> 
> Ref to https://docs.python.org/3/whatsnew/3.12.html
> A backslash-character pair that is not a valid escape sequence now 
> generates
> 
> Cc: Rebecca Cran 
> Cc: Liming Gao 
> Cc: Bob Feng 
> Cc: Yuwei Chen 
> Signed-off-by: Gua Guo 
> ---
>  BaseTools/Source/Python/FMMT/FMMT.py | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/BaseTools/Source/Python/FMMT/FMMT.py
> b/BaseTools/Source/Python/FMMT/FMMT.py
> index 26fc4c5792..7505b6c88a 100644
> --- a/BaseTools/Source/Python/FMMT/FMMT.py
> +++ b/BaseTools/Source/Python/FMMT/FMMT.py
> @@ -37,7 +37,7 @@ parser.add_argument("-l", "--LayoutFileName", 
> dest="LayoutFileName", nargs='+',
>  the file will be generated with default name 
> (Layout_'InputFileName'.txt). \
> 
>  Currently supports two formats: json, txt.
> More formats will be added in the future")
> 
>  parser.add_argument("-c", "--ConfigFilePath", dest="ConfigFilePath", 
> nargs='+',
> 
> -help="Provide the target FmmtConf.ini file path: '-c
> C:\Code\FmmtConf.ini' \
> 
> +help="Provide the target FmmtConf.ini file path: 
> + '-c
> C:\\Code\\FmmtConf.ini' \
> 
>  FmmtConf file saves the target guidtool used 
> in compress/uncompress process.\
> 
>  If do not provide, FMMT tool will search the 
> inputfile folder for FmmtConf.ini firstly, if not found,\
> 
>  the FmmtConf.ini saved in FMMT tool's folder 
> will be used as default.")
> 
> --
> 2.39.2.windows.1
> 
> 
> 
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> 





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Re: [edk2-devel] [PATCH v1 1/1] ShellPkg/SmbiosView: Add Type 45 entry to query table

[Gao, Zhichao]

Reviewed-by: Zhichao Gao 

Thanks,
Zhichao

From: Giri Mudusuru 
Sent: Tuesday, April 23, 2024 11:55 PM
To: devel@edk2.groups.io; ellie.le...@arm.com
Cc: Gao, Zhichao ; Giri Mudusuru 

Subject: Re: [EXTERNAL] [edk2-devel] [PATCH v1 1/1] ShellPkg/SmbiosView: Add 
Type 45 entry to query table

Reviewed-By: Giri Mudusuru 
mailto:girimudus...@microsoft.com>>

From: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>> on behalf of Ellie Lewis 
via groups.io 
mailto:ellie.lewis=arm@groups.io>>
Sent: Tuesday, April 23, 2024 3:51 AM
To: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>>
Cc: Zhichao Gao mailto:zhichao@intel.com>>
Subject: [EXTERNAL] [edk2-devel] [PATCH v1 1/1] ShellPkg/SmbiosView: Add Type 
45 entry to query table

[You don't often get email from 
ellie.lewis=arm@groups.io. Learn why 
this is important at https://aka.ms/LearnAboutSenderIdentification ]

The type field value is currently undefined for type 45 SMBIOS tables
in smbiosview. An entry is added in the query table to display the
correct value for type 45 tables.
Bugzilla: 
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D4733&data=05%7C02%7CGIRIMUDUSURU%40microsoft.com%7Cffd3eb0d33e4454bda3108dc63a5c7b7%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C638494810879613185%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=TKB1DcLEXngmx12y8vaLsPLZPkm9uL%2Be51Ui%2FI8rwrg%3D&reserved=0

Cc: Zhichao Gao mailto:zhichao@intel.com>>
Signed-off-by: Ellie Lewis mailto:ellie.le...@arm.com>>
---
 ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c | 5 +
 1 file changed, 5 insertions(+)

diff --git 
a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
index 36f8739d6c87..d786b14f3877 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
@@ -5,6 +5,7 @@
   Copyright (c) 2005 - 2024, Intel Corporation. All rights reserved.
   (C) Copyright 2016-2019 Hewlett Packard Enterprise Development LP
   Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+  Copyright (c) 2024, Arm Limited. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent

 **/
@@ -3918,6 +3919,10 @@ TABLE_ITEM  StructureTypeInfoTable[] = {
 44,
 L" Processor Additional Information"
   },
+  {
+45,
+L" Firmware Inventory Information"
+  },
   {
 0x7E,
 L" Inactive"
--
2.25.1

«¢êlS'âzK¢êÞqè¯y©e(tm)ë,j¬±éí¶"¡Iì¹»®&Þ?Ûi³ÿÞvM ®<©²*?f÷^½éº{.lb ÅQ%Rhoe®<(~×(


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[edk2-devel] [PATCH] OvmfPkg: Don't make APIC MMIO accesses with encryption bit set

[Roth, Michael via groups.io]

For the most part, OVMF will clear the encryption bit for MMIO regions,
but there is currently one known exception during SEC when the APIC
base address is accessed via MMIO with the encryption bit set for
SEV-ES/SEV-SNP guests. In the case of SEV-SNP, this requires special
handling on the hypervisor side which may not be available in the
future[1], so make the necessary changes in the SEC-configured page
table to clear the encryption bit for 4K region containing the APIC
base address.

While here, drop special handling for the APIC base address in the
SEV-ES/SNP #VC handler.

[1] https://lore.kernel.org/lkml/20240208002420.34mvemnzrwwsa...@amd.com/#t

Suggested-by: Tom Lendacky 
Cc: Ard Biesheuvel 
Cc: Gerd Hoffmann 
Cc: Erdem Aktas 
Cc: Jiewen Yao 
Cc: Min Xu 
Cc: Tom Lendacky 
Cc: Jianyong Wu 
Cc: Anatol Belski 
Signed-off-by: Michael Roth 
---
 OvmfPkg/AmdSev/AmdSevX64.fdf|  5 +-
 OvmfPkg/CloudHv/CloudHvX64.fdf  |  5 +-
 OvmfPkg/Library/CcExitLib/CcExitVcHandler.c | 12 +---
 OvmfPkg/Microvm/MicrovmX64.fdf  |  3 +
 OvmfPkg/OvmfPkg.dec |  5 ++
 OvmfPkg/OvmfPkgX64.fdf  |  5 +-
 OvmfPkg/Sec/AmdSev.c| 71 +
 OvmfPkg/Sec/AmdSev.h| 14 
 OvmfPkg/Sec/SecMain.c   |  1 +
 OvmfPkg/Sec/SecMain.inf |  2 +
 10 files changed, 109 insertions(+), 14 deletions(-)

diff --git a/OvmfPkg/AmdSev/AmdSevX64.fdf b/OvmfPkg/AmdSev/AmdSevX64.fdf
index d49555c6c8..595945181c 100644
--- a/OvmfPkg/AmdSev/AmdSevX64.fdf
+++ b/OvmfPkg/AmdSev/AmdSevX64.fdf
@@ -77,7 +77,10 @@ 
gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretBase|gUefiOvmfPkgTokenSpaceGuid.Pcd
 0x010C00|0x000400

 
gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase|gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableSize

 

-0x011000|0x00F000

+0x011000|0x001000

+gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableSize

+

+0x012000|0x00E000

 
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize

 

 0x02|0x0E

diff --git a/OvmfPkg/CloudHv/CloudHvX64.fdf b/OvmfPkg/CloudHv/CloudHvX64.fdf
index eae3ada191..3e6688b103 100644
--- a/OvmfPkg/CloudHv/CloudHvX64.fdf
+++ b/OvmfPkg/CloudHv/CloudHvX64.fdf
@@ -76,7 +76,10 @@ 
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCp
 0x00F000|0x001000

 
gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtr|gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtrSize

 

-0x01|0x01

+0x01|0x001000

+gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableSize

+

+0x011000|0x00F000

 
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize

 

 0x02|0x0E

diff --git a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c 
b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
index 549375dfed..da8f1e5db9 100644
--- a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
+++ b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
@@ -98,7 +98,7 @@ UnsupportedExit (
   Validate that the MMIO memory access is not to encrypted memory.

 

   Examine the pagetable entry for the memory specified. MMIO should not be

-  performed against encrypted memory. MMIO to the APIC page is always allowed.

+  performed against encrypted memory.

 

   @param[in] Ghcb   Pointer to the Guest-Hypervisor Communication Block

   @param[in] MemoryAddress  Memory address to validate

@@ -118,16 +118,6 @@ ValidateMmioMemory (
 {

   MEM_ENCRYPT_SEV_ADDRESS_RANGE_STATE  State;

   GHCB_EVENT_INJECTION GpEvent;

-  UINTNAddress;

-

-  //

-  // Allow APIC accesses (which will have the encryption bit set during

-  // SEC and PEI phases).

-  //

-  Address = MemoryAddress & ~(SIZE_4KB - 1);

-  if (Address == GetLocalApicBaseAddress ()) {

-return 0;

-  }

 

   State = MemEncryptSevGetAddressRangeState (

 0,

diff --git a/OvmfPkg/Microvm/MicrovmX64.fdf b/OvmfPkg/Microvm/MicrovmX64.fdf
index 825bf9f5e4..055e659a35 100644
--- a/OvmfPkg/Microvm/MicrovmX64.fdf
+++ b/OvmfPkg/Microvm/MicrovmX64.fdf
@@ -62,6 +62,9 @@ 
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvm
 0x00C000|0x001000

 
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupSize

 

+0x00D000|0x001000

+gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableSize

+

 0x01|0x01

 
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize

 

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 2f7bded926..b23219ebd4 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -277,6 +277,11 @@
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase|0|UI

Re: [edk2-devel] 回复: [PATCH 0/7] General Updates based on UEFI 2.10 and PI 1.8 Specification

[Felix Polyudov via groups.io]

I think patch 6 can be updated to introduce unified PI specification versioning 
macros without incrementing the minor revision,
by changing PI_SPECIFICATION_MINOR_REVISION back to 70.
This will ensure compliance with the versioning schema introduced in PI 1.7B 
without changing the PI support level.
(the macros were introduced by PIWG mantis 2101)

-Original Message-
From: gaoliming 
Sent: Tuesday, April 23, 2024 10:49 AM
To: Sachin Ganesh ; devel@edk2.groups.io
Cc: zhiguang@intel.com; michael.d.kin...@intel.com; 
ardb+tianoc...@kernel.org; kra...@redhat.com; jiewen@intel.com; 
erdemak...@google.com; min.m...@intel.com; thomas.lenda...@amd.com; Felix 
Polyudov ; Dhanaraj V 
Subject: [EXTERNAL] 回复: [PATCH 0/7] General Updates based on UEFI 2.10 and PI 
1.8 Specification


**CAUTION: The e-mail below is from an external source. Please exercise caution 
before opening attachments, clicking links, or following guidance.**

Except for Patch 6/7, others are good to me. Reviewed-by: Liming Gao 


I suggest to merge others first. The patch 6/7 to update PI version from 1.7 to 
1.8 can be discussed first.

Thanks
Liming
> -邮件原件-
> 发件人: Sachin Ganesh 
> 发送时间: 2024年4月20日 5:46
> 收件人: devel@edk2.groups.io
> 抄送: gaolim...@byosoft.com.cn; zhiguang@intel.com;
> michael.d.kin...@intel.com; ardb+tianoc...@kernel.org;
> kra...@redhat.com; jiewen@intel.com; erdemak...@google.com;
> min.m...@intel.com; thomas.lenda...@amd.com; Felix Polyudov
> ; Dhanaraj V ; Sachin Ganesh
> 
> 主题: [PATCH 0/7] General Updates based on UEFI 2.10 and PI 1.8
> Specification
>
> This series of patches are for general updates to MdePkg and
> MdeModulePkg based on UEFI 2.10 and PI 1.8 Specifications
>
> Sachin Ganesh (7):
>   MdePkg: Add definition for NVMe Over Fabric Device Path
>   MdePkg: Add new Resource Attributes defined in PI 1.8 Spec
>   MdePkg: Define Unaccepted Memory Type
>   MdeModulePkg: Use newly defined Unaccepted Memory Type
>   MdePkg: Update Delayed Dispatch PPI as per PI 1.8 Spec
>   MdePkg: Update to PI 1.8 Revision
>   OvmfPkg: Use newly defined Unaccepted Memory Type
>
>  MdeModulePkg/Core/Dxe/Gcd/Gcd.c  | 10 +++---
>  MdeModulePkg/Core/Dxe/Mem/Page.c | 38
> ++--
>  MdeModulePkg/Include/Pi/PrePiDxeCis.h| 25 -
>  MdeModulePkg/Include/Pi/PrePiHob.h   | 20 ---
>  MdePkg/Include/Pi/PiDxeCis.h | 19 +-
>  MdePkg/Include/Pi/PiHob.h| 14 +++-
>  MdePkg/Include/Pi/PiMmCis.h  |  6 ++--
>  MdePkg/Include/Pi/PiMultiPhase.h |  6 
>  MdePkg/Include/Pi/PiPeiCis.h |  6 ++--
>  MdePkg/Include/Pi/PiSmmCis.h |  2 +-
>  MdePkg/Include/Ppi/DelayedDispatch.h | 24 -
>  MdePkg/Include/Protocol/DevicePath.h | 22 
>  OvmfPkg/AmdSevDxe/AmdSevDxe.c|  4 +--
>  OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelper.c |  8 ++---
>  OvmfPkg/Library/PeilessStartupLib/Hob.c  |  4 +--
>  OvmfPkg/Library/PlatformInitLib/IntelTdx.c   |  8 ++---
>  OvmfPkg/PlatformPei/AmdSev.c |  4 +--
>  17 files changed, 108 insertions(+), 112 deletions(-)  delete mode
> 100644 MdeModulePkg/Include/Pi/PrePiDxeCis.h
>  delete mode 100644 MdeModulePkg/Include/Pi/PrePiHob.h
>
> --
> 2.24.1.windows.2
> -The information contained in this message may be confidential and
> proprietary to American Megatrends (AMI). This communication is
> intended
to
> be read only by the individual or entity to whom it is addressed or by
their
> designee. If the reader of this message is not the intended recipient,
> you
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> on notice that any distribution of this message, in any form, is
> strictly prohibited. Please promptly notify the sender by reply e-mail
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> at 770-246-8600, and then delete or destroy all copies of the
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Re: [edk2-devel] [PATCH v3 08/13] OvmfPkg/PlatformInitLib: Create gEfiSmmSmramMemoryGuid

[Wu, Jiaxin]

Hi Gerd,

There was the issue in my patch to change the smm access driver: 
SmmAccessPeiOpen(), I removed below code due to the comment in original code 
that indicate the DescriptorIndex is not considered at all:

  ...
  if (DescriptorIndex >= DescIdxCount) {
return EFI_INVALID_PARAMETER;
  }
  //
  // According to current practice, *DescriptorIndex is not considered at all*,
  // beyond validating it.
  //
  ...

But it's important for smmlockboxpeilib to check the return status of 
SmmAccessPeiOpen (EFI_INVALID_PARAMETER) to continue the RestoreLockBox():
for (Index = 0; !EFI_ERROR (Status); Index++) {
  Status = SmmAccess->Open ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer 
(), SmmAccess, Index);
}

So, it hangs at for() loop once I removed above code in the SmmAccessPeiOpen!!!

After that fix, I still found S3 doesn't work, I checked the master code 
without my patch. It also can't work for S3, which means S3 broken on latest 
master code. You can also double confirm the log that stop as below:

...
S3_BOOT_SCRIPT_LIB_TERMINATE_OPCODE
S3BootScriptDone - Success
Call AsmDisablePaging64() to return to S3 Resume in PEI Phase
Install PPI: 88C9D306-0900-4EB5-8260-3E2DBEDA1F89
Install PPI: 605EA650-C65C-42E1-BA80-91A52AB618C6
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry 
point: 82B5B0
Signal EndOfS3Resume
Signal 96F5296D-05F7-4F3C-8467-E456890E0CB5 to SMM - Enter
Locate Smm Communicate Ppi failed (Not Found)!
Transfer to 16bit OS waking vector - 991F0 > hang here!!!

Thanks,
Jiaxin 

> -Original Message-
> From: Wu, Jiaxin
> Sent: Tuesday, April 23, 2024 9:20 PM
> To: Gerd Hoffmann 
> Cc: devel@edk2.groups.io; Ard Biesheuvel ; Yao,
> Jiewen ; Ni, Ray 
> Subject: RE: [PATCH v3 08/13] OvmfPkg/PlatformInitLib: Create
> gEfiSmmSmramMemoryGuid
> 
> More info:
> I quick dump the SMRAM info with original SmmAccess implementation, it's
> same as I produced in the gEfiSmmSmramMemoryGuid HOB.
> 
> SmmAccess:
> SmmAccessPeiEntryPoint: SMRAM map follows, 2 entries
> SmmAccessPeiEntryPoint: 7F00 1000 
> 7F00
> 1A---> for the S3 Resume in gEfiAcpiVariableGuid
> SmmAccessPeiEntryPoint: 7F001000   FFF000 
> 7F001000
> A
> 
> Smram map in the gEfiSmmSmramMemoryGuid:
> PlatformQemuInitializeRam: 7F00 1000  
>7F00
> 1A--> ---> for the S3 Resume in gEfiAcpiVariableGuid
> PlatformQemuInitializeRam: 7F001000   FFF000  
>7F001000
> A
> 
> 
> Thanks,
> Jiaxin
> 
> > -Original Message-
> > From: Wu, Jiaxin
> > Sent: Tuesday, April 23, 2024 8:19 PM
> > To: Gerd Hoffmann 
> > Cc: devel@edk2.groups.io; Ard Biesheuvel ;
> Yao,
> > Jiewen ; Ni, Ray 
> > Subject: RE: [PATCH v3 08/13] OvmfPkg/PlatformInitLib: Create
> > gEfiSmmSmramMemoryGuid
> >
> > >
> > > > +SmramHobDescriptorBlock =
> > > (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)(Hob.Raw);
> > >
> > > > +SmramHobDescriptorBlock->Descriptor[0].PhysicalStart =
> > > PlatformInfoHob->LowMemory - TsegSize;
> > > > +SmramHobDescriptorBlock->Descriptor[0].CpuStart  =
> > > PlatformInfoHob->LowMemory - TsegSize;
> > > > +SmramHobDescriptorBlock->Descriptor[0].PhysicalSize  =
> > EFI_PAGE_SIZE;
> > > > +SmramHobDescriptorBlock->Descriptor[0].RegionState   =
> > > EFI_SMRAM_CLOSED | EFI_CACHEABLE | EFI_ALLOCATED;
> > >
> > > > +SmramHobDescriptorBlock->Descriptor[1].PhysicalStart =
> > > SmramHobDescriptorBlock->Descriptor[0].PhysicalStart + EFI_PAGE_SIZE;
> > > > +SmramHobDescriptorBlock->Descriptor[1].CpuStart  =
> > > SmramHobDescriptorBlock->Descriptor[0].CpuStart + EFI_PAGE_SIZE;
> > > > +SmramHobDescriptorBlock->Descriptor[1].PhysicalSize  = TsegSize -
> > > EFI_PAGE_SIZE;
> > > > +SmramHobDescriptorBlock->Descriptor[1].RegionState   =
> > > EFI_SMRAM_CLOSED | EFI_CACHEABLE;
> > >
> > > This is not going to fly.
> > >
> > > First, smram allocation doesn't work that way.  Have a look at
> > > OvmfPkg/SmmAccess.  I guess that easily explains why this series
> > > breaks S3 suspend.
> > >
> >
> > Oh? Could you explain a bit more for 1) how smram allocation works? 2)
> > what's the possible reason break the S3? I haven't check yet.
> >
> > > Second, storing these descriptors in a HOB (which is PEI memory)
> > > is questionable from a security point of view.
> > >
> >
> > HOB is only to expose the SMRAM address and size, not the contents in
> > smram, what's the security concern?
> >
> >
> > Thanks,
> > Jiaxin


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Re: [edk2-devel] [PATCH v3 4/5] OvmfPkg/VirtHstiDxe: add code flash check

[Aithal, Srikanth via groups.io]

On 4/23/2024 8:01 PM, Gerd Hoffmann wrote:

On Tue, Apr 23, 2024 at 07:14:04PM +0530, Aithal, Srikanth wrote:

Correcting.

On 4/23/2024 7:09 PM, Aithal, Srikanth wrote:

Hello,

Todays OVMF/edk2 master branch is breaking AMD SEV-ES guest boot with
OvmfX64 package, where as sev-es guest boots fine with AmdSev package.

Git bisect pointed to below commit as bad, going back to previous commit
i.e ddc43e7a SEV-ES guest boots fine with OvmfX64 package:

Git bisect pointed to below commit as bad, going back to previous commit i.e
ddc43e7a SEV-ES guest boots fine. With OVMF/edk2 master branch SEV-ES guest
boots fine with *AmdSev *package:

The tests don't make much sense in confidential guests (both sev and
tdx).  Which why the driver is not included in the AmdSevPkg builds.

Not activating the driver in confidential guests should fix that, test
patch below.

take care,
   Gerd

diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf 
b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
index 9514933011e8..b5c237288766 100644
--- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
+++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
@@ -49,6 +49,7 @@ [FeaturePcd]
gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
  
  [Pcd]

+  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr
gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase
  
diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c

index b6e53a1219d1..efaff0d1f3cb 100644
--- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
+++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
@@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
  #include 
  #include 
  #include 
+#include 
  #include 
  
  #include 

@@ -140,6 +141,11 @@ VirtHstiDxeEntrypoint (
EFI_STATUS   Status;
EFI_EVENTEvent;
  
+  if (PcdGet64 (PcdConfidentialComputingGuestAttr)) {

+DEBUG ((DEBUG_INFO, "%a: confidential guest\n", __func__));
+return EFI_UNSUPPORTED;
+  }
+
DevId = VirtHstiGetHostBridgeDevId ();
switch (DevId) {
  case INTEL_82441_DEVICE_ID:


Thanks, tested this patch on top of current edk2 master. Issue is 
resolved, am able to boot sev-es guests.


Tested-by: Srikanth Aithal


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[edk2-devel] [PATCH v1 1/1] ShellPkg/SmbiosView: Add Type 45 entry to query table

[Ellie Lewis]

The type field value is currently undefined for type 45 SMBIOS tables
in smbiosview. An entry is added in the query table to display the
correct value for type 45 tables.
Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=4733

Cc: Zhichao Gao 
Signed-off-by: Ellie Lewis 
---
 ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c | 5 +
 1 file changed, 5 insertions(+)

diff --git 
a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
index 36f8739d6c87..d786b14f3877 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
@@ -5,6 +5,7 @@
   Copyright (c) 2005 - 2024, Intel Corporation. All rights reserved.
   (C) Copyright 2016-2019 Hewlett Packard Enterprise Development LP
   Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+  Copyright (c) 2024, Arm Limited. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -3918,6 +3919,10 @@ TABLE_ITEM  StructureTypeInfoTable[] = {
 44,
 L" Processor Additional Information"
   },
+  {
+45,
+L" Firmware Inventory Information"
+  },
   {
 0x7E,
 L" Inactive"
-- 
2.25.1

Re: [edk2-devel] [PATCH v3 4/5] OvmfPkg/VirtHstiDxe: add code flash check

[Aithal, Srikanth via groups.io]

Correcting.

On 4/23/2024 7:09 PM, Aithal, Srikanth wrote:

Hello,

Todays OVMF/edk2 master branch is breaking AMD SEV-ES guest boot with 
OvmfX64 package, where as sev-es guest boots fine with AmdSev package.


Git bisect pointed to below commit as bad, going back to previous 
commit i.e ddc43e7a SEV-ES guest boots fine with OvmfX64 package:
Git bisect pointed to below commit as bad, going back to previous commit 
i.e ddc43e7a SEV-ES guest boots fine. With OVMF/edk2 master branch 
SEV-ES guest boots fine with *AmdSev *package:


commit 506740982bba199f12e75f6cfda510c30aa4e7c6
Author: Gerd Hoffmann 
Date:   Mon Apr 22 12:47:28 2024 +0200

    OvmfPkg/VirtHstiDxe: add code flash check

    Detects qemu config issue: code pflash is writable.
    Checked for both PC and Q35.

    Cc: Ard Biesheuvel 
    Cc: Jiewen Yao 
    Cc: Konstantin Kostiuk 
    Signed-off-by: Gerd Hoffmann 
    Reviewed-by: Jiewen Yao 

QEMU commandline used:

qemu-system-x86_64 \
-machine q35,confidential-guest-support=sev0,vmport=off \
-object 
sev-guest,id=sev0,cbitpos=51,policy=0x5,reduced-phys-bits=1,kernel-hashes=off 
\

-name guest=vm,debug-threads=on \
-drive if=pflash,format=raw,unit=0,file=or OVMF_X64/OVMF.fd>,readonly  \

-cpu EPYC-Milan-v2 \
-m 4096 \
-smp 1,cores=1,threads=1,dies=1,sockets=1 \
-drive file=22.04-serverfull.qcow2,index=0,media=disk,format=qcow2 \
--enable-kvm \
--nographic


Component levels used in test:
qemu: v8.2.2
host_kernel and guest_kernel: v6.8.2
ovmf: current master of https://github.com/tianocore/edk2, Head: 86c8d69

Attaching guest serial log.


Thanks,

Aithal, Srikanth 

On 4/22/2024 4:17 PM, Gerd Hoffmann via groups.io wrote:

Detects qemu config issue: code pflash is writable.
Checked for both PC and Q35.

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Konstantin Kostiuk 
Signed-off-by: Gerd Hoffmann 
Reviewed-by: Jiewen Yao 
---
  OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf |  2 ++
  OvmfPkg/VirtHstiDxe/VirtHstiDxe.h   | 13 +++
  OvmfPkg/VirtHstiDxe/QemuCommon.c    | 36 +
  OvmfPkg/VirtHstiDxe/VirtHstiDxe.c   |  4 
  4 files changed, 55 insertions(+)
  create mode 100644 OvmfPkg/VirtHstiDxe/QemuCommon.c

diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf 
b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf

index b6bdd1f22e83..9514933011e8 100644
--- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
+++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
@@ -22,6 +22,7 @@ [Sources]
    VirtHstiDxe.c
    QemuPC.c
    QemuQ35.c
+  QemuCommon.c
    Flash.c
    [Packages]
@@ -48,6 +49,7 @@ [FeaturePcd]
    gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
    [Pcd]
+  gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase
    gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase
    [Depex]
diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.h 
b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.h

index ceff41c03711..f8bdcfe8f219 100644
--- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.h
+++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.h
@@ -8,6 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
    #define VIRT_HSTI_BYTE0_SMM_SMRAM_LOCK BIT0
  #define VIRT_HSTI_BYTE0_SMM_SECURE_VARS_FLASH  BIT1
+#define VIRT_HSTI_BYTE0_READONLY_CODE_FLASH    BIT2
    typedef struct {
    // ADAPTER_INFO_PLATFORM_SECURITY
@@ -67,6 +68,18 @@ VirtHstiQemuPCVerify (
    VOID
    );
  +/* QemuCommon.c */
+
+VOID
+VirtHstiQemuCommonInit (
+  VIRT_ADAPTER_INFO_PLATFORM_SECURITY  *VirtHsti
+  );
+
+VOID
+VirtHstiQemuCommonVerify (
+  VOID
+  );
+
  /* Flash.c */
    #define QEMU_FIRMWARE_FLASH_UNKNOWN    0
diff --git a/OvmfPkg/VirtHstiDxe/QemuCommon.c 
b/OvmfPkg/VirtHstiDxe/QemuCommon.c

new file mode 100644
index ..4ab3fe2d6e63
--- /dev/null
+++ b/OvmfPkg/VirtHstiDxe/QemuCommon.c
@@ -0,0 +1,36 @@
+/** @file
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+
+#include "VirtHstiDxe.h"
+
+VOID
+VirtHstiQemuCommonInit (
+  VIRT_ADAPTER_INFO_PLATFORM_SECURITY  *VirtHsti
+  )
+{
+  VirtHstiSetSupported (VirtHsti, 0, 
VIRT_HSTI_BYTE0_READONLY_CODE_FLASH);

+}
+
+VOID
+VirtHstiQemuCommonVerify (
+  VOID
+  )
+{
+  CHAR16  *ErrorMsg;
+
+  switch (VirtHstiQemuFirmwareFlashCheck (PcdGet32 (PcdBfvBase))) {
+    case QEMU_FIRMWARE_FLASH_WRITABLE:
+  ErrorMsg = L"qemu code pflash is writable";
+  break;
+    default:
+  ErrorMsg = NULL;
+  }
+
+  VirtHstiTestResult (ErrorMsg, 0, 
VIRT_HSTI_BYTE0_READONLY_CODE_FLASH);

+}
diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c 
b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c

index 74e5e6bd9d4f..b6e53a1219d1 100644
--- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
+++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
@@ -104,9 +104,11 @@ VirtHstiOnReadyToBoot (
    switch (VirtHstiGetHostBridgeDevId ()) {
  case INTEL_82441_DEVICE_ID:
    VirtHstiQemuPCVerify ();
+  VirtHstiQemuCommonVerify ();
    break;
  case INTEL_Q35_MCH_DEVICE_ID:
    VirtHstiQemuQ35Verify ();
+  VirtHstiQemuCommonVerify ();
    break;
  default:
    ASSERT (FALSE);
@@ -142,9 +144,11 @@ VirtHstiDxeEntrypoint (
    switch (DevId) 

[edk2-devel] [PATCH v1 0/1] ShellPkg/SmbiosView: Add Type 45 entry to query table

[Ellie Lewis]

Entry added to display info type entry in smbiosview for Type 45 tables
as defined in SMBIOS Specification 3.5.

Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=4733

The changes can be seen at:
https://github.com/ellielewisarm/edk2/tree/type45_typefield

Cc: Zhichao Gao 

Ellie Lewis (1):
  ShellPkg/SmbiosView: Add Type 45 entry to query table

 ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c | 5 +
 1 file changed, 5 insertions(+)

-- 
2.25.1

[edk2-devel] [PATCH] Changes to print PMIC&RCD info in Shell Smbiosview

[Shenbagadevi R via groups.io]

Add changes to print PMIC and RCD details of Smbios Type17 in Shell
smbiosview command

Signed-off-by: Shenbagadevi R 
---
 .../UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c  | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c
index 35369f0183..0fbaeb88ae 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c
@@ -902,6 +902,13 @@ SmbiosPrintStructure (
 ShellPrintEx (-1, -1, L"Extended Speed: 0x%x\n", 
Struct->Type17->ExtendedSpeed);

 ShellPrintEx (-1, -1, L"Extended Configured Memory Speed: 0x%x\n", 
Struct->Type17->ExtendedConfiguredMemorySpeed);

   }

+

+  if (AE_SMBIOS_VERSION (0x3, 0x7) && (Struct->Hdr->Length > 0x5C)) {

+ShellPrintEx (-1, -1, L"PMIC0 Manufacturer ID: 0x%x\n", 
Struct->Type17->Pmic0ManufacturerID);

+ShellPrintEx (-1, -1, L"PMIC0 Revision Number: 0x%x\n", 
Struct->Type17->Pmic0RevisionNumber);

+ShellPrintEx (-1, -1, L"RCD Manufacturer ID: 0x%x\n", 
Struct->Type17->RcdManufacturerID);

+ShellPrintEx (-1, -1, L"RCD Revision Number: 0x%x\n", 
Struct->Type17->RcdRevisionNumber);

+  }



   break;



--
2.38.0.windows.1
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Re: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into IndustryStandard

[Nong, Foster]

Hi Liming,

What is the patch review status? Can this patch be merged?

-Original Message-
From: Nong, Foster 
Sent: Wednesday, December 27, 2023 2:05 PM
To: gaoliming ; devel@edk2.groups.io; Kinney, Michael 
D ; 'Chris Li' 
Cc: Ni, Ray 
Subject: RE: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into IndustryStandard

Thanks Liming!
@'Chris Li' and @Kinney, Michael D, please help comment the patch. Thanks!

-Original Message-
From: gaoliming 
Sent: Tuesday, December 19, 2023 9:05 PM
To: devel@edk2.groups.io; Nong, Foster ; Kinney, Michael 
D ; 'Chris Li' 
Cc: Ni, Ray 
Subject: 回复: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into IndustryStandard

Foster:
  I have no comments for this patch. Acked-by: Liming Gao 


Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Nong, Foster
> 发送时间: 2023年12月19日 18:17
> 收件人: devel@edk2.groups.io; Kinney, Michael D 
> ; Gao, Liming ; 
> Chris Li 
> 抄送: Ni, Ray 
> 主题: Re: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into 
> IndustryStandard
> 
> @Gao, Liming @Chris Li @Kinney, Michael D,
> 
> Don't forget reviewing the patch. Thanks!
> 
> -Original Message-
> From: Nong, Foster 
> Sent: Wednesday, November 29, 2023 2:57 PM
> To: devel@edk2.groups.io
> Cc: Nong, Foster ; Kinney, Michael D 
> ; Gao, Liming ; 
> Ni, Ray ; Chris Li 
> Subject: [PATCH v1] MdePkg: Add Cxl30.h into IndustryStandard
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4516
> 
> 1) Add CXL 3.0 header file to comply with CXL 3.0 specification
> 2) CXL 3.0 header will embed Cxl20.h
> 3) Updated Cxl.h to point to 3.0 header file
> 
> Signed-off-by: Foster Nong 
> Cc: Michael D Kinney 
> Cc: Liming Gao 
> Cc: Ray Ni 
> Cc: Chris Li 
> ---
>  MdePkg/Include/IndustryStandard/Cxl.h   |   2 +-
>  MdePkg/Include/IndustryStandard/Cxl30.h | 315 
>  2 files changed, 316 insertions(+), 1 deletion(-)
> 
> diff --git a/MdePkg/Include/IndustryStandard/Cxl.h
> b/MdePkg/Include/IndustryStandard/Cxl.h
> index 9ad3242e25..cb623a355d 100755
> --- a/MdePkg/Include/IndustryStandard/Cxl.h
> +++ b/MdePkg/Include/IndustryStandard/Cxl.h
> @@ -12,7 +12,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #ifndef 
> _CXL_MAIN_H_ #define _CXL_MAIN_H_ -#include 
> +#include  // // 
> CXL assigned new Vendor ID //diff --git 
> a/MdePkg/Include/IndustryStandard/Cxl30.h
> b/MdePkg/Include/IndustryStandard/Cxl30.h
> new file mode 100644
> index 00..feb6b9c52f
> --- /dev/null
> +++ b/MdePkg/Include/IndustryStandard/Cxl30.h
> @@ -0,0 +1,315 @@
> +/** @file+  CXL 3.0 Register definitions++  This file contains the
register
> definitions based on the Compute Express Link+  (CXL) Specification
Revision
> 3.0.++  Copyright (c) 2023, Intel Corporation. All rights 
> reserved.++
> SPDX-License-Identifier: BSD-2-Clause-Patent++**/+#ifndef 
> CXL30_H_+#define CXL30_H_++#include ++//+// 
> CXL Cache Memory Capability IDs+// Compute Express Link Specification 
> Revision 3.0 - Chapter 8.2.4 Table 8-22+//+#define 
> CXL_CACHE_MEM_CAPABILITY_ID_TIMEOUT_AND_ISOLATION
> 0x0009+#define CXL_CACHE_MEM_CAPABILITY_ID_EXTENDED
> 0x000A+#define CXL_CACHE_MEM_CAPABILITY_ID_BI_ROUTE_TABLE
> 0x000B+#define CXL_CACHE_MEM_CAPABILITY_ID_BI_DECODER
> 0x000C+#define
> CXL_CACHE_MEM_CAPABILITY_ID_CACHE_ID_ROUTE_TABLE
> 0x000D+#define CXL_CACHE_MEM_CAPABILITY_ID_CACHE_ID_DECODER
> 0x000E+#define
> CXL_CACHE_MEM_CAPABILITY_ID_EXTENDED_HDM_DECODER
> 0x000F++//+// CXL_Capability_Version+// Compute Express ink 
> 0x000F++Specification
> Revision 3.0 - Chapter 8.2.4.5+//+#define CXL_HDM_DECODER_VERSION_30
> 0x3++//+// CXL CXL HDM Decoder n Control+// Compute Express Link
> Specification Revision 3.0 - 8.2.4.19.7+//+//+// Bit4..7: Interleave 
> Ways (IW)+//+#define CXL_HDM_16_WAY_INTERLEAVING
> 0x4+#define CXL_HDM_3_WAY_INTERLEAVING
> 0x8+#define CXL_HDM_6_WAY_INTERLEAVING
> 0x9+#define CXL_HDM_12_WAY_INTERLEAVING
> 0xA++//+// Ensure proper structure formats+//+#pragma pack(1)++//+//
> CXL.cachemem Extended Register Capability+// Compute Express Link 
> Specification Revision 3.0  - Chapter 8.2.4.24+//+typedef union {+ 
> struct
{+
> UINT32ExtendedRangesBitmap : 16;  // Bit 0..15+UINT32
> Reserved : 16;  // Bit 16..31+  } Bits;+  UINT32
> Uint32;+} CXL_CM_EXTENTED_REGISTER_CAPABILITY;++#define
> CXL_CM_EXTENTED_RANGES_BITMAP(BIT2 | BIT3 | BIT4 | BIT5 | BIT6
> | BIT7 | BIT8 | BIT9 | BIT10 | BIT11 | BIT12 | BIT13 | BIT15)++//+// 
> | CXL
BI
> Route Table Capability+// Compute Express Link Specification Revision
> 3.0
-
> Chapter 8.2.4.25+//+typedef union {+  struct {+UINT32
> ExplicitBiRtCommitRequired:1;  // bit 0+
> UINT32  Reserved  :31; // bit
> 1..31+  } Bits;+  UINT32Uint32;+} CXL_BI_RT_CAPABILITY;++typedef
> union {+  struct {+UINT32
> BiRtCommit:1;   // bit 0+
> UINT32  Reserved  :31;  //
> bit 1..31+  } Bits;+  UINT32Uint32;+} CXL_BI_RT

[edk2-devel] [PATCH v1 0/1] ShellPkg/SmbiosView: Add Type 45 entry to query table

[Ellie Lewis]

Entry added to display info type entry in smbiosview for Type 45 tables
as defined in SMBIOS Specification 3.5.

Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=4733

The changes can be seen at:
https://github.com/ellielewisarm/edk2/tree/type45_typefield

Cc: Zhichao Gao 

Ellie Lewis (1):
  ShellPkg/SmbiosView: Add Type 45 entry to query table

 ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c | 5 +
 1 file changed, 5 insertions(+)

--
2.25.1

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[edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 12/14] Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe

[Sahil Kaushal]

From: sahil 

In N1Sdp platform, the SoC is connected to IOFPGA which has a
Cadence Quad SPI (QSPI) controller. This QSPI controller manages
the flash chip device via QSPI bus.

This patch adds CadenceQspiNorFlashDeviceLib which is used to
manage and access the above configuration.

Signed-off-by: sahil 
---
 
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
 |   32 +
 
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
   |   44 +
 
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
   | 1011 
 3 files changed, 1087 insertions(+)

diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
new file mode 100644
index ..506876b62285
--- /dev/null
+++ 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
@@ -0,0 +1,32 @@
+#/** @file
+#
+#  Component description file for CadenceQspiNorFlashDeviceLib Library
+#
+#  Copyright (c) 2024, Arm Limited. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = CadenceQspiNorFlashDeviceLib
+  FILE_GUID  = ed172366-066b-4998-9b5e-ca7f385a170b
+  MODULE_TYPE= DXE_RUNTIME_DRIVER
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = NorFlashDeviceLib
+
+[Sources.common]
+  CadenceQspiNorFlashDeviceLib.c
+  CadenceQspiNorFlashDeviceLib.h
+
+[Packages]
+  MdePkg/MdePkg.dec
+  Platform/ARM/ARM.dec
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  DebugLib
+  IoLib
+  TimerLib
diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
new file mode 100644
index ..d43d27fe5eb4
--- /dev/null
+++ 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
@@ -0,0 +1,44 @@
+/** @file
+
+  Copyright (c) 2024, ARM Limited. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_
+#define CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_
+
+#define NOR_FLASH_ERASE_RETRY  10
+
+// QSPI Controller defines
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OFFSET 0x90
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_EXECUTE0x01
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_ENABLE0x01
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BIT_POS   19
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS  16
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_STATUS_BIT 0x02
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OPCODE_BIT_POS 24
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_ENABLE0x01
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_BYTE_3B   0x02
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READEN_BIT_POS 23
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS   20
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_8C   0x8
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_BIT_POS  7
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_DATA_BYTES(x)  ((x - 1) << 
CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS)
+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_ADDR_BYTES(x)  ((x - 1) << 
CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS)
+
+#define CDNS_QSPI_FLASH_CMD_READ_DATA_REG_OFFSET  0xA0
+
+#define CDNS_QSPI_FLASH_CMD_ADDR_REG_OFFSET  0x94
+
+#define SPINOR_SR_WIP  BIT0 // Write in progress
+
+#define SPINOR_OP_WREN   0x06   // Write enable
+#define SPINOR_OP_BE_4K  0x20   // Erase 4KiB block
+#define SPINOR_OP_RDID   0x9f   // Read JEDEC ID
+#define SPINOR_OP_RDSR   0x05   // Read status register
+
+#define SPINOR_SR_WIP_POLL_TIMEOUT_MS  1000u // Status Register read timeout
+
+#endif /* CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ */
diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
new file mode 100644
index ..8a416e07f15e
--- /dev/null
+++ 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
@@ -0,0 +1,1011 @@
+/** @file
+
+  Copyright (c) 2024 ARM Limited. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "CadenceQspiNorFlashDeviceLib.h"
+
+/**
+  Execute Flash cmd ctrl and Read Status.
+
+  @param[in]  Instance NOR flash Instance.
+  @param[in]  Val  Value to be written to Flash cmd ctrl 
Register.
+
+  @retval EFI_SUCCESS  Request is executed successfully.
+
+**/
+STATIC
+EFI_STATUS
+CdnsQspiExecuteCommand (
+  IN  NOR_FLASH_INSTANCE  *Instance,
+  IN  UINT32  V

[edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 14/14] Platform/ARM/N1Sdp: Enable FaultTolerantWrite Dxe driver for N1Sdp

[Sahil Kaushal]

From: sahil 

This driver enables Fault Tolerant Write protocol, which provides
fault tolerant write capability for block devices.

Signed-off-by: sahil 
---
 Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 5 +
 Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 1 +
 2 files changed, 6 insertions(+)

diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc 
b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index fd630fa08c35..743c2e647b76 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -162,6 +162,10 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
 
   # NOR flash support
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x18F4
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x0002
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x18F2
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x0002
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x18F0
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0002
 
@@ -228,6 +232,7 @@
   
NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
   }
+  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
 
   # ACPI Support
   MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf 
b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
index 07118725f168..7b7eda51c70c 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
@@ -90,6 +90,7 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Universal/Metronome/Metronome.inf
   INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
   INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
   INF 
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
   INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
   INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
-- 
2.25.1



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[edk2-devel] [PATCH v1 1/1] ShellPkg/SmbiosView: Add Type 45 entry to query table

[Ellie Lewis]

The type field value is currently undefined for type 45 SMBIOS tables
in smbiosview. An entry is added in the query table to display the
correct value for type 45 tables.
Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=4733

Cc: Zhichao Gao 
Signed-off-by: Ellie Lewis 
---
 ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c | 5 +
 1 file changed, 5 insertions(+)

diff --git 
a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
index 36f8739d6c87..d786b14f3877 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
@@ -5,6 +5,7 @@
   Copyright (c) 2005 - 2024, Intel Corporation. All rights reserved.
   (C) Copyright 2016-2019 Hewlett Packard Enterprise Development LP
   Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+  Copyright (c) 2024, Arm Limited. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent

 **/
@@ -3918,6 +3919,10 @@ TABLE_ITEM  StructureTypeInfoTable[] = {
 44,
 L" Processor Additional Information"
   },
+  {
+45,
+L" Firmware Inventory Information"
+  },
   {
 0x7E,
 L" Inactive"
--
2.25.1

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[edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 13/14] Platform/ARM/N1Sdp: Persistent storage for N1Sdp

[Sahil Kaushal]

From: sahil 

Enable persistent storage on QSPI flash device.

Signed-off-by: sahil 
---
 Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 19 ++-
 Platform/ARM/N1Sdp/N1SdpPlatform.fdf |  2 ++
 2 files changed, 16 insertions(+), 5 deletions(-)

diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc 
b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index 46412bff7d78..fd630fa08c35 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -161,11 +161,9 @@
   # ACPI Table Version
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
 
-  # Runtime Variable storage
-  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0
-  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE
-  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
-  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800
+  # NOR flash support
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x18F0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0002
 
 

 #
@@ -197,6 +195,16 @@
   gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x800F
   }
 
+  # NOR flash support
+  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf {
+
+  
NorFlashDeviceLib|Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
+  
NorFlashPlatformLib|Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf
+
+  gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress|0x1C0C
+  }
+
   # Architectural Protocols
   ArmPkg/Drivers/CpuDxe/CpuDxe.inf
   ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
@@ -217,6 +225,7 @@
   MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
 
   NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
+  
NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
   }
 
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf 
b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
index 7aae8e6a753b..07118725f168 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
@@ -140,6 +140,8 @@ READ_LOCK_STATUS   = TRUE
   INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
   INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
 
+  INF Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
+
   INF Platform/ARM/Drivers/BootMonFs/BootMonFs.inf
   INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 
-- 
2.25.1



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[edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 09/14] Platform/ARM: Add optional provision to fetch and print NOR Flash info

[Sahil Kaushal]

From: sahil 

This patch adds an optional functionality in NorFlashDxe to fetch and
print NOR Flash information from NorFlashInfoLib using its JEDEC ID.

NOR Flash libraries will implement a function "NorFlashReadID" which
will fetch and return JEDEC ID. This JEDEC ID can be then used to
print NOR Flash info using NorFlashInfoLib. If this functionality is
not needed then the function can just return EFI_UNSUPPORTED.

Signed-off-by: sahil 
---
 Platform/ARM/SgiPkg/SgiPlatform.dsc.inc  |  2 ++
 Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc|  2 ++
 Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc |  2 ++
 Platform/ARM/JunoPkg/ArmJuno.dsc |  2 ++
 Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc|  2 ++
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf |  1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf|  1 +
 Platform/ARM/Include/Library/NorFlashDeviceLib.h |  6 ++
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c   | 19 
+++
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c  | 19 
+++
 Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.c | 18 
++
 11 files changed, 74 insertions(+)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 3dcf422eab4b..aef7cba5449e 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -36,6 +36,8 @@
   LcdPlatformLib|Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgiLib.inf
   
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
   NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf
+  # NOR flash support
+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf
   HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
   
ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf
   TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
index ab0e2a957a1b..02d684adaebd 100644
--- a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
@@ -65,6 +65,8 @@
   IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
   
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
   
NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/StandaloneMmNorFlashLib.inf
+  # NOR flash support
+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf
   OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
   RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf
   
PlatformSecureLib|SecurityPkg/Library/PlatformSecureLibNull/PlatformSecureLibNull.inf
diff --git a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc 
b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
index 70ff049d3248..4e208c539a88 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
+++ b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
@@ -95,6 +95,8 @@
   
ArmPlatformSysConfigLib|Platform/ARM/VExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf
   
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
   
NorFlashPlatformLib|Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
+  # NOR flash support
+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf
   
ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf
 
   # ARM PL031 RTC Driver
diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc
index 81d2cbe4359f..946b8680c8c2 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.dsc
+++ b/Platform/ARM/JunoPkg/ArmJuno.dsc
@@ -42,6 +42,8 @@
 
   
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
   
NorFlashPlatformLib|Platform/ARM/JunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf
+  # NOR flash support
+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf
 
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
   
CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
diff --git a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc 
b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
index a5805da49c92..ee71bbb1fc09 100644
--- a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
+++ b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
@@ -102,6 +102,8 @@
 !if $(ENABLE_UEFI_SECURE_VARIABLE) == TRUE
   
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
   
NorFlashPlatformLib|Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashStMmLib.inf
+  # NOR flash support
+  NorFlashInfoLib|EmbeddedPkg/Library/NorFla

[edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 07/14] Platform/ARM/NorFlashDxe: Switch from NorFlash.c to NorFlashDeviceLib

[Sahil Kaushal]

From: sahil 

NorFlashDeviceLib can be used to provide implementations of different
NOR Flash to NorFlashDxe, i.e. NorFlashDxe links with NorFlashDeviceLib
and the platforms can specify their respective NorFlashDeviceLib
instances.

This patch adds the following major changes:

1. Adds changes in NorFlashDxe to look for NorFlashDeviceLib instead of
NorFlash.c for flash specific implementation

2. Remove NorFlash.c and NorFlash.h as they are no longer required.

3. Add changes to platform description files to provide
P30NorFlashDeviceLib as NorFlashDeviceLib

Signed-off-by: sahil 
---
 Platform/ARM/SgiPkg/SgiPlatform.dsc.inc   |   1 +
 Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc |   1 +
 Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc  |   1 +
 Platform/ARM/JunoPkg/ArmJuno.dsc  |   1 +
 Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc |   1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf  |   5 +-
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf |   6 +-
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.h   | 108 ---
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.c   | 953 

 Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c |   1 -
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c|   1 -
 Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c|   1 -
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c   |   1 -
 13 files changed, 7 insertions(+), 1074 deletions(-)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 1bf489ffeb39..3dcf422eab4b 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -34,6 +34,7 @@
   BasePathLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
   LcdHwLib|ArmPlatformPkg/Library/HdLcd/HdLcd.inf
   LcdPlatformLib|Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgiLib.inf
+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
   NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf
   HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
   
ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf
diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
index 0dd9ebbfc16c..ab0e2a957a1b 100644
--- a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
@@ -63,6 +63,7 @@
   AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf
   IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
   
NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/StandaloneMmNorFlashLib.inf
   OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
   RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf
diff --git a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc 
b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
index 9f51e05af561..70ff049d3248 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
+++ b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
@@ -93,6 +93,7 @@
   # Versatile Express Specific Libraries
   PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
   
ArmPlatformSysConfigLib|Platform/ARM/VExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf
+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
   
NorFlashPlatformLib|Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
   
ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf
 
diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc
index 7fe796a53433..81d2cbe4359f 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.dsc
+++ b/Platform/ARM/JunoPkg/ArmJuno.dsc
@@ -40,6 +40,7 @@
   ArmPlatformLib|Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf
   ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
 
+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
   
NorFlashPlatformLib|Platform/ARM/JunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf
 
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
diff --git a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc 
b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
index 0e77b76cae69..a5805da49c92 100644
--- a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
+++ b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
@@ -100,6 +100,7 @@
 
   # STMM for Variable runtime service.
 !if $(ENABLE_UEFI_SECURE_VARIABLE) == TRUE
+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
   
NorFlashPlatformLib|Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashStMmLib.inf
   VarCheckLib|MdeM

[edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 05/14] Platform/ARM: Create NorFlashDeviceLib library interface for flash specific functions

[Sahil Kaushal]

From: sahil 

NorFlashDeviceLib can be used to provide implementations of different
NOR Flash to NorFlashDxe, i.e. NorFlashDxe links with NorFlashDeviceLib
and the platforms can specify their respective NorFlashDeviceLib
instances.

This patch splits NorFlash.h and moves out the function prototypes and
macros that are expected by NorFlashDxe to be implemented by any
Nor Flash implementation to NorFlashDeviceLib.h file.

Signed-off-by: sahil 
---
 Platform/ARM/ARM.dec  |   1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.h   | 143 +-
 Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h |   1 +
 Platform/ARM/Include/Library/NorFlashDeviceLib.h  | 156 
 4 files changed, 159 insertions(+), 142 deletions(-)

diff --git a/Platform/ARM/ARM.dec b/Platform/ARM/ARM.dec
index be7e6dc83fde..86d1fcb4878e 100644
--- a/Platform/ARM/ARM.dec
+++ b/Platform/ARM/ARM.dec
@@ -17,6 +17,7 @@
 
 [LibraryClasses]
   BdsLib|Include/Library/BdsLib.h
+  NorFlashDeviceLib|Include/Library/NorFlashDeviceLib.h
   NorFlashPlatformLib|Include/Library/NorFlashPlatformLib.h
 
 [Guids]
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index bd5c6a949cf0..6cb1f64b9875 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -20,6 +20,7 @@
 
 #include 
 #include 
+#include 
 
 #define NOR_FLASH_ERASE_RETRY  10
 
@@ -40,7 +41,6 @@
 #define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr)   ((BaseAddr) + 
((OffsetAddr) << 2))
 #define CREATE_DUAL_CMD(Cmd)   ( ( Cmd << 16) | ( Cmd 
& LOW_16_BITS) )
 #define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd)MmioWrite32 
(CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))
-#define GET_NOR_BLOCK_ADDRESS(BaseAddr, Lba, LbaSize)  ( BaseAddr + 
(UINTN)((Lba) * LbaSize) )
 
 // Status Register Bits
 #define P30_SR_BIT_WRITE(BIT7 << 16 | BIT7)
@@ -105,145 +105,4 @@
 #define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP  0x0060
 #define P30_CMD_READ_CONFIGURATION_REGISTER0x0003
 
-typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;
-
-#pragma pack (1)
-typedef struct {
-  VENDOR_DEVICE_PATH  Vendor;
-  UINT8   Index;
-  EFI_DEVICE_PATH_PROTOCOLEnd;
-} NOR_FLASH_DEVICE_PATH;
-#pragma pack ()
-
-struct _NOR_FLASH_INSTANCE {
-  UINT32 Signature;
-  EFI_HANDLE Handle;
-
-  UINTN  DeviceBaseAddress;
-  UINTN  RegionBaseAddress;
-  UINTN  Size;
-  EFI_LBAStartLba;
-
-  EFI_BLOCK_IO_PROTOCOL  BlockIoProtocol;
-  EFI_BLOCK_IO_MEDIA Media;
-  EFI_DISK_IO_PROTOCOL   DiskIoProtocol;
-
-  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOLFvbProtocol;
-  VOID   *ShadowBuffer;
-
-  NOR_FLASH_DEVICE_PATH  DevicePath;
-};
-
-EFI_STATUS
-NorFlashReadCfiData (
-  IN  UINTN   DeviceBaseAddress,
-  IN  UINTN   CFI_Offset,
-  IN  UINT32  NumberOfBytes,
-  OUT UINT32  *Data
-  );
-
-EFI_STATUS
-NorFlashWriteBuffer (
-  IN NOR_FLASH_INSTANCE  *Instance,
-  IN UINTN   TargetAddress,
-  IN UINTN   BufferSizeInBytes,
-  IN UINT32  *Buffer
-  );
-
-//
-// NorFlash.c
-//
-EFI_STATUS
-NorFlashWriteSingleBlock (
-  INNOR_FLASH_INSTANCE  *Instance,
-  INEFI_LBA Lba,
-  INUINTN   Offset,
-  IN OUTUINTN   *NumBytes,
-  INUINT8   *Buffer
-  );
-
-EFI_STATUS
-NorFlashWriteBlocks (
-  IN  NOR_FLASH_INSTANCE  *Instance,
-  IN  EFI_LBA Lba,
-  IN  UINTN   BufferSizeInBytes,
-  IN  VOID*Buffer
-  );
-
-EFI_STATUS
-NorFlashReadBlocks (
-  IN NOR_FLASH_INSTANCE  *Instance,
-  IN EFI_LBA Lba,
-  IN UINTN   BufferSizeInBytes,
-  OUT VOID   *Buffer
-  );
-
-EFI_STATUS
-NorFlashRead (
-  IN NOR_FLASH_INSTANCE  *Instance,
-  IN EFI_LBA Lba,
-  IN UINTN   Offset,
-  IN UINTN   BufferSizeInBytes,
-  OUT VOID   *Buffer
-  );
-
-EFI_STATUS
-NorFlashWrite (
-  INNOR_FLASH_INSTANCE  *Instance,
-  INEFI_LBA Lba,
-  INUINTN   Offset,
-  IN OUTUINTN   *NumBytes,
-  INUINT8   *Buffer
-  );
-
-EFI_STATUS
-NorFlashReset (
-  IN  NOR_FLASH_INSTANCE  *Instance
-  );
-
-EFI_STATUS
-NorFlashEraseSingleBlock (
-  IN NOR_FLASH_INSTANCE  *Instance,
-  IN UINTN   BlockAddress
-  );
-
-EFI_STATUS
-NorFlashUnlockSingleBlockIfNecessary (
-  IN NOR_FLASH_INSTANCE  *Instance,
-  IN UINTN   BlockAddress
-  );
-
-EFI_STATUS
-NorFlashWriteSingleWord (
-  IN NOR_FLASH_INSTANCE  *Instance,
-  IN UINTN   WordAd

[edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 08/14] Platform/ARM: Add HostRegisterBaseAddress variable

[Sahil Kaushal]

From: sahil 

This variable holds the QSPI controller's base address.
It is defined in ARM.dec as well with the default value of 0x0.
In case a platform is not using it, they can just ignore this
variable and the default value of 0x0 will be propogated and
the variable will not be used.

Signed-off-by: sahil 
---
 Platform/ARM/ARM.dec  |  3 ++
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf  |  3 ++
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf |  2 ++
 Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h |  1 +
 Platform/ARM/Include/Library/NorFlashDeviceLib.h  |  1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c| 34 
+---
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c   | 12 ---
 7 files changed, 48 insertions(+), 8 deletions(-)

diff --git a/Platform/ARM/ARM.dec b/Platform/ARM/ARM.dec
index 86d1fcb4878e..a5e28c372903 100644
--- a/Platform/ARM/ARM.dec
+++ b/Platform/ARM/ARM.dec
@@ -26,3 +26,6 @@
 
 [PcdsFeatureFlag.common]
   
gPlatformArmTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x001
+
+[PcdsFixedAtBuild.common]
+  gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress|0x0|UINT32|0x0002
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
index de160025b632..6522968d6c5a 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
@@ -65,5 +65,8 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
 
+[FixedPcd]
+  gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress
+
 [Depex]
   gEfiCpuArchProtocolGuid
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
index d9e7de07165c..eb86d423f106 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
@@ -59,5 +59,7 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
 
+  gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress
+
 [Depex]
   TRUE
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
index 7fcb949843e8..98464e4868b1 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
@@ -34,6 +34,7 @@
 //
 EFI_STATUS
 NorFlashCreateInstance (
+  IN UINTNHostRegisterBase,
   IN UINTNNorFlashDeviceBase,
   IN UINTNNorFlashRegionBase,
   IN UINTNNorFlashSize,
diff --git a/Platform/ARM/Include/Library/NorFlashDeviceLib.h 
b/Platform/ARM/Include/Library/NorFlashDeviceLib.h
index e5017130a091..29b8b8901525 100644
--- a/Platform/ARM/Include/Library/NorFlashDeviceLib.h
+++ b/Platform/ARM/Include/Library/NorFlashDeviceLib.h
@@ -29,6 +29,7 @@ struct _NOR_FLASH_INSTANCE {
   UINT32 Signature;
   EFI_HANDLE Handle;
 
+  UINTN  HostRegisterBaseAddress;
   UINTN  DeviceBaseAddress;
   UINTN  RegionBaseAddress;
   UINTN  Size;
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
index 1c12572ab663..f5c0dadf84e0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
@@ -1,6 +1,6 @@
 /** @file  NorFlashDxe.c
 
-  Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.
+  Copyright (c) 2011 - 2024, Arm Limited. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -30,6 +30,7 @@ NOR_FLASH_INSTANCE  mNorFlashInstanceTemplate = {
   NOR_FLASH_SIGNATURE, // Signature
   NULL,// Handle ... NEED TO BE FILLED
 
+  0, // HostRegisterBaseAddress  ... NEED TO BE FILLED
   0, // DeviceBaseAddress ... NEED TO BE FILLED
   0, // RegionBaseAddress ... NEED TO BE FILLED
   0, // Size ... NEED TO BE FILLED
@@ -99,6 +100,7 @@ NOR_FLASH_INSTANCE  mNorFlashInstanceTemplate = {
 
 EFI_STATUS
 NorFlashCreateInstance (
+  IN UINTNHostRegisterBase,
   IN UINTNNorFlashDeviceBase,
   IN UINTNNorFlashRegionBase,
   IN UINTNNorFlashSize,
@@ -118,9 +120,10 @@ NorFlashCreateInstance (
 return EFI_OUT_OF_RESOURCES;
   }
 
-  Instance->DeviceBaseAddress = NorFlashDeviceBase;
-  Instance->RegionBaseAddress = NorFlashRegionBase;
-  Instance->Size  = NorFlashSize;
+  Instance->HostRegisterBaseAddress = HostRegisterBase;
+  Instance->DeviceBaseAddress   = NorFlashDeviceBase;
+  Instance->RegionBaseAddress   = NorFlashRegionBase;
+  Instance->Si

[edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 10/14] Silicon/ARM/NeoverseN1Soc: Enable SCP QSPI flash region

[Sahil Kaushal]

From: sahil 

Enable SCP QSPI flash region access by adding it in the PlatformLibMem.
This flash is shared between AP core and System Control Processor. The
lower addresses are used to store SCP and AP boot images and higher
addresses will be used for variable storage.

Signed-off-by: sahil 
---
 Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h  | 7 +++
 Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c | 8 +++-
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h 
b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
index 5483e7bc5f68..2dae57a0f01a 100644
--- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
+++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
@@ -4,6 +4,9 @@
 *
 * SPDX-License-Identifier: BSD-2-Clause-Patent
 *
+* Arm Neoverse N1 System Development Platform Technical Reference Manual
+* https://developer.arm.com/documentation/101489//?lang=en
+*
 **/
 
 #ifndef NEOVERSEN1SOC_PLATFORM_H_
@@ -41,6 +44,10 @@
 #define NEOVERSEN1SOC_EXP_PERIPH_BASE0   0x1C00
 #define NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ0x130
 
+// SCP QSPI flash device
+#define NEOVERSEN1SOC_SCP_QSPI_AHB_BASE  0x1800
+#define NEOVERSEN1SOC_SCP_QSPI_AHB_SZ0x200
+
 /*
  * Platform information structure stored in Non-secure SRAM. Platform
  * information are passed from the trusted firmware with the below structure
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c 
b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
index 80daedb33416..282bfbc81736 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
@@ -14,7 +14,7 @@
 #include 
 
 // The total number of descriptors, including the final "end-of-table" 
descriptor.
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 19
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 20
 
 /**
   Returns the Virtual Memory Map of the platform.
@@ -203,6 +203,12 @@ ArmPlatformGetVirtualMemoryMap (
   VirtualMemoryTable[Index].Length  = 
NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ;
   VirtualMemoryTable[Index].Attributes  = 
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
 
+  // SCP QSPI flash device
+  VirtualMemoryTable[++Index].PhysicalBase  = NEOVERSEN1SOC_SCP_QSPI_AHB_BASE;
+  VirtualMemoryTable[Index].VirtualBase = NEOVERSEN1SOC_SCP_QSPI_AHB_BASE;
+  VirtualMemoryTable[Index].Length  = NEOVERSEN1SOC_SCP_QSPI_AHB_SZ;
+  VirtualMemoryTable[Index].Attributes  = 
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
   if (PlatInfo->MultichipMode == 1) {
 //Remote DDR (2GB)
 VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdExtMemorySpace) +
-- 
2.25.1



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[edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 04/14] Platform/ARM/NorFlashDxe: Move flash specific functions to NorFlash.c

[Sahil Kaushal]

From: sahil 

Refactoring done in this patch has two major parts:

1. Moving out NorFlashUnlockAndEraseSingleBlock and
NorFlashWriteFullBlock functions from NorFlashDxe.c and
NorFlashStandaloneMm.c to NorFlash.c files.

2. At the same time, we are adding NorFlashLock and NorFlashUnlock
functions which will take care of TPL related operations needed by
functions mentioned in point 1. These functions are implemented
in NorFlashDxe.c but are just dummy placeholder functions in
NorFlashStandaloneMm.c file.

Signed-off-by: sahil 
---
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.h |  26 +++
 Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h   |  14 --
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 136 +-
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c  | 193 

 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 151 +++
 5 files changed, 225 insertions(+), 295 deletions(-)

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index e0ebb1e2fd35..bd5c6a949cf0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -220,4 +220,30 @@ NorFlashWriteSingleWord (
   IN UINT32  WriteData
   );
 
+EFI_STATUS
+NorFlashWriteFullBlock (
+  IN NOR_FLASH_INSTANCE  *Instance,
+  IN EFI_LBA Lba,
+  IN UINT32  *DataBuffer,
+  IN UINT32  BlockSizeInWords
+  );
+
+EFI_STATUS
+NorFlashUnlockAndEraseSingleBlock (
+  IN NOR_FLASH_INSTANCE  *Instance,
+  IN UINTN   BlockAddress
+  );
+
+VOID
+EFIAPI
+NorFlashLock (
+  IN EFI_TPL  *OriginalTPL
+  );
+
+VOID
+EFIAPI
+NorFlashUnlock (
+  IN EFI_TPL OriginalTPL
+  );
+
 #endif /* __NOR_FLASH_H__ */
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
index e329e0727617..c0a3b5861532 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
@@ -31,20 +31,6 @@
 //
 // NorFlashDxe.c
 //
-EFI_STATUS
-NorFlashWriteFullBlock (
-  IN NOR_FLASH_INSTANCE  *Instance,
-  IN EFI_LBA Lba,
-  IN UINT32  *DataBuffer,
-  IN UINT32  BlockSizeInWords
-  );
-
-EFI_STATUS
-NorFlashUnlockAndEraseSingleBlock (
-  IN NOR_FLASH_INSTANCE  *Instance,
-  IN UINTN   BlockAddress
-  );
-
 EFI_STATUS
 NorFlashCreateInstance (
   IN UINTNNorFlashDeviceBase,
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 4e5a97c83c7b..15000a692b02 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -10,7 +10,6 @@
 #include 
 
 #include "NorFlash.h"
-#include "NorFlashCommon.h"
 
 //
 // Global variable declarations
@@ -817,3 +816,138 @@ NorFlashReset (
   SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
   return EFI_SUCCESS;
 }
+
+/**
+ * This function unlock and erase an entire NOR Flash block.
+**/
+EFI_STATUS
+NorFlashUnlockAndEraseSingleBlock (
+  IN NOR_FLASH_INSTANCE  *Instance,
+  IN UINTN   BlockAddress
+  )
+{
+  EFI_STATUS  Status;
+  UINTN   Index;
+  EFI_TPL OriginalTPL;
+
+  NorFlashLock (&OriginalTPL);
+
+  Index = 0;
+  // The block erase might fail a first time (SW bug ?). Retry it ...
+  do {
+// Unlock the block if we have to
+Status = NorFlashUnlockSingleBlockIfNecessary (Instance, BlockAddress);
+if (EFI_ERROR (Status)) {
+  break;
+}
+
+Status = NorFlashEraseSingleBlock (Instance, BlockAddress);
+Index++;
+  } while ((Index < NOR_FLASH_ERASE_RETRY) && (Status == EFI_WRITE_PROTECTED));
+
+  if (Index == NOR_FLASH_ERASE_RETRY) {
+DEBUG ((DEBUG_ERROR, "EraseSingleBlock(BlockAddress=0x%08x: Block Locked 
Error (try to erase %d times)\n", BlockAddress, Index));
+  }
+
+  NorFlashUnlock (OriginalTPL);
+
+  return Status;
+}
+
+EFI_STATUS
+NorFlashWriteFullBlock (
+  IN NOR_FLASH_INSTANCE  *Instance,
+  IN EFI_LBA Lba,
+  IN UINT32  *DataBuffer,
+  IN UINT32  BlockSizeInWords
+  )
+{
+  EFI_STATUS  Status;
+  UINTN   WordAddress;
+  UINT32  WordIndex;
+  UINTN   BufferIndex;
+  UINTN   BlockAddress;
+  UINTN   BuffersInBlock;
+  UINTN   RemainingWords;
+  EFI_TPL OriginalTPL;
+  UINTN   Cnt;
+
+  Status = EFI_SUCCESS;
+
+  // Get the physical address of the block
+  BlockAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress, Lba, 
BlockSizeInWords * 4);
+
+  // Start writing from the first address at the start of the block
+  WordAddress = BlockAddress;
+
+  NorFlashLock (&OriginalTPL);
+
+  Status = NorFlashUnlockAndEraseSingleBlock (Instance, BlockAddress);
+  if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_ERROR, "WriteSingleBlock: ERROR - Failed to Unlock and Erase 
the single block at 0x%X\n", BlockAddress));
+goto EXIT;
+

[edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 11/14] Silicon/ARM/NeoverseN1Soc: NOR flash library for N1Sdp

[Sahil Kaushal]

From: sahil 

Add NOR flash library, this library provides APIs for getting the list
of NOR flash devices on the platform.

Signed-off-by: sahil 
---
 Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf | 34 ++
 Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c   | 65 

 2 files changed, 99 insertions(+)

diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf 
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
new file mode 100644
index ..fad3bca79d3a
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
@@ -0,0 +1,34 @@
+## @file
+#  NOR flash lib for ARM Neoverse N1 platform.
+#
+#  Copyright (c) 2024, ARM Limited. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001B
+  BASE_NAME  = NorFlashNeoverseN1SocLib
+  FILE_GUID  = 7006fcf1-a585-4272-92e3-b286b1dff5bb
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = NorFlashPlatformLib
+
+[Sources.common]
+  NorFlashLib.c
+
+[Packages]
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  Platform/ARM/ARM.dec
+  Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+
+[LibraryClasses]
+  BaseLib
+
+[FixedPcd]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c 
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
new file mode 100644
index ..a48db9c74548
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
@@ -0,0 +1,65 @@
+/** @file
+*  NOR flash lib for ARM Neoverse N1 platform
+*
+*  Copyright (c) 2024, ARM Limited. All rights reserved.
+*
+*  SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include 
+#include 
+#include 
+
+#define FW_ENV_REGION_BASE  FixedPcdGet32 (PcdFlashNvStorageVariableBase)
+#define FW_ENV_REGION_SIZE  (FixedPcdGet32 (PcdFlashNvStorageVariableSize) + \
+FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) + \
+FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize))
+
+STATIC NOR_FLASH_DESCRIPTION  mNorFlashDevices[] = {
+  {
+/// Environment variable region
+NEOVERSEN1SOC_SCP_QSPI_AHB_BASE,///< device base
+FW_ENV_REGION_BASE, ///< region base
+FW_ENV_REGION_SIZE, ///< region size
+SIZE_4KB,   ///< block size
+  },
+};
+
+/**
+  Dummy implementation of NorFlashPlatformInitialization to
+  comply with NorFlashPlatformLib structure.
+
+  @retvalEFI_SUCCESSSuccess.
+**/
+EFI_STATUS
+NorFlashPlatformInitialization (
+  VOID
+  )
+{
+  return EFI_SUCCESS;
+}
+
+/**
+  Get NOR flash region info
+
+  @param[out]NorFlashDevicesNOR flash regions info.
+  @param[out]Count  number of flash instance.
+
+  @retvalEFI_SUCCESSSuccess.
+  @retvalEFI_INVALID_PARAMETER  The parameters specified are not valid.
+**/
+EFI_STATUS
+NorFlashPlatformGetDevices (
+  OUT NOR_FLASH_DESCRIPTION  **NorFlashDevices,
+  OUT UINT32 *Count
+  )
+{
+  if ((NorFlashDevices == NULL) || (Count == NULL)) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  *NorFlashDevices = mNorFlashDevices;
+  *Count   = ARRAY_SIZE (mNorFlashDevices);
+  return EFI_SUCCESS;
+}
-- 
2.25.1



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[edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 01/14] Platform/ARM/NorFlashDxe: Move DiskIo related functions out of NorFlash.c

[Sahil Kaushal]

From: sahil 

Moving these functions from NorFlash.c to NorFlashBlockIoDxe.c as
they are not dependent on any particular flash implementation.

Signed-off-by: sahil 
---
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.c   | 129 

 Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c | 129 

 2 files changed, 129 insertions(+), 129 deletions(-)

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 1b431073ee93..60854ef2a7d0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -807,135 +807,6 @@ NorFlashWriteSingleBlock (
   return EFI_SUCCESS;
 }
 
-/*
-  Although DiskIoDxe will automatically install the DiskIO protocol whenever
-  we install the BlockIO protocol, its implementation is sub-optimal as it 
reads
-  and writes entire blocks using the BlockIO protocol. In fact we can access
-  NOR flash with a finer granularity than that, so we can improve performance
-  by directly producing the DiskIO protocol.
-*/
-
-/**
-  Read BufferSize bytes from Offset into Buffer.
-
-  @param  This  Protocol instance pointer.
-  @param  MediaId   Id of the media, changes every time the media 
is replaced.
-  @param  OffsetThe starting byte offset to read from
-  @param  BufferSizeSize of Buffer
-  @param  BufferBuffer containing read data
-
-  @retval EFI_SUCCESS   The data was read correctly from the device.
-  @retval EFI_DEVICE_ERROR  The device reported an error while performing 
the read.
-  @retval EFI_NO_MEDIA  There is no media in the device.
-  @retval EFI_MEDIA_CHANGED The MediaId does not match the current device.
-  @retval EFI_INVALID_PARAMETER The read request contains device addresses 
that are not
-valid for the device.
-
-**/
-EFI_STATUS
-EFIAPI
-NorFlashDiskIoReadDisk (
-  IN EFI_DISK_IO_PROTOCOL  *This,
-  IN UINT32MediaId,
-  IN UINT64DiskOffset,
-  IN UINTN BufferSize,
-  OUT VOID *Buffer
-  )
-{
-  NOR_FLASH_INSTANCE  *Instance;
-  UINT32  BlockSize;
-  UINT32  BlockOffset;
-  EFI_LBA Lba;
-
-  Instance = INSTANCE_FROM_DISKIO_THIS (This);
-
-  if (MediaId != Instance->Media.MediaId) {
-return EFI_MEDIA_CHANGED;
-  }
-
-  BlockSize = Instance->Media.BlockSize;
-  Lba   = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize, 
&BlockOffset);
-
-  return NorFlashRead (Instance, Lba, BlockOffset, BufferSize, Buffer);
-}
-
-/**
-  Writes a specified number of bytes to a device.
-
-  @param  This   Indicates a pointer to the calling context.
-  @param  MediaIdID of the medium to be written.
-  @param  Offset The starting byte offset on the logical block I/O device 
to write.
-  @param  BufferSize The size in bytes of Buffer. The number of bytes to write 
to the device.
-  @param  Buffer A pointer to the buffer containing the data to be written.
-
-  @retval EFI_SUCCESS   The data was written correctly to the device.
-  @retval EFI_WRITE_PROTECTED   The device can not be written to.
-  @retval EFI_DEVICE_ERROR  The device reported an error while performing 
the write.
-  @retval EFI_NO_MEDIA  There is no media in the device.
-  @retval EFI_MEDIA_CHANGED The MediaId does not match the current device.
-  @retval EFI_INVALID_PARAMETER The write request contains device addresses 
that are not
- valid for the device.
-
-**/
-EFI_STATUS
-EFIAPI
-NorFlashDiskIoWriteDisk (
-  IN EFI_DISK_IO_PROTOCOL  *This,
-  IN UINT32MediaId,
-  IN UINT64DiskOffset,
-  IN UINTN BufferSize,
-  IN VOID  *Buffer
-  )
-{
-  NOR_FLASH_INSTANCE  *Instance;
-  UINT32  BlockSize;
-  UINT32  BlockOffset;
-  EFI_LBA Lba;
-  UINTN   RemainingBytes;
-  UINTN   WriteSize;
-  EFI_STATUS  Status;
-
-  Instance = INSTANCE_FROM_DISKIO_THIS (This);
-
-  if (MediaId != Instance->Media.MediaId) {
-return EFI_MEDIA_CHANGED;
-  }
-
-  BlockSize = Instance->Media.BlockSize;
-  Lba   = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize, 
&BlockOffset);
-
-  RemainingBytes = BufferSize;
-
-  // Write either all the remaining bytes, or the number of bytes that bring
-  // us up to a block boundary, whichever is less.
-  // (DiskOffset | (BlockSize - 1)) + 1) rounds DiskOffset up to the next
-  // block boundary (even if it is already on one).
-  WriteSize = MIN (RemainingBytes, ((DiskOffset | (BlockSize - 1)) + 1) - 
DiskOffset);
-
-  do {
-if (WriteSize == BlockSize) {
-  // Write a full block
-  Status = NorFlashWriteFullBlock (Instance, Lba, Buffer, BlockSize / 
sizeof (UINT32));
-} else {
-  // Write a partial block
-  Status = NorFl

[edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 03/14] Platform/ARM/NorFlashDxe: Add NorFlashCommon.h header file

[Sahil Kaushal]

From: sahil 

This patch splits NorFlash.h and adds NorFlashCommon.h which
will have all the flash independent functions and macros.
Whereas all the flash specific functions will be in NorFlash.h
header file.

Signed-off-by: sahil 
---
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf  |   1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf |   1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.h   | 199 
--
 Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h | 221 

 Platform/ARM/Drivers/NorFlashDxe/NorFlash.c   |   1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c |   1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c|   1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c|   1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c   |   1 +
 9 files changed, 228 insertions(+), 199 deletions(-)

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
index cdf1f5c27f35..18e99bac 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
@@ -21,6 +21,7 @@
   NorFlash.h
   NorFlashBlockIoDxe.c
   NorFlashDxe.c
+  NorFlashCommon.h
   NorFlashFvb.c
 
 [Packages]
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
index 001f281220f2..69c40ccf9c27 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
@@ -22,6 +22,7 @@
   NorFlash.c
   NorFlash.h
   NorFlashFvb.c
+  NorFlashCommon.h
   NorFlashStandaloneMm.c
 
 [Packages]
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index d4d97bd22cc5..e0ebb1e2fd35 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -20,9 +20,6 @@
 
 #include 
 #include 
-#include 
-#include 
-#include 
 
 #define NOR_FLASH_ERASE_RETRY  10
 
@@ -108,11 +105,6 @@
 #define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP  0x0060
 #define P30_CMD_READ_CONFIGURATION_REGISTER0x0003
 
-#define NOR_FLASH_SIGNATURE  SIGNATURE_32('n', 'o', 'r', '0')
-#define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, 
NOR_FLASH_SIGNATURE)
-#define INSTANCE_FROM_BLKIO_THIS(a)   CR(a, NOR_FLASH_INSTANCE, 
BlockIoProtocol, NOR_FLASH_SIGNATURE)
-#define INSTANCE_FROM_DISKIO_THIS(a)  CR(a, NOR_FLASH_INSTANCE, 
DiskIoProtocol, NOR_FLASH_SIGNATURE)
-
 typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;
 
 #pragma pack (1)
@@ -158,197 +150,6 @@ NorFlashWriteBuffer (
   IN UINT32  *Buffer
   );
 
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoReset (
-  IN EFI_BLOCK_IO_PROTOCOL  *This,
-  IN BOOLEANExtendedVerification
-  );
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoReadBlocks (
-  IN  EFI_BLOCK_IO_PROTOCOL  *This,
-  IN  UINT32 MediaId,
-  IN  EFI_LBALba,
-  IN  UINTN  BufferSizeInBytes,
-  OUT VOID   *Buffer
-  );
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoWriteBlocks (
-  IN  EFI_BLOCK_IO_PROTOCOL  *This,
-  IN  UINT32 MediaId,
-  IN  EFI_LBALba,
-  IN  UINTN  BufferSizeInBytes,
-  IN  VOID   *Buffer
-  );
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoFlushBlocks (
-  IN EFI_BLOCK_IO_PROTOCOL  *This
-  );
-
-//
-// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.ReadDisk
-//
-EFI_STATUS
-EFIAPI
-NorFlashDiskIoReadDisk (
-  IN EFI_DISK_IO_PROTOCOL  *This,
-  IN UINT32MediaId,
-  IN UINT64Offset,
-  IN UINTN BufferSize,
-  OUT VOID *Buffer
-  );
-
-//
-// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.WriteDisk
-//
-EFI_STATUS
-EFIAPI
-NorFlashDiskIoWriteDisk (
-  IN EFI_DISK_IO_PROTOCOL  *This,
-  IN UINT32MediaId,
-  IN UINT64Offset,
-  IN UINTN BufferSize,
-  IN VOID  *Buffer
-  );
-
-//
-// NorFlashFvbDxe.c
-//
-
-EFI_STATUS
-EFIAPI
-FvbGetAttributes (
-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL  *This,
-  OUT   EFI_FVB_ATTRIBUTES_2 *Attributes
-  );
-
-EFI_STATUS
-EFIAPI
-FvbSetAttributes (
-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL  *This,
-  IN OUTEFI_FVB_ATTRIBUTES_2 *Attributes
-  );
-
-EFI_STATUS
-EFIAPI
-FvbGetPhysicalAddress (
-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL  *This,
-  OUT   EFI_PHYSICAL_ADDRESS *Address
-  );
-
-EFI_STATUS
-EFIAPI
-FvbGetBlockSize (
-  IN CONST  EF

[edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 06/14] Platform/ARM: Add P30NorFlashDeviceLib Library

[Sahil Kaushal]

From: sahil 

This patch implements functions to interact with P30 NOR Flash.
The code is taken from Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
file.

Signed-off-by: sahil 
---
 Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf |  35 +
 Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h   |  98 ++
 Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.c   | 949 

 3 files changed, 1082 insertions(+)

diff --git a/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf 
b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
new file mode 100644
index ..0707edb54442
--- /dev/null
+++ b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
@@ -0,0 +1,35 @@
+#/** @file
+#
+#  Component description file for P30NorFlashDeviceLib library
+#
+#  Copyright (c) 2011 - 2024, Arm Limited. All rights reserved.
+#  Copyright (c) 2020, Linaro, Ltd. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = P30NorFlashDeviceLib
+  FILE_GUID  = ed172366-066b-4998-9b5e-ca7f385a1709
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = NorFlashDeviceLib
+
+[Sources.common]
+  P30NorFlashDeviceLib.c
+  P30NorFlashDeviceLib.h
+
+[Packages]
+  MdePkg/MdePkg.dec
+  Platform/ARM/ARM.dec
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  DebugLib
+  IoLib
+
+[Pcd.common]
+  gPlatformArmTokenSpaceGuid.PcdNorFlashCheckBlockLocked
diff --git a/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h 
b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h
new file mode 100644
index ..c310b2310d62
--- /dev/null
+++ b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h
@@ -0,0 +1,98 @@
+/** @file  P30NorFlashDeviceLib.h
+
+  Copyright (c) 2011 - 2024, Arm Limited. All rights reserved.
+  Copyright (c) 2020, Linaro, Ltd. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef P30_NOR_FLASH_DEVICE_LIB_H_
+#define P30_NOR_FLASH_DEVICE_LIB_H_
+
+#define NOR_FLASH_ERASE_RETRY  10
+
+// Device access macros
+// These are necessary because we use 2 x 16bit parts to make up 32bit data
+
+#define HIGH_16_BITS  0x
+#define LOW_16_BITS   0x
+#define LOW_8_BITS0x00FF
+
+#define FOLD_32BIT_INTO_16BIT(value)  ( ( value >> 16 ) | ( value & 
LOW_16_BITS ) )
+
+#define GET_LOW_BYTE(value)   ( value & LOW_8_BITS )
+#define GET_HIGH_BYTE(value)  ( GET_LOW_BYTE( value >> 16 ) )
+
+// Each command must be sent simultaneously to both chips,
+// i.e. at the lower 16 bits AND at the higher 16 bits
+#define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr)  ((BaseAddr) + ((OffsetAddr) 
<< 2))
+#define CREATE_DUAL_CMD(Cmd)  ( ( Cmd << 16) | ( Cmd & 
LOW_16_BITS) )
+#define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd)   MmioWrite32 
(CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))
+
+#define BOTH_ALIGNED(a, b, align)  UINTN)(a) | (UINTN)(b)) & ((align) - 
1)) == 0)
+
+// Status Register Bits
+#define P30_SR_BIT_WRITE(BIT7 << 16 | BIT7)
+#define P30_SR_BIT_ERASE_SUSPEND(BIT6 << 16 | BIT6)
+#define P30_SR_BIT_ERASE(BIT5 << 16 | BIT5)
+#define P30_SR_BIT_PROGRAM  (BIT4 << 16 | BIT4)
+#define P30_SR_BIT_VPP  (BIT3 << 16 | BIT3)
+#define P30_SR_BIT_PROGRAM_SUSPEND  (BIT2 << 16 | BIT2)
+#define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)
+#define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)
+
+// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family
+
+// On chip buffer size for buffered programming operations
+// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each 
word is 2 bytes.
+// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes
+#define P30_MAX_BUFFER_SIZE_IN_BYTES  ((UINTN)128)
+#define P30_MAX_BUFFER_SIZE_IN_WORDS  (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))
+#define MAX_BUFFERED_PROG_ITERATIONS  1000
+#define BOUNDARY_OF_32_WORDS  0x7F
+
+// CFI Addresses
+#define P30_CFI_ADDR_QUERY_UNIQUE_QRY  0x10
+#define P30_CFI_ADDR_VENDOR_ID 0x13
+
+// CFI Data
+#define CFI_QRY  0x00595251
+
+// READ Commands
+#define P30_CMD_READ_DEVICE_ID 0x0090
+#define P30_CMD_READ_STATUS_REGISTER   0x0070
+#define P30_CMD_CLEAR_STATUS_REGISTER  0x0050
+#define P30_CMD_READ_ARRAY 0x00FF
+#define P30_CMD_READ_CFI_QUERY 0x0098
+
+// WRITE Commands
+#define P30_CMD_WORD_PROGRAM_SETUP0x0040
+#define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP  0x0010
+#define P30_CMD_BUFFERED_PROGRAM_SETUP0x00E8
+#define P30_CMD_BUFFERED_PROGRAM_CONFIRM  0x00D0
+#define P30_CMD_BEFP_SETUP0x0080
+#define P30_CMD_BEFP_CONFIRM  0x00D0
+
+// ERASE Commands
+#define P30_CMD_BLOCK_ERASE_SETUP

[edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 02/14] Platform/ARM/NorFlashDxe: Move NorFlashVirtualNotifyEvent

[Sahil Kaushal]

From: sahil 

Moving this function from NorFlash.c to NorFlashDxe.c as it is not
dependent on any particular flash implementation.

Signed-off-by: sahil 
---
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.h| 14 +++
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.c| 44 
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c | 44 
 3 files changed, 51 insertions(+), 51 deletions(-)

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index c83032e87d9c..d4d97bd22cc5 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -342,6 +342,13 @@ NorFlashFvbInitialize (
   IN NOR_FLASH_INSTANCE  *Instance
   );
 
+VOID
+EFIAPI
+NorFlashVirtualNotifyEvent (
+  IN EFI_EVENT  Event,
+  IN VOID   *Context
+  );
+
 //
 // NorFlash.c
 //
@@ -412,11 +419,4 @@ NorFlashWriteSingleWord (
   IN UINT32  WriteData
   );
 
-VOID
-EFIAPI
-NorFlashVirtualNotifyEvent (
-  IN EFI_EVENT  Event,
-  IN VOID   *Context
-  );
-
 #endif /* __NOR_FLASH_H__ */
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 60854ef2a7d0..55f6abd0eef3 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -816,47 +816,3 @@ NorFlashReset (
   SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
   return EFI_SUCCESS;
 }
-
-/**
-  Fixup internal data so that EFI can be call in virtual mode.
-  Call the passed in Child Notify event and convert any pointers in
-  lib to virtual mode.
-
-  @param[in]Event   The Event that is being processed
-  @param[in]Context Event Context
-**/
-VOID
-EFIAPI
-NorFlashVirtualNotifyEvent (
-  IN EFI_EVENT  Event,
-  IN VOID   *Context
-  )
-{
-  UINTN  Index;
-
-  for (Index = 0; Index < mNorFlashDeviceCount; Index++) {
-EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->DeviceBaseAddress);
-EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->RegionBaseAddress);
-
-// Convert BlockIo protocol
-EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->BlockIoProtocol.FlushBlocks);
-EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->BlockIoProtocol.ReadBlocks);
-EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->BlockIoProtocol.Reset);
-EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->BlockIoProtocol.WriteBlocks);
-
-// Convert Fvb
-EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->FvbProtocol.EraseBlocks);
-EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->FvbProtocol.GetAttributes);
-EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->FvbProtocol.GetBlockSize);
-EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->FvbProtocol.GetPhysicalAddress);
-EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->FvbProtocol.Read);
-EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->FvbProtocol.SetAttributes);
-EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->FvbProtocol.Write);
-
-if (mNorFlashInstances[Index]->ShadowBuffer != NULL) {
-  EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->ShadowBuffer);
-}
-  }
-
-  return;
-}
diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
index f7b92de21a57..963af7dcf435 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
@@ -504,3 +504,47 @@ NorFlashFvbInitialize (
 
   return Status;
 }
+
+/**
+  Fixup internal data so that EFI can be call in virtual mode.
+  Call the passed in Child Notify event and convert any pointers in
+  lib to virtual mode.
+
+  @param[in]Event   The Event that is being processed
+  @param[in]Context Event Context
+**/
+VOID
+EFIAPI
+NorFlashVirtualNotifyEvent (
+  IN EFI_EVENT  Event,
+  IN VOID   *Context
+  )
+{
+  UINTN  Index;
+
+  for (Index = 0; Index < mNorFlashDeviceCount; Index++) {
+EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->DeviceBaseAddress);
+EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->RegionBaseAddress);
+
+// Convert BlockIo protocol
+EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->BlockIoProtocol.FlushBlocks);
+EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->BlockIoProtocol.ReadBlocks);
+EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->BlockIoProtocol.Reset);
+EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->BlockIoProtocol.WriteBlocks);
+
+// Convert Fvb
+EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->FvbProtocol.EraseBlocks);
+EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstances[Index]->FvbProtocol.GetAttributes);
+EfiConvertPointer (0x0, (VOID 
**)&mNorFlashInstance

[edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 00/14] Split NorFlashDxe driver and add CadenceQspiNorFlashDeviceLib library

[Sahil Kaushal]

From: sahil 

This patch series adds the following changes:

1. Splits the NorFlashDxe driver to introduce a NorFlashDeviceLib that
implements the specifics for the respective flash. This will allow us
to plug different libraries implementing functionality of various NOR
Flash. The flash specific code in NorFlashDxe has been moved to
P30NorFlashDeviceLib library.

2. Adds support for CadenceQspiNorFlashDeviceLib which is used by N1Sdp
platform along with NorFlashDxe driver. N1Sdp uses an emulated variable
storage on DDR memory for the variable storage. But this emulated
variable storage is a volatile memory and so the values of variables
can't persist on next reboot or in power cycle. In N1Sdp platform, the
SoC is connected to IOFPGA which has a Cadence Quad SPI (QSPI)
controller. This QSPI controller manages the flash chip device via QSPI
bus. With these changes we use this NOR flash device for persistent
variable storage.

v2:
  - Fixed code review comments
  - Split the NorFlashDxe driver and moved flash specific code to
P30NorFlashDeviceLib
  - Added NOR flash Dxe Driver for N1Sdp as a library instead of a
driver

Links to v1:
https://edk2.groups.io/g/devel/topic/102625035
https://edk2.groups.io/g/devel/topic/102625033
https://edk2.groups.io/g/devel/topic/102625034
https://edk2.groups.io/g/devel/topic/102625036
https://edk2.groups.io/g/devel/topic/102625037
https://edk2.groups.io/g/devel/topic/102625038

Link to branch with the patches in this series -
https://github.com/sah01Kaushal/edk2-platforms/tree/n1sdp_persistent_storage_v2

sahil (14):
  Platform/ARM/NorFlashDxe: Move DiskIo related functions out of
NorFlash.c
  Platform/ARM/NorFlashDxe: Move NorFlashVirtualNotifyEvent
  Platform/ARM/NorFlashDxe: Add NorFlashCommon.h header file
  Platform/ARM/NorFlashDxe: Move flash specific functions to NorFlash.c
  Platform/ARM: Create NorFlashDeviceLib library interface for flash
specific functions
  Platform/ARM: Add P30NorFlashDeviceLib Library
  Platform/ARM/NorFlashDxe: Switch from NorFlash.c to NorFlashDeviceLib
  Platform/ARM: Add HostRegisterBaseAddress variable
  Platform/ARM: Add optional provision to fetch and print NOR Flash info
  Silicon/ARM/NeoverseN1Soc: Enable SCP QSPI flash region
  Silicon/ARM/NeoverseN1Soc: NOR flash library for N1Sdp
  Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe
  Platform/ARM/N1Sdp: Persistent storage for N1Sdp
  Platform/ARM/N1Sdp: Enable FaultTolerantWrite Dxe driver for N1Sdp

 Platform/ARM/ARM.dec   
  |4 +
 Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
  |3 +
 Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc  
  |3 +
 Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc   
  |3 +
 Platform/ARM/JunoPkg/ArmJuno.dsc   
  |3 +
 Platform/ARM/N1Sdp/N1SdpPlatform.dsc   
  |   24 +-
 Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc  
  |3 +
 Platform/ARM/N1Sdp/N1SdpPlatform.fdf   
  |3 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf   
  |8 +-
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf  
  |8 +-
 
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
   |   32 +
 Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf 
  |   35 +
 Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf  
  |   34 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
  |  422 
 Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h  
  |  209 
 Platform/ARM/Include/Library/NorFlashDeviceLib.h   
  |  163 
 
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
 |   44 +
 Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h   
  |   98 ++
 Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h  
  |7 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c  
  |  131 ++-
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c 
  |  292 +++---
 Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c 
  |2 +-
 Platform/ARM

[edk2-devel] [PATCH v2 0/1]

[Praveen Sankar N via groups.io]

*** BLURB HERE ***

praveensankarn (1):
  Subject: MdePkg:Added new SPCR table stucture members as in
Rev4.

 .../IndustryStandard/SerialPortConsoleRedirectionTable.h| 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

--
2.38.1.windows.1
-The information contained in this message may be confidential and proprietary 
to American Megatrends (AMI). This communication is intended to be read only by 
the individual or entity to whom it is addressed or by their designee. If the 
reader of this message is not the intended recipient, you are on notice that 
any distribution of this message, in any form, is strictly prohibited. Please 
promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and 
then delete or destroy all copies of the transmission.


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[edk2-devel] [PATCH v2 1/1] Subject: [PATCH] MdePkg:Added new SPCR table stucture members as in Rev4.

[Praveen Sankar N via groups.io]

In SPCR table, 4 structure members have been added newly as per
SPCR table Rev4, which has to be added in
MdePkg/SerialPortConsoleRedirectionTable.h file.

Signed-off-by: Praveen Sankar N praveensank...@ami.com
Cc: michael.d.kin...@intel.com
Cc: gaolim...@byosoft.com.cn
Cc: zhiguang@intel.com
Cc: fel...@ami.com
Cc: srinivas...@ami.com
Cc: sundares...@ami.com
---
 .../IndustryStandard/SerialPortConsoleRedirectionTable.h| 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git 
a/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h 
b/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
index eb5ae28390..f0001ab137 100644
--- a/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
+++ b/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
@@ -47,7 +47,11 @@ typedef struct {
   UINT8 PciFunctionNumber;

   UINT32PciFlags;

   UINT8 PciSegment;

-  UINT32Reserved3;

+  UINT32UartClockFrequency;

+  UINT32PreciseBaudRate;

+  UINT16NameSpaceStrLength;

+  UINT16NameSpaceStrOffset;

+  CHAR8 NameSpaceString[0];

 } EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE;



 #pragma pack()

--
2.38.1.windows.1
-The information contained in this message may be confidential and proprietary 
to American Megatrends (AMI). This communication is intended to be read only by 
the individual or entity to whom it is addressed or by their designee. If the 
reader of this message is not the intended recipient, you are on notice that 
any distribution of this message, in any form, is strictly prohibited. Please 
promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and 
then delete or destroy all copies of the transmission.


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[edk2-devel] 回复: [PATCH 0/7] General Updates based on UEFI 2.10 and PI 1.8 Specification

[gaoliming via groups.io]

Except for Patch 6/7, others are good to me. Reviewed-by: Liming Gao


I suggest to merge others first. The patch 6/7 to update PI version from 1.7
to 1.8 can be discussed first. 

Thanks
Liming
> -邮件原件-
> 发件人: Sachin Ganesh 
> 发送时间: 2024年4月20日 5:46
> 收件人: devel@edk2.groups.io
> 抄送: gaolim...@byosoft.com.cn; zhiguang@intel.com;
> michael.d.kin...@intel.com; ardb+tianoc...@kernel.org;
> kra...@redhat.com; jiewen@intel.com; erdemak...@google.com;
> min.m...@intel.com; thomas.lenda...@amd.com; Felix Polyudov
> ; Dhanaraj V ; Sachin Ganesh
> 
> 主题: [PATCH 0/7] General Updates based on UEFI 2.10 and PI 1.8
> Specification
> 
> This series of patches are for general updates to MdePkg and MdeModulePkg
> based on
> UEFI 2.10 and PI 1.8 Specifications
> 
> Sachin Ganesh (7):
>   MdePkg: Add definition for NVMe Over Fabric Device Path
>   MdePkg: Add new Resource Attributes defined in PI 1.8 Spec
>   MdePkg: Define Unaccepted Memory Type
>   MdeModulePkg: Use newly defined Unaccepted Memory Type
>   MdePkg: Update Delayed Dispatch PPI as per PI 1.8 Spec
>   MdePkg: Update to PI 1.8 Revision
>   OvmfPkg: Use newly defined Unaccepted Memory Type
> 
>  MdeModulePkg/Core/Dxe/Gcd/Gcd.c  | 10 +++---
>  MdeModulePkg/Core/Dxe/Mem/Page.c | 38
> ++--
>  MdeModulePkg/Include/Pi/PrePiDxeCis.h| 25 -
>  MdeModulePkg/Include/Pi/PrePiHob.h   | 20 ---
>  MdePkg/Include/Pi/PiDxeCis.h | 19 +-
>  MdePkg/Include/Pi/PiHob.h| 14 +++-
>  MdePkg/Include/Pi/PiMmCis.h  |  6 ++--
>  MdePkg/Include/Pi/PiMultiPhase.h |  6 
>  MdePkg/Include/Pi/PiPeiCis.h |  6 ++--
>  MdePkg/Include/Pi/PiSmmCis.h |  2 +-
>  MdePkg/Include/Ppi/DelayedDispatch.h | 24 -
>  MdePkg/Include/Protocol/DevicePath.h | 22 
>  OvmfPkg/AmdSevDxe/AmdSevDxe.c|  4 +--
>  OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelper.c |  8 ++---
>  OvmfPkg/Library/PeilessStartupLib/Hob.c  |  4 +--
>  OvmfPkg/Library/PlatformInitLib/IntelTdx.c   |  8 ++---
>  OvmfPkg/PlatformPei/AmdSev.c |  4 +--
>  17 files changed, 108 insertions(+), 112 deletions(-)
>  delete mode 100644 MdeModulePkg/Include/Pi/PrePiDxeCis.h
>  delete mode 100644 MdeModulePkg/Include/Pi/PrePiHob.h
> 
> --
> 2.24.1.windows.2
> -The information contained in this message may be confidential and
> proprietary to American Megatrends (AMI). This communication is intended
to
> be read only by the individual or entity to whom it is addressed or by
their
> designee. If the reader of this message is not the intended recipient, you
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> on notice that any distribution of this message, in any form, is strictly
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回复: [edk2-devel] [PATCH v1 1/1] BaseTools/Fmmt.py: Python 3.12 support

[gaoliming via groups.io]

Reviewed-by: Liming Gao 

> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Guo, Gua
> 发送时间: 2024年4月22日 9:50
> 收件人: devel@edk2.groups.io
> 抄送: gua@intel.com; Rebecca Cran ; Liming Gao
> ; Bob Feng ; Yuwei Chen
> 
> 主题: [edk2-devel] [PATCH v1 1/1] BaseTools/Fmmt.py: Python 3.12 support
> 
> From: Gua Guo 
> 
> Ref to https://docs.python.org/3/whatsnew/3.12.html
> A backslash-character pair that is not a valid
> escape sequence now generates
> 
> Cc: Rebecca Cran 
> Cc: Liming Gao 
> Cc: Bob Feng 
> Cc: Yuwei Chen 
> Signed-off-by: Gua Guo 
> ---
>  BaseTools/Source/Python/FMMT/FMMT.py | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/BaseTools/Source/Python/FMMT/FMMT.py
> b/BaseTools/Source/Python/FMMT/FMMT.py
> index 26fc4c5792..7505b6c88a 100644
> --- a/BaseTools/Source/Python/FMMT/FMMT.py
> +++ b/BaseTools/Source/Python/FMMT/FMMT.py
> @@ -37,7 +37,7 @@ parser.add_argument("-l", "--LayoutFileName",
> dest="LayoutFileName", nargs='+',
>  the file will be generated with default name
> (Layout_'InputFileName'.txt). \
> 
>  Currently supports two formats: json, txt.
> More formats will be added in the future")
> 
>  parser.add_argument("-c", "--ConfigFilePath", dest="ConfigFilePath",
> nargs='+',
> 
> -help="Provide the target FmmtConf.ini file path: '-c
> C:\Code\FmmtConf.ini' \
> 
> +help="Provide the target FmmtConf.ini file path: '-c
> C:\\Code\\FmmtConf.ini' \
> 
>  FmmtConf file saves the target guidtool used
> in compress/uncompress process.\
> 
>  If do not provide, FMMT tool will search the
> inputfile folder for FmmtConf.ini firstly, if not found,\
> 
>  the FmmtConf.ini saved in FMMT tool's folder
> will be used as default.")
> 
> --
> 2.39.2.windows.1
> 
> 
> 
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回复: [edk2-devel] [PATCH v1 1/1] BaseTools/GetUtcDateTime.py: Python 3.12 support

[gaoliming via groups.io]

Reviewed-by: Liming Gao 

> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Guo, Gua
> 发送时间: 2024年4月21日 20:51
> 收件人: devel@edk2.groups.io
> 抄送: gua@intel.com; saloni.kasbe...@intel.com; Rebecca Cran
> ; Liming Gao ; Bob Feng
> ; Yuwei Chen 
> 主题: [edk2-devel] [PATCH v1 1/1] BaseTools/GetUtcDateTime.py: Python
> 3.12 support
> 
> From: Gua Guo 
> 
> Ref to https://docs.python.org/3/whatsnew/3.12.html
> utcnow() and utcfromtimestamp() are deprecated
> Prevent use it cause build error.
> 
> Cc: Rebecca Cran 
> Cc: Liming Gao 
> Cc: Bob Feng 
> Cc: Yuwei Chen 
> Signed-off-by: Gua Guo 
> ---
>  BaseTools/Scripts/GetUtcDateTime.py | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/BaseTools/Scripts/GetUtcDateTime.py
> b/BaseTools/Scripts/GetUtcDateTime.py
> index 3cfb6ac2ae..6764fb22a7 100644
> --- a/BaseTools/Scripts/GetUtcDateTime.py
> +++ b/BaseTools/Scripts/GetUtcDateTime.py
> @@ -29,7 +29,7 @@ def Main():
>  print ("ERROR: At least one argument is required!\n")
> 
>  PARSER.print_help()
> 
> 
> 
> -today = datetime.datetime.utcnow()
> 
> +today = datetime.datetime.now(datetime.UTC)
> 
>  if ARGS.year:
> 
>  ReversedNumber = str(today.year)[::-1]
> 
>  print (''.join(hex(ord(HexString))[2:] for HexString in
> ReversedNumber))
> 
> --
> 2.39.2.windows.1
> 
> 
> 
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[edk2-devel] [PATCH edk2-non-osi 1/1] Maintainers.txt: add maintainers for SbsaQemu platform

[Leif Lindholm]

Signed-off-by: Leif Lindholm 
---

p.s. Mike, could you add write access for Marcin in this repo as well?
 It was a pure oversight not to ask this at the same time as for
 edk2-platforms.

 Maintainers.txt | 5 +
 1 file changed, 5 insertions(+)

diff --git a/Maintainers.txt b/Maintainers.txt
index eaf13fda6af0..2cdff26facaf 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -63,6 +63,11 @@ Platform/Intel/CometlakeSiliconBinPkg
 M: Kathappan Esakkithevar 
 M: Sai Chaganty 
 
+Platform/Qemu/SbsaQemu
+M: Ard Biesheuvel  [ardbiesheuvel]
+M: Leif Lindholm  [leiflindholm]
+M: Marcin Juszkiewicz  [hrw]
+
 Silicon/AMD
 M: Abner Chang 
 M: Abdul Lateef Attar 
-- 
2.30.2



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Re: [edk2-devel] MdeModulePkg: Fix MAT SplitRecord() Logic introduce one bug and will cause SUT reset when boot to windows

[Oliver Smith-Denny]

On 4/18/2024 11:43 PM, Ni, Ray wrote:



So this is just junk unallocated memory that we are reporting as
a type it *could* be if an allocation occurs to minimize failures
of ExitBootServices. Which is questionable. But in terms of
attributes, I would expect we either have this unallocated
memory marked the same as the bin type or better, mark it RP
if we can (Taylor is making a change to set RP on free memory
by default, so we would have this in the page table, but we
would need to decide what we tell the OS).

[Ray] When reviewing today's logic of memory protection through page 
table, I feel that it was designed improperly in the beginning.

My rough thought is:
* All memory is RP initially (as you said Taylor will do that)


Correct, Taylor is working on a change here and actually taking this a
step further, that all free memory will be RP, to catch any use after
free and keep a safer environment.

* Allocated memory is mapped as either RO or XD, depending on code/data. 
Or RP if it's a guard page.


This is mostly true, of course it depends on how the memory protections
are configured. I would like to see this go to not being an option but
something that DxeCore enforces by default depending on memory type
allocated.



Maybe I am not aware of some limitations of the above idea. The 
limitations prevented the initial design be in this way.

Or what Taylor will do aligns to the idea?



The issue in this mailing thread is not what DXE's page tables are,
but what get reported in the MAT to the OS. Before Taylor's change
to improve the SplitTable logic the extra RuntimeServicesCode sections
that get reported to the OS (these are the leftover sections in the
memory bins to improve the chance for S4 resume) were getting reported
as XP. Taylor is proposing these get marked RO instead as they are
marked as Code sections (although they really hold junk in them).

Another path would be can we mark them both RO and XP. These are junk
sections, they should not be used and definitely not executed from. We
only report them to the OS so that our memory map changes less between
boots (I also wonder if there are better ways we can do this, but I'll
have to think about this more).

Thanks,
Oliver




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Re: [edk2-devel] [PATCH v3 4/5] OvmfPkg/VirtHstiDxe: add code flash check

[Gerd Hoffmann]

On Tue, Apr 23, 2024 at 07:14:04PM +0530, Aithal, Srikanth wrote:
> Correcting.
> 
> On 4/23/2024 7:09 PM, Aithal, Srikanth wrote:
> > Hello,
> > 
> > Todays OVMF/edk2 master branch is breaking AMD SEV-ES guest boot with
> > OvmfX64 package, where as sev-es guest boots fine with AmdSev package.
> > 
> > Git bisect pointed to below commit as bad, going back to previous commit
> > i.e ddc43e7a SEV-ES guest boots fine with OvmfX64 package:
> Git bisect pointed to below commit as bad, going back to previous commit i.e
> ddc43e7a SEV-ES guest boots fine. With OVMF/edk2 master branch SEV-ES guest
> boots fine with *AmdSev *package:

The tests don't make much sense in confidential guests (both sev and
tdx).  Which why the driver is not included in the AmdSevPkg builds.

Not activating the driver in confidential guests should fix that, test
patch below.

take care,
  Gerd

diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf 
b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
index 9514933011e8..b5c237288766 100644
--- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
+++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
@@ -49,6 +49,7 @@ [FeaturePcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
 
 [Pcd]
+  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr
   gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase
 
diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c 
b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
index b6e53a1219d1..efaff0d1f3cb 100644
--- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
+++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
@@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -140,6 +141,11 @@ VirtHstiDxeEntrypoint (
   EFI_STATUS   Status;
   EFI_EVENTEvent;
 
+  if (PcdGet64 (PcdConfidentialComputingGuestAttr)) {
+DEBUG ((DEBUG_INFO, "%a: confidential guest\n", __func__));
+return EFI_UNSUPPORTED;
+  }
+
   DevId = VirtHstiGetHostBridgeDevId ();
   switch (DevId) {
 case INTEL_82441_DEVICE_ID:



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Re: [edk2-devel] [PATCH v3 08/13] OvmfPkg/PlatformInitLib: Create gEfiSmmSmramMemoryGuid

[Wu, Jiaxin]

More info:
I quick dump the SMRAM info with original SmmAccess implementation, it's same 
as I produced in the gEfiSmmSmramMemoryGuid HOB.

SmmAccess:
SmmAccessPeiEntryPoint: SMRAM map follows, 2 entries
SmmAccessPeiEntryPoint: 7F00 1000 
7F00   1A---> for the S3 Resume in gEfiAcpiVariableGuid
SmmAccessPeiEntryPoint: 7F001000   FFF000 
7F001000A

Smram map in the gEfiSmmSmramMemoryGuid:
PlatformQemuInitializeRam: 7F00 1000
 7F00   1A--> ---> for the S3 Resume in 
gEfiAcpiVariableGuid
PlatformQemuInitializeRam: 7F001000   FFF000
 7F001000A


Thanks,
Jiaxin

> -Original Message-
> From: Wu, Jiaxin
> Sent: Tuesday, April 23, 2024 8:19 PM
> To: Gerd Hoffmann 
> Cc: devel@edk2.groups.io; Ard Biesheuvel ; Yao,
> Jiewen ; Ni, Ray 
> Subject: RE: [PATCH v3 08/13] OvmfPkg/PlatformInitLib: Create
> gEfiSmmSmramMemoryGuid
> 
> >
> > > +SmramHobDescriptorBlock =
> > (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)(Hob.Raw);
> >
> > > +SmramHobDescriptorBlock->Descriptor[0].PhysicalStart =
> > PlatformInfoHob->LowMemory - TsegSize;
> > > +SmramHobDescriptorBlock->Descriptor[0].CpuStart  =
> > PlatformInfoHob->LowMemory - TsegSize;
> > > +SmramHobDescriptorBlock->Descriptor[0].PhysicalSize  =
> EFI_PAGE_SIZE;
> > > +SmramHobDescriptorBlock->Descriptor[0].RegionState   =
> > EFI_SMRAM_CLOSED | EFI_CACHEABLE | EFI_ALLOCATED;
> >
> > > +SmramHobDescriptorBlock->Descriptor[1].PhysicalStart =
> > SmramHobDescriptorBlock->Descriptor[0].PhysicalStart + EFI_PAGE_SIZE;
> > > +SmramHobDescriptorBlock->Descriptor[1].CpuStart  =
> > SmramHobDescriptorBlock->Descriptor[0].CpuStart + EFI_PAGE_SIZE;
> > > +SmramHobDescriptorBlock->Descriptor[1].PhysicalSize  = TsegSize -
> > EFI_PAGE_SIZE;
> > > +SmramHobDescriptorBlock->Descriptor[1].RegionState   =
> > EFI_SMRAM_CLOSED | EFI_CACHEABLE;
> >
> > This is not going to fly.
> >
> > First, smram allocation doesn't work that way.  Have a look at
> > OvmfPkg/SmmAccess.  I guess that easily explains why this series
> > breaks S3 suspend.
> >
> 
> Oh? Could you explain a bit more for 1) how smram allocation works? 2)
> what's the possible reason break the S3? I haven't check yet.
> 
> > Second, storing these descriptors in a HOB (which is PEI memory)
> > is questionable from a security point of view.
> >
> 
> HOB is only to expose the SMRAM address and size, not the contents in
> smram, what's the security concern?
> 
> 
> Thanks,
> Jiaxin


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[edk2-devel] 回复: [PATCH v2 1/1] Subject: [PATCH] MdePkg:Added new SPCR table stucture members as in Rev4.

[gaoliming via groups.io]

Seemly, this is an incompatible change. What's impact with this change?

Thanks
Liming
> -邮件原件-
> 发件人: Praveen Sankar N 
> 发送时间: 2024年4月22日 19:26
> 收件人: devel@edk2.groups.io
> 抄送: michael.d.kin...@intel.com; gaolim...@byosoft.com.cn;
> zhiguang@intel.com; Felix Polyudov ; Srinivasan Mani
> ; Sundaresan S 
> 主题: [PATCH v2 1/1] Subject: [PATCH] MdePkg:Added new SPCR table
> stucture members as in Rev4.
> 
> In SPCR table, 4 structure members have been added newly as per
> SPCR table Rev4, which has to be added in
> MdePkg/SerialPortConsoleRedirectionTable.h file.
> 
> Signed-off-by: Praveen Sankar N praveensank...@ami.com
> Cc: michael.d.kin...@intel.com
> Cc: gaolim...@byosoft.com.cn
> Cc: zhiguang@intel.com
> Cc: fel...@ami.com
> Cc: srinivas...@ami.com
> Cc: sundares...@ami.com
> ---
>  .../IndustryStandard/SerialPortConsoleRedirectionTable.h| 6 +-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git
> a/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
> b/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
> index eb5ae28390..f0001ab137 100644
> --- a/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
> +++
> b/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
> @@ -47,7 +47,11 @@ typedef struct {
>UINT8 PciFunctionNumber;
> 
>UINT32PciFlags;
> 
>UINT8 PciSegment;
> 
> -  UINT32Reserved3;
> 
> +  UINT32UartClockFrequency;
> 
> +  UINT32PreciseBaudRate;
> 
> +  UINT16
> NameSpaceStrLength;
> 
> +  UINT16
> NameSpaceStrOffset;
> 
> +  CHAR8
> NameSpaceString[0];
> 
>  } EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE;
> 
> 
> 
>  #pragma pack()
> 
> --
> 2.38.1.windows.1
> -The information contained in this message may be confidential and
> proprietary to American Megatrends (AMI). This communication is intended
to
> be read only by the individual or entity to whom it is addressed or by
their
> designee. If the reader of this message is not the intended recipient, you
are
> on notice that any distribution of this message, in any form, is strictly
> prohibited. Please promptly notify the sender by reply e-mail or by
telephone
> at 770-246-8600, and then delete or destroy all copies of the
transmission=




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回复: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into IndustryStandard

[gaoliming via groups.io]

Seemly, there is no other comments. I create PR 
https://github.com/tianocore/edk2/pull/5585 to merge it. 

Thanks
Liming
> -邮件原件-
> 发件人: Nong, Foster 
> 发送时间: 2024年4月23日 18:07
> 收件人: gaoliming ; devel@edk2.groups.io;
> Kinney, Michael D ; 'Chris Li'
> 
> 抄送: Ni, Ray 
> 主题: RE: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into
> IndustryStandard
> 
> Hi Liming,
> 
> What is the patch review status? Can this patch be merged?
> 
> -Original Message-
> From: Nong, Foster
> Sent: Wednesday, December 27, 2023 2:05 PM
> To: gaoliming ; devel@edk2.groups.io; Kinney,
> Michael D ; 'Chris Li'
> 
> Cc: Ni, Ray 
> Subject: RE: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into
> IndustryStandard
> 
> Thanks Liming!
> @'Chris Li' and @Kinney, Michael D, please help comment the patch. Thanks!
> 
> -Original Message-
> From: gaoliming 
> Sent: Tuesday, December 19, 2023 9:05 PM
> To: devel@edk2.groups.io; Nong, Foster ; Kinney,
> Michael D ; 'Chris Li'
> 
> Cc: Ni, Ray 
> Subject: 回复: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into
> IndustryStandard
> 
> Foster:
>   I have no comments for this patch. Acked-by: Liming Gao
> 
> 
> Thanks
> Liming
> > -邮件原件-
> > 发件人: devel@edk2.groups.io  代表 Nong,
> Foster
> > 发送时间: 2023年12月19日 18:17
> > 收件人: devel@edk2.groups.io; Kinney, Michael D
> > ; Gao, Liming ;
> > Chris Li 
> > 抄送: Ni, Ray 
> > 主题: Re: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into
> > IndustryStandard
> >
> > @Gao, Liming @Chris Li @Kinney, Michael D,
> >
> > Don't forget reviewing the patch. Thanks!
> >
> > -Original Message-
> > From: Nong, Foster 
> > Sent: Wednesday, November 29, 2023 2:57 PM
> > To: devel@edk2.groups.io
> > Cc: Nong, Foster ; Kinney, Michael D
> > ; Gao, Liming ;
> > Ni, Ray ; Chris Li 
> > Subject: [PATCH v1] MdePkg: Add Cxl30.h into IndustryStandard
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4516
> >
> > 1) Add CXL 3.0 header file to comply with CXL 3.0 specification
> > 2) CXL 3.0 header will embed Cxl20.h
> > 3) Updated Cxl.h to point to 3.0 header file
> >
> > Signed-off-by: Foster Nong 
> > Cc: Michael D Kinney 
> > Cc: Liming Gao 
> > Cc: Ray Ni 
> > Cc: Chris Li 
> > ---
> >  MdePkg/Include/IndustryStandard/Cxl.h   |   2 +-
> >  MdePkg/Include/IndustryStandard/Cxl30.h | 315
> 
> >  2 files changed, 316 insertions(+), 1 deletion(-)
> >
> > diff --git a/MdePkg/Include/IndustryStandard/Cxl.h
> > b/MdePkg/Include/IndustryStandard/Cxl.h
> > index 9ad3242e25..cb623a355d 100755
> > --- a/MdePkg/Include/IndustryStandard/Cxl.h
> > +++ b/MdePkg/Include/IndustryStandard/Cxl.h
> > @@ -12,7 +12,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #ifndef
> > _CXL_MAIN_H_ #define _CXL_MAIN_H_ -#include
> > +#include  // //
> > CXL assigned new Vendor ID //diff --git
> > a/MdePkg/Include/IndustryStandard/Cxl30.h
> > b/MdePkg/Include/IndustryStandard/Cxl30.h
> > new file mode 100644
> > index 00..feb6b9c52f
> > --- /dev/null
> > +++ b/MdePkg/Include/IndustryStandard/Cxl30.h
> > @@ -0,0 +1,315 @@
> > +/** @file+  CXL 3.0 Register definitions++  This file contains the
> register
> > definitions based on the Compute Express Link+  (CXL) Specification
> Revision
> > 3.0.++  Copyright (c) 2023, Intel Corporation. All rights
> > reserved.++
> > SPDX-License-Identifier: BSD-2-Clause-Patent++**/+#ifndef
> > CXL30_H_+#define CXL30_H_++#include
> ++//+//
> > CXL Cache Memory Capability IDs+// Compute Express Link Specification
> > Revision 3.0 - Chapter 8.2.4 Table 8-22+//+#define
> > CXL_CACHE_MEM_CAPABILITY_ID_TIMEOUT_AND_ISOLATION
> > 0x0009+#define CXL_CACHE_MEM_CAPABILITY_ID_EXTENDED
> > 0x000A+#define CXL_CACHE_MEM_CAPABILITY_ID_BI_ROUTE_TABLE
> > 0x000B+#define CXL_CACHE_MEM_CAPABILITY_ID_BI_DECODER
> > 0x000C+#define
> > CXL_CACHE_MEM_CAPABILITY_ID_CACHE_ID_ROUTE_TABLE
> > 0x000D+#define CXL_CACHE_MEM_CAPABILITY_ID_CACHE_ID_DECODER
> > 0x000E+#define
> > CXL_CACHE_MEM_CAPABILITY_ID_EXTENDED_HDM_DECODER
> > 0x000F++//+// CXL_Capability_Version+// Compute Express ink
> > 0x000F++Specification
> > Revision 3.0 - Chapter 8.2.4.5+//+#define
> CXL_HDM_DECODER_VERSION_30
> > 0x3++//+// CXL CXL HDM Decoder n Control+// Compute Express Link
> > Specification Revision 3.0 - 8.2.4.19.7+//+//+// Bit4..7: Interleave
> > Ways (IW)+//+#define CXL_HDM_16_WAY_INTERLEAVING
> > 0x4+#define CXL_HDM_3_WAY_INTERLEAVING
> > 0x8+#define CXL_HDM_6_WAY_INTERLEAVING
> > 0x9+#define CXL_HDM_12_WAY_INTERLEAVING
> > 0xA++//+// Ensure proper structure formats+//+#pragma pack(1)++//+//
> > CXL.cachemem Extended Register Capability+// Compute Express Link
> > Specification Revision 3.0  - Chapter 8.2.4.24+//+typedef union {+
> > struct
> {+
> > UINT32ExtendedRangesBitmap : 16;  // Bit 0..15+UINT32
> > Reserved : 16;  // Bit 16..31+  } Bits;+  UINT32
> > Uint32;+} CXL_CM_EXTENTED_REGISTER_CAPABILITY;++#define
> > CXL_CM_EXTENTED_RANGES_BITMAP(BIT2 | BIT3 | BIT4 | BIT5 |
> BIT6
> > | BIT7 | BIT8 | BIT9 | BIT10 | BIT11 | BIT12 |

Re: [edk2-devel] [PATCH v3 08/13] OvmfPkg/PlatformInitLib: Create gEfiSmmSmramMemoryGuid

[Wu, Jiaxin]

> 
> > +SmramHobDescriptorBlock =
> (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)(Hob.Raw);
> 
> > +SmramHobDescriptorBlock->Descriptor[0].PhysicalStart =
> PlatformInfoHob->LowMemory - TsegSize;
> > +SmramHobDescriptorBlock->Descriptor[0].CpuStart  =
> PlatformInfoHob->LowMemory - TsegSize;
> > +SmramHobDescriptorBlock->Descriptor[0].PhysicalSize  = EFI_PAGE_SIZE;
> > +SmramHobDescriptorBlock->Descriptor[0].RegionState   =
> EFI_SMRAM_CLOSED | EFI_CACHEABLE | EFI_ALLOCATED;
> 
> > +SmramHobDescriptorBlock->Descriptor[1].PhysicalStart =
> SmramHobDescriptorBlock->Descriptor[0].PhysicalStart + EFI_PAGE_SIZE;
> > +SmramHobDescriptorBlock->Descriptor[1].CpuStart  =
> SmramHobDescriptorBlock->Descriptor[0].CpuStart + EFI_PAGE_SIZE;
> > +SmramHobDescriptorBlock->Descriptor[1].PhysicalSize  = TsegSize -
> EFI_PAGE_SIZE;
> > +SmramHobDescriptorBlock->Descriptor[1].RegionState   =
> EFI_SMRAM_CLOSED | EFI_CACHEABLE;
> 
> This is not going to fly.
> 
> First, smram allocation doesn't work that way.  Have a look at
> OvmfPkg/SmmAccess.  I guess that easily explains why this series
> breaks S3 suspend.
> 

Oh? Could you explain a bit more for 1) how smram allocation works? 2) what's 
the possible reason break the S3? I haven't check yet. 

> Second, storing these descriptors in a HOB (which is PEI memory)
> is questionable from a security point of view.
> 

HOB is only to expose the SMRAM address and size, not the contents in smram, 
what's the security concern?


Thanks,
Jiaxin


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Re: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib

[Wu, Jiaxin]

As I documented in the comment:

This patch provides the SmmRelocationLib library instance
for OVMF to handle the logic difference, and it won't change
the existing implementation code logic.

But as I said, it depends on you. I will drop the OvmfPkg/SmmRelocationLib 
since confirmed we can use the ADM version for OVMF.  

Thanks,
Jiaxin

> -Original Message-
> From: Gerd Hoffmann 
> Sent: Tuesday, April 23, 2024 4:43 PM
> To: Wu, Jiaxin 
> Cc: devel@edk2.groups.io; Ni, Ray ; Zeng, Star
> ; Kumar, Rahul R ; Dong,
> Guo ; Rhodes, Sean ; Lu,
> James ; Guo, Gua ; Ard Biesheuvel
> ; Yao, Jiewen ; Abdul
> Lateef Attar ; Abner Chang
> ; Tom Lendacky 
> Subject: Re: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib
> 
> On Tue, Apr 23, 2024 at 07:31:18AM +, Wu, Jiaxin wrote:
> > Thanks Gerd, I will try the S3 on OVMF.
> >
> > And for AmdSmmRelocationLib usage in OVMF, do you prefer:
> > 1. use the AmdSmmRelocationLib directly in this patch set? Or
> > 2. still keep the original to create the OvmfPkg/SmmRelocationLib, and clean
> the code in the future patch?
> 
> Clear preference for (1), why introduce OvmfPkg/SmmRelocationLib only to
> delete it shortly thereafter?
> 
> take care,
>   Gerd



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Re: [edk2-devel] [PATCH edk2-non-osi 1/1] Qemu/Sbsa: update TF-A binaries for QEMU v9.0+

[Leif Lindholm]

On Tue, Apr 23, 2024 at 12:25:55 +0200, Marcin Juszkiewicz wrote:
> QEMU v9 uses 1GHz frequency for generic timers as required for Arm v8.6+
> cpu cores. TF-A was hardcoding 62.5MHz value which is used for older
> designs. Now it will use value present in CNTFRQ_EL0 register (set by
> QEMU).
> 
> Enable FEAT_ECV for QEMU v9.0+ to get access to CNTPOFF register.
> 
> Signed-off-by: Marcin Juszkiewicz 

Reviewed-by: Leif Lindholm 
Thanks!

Can you push the change yourself?

/
Leif

> ---
>  Platform/Qemu/Sbsa/Readme.md |  55 ++-
>  Platform/Qemu/Sbsa/bl1.bin   | Bin 23365 -> 23349 bytes
>  Platform/Qemu/Sbsa/fip.bin   | Bin 82722 -> 82722 bytes
>  3 files changed, 28 insertions(+), 27 deletions(-)
> 
> diff --git a/Platform/Qemu/Sbsa/Readme.md b/Platform/Qemu/Sbsa/Readme.md
> index 5ed05f0f3021..b1351043d2b4 100644
> --- a/Platform/Qemu/Sbsa/Readme.md
> +++ b/Platform/Qemu/Sbsa/Readme.md
> @@ -4,50 +4,51 @@ Qemu SBSA TF-A binaries
>  These binaries have been created from the mainline TF-A
>  code checked out at the following commit ID:
>  
> -commit f36faa71578a14a8c9910aaa57e761f0256ccd52 (HEAD -> master, 
> origin/master, origin/integration, origin/HEAD)
> -Merge: 8dad296d6 57ab6d897
> -Author: Lauren Wehrmeister 
> -Date:   Tue Mar 12 19:17:49 2024 +0100
> +commit 56b263cb2a25892038761acea8c2b57a638d19bf (HEAD -> integration, 
> origin/integration, gerrit/integration)
> +Merge: 09d3fd141 e769f830d
> +Author: Yann Gautier 
> +Date:   Tue Apr 23 10:42:01 2024 +0200
>  
> -Merge "fix(cpus): fix a defect in Cortex-A715 erratum 2561034" into 
> integration
> +Merge "feat(qemu): allow ARM_ARCH_MAJOR/MINOR override" into integration
>  
>  
>  This ensures that the following features for qemu_sbsa platform are
>  merged upstream and included in the build:
>  
> -commit 42925c15bee09162c6dfc8c2204843ffac6201c1
> +commit 5436047a0e1f32543042d6de9f1f6a3edcd47591
>  Author: Marcin Juszkiewicz 
> -Date:   Tue Nov 21 14:53:26 2023 +0100
> +Date:   Mon Apr 22 17:27:56 2024 +0200
>  
> -feat(qemu-sbsa): handle CPU information
> +refactor(qemu): do not hardcode counter frequency
>  
> -We want to remove use of DeviceTree from EDK2. So we move
> -functions to TF-A:
> +From QEMU change:
>  
> -- counting cpu cores
> -- checking NUMA node id
> -- checking MPIDR
> +> In previous versions of the Arm architecture, the frequency of the
> +> generic timers as reported in CNTFRQ_EL0 could be any IMPDEF value,
> +> and for QEMU we picked 62.5MHz, giving a timer tick period of 16ns.
> +> In Armv8.6, the architecture standardized this frequency to 1GHz.
>  
> -And then it gets passed to EDK2 via SMC calls.
> +This change stops TF-A from hardcoding 62.5MHz frequency. Instead value
> +stored in CNTFRQ_EL0 would be used. As a result we get 62.5MHz on older
> +cores and 1GHz on newer ones.
>  
> -Change-Id: I1c7fc234ba90ba32433b6e4aa2cf127f26da00fd
> +Change-Id: I7d414ce6d3708e598bbb5a6f79eb2d4ec8e15ac4
>  Signed-off-by: Marcin Juszkiewicz 
>  
> -commit 8b7dd8397dd017b61ecda8447e8956a1d9d6d5d3
> -Author: Xiong Yining 
> -Date:   Fri Jan 12 10:47:03 2024 +
> +commit 1b694c77c497cb8272c97417ef1fa4f5f9c869c1
> +Author: Jean-Philippe Brucker 
> +Date:   Mon Apr 15 14:28:11 2024 +0100
>  
> -feat(qemu-sbsa): handle memory information
> +feat(qemu): enable FEAT_ECV when present
>  
> -As a part of removing DeviceTree from EDK2, we move functions to TF-A:
> +QEMU supports FEAT_ECV since commit 2808d3b38a52 ("target/arm: Implement
> +FEAT_ECV CNTPOFF_EL2 handling"), in the v9.0.0 release. Enable
> +auto-detecting the feature on the QEMU platforms, in order to set
> +SCR.ECVEN. Without this, EL2 gets undefined instruction exceptions when
> +trying to access the new CNTPOFF register.
>  
> -- counting the number of memory nodes
> -- checking NUMA node id
> -- checking the memory address
> -
> -Signed-off-by: Xiong Yining 
> -Signed-off-by: Chen Baozi 
> -Change-Id: Ib7bce3a65c817a5b3bef6c9e0a459c7ce76c7e35
> +Change-Id: I555a5f9a9a84fd23e64ca85219ed1599204c6bb2
> +Signed-off-by: Jean-Philippe Brucker 
>  
>  
>  NOTE: No modifications to the source code have been done.
> diff --git a/Platform/Qemu/Sbsa/bl1.bin b/Platform/Qemu/Sbsa/bl1.bin
> index 
> 8eac6204b64be03036c6aabe84618a7c979e78e0..6ad39377a464050dcc714d1316ff8981ad637ded
>  100755
> GIT binary patch
> delta 4429
> zcmZ{n4OCQR8poe^=7KXg&4Jm~vLHTho2gO`Bjw?y!*(?Xe
> zQ=M4#_He@8+5)pe^K?|K zd*0`L-p@Pp!Q1Sux0wk-YkQmGUb_s&Y5m{kYWu@vlgO6JDa&?zGZ`A30GVzoBXrR4
> zvtoM_hXF$53MwryQ?>w{T}_Pi9sp46qn3_Y@;b8fqXjvi_#Wb??9ksq?ehQ{3g}Ze
> z8KS|os2||b<6xTB-=SUmnLlQ%EUk2oku6`1VMj2W#Z84+dA$b0Mzz|*(zf+u9RP1p
> z{Na4c100yo(oK6qp&U6rc?eSBGu4zGjgFLQ1-q~^@RMFl&
> zBvGO;%Oopow3Hp1NA}j|@jA24J!+Jnr4%2aSZ{c}jh|4 z4zkkMDlE}Nvvzz?W6g9$%GK1AQb}D)E(*Sf$}7~g2_VBwrLW`hNcktPSM=4p@I8%H
> zFhdH+*?KGxa@h#(7Vcz=@k2pk-T0$$r@lMiLzC*!
> zbYoV?V$

[edk2-devel] [PATCH edk2-non-osi 1/1] Qemu/Sbsa: update TF-A binaries for QEMU v9.0+

[Marcin Juszkiewicz]

QEMU v9 uses 1GHz frequency for generic timers as required for Arm v8.6+
cpu cores. TF-A was hardcoding 62.5MHz value which is used for older
designs. Now it will use value present in CNTFRQ_EL0 register (set by
QEMU).

Enable FEAT_ECV for QEMU v9.0+ to get access to CNTPOFF register.

Signed-off-by: Marcin Juszkiewicz 
---
 Platform/Qemu/Sbsa/Readme.md |  55 ++-
 Platform/Qemu/Sbsa/bl1.bin   | Bin 23365 -> 23349 bytes
 Platform/Qemu/Sbsa/fip.bin   | Bin 82722 -> 82722 bytes
 3 files changed, 28 insertions(+), 27 deletions(-)

diff --git a/Platform/Qemu/Sbsa/Readme.md b/Platform/Qemu/Sbsa/Readme.md
index 5ed05f0f3021..b1351043d2b4 100644
--- a/Platform/Qemu/Sbsa/Readme.md
+++ b/Platform/Qemu/Sbsa/Readme.md
@@ -4,50 +4,51 @@ Qemu SBSA TF-A binaries
 These binaries have been created from the mainline TF-A
 code checked out at the following commit ID:
 
-commit f36faa71578a14a8c9910aaa57e761f0256ccd52 (HEAD -> master, 
origin/master, origin/integration, origin/HEAD)
-Merge: 8dad296d6 57ab6d897
-Author: Lauren Wehrmeister 
-Date:   Tue Mar 12 19:17:49 2024 +0100
+commit 56b263cb2a25892038761acea8c2b57a638d19bf (HEAD -> integration, 
origin/integration, gerrit/integration)
+Merge: 09d3fd141 e769f830d
+Author: Yann Gautier 
+Date:   Tue Apr 23 10:42:01 2024 +0200
 
-Merge "fix(cpus): fix a defect in Cortex-A715 erratum 2561034" into 
integration
+Merge "feat(qemu): allow ARM_ARCH_MAJOR/MINOR override" into integration
 
 
 This ensures that the following features for qemu_sbsa platform are
 merged upstream and included in the build:
 
-commit 42925c15bee09162c6dfc8c2204843ffac6201c1
+commit 5436047a0e1f32543042d6de9f1f6a3edcd47591
 Author: Marcin Juszkiewicz 
-Date:   Tue Nov 21 14:53:26 2023 +0100
+Date:   Mon Apr 22 17:27:56 2024 +0200
 
-feat(qemu-sbsa): handle CPU information
+refactor(qemu): do not hardcode counter frequency
 
-We want to remove use of DeviceTree from EDK2. So we move
-functions to TF-A:
+From QEMU change:
 
-- counting cpu cores
-- checking NUMA node id
-- checking MPIDR
+> In previous versions of the Arm architecture, the frequency of the
+> generic timers as reported in CNTFRQ_EL0 could be any IMPDEF value,
+> and for QEMU we picked 62.5MHz, giving a timer tick period of 16ns.
+> In Armv8.6, the architecture standardized this frequency to 1GHz.
 
-And then it gets passed to EDK2 via SMC calls.
+This change stops TF-A from hardcoding 62.5MHz frequency. Instead value
+stored in CNTFRQ_EL0 would be used. As a result we get 62.5MHz on older
+cores and 1GHz on newer ones.
 
-Change-Id: I1c7fc234ba90ba32433b6e4aa2cf127f26da00fd
+Change-Id: I7d414ce6d3708e598bbb5a6f79eb2d4ec8e15ac4
 Signed-off-by: Marcin Juszkiewicz 
 
-commit 8b7dd8397dd017b61ecda8447e8956a1d9d6d5d3
-Author: Xiong Yining 
-Date:   Fri Jan 12 10:47:03 2024 +
+commit 1b694c77c497cb8272c97417ef1fa4f5f9c869c1
+Author: Jean-Philippe Brucker 
+Date:   Mon Apr 15 14:28:11 2024 +0100
 
-feat(qemu-sbsa): handle memory information
+feat(qemu): enable FEAT_ECV when present
 
-As a part of removing DeviceTree from EDK2, we move functions to TF-A:
+QEMU supports FEAT_ECV since commit 2808d3b38a52 ("target/arm: Implement
+FEAT_ECV CNTPOFF_EL2 handling"), in the v9.0.0 release. Enable
+auto-detecting the feature on the QEMU platforms, in order to set
+SCR.ECVEN. Without this, EL2 gets undefined instruction exceptions when
+trying to access the new CNTPOFF register.
 
-- counting the number of memory nodes
-- checking NUMA node id
-- checking the memory address
-
-Signed-off-by: Xiong Yining 
-Signed-off-by: Chen Baozi 
-Change-Id: Ib7bce3a65c817a5b3bef6c9e0a459c7ce76c7e35
+Change-Id: I555a5f9a9a84fd23e64ca85219ed1599204c6bb2
+Signed-off-by: Jean-Philippe Brucker 
 
 
 NOTE: No modifications to the source code have been done.
diff --git a/Platform/Qemu/Sbsa/bl1.bin b/Platform/Qemu/Sbsa/bl1.bin
index 
8eac6204b64be03036c6aabe84618a7c979e78e0..6ad39377a464050dcc714d1316ff8981ad637ded
 100755
GIT binary patch
delta 4429
zcmZ{n4OCQR8poe^=7KXg&4Jm~vLHTho2gO`Bjw?y!*(?Xe
zQ=M4#_He@8+5)pe^K?|Kw{T}_Pi9sp46qn3_Y@;b8fqXjvi_#Wb??9ksq?ehQ{3g}Ze
z8KS|os2||b<6xTB-=SUmnLlQ%EUk2oku6`1VMj2W#Z84+dA$b0Mzz|*(zf+u9RP1p
z{Na4c100yo(oK6qp&U6rc?eSBGu4zGjgFLQ1-q~^@RMFl&
zBvGO;%Oopow3Hp1NA}j|@jA24J!+Jnr4%2aSZ{c}jh|4dH+*?KGxa@h#(7Vcz=@k2pk-T0$$r@lMiLzC*!
zbYoV?V$z-rIYZxfg+64IM41`vo(g~yEY#K8i=Cl4rt|q8WetC&xg7isWEjA(NqaTA
zLVRITyv-RaJNxoIi2x&Z)y=DKD;=|
z8a)^*S7=1}*C_DB2zJkaR-5_`PSr{JZ}L5Z?}O|d#JhA`HC7S-p-a;91gPVSy5x|2
zQN9|Bk@{427VprD>;t?{@0f8mq^&;`JR>wk%BBE{nmeHJDD~X){xYc#-_ys72AW+(
zR+d)M6}Eu@C6Z2$zvyRboUtf|-EA5WW!G3i8!*V6LCNnP!-vB*3Z$OJufww0I*ggT
zj1}XC$vfB>em{8u>qCoSF?$_185Xb}eAO_IJ%L})_k$Q7Ua4`$;nwifnMU51QQ!7E
zPg61!wk7JIx&@$&@-RsTJ-#3QsK!``3nJo`hASdcBL?GS1zyp_JlkZ{x9*KdWrD-i
zi}>y>PqA1mFwTmBrpsC(r+@wUwtq2Thj-|9T&}d^PU8wgS&aPkxVN$Nnz!*c{N6Zf
zkyhG0pfUDK<#vyqN@X6DvlQ6&?f8Q!Iqvv>yp20Tq1vK

Re: [edk2-devel] [PATCH edk2-platforms] SbsaQemu: move code outside of methods in DSDT

[Gerd Hoffmann]

  Hi,

> +Name (RBUF, ResourceTemplate() {
> +Memory32Fixed (ReadWrite,
> +   FixedPcdGet32 (PcdPlatformXhciBase),
> +   FixedPcdGet32 (PcdPlatformXhciSize))
> +Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 43 }
> +})
>  Method (_CRS, 0x0, Serialized) {
> -Name (RBUF, ResourceTemplate() {

If the resources never change _CRS doesn't need to be a method, you can
go for "Name (_CRS, ResourceTemplate () ..." instead.

take care,
  Gerd



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Re: [edk2-devel] [PATCH v2 0/4] TCG2 protocol clean up

[G Edhaya Chandran]

Hi Heinrich,

   Yes. A new release candidate shall be published after review and upstream of 
the patches.
Will further send an update.

With Warm Regards,
Edhay


> -Original Message-
> From: Heinrich Schuchardt 
> Sent: Tuesday, April 23, 2024 12:46 AM
> To: G Edhaya Chandran 
> Cc: alex_...@phoenix.com; david_wri...@phoenix.com; lic...@loongson.cn;
> Stuart Yoder ; devel@edk2.groups.io;
> gao...@byosoft.com.cn
> Subject: Re: [PATCH v2 0/4] TCG2 protocol clean up
>
> On 4/16/24 16:53, Stuart Yoder wrote:
> > This patch series cleans up some issues found when building edk2-test
> > with a non-GCC compiler:
> >-TPMT_HA struct had an error due to incorrect use of C flexible array
> member
> >-compute struct member offsets using OFFSET_OF, which is not GCC specific
> >-clean up of #pragma pack in one file
> >-resolve type conversion warnings
> >
> > Patches are in github here:
> > https://github.com/stuyod01/edk2-test/tree/tcg2-cleanup
> >
> > Version 2
> >-add SM3 hash type to TPM2.h
> >-resolve type conversion warnings
> >
> > Stuart Yoder (4):
> >uefi-sct/SctPkg: TCG2 Protocol: correct definition of TPMT_HA struct
> >uefi-sct/SctPkg: TCG2 Protocol: use OFFSET_OF for computing offsets
> >uefi-sct/SctPkg: TCG2 Protocol: #pragma pack cleanup
> >uefi-sct/SctPkg: TCG2 Protocol: clean up type conversion warnings
> >
> >   uefi-
> sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTe
> st.h|  3 +--
> >   uefi-sct/SctPkg/UEFI/Protocol/TCG2.h  
> >| 17
> +++--
> >   uefi-
> sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTe
> stConformance.c | 25 +---
> >   3 files changed, 27 insertions(+), 18 deletions(-)
> >
>
> Hello Edhaya,
>
> Will we have another release candidate with these patches included?
>
> Best regards
>
> Heinrich

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Re: [edk2-devel] [PATCH v2] OvmfPkg: Harden #VC instruction emulation somewhat (CVE-2024-25742)

[Gerd Hoffmann]

On Fri, Apr 19, 2024 at 11:21:46AM -0700, Adam Dunlap wrote:
> Ensure that when a #VC exception happens, the instruction at the
> instruction pointer matches the instruction that is expected given the
> error code. This is to mitigate the ahoi WeSee attack [1] that could
> allow hypervisors to breach integrity and confidentiality of the
> firmware by maliciously injecting interrupts. This change is a
> translated version of a linux patch e3ef461af35a ("x86/sev: Harden #VC
> instruction emulation somewhat")
> 
> [1] https://ahoi-attacks.github.io/wesee/
> 
> Cc: Borislav Petkov (AMD) 
> Cc: Tom Lendacky 
> Signed-off-by: Adam Dunlap 

Reviewed-by: Gerd Hoffmann 

take care,
  Gerd



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Re: [edk2-devel] [PATCH v3 08/13] OvmfPkg/PlatformInitLib: Create gEfiSmmSmramMemoryGuid

[Gerd Hoffmann]

  Hi,

> +Hob.Raw = BuildGuidHob (
> +&gEfiSmmSmramMemoryGuid,
> +BufferSize
> +);

> +SmramHobDescriptorBlock = 
> (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)(Hob.Raw);

> +SmramHobDescriptorBlock->Descriptor[0].PhysicalStart = 
> PlatformInfoHob->LowMemory - TsegSize;
> +SmramHobDescriptorBlock->Descriptor[0].CpuStart  = 
> PlatformInfoHob->LowMemory - TsegSize;
> +SmramHobDescriptorBlock->Descriptor[0].PhysicalSize  = EFI_PAGE_SIZE;
> +SmramHobDescriptorBlock->Descriptor[0].RegionState   = EFI_SMRAM_CLOSED 
> | EFI_CACHEABLE | EFI_ALLOCATED;

> +SmramHobDescriptorBlock->Descriptor[1].PhysicalStart = 
> SmramHobDescriptorBlock->Descriptor[0].PhysicalStart + EFI_PAGE_SIZE;
> +SmramHobDescriptorBlock->Descriptor[1].CpuStart  = 
> SmramHobDescriptorBlock->Descriptor[0].CpuStart + EFI_PAGE_SIZE;
> +SmramHobDescriptorBlock->Descriptor[1].PhysicalSize  = TsegSize - 
> EFI_PAGE_SIZE;
> +SmramHobDescriptorBlock->Descriptor[1].RegionState   = EFI_SMRAM_CLOSED 
> | EFI_CACHEABLE;

This is not going to fly.

First, smram allocation doesn't work that way.  Have a look at
OvmfPkg/SmmAccess.  I guess that easily explains why this series
breaks S3 suspend.

Second, storing these descriptors in a HOB (which is PEI memory)
is questionable from a security point of view.

take care,
  Gerd



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Re: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib

[Gerd Hoffmann]

On Tue, Apr 23, 2024 at 07:31:18AM +, Wu, Jiaxin wrote:
> Thanks Gerd, I will try the S3 on OVMF.
> 
> And for AmdSmmRelocationLib usage in OVMF, do you prefer:
> 1. use the AmdSmmRelocationLib directly in this patch set? Or
> 2. still keep the original to create the OvmfPkg/SmmRelocationLib, and clean 
> the code in the future patch?

Clear preference for (1), why introduce OvmfPkg/SmmRelocationLib only to
delete it shortly thereafter?

take care,
  Gerd



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Re: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg: introduce RedfishBootstrapAccountDxe

[Chang, Abner via groups.io]

[AMD Official Use Only - General]

> -Original Message-
> From: Nickle Wang 
> Sent: Tuesday, April 23, 2024 3:09 PM
> To: Igor Kulchytskyy ; Chang, Abner
> ; devel@edk2.groups.io
> Cc: Nick Ramirez 
> Subject: RE: [EXTERNAL] RE: [edk2-redfish-client][PATCH] RedfishClientPkg:
> introduce RedfishBootstrapAccountDxe
>
> [AMD Official Use Only - General]
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> Hi Igor, Abner,
>
> Thanks for your review. Please allow me to answer your questions together.
>
> > 1. We suppose acquire the credential before we start to communicate with
> Redfish. Will Redfish credential driver create another bootstrap account here
> after provisioning?
> No, according to the RedfishPlatformCredentialIpmiLib implementation,
> Redfish credential driver requests credential from BMC and will keep it for 
> later
> use. So only one credential is requested for BIOS Redfish feature drivers 
> during
> POST time.
Ok, then I don't have the problem with invoking GetAuthInfo again. However, I 
will suggest to add more description in GetAuthInfo function header, mention 
that we will keep the auth info in EFI variable until exist boot service.
Also, give some more descriptions on the code you invoke to GetAuthInfo.

>
> > 2. And why do we delete the credential after provisioning? How about the
> later Redfish property updating process?
> In this driver, we listen to "AfterProvisioning" event. And this is the event
> triggered after Redfish feature driver finish all jobs. There is no feature 
> driver
> which gets executed after this event. And since we finished all Redfish
> operations, we remove this account on BMC.
Then this makes sense to me now.

>
> > Why do we need to delete those credentials? According to spec BMC should
> delete the bootstrap credentials automatically on host or service reset.
> Yes, bootstrap credentials get deleted on host reset. In practice, server in
> datacenter usually takes long time running under OS before it gets rebooted.
> The bootstrap credentials are exposed to end user at
> "/redfish/v1/AccountService/Accounts". I got report that there is concern for
> end user to see this unused account.
This sounds to me reasonable as we will give bootstrap credential a high 
privilege to update Redfish resource. Leave this information in Account service 
seems not a good idea.

Thanks
Abner

>
> So, I create this driver to allows us to remove bootstrap account at BMC after
> we finish Redfish jobs. And this also release the BMC account resource since
> this account won't be used for a long period of time.
>
> Regards,
> Nickle
>
> > -Original Message-
> > From: Igor Kulchytskyy 
> > Sent: Monday, April 22, 2024 11:03 PM
> > To: Chang, Abner ; Nickle Wang
> > ; devel@edk2.groups.io
> > Cc: Nick Ramirez 
> > Subject: RE: [EXTERNAL] RE: [edk2-redfish-client][PATCH] RedfishClientPkg:
> > introduce RedfishBootstrapAccountDxe
> >
> > External email: Use caution opening links or attachments
> >
> >
> > Hi Nickle and Abner,
> > I also have the same question as Abner.
> > Why do we need to delete those credentials?
> > According to spec BMC should delete the bootstrap credentials automatically
> on
> > host or service reset.
> > Thank you,
> > Igor
> >
> > -Original Message-
> > From: Chang, Abner 
> > Sent: Sunday, April 21, 2024 10:25 PM
> > To: Nickle Wang ; devel@edk2.groups.io
> > Cc: Igor Kulchytskyy ; Nick Ramirez
> 
> > Subject: [EXTERNAL] RE: [edk2-redfish-client][PATCH] RedfishClientPkg:
> > introduce RedfishBootstrapAccountDxe
> >
> >
> > **CAUTION: The e-mail below is from an external source. Please exercise
> > caution before opening attachments, clicking links, or following guidance.**
> >
> > [AMD Official Use Only - General]
> >
> > Hi Nickle,
> > One comment and few questions,
> >
> > > -Original Message-
> > > From: Nickle Wang 
> > > Sent: Thursday, April 18, 2024 8:28 PM
> > > To: devel@edk2.groups.io
> > > Cc: Chang, Abner ; Igor Kulchytskyy
> > > ; Nick Ramirez 
> > > Subject: [edk2-redfish-client][PATCH] RedfishClientPkg: introduce
> > > RedfishBootstrapAccountDxe
> > >
> > > Caution: This message originated from an External Source. Use proper
> > > caution when opening attachments, clicking links, or responding.
> > >
> > >
> > > -Introduce RedfishBootstrapAccountDxe to delete bootstrap account from
> > > /redfish/v1/AccountService/Accounts after BIOS finished all Redfish
> > > jobs. The bootstrap account won't be available to other application.
> > > So deleting bootstrap account helps to release resource at BMC.
> > > - After bootstrap account is deleted at BMC, the Redfish service
> > > instance is no longer usable. Close Redfish service instance to
> > > release the HTTP connection between BIOS and BMC.
> > >
> > > Signed-off-by: Nickle Wang 
> > > Cc: Abner Chang 
> > > Cc: Igor Kulchytskyy 
> > > Cc: Nick Ramirez 
> > > ---
> > 

Re: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib

[Wu, Jiaxin]

Thanks Gerd, I will try the S3 on OVMF.

And for AmdSmmRelocationLib usage in OVMF, do you prefer:
1. use the AmdSmmRelocationLib directly in this patch set? Or
2. still keep the original to create the OvmfPkg/SmmRelocationLib, and clean 
the code in the future patch?

Both are fine to me, depends on you.

Thanks,
Jiaxin


> -Original Message-
> From: Gerd Hoffmann 
> Sent: Monday, April 22, 2024 3:58 PM
> To: Wu, Jiaxin 
> Cc: devel@edk2.groups.io; Ni, Ray ; Zeng, Star
> ; Kumar, Rahul R ; Dong,
> Guo ; Rhodes, Sean ; Lu,
> James ; Guo, Gua ; Ard Biesheuvel
> ; Yao, Jiewen ; Abdul
> Lateef Attar ; Abner Chang
> ; Tom Lendacky 
> Subject: Re: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib
> 
> On Thu, Apr 18, 2024 at 08:02:43AM +, Wu, Jiaxin wrote:
> > Hi Gerd,
> >
> > Could you help review & check below OVMF related patches?
> >
> > >   OvmfPkg/SmmRelocationLib: Add library instance for OVMF
> > >   OvmfPkg/PlatformInitLib: Create gEfiSmmSmramMemoryGuid
> > >   OvmfPkg: Refine SmmAccess implementation
> > >   OvmfPkg/SmmCpuFeaturesLib: Check Smbase Relocation is done or not
> > >   OvmfPkg/PlatformPei: Relocate SmBases in PEI phase
> 
> Patch series breaks S3 suspend support in OVMF.
> 
> On a quick check (OvmfPkgX64 only) using AmdSmmRelocationLib.inf for
> OVMF seems to work fine (S3 is broken too though).
> 
> take care,
>   Gerd



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Re: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg: introduce RedfishBootstrapAccountDxe

[Nickle Wang via groups.io]

Hi Igor, Abner,

Thanks for your review. Please allow me to answer your questions together.

> 1. We suppose acquire the credential before we start to communicate with 
> Redfish. Will Redfish credential driver create another bootstrap account here 
> after provisioning?
No, according to the RedfishPlatformCredentialIpmiLib implementation, Redfish 
credential driver requests credential from BMC and will keep it for later use. 
So only one credential is requested for BIOS Redfish feature drivers during 
POST time.

> 2. And why do we delete the credential after provisioning? How about the 
> later Redfish property updating process?
In this driver, we listen to "AfterProvisioning" event. And this is the event 
triggered after Redfish feature driver finish all jobs. There is no feature 
driver which gets executed after this event. And since we finished all Redfish 
operations, we remove this account on BMC.

> Why do we need to delete those credentials? According to spec BMC should 
> delete the bootstrap credentials automatically on host or service reset.
Yes, bootstrap credentials get deleted on host reset. In practice, server in 
datacenter usually takes long time running under OS before it gets rebooted. 
The bootstrap credentials are exposed to end user at 
"/redfish/v1/AccountService/Accounts". I got report that there is concern for 
end user to see this unused account. 

So, I create this driver to allows us to remove bootstrap account at BMC after 
we finish Redfish jobs. And this also release the BMC account resource since 
this account won't be used for a long period of time.

Regards,
Nickle

> -Original Message-
> From: Igor Kulchytskyy 
> Sent: Monday, April 22, 2024 11:03 PM
> To: Chang, Abner ; Nickle Wang
> ; devel@edk2.groups.io
> Cc: Nick Ramirez 
> Subject: RE: [EXTERNAL] RE: [edk2-redfish-client][PATCH] RedfishClientPkg:
> introduce RedfishBootstrapAccountDxe
> 
> External email: Use caution opening links or attachments
> 
> 
> Hi Nickle and Abner,
> I also have the same question as Abner.
> Why do we need to delete those credentials?
> According to spec BMC should delete the bootstrap credentials automatically on
> host or service reset.
> Thank you,
> Igor
> 
> -Original Message-
> From: Chang, Abner 
> Sent: Sunday, April 21, 2024 10:25 PM
> To: Nickle Wang ; devel@edk2.groups.io
> Cc: Igor Kulchytskyy ; Nick Ramirez 
> Subject: [EXTERNAL] RE: [edk2-redfish-client][PATCH] RedfishClientPkg:
> introduce RedfishBootstrapAccountDxe
> 
> 
> **CAUTION: The e-mail below is from an external source. Please exercise
> caution before opening attachments, clicking links, or following guidance.**
> 
> [AMD Official Use Only - General]
> 
> Hi Nickle,
> One comment and few questions,
> 
> > -Original Message-
> > From: Nickle Wang 
> > Sent: Thursday, April 18, 2024 8:28 PM
> > To: devel@edk2.groups.io
> > Cc: Chang, Abner ; Igor Kulchytskyy
> > ; Nick Ramirez 
> > Subject: [edk2-redfish-client][PATCH] RedfishClientPkg: introduce
> > RedfishBootstrapAccountDxe
> >
> > Caution: This message originated from an External Source. Use proper
> > caution when opening attachments, clicking links, or responding.
> >
> >
> > -Introduce RedfishBootstrapAccountDxe to delete bootstrap account from
> > /redfish/v1/AccountService/Accounts after BIOS finished all Redfish
> > jobs. The bootstrap account won't be available to other application.
> > So deleting bootstrap account helps to release resource at BMC.
> > - After bootstrap account is deleted at BMC, the Redfish service
> > instance is no longer usable. Close Redfish service instance to
> > release the HTTP connection between BIOS and BMC.
> >
> > Signed-off-by: Nickle Wang 
> > Cc: Abner Chang 
> > Cc: Igor Kulchytskyy 
> > Cc: Nick Ramirez 
> > ---
> >  .../RedfishClientComponents.dsc.inc   |   1 +
> >  .../RedfishBootstrapAccountDxe.inf|  53 +++
> >  .../RedfishBootstrapAccountDxe.h  |  58 
> >  .../RedfishBootstrapAccountDxe.c  | 328 ++
> >  RedfishClientPkg/RedfishClient.fdf.inc|   1 +
> >  5 files changed, 441 insertions(+)
> >  create mode 100644
> > RedfishClientPkg/RedfishBootstrapAccountDxe/RedfishBootstrapAccountDxe
> > .inf
> >  create mode 100644
> > RedfishClientPkg/RedfishBootstrapAccountDxe/RedfishBootstrapAccountDxe
> > .h
> >  create mode 100644
> > RedfishClientPkg/RedfishBootstrapAccountDxe/RedfishBootstrapAccountDxe
> > .c
> >
> > diff --git a/RedfishClientPkg/RedfishClientComponents.dsc.inc
> > b/RedfishClientPkg/RedfishClientComponents.dsc.inc
> > index 42fc0c299..fe5248b62 100644
> > --- a/RedfishClientPkg/RedfishClientComponents.dsc.inc
> > +++ b/RedfishClientPkg/RedfishClientComponents.dsc.inc
> > @@ -20,6 +20,7 @@
> >RedfishClientPkg/HiiToRedfishMemoryDxe/HiiToRedfishMemoryDxe.inf
> >RedfishClientPkg/HiiToRedfishBootDxe/HiiToRedfishBootDxe.inf
> >RedfishClientPkg/HiiToRedfishBiosDxe/HiiToRedfishBiosDxe.inf
> > +
> > RedfishCli