[PATCH v2 11/32] bsp/leon3: Move system control register support

[Sebastian Huber]

Move, document, and reformat support functions from  to
.
---
 bsps/sparc/leon3/include/bsp/leon3.h | 173 +++
 bsps/sparc/leon3/include/leon.h  | 100 +---
 bsps/sparc/leon3/start/bspsmp.c  |   1 -
 bsps/sparc/leon3/start/bspstart.c|   2 +-
 bsps/sparc/leon3/start/cache.c   |   2 +-
 5 files changed, 176 insertions(+), 102 deletions(-)

diff --git a/bsps/sparc/leon3/include/bsp/leon3.h 
b/bsps/sparc/leon3/include/bsp/leon3.h
index a5559bc7b9..75abc34fb7 100644
--- a/bsps/sparc/leon3/include/bsp/leon3.h
+++ b/bsps/sparc/leon3/include/bsp/leon3.h
@@ -38,6 +38,10 @@
 
 #include 
 
+#include 
+
+#include 
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -48,6 +52,175 @@ extern "C" {
  * @{
  */
 
+/**
+ * @brief This constant represents the flush instruction cache flag of the LEON
+ *   cache control register.
+ */
+#define LEON3_REG_CACHE_CTRL_FI 0x0020U
+
+/**
+ * @brief This constant represents the data cache snooping enable flag of the
+ *   LEON cache control register.
+ */
+#define LEON3_REG_CACHE_CTRL_DS 0x0080U
+
+/**
+ * @brief Sets the ASI 0x2 system register value.
+ *
+ * @param addr is the address of the ASI 0x2 system register.
+ *
+ * @param val is the value to set.
+ */
+static inline void leon3_set_system_register( uint32_t addr, uint32_t val )
+{
+  __asm__ volatile(
+"sta %1, [%0] 2"
+:
+: "r" ( addr ), "r" ( val )
+  );
+}
+
+/**
+ * @brief Gets the ASI 0x2 system register value.
+ *
+ * @param addr is the address of the ASI 0x2 system register.
+ *
+ * @return Returns the register value.
+ */
+static inline uint32_t leon3_get_system_register( uint32_t addr )
+{
+  uint32_t val;
+
+  __asm__ volatile(
+"lda [%1] 2, %0"
+: "=r" ( val )
+: "r" ( addr )
+  );
+
+  return val;
+}
+
+/**
+ * @brief Sets the LEON cache control register value.
+ *
+ * @param val is the value to set.
+ */
+static inline void leon3_set_cache_control_register( uint32_t val )
+{
+  leon3_set_system_register( 0x0, val );
+}
+
+/**
+ * @brief Gets the LEON cache control register value.
+ *
+ * @return Returns the register value.
+ */
+static inline uint32_t leon3_get_cache_control_register( void )
+{
+  return leon3_get_system_register( 0x0 );
+}
+
+/**
+ * @brief Checks if the data cache snooping is enabled.
+ *
+ * @return Returns true, if the data cache snooping is enabled, otherwise
+ *   false.
+ */
+static inline bool leon3_data_cache_snooping_enabled( void )
+{
+  return ( leon3_get_cache_control_register() & LEON3_REG_CACHE_CTRL_DS ) != 0;
+}
+
+/**
+ * @brief Gets the LEON instruction cache configuration register value.
+ *
+ * @return Returns the register value.
+ */
+static inline uint32_t leon3_get_inst_cache_config_register( void )
+{
+  return leon3_get_system_register( 0x8 );
+}
+
+/**
+ * @brief Gets the LEON data cache configuration register value.
+ *
+ * @return Returns the register value.
+ */
+static inline uint32_t leon3_get_data_cache_config_register( void )
+{
+  return leon3_get_system_register( 0xc );
+}
+
+/**
+ * @brief Gets the LEON up-counter low register (%ASR23) value.
+ *
+ * @return Returns the register value.
+ */
+static inline uint32_t leon3_up_counter_low( void )
+{
+  uint32_t asr23;
+
+  __asm__ volatile (
+"mov %%asr23, %0"
+: "=&r" (asr23)
+  );
+
+  return asr23;
+}
+
+/**
+ * @brief Gets the LEON up-counter high register (%ASR22) value.
+ *
+ * @return Returns the register value.
+ */
+static inline uint32_t leon3_up_counter_high(void)
+{
+  uint32_t asr22;
+
+  __asm__ volatile (
+"mov %%asr22, %0"
+: "=&r" (asr22)
+  );
+
+  return asr22;
+}
+
+/**
+ * @brief Enables the LEON up-counter.
+ */
+static inline void leon3_up_counter_enable( void )
+{
+  __asm__ volatile (
+"mov %g0, %asr22"
+  );
+}
+
+/**
+ * @brief Checks if the LEON up-counter is available.
+ *
+ * The LEON up-counter must have been enabled.
+ *
+ * @return Returns true, if the LEON up-counter is available, otherwise false.
+ */
+static inline bool leon3_up_counter_is_available( void )
+{
+  return leon3_up_counter_low() != leon3_up_counter_low();
+}
+
+/**
+ * @brief Gets the LEON up-counter frequency in Hz.
+ *
+ * @return Returns the frequency.
+ */
+static inline uint32_t leon3_up_counter_frequency( void )
+{
+  /*
+   * For simplicity, assume that the interrupt controller uses the processor
+   * clock.  This is at least true on the GR740.
+   */
+  return ambapp_freq_get( ambapp_plb(), LEON3_IrqCtrl_Adev );
+}
+
 /**
  * @brief This pointer provides the debug APBUART register block address.
  */
diff --git a/bsps/sparc/leon3/include/leon.h b/bsps/sparc/leon3/include/leon.h
index bf92badfcd..6fe499989d 100644
--- a/bsps/sparc/leon3/include/leon.h
+++ b/bsps/sparc/leon3/include/leon.h
@@ -45,7 +45,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #ifdef __cplusplus
 extern "C" {
@@ -142,12 +142,6 @@ extern "C" {
 #define LEON_REG_UART_CTRL_FA 0x8000 /* FIFO Available */
 #define LEON_R

[PATCH v2 13/32] bsp/leon3: Use new L2CACHE register block API

[Sebastian Huber]

---
 bsps/sparc/leon3/start/cache.c | 38 --
 1 file changed, 23 insertions(+), 15 deletions(-)

diff --git a/bsps/sparc/leon3/start/cache.c b/bsps/sparc/leon3/start/cache.c
index 676f591857..ed6fb5733d 100644
--- a/bsps/sparc/leon3/start/cache.c
+++ b/bsps/sparc/leon3/start/cache.c
@@ -6,9 +6,13 @@
  * http://www.rtems.org/license/LICENSE.
  */
 
-#include 
+#include 
+#include 
+
 #include 
 
+#include 
+
 #define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS
 
 #define CPU_CACHE_SUPPORT_PROVIDES_CACHE_SIZE_FUNCTIONS
@@ -19,12 +23,11 @@
 
 #define CPU_DATA_CACHE_ALIGNMENT 64
 
-static inline volatile struct l2c_regs *get_l2c_regs(void)
+static inline l2cache *get_l2c_regs(void)
 {
-  volatile struct l2c_regs *l2c = NULL;
   struct ambapp_dev *adev;
 
-  adev = (void *) ambapp_for_each(
+  adev = (struct ambapp_dev *) ambapp_for_each(
 ambapp_plb(),
 OPTIONS_ALL | OPTIONS_AHB_SLVS,
 VENDOR_GAISLER,
@@ -32,27 +35,32 @@ static inline volatile struct l2c_regs *get_l2c_regs(void)
 ambapp_find_by_idx,
 NULL
   );
-  if (adev != NULL) {
-l2c = (volatile struct l2c_regs *) DEV_TO_AHB(adev)->start[1];
+
+  if (adev == NULL) {
+return NULL;
   }
 
-  return l2c;
+  return (l2cache *) DEV_TO_AHB(adev)->start[1];
 }
 
 static inline size_t get_l2_size(void)
 {
-  size_t size = 0;
-  volatile struct l2c_regs *l2c = get_l2c_regs();
+  l2cache *regs;
+  unsigned status;
+  unsigned ways;
+  unsigned set_size;
 
-  if (l2c != NULL) {
-unsigned status = l2c->status;
-unsigned ways = (status & 0x3) + 1;
-unsigned set_size = ((status & 0x7ff) >> 2) * 1024;
+  regs = get_l2c_regs();
 
-size = ways * set_size;
+  if (regs == NULL) {
+return 0;
   }
 
-  return size;
+  status = grlib_load_32(®s->l2cs);
+  ways = L2CACHE_L2CS_WAY_GET(status) + 1;
+  set_size = L2CACHE_L2CS_WAY_SIZE_GET(status) * 1024;
+
+  return ways * set_size;
 }
 
 static inline size_t get_l1_size(uint32_t l1_cfg)
-- 
2.35.3

___
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[PATCH v2 09/32] bsp/leon3: Move and simplify bsp_irq_fixup()

[Sebastian Huber]

---
 bsps/sparc/erc32/include/bsp/irqimpl.h   | 63 
 bsps/sparc/erc32/include/erc32.h |  5 --
 bsps/sparc/leon2/include/bsp/irqimpl.h   | 63 
 bsps/sparc/leon2/include/leon.h  |  5 --
 bsps/sparc/leon3/clock/ckinit.c  |  4 +-
 bsps/sparc/leon3/include/bsp/irq.h   |  1 -
 bsps/sparc/leon3/include/bsp/irqimpl.h   | 31 
 bsps/sparc/leon3/include/leon.h  | 18 ---
 bsps/sparc/leon3/start/eirq.c|  8 +--
 bsps/sparc/shared/irq/bsp_isr_handler.c  |  1 +
 spec/build/bsps/sparc/erc32/bsperc32.yml |  1 +
 spec/build/bsps/sparc/leon2/obj.yml  |  1 +
 12 files changed, 164 insertions(+), 37 deletions(-)
 create mode 100644 bsps/sparc/erc32/include/bsp/irqimpl.h
 create mode 100644 bsps/sparc/leon2/include/bsp/irqimpl.h

diff --git a/bsps/sparc/erc32/include/bsp/irqimpl.h 
b/bsps/sparc/erc32/include/bsp/irqimpl.h
new file mode 100644
index 00..6a8b17f188
--- /dev/null
+++ b/bsps/sparc/erc32/include/bsp/irqimpl.h
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsSPARCERC32
+ *
+ * @brief This header file provides interfaces used by the interrupt support
+ *   implementation.
+ */
+
+/*
+ * Copyright (C) 2023 embedded brains GmbH & Co. KG
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LIBBSP_SPARC_ERC32_BSP_IRQIMPL_H
+#define LIBBSP_SPARC_ERC32_BSP_IRQIMPL_H
+
+#include 
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @addtogroup RTEMSBSPsSPARCERC32
+ *
+ * @{
+ */
+
+static inline uint32_t bsp_irq_fixup( uint32_t irq )
+{
+  return irq;
+}
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LIBBSP_SPARC_ERC32_BSP_IRQIMPL_H */
diff --git a/bsps/sparc/erc32/include/erc32.h b/bsps/sparc/erc32/include/erc32.h
index f9cdbc960a..3967f4c918 100644
--- a/bsps/sparc/erc32/include/erc32.h
+++ b/bsps/sparc/erc32/include/erc32.h
@@ -326,11 +326,6 @@ typedef struct {
 
 extern ERC32_Register_Map ERC32_MEC;
 
-static __inline__ int bsp_irq_fixup(int irq)
-{
-   return irq;
-}
-
 /*
  *  Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask,
  *  and the Interrupt Pending Registers.
diff --git a/bsps/sparc/leon2/include/bsp/irqimpl.h 
b/bsps/sparc/leon2/include/bsp/irqimpl.h
new file mode 100644
index 00..868822f3aa
--- /dev/null
+++ b/bsps/sparc/leon2/include/bsp/irqimpl.h
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsSPARCLEON2
+ *
+ * @brief This header file provides interfaces used by the interrupt support
+ *   implementation.
+ */
+
+/*
+ * Copyright (C) 2023 embedded brains GmbH & Co. KG
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERV

[PATCH v2 27/32] bsps/sparc: Remove BSP_POWER_DOWN_AT_FATAL_HALT

[Sebastian Huber]

Remove the BSP_POWER_DOWN_AT_FATAL_HALT BSP option.  Applications should
do the customization of the system termination with an initial fatal
extension.
---
 bsps/sparc/leon3/start/bsp_fatal_halt.c  | 50 ---
 bsps/sparc/shared/start/bsp_fatal_halt.c | 52 
 cpukit/score/cpu/sparc/syscall.S |  2 +
 spec/build/bsps/sparc/erc32/bsperc32.yml |  3 --
 spec/build/bsps/sparc/erc32/optpwrdwnhlt.yml | 16 --
 spec/build/bsps/sparc/leon2/grp.yml  |  2 -
 spec/build/bsps/sparc/leon2/obj.yml  |  1 -
 spec/build/bsps/sparc/leon2/optpwrdwnhlt.yml | 16 --
 spec/build/bsps/sparc/leon3/grp.yml  |  2 -
 spec/build/bsps/sparc/leon3/obj.yml  |  1 -
 spec/build/bsps/sparc/leon3/optpwrdwnhlt.yml | 16 --
 11 files changed, 2 insertions(+), 159 deletions(-)
 delete mode 100644 bsps/sparc/leon3/start/bsp_fatal_halt.c
 delete mode 100644 bsps/sparc/shared/start/bsp_fatal_halt.c
 delete mode 100644 spec/build/bsps/sparc/erc32/optpwrdwnhlt.yml
 delete mode 100644 spec/build/bsps/sparc/leon2/optpwrdwnhlt.yml
 delete mode 100644 spec/build/bsps/sparc/leon3/optpwrdwnhlt.yml

diff --git a/bsps/sparc/leon3/start/bsp_fatal_halt.c 
b/bsps/sparc/leon3/start/bsp_fatal_halt.c
deleted file mode 100644
index ce628065b7..00
--- a/bsps/sparc/leon3/start/bsp_fatal_halt.c
+++ /dev/null
@@ -1,50 +0,0 @@
-/* SPDX-License-Identifier: BSD-2-Clause */
-
-/**
- * @file
- * @ingroup sparc_leon3
- * @brief LEON3 BSP Fatal_halt handler.
- *
- *  COPYRIGHT (c) 2014.
- *  Aeroflex Gaisler AB.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *notice, this list of conditions and the following disclaimer in the
- *documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include 
-#include 
-#include 
-
-void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error )
-{
-#ifdef BSP_POWER_DOWN_AT_FATAL_HALT
-  /* Power down LEON CPU on fatal error exit */
-  sparc_disable_interrupts();
-  leon3_power_down_loop();
-#else
-  /*
-   * Return to debugger, simulator, hypervisor or similar by exiting
-   * with an error code. g1=1, g2=FATAL_SOURCE, G3=error-code.
-   */
-  sparc_syscall_exit(source, error);
-#endif
-}
diff --git a/bsps/sparc/shared/start/bsp_fatal_halt.c 
b/bsps/sparc/shared/start/bsp_fatal_halt.c
deleted file mode 100644
index ebce8c1928..00
--- a/bsps/sparc/shared/start/bsp_fatal_halt.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/* SPDX-License-Identifier: BSD-2-Clause */
-
-/**
- * @file
- * @ingroup RTEMSBSPsSPARCShared
- * @brief ERC32/LEON2 BSP Fatal_halt handler.
- *
- *  COPYRIGHT (c) 2014.
- *  Aeroflex Gaisler AB.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *notice, this list of conditions and the following disclaimer in the
- *documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * 

[PATCH v2 22/32] bsp/leon3: Simplify fatal error handling

[Sebastian Huber]

---
 bsps/sparc/leon3/include/bsp/leon3.h | 12 
 bsps/sparc/leon3/start/bspclean.c| 89 +++-
 bsps/sparc/leon3/start/bspsmp.c  | 16 +
 3 files changed, 77 insertions(+), 40 deletions(-)

diff --git a/bsps/sparc/leon3/include/bsp/leon3.h 
b/bsps/sparc/leon3/include/bsp/leon3.h
index 1394dd1c1c..476ed73647 100644
--- a/bsps/sparc/leon3/include/bsp/leon3.h
+++ b/bsps/sparc/leon3/include/bsp/leon3.h
@@ -161,6 +161,18 @@ static inline uint32_t 
leon3_get_data_cache_config_register( void )
   return leon3_get_system_register( 0xc );
 }
 
+/**
+ * @brief Gets the processor count.
+ *
+ * @param[in] regs is the IRQ(A)MP register block address.
+ *
+ * @return Returns the processor count.
+ */
+static inline uint32_t leon3_get_cpu_count( const irqamp *regs )
+{
+  return IRQAMP_MPSTAT_NCPU_GET( grlib_load_32( ®s->mpstat ) ) + 1;
+}
+
 /**
  * @brief This constant defines the index of the GPTIMER timer used by the
  *   clock driver.
diff --git a/bsps/sparc/leon3/start/bspclean.c 
b/bsps/sparc/leon3/start/bspclean.c
index acb2d6093c..4c9b385b43 100644
--- a/bsps/sparc/leon3/start/bspclean.c
+++ b/bsps/sparc/leon3/start/bspclean.c
@@ -35,14 +35,62 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
+#if defined(RTEMS_SMP)
+static void leon3_wait_for_power_down(irqamp *regs)
+{
+  uint32_t max_wait;
+  uint32_t cpu_self;
+  uint32_t cpu_count;
+  uint32_t halt_mask;
+  uint32_t i;
+
+  cpu_count = leon3_get_cpu_count(regs);
+
+  if (cpu_count > rtems_configuration_get_maximum_processors()) {
+cpu_count = rtems_configuration_get_maximum_processors();
+  }
+
+  cpu_self = rtems_scheduler_get_processor();
+  halt_mask = 0;
+
+  for (i = 0; i < cpu_count; ++i) {
+if (i != cpu_self && _SMP_Should_start_processor(i)) {
+  halt_mask |= UINT32_C(1) << i;
+}
+  }
+
+  /*
+   * Wait some time for secondary processors to halt.
+   *
+   * The value was chosen to get something in the magnitude of 1ms on a 200MHz
+   * processor.
+   */
+
+  max_wait = 1234567;
+  i = 0;
+
+  while (
+(grlib_load_32(®s->mpstat) & halt_mask) != halt_mask && i < max_wait
+  ) {
+++i;
+  }
+}
+#endif
+
 void bsp_fatal_extension(
   rtems_fatal_source source,
   bool always_set_to_false,
   rtems_fatal_code code
 )
 {
+  rtems_interrupt_level level;
+
+  rtems_interrupt_local_disable(level);
+  (void) level;
+
 #if defined(RTEMS_SMP)
   /*
* On SMP we must wait for all other CPUs not requesting a fatal halt, they
@@ -54,34 +102,18 @@ void bsp_fatal_extension(
   (code == SMP_FATAL_SHUTDOWN_RESPONSE)) {
 leon3_power_down_loop(); /* CPU didn't start shutdown sequence .. */
   } else {
-irqamp *regs = LEON3_IrqCtrl_Regs;
+irqamp *regs;
+
+_SMP_Request_shutdown();
 
+regs = LEON3_IrqCtrl_Regs;
+#if defined(LEON3_IRQAMP_BASE)
+leon3_wait_for_power_down(regs);
+#else
 if (regs != NULL) {
-  /*
-   * Value was chosen to get something in the magnitude of 1ms on a 200MHz
-   * processor.
-   */
-  uint32_t max_wait = 1234567;
-  uint32_t self_cpu = rtems_scheduler_get_processor();
-  uint32_t cpu_count = rtems_scheduler_get_processor_maximum();
-  uint32_t halt_mask = 0;
-  uint32_t i;
-
-  for (i = 0; i < cpu_count; ++i) {
-if ( (i != self_cpu) && _SMP_Should_start_processor( i ) ) {
-  halt_mask |= UINT32_C(1) << i;
-}
-  }
-
-  /* Wait some time for secondary processors to halt */
-  i = 0;
-  while (
-(grlib_load_32(®s->mpstat) & halt_mask) != halt_mask &&
-i < max_wait
-  ) {
-++i;
-  }
+  leon3_wait_for_power_down(regs);
 }
+#endif
   }
 #endif
 
@@ -92,7 +124,10 @@ void bsp_fatal_extension(
 #endif
 
 #if BSP_RESET_BOARD_AT_EXIT
-  /* If user wants to implement custom reset/reboot it can be done here */
-  bsp_reset();
+  /*
+   * Stop the system termination right now.  This skips the dynamically
+   * installed fatal error extensions and the generics shutdown procedure.
+   */
+  _CPU_Fatal_halt( source, code );
 #endif
 }
diff --git a/bsps/sparc/leon3/start/bspsmp.c b/bsps/sparc/leon3/start/bspsmp.c
index 7f8496289a..dc4065450a 100644
--- a/bsps/sparc/leon3/start/bspsmp.c
+++ b/bsps/sparc/leon3/start/bspsmp.c
@@ -39,14 +39,9 @@ static void bsp_inter_processor_interrupt( void *arg )
 
 void bsp_start_on_secondary_processor(Per_CPU_Control *cpu_self)
 {
-  /*
-   * If data cache snooping is not enabled we terminate using BSP_fatal_exit()
-   * instead of bsp_fatal().  This is done since the latter function tries to
-   * acquire a ticket lock, an operation which requires data cache snooping to
-   * be enabled.
-   */
-  if ( !leon3_data_cache_snooping_enabled() )
-BSP_fatal_exit( LEON3_FATAL_INVALID_CACHE_CONFIG_SECONDARY_PROCESSOR );
+  if ( !leon3_data_cache_snooping_enabled() ) {
+bsp_fatal( LEON3_FATAL_INVALID_CACHE_CONFIG_SECONDARY_PROCESSOR );
+  }
 
   _SMP_Start_multitasking_on_secondary_processor(cpu_self);
 }
@@

[PATCH v2 18/32] bsp/leon3: Add LEON3_IRQAMP_PROBE_TIMESTAMP

[Sebastian Huber]

---
 bsps/sparc/leon3/clock/ckinit.c | 198 
 bsps/sparc/leon3/start/cpucounter.c | 103 ++
 spec/build/bsps/sparc/leon3/grp.yml |   2 +
 spec/build/bsps/sparc/leon3/optirqampts.yml |  22 +++
 4 files changed, 207 insertions(+), 118 deletions(-)
 create mode 100644 spec/build/bsps/sparc/leon3/optirqampts.yml

diff --git a/bsps/sparc/leon3/clock/ckinit.c b/bsps/sparc/leon3/clock/ckinit.c
index fc20577634..fb07e0bf01 100644
--- a/bsps/sparc/leon3/clock/ckinit.c
+++ b/bsps/sparc/leon3/clock/ckinit.c
@@ -64,11 +64,29 @@
 /* LEON3 Timer system interrupt number */
 static int clkirq;
 
-static void (*leon3_tc_tick)(void);
-
 static struct timecounter leon3_tc;
 
-#ifdef RTEMS_PROFILING
+static void leon3_tc_tick_default(void)
+{
+#if !defined(RTEMS_SMP)
+  SPARC_Counter *counter;
+  rtems_interrupt_level level;
+
+  counter = &_SPARC_Counter_mutable;
+  rtems_interrupt_local_disable(level);
+
+  LEON3_IrqCtrl_Regs->iclear = counter->pending_mask;
+  counter->accumulated += counter->interval;
+
+  rtems_interrupt_local_enable(level);
+#endif
+
+  rtems_timecounter_tick();
+}
+
+#if defined(RTEMS_PROFILING)
+static void (*leon3_tc_tick)(void) = leon3_tc_tick_default;
+
 #define IRQMP_TIMESTAMP_S1_S2 ((1U << 25) | (1U << 26))
 
 static void leon3_tc_tick_irqmp_timestamp(void)
@@ -84,11 +102,9 @@ static void leon3_tc_tick_irqmp_timestamp(void)
 
   rtems_timecounter_tick();
 }
-#endif
 
 static void leon3_tc_tick_irqmp_timestamp_init(void)
 {
-#ifdef RTEMS_PROFILING
   /*
* Ignore the first clock interrupt, since it contains the sequential system
* initialization time.  Do the timestamp initialization on the fly.
@@ -113,32 +129,18 @@ static void leon3_tc_tick_irqmp_timestamp_init(void)
   if (done) {
 leon3_tc_tick = leon3_tc_tick_irqmp_timestamp;
   }
-#endif
-
-  rtems_timecounter_tick();
-}
-
-static void leon3_tc_tick_default(void)
-{
-#ifndef RTEMS_SMP
-  SPARC_Counter *counter;
-  rtems_interrupt_level level;
-
-  counter = &_SPARC_Counter_mutable;
-  rtems_interrupt_local_disable(level);
-
-  LEON3_IrqCtrl_Regs->iclear = counter->pending_mask;
-  counter->accumulated += counter->interval;
-
-  rtems_interrupt_local_enable(level);
-#endif
 
   rtems_timecounter_tick();
 }
+#endif /* RTEMS_PROFILING */
 
 static void leon3_tc_do_tick(void)
 {
+#if defined(RTEMS_PROFILING)
   (*leon3_tc_tick)();
+#else
+  leon3_tc_tick_default();
+#endif
 }
 
 #define Adjust_clkirq_for_node() do { clkirq += LEON3_CLOCK_INDEX; } while(0)
@@ -181,9 +183,87 @@ static void 
bsp_clock_handler_install(rtems_interrupt_handler isr)
 #define Clock_driver_support_set_interrupt_affinity(online_processors) \
   bsp_interrupt_set_affinity(clkirq, online_processors)
 
+static void leon3_clock_use_up_counter(struct timecounter *tc)
+{
+  tc->tc_get_timecount = _SPARC_Get_timecount_asr23;
+  tc->tc_frequency = leon3_up_counter_frequency();
+
+#if defined(RTEMS_PROFILING)
+  if (irqamp_get_timestamp_registers(LEON3_IrqCtrl_Regs) == NULL) {
+bsp_fatal(LEON3_FATAL_CLOCK_NO_IRQMP_TIMESTAMP_SUPPORT);
+  }
+
+  leon3_tc_tick = leon3_tc_tick_irqmp_timestamp_init;
+#endif
+
+  rtems_timecounter_install(tc);
+}
+
+#if defined(LEON3_IRQAMP_PROBE_TIMESTAMP)
+static void leon3_clock_use_irqamp_timestamp(
+  struct timecounter *tc,
+  irqamp_timestamp *irqmp_ts
+)
+{
+  tc->tc_get_timecount = _SPARC_Get_timecount_up;
+#if defined(LEON3_PLB_FREQUENCY_DEFINED_BY_GPTIMER)
+  tc->tc_frequency = leon3_processor_local_bus_frequency();
+#else
+  tc->tc_frequency = ambapp_freq_get(ambapp_plb(), LEON3_Timer_Adev);
+#endif
+
+#if defined(RTEMS_PROFILING)
+  leon3_tc_tick = leon3_tc_tick_irqmp_timestamp_init;
+#endif
+
+  /*
+   * At least one TSISEL field must be non-zero to enable the timestamp
+   * counter.  Use an arbitrary interrupt source.
+   */
+  grlib_store_32(&irqmp_ts->itstmpc, IRQAMP_ITSTMPC_TSISEL(1));
+
+  rtems_timecounter_install(tc);
+}
+#endif
+
+static void leon3_clock_use_gptimer(
+  struct timecounter *tc,
+  gptimer_timer *timer
+)
+{
+#ifdef RTEMS_SMP
+  /*
+   * The GR712RC for example has no timestamp unit in the interrupt
+   * controller.  At least on SMP configurations we must use a second timer
+   * in free running mode for the timecounter.  The timer is initialized by
+   * leon3_counter_initialize().
+   */
+  tc->tc_get_timecount = _SPARC_Get_timecount_down;
+#else
+  SPARC_Counter *counter;
+
+  counter = &_SPARC_Counter_mutable;
+  counter->read_isr_disabled = _SPARC_Counter_read_clock_isr_disabled;
+  counter->read = _SPARC_Counter_read_clock;
+  counter->counter_register = &timer->tcntval;
+  counter->pending_register = &LEON3_IrqCtrl_Regs->ipend;
+  counter->pending_mask = UINT32_C(1) << clkirq;
+  counter->accumulated = rtems_configuration_get_microseconds_per_tick();
+  counter->interval = rtems_configuration_get_microseconds_per_tick();
+
+  tc->tc_get_timecount = _SPARC_Get_timecount_clock;
+#endif
+
+  tc->tc_frequency = LEON3_GPTIMER_0_FREQUENCY_SET_BY_

[PATCH v2 26/32] bsp/leon3: Enable up-counter conditionally

[Sebastian Huber]

---
 bsps/sparc/leon3/clock/ckinit.c | 5 +++--
 bsps/sparc/leon3/start/cpucounter.c | 5 +++--
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/bsps/sparc/leon3/clock/ckinit.c b/bsps/sparc/leon3/clock/ckinit.c
index 93826416c0..4767d57347 100644
--- a/bsps/sparc/leon3/clock/ckinit.c
+++ b/bsps/sparc/leon3/clock/ckinit.c
@@ -287,12 +287,13 @@ static void leon3_clock_initialize(void)
   tc->tc_counter_mask = 0x;
   tc->tc_quality = RTEMS_TIMECOUNTER_QUALITY_CLOCK_DRIVER;
 
-  leon3_up_counter_enable();
-
 #if defined(LEON3_HAS_ASR_22_23_UP_COUNTER)
+  leon3_up_counter_enable();
   leon3_clock_use_up_counter(tc);
 #else /* LEON3_HAS_ASR_22_23_UP_COUNTER */
 #if defined(LEON3_PROBE_ASR_22_23_UP_COUNTER)
+  leon3_up_counter_enable();
+
   if (leon3_up_counter_is_available()) {
 /* Use the LEON4 up-counter if available */
 leon3_clock_use_up_counter(tc);
diff --git a/bsps/sparc/leon3/start/cpucounter.c 
b/bsps/sparc/leon3/start/cpucounter.c
index 05ac62ace8..6af91f75e5 100644
--- a/bsps/sparc/leon3/start/cpucounter.c
+++ b/bsps/sparc/leon3/start/cpucounter.c
@@ -106,12 +106,13 @@ static void leon3_counter_initialize(void)
 
   counter = &_SPARC_Counter_mutable;
 
-  leon3_up_counter_enable();
-
 #if defined(LEON3_HAS_ASR_22_23_UP_COUNTER)
+  leon3_up_counter_enable();
   leon3_counter_use_up_counter(counter);
 #else /* LEON3_HAS_ASR_22_23_UP_COUNTER */
 #if defined(LEON3_PROBE_ASR_22_23_UP_COUNTER)
+  leon3_up_counter_enable();
+
   if (leon3_up_counter_is_available()) {
 /* Use the LEON4 up-counter if available */
 leon3_counter_use_up_counter(counter);
-- 
2.35.3

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[PATCH v2 28/32] bsp/leon3: Fix group memberships

[Sebastian Huber]

Update #3706.
---
 bsps/sparc/leon3/gnatsupp/gnatsupp.c | 2 +-
 bsps/sparc/leon3/include/bsp/irq.h   | 2 +-
 bsps/sparc/leon3/include/leon.h  | 2 +-
 bsps/sparc/leon3/include/tm27.h  | 2 +-
 bsps/sparc/leon3/start/bspclean.c| 2 +-
 bsps/sparc/leon3/start/bspsmp.c  | 2 +-
 bsps/sparc/leon3/start/setvec.c  | 2 +-
 7 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/bsps/sparc/leon3/gnatsupp/gnatsupp.c 
b/bsps/sparc/leon3/gnatsupp/gnatsupp.c
index cc5b1027a7..79e68eab7c 100644
--- a/bsps/sparc/leon3/gnatsupp/gnatsupp.c
+++ b/bsps/sparc/leon3/gnatsupp/gnatsupp.c
@@ -1,7 +1,7 @@
 /**
  * @file
  *
- * @ingroup sparc_leon3
+ * @ingroup RTEMSBSPsSPARCLEON3
  *
  * @brief Support for gnat/rtems interrupts and exception handling
  */
diff --git a/bsps/sparc/leon3/include/bsp/irq.h 
b/bsps/sparc/leon3/include/bsp/irq.h
index 38ea1de1f8..2e500622bf 100644
--- a/bsps/sparc/leon3/include/bsp/irq.h
+++ b/bsps/sparc/leon3/include/bsp/irq.h
@@ -2,7 +2,7 @@
 
 /**
  * @file
- * @ingroup sparc_leon3
+ * @ingroup RTEMSBSPsSPARCLEON3
  * @brief LEON3 generic shared IRQ setup
  *
  * Based on libbsp/shared/include/irq.h.
diff --git a/bsps/sparc/leon3/include/leon.h b/bsps/sparc/leon3/include/leon.h
index 9985ae3280..dad2c48c6e 100644
--- a/bsps/sparc/leon3/include/leon.h
+++ b/bsps/sparc/leon3/include/leon.h
@@ -2,7 +2,7 @@
 
 /**
  * @file
- * @ingroup sparc_leon3
+ * @ingroup RTEMSBSPsSPARCLEON3
  * @brief LEON3 BSP data types and macros
  */
 
diff --git a/bsps/sparc/leon3/include/tm27.h b/bsps/sparc/leon3/include/tm27.h
index f078b12dd1..df30b738b2 100644
--- a/bsps/sparc/leon3/include/tm27.h
+++ b/bsps/sparc/leon3/include/tm27.h
@@ -2,7 +2,7 @@
 
 /**
  * @file
- * @ingroup sparc_leon3
+ * @ingroup RTEMSBSPsSPARCLEON3
  * @brief Implementations for interrupt mechanisms for Time Test 27
  */
 
diff --git a/bsps/sparc/leon3/start/bspclean.c 
b/bsps/sparc/leon3/start/bspclean.c
index 4c9b385b43..d52eb65ecf 100644
--- a/bsps/sparc/leon3/start/bspclean.c
+++ b/bsps/sparc/leon3/start/bspclean.c
@@ -2,7 +2,7 @@
 
 /**
  * @file
- * @ingroup sparc_leon3
+ * @ingroup RTEMSBSPsSPARCLEON3
  * @brief LEON3 BSP fatal extension
  *
  *  Copyright (c) 2014 embedded brains GmbH & Co. KG
diff --git a/bsps/sparc/leon3/start/bspsmp.c b/bsps/sparc/leon3/start/bspsmp.c
index dc4065450a..8c7c88da63 100644
--- a/bsps/sparc/leon3/start/bspsmp.c
+++ b/bsps/sparc/leon3/start/bspsmp.c
@@ -1,6 +1,6 @@
 /**
  * @file
- * @ingroup sparc_leon3
+ * @ingroup RTEMSBSPsSPARCLEON3
  * @brief LEON3 SMP BSP Support
  */
 
diff --git a/bsps/sparc/leon3/start/setvec.c b/bsps/sparc/leon3/start/setvec.c
index 31461893ff..b60796f3c4 100644
--- a/bsps/sparc/leon3/start/setvec.c
+++ b/bsps/sparc/leon3/start/setvec.c
@@ -1,6 +1,6 @@
 /**  
  * @file
- * @ingroup sparc_leon3
+ * @ingroup RTEMSBSPsSPARCLEON3
  * @brief Install an interrupt vector on SPARC
  */
 
-- 
2.35.3

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[PATCH v2 24/32] bsp/leon3: Add LEON3_IRQAMP_EXTENDED_INTERRUPT

[Sebastian Huber]

---
 bsps/sparc/leon3/include/bsp/irqimpl.h|  4 
 bsps/sparc/leon3/start/eirq.c |  8 
 spec/build/bsps/sparc/leon3/grp.yml   |  2 ++
 .../bsps/sparc/leon3/optirqampextirq.yml  | 19 +++
 4 files changed, 33 insertions(+)
 create mode 100644 spec/build/bsps/sparc/leon3/optirqampextirq.yml

diff --git a/bsps/sparc/leon3/include/bsp/irqimpl.h 
b/bsps/sparc/leon3/include/bsp/irqimpl.h
index ee5beaf72c..f5b0c205e0 100644
--- a/bsps/sparc/leon3/include/bsp/irqimpl.h
+++ b/bsps/sparc/leon3/include/bsp/irqimpl.h
@@ -103,7 +103,11 @@ extern struct ambapp_dev *LEON3_IrqCtrl_Adev;
  *
  * This object should be read-only after initialization.
  */
+#if defined(LEON3_IRQAMP_EXTENDED_INTERRUPT)
+#define LEON3_IrqCtrl_EIrq LEON3_IRQAMP_EXTENDED_INTERRUPT
+#else
 extern uint32_t LEON3_IrqCtrl_EIrq;
+#endif
 
 /**
  * @brief Initializes the interrupt controller for the boot processor.
diff --git a/bsps/sparc/leon3/start/eirq.c b/bsps/sparc/leon3/start/eirq.c
index 5576c37c22..05e6789f69 100644
--- a/bsps/sparc/leon3/start/eirq.c
+++ b/bsps/sparc/leon3/start/eirq.c
@@ -35,8 +35,10 @@
 #include 
 #include 
 
+#if !defined(LEON3_IRQAMP_EXTENDED_INTERRUPT)
 /* GRLIB extended IRQ controller IRQ number */
 uint32_t LEON3_IrqCtrl_EIrq;
+#endif
 
 rtems_interrupt_lock LEON3_IrqCtrl_Lock =
   RTEMS_INTERRUPT_LOCK_INITIALIZER("LEON3 IrqCtrl");
@@ -47,7 +49,9 @@ void leon3_ext_irq_init(irqamp *regs)
   grlib_store_32(®s->pimask[LEON3_Cpu_Index], 0);
   grlib_store_32(®s->piforce[LEON3_Cpu_Index], 0);
   grlib_store_32(®s->iclear, 0x);
+#if !defined(LEON3_IRQAMP_EXTENDED_INTERRUPT)
   LEON3_IrqCtrl_EIrq = IRQAMP_MPSTAT_EIRQ_GET(grlib_load_32(®s->mpstat));
+#endif
 }
 
 bool bsp_interrupt_is_valid_vector(rtems_vector_number vector)
@@ -56,11 +60,15 @@ bool bsp_interrupt_is_valid_vector(rtems_vector_number 
vector)
 return false;
   }
 
+#if defined(LEON3_IRQAMP_EXTENDED_INTERRUPT)
+  return vector <= BSP_INTERRUPT_VECTOR_MAX_EXT;
+#else
   if (LEON3_IrqCtrl_EIrq > 0) {
 return vector <= BSP_INTERRUPT_VECTOR_MAX_EXT;
   }
 
   return vector <= BSP_INTERRUPT_VECTOR_MAX_STD;
+#endif
 }
 
 #if defined(RTEMS_SMP)
diff --git a/spec/build/bsps/sparc/leon3/grp.yml 
b/spec/build/bsps/sparc/leon3/grp.yml
index 94d11bed55..126ba0df65 100644
--- a/spec/build/bsps/sparc/leon3/grp.yml
+++ b/spec/build/bsps/sparc/leon3/grp.yml
@@ -42,6 +42,8 @@ links:
   uid: optgptimerbase
 - role: build-dependency
   uid: optirqampbase
+- role: build-dependency
+  uid: optirqampextirq
 - role: build-dependency
   uid: optirqampts
 - role: build-dependency
diff --git a/spec/build/bsps/sparc/leon3/optirqampextirq.yml 
b/spec/build/bsps/sparc/leon3/optirqampextirq.yml
new file mode 100644
index 00..61e077de5d
--- /dev/null
+++ b/spec/build/bsps/sparc/leon3/optirqampextirq.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH & Co. KG
+actions:
+- get-integer: null
+- format-and-define: null
+build-type: option
+default:
+- enabled-by: sparc/gr712rc
+  value: 12
+- enabled-by: sparc/gr740
+  value: 10
+enabled-by: true
+format: '{}'
+links: []
+name: LEON3_IRQAMP_EXTENDED_INTERRUPT
+description: |
+  This option specifies the interrupt line of the IRQ(A)MP extended interrupt.
+type: build
-- 
2.35.3

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[PATCH v2 25/32] bsp/leon3: Use LEON3_GPTIMER_BASE

[Sebastian Huber]

---
 bsps/sparc/leon3/start/cpucounter.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/bsps/sparc/leon3/start/cpucounter.c 
b/bsps/sparc/leon3/start/cpucounter.c
index 46e0b304e5..05ac62ace8 100644
--- a/bsps/sparc/leon3/start/cpucounter.c
+++ b/bsps/sparc/leon3/start/cpucounter.c
@@ -131,10 +131,14 @@ static void leon3_counter_initialize(void)
 
   gpt = LEON3_Timer_Regs;
 
+#if defined(LEON3_GPTIMER_BASE)
+  leon3_counter_use_gptimer(counter, gpt);
+#else
   if (gpt != NULL) {
 /* Fall back to the first GPTIMER if available */
 leon3_counter_use_gptimer(counter, gpt);
   }
+#endif
 #endif /* LEON3_HAS_ASR_22_23_UP_COUNTER */
 }
 
-- 
2.35.3

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[PATCH v2 20/32] bsp/leon3: Add LEON3_L2CACHE_BASE

[Sebastian Huber]

---
 bsps/sparc/leon3/start/cache.c| 36 ++-
 spec/build/bsps/sparc/leon3/grp.yml   |  2 ++
 .../build/bsps/sparc/leon3/optl2cachebase.yml | 19 ++
 3 files changed, 49 insertions(+), 8 deletions(-)
 create mode 100644 spec/build/bsps/sparc/leon3/optl2cachebase.yml

diff --git a/bsps/sparc/leon3/start/cache.c b/bsps/sparc/leon3/start/cache.c
index ed6fb5733d..5049b7f81c 100644
--- a/bsps/sparc/leon3/start/cache.c
+++ b/bsps/sparc/leon3/start/cache.c
@@ -11,7 +11,13 @@
 
 #include 
 
+#if !defined(LEON3_L2CACHE_BASE)
 #include 
+#endif
+
+#if !defined(LEON3_L2CACHE_BASE) || LEON3_L2CACHE_BASE != 0
+#define LEON3_MAYBE_HAS_L2CACHE
+#endif
 
 #define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS
 
@@ -23,6 +29,7 @@
 
 #define CPU_DATA_CACHE_ALIGNMENT 64
 
+#if !defined(LEON3_L2CACHE_BASE)
 static inline l2cache *get_l2c_regs(void)
 {
   struct ambapp_dev *adev;
@@ -42,7 +49,17 @@ static inline l2cache *get_l2c_regs(void)
 
   return (l2cache *) DEV_TO_AHB(adev)->start[1];
 }
+#endif
+
+static inline size_t get_l1_size(uint32_t l1_cfg)
+{
+  uint32_t ways = ((l1_cfg >> 24) & 0x7) + 1;
+  uint32_t wsize = UINT32_C(1) << (((l1_cfg >> 20) & 0xf) + 10);
+
+  return ways * wsize;
+}
 
+#if defined(LEON3_MAYBE_HAS_L2CACHE)
 static inline size_t get_l2_size(void)
 {
   l2cache *regs;
@@ -50,11 +67,15 @@ static inline size_t get_l2_size(void)
   unsigned ways;
   unsigned set_size;
 
+#if defined(LEON3_L2CACHE_BASE)
+  regs = (l2cache *) LEON3_L2CACHE_BASE;
+#else
   regs = get_l2c_regs();
 
   if (regs == NULL) {
 return 0;
   }
+#endif
 
   status = grlib_load_32(®s->l2cs);
   ways = L2CACHE_L2CS_WAY_GET(status) + 1;
@@ -63,18 +84,11 @@ static inline size_t get_l2_size(void)
   return ways * set_size;
 }
 
-static inline size_t get_l1_size(uint32_t l1_cfg)
-{
-  uint32_t ways = ((l1_cfg >> 24) & 0x7) + 1;
-  uint32_t wsize = UINT32_C(1) << (((l1_cfg >> 20) & 0xf) + 10);
-
-  return ways * wsize;
-}
-
 static inline size_t get_max_size(size_t a, size_t b)
 {
   return a < b ? b : a;
 }
+#endif
 
 static inline size_t get_cache_size(uint32_t level, uint32_t l1_cfg)
 {
@@ -82,14 +96,20 @@ static inline size_t get_cache_size(uint32_t level, 
uint32_t l1_cfg)
 
   switch (level) {
 case 0:
+#if defined(LEON3_MAYBE_HAS_L2CACHE)
   size = get_max_size(get_l1_size(l1_cfg), get_l2_size());
+#else
+  size = get_l1_size(l1_cfg);
+#endif
   break;
 case 1:
   size = get_l1_size(l1_cfg);
   break;
+#if defined(LEON3_MAYBE_HAS_L2CACHE)
 case 2:
   size = get_l2_size();
   break;
+#endif
 default:
   size = 0;
   break;
diff --git a/spec/build/bsps/sparc/leon3/grp.yml 
b/spec/build/bsps/sparc/leon3/grp.yml
index d044a6ca60..6d7a1b75c3 100644
--- a/spec/build/bsps/sparc/leon3/grp.yml
+++ b/spec/build/bsps/sparc/leon3/grp.yml
@@ -44,6 +44,8 @@ links:
   uid: optirqampts
 - role: build-dependency
   uid: optconirq
+- role: build-dependency
+  uid: optl2cachebase
 - role: build-dependency
   uid: optleon3smp
 - role: build-dependency
diff --git a/spec/build/bsps/sparc/leon3/optl2cachebase.yml 
b/spec/build/bsps/sparc/leon3/optl2cachebase.yml
new file mode 100644
index 00..759198f827
--- /dev/null
+++ b/spec/build/bsps/sparc/leon3/optl2cachebase.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH & Co. KG
+actions:
+- get-integer: null
+- format-and-define: null
+build-type: option
+default:
+- enabled-by: sparc/gr712rc
+  value: 0x
+- enabled-by: sparc/gr740
+  value: 0xf000
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: LEON3_L2CACHE_BASE
+description: |
+  This option defines the base address of the L2CACHE register block.
+type: build
-- 
2.35.3

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[PATCH v2 19/32] bsp/leon3: Add LEON3_HAS_ASR_22_23_UP_COUNTER

[Sebastian Huber]

---
 bsps/sparc/leon3/clock/ckinit.c |  6 ++
 bsps/sparc/leon3/include/bsp/leon3.h|  2 ++
 bsps/sparc/leon3/start/cpucounter.c |  8 
 spec/build/bsps/sparc/leon3/grp.yml |  2 ++
 spec/build/bsps/sparc/leon3/optasrupcnt.yml | 17 +
 5 files changed, 35 insertions(+)
 create mode 100644 spec/build/bsps/sparc/leon3/optasrupcnt.yml

diff --git a/bsps/sparc/leon3/clock/ckinit.c b/bsps/sparc/leon3/clock/ckinit.c
index fb07e0bf01..0c8a0a8754 100644
--- a/bsps/sparc/leon3/clock/ckinit.c
+++ b/bsps/sparc/leon3/clock/ckinit.c
@@ -226,6 +226,7 @@ static void leon3_clock_use_irqamp_timestamp(
 }
 #endif
 
+#if !defined(LEON3_HAS_ASR_22_23_UP_COUNTER)
 static void leon3_clock_use_gptimer(
   struct timecounter *tc,
   gptimer_timer *timer
@@ -258,6 +259,7 @@ static void leon3_clock_use_gptimer(
 
   rtems_timecounter_install(tc);
 }
+#endif
 
 static void leon3_clock_initialize(void)
 {
@@ -284,6 +286,9 @@ static void leon3_clock_initialize(void)
 
   leon3_up_counter_enable();
 
+#if defined(LEON3_HAS_ASR_22_23_UP_COUNTER)
+  leon3_clock_use_up_counter(tc);
+#else /* LEON3_HAS_ASR_22_23_UP_COUNTER */
   if (leon3_up_counter_is_available()) {
 /* Use the LEON4 up-counter if available */
 leon3_clock_use_up_counter(tc);
@@ -301,6 +306,7 @@ static void leon3_clock_initialize(void)
 #endif
 
   leon3_clock_use_gptimer(tc, timer);
+#endif /* LEON3_HAS_ASR_22_23_UP_COUNTER */
 }
 
 #define Clock_driver_support_initialize_hardware() \
diff --git a/bsps/sparc/leon3/include/bsp/leon3.h 
b/bsps/sparc/leon3/include/bsp/leon3.h
index 18db7b8aea..f9717c364c 100644
--- a/bsps/sparc/leon3/include/bsp/leon3.h
+++ b/bsps/sparc/leon3/include/bsp/leon3.h
@@ -263,6 +263,7 @@ static inline void leon3_up_counter_enable( void )
   );
 }
 
+#if !defined(LEON3_HAS_ASR_22_23_UP_COUNTER)
 /**
  * @brief Checks if the LEON up-counter is available.
  *
@@ -274,6 +275,7 @@ static inline bool leon3_up_counter_is_available( void )
 {
   return leon3_up_counter_low() != leon3_up_counter_low();
 }
+#endif
 
 /**
  * @brief Gets the LEON up-counter frequency in Hz.
diff --git a/bsps/sparc/leon3/start/cpucounter.c 
b/bsps/sparc/leon3/start/cpucounter.c
index 18fc8099f2..d09dbe651b 100644
--- a/bsps/sparc/leon3/start/cpucounter.c
+++ b/bsps/sparc/leon3/start/cpucounter.c
@@ -68,6 +68,7 @@ static void leon3_counter_use_irqamp_timestamp(
 }
 #endif
 
+#if !defined(LEON3_HAS_ASR_22_23_UP_COUNTER)
 static void leon3_counter_use_gptimer(SPARC_Counter *counter, gptimer *gpt)
 {
   gptimer_timer *timer;
@@ -88,19 +89,25 @@ static void leon3_counter_use_gptimer(SPARC_Counter 
*counter, gptimer *gpt)
 (grlib_load_32(&gpt->sreload) + 1);
 #endif
 }
+#endif
 
 static void leon3_counter_initialize(void)
 {
 #if defined(LEON3_IRQAMP_PROBE_TIMESTAMP)
   irqamp_timestamp *irqmp_ts;
 #endif
+#if !defined(LEON3_HAS_ASR_22_23_UP_COUNTER)
   gptimer *gpt;
+#endif
   SPARC_Counter *counter;
 
   counter = &_SPARC_Counter_mutable;
 
   leon3_up_counter_enable();
 
+#if defined(LEON3_HAS_ASR_22_23_UP_COUNTER)
+  leon3_counter_use_up_counter(counter);
+#else /* LEON3_HAS_ASR_22_23_UP_COUNTER */
   if (leon3_up_counter_is_available()) {
 /* Use the LEON4 up-counter if available */
 leon3_counter_use_up_counter(counter);
@@ -123,6 +130,7 @@ static void leon3_counter_initialize(void)
 /* Fall back to the first GPTIMER if available */
 leon3_counter_use_gptimer(counter, gpt);
   }
+#endif /* LEON3_HAS_ASR_22_23_UP_COUNTER */
 }
 
 RTEMS_SYSINIT_ITEM(
diff --git a/spec/build/bsps/sparc/leon3/grp.yml 
b/spec/build/bsps/sparc/leon3/grp.yml
index 9d9f7d2750..d044a6ca60 100644
--- a/spec/build/bsps/sparc/leon3/grp.yml
+++ b/spec/build/bsps/sparc/leon3/grp.yml
@@ -34,6 +34,8 @@ links:
   uid: objsmp
 - role: build-dependency
   uid: optapbuartbase
+- role: build-dependency
+  uid: optasrupcnt
 - role: build-dependency
   uid: optgptimerbase
 - role: build-dependency
diff --git a/spec/build/bsps/sparc/leon3/optasrupcnt.yml 
b/spec/build/bsps/sparc/leon3/optasrupcnt.yml
new file mode 100644
index 00..77e923f205
--- /dev/null
+++ b/spec/build/bsps/sparc/leon3/optasrupcnt.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH & Co. KG
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+default:
+- enabled-by: sparc/gr740
+  value: true
+enabled-by: true
+links: []
+name: LEON3_HAS_ASR_22_23_UP_COUNTER
+description: |
+  If this option is set to true, then the processor has the %asr22 and %asr23
+  up-counter.
+type: build
-- 
2.35.3

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[PATCH v2 21/32] bsp/leon3: Move leon3_power_down_loop()

[Sebastian Huber]

---
 bsps/sparc/leon3/include/bsp/leon3.h| 6 ++
 bsps/sparc/leon3/include/leon.h | 2 --
 bsps/sparc/leon3/start/bsp_fatal_halt.c | 2 +-
 bsps/sparc/leon3/start/bspclean.c   | 3 +--
 4 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/bsps/sparc/leon3/include/bsp/leon3.h 
b/bsps/sparc/leon3/include/bsp/leon3.h
index f9717c364c..1394dd1c1c 100644
--- a/bsps/sparc/leon3/include/bsp/leon3.h
+++ b/bsps/sparc/leon3/include/bsp/leon3.h
@@ -56,6 +56,12 @@ extern "C" {
  * @{
  */
 
+/**
+ * @brief Sets %asr19 to zero to enter the power-down mode of the processor in
+ *   an infinite loop.
+ */
+RTEMS_NO_RETURN void leon3_power_down_loop( void );
+
 /**
  * @brief This constant represents the flush instruction cache flag of the LEON
  *   cache control register.
diff --git a/bsps/sparc/leon3/include/leon.h b/bsps/sparc/leon3/include/leon.h
index 7aa26b43b9..9985ae3280 100644
--- a/bsps/sparc/leon3/include/leon.h
+++ b/bsps/sparc/leon3/include/leon.h
@@ -355,8 +355,6 @@ extern int leon3_timer_core_index;
  */
 extern unsigned int leon3_timer_prescaler;
 
-RTEMS_NO_RETURN void leon3_power_down_loop(void);
-
 #endif /* !ASM */
 
 #ifdef __cplusplus
diff --git a/bsps/sparc/leon3/start/bsp_fatal_halt.c 
b/bsps/sparc/leon3/start/bsp_fatal_halt.c
index 7462ab944c..ce628065b7 100644
--- a/bsps/sparc/leon3/start/bsp_fatal_halt.c
+++ b/bsps/sparc/leon3/start/bsp_fatal_halt.c
@@ -31,7 +31,7 @@
  */
 
 #include 
-#include 
+#include 
 #include 
 
 void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error )
diff --git a/bsps/sparc/leon3/start/bspclean.c 
b/bsps/sparc/leon3/start/bspclean.c
index 7414a61b83..acb2d6093c 100644
--- a/bsps/sparc/leon3/start/bspclean.c
+++ b/bsps/sparc/leon3/start/bspclean.c
@@ -34,10 +34,9 @@
 
 #include 
 #include 
+#include 
 #include 
 
-#include 
-
 void bsp_fatal_extension(
   rtems_fatal_source source,
   bool always_set_to_false,
-- 
2.35.3

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[PATCH v2 17/32] bsp/leon3: Add LEON3_IRQAMP_BASE

[Sebastian Huber]

---
 bsps/sparc/leon3/include/bsp/irqimpl.h|  6 ++
 bsps/sparc/leon3/start/amba.c |  9 -
 spec/build/bsps/sparc/leon3/grp.yml   |  2 ++
 spec/build/bsps/sparc/leon3/optirqampbase.yml | 19 +++
 4 files changed, 35 insertions(+), 1 deletion(-)
 create mode 100644 spec/build/bsps/sparc/leon3/optirqampbase.yml

diff --git a/bsps/sparc/leon3/include/bsp/irqimpl.h 
b/bsps/sparc/leon3/include/bsp/irqimpl.h
index c957c7fbbc..ee5beaf72c 100644
--- a/bsps/sparc/leon3/include/bsp/irqimpl.h
+++ b/bsps/sparc/leon3/include/bsp/irqimpl.h
@@ -41,6 +41,8 @@
 #include 
 #include 
 
+#include 
+
 struct ambapp_dev;
 
 #ifdef __cplusplus
@@ -84,7 +86,11 @@ extern rtems_interrupt_lock LEON3_IrqCtrl_Lock;
 /**
  * @brief This pointer provides the IRQ(A)MP register block address.
  */
+#if defined(LEON3_IRQAMP_BASE)
+#define LEON3_IrqCtrl_Regs ((irqamp *) LEON3_IRQAMP_BASE)
+#else
 extern irqamp *LEON3_IrqCtrl_Regs;
+#endif
 
 /**
  * @brief This pointer provides the IRQ(A)MP device information block.
diff --git a/bsps/sparc/leon3/start/amba.c b/bsps/sparc/leon3/start/amba.c
index 36b988e90b..72f1f5e63b 100644
--- a/bsps/sparc/leon3/start/amba.c
+++ b/bsps/sparc/leon3/start/amba.c
@@ -115,9 +115,10 @@ RTEMS_SYSINIT_ITEM(
 );
 #endif
 
-/* Pointers to Interrupt Controller configuration registers */
+#if !defined(LEON3_IRQAMP_BASE)
 irqamp *LEON3_IrqCtrl_Regs;
 struct ambapp_dev *LEON3_IrqCtrl_Adev;
+#endif
 
 #if !defined(LEON3_GPTIMER_BASE)
 gptimer *LEON3_Timer_Regs;
@@ -140,7 +141,12 @@ static void amba_initialize(void)
   struct ambapp_bus *plb;
 
   plb = ambapp_plb();
+#if defined(LEON3_IRQAMP_BASE) && defined(LEON3_GPTIMER_BASE)
+  (void) plb;
+  (void) adev;
+#endif
 
+#if !defined(LEON3_IRQAMP_BASE)
   /* Find LEON3 Interrupt controller */
   adev = (void *)ambapp_for_each(plb, (OPTIONS_ALL|OPTIONS_APB_SLVS),
  VENDOR_GAISLER, GAISLER_IRQMP,
@@ -167,6 +173,7 @@ static void amba_initialize(void)
 icsel = (icsel >> ((7 - (LEON3_Cpu_Index & 0x7)) * 4)) & 0xf;
 LEON3_IrqCtrl_Regs += icsel;
   }
+#endif
 
 #if !defined(LEON3_GPTIMER_BASE)
   /* find GP Timer */
diff --git a/spec/build/bsps/sparc/leon3/grp.yml 
b/spec/build/bsps/sparc/leon3/grp.yml
index cce4c1dc06..7bb09d268f 100644
--- a/spec/build/bsps/sparc/leon3/grp.yml
+++ b/spec/build/bsps/sparc/leon3/grp.yml
@@ -36,6 +36,8 @@ links:
   uid: optapbuartbase
 - role: build-dependency
   uid: optgptimerbase
+- role: build-dependency
+  uid: optirqampbase
 - role: build-dependency
   uid: optconirq
 - role: build-dependency
diff --git a/spec/build/bsps/sparc/leon3/optirqampbase.yml 
b/spec/build/bsps/sparc/leon3/optirqampbase.yml
new file mode 100644
index 00..aad978406b
--- /dev/null
+++ b/spec/build/bsps/sparc/leon3/optirqampbase.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH & Co. KG
+actions:
+- get-integer: null
+- format-and-define: null
+build-type: option
+default:
+- enabled-by: sparc/gr712rc
+  value: 0x8200
+- enabled-by: sparc/gr740
+  value: 0xff904000
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: LEON3_IRQAMP_BASE
+description: |
+  This option defines the base address of the IRQ(A)MP register block.
+type: build
-- 
2.35.3

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[PATCH v2 23/32] bsp/leon3: Add LEON3_PROBE_ASR_22_23_UP_COUNTER

[Sebastian Huber]

---
 bsps/sparc/leon3/clock/ckinit.c   |  5 +
 bsps/sparc/leon3/start/cpucounter.c   |  5 +
 spec/build/bsps/sparc/leon3/grp.yml   |  2 ++
 .../bsps/sparc/leon3/optasrupcntprobe.yml | 19 +++
 4 files changed, 31 insertions(+)
 create mode 100644 spec/build/bsps/sparc/leon3/optasrupcntprobe.yml

diff --git a/bsps/sparc/leon3/clock/ckinit.c b/bsps/sparc/leon3/clock/ckinit.c
index 0c8a0a8754..93826416c0 100644
--- a/bsps/sparc/leon3/clock/ckinit.c
+++ b/bsps/sparc/leon3/clock/ckinit.c
@@ -183,6 +183,8 @@ static void 
bsp_clock_handler_install(rtems_interrupt_handler isr)
 #define Clock_driver_support_set_interrupt_affinity(online_processors) \
   bsp_interrupt_set_affinity(clkirq, online_processors)
 
+#if defined(LEON3_HAS_ASR_22_23_UP_COUNTER) || \
+   defined(LEON3_PROBE_ASR_22_23_UP_COUNTER)
 static void leon3_clock_use_up_counter(struct timecounter *tc)
 {
   tc->tc_get_timecount = _SPARC_Get_timecount_asr23;
@@ -198,6 +200,7 @@ static void leon3_clock_use_up_counter(struct timecounter 
*tc)
 
   rtems_timecounter_install(tc);
 }
+#endif
 
 #if defined(LEON3_IRQAMP_PROBE_TIMESTAMP)
 static void leon3_clock_use_irqamp_timestamp(
@@ -289,11 +292,13 @@ static void leon3_clock_initialize(void)
 #if defined(LEON3_HAS_ASR_22_23_UP_COUNTER)
   leon3_clock_use_up_counter(tc);
 #else /* LEON3_HAS_ASR_22_23_UP_COUNTER */
+#if defined(LEON3_PROBE_ASR_22_23_UP_COUNTER)
   if (leon3_up_counter_is_available()) {
 /* Use the LEON4 up-counter if available */
 leon3_clock_use_up_counter(tc);
 return;
   }
+#endif
 
 #if defined(LEON3_IRQAMP_PROBE_TIMESTAMP)
   irqmp_ts = irqamp_get_timestamp_registers(LEON3_IrqCtrl_Regs);
diff --git a/bsps/sparc/leon3/start/cpucounter.c 
b/bsps/sparc/leon3/start/cpucounter.c
index d09dbe651b..46e0b304e5 100644
--- a/bsps/sparc/leon3/start/cpucounter.c
+++ b/bsps/sparc/leon3/start/cpucounter.c
@@ -39,6 +39,8 @@ uint32_t _CPU_Counter_frequency(void)
   return leon3_counter_frequency;
 }
 
+#if defined(LEON3_HAS_ASR_22_23_UP_COUNTER) || \
+   defined(LEON3_PROBE_ASR_22_23_UP_COUNTER)
 static void leon3_counter_use_up_counter(SPARC_Counter *counter)
 {
   counter->read_isr_disabled = _SPARC_Counter_read_asr23;
@@ -46,6 +48,7 @@ static void leon3_counter_use_up_counter(SPARC_Counter 
*counter)
 
   leon3_counter_frequency = leon3_up_counter_frequency();
 }
+#endif
 
 #if defined(LEON3_IRQAMP_PROBE_TIMESTAMP)
 static void leon3_counter_use_irqamp_timestamp(
@@ -108,11 +111,13 @@ static void leon3_counter_initialize(void)
 #if defined(LEON3_HAS_ASR_22_23_UP_COUNTER)
   leon3_counter_use_up_counter(counter);
 #else /* LEON3_HAS_ASR_22_23_UP_COUNTER */
+#if defined(LEON3_PROBE_ASR_22_23_UP_COUNTER)
   if (leon3_up_counter_is_available()) {
 /* Use the LEON4 up-counter if available */
 leon3_counter_use_up_counter(counter);
 return;
   }
+#endif
 
 #if defined(LEON3_IRQAMP_PROBE_TIMESTAMP)
   irqmp_ts = irqamp_get_timestamp_registers(LEON3_IrqCtrl_Regs);
diff --git a/spec/build/bsps/sparc/leon3/grp.yml 
b/spec/build/bsps/sparc/leon3/grp.yml
index 6d7a1b75c3..94d11bed55 100644
--- a/spec/build/bsps/sparc/leon3/grp.yml
+++ b/spec/build/bsps/sparc/leon3/grp.yml
@@ -36,6 +36,8 @@ links:
   uid: optapbuartbase
 - role: build-dependency
   uid: optasrupcnt
+- role: build-dependency
+  uid: optasrupcntprobe
 - role: build-dependency
   uid: optgptimerbase
 - role: build-dependency
diff --git a/spec/build/bsps/sparc/leon3/optasrupcntprobe.yml 
b/spec/build/bsps/sparc/leon3/optasrupcntprobe.yml
new file mode 100644
index 00..73c9cb6685
--- /dev/null
+++ b/spec/build/bsps/sparc/leon3/optasrupcntprobe.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH & Co. KG
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+default:
+- enabled-by:
+  - sparc/gr712rc
+  - sparc/gr740
+  value: false
+enabled-by: true
+links: []
+name: LEON3_PROBE_ASR_22_23_UP_COUNTER
+description: |
+  If this option is set to true, then it will be probed if the %asr22 and
+  %asr23 up-counter is available.
+type: build
-- 
2.35.3

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[PATCH v2 16/32] bsp/leon3: Add LEON3_GPTIMER_BASE

[Sebastian Huber]

---
 bsps/sparc/leon3/include/bsp/leon3.h  |  4 
 bsps/sparc/leon3/start/amba.c |  4 
 spec/build/bsps/sparc/leon3/grp.yml   |  2 ++
 .../build/bsps/sparc/leon3/optgptimerbase.yml | 20 +++
 4 files changed, 30 insertions(+)
 create mode 100644 spec/build/bsps/sparc/leon3/optgptimerbase.yml

diff --git a/bsps/sparc/leon3/include/bsp/leon3.h 
b/bsps/sparc/leon3/include/bsp/leon3.h
index 599d616aaf..18db7b8aea 100644
--- a/bsps/sparc/leon3/include/bsp/leon3.h
+++ b/bsps/sparc/leon3/include/bsp/leon3.h
@@ -189,7 +189,11 @@ static inline uint32_t 
leon3_get_data_cache_config_register( void )
 /**
  * @brief This pointer provides the GPTIMER register block address.
  */
+#if defined(LEON3_GPTIMER_BASE)
+#define LEON3_Timer_Regs ((gptimer *) LEON3_GPTIMER_BASE)
+#else
 extern gptimer *LEON3_Timer_Regs;
+#endif
 
 /**
  * @brief This pointer provides the GPTIMER device information block.
diff --git a/bsps/sparc/leon3/start/amba.c b/bsps/sparc/leon3/start/amba.c
index d4494224c4..36b988e90b 100644
--- a/bsps/sparc/leon3/start/amba.c
+++ b/bsps/sparc/leon3/start/amba.c
@@ -119,8 +119,10 @@ RTEMS_SYSINIT_ITEM(
 irqamp *LEON3_IrqCtrl_Regs;
 struct ambapp_dev *LEON3_IrqCtrl_Adev;
 
+#if !defined(LEON3_GPTIMER_BASE)
 gptimer *LEON3_Timer_Regs;
 struct ambapp_dev *LEON3_Timer_Adev;
+#endif
 
 /*
  *  amba_initialize
@@ -166,6 +168,7 @@ static void amba_initialize(void)
 LEON3_IrqCtrl_Regs += icsel;
   }
 
+#if !defined(LEON3_GPTIMER_BASE)
   /* find GP Timer */
   adev = (void *)ambapp_for_each(plb, (OPTIONS_ALL|OPTIONS_APB_SLVS),
  VENDOR_GAISLER, GAISLER_GPTIMER,
@@ -189,6 +192,7 @@ static void amba_initialize(void)
 if (leon3_timer_prescaler)
   grlib_store_32(&LEON3_Timer_Regs->sreload, leon3_timer_prescaler);
   }
+#endif
 }
 
 RTEMS_SYSINIT_ITEM(
diff --git a/spec/build/bsps/sparc/leon3/grp.yml 
b/spec/build/bsps/sparc/leon3/grp.yml
index 964682d0fe..cce4c1dc06 100644
--- a/spec/build/bsps/sparc/leon3/grp.yml
+++ b/spec/build/bsps/sparc/leon3/grp.yml
@@ -34,6 +34,8 @@ links:
   uid: objsmp
 - role: build-dependency
   uid: optapbuartbase
+- role: build-dependency
+  uid: optgptimerbase
 - role: build-dependency
   uid: optconirq
 - role: build-dependency
diff --git a/spec/build/bsps/sparc/leon3/optgptimerbase.yml 
b/spec/build/bsps/sparc/leon3/optgptimerbase.yml
new file mode 100644
index 00..b2158208a0
--- /dev/null
+++ b/spec/build/bsps/sparc/leon3/optgptimerbase.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH & Co. KG
+actions:
+- get-integer: null
+- format-and-define: null
+build-type: option
+default:
+- enabled-by: sparc/gr712rc
+  value: 0x8300
+- enabled-by: sparc/gr740
+  value: 0xff908000
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: LEON3_GPTIMER_BASE
+description: |
+  This option defines the base address of the GPTIMER register block used by
+  the clock driver.
+type: build
-- 
2.35.3

___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel

[PATCH v2 14/32] bsp/leon3: Add LEON3_APBUART_BASE

[Sebastian Huber]

---
 bsps/sparc/leon3/console/printk_support.c | 37 +++
 bsps/sparc/leon3/include/bsp/leon3.h  |  5 +++
 bsps/sparc/leon3/include/leon.h   |  2 +
 spec/build/bsps/sparc/leon3/grp.yml   |  2 +
 .../build/bsps/sparc/leon3/optapbuartbase.yml | 20 ++
 5 files changed, 58 insertions(+), 8 deletions(-)
 create mode 100644 spec/build/bsps/sparc/leon3/optapbuartbase.yml

diff --git a/bsps/sparc/leon3/console/printk_support.c 
b/bsps/sparc/leon3/console/printk_support.c
index cb77c66a96..9e260d2eac 100644
--- a/bsps/sparc/leon3/console/printk_support.c
+++ b/bsps/sparc/leon3/console/printk_support.c
@@ -38,20 +38,27 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 
+#if !defined(LEON3_APBUART_BASE)
 #include 
 
 int leon3_debug_uart_index __attribute__((weak)) = 0;
+
 apbuart *leon3_debug_uart = NULL;
+#endif
 
 static void bsp_debug_uart_init(void);
 
-static void bsp_debug_uart_discard(char c)
+static void apbuart_enable_receive_and_transmit(apbuart *regs)
 {
-  (void) c;
+  uint32_t ctrl;
+
+  ctrl = grlib_load_32(®s->ctrl);
+  ctrl |= APBUART_CTRL_RE | APBUART_CTRL_TE;
+  grlib_store_32(®s->ctrl, ctrl);
+  grlib_store_32(®s->status, 0);
 }
 
 static void bsp_debug_uart_output_char(char c)
@@ -71,6 +78,22 @@ static void bsp_debug_uart_pre_init_out(char c)
   (*BSP_output_char)(c);
 }
 
+#if defined(LEON3_APBUART_BASE)
+
+static void bsp_debug_uart_init(void)
+{
+  apbuart_enable_receive_and_transmit(leon3_debug_uart);
+  BSP_poll_char = bsp_debug_uart_poll_char;
+  BSP_output_char = bsp_debug_uart_output_char;
+}
+
+#else /* !LEON3_APBUART_BASE */
+
+static void bsp_debug_uart_discard(char c)
+{
+  (void) c;
+}
+
 /* Initialize the BSP system debug console layer. It will scan AMBA Plu&Play
  * for a debug APBUART and enable RX/TX for that UART.
  */
@@ -108,7 +131,6 @@ static void bsp_debug_uart_init(void)
  ambapp_find_by_idx, (void *)&i);
   if (adev != NULL) {
 struct ambapp_apb_info *apb;
-uint32_t ctrl;
 
 /*
  * Found a matching debug console, initialize debug UART if present for
@@ -116,16 +138,15 @@ static void bsp_debug_uart_init(void)
  */
 apb = (struct ambapp_apb_info *)adev->devinfo;
 leon3_debug_uart = (apbuart *)apb->start;
-ctrl = grlib_load_32(&leon3_debug_uart->ctrl);
-ctrl |= APBUART_CTRL_RE | APBUART_CTRL_TE;
-grlib_store_32(&leon3_debug_uart->ctrl, ctrl);
-grlib_store_32(&leon3_debug_uart->status, 0);
+apbuart_enable_receive_and_transmit(leon3_debug_uart);
 
 BSP_poll_char = bsp_debug_uart_poll_char;
 BSP_output_char = bsp_debug_uart_output_char;
   }
 }
 
+#endif /* LEON3_APBUART_BASE */
+
 RTEMS_SYSINIT_ITEM(
   bsp_debug_uart_init,
   RTEMS_SYSINIT_BSP_START,
diff --git a/bsps/sparc/leon3/include/bsp/leon3.h 
b/bsps/sparc/leon3/include/bsp/leon3.h
index aa3898e530..1402dfca1b 100644
--- a/bsps/sparc/leon3/include/bsp/leon3.h
+++ b/bsps/sparc/leon3/include/bsp/leon3.h
@@ -39,6 +39,7 @@
 #include 
 #include 
 
+#include 
 #include 
 
 #include 
@@ -266,7 +267,11 @@ static inline uint32_t leon3_up_counter_frequency( void )
 /**
  * @brief This pointer provides the debug APBUART register block address.
  */
+#if defined(LEON3_APBUART_BASE)
+#define leon3_debug_uart ((struct apbuart *) LEON3_APBUART_BASE)
+#else
 extern apbuart *leon3_debug_uart;
+#endif
 
 /** @} */
 
diff --git a/bsps/sparc/leon3/include/leon.h b/bsps/sparc/leon3/include/leon.h
index be3819737a..7aa26b43b9 100644
--- a/bsps/sparc/leon3/include/leon.h
+++ b/bsps/sparc/leon3/include/leon.h
@@ -323,6 +323,7 @@ static inline unsigned int leon_r32_no_cache(uintptr_t addr)
  */
 extern int syscon_uart_index;
 
+#if !defined(LEON3_APBUART_BASE)
 /* Let user override which on-chip APBUART will be debug UART
  * 0 = Default APBUART. On MP system CPU0=APBUART0, CPU1=APBUART1...
  * 1 = APBUART[0]
@@ -331,6 +332,7 @@ extern int syscon_uart_index;
  * ...
  */
 extern int leon3_debug_uart_index;
+#endif
 
 /* Let user override which on-chip TIMER core will be used for system clock
  * timer. This controls which timer core will be accociated with
diff --git a/spec/build/bsps/sparc/leon3/grp.yml 
b/spec/build/bsps/sparc/leon3/grp.yml
index ab72d911c5..48da9acba8 100644
--- a/spec/build/bsps/sparc/leon3/grp.yml
+++ b/spec/build/bsps/sparc/leon3/grp.yml
@@ -32,6 +32,8 @@ links:
   uid: objmpci
 - role: build-dependency
   uid: objsmp
+- role: build-dependency
+  uid: optapbuartbase
 - role: build-dependency
   uid: optconirq
 - role: build-dependency
diff --git a/spec/build/bsps/sparc/leon3/optapbuartbase.yml 
b/spec/build/bsps/sparc/leon3/optapbuartbase.yml
new file mode 100644
index 00..2986fc6324
--- /dev/null
+++ b/spec/build/bsps/sparc/leon3/optapbuartbase.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH & Co. KG
+actions:
+- get-integer: null
+- format-and-define: null
+build-type: o

[PATCH v2 10/32] bsp/leon3: Use new IRQ(A)MP register block API

[Sebastian Huber]

---
 bsps/sparc/leon3/clock/ckinit.c|  11 ++-
 bsps/sparc/leon3/include/bsp/irq.h |   1 +
 bsps/sparc/leon3/include/bsp/irqimpl.h |  35 ++-
 bsps/sparc/leon3/include/leon.h|  53 ---
 bsps/sparc/leon3/start/amba.c  |  11 ++-
 bsps/sparc/leon3/start/bspclean.c  |   9 +-
 bsps/sparc/leon3/start/bspsmp.c|  16 +++-
 bsps/sparc/leon3/start/cpucounter.c|  11 ++-
 bsps/sparc/leon3/start/eirq.c  | 124 ++---
 9 files changed, 179 insertions(+), 92 deletions(-)

diff --git a/bsps/sparc/leon3/clock/ckinit.c b/bsps/sparc/leon3/clock/ckinit.c
index 2ec701fe2a..b3761bed35 100644
--- a/bsps/sparc/leon3/clock/ckinit.c
+++ b/bsps/sparc/leon3/clock/ckinit.c
@@ -45,6 +45,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -179,11 +180,11 @@ static void 
bsp_clock_handler_install(rtems_interrupt_handler isr)
 
 static void leon3_clock_initialize(void)
 {
-  volatile struct irqmp_timestamp_regs *irqmp_ts;
+  irqamp_timestamp *irqmp_ts;
   volatile struct gptimer_regs *gpt;
   struct timecounter *tc;
 
-  irqmp_ts = &LEON3_IrqCtrl_Regs->timestamp[0];
+  irqmp_ts = irqamp_get_timestamp_registers(LEON3_IrqCtrl_Regs);
   gpt = LEON3_Timer_Regs;
   tc = &leon3_tc;
 
@@ -201,13 +202,13 @@ static void leon3_clock_initialize(void)
 tc->tc_frequency = leon3_up_counter_frequency();
 
 #ifdef RTEMS_PROFILING
-if (!irqmp_has_timestamp(irqmp_ts)) {
+if (irqmp_ts == NULL) {
   bsp_fatal(LEON3_FATAL_CLOCK_NO_IRQMP_TIMESTAMP_SUPPORT);
 }
 #endif
 
 leon3_tc_tick = leon3_tc_tick_irqmp_timestamp_init;
-  } else if (irqmp_has_timestamp(irqmp_ts)) {
+  } else if (irqmp_ts != NULL) {
 /* Use the interrupt controller timestamp counter if available */
 tc->tc_get_timecount = _SPARC_Get_timecount_up;
 tc->tc_frequency = ambapp_freq_get(ambapp_plb(), LEON3_Timer_Adev);
@@ -218,7 +219,7 @@ static void leon3_clock_initialize(void)
  * At least one TSISEL field must be non-zero to enable the timestamp
  * counter.  Use an arbitrary interrupt source.
  */
-irqmp_ts->control = 0x1;
+grlib_store_32(&irqmp_ts->itstmpc, IRQAMP_ITSTMPC_TSISEL(1));
   } else {
 #ifdef RTEMS_SMP
 /*
diff --git a/bsps/sparc/leon3/include/bsp/irq.h 
b/bsps/sparc/leon3/include/bsp/irq.h
index ef0f6245f9..38ea1de1f8 100644
--- a/bsps/sparc/leon3/include/bsp/irq.h
+++ b/bsps/sparc/leon3/include/bsp/irq.h
@@ -37,6 +37,7 @@
 #ifndef LIBBSP_LEON3_IRQ_CONFIG_H
 #define LIBBSP_LEON3_IRQ_CONFIG_H
 
+#include 
 #include 
 
 #define BSP_INTERRUPT_VECTOR_MAX_STD 15 /* Standard IRQ controller */
diff --git a/bsps/sparc/leon3/include/bsp/irqimpl.h 
b/bsps/sparc/leon3/include/bsp/irqimpl.h
index 60b198bd02..c957c7fbbc 100644
--- a/bsps/sparc/leon3/include/bsp/irqimpl.h
+++ b/bsps/sparc/leon3/include/bsp/irqimpl.h
@@ -38,7 +38,8 @@
 #define LIBBSP_SPARC_LEON3_BSP_IRQIMPL_H
 
 #include 
-#include 
+#include 
+#include 
 
 struct ambapp_dev;
 
@@ -52,15 +53,38 @@ extern "C" {
  * @{
  */
 
+/**
+ * @brief This object provides the index of the boot processor.
+ *
+ * This object should be read-only after initialization.
+ */
+extern uint32_t LEON3_Cpu_Index;
+
 /**
  * @brief This lock serializes the interrupt controller access.
  */
 extern rtems_interrupt_lock LEON3_IrqCtrl_Lock;
 
+/**
+ * @brief Acquires the interrupt controller lock.
+ *
+ * @param[out] _lock_context is the lock context.
+ */
+#define LEON3_IRQCTRL_ACQUIRE( _lock_context ) \
+  rtems_interrupt_lock_acquire( &LEON3_IrqCtrl_Lock, _lock_context )
+
+/**
+ * @brief Releases the interrupt controller lock.
+ *
+ * @param[in, out] _lock_context is the lock context.
+ */
+#define LEON3_IRQCTRL_RELEASE( _lock_context ) \
+  rtems_interrupt_lock_release( &LEON3_IrqCtrl_Lock, _lock_context )
+
 /**
  * @brief This pointer provides the IRQ(A)MP register block address.
  */
-extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs;
+extern irqamp *LEON3_IrqCtrl_Regs;
 
 /**
  * @brief This pointer provides the IRQ(A)MP device information block.
@@ -80,7 +104,7 @@ extern uint32_t LEON3_IrqCtrl_EIrq;
  *
  * @param[in, out] regs is the IRQ(A)MP register block address.
  */
-void leon3_ext_irq_init( volatile struct irqmp_regs *regs );
+void leon3_ext_irq_init( irqamp *regs );
 
 /**
  * @brief Acknowledges and maps extended interrupts if this feature is
@@ -91,12 +115,15 @@ void leon3_ext_irq_init( volatile struct irqmp_regs *regs 
);
 static inline uint32_t bsp_irq_fixup( uint32_t irq )
 {
   uint32_t eirq;
+  uint32_t cpu_self;
 
   if ( irq != LEON3_IrqCtrl_EIrq ) {
 return irq;
   }
 
-  eirq = LEON3_IrqCtrl_Regs->intid[ _LEON3_Get_current_processor() ] & 0x1f;
+  cpu_self = _LEON3_Get_current_processor();
+  eirq = grlib_load_32( &LEON3_IrqCtrl_Regs->pextack[ cpu_self ] );
+  eirq = IRQAMP_PEXTACK_EID_4_0_GET( eirq );
 
   if ( eirq < 16 ) {
 return irq;
diff --git a/bsps/sparc/leon3/include/leon.h b/bsps/sparc/leon3/include/leon.h
index 8a64285b3f..bf92badfcd 

[PATCH v2 07/32] bsps: Use new APBUART register block API

[Sebastian Huber]

---
 bsps/include/grlib/apbuart_termios.h  |   4 +-
 bsps/shared/grlib/uart/apbuart_cons.c | 136 +-
 bsps/shared/grlib/uart/apbuart_polled.c   |  52 +
 bsps/shared/grlib/uart/apbuart_termios.c  |  49 +---
 bsps/sparc/leon3/console/console.c|   2 +-
 bsps/sparc/leon3/console/printk_support.c |  16 ++-
 bsps/sparc/leon3/include/bsp/leon3.h  |  62 ++
 7 files changed, 218 insertions(+), 103 deletions(-)
 create mode 100644 bsps/sparc/leon3/include/bsp/leon3.h

diff --git a/bsps/include/grlib/apbuart_termios.h 
b/bsps/include/grlib/apbuart_termios.h
index 82eb4b6de4..a19b99b609 100644
--- a/bsps/include/grlib/apbuart_termios.h
+++ b/bsps/include/grlib/apbuart_termios.h
@@ -34,7 +34,7 @@
 #define APBUART_TERMIOS_H
 
 #include 
-#include "grlib.h"
+#include "apbuart.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -42,7 +42,7 @@ extern "C" {
 
 struct apbuart_context {
   rtems_termios_device_context base;
-  struct apbuart_regs *regs;
+  apbuart *regs;
   unsigned int freq_hz;
   rtems_vector_number irq;
   volatile int sending;
diff --git a/bsps/shared/grlib/uart/apbuart_cons.c 
b/bsps/shared/grlib/uart/apbuart_cons.c
index 5d47b7f4a1..74f9bf3e0c 100644
--- a/bsps/shared/grlib/uart/apbuart_cons.c
+++ b/bsps/shared/grlib/uart/apbuart_cons.c
@@ -47,11 +47,15 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
 
+#ifdef LEON3
+#include 
+#endif
+
 /*#define DEBUG 1  */
 
 #ifdef DEBUG
@@ -60,12 +64,6 @@
 #define DBG(x...)
 #endif
 
-/* LEON3 Low level transmit/receive functions provided by debug-uart code */
-#ifdef LEON3
-#include 
-extern struct apbuart_regs *leon3_debug_uart; /* The debug UART */
-#endif
-
 /* Probed hardware capabilities */
 enum {
CAP_FIFO = 0x01, /* FIFO available */
@@ -74,7 +72,7 @@ enum {
 struct apbuart_priv {
struct console_dev condev;
struct drvmgr_dev *dev;
-   struct apbuart_regs *regs;
+   apbuart *regs;
struct rtems_termios_tty *tty;
char devName[52];
volatile int sending;
@@ -213,18 +211,23 @@ static const rtems_termios_device_handler handler_polled 
= {
  * can select appropriate routines for the hardware. probecap() return value
  * is a CAP_ bitmask.
  */
-static int probecap(struct apbuart_regs *regs)
+static int probecap(apbuart *regs)
 {
int cap = 0;
+   uint32_t ctrl;
 
/* Probe FIFO */
-   if (regs->ctrl & APBUART_CTRL_FA) {
+   ctrl = grlib_load_32(®s->ctrl);
+   if (ctrl & APBUART_CTRL_FA) {
cap |= CAP_FIFO;
 
/* Probe RX delayed interrupt */
-   regs->ctrl |= APBUART_CTRL_DI;
-   if (regs->ctrl & APBUART_CTRL_DI) {
-   regs->ctrl &= ~APBUART_CTRL_DI;
+   ctrl |= APBUART_CTRL_DI;
+   grlib_store_32(®s->ctrl, ctrl);
+   ctrl = grlib_load_32(®s->ctrl);
+   if (ctrl & APBUART_CTRL_DI) {
+   ctrl &= ~APBUART_CTRL_DI;
+   grlib_store_32(®s->ctrl, ctrl);
cap |= CAP_DI;
}
}
@@ -241,6 +244,7 @@ int apbuart_init1(struct drvmgr_dev *dev)
char prefix[32];
unsigned int db;
static int first_uart = 1;
+   uint32_t ctrl;
 
/* The default operation in AMP is to use APBUART[0] for CPU[0],
 * APBUART[1] for CPU[1] and so on. The remaining UARTs is not used
@@ -269,10 +273,12 @@ int apbuart_init1(struct drvmgr_dev *dev)
if (ambadev == NULL)
return -1;
pnpinfo = &ambadev->info;
-   priv->regs = (struct apbuart_regs *)pnpinfo->apb_slv->start;
+   priv->regs = (apbuart *)pnpinfo->apb_slv->start;
 
/* Clear HW regs, leave baudrate register as it is */
-   priv->regs->status = 0;
+   grlib_store_32(&priv->regs->status, 0);
+
+   ctrl = grlib_load_32(&priv->regs->ctrl);
 
/* leave Transmitter/receiver if this is the RTEMS debug UART (assume
 * it has been setup by boot loader).
@@ -280,10 +286,10 @@ int apbuart_init1(struct drvmgr_dev *dev)
db = 0;
 #ifdef LEON3
if (priv->regs == leon3_debug_uart) {
-   db = priv->regs->ctrl & (APBUART_CTRL_RE |
-   APBUART_CTRL_TE |
-   APBUART_CTRL_PE |
-   APBUART_CTRL_PS);
+   db = ctrl & (APBUART_CTRL_RE |
+APBUART_CTRL_TE |
+APBUART_CTRL_PE |
+APBUART_CTRL_PS);
}
 #endif
/* Let UART debug tunnelling be untouched if Flow-control is set.
@@ -293,12 +299,12 @@ int apbuart_init1(struct drvmgr_dev *dev)
 * guess that we are debugging if FL is already set, the debugger set
 * either LB or DB depending on UART capabilities.
 */
-   if (priv->regs->ctrl & APBUART_CTRL_FL) {
-   

[PATCH v2 12/32] bsp/leon3: Use new GPTIMER register block API

[Sebastian Huber]

---
 bsps/shared/grlib/btimer/gptimer.c   | 177 +--
 bsps/sparc/leon3/btimer/btimer.c |  13 +-
 bsps/sparc/leon3/btimer/watchdog.c   |  27 ++--
 bsps/sparc/leon3/clock/ckinit.c  |  33 ++---
 bsps/sparc/leon3/include/bsp/leon3.h |  44 ++-
 bsps/sparc/leon3/include/leon.h  |  24 
 bsps/sparc/leon3/start/amba.c|   9 +-
 bsps/sparc/leon3/start/bspdelay.c|   8 +-
 bsps/sparc/leon3/start/cpucounter.c  |  20 +--
 9 files changed, 188 insertions(+), 167 deletions(-)

diff --git a/bsps/shared/grlib/btimer/gptimer.c 
b/bsps/shared/grlib/btimer/gptimer.c
index f31b7c052f..ca87780d2c 100644
--- a/bsps/shared/grlib/btimer/gptimer.c
+++ b/bsps/shared/grlib/btimer/gptimer.c
@@ -50,18 +50,15 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include 
-#include 
-#include 
-#include 
 #include 
 #include 
-#include 
 #include 
+#include 
+#include 
 #include 
 
 #if defined(LEON3)
-#include 
+#include 
 #endif
 
 #ifdef GPTIMER_INFO_AVAIL
@@ -75,49 +72,21 @@
 
 #include 
 
-/* GPTIMER Core Configuration Register (READ-ONLY) */
-#define GPTIMER_CFG_TIMERS_BIT 0
-#define GPTIMER_CFG_IRQ_BIT3
-#define GPTIMER_CFG_SI_BIT 8
-#define GPTIMER_CFG_DF_BIT 9
-
-#define GPTIMER_CFG_TIMERS (0x7info;
-   regs = (struct gptimer_regs *)pnpinfo->apb_slv->start;
+   regs = (gptimer *)pnpinfo->apb_slv->start;
 
DBG("GPTIMER[%d] on bus %s\n", dev->minor_drv, dev->parent->dev->name);
 
/* Get number of Timers */
-   timer_hw_cnt = regs->cfg & GPTIMER_CFG_TIMERS;
+   timer_hw_cnt = GPTIMER_CONFIG_TIMERS_GET(grlib_load_32(®s->config));
 
/* Let user spelect a range of timers to be used. In AMP systems
 * it is sometimes neccessary to leave timers for other CPU instances.
@@ -251,7 +220,7 @@ int gptimer_init1(struct drvmgr_dev *dev)
 * are present.
 */
size = sizeof(struct gptimer_priv) +
-   timer_cnt*sizeof(struct gptimer_timer);
+   timer_cnt*sizeof(struct gptimer_timer_priv);
priv = dev->priv = grlib_calloc(1, size);
if ( !priv )
return DRVMGR_NOMEM;
@@ -277,24 +246,24 @@ int gptimer_init1(struct drvmgr_dev *dev)
 */
value = drvmgr_dev_key_get(priv->dev, "prescaler", DRVMGR_KT_INT);
if ( value )
-   regs->scaler_reload = value->i;
+   grlib_store_32(®s->sreload, value->i);
 
/* Get Frequency that the timers are operating in (after prescaler) */
-   priv->base_freq = priv->base_clk / (priv->regs->scaler_reload + 1);
+   priv->base_freq = priv->base_clk / (grlib_load_32(®s->sreload) + 1);
 
/* Stop Timer and probe Pending bit. In newer hardware the
 * timer has pending bit is cleared by writing a one to it,
 * whereas older versions it is cleared with a zero.
 */
-   priv->regs->timer[timer_start].ctrl = GPTIMER_CTRL_IP;
-   if ((priv->regs->timer[timer_start].ctrl & GPTIMER_CTRL_IP) != 0)
-   irq_ack_mask = ~GPTIMER_CTRL_IP;
+   grlib_store_32(®s->timer[timer_start].tctrl, GPTIMER_TCTRL_IP);
+   if ((grlib_load_32(®s->timer[timer_start].tctrl) & GPTIMER_TCTRL_IP) 
!= 0)
+   irq_ack_mask = ~GPTIMER_TCTRL_IP;
else
-   irq_ack_mask = ~0;
+   irq_ack_mask = ~0U;
 
/* Probe timer register width mask */
-   priv->regs->timer[timer_start].value = 0x;
-   priv->widthmask = priv->regs->timer[timer_start].value;
+   grlib_store_32(®s->timer[timer_start].tcntval, 0x);
+   priv->widthmask = grlib_load_32(®s->timer[timer_start].tcntval);
 
priv->timer_cnt = timer_cnt;
for (i=0; iseparate_interrupt = (regs->cfg & GPTIMER_CFG_SI) != 0;
+   priv->separate_interrupt = (grlib_load_32(®s->config) & 
GPTIMER_CONFIG_SI) != 0;
 
return DRVMGR_OK;
 }
@@ -326,7 +295,7 @@ static int gptimer_info(
void *p, int argc, char *argv[])
 {
struct gptimer_priv *priv = dev->priv;
-   struct gptimer_timer *timer;
+   struct gptimer_timer_priv *timer;
char buf[64];
int i;
 
@@ -337,7 +306,7 @@ static int gptimer_info(
print_line(p, buf);
sprintf(buf, "REGS:0x%08x", (unsigned int)priv->regs);
print_line(p, buf);
-   sprintf(buf, "BASE SCALER: %d", priv->regs->scaler_reload);
+   sprintf(buf, "BASE SCALER: %d", grlib_load_32(&priv->regs->sreload));
print_line(p, buf);
sprintf(buf, "BASE FREQ:   %dkHz", priv->base_freq / 1000);
print_line(p, buf);
@@ -350,9 +319,9 @@ static int gptimer_info(
print_line(p, buf);
sprintf(buf, " TLIB Index: %d", timer->index);
print_line(p, buf);
-   sprintf(buf, " RELOAD REG: %d", timer->tregs->reload);
+   sprintf(buf, 

[PATCH v2 32/32] bsp/leon3: Simplify shutdown

[Sebastian Huber]

Do not wait for other processors to halt.
---
 bsps/sparc/leon3/start/bspclean.c | 63 +--
 .../bsps/fatal-sparc-leon3-shutdown.yml   |  3 +-
 2 files changed, 4 insertions(+), 62 deletions(-)

diff --git a/bsps/sparc/leon3/start/bspclean.c 
b/bsps/sparc/leon3/start/bspclean.c
index d52eb65ecf..0324c45326 100644
--- a/bsps/sparc/leon3/start/bspclean.c
+++ b/bsps/sparc/leon3/start/bspclean.c
@@ -38,48 +38,6 @@
 #include 
 #include 
 
-#if defined(RTEMS_SMP)
-static void leon3_wait_for_power_down(irqamp *regs)
-{
-  uint32_t max_wait;
-  uint32_t cpu_self;
-  uint32_t cpu_count;
-  uint32_t halt_mask;
-  uint32_t i;
-
-  cpu_count = leon3_get_cpu_count(regs);
-
-  if (cpu_count > rtems_configuration_get_maximum_processors()) {
-cpu_count = rtems_configuration_get_maximum_processors();
-  }
-
-  cpu_self = rtems_scheduler_get_processor();
-  halt_mask = 0;
-
-  for (i = 0; i < cpu_count; ++i) {
-if (i != cpu_self && _SMP_Should_start_processor(i)) {
-  halt_mask |= UINT32_C(1) << i;
-}
-  }
-
-  /*
-   * Wait some time for secondary processors to halt.
-   *
-   * The value was chosen to get something in the magnitude of 1ms on a 200MHz
-   * processor.
-   */
-
-  max_wait = 1234567;
-  i = 0;
-
-  while (
-(grlib_load_32(®s->mpstat) & halt_mask) != halt_mask && i < max_wait
-  ) {
-++i;
-  }
-}
-#endif
-
 void bsp_fatal_extension(
   rtems_fatal_source source,
   bool always_set_to_false,
@@ -92,29 +50,12 @@ void bsp_fatal_extension(
   (void) level;
 
 #if defined(RTEMS_SMP)
-  /*
-   * On SMP we must wait for all other CPUs not requesting a fatal halt, they
-   * are responding to another CPU's fatal request. These CPUs goes into
-   * power-down. The CPU requesting fatal halt waits for the others and then
-   * handles the system shutdown via the normal procedure.
-   */
   if ((source == RTEMS_FATAL_SOURCE_SMP) &&
   (code == SMP_FATAL_SHUTDOWN_RESPONSE)) {
 leon3_power_down_loop(); /* CPU didn't start shutdown sequence .. */
-  } else {
-irqamp *regs;
-
-_SMP_Request_shutdown();
-
-regs = LEON3_IrqCtrl_Regs;
-#if defined(LEON3_IRQAMP_BASE)
-leon3_wait_for_power_down(regs);
-#else
-if (regs != NULL) {
-  leon3_wait_for_power_down(regs);
-}
-#endif
   }
+
+  _SMP_Request_shutdown();
 #endif
 
 #if BSP_PRINT_EXCEPTION_CONTEXT
diff --git 
a/spec/build/testsuites/validation/bsps/fatal-sparc-leon3-shutdown.yml 
b/spec/build/testsuites/validation/bsps/fatal-sparc-leon3-shutdown.yml
index c12f447e84..e1a0f32900 100644
--- a/spec/build/testsuites/validation/bsps/fatal-sparc-leon3-shutdown.yml
+++ b/spec/build/testsuites/validation/bsps/fatal-sparc-leon3-shutdown.yml
@@ -11,7 +11,8 @@ enabled-by:
   - bsps/sparc/leon3
 features: c cprogram
 includes: []
-ldflags: []
+ldflags:
+- -Wl,--wrap=_CPU_Fatal_halt
 links: []
 source:
 - testsuites/validation/bsps/tc-fatal-sparc-leon3-shutdown.c
-- 
2.35.3

___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel

[PATCH v2 31/32] validation: Test sparc/leon3 BSP family

[Sebastian Huber]

---
 ...arc-leon3-cache-snooping-disabled-boot.yml |  24 ++
 ...eon3-cache-snooping-disabled-secondary.yml |  25 +++
 ...fatal-sparc-leon3-clock-initialization.yml |  21 ++
 .../bsps/fatal-sparc-leon3-shutdown.yml   |  24 ++
 .../validation/bsps/objsparcgr712rc.yml   |  14 ++
 .../validation/bsps/validation-bsp-0.yml  |   2 +
 spec/build/testsuites/validation/grp.yml  |   8 +
 .../bsps/tc-fatal-sparc-leon3-shutdown.c  | 211 ++
 testsuites/validation/bsps/tc-sparc-gr712rc.c | 124 ++
 ...sparc-leon3-cache-snooping-disabled-boot.c | 175 +++
 ...sparc-leon3-cache-snooping-disabled-boot.h |  84 +++
 ...-leon3-cache-snooping-disabled-secondary.c | 176 +++
 ...-leon3-cache-snooping-disabled-secondary.h |  84 +++
 ...r-fatal-sparc-leon3-clock-initialization.c | 190 
 ...r-fatal-sparc-leon3-clock-initialization.h |  84 +++
 ...sparc-leon3-cache-snooping-disabled-boot.c |  79 +++
 ...-leon3-cache-snooping-disabled-secondary.c |  82 +++
 ...s-fatal-sparc-leon3-clock-initialization.c |  79 +++
 .../ts-fatal-sparc-leon3-shutdown-response.c  |  94 
 .../bsps/ts-fatal-sparc-leon3-shutdown.c  | 170 ++
 20 files changed, 1750 insertions(+)
 create mode 100644 
spec/build/testsuites/validation/bsps/fatal-sparc-leon3-cache-snooping-disabled-boot.yml
 create mode 100644 
spec/build/testsuites/validation/bsps/fatal-sparc-leon3-cache-snooping-disabled-secondary.yml
 create mode 100644 
spec/build/testsuites/validation/bsps/fatal-sparc-leon3-clock-initialization.yml
 create mode 100644 
spec/build/testsuites/validation/bsps/fatal-sparc-leon3-shutdown.yml
 create mode 100644 spec/build/testsuites/validation/bsps/objsparcgr712rc.yml
 create mode 100644 testsuites/validation/bsps/tc-fatal-sparc-leon3-shutdown.c
 create mode 100644 testsuites/validation/bsps/tc-sparc-gr712rc.c
 create mode 100644 
testsuites/validation/bsps/tr-fatal-sparc-leon3-cache-snooping-disabled-boot.c
 create mode 100644 
testsuites/validation/bsps/tr-fatal-sparc-leon3-cache-snooping-disabled-boot.h
 create mode 100644 
testsuites/validation/bsps/tr-fatal-sparc-leon3-cache-snooping-disabled-secondary.c
 create mode 100644 
testsuites/validation/bsps/tr-fatal-sparc-leon3-cache-snooping-disabled-secondary.h
 create mode 100644 
testsuites/validation/bsps/tr-fatal-sparc-leon3-clock-initialization.c
 create mode 100644 
testsuites/validation/bsps/tr-fatal-sparc-leon3-clock-initialization.h
 create mode 100644 
testsuites/validation/bsps/ts-fatal-sparc-leon3-cache-snooping-disabled-boot.c
 create mode 100644 
testsuites/validation/bsps/ts-fatal-sparc-leon3-cache-snooping-disabled-secondary.c
 create mode 100644 
testsuites/validation/bsps/ts-fatal-sparc-leon3-clock-initialization.c
 create mode 100644 
testsuites/validation/bsps/ts-fatal-sparc-leon3-shutdown-response.c
 create mode 100644 testsuites/validation/bsps/ts-fatal-sparc-leon3-shutdown.c

diff --git 
a/spec/build/testsuites/validation/bsps/fatal-sparc-leon3-cache-snooping-disabled-boot.yml
 
b/spec/build/testsuites/validation/bsps/fatal-sparc-leon3-cache-snooping-disabled-boot.yml
new file mode 100644
index 00..93afdb2c32
--- /dev/null
+++ 
b/spec/build/testsuites/validation/bsps/fatal-sparc-leon3-cache-snooping-disabled-boot.yml
@@ -0,0 +1,24 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: test-program
+cflags: []
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH & Co. KG
+cppflags: []
+cxxflags: []
+enabled-by:
+  and:
+  - RTEMS_SMP
+  - bsps/sparc/leon3
+features: c cprogram
+includes: []
+ldflags: []
+links: []
+source:
+- 
testsuites/validation/bsps/tr-fatal-sparc-leon3-cache-snooping-disabled-boot.c
+- 
testsuites/validation/bsps/ts-fatal-sparc-leon3-cache-snooping-disabled-boot.c
+stlib: []
+target: 
testsuites/validation/bsps/ts-fatal-sparc-leon3-cache-snooping-disabled-boot.exe
+type: build
+use-after:
+- validation
+use-before: []
diff --git 
a/spec/build/testsuites/validation/bsps/fatal-sparc-leon3-cache-snooping-disabled-secondary.yml
 
b/spec/build/testsuites/validation/bsps/fatal-sparc-leon3-cache-snooping-disabled-secondary.yml
new file mode 100644
index 00..20c4b43989
--- /dev/null
+++ 
b/spec/build/testsuites/validation/bsps/fatal-sparc-leon3-cache-snooping-disabled-secondary.yml
@@ -0,0 +1,25 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: test-program
+cflags: []
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH & Co. KG
+cppflags: []
+cxxflags: []
+enabled-by:
+  and:
+  - RTEMS_SMP
+  - bsps/sparc/leon3
+features: c cprogram
+includes: []
+ldflags:
+- -Wl,--wrap=bsp_start_on_secondary_processor
+links: []
+source:
+- 
testsuites/validation/bsps/tr-fatal-sparc-leon3-cache-snooping-disabled-secondary.c
+- 
testsuites/validation/bsps/ts-fatal-sparc-leon3-cache-snooping-disabled-secondary.c
+stlib: []
+target: 
testsuites/validation/bsps/ts-fatal-sparc-leon3-cache-snooping-disabled-sec

[PATCH v2 15/32] bsp/leon3: LEON3_PLB_FREQUENCY_DEFINED_BY_GPTIMER

[Sebastian Huber]

---
 bsps/sparc/leon3/clock/ckinit.c|  9 +++-
 bsps/sparc/leon3/include/bsp/leon3.h   | 27 ++
 bsps/sparc/leon3/start/cpucounter.c|  8 +++
 spec/build/bsps/sparc/leon3/grp.yml|  2 ++
 spec/build/bsps/sparc/leon3/optplbfreq.yml | 21 +
 5 files changed, 61 insertions(+), 6 deletions(-)
 create mode 100644 spec/build/bsps/sparc/leon3/optplbfreq.yml

diff --git a/bsps/sparc/leon3/clock/ckinit.c b/bsps/sparc/leon3/clock/ckinit.c
index eea598dd48..fc20577634 100644
--- a/bsps/sparc/leon3/clock/ckinit.c
+++ b/bsps/sparc/leon3/clock/ckinit.c
@@ -44,12 +44,15 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
 #include 
 
+#if !defined(LEON3_PLB_FREQUENCY_DEFINED_BY_GPTIMER)
+#include 
+#endif
+
 /* The LEON3 BSP Timer driver can rely on the Driver Manager if the
  * DrvMgr is initialized during startup. Otherwise the classic driver
  * must be used.
@@ -214,7 +217,11 @@ static void leon3_clock_initialize(void)
   } else if (irqmp_ts != NULL) {
 /* Use the interrupt controller timestamp counter if available */
 tc->tc_get_timecount = _SPARC_Get_timecount_up;
+#if defined(LEON3_PLB_FREQUENCY_DEFINED_BY_GPTIMER)
+tc->tc_frequency = leon3_processor_local_bus_frequency();
+#else
 tc->tc_frequency = ambapp_freq_get(ambapp_plb(), LEON3_Timer_Adev);
+#endif
 
 leon3_tc_tick = leon3_tc_tick_irqmp_timestamp_init;
 
diff --git a/bsps/sparc/leon3/include/bsp/leon3.h 
b/bsps/sparc/leon3/include/bsp/leon3.h
index 1402dfca1b..599d616aaf 100644
--- a/bsps/sparc/leon3/include/bsp/leon3.h
+++ b/bsps/sparc/leon3/include/bsp/leon3.h
@@ -42,7 +42,9 @@
 #include 
 #include 
 
+#if !defined(LEON3_PLB_FREQUENCY_DEFINED_BY_GPTIMER)
 #include 
+#endif
 
 #ifdef __cplusplus
 extern "C" {
@@ -194,6 +196,25 @@ extern gptimer *LEON3_Timer_Regs;
  */
 extern struct ambapp_dev *LEON3_Timer_Adev;
 
+/**
+ * @brief Gets the processor local bus frequency in Hz.
+ *
+ * @return Returns the frequency.
+ */
+static inline uint32_t leon3_processor_local_bus_frequency( void )
+{
+#if defined(LEON3_PLB_FREQUENCY_DEFINED_BY_GPTIMER)
+  return ( grlib_load_32( &LEON3_Timer_Regs->sreload ) + 1 ) *
+LEON3_GPTIMER_0_FREQUENCY_SET_BY_BOOT_LOADER;
+#else
+  /*
+   * For simplicity, assume that the interrupt controller uses the processor
+   * clock.  This is at least true on the GR740.
+   */
+  return ambapp_freq_get( ambapp_plb(), LEON3_IrqCtrl_Adev );
+#endif
+}
+
 /**
  * @brief Gets the LEON up-counter low register (%ASR23) value.
  *
@@ -257,11 +278,7 @@ static inline bool leon3_up_counter_is_available( void )
  */
 static inline uint32_t leon3_up_counter_frequency( void )
 {
-  /*
-   * For simplicity, assume that the interrupt controller uses the processor
-   * clock.  This is at least true on the GR740.
-   */
-  return ambapp_freq_get( ambapp_plb(), LEON3_IrqCtrl_Adev );
+  return leon3_processor_local_bus_frequency();
 }
 
 /**
diff --git a/bsps/sparc/leon3/start/cpucounter.c 
b/bsps/sparc/leon3/start/cpucounter.c
index 5672cbbd45..57fd487009 100644
--- a/bsps/sparc/leon3/start/cpucounter.c
+++ b/bsps/sparc/leon3/start/cpucounter.c
@@ -66,7 +66,11 @@ static void leon3_counter_initialize(void)
 /* Enable interrupt timestamping for an arbitrary interrupt line */
 grlib_store_32(&irqmp_ts->itstmpc, IRQAMP_ITSTMPC_TSISEL(1));
 
+#if defined(LEON3_PLB_FREQUENCY_DEFINED_BY_GPTIMER)
+leon3_counter_frequency = leon3_processor_local_bus_frequency();
+#else
 leon3_counter_frequency = ambapp_freq_get(ambapp_plb(), 
LEON3_IrqCtrl_Adev);
+#endif
   } else if (gpt != NULL) {
 gptimer_timer *timer;
 uint32_t   tctrl;
@@ -83,8 +87,12 @@ static void leon3_counter_initialize(void)
 tctrl |= GPTIMER_TCTRL_EN | GPTIMER_TCTRL_RS | GPTIMER_TCTRL_LD;
 grlib_store_32(&timer->tctrl, tctrl);
 
+#if defined(LEON3_PLB_FREQUENCY_DEFINED_BY_GPTIMER)
+leon3_counter_frequency = LEON3_GPTIMER_0_FREQUENCY_SET_BY_BOOT_LOADER;
+#else
 leon3_counter_frequency = ambapp_freq_get(ambapp_plb(), LEON3_Timer_Adev) /
   (grlib_load_32(&gpt->sreload) + 1);
+#endif
   }
 }
 
diff --git a/spec/build/bsps/sparc/leon3/grp.yml 
b/spec/build/bsps/sparc/leon3/grp.yml
index 48da9acba8..964682d0fe 100644
--- a/spec/build/bsps/sparc/leon3/grp.yml
+++ b/spec/build/bsps/sparc/leon3/grp.yml
@@ -38,6 +38,8 @@ links:
   uid: optconirq
 - role: build-dependency
   uid: optleon3smp
+- role: build-dependency
+  uid: optplbfreq
 - role: build-dependency
   uid: optpwrdwnhlt
 - role: build-dependency
diff --git a/spec/build/bsps/sparc/leon3/optplbfreq.yml 
b/spec/build/bsps/sparc/leon3/optplbfreq.yml
new file mode 100644
index 00..f542e322ac
--- /dev/null
+++ b/spec/build/bsps/sparc/leon3/optplbfreq.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH & Co. KG
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+default:
+- enabl

[PATCH v2 08/32] bsp/leon3: Untangle interrupt controller support

[Sebastian Huber]

Separate the probing of the interrupt controller from the
initialization.
---
 bsps/sparc/leon3/include/bsp/irqimpl.h | 83 ++
 bsps/sparc/leon3/include/leon.h| 10 +---
 bsps/sparc/leon3/start/amba.c  |  9 ---
 bsps/sparc/leon3/start/eirq.c  | 15 -
 spec/build/bsps/sparc/leon3/obj.yml|  1 +
 5 files changed, 97 insertions(+), 21 deletions(-)
 create mode 100644 bsps/sparc/leon3/include/bsp/irqimpl.h

diff --git a/bsps/sparc/leon3/include/bsp/irqimpl.h 
b/bsps/sparc/leon3/include/bsp/irqimpl.h
new file mode 100644
index 00..77619c99b9
--- /dev/null
+++ b/bsps/sparc/leon3/include/bsp/irqimpl.h
@@ -0,0 +1,83 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsSPARCLEON3
+ *
+ * @brief This header file provides interfaces used by the interrupt support
+ *   implementation.
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH & Co. KG
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LIBBSP_SPARC_LEON3_BSP_IRQIMPL_H
+#define LIBBSP_SPARC_LEON3_BSP_IRQIMPL_H
+
+#include 
+#include 
+
+struct ambapp_dev;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @addtogroup RTEMSBSPsSPARCLEON3
+ *
+ * @{
+ */
+
+/**
+ * @brief This lock serializes the interrupt controller access.
+ */
+extern rtems_interrupt_lock LEON3_IrqCtrl_Lock;
+
+/**
+ * @brief This pointer provides the IRQ(A)MP register block address.
+ */
+extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs;
+
+/**
+ * @brief This pointer provides the IRQ(A)MP device information block.
+ */
+extern struct ambapp_dev *LEON3_IrqCtrl_Adev;
+
+/**
+ * @brief Initializes the interrupt controller for the boot processor.
+ *
+ * @param[in, out] regs is the IRQ(A)MP register block address.
+ */
+void leon3_ext_irq_init( volatile struct irqmp_regs *regs );
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LIBBSP_SPARC_LEON3_BSP_IRQIMPL_H */
diff --git a/bsps/sparc/leon3/include/leon.h b/bsps/sparc/leon3/include/leon.h
index 6294feb8a7..0382e1b7e3 100644
--- a/bsps/sparc/leon3/include/leon.h
+++ b/bsps/sparc/leon3/include/leon.h
@@ -44,6 +44,7 @@
 
 #include 
 #include 
+#include 
 
 #ifdef __cplusplus
 extern "C" {
@@ -146,10 +147,6 @@ extern "C" {
 #define LEON3_REG_CACHE_CTRL_FI  0x0020 /* Flush instruction cache */
 #define LEON3_REG_CACHE_CTRL_DS  0x0080 /* Data cache snooping */
 
-/* LEON3 Interrupt Controller */
-extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs;
-extern struct ambapp_dev *LEON3_IrqCtrl_Adev;
-
 /* LEON3 GP Timer */
 extern volatile struct gptimer_regs *LEON3_Timer_Regs;
 extern struct ambapp_dev *LEON3_Timer_Adev;
@@ -193,8 +190,6 @@ static __inline__ int bsp_irq_fixup(int irq)
  *store the result back are vulnerable.
  */
 
-extern rtems_interrupt_lock LEON3_IrqCtrl_Lock;
-
 #define LEON3_IRQCTRL_ACQUIRE( _lock_context ) \
   rtems_interrupt_lock_acquire( &LEON3_IrqCtrl_Lock, _lock_context )
 
@@ -410,9 +405,6 @@ extern int leon3_timer_core_index;
  */
 extern unsigned int leon3_timer_prescaler;
 
-/* GRLIB extended IRQ controller register */
-void leon3_ext_irq_init(void);
-
 RTEMS_NO_RETURN void leon3_power_down_loop(void);
 
 static inline uint32_t leon3_get_cpu_count(
diff --git a/bsps/sparc/leon3/start/amba.c b/bsps/sparc/leon3/start/amba.c
index 15b72dcbe8..5ce3de6bdd 100644
--- a/bsps/sparc/leon3/start/amba.c
+++ b/bsps/sparc/leon3/start/amba.c
@@ -115,9 +115,6 @@ RTEMS_SYSINIT_ITEM(
 );
 #endif
 
-rtems_interrupt_lock LEON3_IrqCtrl_Lock =
-  RTEMS_INTERRUPT_LOCK_INITIALIZER("LEON3 IrqCtrl");
-
 /* Pointers to Interrupt Controller configuration registers */
 volatile struct irqmp_regs *LEON3_IrqCtrl_Regs;
 struct ambapp_dev *LEON

[PATCH v2 30/32] validation: grlib

[Sebastian Huber]

---
 .../testsuites/validation/bsps/objgrlib.yml   |  16 +
 .../validation/bsps/validation-bsp-0.yml  |  23 ++
 spec/build/testsuites/validation/grp.yml  |   3 +
 .../validation/bsps/ts-validation-bsp-0.c |  73 
 .../tc-dev-grlib-apbuart-inbyte-nonblocking.c | 348 ++
 testsuites/validation/tc-dev-grlib-io.c   | 295 +++
 .../tc-dev-grlib-irqamp-get-timestamp.c   | 304 +++
 7 files changed, 1062 insertions(+)
 create mode 100644 spec/build/testsuites/validation/bsps/objgrlib.yml
 create mode 100644 spec/build/testsuites/validation/bsps/validation-bsp-0.yml
 create mode 100644 testsuites/validation/bsps/ts-validation-bsp-0.c
 create mode 100644 
testsuites/validation/tc-dev-grlib-apbuart-inbyte-nonblocking.c
 create mode 100644 testsuites/validation/tc-dev-grlib-io.c
 create mode 100644 testsuites/validation/tc-dev-grlib-irqamp-get-timestamp.c

diff --git a/spec/build/testsuites/validation/bsps/objgrlib.yml 
b/spec/build/testsuites/validation/bsps/objgrlib.yml
new file mode 100644
index 00..9a5df84195
--- /dev/null
+++ b/spec/build/testsuites/validation/bsps/objgrlib.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH & Co. KG
+cppflags: []
+cxxflags: []
+enabled-by: bsps/sparc/leon3
+includes: []
+install: []
+links: []
+source:
+- testsuites/validation/tc-dev-grlib-apbuart-inbyte-nonblocking.c
+- testsuites/validation/tc-dev-grlib-io.c
+- testsuites/validation/tc-dev-grlib-irqamp-get-timestamp.c
+type: build
diff --git a/spec/build/testsuites/validation/bsps/validation-bsp-0.yml 
b/spec/build/testsuites/validation/bsps/validation-bsp-0.yml
new file mode 100644
index 00..fd88eddf99
--- /dev/null
+++ b/spec/build/testsuites/validation/bsps/validation-bsp-0.yml
@@ -0,0 +1,23 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: test-program
+cflags: []
+copyrights:
+- Copyright (C) 2023 embedded brains GmbH & Co. KG
+cppflags: []
+cxxflags: []
+enabled-by: bsps/sparc/leon3
+features: c cprogram
+includes: []
+ldflags:
+- -Wl,--wrap=_IO_Relax
+links:
+- role: build-dependency
+  uid: objgrlib
+source:
+- testsuites/validation/bsps/ts-validation-bsp-0.c
+stlib: []
+target: testsuites/validation/ts-validation-bsp-0.exe
+type: build
+use-after:
+- validation
+use-before: []
diff --git a/spec/build/testsuites/validation/grp.yml 
b/spec/build/testsuites/validation/grp.yml
index 9aa9daff44..9000cf9624 100644
--- a/spec/build/testsuites/validation/grp.yml
+++ b/spec/build/testsuites/validation/grp.yml
@@ -10,6 +10,7 @@ enabled-by:
 - BUILD_VALIDATIONTESTS
 includes:
 - ${BSP_INCLUDES}
+- testsuites/validation
 install: []
 ldflags: []
 links:
@@ -79,6 +80,8 @@ links:
   uid: validation-tls-0
 - role: build-dependency
   uid: validation-tls-1
+- role: build-dependency
+  uid: bsps/validation-bsp-0
 type: build
 use-after:
 - validation
diff --git a/testsuites/validation/bsps/ts-validation-bsp-0.c 
b/testsuites/validation/bsps/ts-validation-bsp-0.c
new file mode 100644
index 00..c072c8fdf1
--- /dev/null
+++ b/testsuites/validation/bsps/ts-validation-bsp-0.c
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup TestsuitesBspsValidationBsp0
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH & Co. KG
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file is part of the RTEMS quality process and was automatically
+ * generated.  If you find something that needs to be fixed or
+ * worded better please post a report or patch to an RTEMS mailing list
+ * or raise a bug report:
+ *
+ * https://www.r

[PATCH v2 29/32] bsp/leon3: Add specialized target hash

[Sebastian Huber]

---
 bsps/sparc/leon3/start/gettargethash.c | 71 ++
 spec/build/bsps/sparc/leon3/obj.yml|  2 +-
 2 files changed, 72 insertions(+), 1 deletion(-)
 create mode 100644 bsps/sparc/leon3/start/gettargethash.c

diff --git a/bsps/sparc/leon3/start/gettargethash.c 
b/bsps/sparc/leon3/start/gettargethash.c
new file mode 100644
index 00..c51031dc4f
--- /dev/null
+++ b/bsps/sparc/leon3/start/gettargethash.c
@@ -0,0 +1,71 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsSPARCLEON3
+ *
+ * @brief This source file contains the sparc/leon3 implementation of
+ *   rtems_get_target_hash().
+ */
+
+/*
+ * Copyright (C) 2021, 2022 embedded brains GmbH & Co. KG
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+static Hash_Control bsp_target_hash;
+
+static void bsp_target_hash_initialize( void )
+{
+  Hash_Context context;
+  uint32_t frequency;
+
+  _Hash_Initialize( &context );
+
+  frequency = rtems_counter_frequency();
+  _Hash_Add_data( &context, &frequency, sizeof( frequency ) );
+
+  frequency = leon3_processor_local_bus_frequency();
+  _Hash_Add_data( &context, &frequency, sizeof( frequency ) );
+
+  _Hash_Finalize( &context, &bsp_target_hash );
+}
+
+const char *rtems_get_target_hash( void )
+{
+  return _Hash_Get_string( &bsp_target_hash );
+}
+
+RTEMS_SYSINIT_ITEM(
+  bsp_target_hash_initialize,
+  RTEMS_SYSINIT_TARGET_HASH,
+  RTEMS_SYSINIT_ORDER_SECOND
+);
diff --git a/spec/build/bsps/sparc/leon3/obj.yml 
b/spec/build/bsps/sparc/leon3/obj.yml
index fed50499b4..7a4ccaa0cb 100644
--- a/spec/build/bsps/sparc/leon3/obj.yml
+++ b/spec/build/bsps/sparc/leon3/obj.yml
@@ -32,7 +32,6 @@ source:
 - bsps/shared/dev/serial/console-termios.c
 - bsps/shared/irq/irq-default-handler.c
 - bsps/shared/start/bspreset-empty.c
-- bsps/shared/start/gettargethash-default.c
 - bsps/shared/start/sbrk.c
 - bsps/sparc/leon3/btimer/btimer.c
 - bsps/sparc/leon3/btimer/watchdog.c
@@ -49,6 +48,7 @@ source:
 - bsps/sparc/leon3/start/cpucounter.c
 - bsps/sparc/leon3/start/drvmgr_def_drivers.c
 - bsps/sparc/leon3/start/eirq.c
+- bsps/sparc/leon3/start/gettargethash.c
 - bsps/sparc/leon3/start/setvec.c
 - bsps/sparc/shared/gnatcommon.c
 - bsps/sparc/shared/irq/bsp_isr_handler.c
-- 
2.35.3

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[PATCH v2 00/32] Integrate pre-qualified LEON3 BSP

[Sebastian Huber]

The register block specification were recently integrated in the RTEMS
Software Engineering manual.  Now it is time to integrate the
pre-qualified LEON3 BSP which uses the generated GRLIB header files.

The existing tests in the RTEMS test suite are basically BSP
independent. This patch set introduces BSP-specific validation tests.
These tests are disabled for other BSPs through the build system, for
example:

spec/build/testsuites/validation/bsp-sparc-leon3-gr712rc.yml
[...]
cxxflags: []
enabled-by: sparc/gr712rc
features: c cprogram
[...]

The patch set introduces new header files for GRLIB in
"bsps/include/grlib".  These header files were generated from
specification items in:

https://github.com/RTEMS/rtems-central/tree/master/spec/dev/grlib/if

The specification was created using the GRIP reference manual
(https://www.gaisler.com/products/grlib/grip.pdf) and is quite complete.
The generated header files were reviewed by the ISVV activity which
resulted in two tickets:

https://devel.rtems.org/ticket/4828

https://devel.rtems.org/ticket/4842

In the long term, the existing GRLIB header files should be replaced by
the generated header files. Using specification items for the register
blocks has the potential benefit that, in addition to the C header
files, files for C++/Rust/Python could be generated.

The main change for the sparc/gr712rc and sparc/gr740 BSPs is the
removal of the dynamic device enumeration in favor of a static
initialization.  This greatly simplifies the specification and
validation of the BSP-specific parts. It also reduces the code and data
size for applications which do not need the dynamic device enumeration.

v2:

* Move BSP-specific tests to "testsuites/validation/bsps".

* Rearrange patches so that they build individually.

Sebastian Huber (32):
  bsps/grlib: Add generated headers
  bsps/grlib: Fix FTMCTRL - MCFG1 bit fields
  bsps/grlib: Fix GRGPIO - IRQMAP bit fields
  bsps/grlib: Fix SpaceWire RMAP - Product ID
  bsps/grlib: Expand SpaceWire port bit fields
  bsps/grlib: Fix SPWTDP register name
  bsps: Use new APBUART register block API
  bsp/leon3: Untangle interrupt controller support
  bsp/leon3: Move and simplify bsp_irq_fixup()
  bsp/leon3: Use new IRQ(A)MP register block API
  bsp/leon3: Move system control register support
  bsp/leon3: Use new GPTIMER register block API
  bsp/leon3: Use new L2CACHE register block API
  bsp/leon3: Add LEON3_APBUART_BASE
  bsp/leon3: LEON3_PLB_FREQUENCY_DEFINED_BY_GPTIMER
  bsp/leon3: Add LEON3_GPTIMER_BASE
  bsp/leon3: Add LEON3_IRQAMP_BASE
  bsp/leon3: Add LEON3_IRQAMP_PROBE_TIMESTAMP
  bsp/leon3: Add LEON3_HAS_ASR_22_23_UP_COUNTER
  bsp/leon3: Add LEON3_L2CACHE_BASE
  bsp/leon3: Move leon3_power_down_loop()
  bsp/leon3: Simplify fatal error handling
  bsp/leon3: Add LEON3_PROBE_ASR_22_23_UP_COUNTER
  bsp/leon3: Add LEON3_IRQAMP_EXTENDED_INTERRUPT
  bsp/leon3: Use LEON3_GPTIMER_BASE
  bsp/leon3: Enable up-counter conditionally
  bsps/sparc: Remove BSP_POWER_DOWN_AT_FATAL_HALT
  bsp/leon3: Fix group memberships
  bsp/leon3: Add specialized target hash
  validation: grlib
  validation: Test sparc/leon3 BSP family
  bsp/leon3: Simplify shutdown

 bsps/include/grlib/ahbstat-regs.h |  171 ++
 bsps/include/grlib/ahbtrace-regs.h|  313 
 bsps/include/grlib/apbuart-regs.h |  281 
 bsps/include/grlib/apbuart.h  |  108 +-
 bsps/include/grlib/apbuart_termios.h  |4 +-
 bsps/include/grlib/dsu4-regs.h|  788 +
 bsps/include/grlib/ftmctrl-regs.h |  322 
 bsps/include/grlib/gptimer-regs.h |  379 +
 bsps/include/grlib/gr1553b-regs.h | 1393 
 bsps/include/grlib/gr740thsens-regs.h |  226 +++
 bsps/include/grlib/grcan-regs.h   |  722 +
 bsps/include/grlib/grclkgate-regs.h   |  212 +++
 bsps/include/grlib/grethgbit-regs.h   |  446 +
 bsps/include/grlib/grgpio-regs.h  |  630 +++
 bsps/include/grlib/grgprbank-regs.h   |  677 
 bsps/include/grlib/grgpreg-regs.h |  135 ++
 bsps/include/grlib/griommu-regs.h |  878 ++
 bsps/include/grlib/grpci2-regs.h  |  875 ++
 bsps/include/grlib/grspw2-regs.h  |  587 +++
 bsps/include/grlib/grspwrouter-regs.h |  890 ++
 bsps/include/grlib/irqamp-regs.h  |  874 ++
 bsps/include/grlib/irqamp.h   |  101 ++
 bsps/include/grlib/l2cache-regs.h |  807 +
 bsps/include/grlib/l4stat-regs.h  |  297 
 bsps/include/grlib/memscrub-regs.h|  568 +++
 bsps/include/grlib/mmctrl-regs.h  |  434 +
 bsps/include/grlib/spictrl-regs.h |  464 ++
 bsps/include/grlib/spwpnp-regs.h  |  553 +++
 bsps/include/grlib/spwrmap-regs.h | 1443 +
 bsps/include/grlib/spwtdp-regs.h 

[PATCH v2 05/32] bsps/grlib: Expand SpaceWire port bit fields

[Sebastian Huber]

Use the maximum width supported by the SpaceWire standard even if this
exceeds the configuration limits of a particular IP instance.

Update #4842.
---
 bsps/include/grlib/spwpnp-regs.h  | 2 +-
 bsps/include/grlib/spwrmap-regs.h | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/bsps/include/grlib/spwpnp-regs.h b/bsps/include/grlib/spwpnp-regs.h
index 45550e3a79..00c688bc55 100644
--- a/bsps/include/grlib/spwpnp-regs.h
+++ b/bsps/include/grlib/spwpnp-regs.h
@@ -194,7 +194,7 @@ extern "C" {
  */
 
 #define SPWPNP_PNPACTLNK_ACTIVE_SHIFT 1
-#define SPWPNP_PNPACTLNK_ACTIVE_MASK 0x1ffeU
+#define SPWPNP_PNPACTLNK_ACTIVE_MASK 0xfffeU
 #define SPWPNP_PNPACTLNK_ACTIVE_GET( _reg ) \
   ( ( ( _reg ) & SPWPNP_PNPACTLNK_ACTIVE_MASK ) >> \
 SPWPNP_PNPACTLNK_ACTIVE_SHIFT )
diff --git a/bsps/include/grlib/spwrmap-regs.h 
b/bsps/include/grlib/spwrmap-regs.h
index 7a19f4a2d3..9a0ed203f3 100644
--- a/bsps/include/grlib/spwrmap-regs.h
+++ b/bsps/include/grlib/spwrmap-regs.h
@@ -751,7 +751,7 @@ extern "C" {
  */
 
 #define SPWRMAP_IPMASK_IE_SHIFT 0
-#define SPWRMAP_IPMASK_IE_MASK 0xfU
+#define SPWRMAP_IPMASK_IE_MASK 0xU
 #define SPWRMAP_IPMASK_IE_GET( _reg ) \
   ( ( ( _reg ) & SPWRMAP_IPMASK_IE_MASK ) >> \
 SPWRMAP_IPMASK_IE_SHIFT )
@@ -774,7 +774,7 @@ extern "C" {
  */
 
 #define SPWRMAP_PIP_IP_SHIFT 0
-#define SPWRMAP_PIP_IP_MASK 0xfU
+#define SPWRMAP_PIP_IP_MASK 0xU
 #define SPWRMAP_PIP_IP_GET( _reg ) \
   ( ( ( _reg ) & SPWRMAP_PIP_IP_MASK ) >> \
 SPWRMAP_PIP_IP_SHIFT )
@@ -953,7 +953,7 @@ extern "C" {
  */
 
 #define SPWRMAP_LRUNSTAT_LR_SHIFT 1
-#define SPWRMAP_LRUNSTAT_LR_MASK 0x7fffeU
+#define SPWRMAP_LRUNSTAT_LR_MASK 0xfffeU
 #define SPWRMAP_LRUNSTAT_LR_GET( _reg ) \
   ( ( ( _reg ) & SPWRMAP_LRUNSTAT_LR_MASK ) >> \
 SPWRMAP_LRUNSTAT_LR_SHIFT )
-- 
2.35.3

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[PATCH v2 04/32] bsps/grlib: Fix SpaceWire RMAP - Product ID

[Sebastian Huber]

Update #4842.
---
 bsps/include/grlib/spwrmap-regs.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/bsps/include/grlib/spwrmap-regs.h 
b/bsps/include/grlib/spwrmap-regs.h
index a75b02a39b..7a19f4a2d3 100644
--- a/bsps/include/grlib/spwrmap-regs.h
+++ b/bsps/include/grlib/spwrmap-regs.h
@@ -1075,7 +1075,7 @@ extern "C" {
 SPWRMAP_PNPVEND_VI_MASK )
 
 #define SPWRMAP_PNPVEND_PI_SHIFT 0
-#define SPWRMAP_PNPVEND_PI_MASK 0x3ffU
+#define SPWRMAP_PNPVEND_PI_MASK 0xU
 #define SPWRMAP_PNPVEND_PI_GET( _reg ) \
   ( ( ( _reg ) & SPWRMAP_PNPVEND_PI_MASK ) >> \
 SPWRMAP_PNPVEND_PI_SHIFT )
@@ -1112,7 +1112,7 @@ extern "C" {
 SPWRMAP_PNPUVEND_VI_MASK )
 
 #define SPWRMAP_PNPUVEND_PI_SHIFT 0
-#define SPWRMAP_PNPUVEND_PI_MASK 0x3ffU
+#define SPWRMAP_PNPUVEND_PI_MASK 0xU
 #define SPWRMAP_PNPUVEND_PI_GET( _reg ) \
   ( ( ( _reg ) & SPWRMAP_PNPUVEND_PI_MASK ) >> \
 SPWRMAP_PNPUVEND_PI_SHIFT )
-- 
2.35.3

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[PATCH v2 03/32] bsps/grlib: Fix GRGPIO - IRQMAP bit fields

[Sebastian Huber]

Update #4842.
---
 bsps/include/grlib/grgpio-regs.h | 37 +---
 1 file changed, 24 insertions(+), 13 deletions(-)

diff --git a/bsps/include/grlib/grgpio-regs.h b/bsps/include/grlib/grgpio-regs.h
index b1768ff92e..8c3c7ffb16 100644
--- a/bsps/include/grlib/grgpio-regs.h
+++ b/bsps/include/grlib/grgpio-regs.h
@@ -285,18 +285,18 @@ extern "C" {
  * @{
  */
 
-#define GRGPIO_IRQMAPR_IRQMAP_I_SHIFT 24
-#define GRGPIO_IRQMAPR_IRQMAP_I_MASK 0x7f00U
-#define GRGPIO_IRQMAPR_IRQMAP_I_GET( _reg ) \
-  ( ( ( _reg ) & GRGPIO_IRQMAPR_IRQMAP_I_MASK ) >> \
-GRGPIO_IRQMAPR_IRQMAP_I_SHIFT )
-#define GRGPIO_IRQMAPR_IRQMAP_I_SET( _reg, _val ) \
-  ( ( ( _reg ) & ~GRGPIO_IRQMAPR_IRQMAP_I_MASK ) | \
-( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_SHIFT ) & \
-  GRGPIO_IRQMAPR_IRQMAP_I_MASK ) )
-#define GRGPIO_IRQMAPR_IRQMAP_I( _val ) \
-  ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_SHIFT ) & \
-GRGPIO_IRQMAPR_IRQMAP_I_MASK )
+#define GRGPIO_IRQMAPR_IRQMAP_I_0_SHIFT 24
+#define GRGPIO_IRQMAPR_IRQMAP_I_0_MASK 0x1f00U
+#define GRGPIO_IRQMAPR_IRQMAP_I_0_GET( _reg ) \
+  ( ( ( _reg ) & GRGPIO_IRQMAPR_IRQMAP_I_0_MASK ) >> \
+GRGPIO_IRQMAPR_IRQMAP_I_0_SHIFT )
+#define GRGPIO_IRQMAPR_IRQMAP_I_0_SET( _reg, _val ) \
+  ( ( ( _reg ) & ~GRGPIO_IRQMAPR_IRQMAP_I_0_MASK ) | \
+( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_0_SHIFT ) & \
+  GRGPIO_IRQMAPR_IRQMAP_I_0_MASK ) )
+#define GRGPIO_IRQMAPR_IRQMAP_I_0( _val ) \
+  ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_0_SHIFT ) & \
+GRGPIO_IRQMAPR_IRQMAP_I_0_MASK )
 
 #define GRGPIO_IRQMAPR_IRQMAP_I_1_SHIFT 16
 #define GRGPIO_IRQMAPR_IRQMAP_I_1_MASK 0x1fU
@@ -324,7 +324,18 @@ extern "C" {
   ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_2_SHIFT ) & \
 GRGPIO_IRQMAPR_IRQMAP_I_2_MASK )
 
-#define GRGPIO_IRQMAPR_IRQMAP_I_3 0x10U
+#define GRGPIO_IRQMAPR_IRQMAP_I_3_SHIFT 0
+#define GRGPIO_IRQMAPR_IRQMAP_I_3_MASK 0x1fU
+#define GRGPIO_IRQMAPR_IRQMAP_I_3_GET( _reg ) \
+  ( ( ( _reg ) & GRGPIO_IRQMAPR_IRQMAP_I_3_MASK ) >> \
+GRGPIO_IRQMAPR_IRQMAP_I_3_SHIFT )
+#define GRGPIO_IRQMAPR_IRQMAP_I_3_SET( _reg, _val ) \
+  ( ( ( _reg ) & ~GRGPIO_IRQMAPR_IRQMAP_I_3_MASK ) | \
+( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_3_SHIFT ) & \
+  GRGPIO_IRQMAPR_IRQMAP_I_3_MASK ) )
+#define GRGPIO_IRQMAPR_IRQMAP_I_3( _val ) \
+  ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_3_SHIFT ) & \
+GRGPIO_IRQMAPR_IRQMAP_I_3_MASK )
 
 /** @} */
 
-- 
2.35.3

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[PATCH v2 06/32] bsps/grlib: Fix SPWTDP register name

[Sebastian Huber]

Update #4842.
---
 bsps/include/grlib/spwtdp-regs.h | 32 
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/bsps/include/grlib/spwtdp-regs.h b/bsps/include/grlib/spwtdp-regs.h
index b69fb5b0a5..2e951e4544 100644
--- a/bsps/include/grlib/spwtdp-regs.h
+++ b/bsps/include/grlib/spwtdp-regs.h
@@ -304,25 +304,25 @@ extern "C" {
 /** @} */
 
 /**
- * @defgroup RTEMSDeviceGRLIBSPWTDPCET0 Command Elapsed Time 3 (CET0)
+ * @defgroup RTEMSDeviceGRLIBSPWTDPCET3 Command Elapsed Time 3 (CET3)
  *
  * @brief This group contains register bit definitions.
  *
  * @{
  */
 
-#define SPWTDP_CET0_CET3_SHIFT 0
-#define SPWTDP_CET0_CET3_MASK 0xU
-#define SPWTDP_CET0_CET3_GET( _reg ) \
-  ( ( ( _reg ) & SPWTDP_CET0_CET3_MASK ) >> \
-SPWTDP_CET0_CET3_SHIFT )
-#define SPWTDP_CET0_CET3_SET( _reg, _val ) \
-  ( ( ( _reg ) & ~SPWTDP_CET0_CET3_MASK ) | \
-( ( ( _val ) << SPWTDP_CET0_CET3_SHIFT ) & \
-  SPWTDP_CET0_CET3_MASK ) )
-#define SPWTDP_CET0_CET3( _val ) \
-  ( ( ( _val ) << SPWTDP_CET0_CET3_SHIFT ) & \
-SPWTDP_CET0_CET3_MASK )
+#define SPWTDP_CET3_CET3_SHIFT 0
+#define SPWTDP_CET3_CET3_MASK 0xU
+#define SPWTDP_CET3_CET3_GET( _reg ) \
+  ( ( ( _reg ) & SPWTDP_CET3_CET3_MASK ) >> \
+SPWTDP_CET3_CET3_SHIFT )
+#define SPWTDP_CET3_CET3_SET( _reg, _val ) \
+  ( ( ( _reg ) & ~SPWTDP_CET3_CET3_MASK ) | \
+( ( ( _val ) << SPWTDP_CET3_CET3_SHIFT ) & \
+  SPWTDP_CET3_CET3_MASK ) )
+#define SPWTDP_CET3_CET3( _val ) \
+  ( ( ( _val ) << SPWTDP_CET3_CET3_SHIFT ) & \
+SPWTDP_CET3_CET3_MASK )
 
 /** @} */
 
@@ -1075,7 +1075,7 @@ typedef struct spwtdp {
   /**
* @brief See @ref RTEMSDeviceGRLIBSPWTDPCET0.
*/
-  uint32_t cet0_0;
+  uint32_t cet0;
 
   /**
* @brief See @ref RTEMSDeviceGRLIBSPWTDPCET1.
@@ -1088,9 +1088,9 @@ typedef struct spwtdp {
   uint32_t cet2;
 
   /**
-   * @brief See @ref RTEMSDeviceGRLIBSPWTDPCET0.
+   * @brief See @ref RTEMSDeviceGRLIBSPWTDPCET3.
*/
-  uint32_t cet0_1;
+  uint32_t cet3;
 
   /**
* @brief See @ref RTEMSDeviceGRLIBSPWTDPCET4.
-- 
2.35.3

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[PATCH v2 02/32] bsps/grlib: Fix FTMCTRL - MCFG1 bit fields

[Sebastian Huber]

There was an off by one error in all bit fields.  Add the R flag.

Update #4842.
---
 bsps/include/grlib/ftmctrl-regs.h | 127 --
 1 file changed, 70 insertions(+), 57 deletions(-)

diff --git a/bsps/include/grlib/ftmctrl-regs.h 
b/bsps/include/grlib/ftmctrl-regs.h
index 6de7d49fd6..fb4203270c 100644
--- a/bsps/include/grlib/ftmctrl-regs.h
+++ b/bsps/include/grlib/ftmctrl-regs.h
@@ -82,59 +82,61 @@ extern "C" {
  * @{
  */
 
-#define FTMCTRL_MCFG1_PBRDY 0x8000U
-
-#define FTMCTRL_MCFG1_ABRDY 0x4000U
-
-#define FTMCTRL_MCFG1_IOBUSW 0x2000U
-
-#define FTMCTRL_MCFG1_IBRDY_SHIFT 27
-#define FTMCTRL_MCFG1_IBRDY_MASK 0x1800U
-#define FTMCTRL_MCFG1_IBRDY_GET( _reg ) \
-  ( ( ( _reg ) & FTMCTRL_MCFG1_IBRDY_MASK ) >> \
-FTMCTRL_MCFG1_IBRDY_SHIFT )
-#define FTMCTRL_MCFG1_IBRDY_SET( _reg, _val ) \
-  ( ( ( _reg ) & ~FTMCTRL_MCFG1_IBRDY_MASK ) | \
-( ( ( _val ) << FTMCTRL_MCFG1_IBRDY_SHIFT ) & \
-  FTMCTRL_MCFG1_IBRDY_MASK ) )
-#define FTMCTRL_MCFG1_IBRDY( _val ) \
-  ( ( ( _val ) << FTMCTRL_MCFG1_IBRDY_SHIFT ) & \
-FTMCTRL_MCFG1_IBRDY_MASK )
-
-#define FTMCTRL_MCFG1_BEXCN 0x400U
-
-#define FTMCTRL_MCFG1_IO_WAITSTATES 0x100U
-
-#define FTMCTRL_MCFG1_IOEN_SHIFT 20
-#define FTMCTRL_MCFG1_IOEN_MASK 0xf0U
-#define FTMCTRL_MCFG1_IOEN_GET( _reg ) \
-  ( ( ( _reg ) & FTMCTRL_MCFG1_IOEN_MASK ) >> \
-FTMCTRL_MCFG1_IOEN_SHIFT )
-#define FTMCTRL_MCFG1_IOEN_SET( _reg, _val ) \
-  ( ( ( _reg ) & ~FTMCTRL_MCFG1_IOEN_MASK ) | \
-( ( ( _val ) << FTMCTRL_MCFG1_IOEN_SHIFT ) & \
-  FTMCTRL_MCFG1_IOEN_MASK ) )
-#define FTMCTRL_MCFG1_IOEN( _val ) \
-  ( ( ( _val ) << FTMCTRL_MCFG1_IOEN_SHIFT ) & \
-FTMCTRL_MCFG1_IOEN_MASK )
-
-#define FTMCTRL_MCFG1_ROMBANKSZ 0x8U
-
-#define FTMCTRL_MCFG1_PWEN_SHIFT 14
-#define FTMCTRL_MCFG1_PWEN_MASK 0x3c000U
-#define FTMCTRL_MCFG1_PWEN_GET( _reg ) \
-  ( ( ( _reg ) & FTMCTRL_MCFG1_PWEN_MASK ) >> \
-FTMCTRL_MCFG1_PWEN_SHIFT )
-#define FTMCTRL_MCFG1_PWEN_SET( _reg, _val ) \
-  ( ( ( _reg ) & ~FTMCTRL_MCFG1_PWEN_MASK ) | \
-( ( ( _val ) << FTMCTRL_MCFG1_PWEN_SHIFT ) & \
-  FTMCTRL_MCFG1_PWEN_MASK ) )
-#define FTMCTRL_MCFG1_PWEN( _val ) \
-  ( ( ( _val ) << FTMCTRL_MCFG1_PWEN_SHIFT ) & \
-FTMCTRL_MCFG1_PWEN_MASK )
-
-#define FTMCTRL_MCFG1_PROM_WIDTH_SHIFT 12
-#define FTMCTRL_MCFG1_PROM_WIDTH_MASK 0x3000U
+#define FTMCTRL_MCFG1_PBRDY 0x4000U
+
+#define FTMCTRL_MCFG1_ABRDY 0x2000U
+
+#define FTMCTRL_MCFG1_IOBUSW_SHIFT 27
+#define FTMCTRL_MCFG1_IOBUSW_MASK 0x1800U
+#define FTMCTRL_MCFG1_IOBUSW_GET( _reg ) \
+  ( ( ( _reg ) & FTMCTRL_MCFG1_IOBUSW_MASK ) >> \
+FTMCTRL_MCFG1_IOBUSW_SHIFT )
+#define FTMCTRL_MCFG1_IOBUSW_SET( _reg, _val ) \
+  ( ( ( _reg ) & ~FTMCTRL_MCFG1_IOBUSW_MASK ) | \
+( ( ( _val ) << FTMCTRL_MCFG1_IOBUSW_SHIFT ) & \
+  FTMCTRL_MCFG1_IOBUSW_MASK ) )
+#define FTMCTRL_MCFG1_IOBUSW( _val ) \
+  ( ( ( _val ) << FTMCTRL_MCFG1_IOBUSW_SHIFT ) & \
+FTMCTRL_MCFG1_IOBUSW_MASK )
+
+#define FTMCTRL_MCFG1_IBRDY 0x400U
+
+#define FTMCTRL_MCFG1_BEXCN 0x200U
+
+#define FTMCTRL_MCFG1_IO_WAITSTATES_SHIFT 20
+#define FTMCTRL_MCFG1_IO_WAITSTATES_MASK 0xf0U
+#define FTMCTRL_MCFG1_IO_WAITSTATES_GET( _reg ) \
+  ( ( ( _reg ) & FTMCTRL_MCFG1_IO_WAITSTATES_MASK ) >> \
+FTMCTRL_MCFG1_IO_WAITSTATES_SHIFT )
+#define FTMCTRL_MCFG1_IO_WAITSTATES_SET( _reg, _val ) \
+  ( ( ( _reg ) & ~FTMCTRL_MCFG1_IO_WAITSTATES_MASK ) | \
+( ( ( _val ) << FTMCTRL_MCFG1_IO_WAITSTATES_SHIFT ) & \
+  FTMCTRL_MCFG1_IO_WAITSTATES_MASK ) )
+#define FTMCTRL_MCFG1_IO_WAITSTATES( _val ) \
+  ( ( ( _val ) << FTMCTRL_MCFG1_IO_WAITSTATES_SHIFT ) & \
+FTMCTRL_MCFG1_IO_WAITSTATES_MASK )
+
+#define FTMCTRL_MCFG1_IOEN 0x8U
+
+#define FTMCTRL_MCFG1_R 0x4U
+
+#define FTMCTRL_MCFG1_ROMBANKSZ_SHIFT 14
+#define FTMCTRL_MCFG1_ROMBANKSZ_MASK 0x3c000U
+#define FTMCTRL_MCFG1_ROMBANKSZ_GET( _reg ) \
+  ( ( ( _reg ) & FTMCTRL_MCFG1_ROMBANKSZ_MASK ) >> \
+FTMCTRL_MCFG1_ROMBANKSZ_SHIFT )
+#define FTMCTRL_MCFG1_ROMBANKSZ_SET( _reg, _val ) \
+  ( ( ( _reg ) & ~FTMCTRL_MCFG1_ROMBANKSZ_MASK ) | \
+( ( ( _val ) << FTMCTRL_MCFG1_ROMBANKSZ_SHIFT ) & \
+  FTMCTRL_MCFG1_ROMBANKSZ_MASK ) )
+#define FTMCTRL_MCFG1_ROMBANKSZ( _val ) \
+  ( ( ( _val ) << FTMCTRL_MCFG1_ROMBANKSZ_SHIFT ) & \
+FTMCTRL_MCFG1_ROMBANKSZ_MASK )
+
+#define FTMCTRL_MCFG1_PWEN 0x800U
+
+#define FTMCTRL_MCFG1_PROM_WIDTH_SHIFT 8
+#define FTMCTRL_MCFG1_PROM_WIDTH_MASK 0x300U
 #define FTMCTRL_MCFG1_PROM_WIDTH_GET( _reg ) \
   ( ( ( _reg ) & FTMCTRL_MCFG1_PROM_WIDTH_MASK ) >> \
 FTMCTRL_MCFG1_PROM_WIDTH_SHIFT )
@@ -146,10 +148,21 @@ extern "C" {
   ( ( ( _val ) << FTMCTRL_MCFG1_PROM_WIDTH_SHIFT ) & \
 FTMCTRL_MCFG1_PROM_WIDTH_MASK )
 
-#define FTMCTRL_MCFG1_PROM_WRITE_WS 0x800U
-
-#define FTMCTRL_MCFG1_PROM_READ_WS_SHIFT 8
-#define FTMCTRL_MCFG1_PROM_READ_WS_MASK 0x300U
+#define FTMCTRL_MCFG1_PROM_WRITE_WS_SHIFT 4
+#define FTMCTRL_MCFG1_PROM_WRITE_WS_MASK 0xf0U
+#define FTMCTRL_MCFG1_PROM_WRITE_WS_GET( _reg ) \
+  ( ( ( _

Re: [PATCH 2/2] bsps: Remove uses of BSP-specific interrupt API

[Chris Johns]

On 16/6/2023 3:36 pm, Sebastian Huber wrote:
> On 16.06.23 07:04, Chris Johns wrote:
>> On 16/6/2023 2:51 pm, Sebastian Huber wrote:
>>> On 16.06.23 03:49, Chris Johns wrote:
> diff --git a/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
> b/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
> index 96b77907a6..bc211e37b6 100644
> --- a/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
> +++ b/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
> @@ -41,7 +41,7 @@
>    #include 
>      #include 
> -#include 
> +#include 
>      #include 
>    @@ -227,7 +227,7 @@ static int ambapp_grlib_int_clear
>    struct drvmgr_dev *dev,
>    int irq)
>    {
> -    BSP_shared_interrupt_clear(irq);
> +    (void) rtems_interrupt_clear(irq);
>    return DRVMGR_OK;
 Why ignore the return code of the clear and assume the result is OK?

 This pattern is repeated in other places.
>>>
>>> This is how it is. I didn't want to introduce functional or API changes with
>>> this patch set.
>>
>> I do not see the API change.
>>
>> If the code here is looking through the interface provided to the 
>> implementation
>> so it knows no error will be returned then it is functionally equivalent to 
>> what
>> exists if the error is checked. Nothing changes. The problem with the change 
>> is
>> using the interface implies the error is being checked and a change in the
>> implementation to return an error would not be handled here. Leaving a latent
>> issue like that does not seem right?
> 
> The BSP_shared_interrupt*() functions have no return value and they didn't 
> check
> anything. The patch was supposed to be a simple change from one API to 
> another.
> I added some error checks to v2 of the patch set.

I appreciate this. The interfaces that return void have no where to go and that
is fine. The ones discussed and updated are different. I was not explicit about
this. The v2 means it is one less thing to deal with later.

Chris
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Re: [PATCH v2 1/3] pci: Do not use BSP-specific interrupt API

[Chris Johns]

Look good.

Thanks
Chris

On 16/6/2023 3:34 pm, Sebastian Huber wrote:
> Update #3269.
> ---
>  cpukit/include/pci/irq.h | 17 -
>  1 file changed, 4 insertions(+), 13 deletions(-)
> 
> diff --git a/cpukit/include/pci/irq.h b/cpukit/include/pci/irq.h
> index 4069f1ffa8..8617dd1680 100644
> --- a/cpukit/include/pci/irq.h
> +++ b/cpukit/include/pci/irq.h
> @@ -38,18 +38,9 @@
>  #ifndef __PCI_IRQ_H__
>  #define __PCI_IRQ_H__
>  
> -#include 
> +#include 
>  #include 
>  
> -/*
> - * FIXME: This should be available via the IRQ extensions API.
> - *
> - * https://devel.rtems.org/ticket/3269
> - */
> -void BSP_shared_interrupt_clear(int irq);
> -void BSP_shared_interrupt_unmask(int irq);
> -void BSP_shared_interrupt_mask(int irq);
> -
>  /* PCI Handler (ISR) called when IRQ is generated by any of the PCI devices
>   * connected to the same PCI IRQ Pin. This has been defined the same way as
>   * rtems_interrupt_handler in order for BSPs to "direct-map" the register
> @@ -106,7 +97,7 @@ static inline int pci_interrupt_unregister(int irq, 
> pci_isr isr,
>   */
>  static inline void pci_interrupt_unmask(int irq)
>  {
> - BSP_shared_interrupt_unmask(irq);
> + (void)rtems_interrupt_vector_enable((rtems_vector_number)irq);
>  }
>  
>  /* Disable shared PCI IRQ handler. This function will mask the interrupt
> @@ -122,7 +113,7 @@ static inline void pci_interrupt_unmask(int irq)
>   */
>  static inline void pci_interrupt_mask(int irq)
>  {
> - BSP_shared_interrupt_mask(irq);
> + (void)rtems_interrupt_vector_disable((rtems_vector_number)irq);
>  }
>  
>  /* Acknowledge the interrupt controller by writing to the interrupt 
> controller.
> @@ -136,7 +127,7 @@ static inline void pci_interrupt_mask(int irq)
>   */
>  static inline void pci_interrupt_clear(int irq)
>  {
> - BSP_shared_interrupt_clear(irq);
> + (void)rtems_interrupt_clear((rtems_vector_number)irq);
>  }
>  
>  #endif /* !__PCI_IRQ_H__ */
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Re: [PATCH 2/2] bsps: Remove uses of BSP-specific interrupt API

[Sebastian Huber]

On 16.06.23 07:04, Chris Johns wrote:

On 16/6/2023 2:51 pm, Sebastian Huber wrote:

On 16.06.23 03:49, Chris Johns wrote:

diff --git a/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
b/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
index 96b77907a6..bc211e37b6 100644
--- a/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
+++ b/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
@@ -41,7 +41,7 @@
   #include 
     #include 
-#include 
+#include 
     #include 
   @@ -227,7 +227,7 @@ static int ambapp_grlib_int_clear
   struct drvmgr_dev *dev,
   int irq)
   {
-    BSP_shared_interrupt_clear(irq);
+    (void) rtems_interrupt_clear(irq);
   return DRVMGR_OK;

Why ignore the return code of the clear and assume the result is OK?

This pattern is repeated in other places.


This is how it is. I didn't want to introduce functional or API changes with
this patch set.


I do not see the API change.

If the code here is looking through the interface provided to the implementation
so it knows no error will be returned then it is functionally equivalent to what
exists if the error is checked. Nothing changes. The problem with the change is
using the interface implies the error is being checked and a change in the
implementation to return an error would not be handled here. Leaving a latent
issue like that does not seem right?


The BSP_shared_interrupt*() functions have no return value and they 
didn't check anything. The patch was supposed to be a simple change from 
one API to another. I added some error checks to v2 of the patch set.


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[PATCH v2 3/3] bsps/sparc: Deprecate BSP-specific interrupt API

[Sebastian Huber]

Update #3269.
---
 bsps/sparc/erc32/include/bsp.h | 10 +-
 bsps/sparc/leon2/include/bsp.h | 10 +-
 bsps/sparc/leon3/include/bsp.h | 10 +-
 3 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/bsps/sparc/erc32/include/bsp.h b/bsps/sparc/erc32/include/bsp.h
index cb62661aa1..1e8bddad33 100644
--- a/bsps/sparc/erc32/include/bsp.h
+++ b/bsps/sparc/erc32/include/bsp.h
@@ -105,7 +105,7 @@ typedef void (*bsp_shared_isr)(void *arg);
  *  isr   Function pointer to the ISR
  *  arg   Second argument to function isr
  */
-static __inline__ int BSP_shared_interrupt_register
+RTEMS_DEPRECATED static inline int BSP_shared_interrupt_register
(
int irq,
const char *info,
@@ -124,7 +124,7 @@ static __inline__ int BSP_shared_interrupt_register
  *  isr   Function pointer to the ISR
  *  arg   Second argument to function isr
  */
-static __inline__ int BSP_shared_interrupt_unregister
+RTEMS_DEPRECATED static inline int BSP_shared_interrupt_unregister
(
int irq,
bsp_shared_isr isr,
@@ -142,7 +142,7 @@ static __inline__ int BSP_shared_interrupt_unregister
  * Arguments
  *  irq   System IRQ number
  */
-static inline void BSP_shared_interrupt_clear( int irq )
+RTEMS_DEPRECATED static inline void BSP_shared_interrupt_clear( int irq )
 {
   (void) rtems_interrupt_clear( (rtems_vector_number) irq );
 }
@@ -154,7 +154,7 @@ static inline void BSP_shared_interrupt_clear( int irq )
  * Arguments
  *  irq   System IRQ number
  */
-static inline void BSP_shared_interrupt_unmask( int irq )
+RTEMS_DEPRECATED static inline void BSP_shared_interrupt_unmask( int irq )
 {
   (void) rtems_interrupt_vector_enable( (rtems_vector_number) irq );
 }
@@ -166,7 +166,7 @@ static inline void BSP_shared_interrupt_unmask( int irq )
  * Arguments
  *  irq System IRQ number
  */
-static inline void BSP_shared_interrupt_mask( int irq )
+RTEMS_DEPRECATED static inline void BSP_shared_interrupt_mask( int irq )
 {
   (void) rtems_interrupt_vector_disable( (rtems_vector_number) irq );
 }
diff --git a/bsps/sparc/leon2/include/bsp.h b/bsps/sparc/leon2/include/bsp.h
index 4a2f5967ef..67601d2351 100644
--- a/bsps/sparc/leon2/include/bsp.h
+++ b/bsps/sparc/leon2/include/bsp.h
@@ -129,7 +129,7 @@ typedef void (*bsp_shared_isr)(void *arg);
  *  isr   Function pointer to the ISR
  *  arg   Second argument to function isr
  */
-static __inline__ int BSP_shared_interrupt_register
+RTEMS_DEPRECATED static inline int BSP_shared_interrupt_register
(
int irq,
const char *info,
@@ -148,7 +148,7 @@ static __inline__ int BSP_shared_interrupt_register
  *  isr   Function pointer to the ISR
  *  arg   Second argument to function isr
  */
-static __inline__ int BSP_shared_interrupt_unregister
+RTEMS_DEPRECATED static inline int BSP_shared_interrupt_unregister
(
int irq,
bsp_shared_isr isr,
@@ -166,7 +166,7 @@ static __inline__ int BSP_shared_interrupt_unregister
  * Arguments
  *  irq   System IRQ number
  */
-static inline void BSP_shared_interrupt_clear( int irq )
+RTEMS_DEPRECATED static inline void BSP_shared_interrupt_clear( int irq )
 {
   (void) rtems_interrupt_clear( (rtems_vector_number) irq );
 }
@@ -178,7 +178,7 @@ static inline void BSP_shared_interrupt_clear( int irq )
  * Arguments
  *  irq   System IRQ number
  */
-static inline void BSP_shared_interrupt_unmask( int irq )
+RTEMS_DEPRECATED static inline void BSP_shared_interrupt_unmask( int irq )
 {
   (void) rtems_interrupt_vector_enable( (rtems_vector_number) irq );
 }
@@ -190,7 +190,7 @@ static inline void BSP_shared_interrupt_unmask( int irq )
  * Arguments
  *  irq System IRQ number
  */
-static inline void BSP_shared_interrupt_mask( int irq )
+RTEMS_DEPRECATED static inline void BSP_shared_interrupt_mask( int irq )
 {
   (void) rtems_interrupt_vector_disable( (rtems_vector_number) irq );
 }
diff --git a/bsps/sparc/leon3/include/bsp.h b/bsps/sparc/leon3/include/bsp.h
index 1712602bfd..ae48d3fd4e 100644
--- a/bsps/sparc/leon3/include/bsp.h
+++ b/bsps/sparc/leon3/include/bsp.h
@@ -148,7 +148,7 @@ typedef void (*bsp_shared_isr)(void *arg);
  *  isr   Function pointer to the ISR
  *  arg   Second argument to function isr
  */
-static __inline__ int BSP_shared_interrupt_register
+RTEMS_DEPRECATED static inline int BSP_shared_interrupt_register
(
int irq,
const char *info,
@@ -167,7 +167,7 @@ static __inline__ int BSP_shared_interrupt_register
  *  isr   Function pointer to the ISR
  *  arg   Second argument to function isr
  */
-static __inline__ int BSP_shared_interrupt_unregister
+RTEMS_DEPRECATED static inline int BSP_shared_interrupt_unregister
(
int irq,
bsp_shared_isr isr,
@@ -185,7 +185,7 @@ static __inline__ int BSP_shared_interrupt_unregister
  * Arguments
  *  irq   System IRQ number
  */
-static inline void BSP_shared_interrupt_clear( int irq )

[PATCH v2 1/3] pci: Do not use BSP-specific interrupt API

[Sebastian Huber]

Update #3269.
---
 cpukit/include/pci/irq.h | 17 -
 1 file changed, 4 insertions(+), 13 deletions(-)

diff --git a/cpukit/include/pci/irq.h b/cpukit/include/pci/irq.h
index 4069f1ffa8..8617dd1680 100644
--- a/cpukit/include/pci/irq.h
+++ b/cpukit/include/pci/irq.h
@@ -38,18 +38,9 @@
 #ifndef __PCI_IRQ_H__
 #define __PCI_IRQ_H__
 
-#include 
+#include 
 #include 
 
-/*
- * FIXME: This should be available via the IRQ extensions API.
- *
- * https://devel.rtems.org/ticket/3269
- */
-void BSP_shared_interrupt_clear(int irq);
-void BSP_shared_interrupt_unmask(int irq);
-void BSP_shared_interrupt_mask(int irq);
-
 /* PCI Handler (ISR) called when IRQ is generated by any of the PCI devices
  * connected to the same PCI IRQ Pin. This has been defined the same way as
  * rtems_interrupt_handler in order for BSPs to "direct-map" the register
@@ -106,7 +97,7 @@ static inline int pci_interrupt_unregister(int irq, pci_isr 
isr,
  */
 static inline void pci_interrupt_unmask(int irq)
 {
-   BSP_shared_interrupt_unmask(irq);
+   (void)rtems_interrupt_vector_enable((rtems_vector_number)irq);
 }
 
 /* Disable shared PCI IRQ handler. This function will mask the interrupt
@@ -122,7 +113,7 @@ static inline void pci_interrupt_unmask(int irq)
  */
 static inline void pci_interrupt_mask(int irq)
 {
-   BSP_shared_interrupt_mask(irq);
+   (void)rtems_interrupt_vector_disable((rtems_vector_number)irq);
 }
 
 /* Acknowledge the interrupt controller by writing to the interrupt controller.
@@ -136,7 +127,7 @@ static inline void pci_interrupt_mask(int irq)
  */
 static inline void pci_interrupt_clear(int irq)
 {
-   BSP_shared_interrupt_clear(irq);
+   (void)rtems_interrupt_clear((rtems_vector_number)irq);
 }
 
 #endif /* !__PCI_IRQ_H__ */
-- 
2.35.3

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[PATCH v2 2/3] bsps: Remove uses of BSP-specific interrupt API

[Sebastian Huber]

Update #3269.
---
 bsps/riscv/griscv/include/bsp.h |  6 -
 bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c | 17 +---
 bsps/sparc/erc32/include/bsp.h  | 15 ---
 bsps/sparc/leon2/include/bsp.h  | 15 ---
 bsps/sparc/leon3/include/bsp.h  | 15 ---
 bsps/sparc/shared/drvmgr/leon2_amba_bus.c   | 16 
 bsps/sparc/shared/irq/irq-shared.c  | 29 -
 spec/build/bsps/sparc/leon3/obj.yml |  1 -
 8 files changed, 60 insertions(+), 54 deletions(-)

diff --git a/bsps/riscv/griscv/include/bsp.h b/bsps/riscv/griscv/include/bsp.h
index 9d6fb2a16f..a0aec4f130 100644
--- a/bsps/riscv/griscv/include/bsp.h
+++ b/bsps/riscv/griscv/include/bsp.h
@@ -69,12 +69,6 @@ extern "C" {
 /* Maximum supported APBUARTs by BSP */
 #define BSP_NUMBER_OF_TERMIOS_PORTS 8
 
-/* GRLIB driver functions */
-
-extern void BSP_shared_interrupt_mask(int irq);
-extern void BSP_shared_interrupt_clear(int irq);
-extern void BSP_shared_interrupt_unmask(int irq);
-
 /*
  * Network driver configuration for greth
  */
diff --git a/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c 
b/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
index 96b77907a6..35d23c1858 100644
--- a/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
+++ b/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
@@ -41,7 +41,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -227,7 +227,10 @@ static int ambapp_grlib_int_clear
struct drvmgr_dev *dev,
int irq)
 {
-   BSP_shared_interrupt_clear(irq);
+   if (rtems_interrupt_clear(irq) != RTEMS_SUCCESSFUL) {
+   return DRVMGR_FAIL;
+   }
+
return DRVMGR_OK;
 }
 
@@ -237,7 +240,10 @@ static int ambapp_grlib_int_mask
int irq
)
 {
-   BSP_shared_interrupt_mask(irq);
+   if (rtems_interrupt_vector_disable(irq) != RTEMS_SUCCESSFUL) {
+   return DRVMGR_FAIL;
+   }
+
return DRVMGR_OK;
 }
 
@@ -247,7 +253,10 @@ static int ambapp_grlib_int_unmask
int irq
)
 {
-   BSP_shared_interrupt_unmask(irq);
+   if (rtems_interrupt_vector_enable(irq) != RTEMS_SUCCESSFUL) {
+   return DRVMGR_FAIL;
+   }
+
return DRVMGR_OK;
 }
 
diff --git a/bsps/sparc/erc32/include/bsp.h b/bsps/sparc/erc32/include/bsp.h
index fd453fb6c2..cb62661aa1 100644
--- a/bsps/sparc/erc32/include/bsp.h
+++ b/bsps/sparc/erc32/include/bsp.h
@@ -142,7 +142,10 @@ static __inline__ int BSP_shared_interrupt_unregister
  * Arguments
  *  irq   System IRQ number
  */
-extern void BSP_shared_interrupt_clear(int irq);
+static inline void BSP_shared_interrupt_clear( int irq )
+{
+  (void) rtems_interrupt_clear( (rtems_vector_number) irq );
+}
 
 /* Enable Interrupt. This function will unmask the IRQ at the interrupt
  * controller. This is normally done by _register(). Note that this will
@@ -151,7 +154,10 @@ extern void BSP_shared_interrupt_clear(int irq);
  * Arguments
  *  irq   System IRQ number
  */
-extern void BSP_shared_interrupt_unmask(int irq);
+static inline void BSP_shared_interrupt_unmask( int irq )
+{
+  (void) rtems_interrupt_vector_enable( (rtems_vector_number) irq );
+}
 
 /* Disable Interrupt. This function will mask one IRQ at the interrupt
  * controller. This is normally done by _unregister().  Note that this will
@@ -160,7 +166,10 @@ extern void BSP_shared_interrupt_unmask(int irq);
  * Arguments
  *  irq System IRQ number
  */
-extern void BSP_shared_interrupt_mask(int irq);
+static inline void BSP_shared_interrupt_mask( int irq )
+{
+  (void) rtems_interrupt_vector_disable( (rtems_vector_number) irq );
+}
 
 /*
  *  Delay for the specified number of microseconds.
diff --git a/bsps/sparc/leon2/include/bsp.h b/bsps/sparc/leon2/include/bsp.h
index 510262206b..4a2f5967ef 100644
--- a/bsps/sparc/leon2/include/bsp.h
+++ b/bsps/sparc/leon2/include/bsp.h
@@ -166,7 +166,10 @@ static __inline__ int BSP_shared_interrupt_unregister
  * Arguments
  *  irq   System IRQ number
  */
-extern void BSP_shared_interrupt_clear(int irq);
+static inline void BSP_shared_interrupt_clear( int irq )
+{
+  (void) rtems_interrupt_clear( (rtems_vector_number) irq );
+}
 
 /* Enable Interrupt. This function will unmask the IRQ at the interrupt
  * controller. This is normally done by _register(). Note that this will
@@ -175,7 +178,10 @@ extern void BSP_shared_interrupt_clear(int irq);
  * Arguments
  *  irq   System IRQ number
  */
-extern void BSP_shared_interrupt_unmask(int irq);
+static inline void BSP_shared_interrupt_unmask( int irq )
+{
+  (void) rtems_interrupt_vector_enable( (rtems_vector_number) irq );
+}
 
 /* Disable Interrupt. This function will mask one IRQ at the interrupt
  * controller. This is normally done by _unregister().  Note that this will
@@ -184,7 +190,10 @@ extern void BSP_shared_interrupt_unmask(int irq);
  * Arguments
  *  irq System IRQ number
  */
-extern void BSP_shared_interrupt_mask(int irq);
+

Re: bsps/xilinx-zynqmp : Add BSP for RPU

[Chris Johns]

On 15/6/2023 6:16 pm, Philip Kirkpatrick wrote:
> Thanks for all the good feedback.
> 
> RE Joel:
> I'll fix my sloppy formatting that you caught and submit a revised patch.  If
> I'm realistic about my schedule, I probably won't be able to get to it until
> next week.
> For xttcps_hw.h, there already is one #ifndef __rtems__ around the #includes,
> but on review there is another spot where I got lazy and used a #if 0.  I'll
> correct that too.  Other than that, the file is unmodified.
> 
> On the discussion about a shared space, I'll leave that decision up to you. 
> Tell me what you want and I can adjust as needed, or it could be done in a
> follow-on patch.

Should the RPU BSP be located under bsps/arm/xilinx-rpu?

> For the Versal, I've never used that part and am not very familiar with it, 
> but
> the feedback from Aaron makes it sound like the core is probably pretty
> similar.  One other possible difference would be in the timers but it does 
> look
> like the Versal has the same TTCs.  There just may be a small bit of work to 
> set
> up the clock input to it.

We would handle the Versal once the BSP has a home.

Chris
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[PATCH v2] eng: Add guidelines for validation tests

[Sebastian Huber]

Update #3717.
---
v2:

* Mention that file name should be unique.
* Clarify file name parts.
* Add examples for enabled-by expressions.

 eng/req/howto.rst | 80 +++
 1 file changed, 80 insertions(+)

diff --git a/eng/req/howto.rst b/eng/req/howto.rst
index 0de3c01..125dac5 100644
--- a/eng/req/howto.rst
+++ b/eng/req/howto.rst
@@ -1127,6 +1127,86 @@ the following post-condition states.
   parameter in past calls to ${../if/directive:/name} shall not be
   accessed by the ${../if/directive:/name} call.
 
+Validation Test Guidelines
+--
+
+The validation test cases, test runners, and test suites are generated by the
+``./spec2modules.py`` script from specification items.  For the placement and
+naming of the generated sources use the following rules:
+
+* Place architecture-specific validation test sources and programs into the
+  ``testsuites/validation/cpu`` directory.
+
+* Place BSP-specific validation test sources and programs into the
+  ``testsuites/validation/bsps`` directory.
+
+* Place all other validation test sources and programs into the
+  ``testsuites/validation`` directory.
+
+* Place architecture-specific unit test sources and programs into the
+  ``testsuites/unit/cpu`` directory.
+
+* Place BSP-specific unit test sources and programs into the
+  ``testsuites/unit/bsps`` directory.
+
+* Place all other unit test sources and programs into the
+  ``testsuites/unit`` directory.
+
+* Use dashes (``-``) to separate parts of a file name.  Use only dashes, the
+  digits ``0`` to ``9``, and the lower case characters ``a`` to ``z`` for file
+  names.  In particular, do not use underscores (``_``).
+
+* The parts of a file name shall be separated by dashes and ordered from most
+  general (left) to more specific (right), for example ``tc-task-construct.c``.
+
+* The file names associated with tests shall be unique within the system since
+  the test framework prints out only the base file names.
+
+* Use the prefix ``tc-`` for test case files.
+
+* Use the prefix ``tr-`` for test runner files.
+
+* Use the prefix ``ts-`` for test suite files.
+
+* Use the prefix ``tx-`` for test extension files (test support code).
+
+* Tests for fatal errors shall have ``fatal`` as the most general file part,
+  for example ``ts-fatal-too-large-tls-size.c``.
+
+* Validation test suites shall have ``validation`` as the most general file
+  part, for example ``ts-validation-no-clock-0.c``.
+
+* Unit test suites shall have ``unit`` as the most general file part, for
+  example ``ts-unit-no-clock-0.c``.
+
+* Architecture-specific files shall have the architecture name as a file part,
+  for example ``ts-fatal-sparc-leon3-clock-initialization.c``.
+
+* BSP-specific files shall have the BSP family or variant name as a file part,
+  for example ``tc-sparc-gr712rc.c``.
+
+* Architecture-specific or BSP-specific tests shall use the ``enabled-by``
+  attribute of the associated specification item to make the build item
+  conditional, for example:
+
+  .. code-block:: yaml
+
+  ...
+  build-type: objects
+  enabled-by: arm
+  type: build
+  ...
+
+  .. code-block:: yaml
+
+  ...
+  build-type: test-program
+  enabled-by: bsps/sparc/leon3
+  type: build
+  ...
+
+
+
 Verify the Specification Items
 --
 
-- 
2.35.3

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Re: [PATCH 2/2] bsps: Remove uses of BSP-specific interrupt API

[Chris Johns]

On 16/6/2023 2:51 pm, Sebastian Huber wrote:
> On 16.06.23 03:49, Chris Johns wrote:
>>> diff --git a/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
>>> b/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
>>> index 96b77907a6..bc211e37b6 100644
>>> --- a/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
>>> +++ b/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
>>> @@ -41,7 +41,7 @@
>>>   #include 
>>>     #include 
>>> -#include 
>>> +#include 
>>>     #include 
>>>   @@ -227,7 +227,7 @@ static int ambapp_grlib_int_clear
>>>   struct drvmgr_dev *dev,
>>>   int irq)
>>>   {
>>> -    BSP_shared_interrupt_clear(irq);
>>> +    (void) rtems_interrupt_clear(irq);
>>>   return DRVMGR_OK;
>> Why ignore the return code of the clear and assume the result is OK?
>>
>> This pattern is repeated in other places.
> 
> This is how it is. I didn't want to introduce functional or API changes with
> this patch set.

I do not see the API change.

If the code here is looking through the interface provided to the implementation
so it knows no error will be returned then it is functionally equivalent to what
exists if the error is checked. Nothing changes. The problem with the change is
using the interface implies the error is being checked and a change in the
implementation to return an error would not be handled here. Leaving a latent
issue like that does not seem right?

Chris
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Re: BSP-Specific Testing was: [PATCH 00/34] Integrate pre-qualified LEON3 BSP

[Sebastian Huber]

On 16.06.23 06:53, Chris Johns wrote:

On 16/6/2023 2:41 pm, Sebastian Huber wrote:

On 16.06.23 00:07, Chris Johns wrote:

On 16/6/2023 12:54 am, Sebastian Huber wrote:

The test framework prints out the location of events using the file name and the
line number. So, it would be good if the file names are unique and descriptive.
This is why I like Gedare's proposal to just use "bsps".

Is only the basename embedded in the file name, the full path or some form of a
relative path?

Just the basename is printed

Should the fact the file name should be unique to avoid confusion as it is just
the basename be documented in the eng manual? I could not see it mentioned.


Yes, good idea. I will add it to the "Validation Test Guidelines" and 
send a v2 of the patch.


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Re: BSP-Specific Testing was: [PATCH 00/34] Integrate pre-qualified LEON3 BSP

[Chris Johns]

On 16/6/2023 2:41 pm, Sebastian Huber wrote:
> On 16.06.23 00:07, Chris Johns wrote:
>> On 16/6/2023 12:54 am, Sebastian Huber wrote:
>>> The test framework prints out the location of events using the file name 
>>> and the
>>> line number. So, it would be good if the file names are unique and 
>>> descriptive.
>>> This is why I like Gedare's proposal to just use "bsps".
>> Is only the basename embedded in the file name, the full path or some form 
>> of a
>> relative path?
> 
> Just the basename is printed

Should the fact the file name should be unique to avoid confusion as it is just
the basename be documented in the eng manual? I could not see it mentioned.

Chris
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Re: [PATCH 2/2] bsps: Remove uses of BSP-specific interrupt API

[Sebastian Huber]

On 16.06.23 03:49, Chris Johns wrote:

diff --git a/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c 
b/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
index 96b77907a6..bc211e37b6 100644
--- a/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
+++ b/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
@@ -41,7 +41,7 @@
  #include 
  
  #include 

-#include 
+#include 
  
  #include 
  
@@ -227,7 +227,7 @@ static int ambapp_grlib_int_clear

struct drvmgr_dev *dev,
int irq)
  {
-   BSP_shared_interrupt_clear(irq);
+   (void) rtems_interrupt_clear(irq);
return DRVMGR_OK;

Why ignore the return code of the clear and assume the result is OK?

This pattern is repeated in other places.


This is how it is. I didn't want to introduce functional or API changes 
with this patch set.


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Re: BSP-Specific Testing was: [PATCH 00/34] Integrate pre-qualified LEON3 BSP

[Sebastian Huber]

On 16.06.23 00:07, Chris Johns wrote:

On 16/6/2023 12:54 am, Sebastian Huber wrote:

The test framework prints out the location of events using the file name and the
line number. So, it would be good if the file names are unique and descriptive.
This is why I like Gedare's proposal to just use "bsps".

Is only the basename embedded in the file name, the full path or some form of a
relative path?


Just the basename is printed, for example:

*** BEGIN OF TEST TestsuitesValidationNoClock0 ***
*** TEST VERSION: 6.0.0.4b5c064920565b1b3e2150624e9cf1009b53e4a9
*** TEST STATE: EXPECTED_PASS
*** TEST BUILD: RTEMS_POSIX_API RTEMS_SMP
*** TEST TOOLS: 12.2.1 20230425 (RTEMS 6, RSB 
ceed4bd6995074bf74cadce637dad97aee284dd8, Newlib 9ae9eef)

A:TestsuitesValidationNoClock0
S:Platform:RTEMS
S:Compiler:12.2.1 20230425 (RTEMS 6, RSB 
ceed4bd6995074bf74cadce637dad97aee284dd8, Newlib 9ae9eef)

S:Version:6.0.0.4b5c064920565b1b3e2150624e9cf1009b53e4a9
S:BSP:leon3
S:BuildLabel:foobar
S:TargetHash:SHA256:3Y1G8SMm2FRTpZB5_0NhbpDnatbEYmbDLLW58d-wXuY=
S:RTEMS_DEBUG:0
S:RTEMS_MULTIPROCESSING:0
S:RTEMS_POSIX_API:1
S:RTEMS_PROFILING:0
S:RTEMS_SMP:1
B:ScoreValFatal
E:ScoreValFatal:N:34:F:0:D:0.001650
B:ScoreTqValTq
E:ScoreTqValTq:N:46:F:0:D:0.004384
B:ScoreThreadValThread
E:ScoreThreadValThread:N:15:F:0:D:0.001382
B:ScoreSchedReqYield
F:25:0:RUN:tx-thread-queue.c:245:RTEMS_UNSATISFIED == RTEMS_SUCCESSFUL
F:54:0:RUN/Helping/Home/Scheduled/Yes/Yes:tx-support.c:497:RTEMS_INVALID_PRIORITY 
== RTEMS_SUCCESSFUL
F:57:0:RUN/Helping/Home/Scheduled/Yes/Yes:tx-support.c:521:RTEMS_NOT_OWNER_OF_RESOURCE 
== RTEMS_SUCCESSFUL

F:62:0:RUN/Helping/Home/Scheduled/Yes/Yes:tc-sched-yield.c:458:0 == 1
F:63:0:RUN/Helping/Home/Scheduled/Yes/Yes:tc-sched-yield.c:495:event->thread 
== ctx->tq_ctx.runner_tcb
F:64:0:RUN/Helping/Home/Scheduled/Yes/Yes:tc-sched-yield.c:498:event->thread 
== ctx->tq_ctx.runner_tcb
F:68:0:RUN/Helping/Home/Scheduled/Yes/No:tx-support.c:497:RTEMS_INVALID_PRIORITY 
== RTEMS_SUCCESSFUL
F:71:0:RUN/Helping/Home/Scheduled/Yes/No:tx-support.c:521:RTEMS_NOT_OWNER_OF_RESOURCE 
== RTEMS_SUCCESSFUL

F:89:0:RUN/Helping/Home/Scheduled/No/Yes:tc-sched-yield.c:458:0 == 1
F:90:0:RUN/Helping/Home/Scheduled/No/Yes:tc-sched-yield.c:495:event->thread 
== ctx->tq_ctx.runner_tcb
F:91:0:RUN/Helping/Home/Scheduled/No/Yes:tc-sched-yield.c:498:event->thread 
== ctx->tq_ctx.runner_tcb


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Re: BSP .inc files and .cfg files

[Sebastian Huber]

On 16.06.23 06:35, Chris Johns wrote:

On 16/6/2023 2:33 pm, Sebastian Huber wrote:

On 16.06.23 03:46, Chris Johns wrote:

On 16/6/2023 9:04 am, Joel Sherrill wrote:

On Thu, Jun 15, 2023 at 5:41 PM Chris Johns mailto:chr...@rtems.org>> wrote:

  Hi,

  Reviewing the RPU patch I noticed a .inc file being added and I wondered
why so
  I checked the sources and to my surprise found:

  rtems.git $ find bsps -name \*.inc
  bsps/v850/gdbv850sim/config/v850sim.inc
  bsps/m68k/genmcf548x/config/genmcf548x.inc
  bsps/m68k/gen68340/include/m68340.inc
  bsps/m68k/gen68340/include/m68349.inc
  bsps/arm/altera-cyclone-v/config/altcycv.inc
  bsps/arm/raspberrypi/config/raspberrypi.inc
  bsps/arm/lpc32xx/config/lpc32xx.inc
  bsps/arm/beagle/config/beagle.inc
  bsps/arm/tms570/config/tms570ls3137.inc
  bsps/arm/xilinx-zynqmp/config/xilinx_zynqmp.inc
  bsps/arm/xilinx-zynq/config/xilinx_zynq.inc
  bsps/arm/lpc24xx/config/lpc17xx.inc
  bsps/arm/lpc24xx/config/lpc40xx.inc
  bsps/arm/lpc24xx/config/lpc24xx.inc
  bsps/arm/lm3s69xx/config/lm3s69xx.inc
  bsps/powerpc/gen5200/config/gen5200.inc
  bsps/powerpc/tqm8xx/config/tqm8xx.inc
  bsps/powerpc/mpc55xxevb/config/mpc55xx.inc
  bsps/powerpc/qoriq/config/qoriq.inc
  bsps/powerpc/gen83xx/config/gen83xx.inc


These likely can. Thinking back, we have cfg files for every BSP
variant within a family. They often set a variable like CPU and CPU_CFLAGS
and included a shared .inc file. These all appear to be from BSPs which
had variants. I think they are remnants and missed when the .cfg files
were

Would like someone to concur.


  And for .cfg there is:

  rtems.git $ find bsps -name \*.cfg | wc -l
       191


Are these installed and used by the application Makefile system. If so, no.

I cannot see any references in spec but Sebastian is the best person to answer
this.

They are definitely not used or installed. I think we still have then since they
document the post-link actions which are not yet supported by the new build 
system.

Ah yes, thanks. What if the files are collected and archived?


I think we should just remove them. We can use the RTEMS 5 branch to 
look up the post-link actions if needed.



The RPU BSP is adding a new one. Is this what we want to see happen?


No, we don't want to see new ones.

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Re: Doorstop YML file in repo

[Chris Johns]

On 16/6/2023 2:34 pm, Sebastian Huber wrote:
> On 16.06.23 00:33, Chris Johns wrote:
>> Hi
>>
>> I spotted this today and I am wondering if it has accidental been added:
>>
>> https://git.rtems.org/rtems/tree/spec/build/bsps/arm/stm32h7/.doorstop.yml
>>
>> ?
> 
> Sorry, this was a mistake. I removed the file.

Thanks
Chris
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Re: BSP .inc files and .cfg files

[Chris Johns]

On 16/6/2023 2:33 pm, Sebastian Huber wrote:
> On 16.06.23 03:46, Chris Johns wrote:
>>
>> On 16/6/2023 9:04 am, Joel Sherrill wrote:
>>>
>>> On Thu, Jun 15, 2023 at 5:41 PM Chris Johns >> > wrote:
>>>
>>>  Hi,
>>>
>>>  Reviewing the RPU patch I noticed a .inc file being added and I 
>>> wondered
>>> why so
>>>  I checked the sources and to my surprise found:
>>>
>>>  rtems.git $ find bsps -name \*.inc
>>>  bsps/v850/gdbv850sim/config/v850sim.inc
>>>  bsps/m68k/genmcf548x/config/genmcf548x.inc
>>>  bsps/m68k/gen68340/include/m68340.inc
>>>  bsps/m68k/gen68340/include/m68349.inc
>>>  bsps/arm/altera-cyclone-v/config/altcycv.inc
>>>  bsps/arm/raspberrypi/config/raspberrypi.inc
>>>  bsps/arm/lpc32xx/config/lpc32xx.inc
>>>  bsps/arm/beagle/config/beagle.inc
>>>  bsps/arm/tms570/config/tms570ls3137.inc
>>>  bsps/arm/xilinx-zynqmp/config/xilinx_zynqmp.inc
>>>  bsps/arm/xilinx-zynq/config/xilinx_zynq.inc
>>>  bsps/arm/lpc24xx/config/lpc17xx.inc
>>>  bsps/arm/lpc24xx/config/lpc40xx.inc
>>>  bsps/arm/lpc24xx/config/lpc24xx.inc
>>>  bsps/arm/lm3s69xx/config/lm3s69xx.inc
>>>  bsps/powerpc/gen5200/config/gen5200.inc
>>>  bsps/powerpc/tqm8xx/config/tqm8xx.inc
>>>  bsps/powerpc/mpc55xxevb/config/mpc55xx.inc
>>>  bsps/powerpc/qoriq/config/qoriq.inc
>>>  bsps/powerpc/gen83xx/config/gen83xx.inc
>>>
>>>
>>> These likely can. Thinking back, we have cfg files for every BSP
>>> variant within a family. They often set a variable like CPU and CPU_CFLAGS
>>> and included a shared .inc file. These all appear to be from BSPs which
>>> had variants. I think they are remnants and missed when the .cfg files
>>> were
>>>
>>> Would like someone to concur.
>>>
>>>
>>>  And for .cfg there is:
>>>
>>>  rtems.git $ find bsps -name \*.cfg | wc -l
>>>       191
>>>
>>>
>>> Are these installed and used by the application Makefile system. If so, no.
>> I cannot see any references in spec but Sebastian is the best person to 
>> answer
>> this.
> 
> They are definitely not used or installed. I think we still have then since 
> they
> document the post-link actions which are not yet supported by the new build 
> system.

Ah yes, thanks. What if the files are collected and archived?

The RPU BSP is adding a new one. Is this what we want to see happen?

Chris
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Re: Doorstop YML file in repo

[Sebastian Huber]

On 16.06.23 00:33, Chris Johns wrote:

Hi

I spotted this today and I am wondering if it has accidental been added:

https://git.rtems.org/rtems/tree/spec/build/bsps/arm/stm32h7/.doorstop.yml

?


Sorry, this was a mistake. I removed the file.

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Re: BSP .inc files and .cfg files

[Sebastian Huber]

On 16.06.23 03:46, Chris Johns wrote:


On 16/6/2023 9:04 am, Joel Sherrill wrote:


On Thu, Jun 15, 2023 at 5:41 PM Chris Johns mailto:chr...@rtems.org>> wrote:

 Hi,

 Reviewing the RPU patch I noticed a .inc file being added and I wondered 
why so
 I checked the sources and to my surprise found:

 rtems.git $ find bsps -name \*.inc
 bsps/v850/gdbv850sim/config/v850sim.inc
 bsps/m68k/genmcf548x/config/genmcf548x.inc
 bsps/m68k/gen68340/include/m68340.inc
 bsps/m68k/gen68340/include/m68349.inc
 bsps/arm/altera-cyclone-v/config/altcycv.inc
 bsps/arm/raspberrypi/config/raspberrypi.inc
 bsps/arm/lpc32xx/config/lpc32xx.inc
 bsps/arm/beagle/config/beagle.inc
 bsps/arm/tms570/config/tms570ls3137.inc
 bsps/arm/xilinx-zynqmp/config/xilinx_zynqmp.inc
 bsps/arm/xilinx-zynq/config/xilinx_zynq.inc
 bsps/arm/lpc24xx/config/lpc17xx.inc
 bsps/arm/lpc24xx/config/lpc40xx.inc
 bsps/arm/lpc24xx/config/lpc24xx.inc
 bsps/arm/lm3s69xx/config/lm3s69xx.inc
 bsps/powerpc/gen5200/config/gen5200.inc
 bsps/powerpc/tqm8xx/config/tqm8xx.inc
 bsps/powerpc/mpc55xxevb/config/mpc55xx.inc
 bsps/powerpc/qoriq/config/qoriq.inc
 bsps/powerpc/gen83xx/config/gen83xx.inc


These likely can. Thinking back, we have cfg files for every BSP
variant within a family. They often set a variable like CPU and CPU_CFLAGS
and included a shared .inc file. These all appear to be from BSPs which
had variants. I think they are remnants and missed when the .cfg files
were

Would like someone to concur.


 And for .cfg there is:

 rtems.git $ find bsps -name \*.cfg | wc -l
      191


Are these installed and used by the application Makefile system. If so, no.

I cannot see any references in spec but Sebastian is the best person to answer 
this.


They are definitely not used or installed. I think we still have then 
since they document the post-link actions which are not yet supported by 
the new build system.


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unit test framework

[Sam Price]

was reading through
https://docs.rtems.org/branches/master/eng/test-framework.html#test-framework-requirements-for-rtems

t.h
I think needs changed to test.h or rtems/test.h

Was trying to stand up a test framework for my board.
Wanted command line arg support though so switched to trying doctest/gtest.
The code in rtems didnt seem to use cli / shell support to launch the
test suite.

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Re: [PATCH 2/2] bsps: Remove uses of BSP-specific interrupt API

[Chris Johns]

On 15/6/2023 10:46 pm, Sebastian Huber wrote:
> Update #3269.
> ---
>  bsps/riscv/griscv/include/bsp.h |  4 ---
>  bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c |  8 +++---
>  bsps/sparc/erc32/include/bsp.h  | 15 ---
>  bsps/sparc/leon2/include/bsp.h  | 15 ---
>  bsps/sparc/leon3/include/bsp.h  | 15 ---
>  bsps/sparc/shared/drvmgr/leon2_amba_bus.c   |  5 ++--
>  bsps/sparc/shared/irq/irq-shared.c  | 29 -
>  spec/build/bsps/sparc/leon3/obj.yml |  1 -
>  8 files changed, 43 insertions(+), 49 deletions(-)
> 
> diff --git a/bsps/riscv/griscv/include/bsp.h b/bsps/riscv/griscv/include/bsp.h
> index 9d6fb2a16f..c7d24839ca 100644
> --- a/bsps/riscv/griscv/include/bsp.h
> +++ b/bsps/riscv/griscv/include/bsp.h
> @@ -71,10 +71,6 @@ extern "C" {
>  
>  /* GRLIB driver functions */
>  
> -extern void BSP_shared_interrupt_mask(int irq);
> -extern void BSP_shared_interrupt_clear(int irq);
> -extern void BSP_shared_interrupt_unmask(int irq);
> -
>  /*
>   * Network driver configuration for greth
>   */
> diff --git a/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c 
> b/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
> index 96b77907a6..bc211e37b6 100644
> --- a/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
> +++ b/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
> @@ -41,7 +41,7 @@
>  #include 
>  
>  #include 
> -#include 
> +#include 
>  
>  #include 
>  
> @@ -227,7 +227,7 @@ static int ambapp_grlib_int_clear
>   struct drvmgr_dev *dev,
>   int irq)
>  {
> - BSP_shared_interrupt_clear(irq);
> + (void) rtems_interrupt_clear(irq);
>   return DRVMGR_OK;

Why ignore the return code of the clear and assume the result is OK?

This pattern is repeated in other places.

Chris
>  }
>  
> @@ -237,7 +237,7 @@ static int ambapp_grlib_int_mask
>   int irq
>   )
>  {
> - BSP_shared_interrupt_mask(irq);
> + bsp_interrupt_vector_disable(irq);
>   return DRVMGR_OK;
>  }
>  
> @@ -247,7 +247,7 @@ static int ambapp_grlib_int_unmask
>   int irq
>   )
>  {
> - BSP_shared_interrupt_unmask(irq);
> + bsp_interrupt_vector_enable(irq);
>   return DRVMGR_OK;
>  }
>  
> diff --git a/bsps/sparc/erc32/include/bsp.h b/bsps/sparc/erc32/include/bsp.h
> index fd453fb6c2..cb62661aa1 100644
> --- a/bsps/sparc/erc32/include/bsp.h
> +++ b/bsps/sparc/erc32/include/bsp.h
> @@ -142,7 +142,10 @@ static __inline__ int BSP_shared_interrupt_unregister
>   * Arguments
>   *  irq   System IRQ number
>   */
> -extern void BSP_shared_interrupt_clear(int irq);
> +static inline void BSP_shared_interrupt_clear( int irq )
> +{
> +  (void) rtems_interrupt_clear( (rtems_vector_number) irq );
> +}
>  
>  /* Enable Interrupt. This function will unmask the IRQ at the interrupt
>   * controller. This is normally done by _register(). Note that this will
> @@ -151,7 +154,10 @@ extern void BSP_shared_interrupt_clear(int irq);
>   * Arguments
>   *  irq   System IRQ number
>   */
> -extern void BSP_shared_interrupt_unmask(int irq);
> +static inline void BSP_shared_interrupt_unmask( int irq )
> +{
> +  (void) rtems_interrupt_vector_enable( (rtems_vector_number) irq );
> +}
>  
>  /* Disable Interrupt. This function will mask one IRQ at the interrupt
>   * controller. This is normally done by _unregister().  Note that this will
> @@ -160,7 +166,10 @@ extern void BSP_shared_interrupt_unmask(int irq);
>   * Arguments
>   *  irq System IRQ number
>   */
> -extern void BSP_shared_interrupt_mask(int irq);
> +static inline void BSP_shared_interrupt_mask( int irq )
> +{
> +  (void) rtems_interrupt_vector_disable( (rtems_vector_number) irq );
> +}
>  
>  /*
>   *  Delay for the specified number of microseconds.
> diff --git a/bsps/sparc/leon2/include/bsp.h b/bsps/sparc/leon2/include/bsp.h
> index 510262206b..4a2f5967ef 100644
> --- a/bsps/sparc/leon2/include/bsp.h
> +++ b/bsps/sparc/leon2/include/bsp.h
> @@ -166,7 +166,10 @@ static __inline__ int BSP_shared_interrupt_unregister
>   * Arguments
>   *  irq   System IRQ number
>   */
> -extern void BSP_shared_interrupt_clear(int irq);
> +static inline void BSP_shared_interrupt_clear( int irq )
> +{
> +  (void) rtems_interrupt_clear( (rtems_vector_number) irq );
> +}
>  
>  /* Enable Interrupt. This function will unmask the IRQ at the interrupt
>   * controller. This is normally done by _register(). Note that this will
> @@ -175,7 +178,10 @@ extern void BSP_shared_interrupt_clear(int irq);
>   * Arguments
>   *  irq   System IRQ number
>   */
> -extern void BSP_shared_interrupt_unmask(int irq);
> +static inline void BSP_shared_interrupt_unmask( int irq )
> +{
> +  (void) rtems_interrupt_vector_enable( (rtems_vector_number) irq );
> +}
>  
>  /* Disable Interrupt. This function will mask one IRQ at the interrupt
>   * controller. This is normally done by _unregister().  Note that this will
> @@ -184,7 +190,10 @@ extern void BSP_shared_interrupt_unmask(int irq);
>   * Argume

Re: BSP .inc files and .cfg files

[Chris Johns]

On 16/6/2023 9:04 am, Joel Sherrill wrote:
> 
> 
> On Thu, Jun 15, 2023 at 5:41 PM Chris Johns  > wrote:
> 
> Hi,
> 
> Reviewing the RPU patch I noticed a .inc file being added and I wondered 
> why so
> I checked the sources and to my surprise found:
> 
> rtems.git $ find bsps -name \*.inc
> bsps/v850/gdbv850sim/config/v850sim.inc
> bsps/m68k/genmcf548x/config/genmcf548x.inc
> bsps/m68k/gen68340/include/m68340.inc
> bsps/m68k/gen68340/include/m68349.inc
> bsps/arm/altera-cyclone-v/config/altcycv.inc
> bsps/arm/raspberrypi/config/raspberrypi.inc
> bsps/arm/lpc32xx/config/lpc32xx.inc
> bsps/arm/beagle/config/beagle.inc
> bsps/arm/tms570/config/tms570ls3137.inc
> bsps/arm/xilinx-zynqmp/config/xilinx_zynqmp.inc
> bsps/arm/xilinx-zynq/config/xilinx_zynq.inc
> bsps/arm/lpc24xx/config/lpc17xx.inc
> bsps/arm/lpc24xx/config/lpc40xx.inc
> bsps/arm/lpc24xx/config/lpc24xx.inc
> bsps/arm/lm3s69xx/config/lm3s69xx.inc
> bsps/powerpc/gen5200/config/gen5200.inc
> bsps/powerpc/tqm8xx/config/tqm8xx.inc
> bsps/powerpc/mpc55xxevb/config/mpc55xx.inc
> bsps/powerpc/qoriq/config/qoriq.inc
> bsps/powerpc/gen83xx/config/gen83xx.inc
> 
> 
> These likely can. Thinking back, we have cfg files for every BSP
> variant within a family. They often set a variable like CPU and CPU_CFLAGS
> and included a shared .inc file. These all appear to be from BSPs which
> had variants. I think they are remnants and missed when the .cfg files
> were 
> 
> Would like someone to concur. 
> 
> 
> And for .cfg there is:
> 
> rtems.git $ find bsps -name \*.cfg | wc -l
>      191
> 
> 
> Are these installed and used by the application Makefile system. If so, no. 

I cannot see any references in spec but Sebastian is the best person to answer 
this.

Chris

> But if these were just the ".cfg" files I mentioned above, then likely yes. We
> probably had 191 BSPs which we switched to waf.
> 
> 
> Can these files be removed?
> 
> Chris
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rtems-docs [PATCH] README: Fixing spelling and grammar errors

[Stanley Paulauskas]

Hello, RTEMS Devs!

Please find attached a patch for rtems-docs/README.txt that fixes some
grammatical and spelling errors. Since this is my first submission, I went
through the Checklist for Patches
.
I *think* I have everything covered. Please let me know if I need any
updates or changes.

Best,
Stan

Stanley Paulauskas, Ph. D., PMP
Solutions Architect, XIA LLC 


0001-README-Fixing-spelling-and-grammar-errors.patch
Description: Binary data
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Re: BSP .inc files and .cfg files

[Joel Sherrill]

On Thu, Jun 15, 2023 at 5:41 PM Chris Johns  wrote:

> Hi,
>
> Reviewing the RPU patch I noticed a .inc file being added and I wondered
> why so
> I checked the sources and to my surprise found:
>
> rtems.git $ find bsps -name \*.inc
> bsps/v850/gdbv850sim/config/v850sim.inc
> bsps/m68k/genmcf548x/config/genmcf548x.inc
> bsps/m68k/gen68340/include/m68340.inc
> bsps/m68k/gen68340/include/m68349.inc
> bsps/arm/altera-cyclone-v/config/altcycv.inc
> bsps/arm/raspberrypi/config/raspberrypi.inc
> bsps/arm/lpc32xx/config/lpc32xx.inc
> bsps/arm/beagle/config/beagle.inc
> bsps/arm/tms570/config/tms570ls3137.inc
> bsps/arm/xilinx-zynqmp/config/xilinx_zynqmp.inc
> bsps/arm/xilinx-zynq/config/xilinx_zynq.inc
> bsps/arm/lpc24xx/config/lpc17xx.inc
> bsps/arm/lpc24xx/config/lpc40xx.inc
> bsps/arm/lpc24xx/config/lpc24xx.inc
> bsps/arm/lm3s69xx/config/lm3s69xx.inc
> bsps/powerpc/gen5200/config/gen5200.inc
> bsps/powerpc/tqm8xx/config/tqm8xx.inc
> bsps/powerpc/mpc55xxevb/config/mpc55xx.inc
> bsps/powerpc/qoriq/config/qoriq.inc
> bsps/powerpc/gen83xx/config/gen83xx.inc
>

These likely can. Thinking back, we have cfg files for every BSP
variant within a family. They often set a variable like CPU and CPU_CFLAGS
and included a shared .inc file. These all appear to be from BSPs which
had variants. I think they are remnants and missed when the .cfg files
were

Would like someone to concur.

>
> And for .cfg there is:
>
> rtems.git $ find bsps -name \*.cfg | wc -l
>  191
>

Are these installed and used by the application Makefile system. If so, no.

But if these were just the ".cfg" files I mentioned above, then likely yes.
We
probably had 191 BSPs which we switched to waf.

>
> Can these files be removed?
>
> Chris
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BSP .inc files and .cfg files

[Chris Johns]

Hi,

Reviewing the RPU patch I noticed a .inc file being added and I wondered why so
I checked the sources and to my surprise found:

rtems.git $ find bsps -name \*.inc
bsps/v850/gdbv850sim/config/v850sim.inc
bsps/m68k/genmcf548x/config/genmcf548x.inc
bsps/m68k/gen68340/include/m68340.inc
bsps/m68k/gen68340/include/m68349.inc
bsps/arm/altera-cyclone-v/config/altcycv.inc
bsps/arm/raspberrypi/config/raspberrypi.inc
bsps/arm/lpc32xx/config/lpc32xx.inc
bsps/arm/beagle/config/beagle.inc
bsps/arm/tms570/config/tms570ls3137.inc
bsps/arm/xilinx-zynqmp/config/xilinx_zynqmp.inc
bsps/arm/xilinx-zynq/config/xilinx_zynq.inc
bsps/arm/lpc24xx/config/lpc17xx.inc
bsps/arm/lpc24xx/config/lpc40xx.inc
bsps/arm/lpc24xx/config/lpc24xx.inc
bsps/arm/lm3s69xx/config/lm3s69xx.inc
bsps/powerpc/gen5200/config/gen5200.inc
bsps/powerpc/tqm8xx/config/tqm8xx.inc
bsps/powerpc/mpc55xxevb/config/mpc55xx.inc
bsps/powerpc/qoriq/config/qoriq.inc
bsps/powerpc/gen83xx/config/gen83xx.inc

And for .cfg there is:

rtems.git $ find bsps -name \*.cfg | wc -l
 191

Can these files be removed?

Chris
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Doorstop YML file in repo

[Chris Johns]

Hi

I spotted this today and I am wondering if it has accidental been added:

https://git.rtems.org/rtems/tree/spec/build/bsps/arm/stm32h7/.doorstop.yml

?

Chris
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Re: BSP-Specific Testing was: [PATCH 00/34] Integrate pre-qualified LEON3 BSP

[Chris Johns]

On 16/6/2023 12:54 am, Sebastian Huber wrote:
> The test framework prints out the location of events using the file name and 
> the
> line number. So, it would be good if the file names are unique and 
> descriptive.
> This is why I like Gedare's proposal to just use "bsps".

Is only the basename embedded in the file name, the full path or some form of a
relative path?

Chris
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Re: [PATCH rtems-source-builder] qemu-5-1: Add patch for ZynqMP/Versal CGEMs

[Chris Johns]

OK

Thanks
Chris

On 16/6/2023 1:53 am, Kinsey Moore wrote:
> This temporarily adds a patch to fix badly behaving CGEM peripherals
> under QEMU. The referenced patch has been submitted for inclusion in
> the upstream QEMU repository.
> 
> Updates #4919
> ---
>  source-builder/config/qemu-5-1.cfg | 4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/source-builder/config/qemu-5-1.cfg 
> b/source-builder/config/qemu-5-1.cfg
> index 7ca58b8..4b2951d 100644
> --- a/source-builder/config/qemu-5-1.cfg
> +++ b/source-builder/config/qemu-5-1.cfg
> @@ -7,3 +7,7 @@
>  %define qemu_disables --disable-nettle
>  
>  %include %{_configdir}/qemu-common-2.cfg
> +
> +%patch add qemu --rsb-file=cgem_zynqmp_versal.patch -p1 
> https://devel.rtems.org/raw-attachment/ticket/4919/cgem_zynqmp_versal.patch
> +%hash sha512 cgem_zynqmp_versal.patch \
> +  
> 2a4a894acefd00a76f48b6d6339696c8c53ece8e044687cb86c268840eac226d251fe89af933db4c20f5f07a3faff92c7c28c4c82b0617e4b200fd0895ac6158
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Re: [PATCH] eng: Add guidelines for validation tests

[Gedare Bloom]

LGTM

On Thu, Jun 15, 2023 at 4:06 AM Sebastian Huber
 wrote:
>
> On 15.06.23 11:28, Frank Kühndel wrote:
> >
> >> +
> >> +* Tests for fatal errors shall have ``fatal`` as the most general
> >> file part,
> >> +  for example ``ts-fatal-too-large-tls-size.c``.
> >> +
> >> +* Validation test suites shall have ``validation`` as the most
> >> general file
> >> +  part, for example ``ts-validation-no-clock-0.c``.
> >> +
> >> +* Unit test suites shall have ``unit`` as the most general file part,
> >> for
> >> +  example ``ts-unit-no-clock-0.c``.
> >> +
> >> +* Architecture-specific files shall have the architecture name as a
> >> file part,
> >> +  for example ``ts-fatal-sparc-leon3-clock-initialization.c``.
> >
> > I wonder whether ``ts-sparc-leon3-fatal-clock-initialization.c`` would
> > be more logical?
>
> So far, by definition the test category (unit, validation, performance,
> fatal, mem) is the most general category. I don't want to move existing
> things unnecessarily around, this should stay as it is.
>
> --
> embedded brains GmbH
> Herr Sebastian HUBER
> Dornierstr. 4
> 82178 Puchheim
> Germany
> email: sebastian.hu...@embedded-brains.de
> phone: +49-89-18 94 741 - 16
> fax:   +49-89-18 94 741 - 08
>
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[PATCH rtems-source-builder] qemu-5-1: Add patch for ZynqMP/Versal CGEMs

[Kinsey Moore]

This temporarily adds a patch to fix badly behaving CGEM peripherals
under QEMU. The referenced patch has been submitted for inclusion in
the upstream QEMU repository.

Updates #4919
---
 source-builder/config/qemu-5-1.cfg | 4 
 1 file changed, 4 insertions(+)

diff --git a/source-builder/config/qemu-5-1.cfg 
b/source-builder/config/qemu-5-1.cfg
index 7ca58b8..4b2951d 100644
--- a/source-builder/config/qemu-5-1.cfg
+++ b/source-builder/config/qemu-5-1.cfg
@@ -7,3 +7,7 @@
 %define qemu_disables --disable-nettle
 
 %include %{_configdir}/qemu-common-2.cfg
+
+%patch add qemu --rsb-file=cgem_zynqmp_versal.patch -p1 
https://devel.rtems.org/raw-attachment/ticket/4919/cgem_zynqmp_versal.patch
+%hash sha512 cgem_zynqmp_versal.patch \
+  
2a4a894acefd00a76f48b6d6339696c8c53ece8e044687cb86c268840eac226d251fe89af933db4c20f5f07a3faff92c7c28c4c82b0617e4b200fd0895ac6158
-- 
2.30.2

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Re: BSP-Specific Testing was: [PATCH 00/34] Integrate pre-qualified LEON3 BSP

[Sebastian Huber]

On 15.06.23 15:51, Joel Sherrill wrote:


On Mon, Jun 12, 2023 at 10:58 AM Gedare Bloom > wrote:


On Mon, Jun 12, 2023 at 12:56 AM Sebastian Huber
mailto:sebastian.hu...@embedded-brains.de>> wrote:
 >
 >
 >
 > On 01.06.23 22:06, Gedare Bloom wrote:
 > > On Thu, Jun 1, 2023 at 2:00 PM Gedare Bloommailto:ged...@rtems.org>>  wrote:
 > >> -- Forwarded message -
 > >> From: Sebastian Hubermailto:sebastian.hu...@embedded-brains.de>>
 > >> Date: Wed, May 31, 2023 at 10:31 AM
 > >>
 > >> The existing tests in the RTEMS test suite are basically BSP
 > >> independent. This patch set introduces BSP-specific validation
tests.
 > >> These tests are disabled for other BSPs through the build
system, for
 > >> example:
 > >>
 > >> spec/build/testsuites/validation/bsp-sparc-leon3-gr712rc.yml
 > >> [...]
 > >> cxxflags: []
 > >> enabled-by: sparc/gr712rc
 > >> features: c cprogram
 > >> [...]
 > > The use of the enabled-by: field to control the BSP-specific tests
 > > looks reasonable. However, we should decide where/how any
BSP-specific
 > > tests should reside. It looks to me like the current approach is to
 > > dump all test files in a single monolithic 'validation'
directory, and
 > > let the user/script sort it out. This results in a mix of tests
 > > intended for all targets, and some for specific targets. This is
 > > pretty much non-maintainable from my point-of-view without some
 > > additional tool support. Correct me if I'm wrong.
 >
 > Yes, this is the current approach. There is no strict one-to-one
 > relationship of test cases and test suites. The file names are
somewhat
 > descriptive, for example:
 >
 > ls -l *leon3*
 > -rw-r--r-- 1 sebastian_h domain users 3739 31. Mai 10:44
 > tc-bsp-sparc-leon3-gr712rc.c
 > -rw-r--r-- 1 sebastian_h domain users 6138 31. Mai 10:44
 > tc-fatal-bsp-sparc-leon3-shutdown.c
 > -rw-r--r-- 1 sebastian_h domain users 5135 31. Mai 10:44
 > tr-fatal-bsp-sparc-leon3-cache-snooping-disabled-boot.c
 > -rw-r--r-- 1 sebastian_h domain users 2723 31. Mai 10:44
 > tr-fatal-bsp-sparc-leon3-cache-snooping-disabled-boot.h
 > -rw-r--r-- 1 sebastian_h domain users 5406 31. Mai 10:44
 > tr-fatal-bsp-sparc-leon3-cache-snooping-disabled-secondary.c
 > -rw-r--r-- 1 sebastian_h domain users 2753 31. Mai 10:44
 > tr-fatal-bsp-sparc-leon3-cache-snooping-disabled-secondary.h
 > -rw-r--r-- 1 sebastian_h domain users 5270 31. Mai 10:44
 > tr-fatal-bsp-sparc-leon3-clock-initialization.c
 > -rw-r--r-- 1 sebastian_h domain users 2681 31. Mai 10:44
 > tr-fatal-bsp-sparc-leon3-clock-initialization.h
 > -rw-r--r-- 1 sebastian_h domain users 2488 31. Mai 10:44
 > ts-bsp-sparc-leon3-gr712rc.c
 > -rw-r--r-- 1 sebastian_h domain users 2845 31. Mai 10:44
 > ts-fatal-bsp-sparc-leon3-cache-snooping-disabled-boot.c
 > -rw-r--r-- 1 sebastian_h domain users 2919 31. Mai 10:44
 > ts-fatal-bsp-sparc-leon3-cache-snooping-disabled-secondary.c
 > -rw-r--r-- 1 sebastian_h domain users 2797 31. Mai 10:44
 > ts-fatal-bsp-sparc-leon3-clock-initialization.c
 > -rw-r--r-- 1 sebastian_h domain users 3148 31. Mai 10:45
 > ts-fatal-bsp-sparc-leon3-shutdown-response.c
 > -rw-r--r-- 1 sebastian_h domain users 4909 31. Mai 10:44
 > ts-fatal-bsp-sparc-leon3-shutdown.c
 >
 > We could also introduce subdirectories to organize things. The test
 > framework prints out the file name in messages, so it would be
nice if
 > they remain unique. With subdirectories this would lead to longer
path
 > names, for example
 >
 > testsuites/validation/sparc/leon3/tc-bsp-sparc-leon3-gr712rc.c
 >
I see. Maybe it makes sense to have all BSP-specific tests in a bsps
subdirectory, with the unique names encoded to ensure the arch/bsp
combination appears in the filename, such as:
testsuites/validation/bsps/tc-bsp-sparc-leon3-gr712rc.c
If so, 'bsp-' can probably be omitted from the filename. This way,
architecture-specific testing may also be easily possible, like
tc-sparc-something.c


We also have to account for device driver/class type tests which
are not BSP specific but only work if a BSP supports a specific feature.
For example, Alex wrote some GPIO tests for the Microblaze work. Assuming
these were based on a common GPIO API, they would work on any BSP
which supported that API.

Similarly for other optional devices where the drivers are in rtems.git


The enabled-by expression is quite flexible. For the placement, if it is 
BSP-specific just place it in testsuites/validation/bsps or 
testsuites/unit/bsps.





 > >
 > > I would like to discuss possible ways to manage the integration of
 > > tests that are conditionally-built based on the arch/bsp tuple. We
 > 

Re: BSP-Specific Testing was: [PATCH 00/34] Integrate pre-qualified LEON3 BSP

[Joel Sherrill]

On Mon, Jun 12, 2023 at 10:58 AM Gedare Bloom  wrote:

> On Mon, Jun 12, 2023 at 12:56 AM Sebastian Huber
>  wrote:
> >
> >
> >
> > On 01.06.23 22:06, Gedare Bloom wrote:
> > > On Thu, Jun 1, 2023 at 2:00 PM Gedare Bloom  wrote:
> > >> -- Forwarded message -
> > >> From: Sebastian Huber
> > >> Date: Wed, May 31, 2023 at 10:31 AM
> > >>
> > >> The existing tests in the RTEMS test suite are basically BSP
> > >> independent. This patch set introduces BSP-specific validation tests.
> > >> These tests are disabled for other BSPs through the build system, for
> > >> example:
> > >>
> > >> spec/build/testsuites/validation/bsp-sparc-leon3-gr712rc.yml
> > >> [...]
> > >> cxxflags: []
> > >> enabled-by: sparc/gr712rc
> > >> features: c cprogram
> > >> [...]
> > > The use of the enabled-by: field to control the BSP-specific tests
> > > looks reasonable. However, we should decide where/how any BSP-specific
> > > tests should reside. It looks to me like the current approach is to
> > > dump all test files in a single monolithic 'validation' directory, and
> > > let the user/script sort it out. This results in a mix of tests
> > > intended for all targets, and some for specific targets. This is
> > > pretty much non-maintainable from my point-of-view without some
> > > additional tool support. Correct me if I'm wrong.
> >
> > Yes, this is the current approach. There is no strict one-to-one
> > relationship of test cases and test suites. The file names are somewhat
> > descriptive, for example:
> >
> > ls -l *leon3*
> > -rw-r--r-- 1 sebastian_h domain users 3739 31. Mai 10:44
> > tc-bsp-sparc-leon3-gr712rc.c
> > -rw-r--r-- 1 sebastian_h domain users 6138 31. Mai 10:44
> > tc-fatal-bsp-sparc-leon3-shutdown.c
> > -rw-r--r-- 1 sebastian_h domain users 5135 31. Mai 10:44
> > tr-fatal-bsp-sparc-leon3-cache-snooping-disabled-boot.c
> > -rw-r--r-- 1 sebastian_h domain users 2723 31. Mai 10:44
> > tr-fatal-bsp-sparc-leon3-cache-snooping-disabled-boot.h
> > -rw-r--r-- 1 sebastian_h domain users 5406 31. Mai 10:44
> > tr-fatal-bsp-sparc-leon3-cache-snooping-disabled-secondary.c
> > -rw-r--r-- 1 sebastian_h domain users 2753 31. Mai 10:44
> > tr-fatal-bsp-sparc-leon3-cache-snooping-disabled-secondary.h
> > -rw-r--r-- 1 sebastian_h domain users 5270 31. Mai 10:44
> > tr-fatal-bsp-sparc-leon3-clock-initialization.c
> > -rw-r--r-- 1 sebastian_h domain users 2681 31. Mai 10:44
> > tr-fatal-bsp-sparc-leon3-clock-initialization.h
> > -rw-r--r-- 1 sebastian_h domain users 2488 31. Mai 10:44
> > ts-bsp-sparc-leon3-gr712rc.c
> > -rw-r--r-- 1 sebastian_h domain users 2845 31. Mai 10:44
> > ts-fatal-bsp-sparc-leon3-cache-snooping-disabled-boot.c
> > -rw-r--r-- 1 sebastian_h domain users 2919 31. Mai 10:44
> > ts-fatal-bsp-sparc-leon3-cache-snooping-disabled-secondary.c
> > -rw-r--r-- 1 sebastian_h domain users 2797 31. Mai 10:44
> > ts-fatal-bsp-sparc-leon3-clock-initialization.c
> > -rw-r--r-- 1 sebastian_h domain users 3148 31. Mai 10:45
> > ts-fatal-bsp-sparc-leon3-shutdown-response.c
> > -rw-r--r-- 1 sebastian_h domain users 4909 31. Mai 10:44
> > ts-fatal-bsp-sparc-leon3-shutdown.c
> >
> > We could also introduce subdirectories to organize things. The test
> > framework prints out the file name in messages, so it would be nice if
> > they remain unique. With subdirectories this would lead to longer path
> > names, for example
> >
> > testsuites/validation/sparc/leon3/tc-bsp-sparc-leon3-gr712rc.c
> >
> I see. Maybe it makes sense to have all BSP-specific tests in a bsps
> subdirectory, with the unique names encoded to ensure the arch/bsp
> combination appears in the filename, such as:
> testsuites/validation/bsps/tc-bsp-sparc-leon3-gr712rc.c
> If so, 'bsp-' can probably be omitted from the filename. This way,
> architecture-specific testing may also be easily possible, like
> tc-sparc-something.c
>

We also have to account for device driver/class type tests which
are not BSP specific but only work if a BSP supports a specific feature.
For example, Alex wrote some GPIO tests for the Microblaze work. Assuming
these were based on a common GPIO API, they would work on any BSP
which supported that API.

Similarly for other optional devices where the drivers are in rtems.git


>
> > >
> > > I would like to discuss possible ways to manage the integration of
> > > tests that are conditionally-built based on the arch/bsp tuple. We
> > > should have clear guidance for others who want to add such tests in
> > > the future, or who would modify existing tests.
> >
> > Yes, this makes sense. We could add a new section for BSP-specific tests
> to:
> >
> > https://docs.rtems.org/branches/master/eng/req/howto.html
> >
> > For a pre-qualified BSP you have to specify the fatal errors and write
> > validation tests for it. Other BSP-specific specification and validation
> > may be necessary for the kernel IO device driver, cache controller
> > support, memory management unit initialization, memory protection unit
> > initialization, etc.
> >

[PATCH] bsps/sparc: Deprecate BSP-specific interrupt API

[Sebastian Huber]

Update #3269.
---
 bsps/sparc/erc32/include/bsp.h | 10 +-
 bsps/sparc/leon2/include/bsp.h | 10 +-
 bsps/sparc/leon3/include/bsp.h | 10 +-
 3 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/bsps/sparc/erc32/include/bsp.h b/bsps/sparc/erc32/include/bsp.h
index cb62661aa1..1e8bddad33 100644
--- a/bsps/sparc/erc32/include/bsp.h
+++ b/bsps/sparc/erc32/include/bsp.h
@@ -105,7 +105,7 @@ typedef void (*bsp_shared_isr)(void *arg);
  *  isr   Function pointer to the ISR
  *  arg   Second argument to function isr
  */
-static __inline__ int BSP_shared_interrupt_register
+RTEMS_DEPRECATED static inline int BSP_shared_interrupt_register
(
int irq,
const char *info,
@@ -124,7 +124,7 @@ static __inline__ int BSP_shared_interrupt_register
  *  isr   Function pointer to the ISR
  *  arg   Second argument to function isr
  */
-static __inline__ int BSP_shared_interrupt_unregister
+RTEMS_DEPRECATED static inline int BSP_shared_interrupt_unregister
(
int irq,
bsp_shared_isr isr,
@@ -142,7 +142,7 @@ static __inline__ int BSP_shared_interrupt_unregister
  * Arguments
  *  irq   System IRQ number
  */
-static inline void BSP_shared_interrupt_clear( int irq )
+RTEMS_DEPRECATED static inline void BSP_shared_interrupt_clear( int irq )
 {
   (void) rtems_interrupt_clear( (rtems_vector_number) irq );
 }
@@ -154,7 +154,7 @@ static inline void BSP_shared_interrupt_clear( int irq )
  * Arguments
  *  irq   System IRQ number
  */
-static inline void BSP_shared_interrupt_unmask( int irq )
+RTEMS_DEPRECATED static inline void BSP_shared_interrupt_unmask( int irq )
 {
   (void) rtems_interrupt_vector_enable( (rtems_vector_number) irq );
 }
@@ -166,7 +166,7 @@ static inline void BSP_shared_interrupt_unmask( int irq )
  * Arguments
  *  irq System IRQ number
  */
-static inline void BSP_shared_interrupt_mask( int irq )
+RTEMS_DEPRECATED static inline void BSP_shared_interrupt_mask( int irq )
 {
   (void) rtems_interrupt_vector_disable( (rtems_vector_number) irq );
 }
diff --git a/bsps/sparc/leon2/include/bsp.h b/bsps/sparc/leon2/include/bsp.h
index 4a2f5967ef..67601d2351 100644
--- a/bsps/sparc/leon2/include/bsp.h
+++ b/bsps/sparc/leon2/include/bsp.h
@@ -129,7 +129,7 @@ typedef void (*bsp_shared_isr)(void *arg);
  *  isr   Function pointer to the ISR
  *  arg   Second argument to function isr
  */
-static __inline__ int BSP_shared_interrupt_register
+RTEMS_DEPRECATED static inline int BSP_shared_interrupt_register
(
int irq,
const char *info,
@@ -148,7 +148,7 @@ static __inline__ int BSP_shared_interrupt_register
  *  isr   Function pointer to the ISR
  *  arg   Second argument to function isr
  */
-static __inline__ int BSP_shared_interrupt_unregister
+RTEMS_DEPRECATED static inline int BSP_shared_interrupt_unregister
(
int irq,
bsp_shared_isr isr,
@@ -166,7 +166,7 @@ static __inline__ int BSP_shared_interrupt_unregister
  * Arguments
  *  irq   System IRQ number
  */
-static inline void BSP_shared_interrupt_clear( int irq )
+RTEMS_DEPRECATED static inline void BSP_shared_interrupt_clear( int irq )
 {
   (void) rtems_interrupt_clear( (rtems_vector_number) irq );
 }
@@ -178,7 +178,7 @@ static inline void BSP_shared_interrupt_clear( int irq )
  * Arguments
  *  irq   System IRQ number
  */
-static inline void BSP_shared_interrupt_unmask( int irq )
+RTEMS_DEPRECATED static inline void BSP_shared_interrupt_unmask( int irq )
 {
   (void) rtems_interrupt_vector_enable( (rtems_vector_number) irq );
 }
@@ -190,7 +190,7 @@ static inline void BSP_shared_interrupt_unmask( int irq )
  * Arguments
  *  irq System IRQ number
  */
-static inline void BSP_shared_interrupt_mask( int irq )
+RTEMS_DEPRECATED static inline void BSP_shared_interrupt_mask( int irq )
 {
   (void) rtems_interrupt_vector_disable( (rtems_vector_number) irq );
 }
diff --git a/bsps/sparc/leon3/include/bsp.h b/bsps/sparc/leon3/include/bsp.h
index 1712602bfd..ae48d3fd4e 100644
--- a/bsps/sparc/leon3/include/bsp.h
+++ b/bsps/sparc/leon3/include/bsp.h
@@ -148,7 +148,7 @@ typedef void (*bsp_shared_isr)(void *arg);
  *  isr   Function pointer to the ISR
  *  arg   Second argument to function isr
  */
-static __inline__ int BSP_shared_interrupt_register
+RTEMS_DEPRECATED static inline int BSP_shared_interrupt_register
(
int irq,
const char *info,
@@ -167,7 +167,7 @@ static __inline__ int BSP_shared_interrupt_register
  *  isr   Function pointer to the ISR
  *  arg   Second argument to function isr
  */
-static __inline__ int BSP_shared_interrupt_unregister
+RTEMS_DEPRECATED static inline int BSP_shared_interrupt_unregister
(
int irq,
bsp_shared_isr isr,
@@ -185,7 +185,7 @@ static __inline__ int BSP_shared_interrupt_unregister
  * Arguments
  *  irq   System IRQ number
  */
-static inline void BSP_shared_interrupt_clear( int irq )

[PATCH 1/2] pci: Do not use BSP-specific interrupt API

[Sebastian Huber]

Update #3269.
---
 cpukit/include/pci/irq.h | 17 -
 1 file changed, 4 insertions(+), 13 deletions(-)

diff --git a/cpukit/include/pci/irq.h b/cpukit/include/pci/irq.h
index 4069f1ffa8..8617dd1680 100644
--- a/cpukit/include/pci/irq.h
+++ b/cpukit/include/pci/irq.h
@@ -38,18 +38,9 @@
 #ifndef __PCI_IRQ_H__
 #define __PCI_IRQ_H__
 
-#include 
+#include 
 #include 
 
-/*
- * FIXME: This should be available via the IRQ extensions API.
- *
- * https://devel.rtems.org/ticket/3269
- */
-void BSP_shared_interrupt_clear(int irq);
-void BSP_shared_interrupt_unmask(int irq);
-void BSP_shared_interrupt_mask(int irq);
-
 /* PCI Handler (ISR) called when IRQ is generated by any of the PCI devices
  * connected to the same PCI IRQ Pin. This has been defined the same way as
  * rtems_interrupt_handler in order for BSPs to "direct-map" the register
@@ -106,7 +97,7 @@ static inline int pci_interrupt_unregister(int irq, pci_isr 
isr,
  */
 static inline void pci_interrupt_unmask(int irq)
 {
-   BSP_shared_interrupt_unmask(irq);
+   (void)rtems_interrupt_vector_enable((rtems_vector_number)irq);
 }
 
 /* Disable shared PCI IRQ handler. This function will mask the interrupt
@@ -122,7 +113,7 @@ static inline void pci_interrupt_unmask(int irq)
  */
 static inline void pci_interrupt_mask(int irq)
 {
-   BSP_shared_interrupt_mask(irq);
+   (void)rtems_interrupt_vector_disable((rtems_vector_number)irq);
 }
 
 /* Acknowledge the interrupt controller by writing to the interrupt controller.
@@ -136,7 +127,7 @@ static inline void pci_interrupt_mask(int irq)
  */
 static inline void pci_interrupt_clear(int irq)
 {
-   BSP_shared_interrupt_clear(irq);
+   (void)rtems_interrupt_clear((rtems_vector_number)irq);
 }
 
 #endif /* !__PCI_IRQ_H__ */
-- 
2.35.3

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[PATCH 2/2] bsps: Remove uses of BSP-specific interrupt API

[Sebastian Huber]

Update #3269.
---
 bsps/riscv/griscv/include/bsp.h |  4 ---
 bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c |  8 +++---
 bsps/sparc/erc32/include/bsp.h  | 15 ---
 bsps/sparc/leon2/include/bsp.h  | 15 ---
 bsps/sparc/leon3/include/bsp.h  | 15 ---
 bsps/sparc/shared/drvmgr/leon2_amba_bus.c   |  5 ++--
 bsps/sparc/shared/irq/irq-shared.c  | 29 -
 spec/build/bsps/sparc/leon3/obj.yml |  1 -
 8 files changed, 43 insertions(+), 49 deletions(-)

diff --git a/bsps/riscv/griscv/include/bsp.h b/bsps/riscv/griscv/include/bsp.h
index 9d6fb2a16f..c7d24839ca 100644
--- a/bsps/riscv/griscv/include/bsp.h
+++ b/bsps/riscv/griscv/include/bsp.h
@@ -71,10 +71,6 @@ extern "C" {
 
 /* GRLIB driver functions */
 
-extern void BSP_shared_interrupt_mask(int irq);
-extern void BSP_shared_interrupt_clear(int irq);
-extern void BSP_shared_interrupt_unmask(int irq);
-
 /*
  * Network driver configuration for greth
  */
diff --git a/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c 
b/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
index 96b77907a6..bc211e37b6 100644
--- a/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
+++ b/bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c
@@ -41,7 +41,7 @@
 #include 
 
 #include 
-#include 
+#include 
 
 #include 
 
@@ -227,7 +227,7 @@ static int ambapp_grlib_int_clear
struct drvmgr_dev *dev,
int irq)
 {
-   BSP_shared_interrupt_clear(irq);
+   (void) rtems_interrupt_clear(irq);
return DRVMGR_OK;
 }
 
@@ -237,7 +237,7 @@ static int ambapp_grlib_int_mask
int irq
)
 {
-   BSP_shared_interrupt_mask(irq);
+   bsp_interrupt_vector_disable(irq);
return DRVMGR_OK;
 }
 
@@ -247,7 +247,7 @@ static int ambapp_grlib_int_unmask
int irq
)
 {
-   BSP_shared_interrupt_unmask(irq);
+   bsp_interrupt_vector_enable(irq);
return DRVMGR_OK;
 }
 
diff --git a/bsps/sparc/erc32/include/bsp.h b/bsps/sparc/erc32/include/bsp.h
index fd453fb6c2..cb62661aa1 100644
--- a/bsps/sparc/erc32/include/bsp.h
+++ b/bsps/sparc/erc32/include/bsp.h
@@ -142,7 +142,10 @@ static __inline__ int BSP_shared_interrupt_unregister
  * Arguments
  *  irq   System IRQ number
  */
-extern void BSP_shared_interrupt_clear(int irq);
+static inline void BSP_shared_interrupt_clear( int irq )
+{
+  (void) rtems_interrupt_clear( (rtems_vector_number) irq );
+}
 
 /* Enable Interrupt. This function will unmask the IRQ at the interrupt
  * controller. This is normally done by _register(). Note that this will
@@ -151,7 +154,10 @@ extern void BSP_shared_interrupt_clear(int irq);
  * Arguments
  *  irq   System IRQ number
  */
-extern void BSP_shared_interrupt_unmask(int irq);
+static inline void BSP_shared_interrupt_unmask( int irq )
+{
+  (void) rtems_interrupt_vector_enable( (rtems_vector_number) irq );
+}
 
 /* Disable Interrupt. This function will mask one IRQ at the interrupt
  * controller. This is normally done by _unregister().  Note that this will
@@ -160,7 +166,10 @@ extern void BSP_shared_interrupt_unmask(int irq);
  * Arguments
  *  irq System IRQ number
  */
-extern void BSP_shared_interrupt_mask(int irq);
+static inline void BSP_shared_interrupt_mask( int irq )
+{
+  (void) rtems_interrupt_vector_disable( (rtems_vector_number) irq );
+}
 
 /*
  *  Delay for the specified number of microseconds.
diff --git a/bsps/sparc/leon2/include/bsp.h b/bsps/sparc/leon2/include/bsp.h
index 510262206b..4a2f5967ef 100644
--- a/bsps/sparc/leon2/include/bsp.h
+++ b/bsps/sparc/leon2/include/bsp.h
@@ -166,7 +166,10 @@ static __inline__ int BSP_shared_interrupt_unregister
  * Arguments
  *  irq   System IRQ number
  */
-extern void BSP_shared_interrupt_clear(int irq);
+static inline void BSP_shared_interrupt_clear( int irq )
+{
+  (void) rtems_interrupt_clear( (rtems_vector_number) irq );
+}
 
 /* Enable Interrupt. This function will unmask the IRQ at the interrupt
  * controller. This is normally done by _register(). Note that this will
@@ -175,7 +178,10 @@ extern void BSP_shared_interrupt_clear(int irq);
  * Arguments
  *  irq   System IRQ number
  */
-extern void BSP_shared_interrupt_unmask(int irq);
+static inline void BSP_shared_interrupt_unmask( int irq )
+{
+  (void) rtems_interrupt_vector_enable( (rtems_vector_number) irq );
+}
 
 /* Disable Interrupt. This function will mask one IRQ at the interrupt
  * controller. This is normally done by _unregister().  Note that this will
@@ -184,7 +190,10 @@ extern void BSP_shared_interrupt_unmask(int irq);
  * Arguments
  *  irq System IRQ number
  */
-extern void BSP_shared_interrupt_mask(int irq);
+static inline void BSP_shared_interrupt_mask( int irq )
+{
+  (void) rtems_interrupt_vector_disable( (rtems_vector_number) irq );
+}
 
 /*
  * Delay method
diff --git a/bsps/sparc/leon3/include/bsp.h b/bsps/sparc/leon3/include/bsp.h
index d47f5d2cdf..1712602bfd 100644
--- a/bsps/sparc/leon3/include/bsp.h
+++ b/bsps/s

Re: [PATCH] rtemsbsd/versal_slcr: Fix Versal GEM clock set

[Will]

This looks good as far as the functional content is concerned. As a nit, it
looks like some unnecessary newlines were added in cgem_set_ref_clk() and
the added if() conditional braces are inconsistent in their formatting so
feel free to tweak those before commit.

On Thu, Jun 15, 2023 at 12:48 AM  wrote:

> From: Aaron Nyholm 
>
> ---
>  rtemsbsd/sys/arm64/xilinx/versal_slcr.c | 34 ++---
>  rtemsbsd/sys/arm64/xilinx/versal_slcr.h |  6 +
>  2 files changed, 36 insertions(+), 4 deletions(-)
>
> diff --git a/rtemsbsd/sys/arm64/xilinx/versal_slcr.c
> b/rtemsbsd/sys/arm64/xilinx/versal_slcr.c
> index 74ebde91..1f4d48bc 100644
> --- a/rtemsbsd/sys/arm64/xilinx/versal_slcr.c
> +++ b/rtemsbsd/sys/arm64/xilinx/versal_slcr.c
> @@ -78,10 +78,13 @@ SYSCTL_NODE(_hw, OID_AUTO, versal, CTLFLAG_RD, 0,
> "Xilinx Versal ACAP SLCR");
>  int
>  cgem_set_ref_clk(int unit, int frequency)
>  {
> +
> struct versal_slcr_softc *sc = versal_slcr_softc_p;
> int div, last_error = 0;
> -   uint64_t clk_ctrl, pll_ctrl;
> +   uint64_t clk_ctrl, pll_ctrl, to_xpd_ctrl;
> uint32_t clk_ctrl_val, pll_ctrl_val, pll_freq, pll_reset,
> pll_bypass;
> +   uint32_t clk_src_sel, to_xpd_ctrl_val, to_xpd_div, to_xpd_freq;
> +
>
> if (!sc)
> return (-1);
> @@ -126,15 +129,38 @@ cgem_set_ref_clk(int unit, int frequency)
> }
>
> /* Apply divider */
> -  pll_freq >>= (pll_ctrl_val & VERSAL_SLCR_PLL_CTRL_DIV_MASK) >>
> VERSAL_SLCR_PLL_CTRL_DIV_SHIFT;
> +   pll_freq >>= (pll_ctrl_val & VERSAL_SLCR_PLL_CTRL_DIV_MASK) >>
> VERSAL_SLCR_PLL_CTRL_DIV_SHIFT;
> +
> +   /* Check if routed through {X}PLL_TO_XPD_CLK to GEM{unit}_REF_CLK
> and adjust */
> +   clk_src_sel = (clk_ctrl_val &
> VERSAL_SLCR_GEM_CLK_CTRL_SRCSEL_MASK);
> +   to_xpd_ctrl = 0;
> +   if (clk_src_sel == VERSAL_SLCR_GEM_CLK_CTRL_SRCSEL_P_PLL)
> +   {
> +   to_xpd_ctrl = VERSAL_SLCR_PPLL_TO_XPD_CTRL;
> +   } else if (clk_src_sel == VERSAL_SLCR_GEM_CLK_CTRL_SRCSEL_N_PLL)
> +   {
> +   to_xpd_ctrl = VERSAL_SLCR_NPLL_TO_XPD_CTRL;
> +   }
> +
> +   if (to_xpd_ctrl != 0) {
> +   to_xpd_ctrl_val = RD4(sc, to_xpd_ctrl);
> +   to_xpd_div = (to_xpd_ctrl_val &
> VERSAL_SLCR_XPD_CLK_CTRL_DIVISOR_MASK);
> +   to_xpd_div = to_xpd_div >> VERSAL_SLCR_XPD_CTRL_DIV_SHIFT;
> +   if (to_xpd_div == 0) {
> +   to_xpd_div = 1;
> +   }
> +   to_xpd_freq = pll_freq / to_xpd_div;
> +   } else {
> +   to_xpd_freq = pll_freq;
> +   }
>
> /* Find suitable divisor. Linear search, not the fastest method
> but hey.
>  */
> for (div = 1; div <= VERSAL_SLCR_GEM_CLK_CTRL_DIVISOR_MAX; div++) {
> -int div_freq = pll_freq / div;
> +   int div_freq = to_xpd_freq / div;
> int error = abs(frequency - div_freq);
> if (error >= last_error && last_error != 0) {
> -  div--;
> +   div--;
> break;
> }
> last_error = error;
> diff --git a/rtemsbsd/sys/arm64/xilinx/versal_slcr.h
> b/rtemsbsd/sys/arm64/xilinx/versal_slcr.h
> index e1c967ac..121c1e0a 100644
> --- a/rtemsbsd/sys/arm64/xilinx/versal_slcr.h
> +++ b/rtemsbsd/sys/arm64/xilinx/versal_slcr.h
> @@ -78,6 +78,12 @@
>  #define   VERSAL_SLCR_GEM_CLK_CTRL_SRCSEL_R_PLL(1<<0)
>  #define   VERSAL_SLCR_GEM_CLK_CTRL_SRCSEL_N_PLL(3<<0)
>
> +#define VERSAL_SLCR_PPLL_TO_XPD_CTRL   (VERSAL_SLCR_CRF_OFFSET +
> 0x100)
> +#define VERSAL_SLCR_NPLL_TO_XPD_CTRL   (VERSAL_SLCR_CRF_OFFSET +
> 0x104)
> +#define   VERSAL_SLCR_XPD_CLK_CTRL_DIVISOR_MAX 0x3ff
> +#define   VERSAL_SLCR_XPD_CLK_CTRL_DIVISOR_MASK
> (VERSAL_SLCR_XPD_CLK_CTRL_DIVISOR_MAX<<8)
> +#define   VERSAL_SLCR_XPD_CTRL_DIV_SHIFT   8
> +
>  #define VERSAL_DEFAULT_PS_CLK_FREQUENCY 
>
>  #ifdef _KERNEL
> --
> 2.25.1
>
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Re: [PATCH] eng: Add guidelines for validation tests

[Sebastian Huber]

On 15.06.23 11:28, Frank Kühndel wrote:



+
+* Tests for fatal errors shall have ``fatal`` as the most general 
file part,

+  for example ``ts-fatal-too-large-tls-size.c``.
+
+* Validation test suites shall have ``validation`` as the most 
general file

+  part, for example ``ts-validation-no-clock-0.c``.
+
+* Unit test suites shall have ``unit`` as the most general file part, 
for

+  example ``ts-unit-no-clock-0.c``.
+
+* Architecture-specific files shall have the architecture name as a 
file part,

+  for example ``ts-fatal-sparc-leon3-clock-initialization.c``.


I wonder whether ``ts-sparc-leon3-fatal-clock-initialization.c`` would 
be more logical?


So far, by definition the test category (unit, validation, performance, 
fatal, mem) is the most general category. I don't want to move existing 
things unnecessarily around, this should stay as it is.


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Re: [PATCH] eng: Add guidelines for validation tests

[Frank Kühndel]

On 6/15/23 09:33, Sebastian Huber wrote:

Subject:
[PATCH] eng: Add guidelines for validation tests
From:
Sebastian Huber 
Date:
6/15/23, 09:33

To:
devel@rtems.org


Update #3717.
---
  eng/req/howto.rst | 59 +++
  1 file changed, 59 insertions(+)

diff --git a/eng/req/howto.rst b/eng/req/howto.rst
index 0de3c01..688f693 100644
--- a/eng/req/howto.rst
+++ b/eng/req/howto.rst
@@ -1127,6 +1127,65 @@ the following post-condition states.
parameter in past calls to ${../if/directive:/name} shall not be
accessed by the ${../if/directive:/name} call.
  
+Validation Test Guidelines

+--
+
+The validation test cases, test runners, and test suites are generated by the
+``./spec2modules.py`` script from specification items.  For the placement and
+naming of the generated sources use the following rules:
+
+* Place architecture-specific validation test sources and programs into the
+  ``testsuites/validation/cpu`` directory.
+
+* Place BSP-specific validation test sources and programs into the
+  ``testsuites/validation/bsps`` directory.
+
+* Place all other validation test sources and programs into the
+  ``testsuites/validation`` directory.
+
+* Place architecture-specific unit test sources and programs into the
+  ``testsuites/unit/cpu`` directory.
+
+* Place BSP-specific unit test sources and programs into the
+  ``testsuites/unit/bsps`` directory.
+
+* Place all other unit test sources and programs into the
+  ``testsuites/unit`` directory.
+
+* Use dashes (``-``) to separate parts of a file name.  Use only dashes, the
+  digits ``0`` to ``9``, and the lower case characters ``a`` to ``z`` for file
+  names.  In particular, do not use underscores (``_``).
+
+* Use the prefix ``tc-`` for test case files.
+
+* Use the prefix ``tr-`` for test runner files.
+
+* Use the prefix ``ts-`` for test suite files.
+
+* Use the prefix ``tx-`` for test extension files (test support code).
+
+* Use hierarchical parts to compose a file name.  The order of the parts from
+  general to specific shall be left to right, for example
+  ``tc-task-construct.c``.


When reading "hierarchical parts" it was not clear to me what they 
meant. Maybe the sentence could be dropped and the next sentence 
rephrased into something like: "The parts separated by dashes shall be 
ordered from most general (left) to more specific (right), for example"



+
+* Tests for fatal errors shall have ``fatal`` as the most general file part,
+  for example ``ts-fatal-too-large-tls-size.c``.
+
+* Validation test suites shall have ``validation`` as the most general file
+  part, for example ``ts-validation-no-clock-0.c``.
+
+* Unit test suites shall have ``unit`` as the most general file part, for
+  example ``ts-unit-no-clock-0.c``.
+
+* Architecture-specific files shall have the architecture name as a file part,
+  for example ``ts-fatal-sparc-leon3-clock-initialization.c``.


I wonder whether ``ts-sparc-leon3-fatal-clock-initialization.c`` would 
be more logical?



+
+* BSP-specific files shall have the BSP family or variant name as a file part,
+  for example ``tc-sparc-gr712rc.c``.
+
+* Architecture-specific or BSP-specific tests shall use the ``enabled-by``
+  attribute of the associated build item to make them conditional.


"for example ``enabled-by: sparc/gr712rc``"?

"specification item" instead of "build item" to be consistent with the 
first sentence below the headline of this new section?


Is an ``enabled-by`` clause also needed for the architecture specific files?


+
  Verify the Specification Items
  --
  
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Re: bsps/xilinx-zynqmp : Add BSP for RPU

[Philip Kirkpatrick]

Thanks for all the good feedback.

RE Joel:
I'll fix my sloppy formatting that you caught and submit a revised patch.
If I'm realistic about my schedule, I probably won't be able to get to it
until next week.
For xttcps_hw.h, there already is one #ifndef __rtems__ around the
#includes, but on review there is another spot where I got lazy and used a
#if 0.  I'll correct that too.  Other than that, the file is unmodified.

On the discussion about a shared space, I'll leave that decision up to
you.  Tell me what you want and I can adjust as needed, or it could be done
in a follow-on patch.

For the Versal, I've never used that part and am not very familiar with it,
but the feedback from Aaron makes it sound like the core is probably pretty
similar.  One other possible difference would be in the timers but it does
look like the Versal has the same TTCs.  There just may be a small bit of
work to set up the clock input to it.

-Phil

On Thu, Jun 15, 2023 at 8:59 AM Aaron Nyholm <
aaron.nyh...@unfoldedeffective.com> wrote:

> This looks exciting.
>
> As for Versal support from Xilinx's Docs "RPU
>
> The real-time processing unit (RPU) Arm Cortex-R5F processor has faster
> clocking frequencies than the Zynq UltraScale+ MPSoC. The Versal Arm
> Cortex-R5F processor supports Vector Floating-Point v3 (VFPv3) whereas the
> Zynq UltraScale+ MPSoC Arm Cortex-R5F processor supports VFPv2."
> https://docs.xilinx.com/r/en-US/ug1273-versal-acap-design/RPU
>
> VFPv3 is backwards compatible with VFPv2 (
> https://developer.arm.com/documentation/ddi0344/d/programmer-s-model/vfpv3-architecture?lang=en
> ).
>
> So hopefully reuse for the Versal should relativity straight forward.
>
> Side note, even though Xilinx says the R5F in the ZynqMP has VFPv2, ARM
> says to compile with vfpv3_d16 like what is already in the BSP (
> https://developer.arm.com/documentation/dui0472/i/CIHGDBHC).
>
> Thanks, Aaron
>
>
> --- Original Message ---
> On Thursday, June 15th, 2023 at 9:17 AM, Chris Johns 
> wrote:
>
>
> >
> >
> > On 14/6/2023 6:08 pm, Philip Kirkpatrick wrote:
> >
> > > This patch adds support for running RTEMS on the RPU (cortex R5) cores
> of the
> > > ZynqMP.
> >
> >
> > Thanks for submitting this BSP. It is exciting to see this work and
> support
> > being added.
> >
> > How different are the ZynqMP RPU cores and the ones on the Versal?
> >
> > I have not looked in detail but I know they are both R5 devices and I
> think we
> > should be able to reuse this support. Is placing the RPU pieces under
> the ZynqMP
> > sources what we want or should we consider how we would reuse the RPU
> BSP on
> > other Xilinx devices?
> >
> > I am leading with this question without reviewing the sources in detail
> so I
> > apologise for this. I am happy to look at Versal support so I am not
> asking that
> > to be done.
> >
> > Chris
> > ___
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[PATCH] eng: Add guidelines for validation tests

[Sebastian Huber]

Update #3717.
---
 eng/req/howto.rst | 59 +++
 1 file changed, 59 insertions(+)

diff --git a/eng/req/howto.rst b/eng/req/howto.rst
index 0de3c01..688f693 100644
--- a/eng/req/howto.rst
+++ b/eng/req/howto.rst
@@ -1127,6 +1127,65 @@ the following post-condition states.
   parameter in past calls to ${../if/directive:/name} shall not be
   accessed by the ${../if/directive:/name} call.
 
+Validation Test Guidelines
+--
+
+The validation test cases, test runners, and test suites are generated by the
+``./spec2modules.py`` script from specification items.  For the placement and
+naming of the generated sources use the following rules:
+
+* Place architecture-specific validation test sources and programs into the
+  ``testsuites/validation/cpu`` directory.
+
+* Place BSP-specific validation test sources and programs into the
+  ``testsuites/validation/bsps`` directory.
+
+* Place all other validation test sources and programs into the
+  ``testsuites/validation`` directory.
+
+* Place architecture-specific unit test sources and programs into the
+  ``testsuites/unit/cpu`` directory.
+
+* Place BSP-specific unit test sources and programs into the
+  ``testsuites/unit/bsps`` directory.
+
+* Place all other unit test sources and programs into the
+  ``testsuites/unit`` directory.
+
+* Use dashes (``-``) to separate parts of a file name.  Use only dashes, the
+  digits ``0`` to ``9``, and the lower case characters ``a`` to ``z`` for file
+  names.  In particular, do not use underscores (``_``).
+
+* Use the prefix ``tc-`` for test case files.
+
+* Use the prefix ``tr-`` for test runner files.
+
+* Use the prefix ``ts-`` for test suite files.
+
+* Use the prefix ``tx-`` for test extension files (test support code).
+
+* Use hierarchical parts to compose a file name.  The order of the parts from
+  general to specific shall be left to right, for example
+  ``tc-task-construct.c``.
+
+* Tests for fatal errors shall have ``fatal`` as the most general file part,
+  for example ``ts-fatal-too-large-tls-size.c``.
+
+* Validation test suites shall have ``validation`` as the most general file
+  part, for example ``ts-validation-no-clock-0.c``.
+
+* Unit test suites shall have ``unit`` as the most general file part, for
+  example ``ts-unit-no-clock-0.c``.
+
+* Architecture-specific files shall have the architecture name as a file part,
+  for example ``ts-fatal-sparc-leon3-clock-initialization.c``.
+
+* BSP-specific files shall have the BSP family or variant name as a file part,
+  for example ``tc-sparc-gr712rc.c``.
+
+* Architecture-specific or BSP-specific tests shall use the ``enabled-by``
+  attribute of the associated build item to make them conditional.
+
 Verify the Specification Items
 --
 
-- 
2.35.3

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