Re: [PATCH v6 0/8] Add support for Tegra Activity Monitor

[Tomeu Vizoso]

On 18 March 2015 at 06:10, MyungJoo Ham  wrote:
>> Hello,
>>
>> something happened during the last cycle and an old version of the devfreq
>> driver was merged.
>>
>> This thread contains patches that bring it up to date to the last submitted
>> version and also incorporates the feedback that that version received, plus
>> some other small fixes and improvements that came up during rebase and
>> testing.
>>
>> These patches implement support for setting the rate of the EMC clock based 
>> on
>> stats collected from the ACTMON, a piece of hw in the Tegra124 that counts
>> memory accesses (among others).
>>
>> It depends on the following in-flight patches:
>>
>> * EMC driver: http://thread.gmane.org/gmane.linux.kernel/1907035
>> * CPUFreq driver: http://thread.gmane.org/gmane.linux.kernel/1897078
>>
>> I have pushed a branch here for testing:
>>
>> http://cgit.collabora.com/git/user/tomeu/linux.git/log/?h=actmon-v6
>>
>> Regards,
>>
>> Tomeu
>>
>> Tomeu Vizoso (8):
>>   of: Add binding for NVIDIA Tegra ACTMON node
>>   PM / devfreq: tegra: Update to v5 of the submitted patches
>>   clk: tegra: Have EMC clock implement determine_rate()
>>   PM / devfreq: tegra: Use clock rate constraints
>>   PM / devfreq: tegra: remove operating-points
>>   PM / devfreq: tegra: Set drvdata before enabling the irq
>>   PM / devfreq: tegra: Enable interrupts after resuming the devfreq
>> monitor
>>   ARM: tegra: Add Tegra124 ACTMON support
>
> Acked-by: MyungJoo Ham 
> for all PM / devfreq patches (2, 4, 5, 6, 7)
> And merged in for-rc tree with a little modification.

Thanks. Though that's fine with me, I was wondering if Mikko or
Alexandre would have any comments on the changes, even if they are
small regarding what they already reviewed.

> In the patch 2/8, I would like to add "const" in Line 748.
> Would it be fine with you?

Yes, thanks, that's fine.

Regards,

Tomeu

> (You may look at: 
> https://git.kernel.org/cgit/linux/kernel/git/mzx/devfreq.git/log/?h=for-rc )
>
>
> The diff after applying all 2/8 to 7/8 will be:
>
> diff --git a/drivers/devfreq/tegra-devfreq.c b/drivers/devfreq/tegra-devfreq.c
> index 0d1edd5..8e633a6 100644
> --- a/drivers/devfreq/tegra-devfreq.c
> +++ b/drivers/devfreq/tegra-devfreq.c
> @@ -740,7 +740,7 @@ static int tegra_devfreq_remove(struct platform_device 
> *pdev)
> return 0;
>  }
>
> -static struct of_device_id tegra_devfreq_of_match[] = {
> +static const struct of_device_id tegra_devfreq_of_match[] = {
> { .compatible = "nvidia,tegra124-actmon" },
> { },
>  };
>
>
>>
>>  .../devicetree/bindings/arm/tegra/actmon.txt   |  28 ++
>>  arch/arm/boot/dts/tegra124.dtsi|  11 +
>>  drivers/clk/tegra/clk-emc.c|  19 +-
>>  drivers/devfreq/tegra-devfreq.c| 480 
>> +++--
>>  4 files changed, 316 insertions(+), 222 deletions(-)
>>  create mode 100644 Documentation/devicetree/bindings/arm/tegra/actmon.txt
>>
>> --
>> 2.1.0
>>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v16 00/11] ARM: qcom: cpuidle support for 8064, 8074, 8084

[Andy Gross]

On Tue, Mar 17, 2015 at 04:33:40PM -0600, Lina Iyer wrote:



> 
> Tested on: 8074, 8084.
> 

These worked fine for me on IPQ8064 (ap148), however I did have to add my own DT
entries for the idle states and saw changes.

Also tested on APQ8064 (ifc6410).

Tested-by: Andy Gross 

-- 
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 0/3] tty slave device support - version 3.

[NeilBrown]

Hi again,
 here is version 3 of support for tty-slaves.

 This version introduces a new bus-type for tty-slaves, and causes
 a tty-slave device to appear in /sys/devices between the uart and the
 tty.
 It effectively intercepts and calls from the tty to the uart (i.e. any
 tty_operations) and applies extra functionality at that point.

 Currently the only driver intercepts open and close.
 It powers on the device on open, and powers off at last-close.

 Power can be controlled by a regulator or by toggling a GPIO.

 I think I've incorporated most of the feed back I received from
 previous versions, but if I missed something - I apologize.  If
 this approach is structurally acceptable then I can fix up all the
 smaller issues.

Thanks for your review,
NeilBrown


---

NeilBrown (3):
  TTY: use class_find_device to find port in uart_suspend/resume.
  TTY: add support for tty_slave devices.
  tty/slaves: add a driver to power on/off UART attached devices.


 .../bindings/tty_slave/wi2wi,w2cbw003.txt  |   19 +
 .../bindings/tty_slave/wi2wi,w2sg0004.txt  |   37 +
 .../devicetree/bindings/vendor-prefixes.txt|1 
 drivers/tty/Kconfig|1 
 drivers/tty/Makefile   |1 
 drivers/tty/serial/serial_core.c   |   21 -
 drivers/tty/slave/Kconfig  |   21 +
 drivers/tty/slave/Makefile |4 
 drivers/tty/slave/serial-power-manager.c   |  510 
 drivers/tty/slave/tty_slave_core.c |  136 +
 drivers/tty/tty_io.c   |   60 ++
 include/linux/tty.h|2 
 include/linux/tty_slave.h  |   26 +
 13 files changed, 813 insertions(+), 26 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/tty_slave/wi2wi,w2cbw003.txt
 create mode 100644 
Documentation/devicetree/bindings/tty_slave/wi2wi,w2sg0004.txt
 create mode 100644 drivers/tty/slave/Kconfig
 create mode 100644 drivers/tty/slave/Makefile
 create mode 100644 drivers/tty/slave/serial-power-manager.c
 create mode 100644 drivers/tty/slave/tty_slave_core.c
 create mode 100644 include/linux/tty_slave.h

--
Signature

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[RFC] ARM: dts: mt8173: Add psci-0.2 cpuidle support

[Howard Chen]

add device tree for psci-0.2 on mt8173 platform
add device tree for cupidle-arm64 on mt8173 platform

Signed-off-by: Howard Chen 
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 30 ++
 1 file changed, 26 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 8554ec3..96dff1e 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -48,6 +48,8 @@
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x000>;
+   enable-method = "psci";
+   cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;
};
 
cpu1: cpu@1 {
@@ -55,6 +57,7 @@
compatible = "arm,cortex-a53";
reg = <0x001>;
enable-method = "psci";
+   cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;
};
 
cpu2: cpu@100 {
@@ -62,6 +65,7 @@
compatible = "arm,cortex-a57";
reg = <0x100>;
enable-method = "psci";
+   cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;
};
 
cpu3: cpu@101 {
@@ -69,15 +73,33 @@
compatible = "arm,cortex-a57";
reg = <0x101>;
enable-method = "psci";
+   cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>;
};
+
+   idle-states {
+   entry-method = "arm,psci-0.2";
+
+   CPU_SLEEP_0_0: cpu-sleep-0-0 {
+   compatible = "arm,idle-state";
+   arm,psci-suspend-param = <0x001>;
+   entry-latency-us = <600>;
+   exit-latency-us = <600>;
+   min-residency-us = <1200>;
+   };
+
+   CLUSTER_SLEEP_0: cluster-sleep-0 {
+   compatible = "arm,idle-state";
+   arm,psci-suspend-param = <0x101>;
+   entry-latency-us = <800>;
+   exit-latency-us = <1000>;
+   min-residency-us = <2000>;
+   wakeup-latency-us = <1000>;
+   };
};
 
psci {
-   compatible = "arm,psci";
+   compatible = "arm,psci-0.2";
method = "smc";
-   cpu_suspend   = <0x8401>;
-   cpu_off   = <0x8402>;
-   cpu_on= <0x8403>;
};
 
uart_clk: dummy26m {
-- 
1.9.1

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 2/3] TTY: add support for tty_slave devices.

[NeilBrown]

A "tty slave" is a device connected via UART.
Such a device may need its own driver, e.g. for powering
it up on tty open and powering it down on tty release.

tty-slave is a new bus-type which drivers can be written and devices
created.

A "tty slave" device is declared as a child of the uart in
device-tree:

&uart1 {
bluetooth {
compatible = "wi2wi,w2cbw003";
vdd-supply = <&vaux4>;
};
};

This device will be inserted in the driver-model tree between the uart
and the tty.

The tty-slave driver can replace any of the tty_operations functions
so a call by the tty can be intercepted before being handled by the uart.


Signed-off-by: NeilBrown 
---
 drivers/tty/Kconfig|1 
 drivers/tty/Makefile   |1 
 drivers/tty/slave/Kconfig  |7 ++
 drivers/tty/slave/Makefile |2 +
 drivers/tty/slave/tty_slave_core.c |  136 
 drivers/tty/tty_io.c   |   54 +++---
 include/linux/tty.h|1 
 include/linux/tty_slave.h  |   26 +++
 8 files changed, 215 insertions(+), 13 deletions(-)
 create mode 100644 drivers/tty/slave/Kconfig
 create mode 100644 drivers/tty/slave/Makefile
 create mode 100644 drivers/tty/slave/tty_slave_core.c
 create mode 100644 include/linux/tty_slave.h

diff --git a/drivers/tty/Kconfig b/drivers/tty/Kconfig
index b24aa010f68c..f9155a45ee7c 100644
--- a/drivers/tty/Kconfig
+++ b/drivers/tty/Kconfig
@@ -419,4 +419,5 @@ config DA_CONSOLE
help
  This enables a console on a Dash channel.
 
+source drivers/tty/slave/Kconfig
 endif # TTY
diff --git a/drivers/tty/Makefile b/drivers/tty/Makefile
index 58ad1c05b7f8..ec57846eac29 100644
--- a/drivers/tty/Makefile
+++ b/drivers/tty/Makefile
@@ -31,3 +31,4 @@ obj-$(CONFIG_GOLDFISH_TTY)+= goldfish.o
 obj-$(CONFIG_DA_TTY)   += metag_da.o
 
 obj-y += ipwireless/
+obj-y += slave/
diff --git a/drivers/tty/slave/Kconfig b/drivers/tty/slave/Kconfig
new file mode 100644
index ..3976760c2e28
--- /dev/null
+++ b/drivers/tty/slave/Kconfig
@@ -0,0 +1,7 @@
+menuconfig TTY_SLAVE
+   tristate "TTY slave devices"
+   depends on OF
+   help
+ Devices which attach via a uart, but need extra
+ driver support for power management etc.
+
diff --git a/drivers/tty/slave/Makefile b/drivers/tty/slave/Makefile
new file mode 100644
index ..65669acb392e
--- /dev/null
+++ b/drivers/tty/slave/Makefile
@@ -0,0 +1,2 @@
+
+obj-$(CONFIG_TTY_SLAVE) += tty_slave_core.o
diff --git a/drivers/tty/slave/tty_slave_core.c 
b/drivers/tty/slave/tty_slave_core.c
new file mode 100644
index ..6218ea5bb69e
--- /dev/null
+++ b/drivers/tty/slave/tty_slave_core.c
@@ -0,0 +1,136 @@
+/*
+ * tty-slave-core - device bus for tty slaves
+ *
+ * Copyright (C) 2015 NeilBrown 
+ *
+ *This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ */
+
+/*
+ * A "tty-slave" is a device permanently attached to a particularly
+ * tty, typically wired to a UART.
+ * A tty-slave has two particular roles.
+ * Firstly it can intercept any tty_operations to provide extra control
+ * of the device.  For example it might intercept "open" and "close"
+ * in order to power the device up and down.  It might intercept
+ * "hangup" to toggle a reset line on the device.
+ *
+ * Secondly it appears as a parent of the tty in the device model, so
+ * that any attributes it presents are visible to udev when the tty
+ * is added.  This allows udev to start appropriate handlers such as
+ * hciattach or inputattach.
+ *
+ * tty-slave devices must be described in devicetree as a child node
+ * of the node which described the parent of the tty, typically a
+ * UART.
+ * If such a child is present, the tty device will not be registered
+ * until the slave device is fully probed and initialized.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+
+static int tty_slave_match(struct device *dev, struct device_driver *drv)
+{
+   return of_driver_match_device(dev, drv);
+}
+
+static void tty_slave_release(struct device *dev)
+{
+   kfree(dev);
+}
+
+struct bus_type tty_slave_bus_type = {
+   .name   = "tty-slave",
+   .match  = tty_slave_match,
+};
+
+int tty_slave_register(struct device *parent, struct device_node *node,
+  struct device *tty, struct tty_driver *drv)
+{
+   struct tty_slave *slave;
+   int retval;

[PATCH 1/3] TTY: use class_find_device to find port in uart_suspend/resume.

[NeilBrown]

uart_{suspend,resume}_port seach the children of a uart device
to find a particular tty device.
This requires all the ttys to be direct children of the uart.

A future patch will allow a 'tty_slave' to intervene between
the port and the uart, voiding this requirement.

So change to use class_find_device.  This is made possibly by
exporting a "tty_find_device" from tty_io.c

Signed-off-by: NeilBrown 
---
 drivers/tty/serial/serial_core.c |   21 -
 drivers/tty/tty_io.c |6 ++
 include/linux/tty.h  |1 +
 3 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c
index 6a1055ae3437..7abb7474870a 100644
--- a/drivers/tty/serial/serial_core.c
+++ b/drivers/tty/serial/serial_core.c
@@ -1960,26 +1960,19 @@ struct uart_match {
struct uart_driver *driver;
 };
 
-static int serial_match_port(struct device *dev, void *data)
-{
-   struct uart_match *match = data;
-   struct tty_driver *tty_drv = match->driver->tty_driver;
-   dev_t devt = MKDEV(tty_drv->major, tty_drv->minor_start) +
-   match->port->line;
-
-   return dev->devt == devt; /* Actually, only one tty per port */
-}
 
 int uart_suspend_port(struct uart_driver *drv, struct uart_port *uport)
 {
struct uart_state *state = drv->state + uport->line;
struct tty_port *port = &state->port;
struct device *tty_dev;
-   struct uart_match match = {uport, drv};
+   dev_t devt = MKDEV(drv->tty_driver->major,
+  drv->tty_driver->minor_start) +
+   uport->line;
 
mutex_lock(&port->mutex);
 
-   tty_dev = device_find_child(uport->dev, &match, serial_match_port);
+   tty_dev = tty_find_device(devt);
if (device_may_wakeup(tty_dev)) {
if (!enable_irq_wake(uport->irq))
uport->irq_wake = 1;
@@ -2039,12 +2032,14 @@ int uart_resume_port(struct uart_driver *drv, struct 
uart_port *uport)
struct uart_state *state = drv->state + uport->line;
struct tty_port *port = &state->port;
struct device *tty_dev;
-   struct uart_match match = {uport, drv};
struct ktermios termios;
+   dev_t devt = MKDEV(drv->tty_driver->major,
+  drv->tty_driver->minor_start) +
+   uport->line;
 
mutex_lock(&port->mutex);
 
-   tty_dev = device_find_child(uport->dev, &match, serial_match_port);
+   tty_dev = tty_find_device(devt);
if (!uport->suspended && device_may_wakeup(tty_dev)) {
if (uport->irq_wake) {
disable_irq_wake(uport->irq);
diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c
index 51f066aa375e..27632ad17d6f 100644
--- a/drivers/tty/tty_io.c
+++ b/drivers/tty/tty_io.c
@@ -3077,6 +3077,12 @@ static struct device *tty_get_device(struct tty_struct 
*tty)
return class_find_device(tty_class, NULL, &devt, dev_match_devt);
 }
 
+struct device *tty_find_device(dev_t devt)
+{
+   return class_find_device(tty_class, NULL, &devt, dev_match_devt);
+}
+EXPORT_SYMBOL(tty_find_device);
+
 
 /**
  * alloc_tty_struct
diff --git a/include/linux/tty.h b/include/linux/tty.h
index 358a337af598..04d5f1213700 100644
--- a/include/linux/tty.h
+++ b/include/linux/tty.h
@@ -461,6 +461,7 @@ extern void tty_vhangup(struct tty_struct *tty);
 extern int tty_hung_up_p(struct file *filp);
 extern void do_SAK(struct tty_struct *tty);
 extern void __do_SAK(struct tty_struct *tty);
+extern struct device *tty_find_device(dev_t devt);
 extern void no_tty(void);
 extern void tty_flush_to_ldisc(struct tty_struct *tty);
 extern void tty_buffer_free_all(struct tty_port *port);


--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 3/3] tty/slaves: add a driver to power on/off UART attached devices.

[NeilBrown]

If a platform has a particular device permanently attached to a UART,
there may be out-of-band signaling necessary to power the device
on and off.

This driver controls that signalling for a number of different devices.
It can
 - enable/disable a regulator
 - toggle a GPIO
 - register an 'rfkill' which can force the device to be off.

When the rfkill is absent or unblocked, the device will be on when the
associated tty device is open, and closed otherwise.

Signed-off-by: NeilBrown 
---
 .../bindings/tty_slave/wi2wi,w2cbw003.txt  |   19 +
 .../bindings/tty_slave/wi2wi,w2sg0004.txt  |   37 +
 .../devicetree/bindings/vendor-prefixes.txt|1 
 drivers/tty/slave/Kconfig  |   14 +
 drivers/tty/slave/Makefile |2 
 drivers/tty/slave/serial-power-manager.c   |  510 
 6 files changed, 583 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/tty_slave/wi2wi,w2cbw003.txt
 create mode 100644 
Documentation/devicetree/bindings/tty_slave/wi2wi,w2sg0004.txt
 create mode 100644 drivers/tty/slave/serial-power-manager.c

diff --git a/Documentation/devicetree/bindings/tty_slave/wi2wi,w2cbw003.txt 
b/Documentation/devicetree/bindings/tty_slave/wi2wi,w2cbw003.txt
new file mode 100644
index ..cfe6ee5e01e9
--- /dev/null
+++ b/Documentation/devicetree/bindings/tty_slave/wi2wi,w2cbw003.txt
@@ -0,0 +1,19 @@
+wi2wi bluetooth module
+
+This is accessed via a serial port and is largely controlled via that
+link.  Extra configuration is needed to enable power on/off
+
+Required properties:
+- compatible: "wi2wi,w2cbw003"
+- vdd-supply: regulator used to power the device.
+
+The node for this device must be the child of a UART.
+
+Example:
+
+&uart1 {
+   bluetooth {
+   compatible = "wi2wi,w2cbw003";
+   vdd-supply = <&vaux4>;
+   };
+};
diff --git a/Documentation/devicetree/bindings/tty_slave/wi2wi,w2sg0004.txt 
b/Documentation/devicetree/bindings/tty_slave/wi2wi,w2sg0004.txt
new file mode 100644
index ..fdc52cf56533
--- /dev/null
+++ b/Documentation/devicetree/bindings/tty_slave/wi2wi,w2sg0004.txt
@@ -0,0 +1,37 @@
+wi2wi GPS device
+
+This is accessed via a serial port and is largely controlled via that
+link.  Extra configuration is needed to enable power on/off
+
+Required properties:
+- compatible: "wi2wi,w2sg0004"
+- gpios: gpios used to toggle 'on/off' pin
+- interrupts: interrupt generated by RX pin when device
+  should be off
+
+Optional properties:
+- vdd-supply: regulator used to power antenna
+- pinctrl: "default", "off"
+  if "off" setting is provided it is imposed when device should
+  be off.  This can route the RX pin to a GPIO interrupt.
+
+The w2sg0004 uses a pin-toggle both to power-on and to
+power-off, so the driver needs to detect what state it is in.
+It does this by detecting characters on the RX line.
+When it should be off, these can optionally be detected by a GPIO.
+
+The node for this device must be the child of a UART.
+
+Example:
+&uart2 {
+   gps {
+   compatible = "wi2iw,w2sg0004";
+   vdd-supply = <&vsim>;
+   gpios = <&gpio5 17 0>; /* GPIO_145 */
+   interrupts-extended = <&gpio5 19 0>; /* GPIO_147 */
+   /* When off, switch RX to be an interrupt */
+   pinctrl-names = "default", "off";
+   pinctrl-0 = <&uart2_pins>;
+   pinctrl-1 = <&uart2_pins_rx_gpio>;
+   };
+};
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt 
b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 389ca1347a77..81d259303710 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -189,6 +189,7 @@ variscite   Variscite Ltd.
 viaVIA Technologies, Inc.
 virtio Virtual I/O Device Specification, developed by the OASIS consortium
 voipac Voipac Technologies s.r.o.
+wi2wi  wi2wi Inc.  http://www.wi2wi.com/
 winbond Winbond Electronics corp.
 wlfWolfson Microelectronics
 wm Wondermedia Technologies, Inc.
diff --git a/drivers/tty/slave/Kconfig b/drivers/tty/slave/Kconfig
index 3976760c2e28..05c5d966ae57 100644
--- a/drivers/tty/slave/Kconfig
+++ b/drivers/tty/slave/Kconfig
@@ -5,3 +5,17 @@ menuconfig TTY_SLAVE
  Devices which attach via a uart, but need extra
  driver support for power management etc.
 
+if TTY_SLAVE
+
+config SERIAL_POWER_MANAGER
+   tristate "Power Management controller for serial-attached devices"
+   default n
+   help
+ Some devices permanently attached via a UART can benefit from
+ being power-managed when the tty device is opened or closed.
+ This driver can support several such devices with simple
+ power requirements such as enabling a regulator.
+
+ If in doubt, say 'N'
+
+endif
diff --git a/drivers/tty/slave/Makefile b/drivers/tty/slave/Makefile
i

[GIT PULL] Support for Fujitsu MB86S7X SoCs

[Vincent Yang]

Hi Arnd and Olof,

Please consider pulling in these patches for series of Fujitsu SoC
based around variations of 2xCA7+2xCA15 big.LITTLE architecture.

The MHU driver is already queued in Mailbox tree.

Thanks,

The following changes since commit c517d838eb7d07bbe9507871fab3931deccff539:

  Linux 4.0-rc1 (2015-02-22 18:21:14 -0800)

are available in the git repository at:

  git://git.linaro.org/landing-teams/working/fujitsu/integration.git
s7x-arch-pull

for you to fetch changes up to 9cf417fee0bbea9296791fa9a15ab289307bb26a:

  ARM: MB86S7x: Add configs (2015-03-17 11:22:40 +0530)


Jassi Brar (6):
  ARM: Add platform support for Fujitsu MB86S7X SoCs
  ARM: MB86S7X: Add MCPM support
  clk: Add clock driver for mb86s7x
  dt: mb86s7x: add dt files for MB86S7x evbs
  of: add Fujitsu vendor prefix
  ARM: MB86S7x: Add configs

 Documentation/devicetree/bindings/arm/mb86s7x.txt  |   8 +
 .../bindings/clock/fujitsu,mb86s70-crg11.txt   |  26 +
 .../devicetree/bindings/soc/mb86s7x/scb_mhu.txt|  35 ++
 .../devicetree/bindings/vendor-prefixes.txt|   1 +
 MAINTAINERS|   7 +
 arch/arm/Kconfig   |   2 +
 arch/arm/Makefile  |   1 +
 arch/arm/boot/dts/Makefile |   3 +
 arch/arm/boot/dts/mb86s70.dtsi |  91 
 arch/arm/boot/dts/mb86s70eb.dts|  57 +++
 arch/arm/boot/dts/mb86s73.dtsi |  63 +++
 arch/arm/boot/dts/mb86s73eb.dts|  44 ++
 arch/arm/boot/dts/mb86s7x.dtsi | 142 ++
 arch/arm/configs/fujitsu_defconfig | 232 +
 arch/arm/configs/multi_v7_defconfig|   5 +
 arch/arm/mach-mb86s7x/Kconfig  |  19 +
 arch/arm/mach-mb86s7x/Makefile |   3 +
 arch/arm/mach-mb86s7x/board.c  |  23 +
 arch/arm/mach-mb86s7x/mcpm.c   | 318 +
 arch/arm/mach-mb86s7x/smc.S|  27 ++
 drivers/clk/Makefile   |   1 +
 drivers/clk/clk-mb86s7x.c  | 386 +++
 drivers/soc/Makefile   |   1 +
 drivers/soc/mb86s7x/Makefile   |   4 +
 drivers/soc/mb86s7x/scb_mhu.c  | 529 +
 include/soc/mb86s7x/scb_mhu.h  | 103 
 26 files changed, 2131 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/mb86s7x.txt
 create mode 100644
Documentation/devicetree/bindings/clock/fujitsu,mb86s70-crg11.txt
 create mode 100644 Documentation/devicetree/bindings/soc/mb86s7x/scb_mhu.txt
 create mode 100644 arch/arm/boot/dts/mb86s70.dtsi
 create mode 100644 arch/arm/boot/dts/mb86s70eb.dts
 create mode 100644 arch/arm/boot/dts/mb86s73.dtsi
 create mode 100644 arch/arm/boot/dts/mb86s73eb.dts
 create mode 100644 arch/arm/boot/dts/mb86s7x.dtsi
 create mode 100644 arch/arm/configs/fujitsu_defconfig
 create mode 100644 arch/arm/mach-mb86s7x/Kconfig
 create mode 100644 arch/arm/mach-mb86s7x/Makefile
 create mode 100644 arch/arm/mach-mb86s7x/board.c
 create mode 100644 arch/arm/mach-mb86s7x/mcpm.c
 create mode 100644 arch/arm/mach-mb86s7x/smc.S
 create mode 100644 drivers/clk/clk-mb86s7x.c
 create mode 100644 drivers/soc/mb86s7x/Makefile
 create mode 100644 drivers/soc/mb86s7x/scb_mhu.c
 create mode 100644 include/soc/mb86s7x/scb_mhu.h
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v6 1/6] clk: iproc: define Broadcom iProc clock binding

[Ray Jui]

Document the device tree binding for Broadcom iProc architecture based
clock controller

Signed-off-by: Ray Jui 
Reviewed-by: Scott Branden 
---
 .../bindings/clock/brcm,iproc-clocks.txt   |  171 
 1 file changed, 171 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt

diff --git a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt 
b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
new file mode 100644
index 000..bf2316b
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
@@ -0,0 +1,171 @@
+Broadcom iProc Family Clocks
+
+This binding uses the common clock binding:
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+The iProc clock controller manages clocks that are common to the iProc family.
+An SoC from the iProc family may have several PPLs, e.g., ARMPLL, GENPLL,
+LCPLL0, MIPIPLL, and etc., all derived from an onboard crystal. Each PLL
+comprises of several leaf clocks
+
+Required properties for PLLs:
+- compatible:
+Should have a value of the form "brcm,-". For example, GENPLL on
+Cygnus has a compatible string of "brcm,cygnus-genpll"
+
+- #clock-cells:
+Must be <0>
+
+- reg:
+Define the base and range of the I/O address space that contain the iProc
+clock control registers required for the PLL
+
+- clocks:
+The input parent clock phandle for the PLL. For all iProc PLLs, this is an
+onboard crystal with a fixed rate
+
+Example:
+
+   osc: oscillator {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   clock-frequency = <2500>;
+   };
+
+   genpll: genpll {
+   #clock-cells = <0>;
+   compatible = "brcm,cygnus-genpll";
+   reg = <0x0301d000 0x2c>,
+   <0x0301c020 0x4>;
+   clocks = <&osc>;
+   };
+
+Required properties for leaf clocks of a PLL:
+
+- compatible:
+Should have a value of the form "brcm,--clk". For example, leaf
+clocks derived from the GENPLL on Cygnus SoC have a compatible string of
+"brcm,cygnus-genpll-clk"
+
+- #clock-cells:
+Have a value of <1> since there are more than 1 leaf clock of a
+given PLL
+
+- reg:
+Define the base and range of the I/O address space that contain the iProc
+clock control registers required for the PLL leaf clocks
+
+- clocks:
+The input parent PLL phandle for the leaf clock
+
+- clock-output-names:
+An ordered list of strings defining the names of the leaf clocks
+
+Example:
+
+   genpll: genpll {
+   #clock-cells = <0>;
+   compatible = "brcm,cygnus-genpll";
+   reg = <0x0301d000 0x2c>,
+   <0x0301c020 0x4>;
+   clocks = <&osc>;
+   };
+
+   genpll_clks: genpll_clks {
+   #clock-cells = <1>;
+   compatible = "brcm,cygnus-genpll-clk";
+   reg = <0x0301d000 0x2c>;
+   clocks = <&genpll>;
+   clock-output-names = "axi21", "250mhz", "ihost_sys",
+   "enet_sw", "audio_125", "can";
+   };
+
+Required properties for ASIU clocks:
+
+ASIU clocks are a special case. These clocks are derived directly from the
+reference clock of the onboard crystal
+
+- compatible:
+Should have a value of the form "brcm,-asiu-clk". For example, ASIU
+clocks for Cygnus have a compatible string of "brcm,cygnus-asiu-clk"
+
+- #clock-cells:
+Have a value of <1> since there are more than 1 ASIU clocks
+
+- reg:
+Define the base and range of the I/O address space that contain the iProc
+clock control registers required for ASIU clocks
+
+- clocks:
+The input parent clock phandle for the ASIU clock, i.e., the onboard
+crystal
+
+- clock-output-names:
+An ordered list of strings defining the names of the ASIU clocks
+
+Example:
+
+   osc: oscillator {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   clock-frequency = <2500>;
+   };
+
+   asiu_clks: asiu_clks {
+   #clock-cells = <1>;
+   compatible = "brcm,cygnus-asiu-clk";
+   reg = <0x0301d048 0xc>,
+   <0x180aa024 0x4>;
+   clocks = <&osc>;
+   clock-output-names = "keypad", "adc/touch", "pwm";
+   };
+
+Cygnus
+--
+PLL and leaf clock compatible strings for Cygnus are:
+"brcm,cygnus-armpll"
+"brcm,cygnus-genpll"
+"brcm,cygnus-lcpll0"
+"brcm,cygnus-mipipll"
+"brcm,cygnus-genpll-clk"
+"brcm,cygnus-lcpll0-clk"
+"brcm,cygnus-mipipll-clk"
+"brcm,cygnus-asiu-clk"
+
+The following table defines the set of PLL/clock index and ID for Cygnus.
+These clock IDs are defined in:
+"include/dt-bindings/clock/bcm-cygnus.h"
+
+Clock  Source   Index   ID
+-----   -
+crystalN/A  N/A N/A
+
+armpll cr

[PATCH v6 5/6] ARM: dts: enable clock support for Broadcom Cygnus

[Ray Jui]

Replace current device tree dummy clocks with real clock support for
Broadcom Cygnus SoC

Signed-off-by: Ray Jui 
Reviewed-by: Scott Branden 
---
 arch/arm/boot/dts/bcm-cygnus-clock.dtsi |  112 ---
 arch/arm/boot/dts/bcm-cygnus.dtsi   |2 +-
 2 files changed, 88 insertions(+), 26 deletions(-)

diff --git a/arch/arm/boot/dts/bcm-cygnus-clock.dtsi 
b/arch/arm/boot/dts/bcm-cygnus-clock.dtsi
index 60d8389..92aab3d 100644
--- a/arch/arm/boot/dts/bcm-cygnus-clock.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus-clock.dtsi
@@ -36,56 +36,118 @@ clocks {
ranges;
 
osc: oscillator {
+   #clock-cells = <0>;
compatible = "fixed-clock";
-   #clock-cells = <1>;
clock-frequency = <2500>;
};
 
-   apb_clk: apb_clk {
-   compatible = "fixed-clock";
+   /* Cygnus ARM PLL */
+   armpll: armpll {
#clock-cells = <0>;
-   clock-frequency = <10>;
+   compatible = "brcm,cygnus-armpll";
+   clocks = <&osc>;
+   reg = <0x1900 0x1000>;
};
 
-   periph_clk: periph_clk {
-   compatible = "fixed-clock";
+   /* peripheral clock for system timer */
+   arm_periph_clk: arm_periph_clk {
#clock-cells = <0>;
-   clock-frequency = <5>;
+   compatible = "fixed-factor-clock";
+   clocks = <&armpll>;
+   clock-div = <2>;
+   clock-mult = <1>;
};
 
-   sdio_clk: lcpll_ch2 {
-   compatible = "fixed-clock";
+   /* APB bus clock */
+   apb_clk: apb_clk {
#clock-cells = <0>;
-   clock-frequency = <2>;
+   compatible = "fixed-factor-clock";
+   clocks = <&armpll>;
+   clock-div = <4>;
+   clock-mult = <1>;
};
 
-   axi81_clk: axi81_clk {
-   compatible = "fixed-clock";
+   genpll: genpll {
#clock-cells = <0>;
-   clock-frequency = <1>;
+   compatible = "brcm,cygnus-genpll";
+   reg = <0x0301d000 0x2c>,
+   <0x0301c020 0x4>;
+   clocks = <&osc>;
};
 
-   keypad_clk: keypad_clk {
-   compatible = "fixed-clock";
+   /* various clocks running off the GENPLL */
+   genpll_clks: genpll_clks {
+   #clock-cells = <1>;
+   compatible = "brcm,cygnus-genpll-clk";
+   reg = <0x0301d000 0x2c>;
+   clocks = <&genpll>;
+   clock-output-names = "axi21", "250mhz", "ihost_sys",
+   "enet_sw", "audio_125", "can";
+   };
+
+   /* always 1/2 of the axi21 clock */
+   axi41_clk: axi41_clk {
#clock-cells = <0>;
-   clock-frequency = <31806>;
+   compatible = "fixed-factor-clock";
+   clocks = <&genpll_clks 0>;
+   clock-div = <2>;
+   clock-mult = <1>;
};
 
-   adc_clk: adc_clk {
-   compatible = "fixed-clock";
+   /* always 1/4 of the axi21 clock */
+   axi81_clk: axi81_clk {
#clock-cells = <0>;
-   clock-frequency = <1562500>;
+   compatible = "fixed-factor-clock";
+   clocks = <&genpll_clks 0>;
+   clock-div = <4>;
+   clock-mult = <1>;
};
 
-   pwm_clk: pwm_clk {
-   compatible = "fixed-clock";
+   lcpll0: lcpll0 {
#clock-cells = <0>;
-   clock-frequency = <100>;
+   compatible = "brcm,cygnus-lcpll0";
+   reg = <0x0301d02c 0x1c>,
+   <0x0301c020 0x4>;
+   clocks = <&osc>;
};
 
-   lcd_clk: mipipll_ch1 {
-   compatible = "fixed-clock";
+   /* various clocks running off the LCPLL0 */
+   lcpll0_clks: lcpll0_clks {
+   #clock-cells = <1>;
+   compatible = "brcm,cygnus-lcpll0-clk";
+   reg = <0x0301d02c 0x1c>;
+   clocks = <&lcpll0>;
+   clock-output-names = "pcie_phy", "ddr_phy", "sdio",
+   "usb_phy", "smart_card", "ch5";
+   };
+
+   mipipll: mipipll {
#clock-cells = <0>;
-   clock-frequency = <1>;
+   compatible = "brcm,cygnus-mipipll";
+   reg = <0x180a9800 0x2c>,
+   <0x0301c020 0x4>,
+   <0x180aa024 0x4>;
+   clocks = <&osc>;
+
+   assigned-clocks = <&mipipll>;
+   assigned-clock-rates = <21>;
+   };
+
+   mipipll_clks: mipipll_clks {
+   #clock-cells = <1>;
+   compatible = "brcm,cygnus-mipipll-clk";
+   reg = <0x180a9800 0x2c>;
+   clocks = <&mipipll>;
+   clock-output-nam

[PATCH v6 6/6] clk: cygnus: remove Cygnus dummy clock binding

[Ray Jui]

Remove old Cygnus dummy clock binding document, as it's replaced by
Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt

Signed-off-by: Ray Jui 
---
 .../devicetree/bindings/clock/bcm-cygnus-clock.txt |   34 
 1 file changed, 34 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/clock/bcm-cygnus-clock.txt

diff --git a/Documentation/devicetree/bindings/clock/bcm-cygnus-clock.txt 
b/Documentation/devicetree/bindings/clock/bcm-cygnus-clock.txt
deleted file mode 100644
index 00d26ed..000
--- a/Documentation/devicetree/bindings/clock/bcm-cygnus-clock.txt
+++ /dev/null
@@ -1,34 +0,0 @@
-Broadcom Cygnus Clocks
-
-This binding uses the common clock binding:
-Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Currently various "fixed" clocks are declared for peripheral drivers that use
-the common clock framework to reference their core clocks. Proper support of
-these clocks will be added later
-
-Device tree example:
-
-   clocks {
-   #address-cells = <1>;
-   #size-cells = <1>;
-   ranges;
-
-   osc: oscillator {
-   compatible = "fixed-clock";
-   #clock-cells = <1>;
-   clock-frequency = <2500>;
-   };
-
-   apb_clk: apb_clk {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-frequency = <10>;
-   };
-
-   periph_clk: periph_clk {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-frequency = <5>;
-   };
-   };
-- 
1.7.9.5

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v6 4/6] clk: cygnus: add clock support for Broadcom Cygnus

[Ray Jui]

The Broadcom Cygnus SoC is architected under the iProc architecture. It
has the following PLLs: ARMPLL, GENPLL, LCPLL0, MIPIPLL, all dervied
from an onboard crystal. Cygnus also has various ASIU clocks that are
derived directly from the onboard crystal.

Signed-off-by: Ray Jui 
Reviewed-by: Scott Branden 
---
 drivers/clk/bcm/Makefile   |1 +
 drivers/clk/bcm/clk-cygnus.c   |  284 
 include/dt-bindings/clock/bcm-cygnus.h |   65 
 3 files changed, 350 insertions(+)
 create mode 100644 drivers/clk/bcm/clk-cygnus.c
 create mode 100644 include/dt-bindings/clock/bcm-cygnus.h

diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
index 6926636..afcbe55 100644
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@ -3,3 +3,4 @@ obj-$(CONFIG_CLK_BCM_KONA)  += clk-kona-setup.o
 obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o
 obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o
 obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o 
clk-iproc-clk.o clk-iproc-asiu.o
+obj-$(CONFIG_ARCH_BCM_CYGNUS)  += clk-cygnus.o
diff --git a/drivers/clk/bcm/clk-cygnus.c b/drivers/clk/bcm/clk-cygnus.c
new file mode 100644
index 000..fe3013b
--- /dev/null
+++ b/drivers/clk/bcm/clk-cygnus.c
@@ -0,0 +1,284 @@
+/*
+ * Copyright (C) 2014 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include "clk-iproc.h"
+
+#define reg_val(o, s, w) { .offset = o, .shift = s, .width = w, }
+
+#define aon_val(o, pw, ps, is) { .offset = o, .pwr_width = pw, \
+   .pwr_shift = ps, .iso_shift = is }
+
+#define asiu_div_val(o, es, hs, hw, ls, lw) \
+   { .offset = o, .en_shift = es, .high_shift = hs, \
+   .high_width = hw, .low_shift = ls, .low_width = lw }
+
+#define reset_val(o, rs, prs, kis, kiw, kps, kpw, kas, kaw) { .offset = o, \
+   .reset_shift = rs, .p_reset_shift = prs, .ki_shift = kis, \
+   .ki_width = kiw, .kp_shift = kps, .kp_width = kpw, .ka_shift = kas, \
+   .ka_width = kaw }
+
+#define vco_ctrl_val(uo, lo) { .u_offset = uo, .l_offset = lo }
+
+#define enable_val(o, es, hs, bs) { .offset = o, .enable_shift = es, \
+   .hold_shift = hs, .bypass_shift = bs }
+
+#define asiu_gate_val(o, es) { .offset = o, .en_shift = es }
+
+static void __init cygnus_armpll_init(struct device_node *node)
+{
+   iproc_armpll_setup(node);
+}
+CLK_OF_DECLARE(cygnus_armpll, "brcm,cygnus-armpll", cygnus_armpll_init);
+
+static const struct iproc_pll_ctrl genpll = {
+   .flags = IPROC_CLK_AON | IPROC_CLK_PLL_HAS_NDIV_FRAC,
+   .aon = aon_val(0x0, 2, 1, 0),
+   .reset = reset_val(0x0, 11, 10, 4, 3, 0, 4, 7, 3),
+   .ndiv_int = reg_val(0x10, 20, 10),
+   .ndiv_frac = reg_val(0x10, 0, 20),
+   .pdiv = reg_val(0x14, 0, 4),
+   .vco_ctrl = vco_ctrl_val(0x18, 0x1c),
+   .status = reg_val(0x28, 12, 1),
+};
+
+static void __init cygnus_genpll_init(struct device_node *node)
+{
+   iproc_pll_setup(node, &genpll, NULL, 0);
+}
+CLK_OF_DECLARE(cygnus_genpll, "brcm,cygnus-genpll", cygnus_genpll_init);
+
+static const struct iproc_pll_ctrl lcpll0 = {
+   .flags = IPROC_CLK_AON,
+   .aon = aon_val(0x0, 2, 5, 4),
+   .reset = reset_val(0x0, 31, 30, 27, 3, 23, 4, 19, 4),
+   .ndiv_int = reg_val(0x4, 16, 10),
+   .pdiv = reg_val(0x4, 26, 4),
+   .vco_ctrl = vco_ctrl_val(0x10, 0x14),
+   .status = reg_val(0x18, 12, 1),
+};
+
+static void __init cygnus_lcpll0_init(struct device_node *node)
+{
+   iproc_pll_setup(node, &lcpll0, NULL, 0);
+}
+CLK_OF_DECLARE(cygnus_lcpll0, "brcm,cygnus-lcpll0", cygnus_lcpll0_init);
+
+/*
+ * MIPI PLL VCO frequency parameter table
+ */
+static const struct iproc_pll_vco_freq_param mipipll_vco_params[] = {
+   /* rate (Hz) ndiv_int ndiv_frac pdiv */
+   { 75000UL,   30, 0,1 },
+   { 10UL,  40, 0,1 },
+   { 135000ul,  54, 0,1 },
+   { 20UL,  80, 0,1 },
+   { 21UL,  84, 0,1 },
+   { 225000UL,  90, 0,1 },
+   { 25UL,  100,0,1 },
+   { 27UL,  54, 0,0 },
+   { 297500UL,  119,0,1 },
+   { 31UL,  124,0,1 },
+   { 315000UL,  126,0,1 },
+};
+
+static const struct iproc_pll_ctrl mipipll = {
+   .flags = IPROC_CLK_PLL_ASIU | IPROC_CLK_PLL_HAS_NDIV_FRAC |
+IPROC_CL

[PATCH v6 3/6] clk: Change bcm clocks build dependency

[Ray Jui]

The clock code under drivers/clk/bcm now contains code for both the
Broadcom mobile SoCs and the iProc SoCs. Change the the makefile
dependency to be under config flag CONFIG_ARCH_BCM that's enabled for
both families of SoCs

Signed-off-by: Ray Jui 
---
 drivers/clk/Makefile |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index d478ceb..1dde3c8 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -43,7 +43,7 @@ obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o
 obj-$(CONFIG_COMMON_CLK_WM831X)+= clk-wm831x.o
 obj-$(CONFIG_COMMON_CLK_XGENE) += clk-xgene.o
 obj-$(CONFIG_COMMON_CLK_AT91)  += at91/
-obj-$(CONFIG_ARCH_BCM_MOBILE)  += bcm/
+obj-$(CONFIG_ARCH_BCM) += bcm/
 obj-$(CONFIG_ARCH_BERLIN)  += berlin/
 obj-$(CONFIG_ARCH_HI3xxx)  += hisilicon/
 obj-$(CONFIG_ARCH_HIP04)   += hisilicon/
-- 
1.7.9.5

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v6 0/6] Add common clock support for Broadcom iProc architecture

[Ray Jui]

This patchset contains the initial common clock support for Broadcom's iProc
family of SoCs. The iProc clock architecture comprises of various PLLs, e.g.,
ARMPLL, GENPLL, LCPLL0, MIPIPLL, and etc. An onboard crystal serves as the
basic reference clock for these PLLs. Each PLL may have several leaf clocks.
One special group of clocks is the ASIU clocks, which are dervied directly
from the crystal reference clock.

This patchset also contains the basic clock support for the Broadcom Cygnus
SoC, which implements the iProc clock architecture

Changes from v5:
 - Rebase to v4.0-rc4
 - Drop of_clk_get_parent_rate helper function from the clock framework
 - Get rid of custom "clock-frequency" support in iProc PLL code. Instead, add
   standard clock set_rate and round_rate support and make use of DT properties
   "assigned-clocks" and "assigned-clock-rates" to initialize PLL to the
   desired rate when registering to the clock framework
 - Add SW workaround for ASIC bug on MIPI PLL to always read back the same
   register following a write transaction, to ensure value is written to the
   correct register

Changes from v4:
 - Add of_clk_get_parent_rate helper function into the clock framework
 - Switch to use of_clk_get_parent_rate in the iProc PLL clock driver

Changes from v3:
 - Fix incorrect use of passing in of_clk_src_onecell_get when adding ARM PLL
   and other iProc PLLs as clock provider. These PLLs have zero cells in DT and
   thefore of_clk_src_simple_get should be used instead
 - Rename Cygnus MIPI PLL Channel 2 clock from BCM_CYGNUS_MIPIPLL_CH2_UNUSED
   to BCM_CYGNUS_MIPIPLL_CH2_V3D, since a 3D graphic rendering engine has been
   integrated into Cygnus revision B0 and has its core clock running off
   MIPI PLL Channel 2
 - Changed default MIPI PLL VCO frequency from 1.75 GHz to 2.1 GHz. This allows
   us to derive 300 MHz V3D clock from channel 2 through the post divisor

Changes from v2:
 - Re-arrange Cygnus clock/pll init functions so each init function is right
   next to its clock table
 - Removed #defines for number of clocks in Cygnus. Have the number of clocks
   automatically determined based on array size of the clock table

Changes from v1:
 - Separate drivers/clk/Makefile change for drivers/clk/bcm out to a standalone 
patch

Ray Jui (6):
  clk: iproc: define Broadcom iProc clock binding
  clk: iproc: add initial common clock support
  clk: Change bcm clocks build dependency
  clk: cygnus: add clock support for Broadcom Cygnus
  ARM: dts: enable clock support for Broadcom Cygnus
  clk: cygnus: remove Cygnus dummy clock binding

 .../devicetree/bindings/clock/bcm-cygnus-clock.txt |   34 --
 .../bindings/clock/brcm,iproc-clocks.txt   |  171 +++
 arch/arm/boot/dts/bcm-cygnus-clock.dtsi|  112 -
 arch/arm/boot/dts/bcm-cygnus.dtsi  |2 +-
 drivers/clk/Makefile   |2 +-
 drivers/clk/bcm/Kconfig|9 +
 drivers/clk/bcm/Makefile   |2 +
 drivers/clk/bcm/clk-cygnus.c   |  284 
 drivers/clk/bcm/clk-iproc-armpll.c |  282 +++
 drivers/clk/bcm/clk-iproc-asiu.c   |  275 +++
 drivers/clk/bcm/clk-iproc-clk.c|  244 ++
 drivers/clk/bcm/clk-iproc-pll.c|  490 
 drivers/clk/bcm/clk-iproc.h|  164 +++
 include/dt-bindings/clock/bcm-cygnus.h |   65 +++
 14 files changed, 2075 insertions(+), 61 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/clock/bcm-cygnus-clock.txt
 create mode 100644 
Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
 create mode 100644 drivers/clk/bcm/clk-cygnus.c
 create mode 100644 drivers/clk/bcm/clk-iproc-armpll.c
 create mode 100644 drivers/clk/bcm/clk-iproc-asiu.c
 create mode 100644 drivers/clk/bcm/clk-iproc-clk.c
 create mode 100644 drivers/clk/bcm/clk-iproc-pll.c
 create mode 100644 drivers/clk/bcm/clk-iproc.h
 create mode 100644 include/dt-bindings/clock/bcm-cygnus.h

-- 
1.7.9.5

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v6 2/6] clk: iproc: add initial common clock support

[Ray Jui]

This adds basic and generic support for various iProc PLLs and clocks
including the ARMPLL, GENPLL, LCPLL, MIPIPLL, and ASIU clocks.

SoCs under the iProc architecture can define their specific register
offsets and clock parameters for their PLL and clock controllers. These
parameters can be passed as arugments into the generic iProc PLL and
clock setup functions

Derived from code originally provided by Jonathan Richardson


Signed-off-by: Ray Jui 
Reviewed-by: Scott Branden 
---
 drivers/clk/bcm/Kconfig|9 +
 drivers/clk/bcm/Makefile   |1 +
 drivers/clk/bcm/clk-iproc-armpll.c |  282 +
 drivers/clk/bcm/clk-iproc-asiu.c   |  275 
 drivers/clk/bcm/clk-iproc-clk.c|  244 ++
 drivers/clk/bcm/clk-iproc-pll.c|  490 
 drivers/clk/bcm/clk-iproc.h|  164 
 7 files changed, 1465 insertions(+)
 create mode 100644 drivers/clk/bcm/clk-iproc-armpll.c
 create mode 100644 drivers/clk/bcm/clk-iproc-asiu.c
 create mode 100644 drivers/clk/bcm/clk-iproc-clk.c
 create mode 100644 drivers/clk/bcm/clk-iproc-pll.c
 create mode 100644 drivers/clk/bcm/clk-iproc.h

diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
index 75506e5..131a3af 100644
--- a/drivers/clk/bcm/Kconfig
+++ b/drivers/clk/bcm/Kconfig
@@ -7,3 +7,12 @@ config CLK_BCM_KONA
  Enable common clock framework support for Broadcom SoCs
  using "Kona" style clock control units, including those
  in the BCM281xx and BCM21664 families.
+
+config COMMON_CLK_IPROC
+   bool "Broadcom iProc clock support"
+   depends on ARCH_BCM_IPROC
+   depends on COMMON_CLK
+   default ARCH_BCM_IPROC
+   help
+ Enable common clock framework support for Broadcom SoCs
+ based on the "iProc" architecture
diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
index 6297d05..6926636 100644
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@ -2,3 +2,4 @@ obj-$(CONFIG_CLK_BCM_KONA)  += clk-kona.o
 obj-$(CONFIG_CLK_BCM_KONA) += clk-kona-setup.o
 obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o
 obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o
+obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o 
clk-iproc-clk.o clk-iproc-asiu.o
diff --git a/drivers/clk/bcm/clk-iproc-armpll.c 
b/drivers/clk/bcm/clk-iproc-armpll.c
new file mode 100644
index 000..965cd4e
--- /dev/null
+++ b/drivers/clk/bcm/clk-iproc-armpll.c
@@ -0,0 +1,282 @@
+/*
+ * Copyright (C) 2014 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define IPROC_CLK_MAX_FREQ_POLICY0x3
+#define IPROC_CLK_POLICY_FREQ_OFFSET 0x008
+#define IPROC_CLK_POLICY_FREQ_POLICY_FREQ_SHIFT  8
+#define IPROC_CLK_POLICY_FREQ_POLICY_FREQ_MASK   0x7
+
+#define IPROC_CLK_PLLARMA_OFFSET 0xc00
+#define IPROC_CLK_PLLARMA_LOCK_SHIFT 28
+#define IPROC_CLK_PLLARMA_PDIV_SHIFT 24
+#define IPROC_CLK_PLLARMA_PDIV_MASK  0xf
+#define IPROC_CLK_PLLARMA_NDIV_INT_SHIFT 8
+#define IPROC_CLK_PLLARMA_NDIV_INT_MASK  0x3ff
+
+#define IPROC_CLK_PLLARMB_OFFSET 0xc04
+#define IPROC_CLK_PLLARMB_NDIV_FRAC_MASK 0xf
+
+#define IPROC_CLK_PLLARMC_OFFSET 0xc08
+#define IPROC_CLK_PLLARMC_BYPCLK_EN_SHIFT8
+#define IPROC_CLK_PLLARMC_MDIV_MASK  0xff
+
+#define IPROC_CLK_PLLARMCTL5_OFFSET  0xc20
+#define IPROC_CLK_PLLARMCTL5_H_MDIV_MASK 0xff
+
+#define IPROC_CLK_PLLARM_OFFSET_OFFSET   0xc24
+#define IPROC_CLK_PLLARM_SW_CTL_SHIFT29
+#define IPROC_CLK_PLLARM_NDIV_INT_OFFSET_SHIFT   20
+#define IPROC_CLK_PLLARM_NDIV_INT_OFFSET_MASK0xff
+#define IPROC_CLK_PLLARM_NDIV_FRAC_OFFSET_MASK   0xf
+
+#define IPROC_CLK_ARM_DIV_OFFSET 0xe00
+#define IPROC_CLK_ARM_DIV_PLL_SELECT_OVERRIDE_SHIFT  4
+#define IPROC_CLK_ARM_DIV_ARM_PLL_SELECT_MASK0xf
+
+#define IPROC_CLK_POLICY_DBG_OFFSET  0xec0
+#define IPROC_CLK_POLICY_DBG_ACT_FREQ_SHIFT  12
+#define IPROC_CLK_POLICY_DBG_ACT_FREQ_MASK   0x7
+
+enum iproc_arm_pll_fid {
+   ARM_PLL_FID_CRYSTAL_CLK   = 0,
+   ARM_PLL_FID_SYS_CLK   = 2,
+   ARM_PLL_FID_CH0_SLOW_CLK  = 6,
+   ARM_PLL_FID_CH1_FAST_CLK  = 7
+};
+
+struct iproc_ar

Re: [PATCH v6 0/8] Add support for Tegra Activity Monitor

[MyungJoo Ham]

> Hello,
> 
> something happened during the last cycle and an old version of the devfreq
> driver was merged.
> 
> This thread contains patches that bring it up to date to the last submitted
> version and also incorporates the feedback that that version received, plus
> some other small fixes and improvements that came up during rebase and
> testing.
> 
> These patches implement support for setting the rate of the EMC clock based on
> stats collected from the ACTMON, a piece of hw in the Tegra124 that counts
> memory accesses (among others).
> 
> It depends on the following in-flight patches:
> 
> * EMC driver: http://thread.gmane.org/gmane.linux.kernel/1907035
> * CPUFreq driver: http://thread.gmane.org/gmane.linux.kernel/1897078
> 
> I have pushed a branch here for testing:
> 
> http://cgit.collabora.com/git/user/tomeu/linux.git/log/?h=actmon-v6
> 
> Regards,
> 
> Tomeu
> 
> Tomeu Vizoso (8):
>   of: Add binding for NVIDIA Tegra ACTMON node
>   PM / devfreq: tegra: Update to v5 of the submitted patches
>   clk: tegra: Have EMC clock implement determine_rate()
>   PM / devfreq: tegra: Use clock rate constraints
>   PM / devfreq: tegra: remove operating-points
>   PM / devfreq: tegra: Set drvdata before enabling the irq
>   PM / devfreq: tegra: Enable interrupts after resuming the devfreq
> monitor
>   ARM: tegra: Add Tegra124 ACTMON support

Acked-by: MyungJoo Ham 
for all PM / devfreq patches (2, 4, 5, 6, 7)
And merged in for-rc tree with a little modification.

In the patch 2/8, I would like to add "const" in Line 748.
Would it be fine with you?
(You may look at: 
https://git.kernel.org/cgit/linux/kernel/git/mzx/devfreq.git/log/?h=for-rc )


The diff after applying all 2/8 to 7/8 will be:

diff --git a/drivers/devfreq/tegra-devfreq.c b/drivers/devfreq/tegra-devfreq.c
index 0d1edd5..8e633a6 100644
--- a/drivers/devfreq/tegra-devfreq.c
+++ b/drivers/devfreq/tegra-devfreq.c
@@ -740,7 +740,7 @@ static int tegra_devfreq_remove(struct platform_device 
*pdev)
return 0;
 }
 
-static struct of_device_id tegra_devfreq_of_match[] = {
+static const struct of_device_id tegra_devfreq_of_match[] = {
{ .compatible = "nvidia,tegra124-actmon" },
{ },
 };


> 
>  .../devicetree/bindings/arm/tegra/actmon.txt   |  28 ++
>  arch/arm/boot/dts/tegra124.dtsi|  11 +
>  drivers/clk/tegra/clk-emc.c|  19 +-
>  drivers/devfreq/tegra-devfreq.c| 480 
> +++--
>  4 files changed, 316 insertions(+), 222 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/arm/tegra/actmon.txt
> 
> -- 
> 2.1.0
> 
N�r��yb�X��ǧv�^�)޺{.n�+���z��z��z)w*jg����ݢj/���z�ޖ��2�ޙ&�)ߡ�a�����G���h��j:+v���w��٥

Re: [PATCH] Revert "of: Fix premature bootconsole disable with 'stdout-path'"

[Michael Ellerman]

On Tue, 2015-03-17 at 16:46 -0400, Peter Hurley wrote:
> This reverts commit 2fa645cb2703d9b3786d850db815414dfeefa51d.
> 
> The assumption that at least 1 preferred console will be registered
> when the stdout-path property is set is invalid, which can result
> in _no_ consoles.
> 
> Signed-off-by: Peter Hurley 

Grant/Rob, in case you didn't see it, this has caused a panic on at least one
powerpc box. So would be nice if it could go in for 4.0.

cheers


--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [RFC PATCH v4 3/4] arm64:thunder: Add initial dts for Cavium's Thunder SoC in 2 Node topology.

[Ganapatrao Kulkarni]

Hi Catalin, Will, Mark, Arnd

On Tue, Mar 10, 2015 at 2:12 PM, Ganapatrao Kulkarni
 wrote:
> Ping?
>
> On Tue, Feb 24, 2015 at 2:22 PM, Ganapatrao Kulkarni
>  wrote:
>> Hi Arnd,
>>
>> On Fri, Jan 23, 2015 at 6:07 PM, Ganapatrao Kulkarni
>>  wrote:
>>> Hi Arnd,
>>>
>>> On Thu, Jan 22, 2015 at 11:56 PM, Arnd Bergmann  wrote:
 On Thursday 22 January 2015 17:47:13 Arnd Bergmann wrote:
>
> This seems wrong still: The clusters and cores do not have unique
> numbers. I believe the code will not work correctly, and it won't
> be compliant with the binding from patch 2.
>
> I think the right way here would be to use
>
> arm,associativity = <0 2 47>;
>
> for cpu@20f, and
>
> arm,associativity = <1 3 48>;
>
> for cpu@1. Your previous version used the numbers from
> the reg property, which should be fine as well if that helps:
>
>
> arm,associativity = <0x0 0x200 0x20f>;
>
> arm,associativity = <0x1 0x1 0x1>;
>
> which should have the same effect as above, as long as the code
> can handle the numbers not being consecutive.
>
>

 Upon further consideration, I think your patch is correct after
 all, but let me check again on PowerPC machines.
>>> i have removed, board id which was in previous patch, to keep the
>>> associativity aligned to mpidr, ie. socket,cluster id and core id.
>>> both previous and current mappings holds good for our design.
>>> our topology is 2 sockets(aff2=0and 1) , each having 3
>>> clusters(aff1=0to2)and each cluster having 16 cores(aff0:0to15)
>>> in associativity property, for our case, only first id(socket id) is
>>> mapped to numa, others are mentioned only to describe the topology.

 Arnd
>> any further comments, how we go about these patches?
>> please suggest.
>>
>>> thanks
>>> Ganapat
>>
>> thanks
>> Ganapat

Please suggest how we go about these patches.
please share your review comments, if any changes needs to be done.


thanks
Ganapat
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 2/2] rtc: mediatek: Add MT63xx RTC driver

[Eddie Huang]

Hi Uwe,

On Tue, 2015-03-17 at 14:43 +0100, Uwe Kleine-König wrote:
> Hello Eddie,
> 
> On Tue, Mar 17, 2015 at 08:31:14PM +0800, Eddie Huang wrote:
> > On Mon, 2015-03-16 at 16:30 +0100, Uwe Kleine-König wrote:
> > > On Wed, Jan 28, 2015 at 05:27:56PM +0800, Eddie Huang wrote:
> > > > [...]
> > > > +static u16 rtc_read(struct mt6397_rtc *rtc, u32 offset)
> > > rtc_read is a bad name for a driver. There are already 6 functions with
> > > this name in the kernel. Better use a unique prefix.
> > 
> > I will use prefix mtk_
> I would prefer a prefix that is unique to the driver. "mtk_" doesn't
> work to distinguish between the rtc and a (say) spi driver. What you
> want here is that if someone reports a bug on any mailinglist with a
> backtrace you are able to immediately see which driver is affected.
> 

My meaning is mtk_rtc_read, mtk_rtc_write.

> > > > [...]
> > > > +static irqreturn_t rtc_irq_handler_thread(int irq, void *data)
> > > > +{
> > > > +   struct mt6397_rtc *rtc = data;
> > > > +   u16 irqsta, irqen;
> > > > +
> > > > +   mutex_lock(&rtc->lock);
> > > > +   irqsta = rtc_read(rtc, RTC_IRQ_STA);
> > > Do you really need to lock for a single read access?
> > 
> > I think this lock is necessary, because other thread may access rtc
> > register at the same time, for example, call mtk_rtc_set_alarm to modify
> > alarm time.
> That would be a valid reason if mtk_rtc_set_alarm touched that register
> twice in a single critical section and the handler must not read the
> value of the first write. Otherwise it should be fine, shouldn't it?
> 

My original though is if disable alarm in mtk_rtc_set_alarm function,
RTC_IRQ_STA may be affected, this is why I add mutex. After checking
with designer, RTC_IRQ_STA will not be affected. I will remove the
mutex.

> > > > +static int mtk_rtc_set_time(struct device *dev, struct rtc_time *tm)
> > > > +{
> > > > +   struct mt6397_rtc *rtc = dev_get_drvdata(dev);
> > > > +
> > > > +   tm->tm_year -= RTC_MIN_YEAR_OFFSET;
> > > > +   tm->tm_mon++;
> > > > +   mutex_lock(&rtc->lock);
> > > > +   rtc_write(rtc, RTC_TC_YEA, tm->tm_year);
> > > > +   rtc_write(rtc, RTC_TC_MTH, tm->tm_mon);
> > > > +   rtc_write(rtc, RTC_TC_DOM, tm->tm_mday);
> > > > +   rtc_write(rtc, RTC_TC_HOU, tm->tm_hour);
> > > > +   rtc_write(rtc, RTC_TC_MIN, tm->tm_min);
> > > > +   rtc_write(rtc, RTC_TC_SEC, tm->tm_sec);
> > > Is this racy? I.e. what happens if RTC_TC_SEC overflows just before you
> > > write to it but after you wrote RTC_TC_MIN?
> > 
> > register value will write to hardware after rtc_write_trigger, so the
> > racy condition not exist.
> Ah, it seems the hardware guys did their job. Nice.
> 
> Best regards
> Uwe
> 


--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v6] ARM: dts: Add HS400 support for exynos5420 and exynos5800

[Alim Akhtar]

From: Seungwon Jeon 

HS400 timing values are added for SMDK5420, exynos5420-peach-pit
and exynos5800-peach-pi boards.
This also adds RCLK GPIO line, this gpio should be in pull-down
state.
This also enables HS400 on peach-pi and this updates the clock frequency
to 800MHz to be set as input clock to controller.

Signed-off-by: Seungwon Jeon 
Signed-off-by: Alim Akhtar 
[Alim: addressed review comments]
Acked-by: Jaehoon Chung 
---
Changes in V6:
Rebased on kukjin's for-next branch[0] 
(commit: 77105c8 Merge branch 'v4.0-samsung-fixes-2' into for-next)

[0]: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git

 arch/arm/boot/dts/exynos5420-peach-pit.dts | 4 +++-
 arch/arm/boot/dts/exynos5420-pinctrl.dtsi  | 7 +++
 arch/arm/boot/dts/exynos5420-smdk5420.dts  | 4 +++-
 arch/arm/boot/dts/exynos5800-peach-pi.dts  | 7 +--
 4 files changed, 18 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts 
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index d0ee55f..e158861 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -695,8 +695,10 @@
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <0 4>;
samsung,dw-mshc-ddr-timing = <0 2>;
+   samsung,dw-mshc-hs400-timing = <0 2>;
+   samsung,read-strobe-delay = <90>;
pinctrl-names = "default";
-   pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
+   pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8 &sd0_rclk>;
bus-width = <8>;
 };
 
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi 
b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
index ba686e4..8b15316 100644
--- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
@@ -201,6 +201,13 @@
samsung,pin-drv = <3>;
};
 
+   sd0_rclk: sd0-rclk {
+   samsung,pins = "gpc0-7";
+   samsung,pin-function = <2>;
+   samsung,pin-pud = <1>;
+   samsung,pin-drv = <3>;
+   };
+
sd1_cmd: sd1-cmd {
samsung,pins = "gpc1-1";
samsung,pin-function = <2>;
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts 
b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index 7a56852..de5e41e 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -80,8 +80,10 @@
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <0 4>;
samsung,dw-mshc-ddr-timing = <0 2>;
+   samsung,dw-mshc-hs400-timing = <0 2>;
+   samsung,read-strobe-delay = <90>;
pinctrl-names = "default";
-   pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
+   pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8 &sd0_rclk>;
bus-width = <8>;
cap-mmc-highspeed;
};
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts 
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 7ea1d66..2e84613 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -650,15 +650,18 @@
num-slots = <1>;
broken-cd;
mmc-hs200-1_8v;
+   mmc-hs400-1_8v;
cap-mmc-highspeed;
non-removable;
card-detect-delay = <200>;
-   clock-frequency = <4>;
+   clock-frequency = <8>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <0 4>;
samsung,dw-mshc-ddr-timing = <0 2>;
+   samsung,dw-mshc-hs400-timing = <0 2>;
+   samsung,read-strobe-delay = <90>;
pinctrl-names = "default";
-   pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
+   pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8 &sd0_rclk>;
bus-width = <8>;
 };
 
-- 
1.9.1

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 01/10] dt/bindings: Add binding for BCM2835 mailbox driver

[Stephen Warren]

On 03/17/2015 01:10 PM, Eric Anholt wrote:
> Stephen Warren  writes:
> 
>> On 03/12/2015 05:23 PM, Eric Anholt wrote:
>>> Device base maintainers weren't excited about my patch for 
>>> -EPROBE_DEFER, because then a new DT would mean we start
>>> failing to probe the USB driver in an older kernel, which
>>> whould be a regression in the case that the user had U-Boot
>>> setting up USB for them.
>> 
>> The main ABI issue is that old DTs should work with new kernels.
>> The other way around is nice, but certainly not as strict a
>> requirement. I don't think that should block a change. Do you
>> have a link to the thread; I don't think I noticed it.
> 
> http://comments.gmane.org/gmane.linux.kernel/1906119

Hmm. I think that in general, the Linux kernel has already chosen
deferred probe as the ordering mechanism over fixed init levels, which
have demonstrably been unable to solve all ordering problems in the
past. As Kevin pointed out, new DT with old kernel isn't the most
important use-case. The only other objection I saw was Ulf not wanting
to introduce another "probe scenario", but I guess he changed his mind
since he outlines the steps to make deferred probe work in a later email.

I guess/hope the way forward is to either wait for PM domains to work
with deferred probe, or push that work forward (i.e. implement part
(1) mentioned in Ulf's Mar 16 email).
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 1/2] pinctrl: bindings: pinctrl: Add support for TI's IODelay configuration

[Tony Lindgren]

* Linus Walleij  [150317 18:31]:
> On Tue, Mar 10, 2015 at 7:33 PM, Nishanth Menon  wrote:
> > On 03/10/2015 12:31 PM, Tony Lindgren wrote:
> 
> >> Yes except I'd make use of some kind of #pinctrl-cells here just like
> >> interrupt controller has #interrupt-cells. Then you can have the values
> >> seprate and the controller knows what to do with them based on the
> >> compatible flag and #pinctrl-cells.
> >
> > Something like the following I suppose, where pinctrl-cells is optional?
> >
> > dra7_pmx_core: pinmux@4a003400 {
> > compatible = "ti,dra7-padconf", "pinctrl-single";
> > reg = <0x4a003400 0x0464>;
> > #address-cells = <1>;
> > #size-cells = <0>;
> > #interrupt-cells = <1>;
> > interrupt-controller;
> > pinctrl-single,register-width = <32>;
> > pinctrl-single,function-mask = <0x3fff>;
> > };
> >
> > dra7_iodelay_core: padconf@4844a000 {
> > compatible = "ti,dra7-iodelay";
> > reg = <0x4844a000 0x0d1c>;
> > #address-cells = <1>;
> > #size-cells = <0>;
> > #pinctrl-cells = <2>;
> > };
> >
> > Linus,
> >
> > I hope you are ok with the above?
> 
> Hm depends on where the documentation hits I guess?
> 
> Such a generic cell count property has to be to the generic
> pinctrl-bindings.txt document if I read it right.

Yeah agreed. I suggest discussing the binding and the generic
parsing code for it first :)
 
> Overall I guess this will be acceptable but you really need to
> reuse some more code between this driver and pinctrl-single.c
> if I read it right.

It seems with the generic binding the actual driver should be
just the hardware specific code hopefully.

Regards,

Tony
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v6 6/8] pinctrl: cygnus: add gpio/pinconf driver

[Linus Walleij]

On Wed, Mar 11, 2015 at 10:15 AM, Linus Walleij
 wrote:
> On Tue, Mar 10, 2015 at 6:57 PM, Ray Jui  wrote:
>> On 3/10/2015 3:20 AM, Linus Walleij wrote:
>>> On Mon, Mar 9, 2015 at 9:45 PM, Ray Jui  wrote:
>>>
 This adds the initial support of the Broadcom Cygnus GPIO/PINCONF driver
 that supports all 3 GPIO controllers on Cygnus including the ASIU GPIO
 controller, the chipCommonG GPIO controller, and the always-on GPIO
 controller. Basic PINCONF configurations such as bias pull up/down, and
 drive strength are also supported in this driver.

 Pins from the ASIU GPIO controller can be individually muxed to GPIO
 function, through interaction with the Cygnus IOMUX controller

 Signed-off-by: Ray Jui 
 Reviewed-by: Scott Branden 
 Tested-by: Dmitry Torokhov 
>>>
>>> Patch applied! But please look at this:
>>>
 +#include 
>>>
>>> Doesn't just #include  work?
>>>
>>
>> I think I need linux/gpio.h for gpiochip_add_pin_range and some related
>> APIs.
>
> OK you're right ... I need to fix this.

I sent a patch fixing this now... hope it will work.

Yours,
Linus Walleij
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v2 2/3] leds: ktd2692: add device tree bindings for ktd2692

[Ingi Kim]

Hi

On 2015년 03월 18일 07:40, Jaehoon Chung wrote:
> On 03/17/2015 05:45 PM, Ingi Kim wrote:
>> This patch adds the device tree bindings for ktd2692 flash LEDs.
>> Add optional properties 'flash-timeout-us' to control flash timeout
>> and 'vin-supply' for flash-led regulator
>>
>> Signed-off-by: Ingi Kim 
>> ---
>>  .../devicetree/bindings/leds/leds-ktd2692.txt  | 37 
>> ++
>>  1 file changed, 37 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/leds/leds-ktd2692.txt
>>
>> diff --git a/Documentation/devicetree/bindings/leds/leds-ktd2692.txt 
>> b/Documentation/devicetree/bindings/leds/leds-ktd2692.txt
>> new file mode 100644
>> index 000..1b44225
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/leds/leds-ktd2692.txt
>> @@ -0,0 +1,37 @@
>> +* Kinetic Technologies - KTD2692 Flash LED Driver
>> +
>> +KTD2692 is the ideal power solution for high-power flash LEDs.
>> +It uses ExpressWire single-wire programming for maximum flexibility.
>> +
>> +The ExpressWire interface through CTRL pin can control LED on/off and
>> +enable/disable the IC, Movie/Flash mode current, Flash timeout,
>> +LVP(low voltage protection).
>> +
>> +Required properties:
>> +- compatible: "kinetic,ktd2692"
>> +- ctrl-gpio : gpio pin in order control ktd2692 flash led.
>> +There is an internal 300kOhm pull-down resistor at this pin
>> +- supply : "vin" LED supply
>> +
>> +Optional property:
>> +- flash-timeout-us : Maximum flash timeout in microseconds.
>> +flash timeout ranges from 0 to 1835000us and
>> +default is 1049000us.
>> +
>> +Example:
>> +
>> +vbat: fixedregulator@0 {
>> +compatible = "regulator-fixed";
>> +regulator-name = "vbat-supply";
>> +regulator-min-microvolt = <500>;
>> +regulator-max-microvolt = <500>;
>> +gpio = <>;
> 
> gpio = <> ? What do you mean?
> And this is described at 
> Documentation/devicetree/bindings/regulator/fixed-regulator.txt
> I'm not sure whether this example really needs.
> 
> Best Regards,
> Jaehoon Chung
> 

I just want to show that dummy regulator can be used with flash-led.
As you mentioned earlier, remove unnecessary example and add refer comment 

Thanks,
Ingi Kim

>> +regulator-always-on;
>> +};
>> +
>> +flash-led {
>> +compatible = "kinetic,ktd2692";
>> +ctrl-gpio = <&gpc0 1 0>;
>> +flash-timeout-us = <1835000>;
>> +vin-supply = <&vbat>;
>> +};
>>
> 
> 
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH/RFC v13 02/13] dt-binding: leds: Add common LED DT bindings macros

[Bryan Wu]

On Thu, Mar 12, 2015 at 8:45 AM, Jacek Anaszewski
 wrote:
> Add macros for defining boost mode and trigger type properties
> of flash LED devices.
>
Applied, thanks,
-Bryan

> Signed-off-by: Jacek Anaszewski 
> Acked-by: Kyungmin Park 
> Cc: Bryan Wu 
> Cc: Richard Purdie 
> ---
>  include/dt-bindings/leds/common.h |   21 +
>  1 file changed, 21 insertions(+)
>  create mode 100644 include/dt-bindings/leds/common.h
>
> diff --git a/include/dt-bindings/leds/common.h 
> b/include/dt-bindings/leds/common.h
> new file mode 100644
> index 000..79fcef7
> --- /dev/null
> +++ b/include/dt-bindings/leds/common.h
> @@ -0,0 +1,21 @@
> +/*
> + * This header provides macros for the common LEDs device tree bindings.
> + *
> + * Copyright (C) 2015, Samsung Electronics Co., Ltd.
> + *
> + * Author: Jacek Anaszewski 
> + */
> +
> +#ifndef __DT_BINDINGS_LEDS_H__
> +#define __DT_BINDINGS_LEDS_H
> +
> +/* External trigger type */
> +#define LEDS_TRIG_TYPE_EDGE0
> +#define LEDS_TRIG_TYPE_LEVEL   1
> +
> +/* Boost modes */
> +#define LEDS_BOOST_OFF 0
> +#define LEDS_BOOST_ADAPTIVE1
> +#define LEDS_BOOST_FIXED   2
> +
> +#endif /* __DT_BINDINGS_LEDS_H */
> --
> 1.7.9.5
>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 2/4 v3] dt/bindings: Add binding for BCM2835 mailbox driver

[Eric Anholt]

Scott Branden  writes:

> Hi Lubomir,
>
>
> On 15-03-17 10:27 AM, Lee Jones wrote:
>> On Thu, 12 Mar 2015, Eric Anholt wrote:
>>> diff --git a/Documentation/devicetree/bindings/mailbox/bcm2835-mbox.txt 
>>> b/Documentation/devicetree/bindings/mailbox/bcm2835-mbox.txt
>>> new file mode 100644
>>> index 000..0bb2b9d
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/mailbox/bcm2835-mbox.txt
> I am trying to standarize all broadcom device tree bindings in the 
> format "brcm,binding.txt".
>
> Could you please rename this file to brcm,bcm2835-mbox.txt for 
> consistency in bindings?

The filename was at the request of Lee Jones, to match the convention of
the other mailbox drivers.  I don't care what the filename is as long as
people can get agreement on what it should be.

(Right now it seems to be 2:1 in favor of using the compatible string?)


signature.asc
Description: PGP signature

Re: [PATCH 1/2] pinctrl: bindings: pinctrl: Add support for TI's IODelay configuration

[Linus Walleij]

On Tue, Mar 10, 2015 at 7:33 PM, Nishanth Menon  wrote:
> On 03/10/2015 12:31 PM, Tony Lindgren wrote:

>> Yes except I'd make use of some kind of #pinctrl-cells here just like
>> interrupt controller has #interrupt-cells. Then you can have the values
>> seprate and the controller knows what to do with them based on the
>> compatible flag and #pinctrl-cells.
>
> Something like the following I suppose, where pinctrl-cells is optional?
>
> dra7_pmx_core: pinmux@4a003400 {
> compatible = "ti,dra7-padconf", "pinctrl-single";
> reg = <0x4a003400 0x0464>;
> #address-cells = <1>;
> #size-cells = <0>;
> #interrupt-cells = <1>;
> interrupt-controller;
> pinctrl-single,register-width = <32>;
> pinctrl-single,function-mask = <0x3fff>;
> };
>
> dra7_iodelay_core: padconf@4844a000 {
> compatible = "ti,dra7-iodelay";
> reg = <0x4844a000 0x0d1c>;
> #address-cells = <1>;
> #size-cells = <0>;
> #pinctrl-cells = <2>;
> };
>
> Linus,
>
> I hope you are ok with the above?

Hm depends on where the documentation hits I guess?

Such a generic cell count property has to be to the generic
pinctrl-bindings.txt document if I read it right.

Overall I guess this will be acceptable but you really need to
reuse some more code between this driver and pinctrl-single.c
if I read it right.

Yours,
Linus Walleij
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 2/6] ARM: cpuidle: Add a cpuidle ops structure to be used for DT

[Stephen Boyd]

On 03/17/15 04:29, Lorenzo Pieralisi wrote:
> On Mon, Mar 16, 2015 at 10:08:19PM +, Stephen Boyd wrote:
>> On 03/03/15 04:29, Daniel Lezcano wrote:
>>> The code is optimized to use the __init section intensively in order to 
>>> reduce
>>> the memory footprint after the driver is initialized and unify the function
>>> names with ARM64.
>>>
>>> In order to prevent multiple declarations and the specific cpuidle ops to be
>>> spread across the different headers, a mechanism, similar to the cgroup 
>>> subsys,
>>> has been introduced.
>>>
>>> A new platform willing to add its cpuidle ops must add an entry in the file
>>> cpuidle_ops.h in the current form:
>>>
>>>  #if IS_ENABLED(CONFIG_ARM_FOO_CPUIDLE)
>>>  CPUIDLE_OPS(foo)
>>>  #endif
>>>
>>> ... and use the variable name in the specific low level code:
>>>
>>> struct cpuidle_ops foo_cpuidle_ops;
>>>
>>> The CPUIDLE_OPS macro will be processed in different way in the cpuidle.c 
>>> file,
>>> thus allowing to keep untouched the arm cpuidle core code in the future when
>>> a new platform is added.
>> [...]
>>> diff --git a/arch/arm/include/asm/cpuidle_ops.h 
>>> b/arch/arm/include/asm/cpuidle_ops.h
>>> new file mode 100644
>>> index 000..be0a612
>>> --- /dev/null
>>> +++ b/arch/arm/include/asm/cpuidle_ops.h
>>> @@ -0,0 +1,3 @@
>>> +/*
>>> + * List of cpuidle operations
>>> + */
>>> diff --git a/arch/arm/kernel/cpuidle.c b/arch/arm/kernel/cpuidle.c
>>> index 45969f8..25e9789c 100644
>>> --- a/arch/arm/kernel/cpuidle.c
>>> +++ b/arch/arm/kernel/cpuidle.c
>>> @@ -10,8 +10,29 @@
>>>   */
>>>  
>>>  #include 
>>> +#include 
>>> +#include 
>>>  #include 
>>>  
>>> +#define CPUIDLE_OPS(__x) extern struct cpuidle_ops __x ## _cpuidle_ops;
>>> +#include 
>>> +#undef CPUIDLE_OPS
>>> +
>>> +#define CPUIDLE_OPS(__x) __x ## _cpuidle_ops_id,
>>> +enum cpuidle_ops_id {
>>> +#include 
>>> +CPUIDLE_OPS_COUNT,
>>> +};
>>> +#undef CPUIDLE_OPS
>>> +
>>> +#define CPUIDLE_OPS(__x) [__x ## _cpuidle_ops_id ] = &__x ## _cpuidle_ops,
>>> +static struct cpuidle_ops *supported_cpuidle_ops[] __initconst = {
>>> +#include 
>>> +};
>>> +#undef CPUIDLE_OPS
>>> +
>>> +static struct cpuidle_ops cpuidle_ops[NR_CPUS];
>> Is there any reason why we aren't putting these structures into a linker
>> section like we do for the smp operations structures?
> I think it can be done with an OF_TABLE, it is a bit of shame cpuidle_ops
> should work on UP too otherwise they could have been merged in
> smp_ops to create cpu_ops, like arm64 does.

We should merge the two and remove the SMP dependency on arm32.

>> The nice thing about using the linker is it makes it clearer at the
>> location where we define the structure that it's actually used by
>> something. Right now the structures are defined non-static in a file and
>> then we have to know that a CPUIDLE_OPS() define has been made in
>> another architecture specific asm header file so that this macro magic
>> works. The commit text says something about multiple declarations and
>> ops spread across header files, which shouldn't apply if we're using the
>> linker to find these ops and merge them into an array we can iterate over.
> It makes sense, see above for UP vs SMP. I wonder if we can't find
> something to overcome the UP limitation nicely, the init code in
> arch/arm/kernel/devtree.c is identical for smp_ops and cpuidle_ops,
> apart from the CONFIG_SMP ifdeffery.

It should be possible to replace the arm32 smp_operations structure with
something like the arm64 cpu_operations structure. Yes we would have to
drop the SMP dependency, but that will be ok. It would require some work
to make arm32 and arm64 the same, but for these purposes that isn't
really required as long as we can put the cpu idle hook there.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v2 11/18] pinctrl: Add pinctrl driver for STM32 MCUs

[Linus Walleij]

On Tue, Mar 10, 2015 at 4:08 PM, Arnd Bergmann  wrote:
> On Friday 20 February 2015 19:01:10 Maxime Coquelin wrote:

>> +/* Pull-Up/Down */
>> +#define NO_PULL0
>> +#define PULL_UP1
>> +#define PULL_DOWN  2
>> +
>> +/* Type */
>> +#define PUSH_PULL  (0 << 2)
>> +#define OPEN_DRAIN (1 << 2)
>> +
>
> These should probably not be stm32 specific at all, they sound
> rather generic, so maybe put the definitions into a common file.

It's part of what GENERIC_PINCONF does and it has bindings
in Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt

Yours,
Linus Walleij
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 1/2] clk: samsung: Use CONFIG_ARCH_EXYNOS instead of CONFIG_ARCH_EXYNOS5433

[Chanwoo Choi]

This patch removes the CONFIG_ARCH_EXYNOS5433 and then use only the
CONFIG_ARCH_EXYNOS for ARM-64bit Exynos5433 SoC.

Cc: Sylwester Nawrocki 
Cc: Tomasz Figa 
Cc: Arnd Bergmann 
Signed-off-by: Chanwoo Choi 
---
 drivers/clk/samsung/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile
index 17e9af7..a17683b 100644
--- a/drivers/clk/samsung/Makefile
+++ b/drivers/clk/samsung/Makefile
@@ -10,7 +10,7 @@ obj-$(CONFIG_SOC_EXYNOS5250)  += clk-exynos5250.o
 obj-$(CONFIG_SOC_EXYNOS5260)   += clk-exynos5260.o
 obj-$(CONFIG_SOC_EXYNOS5410)   += clk-exynos5410.o
 obj-$(CONFIG_SOC_EXYNOS5420)   += clk-exynos5420.o
-obj-$(CONFIG_ARCH_EXYNOS5433)  += clk-exynos5433.o
+obj-$(CONFIG_ARCH_EXYNOS)  += clk-exynos5433.o
 obj-$(CONFIG_SOC_EXYNOS5440)   += clk-exynos5440.o
 obj-$(CONFIG_ARCH_EXYNOS)  += clk-exynos-audss.o
 obj-$(CONFIG_ARCH_EXYNOS)  += clk-exynos-clkout.o
-- 
1.8.5.5

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 2/2] clk: samsung: exynos5433: Fix wrong offset of PCLK_MSCL_SECURE_SMMU_JPEG

[Chanwoo Choi]

From: Jonghwa Lee 

This patch fixes the wrong offoset of PCLK_MSCL_SECURE_SMMU_JPEG in CMU_MSCL
domain.

Fixes: b274bbfd8b4a94cb5bd6f (clk: samsung: exynos5433: Add clocks for CMU_MSCL 
domain
Cc: Sylwester Nawrocki 
Cc: Tomasz Figa 
Signed-off-by: Jonghwa Lee 
Signed-off-by: Chanwoo Choi 
---
 drivers/clk/samsung/clk-exynos5433.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/samsung/clk-exynos5433.c 
b/drivers/clk/samsung/clk-exynos5433.c
index 387e3e3..543f9c7 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -3927,7 +3927,7 @@ CLK_OF_DECLARE(exynos5433_cmu_atlas, 
"samsung,exynos5433-cmu-atlas",
 #define ENABLE_PCLK_MSCL   0x0900
 #define ENABLE_PCLK_MSCL_SECURE_SMMU_M2MSCALER00x0904
 #define ENABLE_PCLK_MSCL_SECURE_SMMU_M2MSCALER10x0908
-#define ENABLE_PCLK_MSCL_SECURE_SMMU_JPEG  0x000c
+#define ENABLE_PCLK_MSCL_SECURE_SMMU_JPEG  0x090c
 #define ENABLE_SCLK_MSCL   0x0a00
 #define ENABLE_IP_MSCL00x0b00
 #define ENABLE_IP_MSCL10x0b04
-- 
1.8.5.5

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 0/2] clk: samsung: exynos5433: Fix wrong offset and remove specific CONFIG_ARCH_EXYNOS5433

[Chanwoo Choi]

This patch fixes the wrong offset of PCLK_MSCL_SECURE_SMMU_JPEG in CMU_MSCL
domain and removes the specific CONFIG_ARCH_EXYNOS5433 instead use the
CONFIG_ARCH_EXYNOS. Because Arnd Bergmann gave me a comment[1] that don't add
specific CONFIG_ARCH_EXYNOS5433 for ARM-64bit SoC. So, I send the Exynos5433
devicetree patch-set[2] without adding CONFIG_ARCH_EXYNOS5433.

[1] https://lkml.org/lkml/2015/2/24/85
[2] [PATCH v7 0/9] arm64: Add the support for new Exynos5433 SoC
- https://lkml.org/lkml/2015/3/17/843

Chanwoo Choi (1):
  clk: samsung: Use CONFIG_ARCH_EXYNOS instead of CONFIG_ARCH_EXYNOS5433

Jonghwa Lee (1):
  clk: samsung: exynos5433: Fix wrong offset of PCLK_MSCL_SECURE_SMMU_JPEG

 drivers/clk/samsung/Makefile | 2 +-
 drivers/clk/samsung/clk-exynos5433.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

-- 
1.8.5.5

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v7 7/9] arm64: dts: exynos: Add I2S dt node for Exynos5433 SoC

[Chanwoo Choi]

From: Inha Song 

This patch adds I2S device tree node for Exynos5433 SoC.
In Exynos5433 SoC, I2S0 is used for audio interface.

Signed-off-by: Inha Song 
Signed-off-by: Chanwoo Choi 
Acked-by: Inki Dae 
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 17 +
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 1155205..f6ae71c 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -475,6 +475,23 @@
status = "disabled";
};
 
+   i2s0: i2s0@1144 {
+   compatible = "samsung,exynos7-i2s";
+   reg = <0x1144 0x100>;
+   dmas = <&adma 0 &adma 2>;
+   dma-names = "tx", "rx";
+   interrupts = <0 70 0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clocks = <&cmu_aud CLK_PCLK_AUD_I2S>,
+<&cmu_aud CLK_SCLK_AUD_I2S>,
+<&cmu_aud CLK_SCLK_I2S_BCLK>;
+   clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
+   pinctrl-names = "default";
+   pinctrl-0 = <&i2s0_bus>;
+   status = "disabled";
+   };
+
pinctrl_alive: pinctrl@1058 {
compatible = "samsung,exynos5433-pinctrl";
reg = <0x1058 0x1000>;
-- 
1.8.5.5

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v7 1/9] arm64: dts: exynos: Add dts files for 64-bit Exynos5433 SoC

[Chanwoo Choi]

This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
Octal core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
PSCI (Power State Coordination Interface) v0.1.

This patch includes following dt node to support Exynos5433 SoC:
1. Octa core for big.LITTLE architecture
- Cortex-A53 LITTLE Quad-core
- Cortex-A57 big Quad-core
- Support PSCI v0.1

2. clock controller node:
- CMU_TOP   : clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
- CMU_CPIF  : clocks for LLI (Low Latency Interface)
- CMU_MIF   : clocks for DRAM Memory Controller
- CMU_PERIC : clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS
- CMU_PERIS : clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC
- CMU_FSYS  : clocks for USB/UFS/SDMMC/TSI/PDMA
- CMU_G2D   : clocks for G2D/MDMA
- CMU_DISP  : clocks for DECON/HDMI/DSIM/MIXER
- CMU_AUD   : clocks for Cortex-A5/BUS/AUDIO
- CMU_BUS{0|1|2} : clocks for global data buses and global peripheral buses
- CMU_G3D   : clocks for 3D Graphics Engine
- CMU_GSCL  : clocks for GSCALER
- CMU_APOLLO: clocks for Cortex-A53 Quad-core processor.
- CMU_ATLAS : clocks for Cortex-A57 Quad-core processor,
  CoreSight and L2 cache controller.
- CMU_MSCL  : clocks for M2M (Memory to Memory) scaler and JPEG IPs.
- CMU_MFC   : clocks for MFC (Multi-Format Codec) IP.
- CMU_HEVC  : clocks for HEVC(High Efficiency Video Codec) decoder IP.
- CMU_ISP   : clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
- CMU_CAM0  : clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs.
- CMU_CAM1  : clocks for COrtex-A5/MIPI_CSIS2/FIMC_LITE_C/FIMC-FD IPs.

3. pinctrl node for GPIO:
- alive/aud/cpif/ese/finger/fsys/imem/nfc/peric/touch pad

4. HS (High-Speed) I2C device
5. Serial device
6. ARCH timer (arm,armv8-timer)
7. Interrupt controller (arm,gic-400)

Cc: Kukjin Kim 
Cc: Mark Rutland 
Cc: Marc Zyngier 
Cc: Arnd Bergmann 
Cc: Olof Johansson 
Cc: Catalin Marinas 
Cc: Will Deacon 
Signed-off-by: Chanwoo Choi 
Acked-by: Inki Dae 
---
 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 698 +
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 669 
 2 files changed, 1367 insertions(+)
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433.dtsi

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi 
b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
new file mode 100644
index 000..c56bbf8
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
@@ -0,0 +1,698 @@
+/*
+ * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device
+ * tree nodes are listed in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+&pinctrl_alive {
+   gpa0: gpa0 {
+   gpio-controller;
+   #gpio-cells = <2>;
+
+   interrupt-controller;
+   interrupt-parent = <&gic>;
+   interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
+<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>;
+   #interrupt-cells = <2>;
+   };
+
+   gpa1: gpa1 {
+   gpio-controller;
+   #gpio-cells = <2>;
+
+   interrupt-controller;
+   interrupt-parent = <&gic>;
+   interrupts = <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
+<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
+   #interrupt-cells = <2>;
+   };
+
+   gpa2: gpa2 {
+   gpio-controller;
+   #gpio-cells = <2>;
+
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   };
+
+   gpa3: gpa3 {
+   gpio-controller;
+   #gpio-cells = <2>;
+
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   };
+};
+
+&pinctrl_aud {
+   gpz0: gpz0 {
+   gpio-controller;
+   #gpio-cells = <2>;
+
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   };
+
+   gpz1: gpz1 {
+   gpio-controller;
+   #gpio-cells = <2>;
+
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   };
+
+   i2s0_bus: i2s0-bus {
+   samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3",
+   "gpz0-4", "gpz0-5", "gpz0-6";
+   samsung,pin-function = <2>;
+   samsung,pin-pud = <1>;
+   samsung,pin-drv = <0>;
+   };
+
+   pcm0_bus: pcm0-bus {
+   samsung,pins = "gpz1-0", "gpz1-1", "gpz1-2", "gpz1-3";
+   samsung,pin-function = <3>;
+  

[PATCH v7 3/9] arm64: dts: exynos: Add SPI/PDMA dt node for Exynos5433

[Chanwoo Choi]

This patch adds SPI (Serial Peripheral Interface) dt node for Exynos5433 SoC.
SPI transfers serial data by using various peripherals. SPI includes
8-bit/16-bit/32-bit shift registers to transmit and receive data. PDMA is used
for SPI communication.

Cc: Kukjin Kim 
Cc: Mark Rutland 
Cc: Marc Zyngier 
Cc: Arnd Bergmann 
Cc: Olof Johansson 
Cc: Catalin Marinas 
Cc: Will Deacon 
Signed-off-by: Chanwoo Choi 
Acked-by: Inki Dae 
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 114 +
 1 file changed, 114 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 8367915..dbecbba 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -399,6 +399,35 @@
interrupts = <1 9 0xf04>;
};
 
+   amba {
+   compatible = "arm,amba-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   pdma0: pdma@1561 {
+   compatible = "arm,pl330", "arm,primecell";
+   reg = <0x1561 0x1000>;
+   interrupts = <0 228 0>;
+   clocks = <&cmu_fsys CLK_PDMA0>;
+   clock-names = "apb_pclk";
+   #dma-cells = <1>;
+   #dma-channels = <8>;
+   #dma-requests = <32>;
+   };
+
+   pdma1: pdma@1560 {
+   compatible = "arm,pl330", "arm,primecell";
+   reg = <0x1560 0x1000>;
+   interrupts = <0 246 0>;
+   clocks = <&cmu_fsys CLK_PDMA1>;
+   clock-names = "apb_pclk";
+   #dma-cells = <1>;
+   #dma-channels = <8>;
+   #dma-requests = <32>;
+   };
+   };
+
serial_0: serial@14c1 {
compatible = "samsung,exynos5433-uart";
reg = <0x14c1 0x100>;
@@ -499,6 +528,91 @@
interrupts = <0 442 0>;
};
 
+   spi_0: spi@14d2 {
+   compatible = "samsung,exynos7-spi";
+   reg = <0x14d2 0x100>;
+   interrupts = <0 432 0>;
+   dmas = <&pdma0 9>, <&pdma0 8>;
+   dma-names = "tx", "rx";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clocks = <&cmu_peric CLK_PCLK_SPI0>,
+<&cmu_top CLK_SCLK_SPI0_PERIC>;
+   clock-names = "spi", "spi_busclk0";
+   samsung,spi-src-clk = <0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&spi0_bus>;
+   status = "disabled";
+   };
+
+   spi_1: spi@14d3 {
+   compatible = "samsung,exynos7-spi";
+   reg = <0x14d3 0x100>;
+   interrupts = <0 433 0>;
+   dmas = <&pdma0 11>, <&pdma0 10>;
+   dma-names = "tx", "rx";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clocks = <&cmu_peric CLK_PCLK_SPI1>,
+<&cmu_top CLK_SCLK_SPI1_PERIC>;
+   clock-names = "spi", "spi_busclk0";
+   samsung,spi-src-clk = <0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&spi1_bus>;
+   status = "disabled";
+   };
+
+   spi_2: spi@14d4 {
+   compatible = "samsung,exynos7-spi";
+   reg = <0x14d4 0x100>;
+   interrupts = <0 434 0>;
+   dmas = <&pdma0 13>, <&pdma0 12>;
+   dma-names = "tx", "rx";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clocks = <&cmu_peric CLK_PCLK_SPI2>,
+<&cmu_top CLK_SCLK_SPI2_PERIC>;
+   clock-names = "spi", "spi_busclk0";
+   samsung,spi-src-clk = <0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&spi2_bus>;
+   status = "disabled";
+   };
+
+   spi_3: spi@14d5 {
+   compatible = "samsung,exynos7-spi";
+   reg = <0x14d5 0x100>;
+   interrupts = <0 447 0>;

[PATCH v7 8/9] arm64: dts: exynos: Add TMU sensor dt node for Exynos5433 SoC

[Chanwoo Choi]

This patch adds the TMU (Thermal Management Unit) sensor devicetree node for
Exynos5433. The Exynos5433 includes the five temperature sensors as following:
- two temperature sensor for Cortex-A57 (ATLAS)
- one temperature sensor for Cortex-A53 (APOLLO)
- one temperature sensor for G3D IP
- one temperature sensor for ISP IP

Cc: Kukjin Kim 
Signed-off-by: Chanwoo Choi 
Acked-by: Inki Dae 
Reviewed-by: Lukasz Majewski 
---
 .../dts/exynos/exynos5433-tmu-sensor-conf.dtsi | 22 +
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 55 ++
 2 files changed, 77 insertions(+)
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu-sensor-conf.dtsi

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tmu-sensor-conf.dtsi 
b/arch/arm64/boot/dts/exynos/exynos5433-tmu-sensor-conf.dtsi
new file mode 100644
index 000..396e60f
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tmu-sensor-conf.dtsi
@@ -0,0 +1,22 @@
+/*
+ * Device tree sources for Exynos5433 TMU sensor configuration
+ *
+ * Copyright (c) 2015 Chanwoo Choi 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+
+#thermal-sensor-cells = <0>;
+samsung,tmu_gain = <8>;
+samsung,tmu_reference_voltage = <16>;
+samsung,tmu_noise_cancel_mode = <4>;
+samsung,tmu_efuse_value = <75>;
+samsung,tmu_min_efuse_value = <40>;
+samsung,tmu_max_efuse_value = <150>;
+samsung,tmu_first_point_trim = <25>;
+samsung,tmu_second_point_trim = <85>;
+samsung,tmu_default_temp_offset = <50>;
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index f6ae71c..1fe0c23 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -836,6 +836,61 @@
status = "disabled";
};
 
+   tmu_atlas0: tmu@1006 {
+   compatible = "samsung,exynos5433-tmu";
+   reg = <0x1006 0x200>;
+   interrupts = <0 95 0>;
+   clocks = <&cmu_peris CLK_PCLK_TMU0_APBIF>,
+<&cmu_peris CLK_SCLK_TMU0>;
+   clock-names = "tmu_apbif", "tmu_sclk";
+   #include "exynos5433-tmu-sensor-conf.dtsi"
+   status = "disabled";
+   };
+
+   tmu_atlas1: tmu@10068000 {
+   compatible = "samsung,exynos5433-tmu";
+   reg = <0x10068000 0x200>;
+   interrupts = <0 96 0>;
+   clocks = <&cmu_peris CLK_PCLK_TMU0_APBIF>,
+<&cmu_peris CLK_SCLK_TMU0>;
+   clock-names = "tmu_apbif", "tmu_sclk";
+   #include "exynos5433-tmu-sensor-conf.dtsi"
+   status = "disabled";
+   };
+
+   tmu_g3d: tmu@1007 {
+   compatible = "samsung,exynos5433-tmu";
+   reg = <0x1007 0x200>;
+   interrupts = <0 99 0>;
+   clocks = <&cmu_peris CLK_PCLK_TMU1_APBIF>,
+<&cmu_peris CLK_SCLK_TMU1>;
+   clock-names = "tmu_apbif", "tmu_sclk";
+   #include "exynos5433-tmu-sensor-conf.dtsi"
+   status = "disabled";
+   };
+
+   tmu_apollo: tmu@10078000 {
+   compatible = "samsung,exynos5433-tmu";
+   reg = <0x10078000 0x200>;
+   interrupts = <0 115 0>;
+   clocks = <&cmu_peris CLK_PCLK_TMU1_APBIF>,
+<&cmu_peris CLK_SCLK_TMU1>;
+   clock-names = "tmu_apbif", "tmu_sclk";
+   #include "exynos5433-tmu-sensor-conf.dtsi"
+   status = "disabled";
+   };
+
+   tmu_isp: tmu@1007c000 {
+   compatible = "samsung,exynos5433-tmu";
+   reg = <0x1007c000 0x200>;
+   interrupts = <0 94 0>;
+   clocks = <&cmu_peris CLK_PCLK_TMU1_APBIF>,
+<&cmu_peris CLK_SCLK_TMU1>;
+   clock-names = "tmu_apbif", "tmu_sclk";
+   #include "exynos5433-tmu-sensor-conf.dtsi"
+   status = "disabled";
+   };
+
pmu_system_controller: system-controller@105c {
compatible = "samsung,exynos5433-pmu", "syscon";
reg = <0x105c 0x5008>;
-- 
1.8.5.5

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v7 9/9] arm64: dts: exynos: Add thermal-zones dt node for Exynos5433 SoC

[Chanwoo Choi]

This patch adds the thermal-zones devicetree node for Exynos5433 SoC.
The thermal-zones has five thermal-zones and then each thermal-zone contains
each thermal-sensor to monitor the temperature of own IP. The {atlas0|apollo}_
thermal zone have the eight trip-points for interrupt method to detect the
over-temperature.

Cc: Kukjin Kim 
Signed-off-by: Chanwoo Choi 
Acked-by: Inki Dae 
Reviewed-by: Lukasz Majewski 
---
 arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi | 231 +
 arch/arm64/boot/dts/exynos/exynos5433.dtsi |   1 +
 2 files changed, 232 insertions(+)
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi 
b/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
new file mode 100644
index 000..7ff7b0e
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
@@ -0,0 +1,231 @@
+/*
+ * Device tree sources for Exynos5433 thermal zone
+ *
+ * Copyright (c) 2015 Chanwoo Choi 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+
+/ {
+thermal-zones {
+   atlas0_thermal: atlas0-thermal {
+   thermal-sensors = <&tmu_atlas0>;
+   polling-delay-passive = <0>;
+   polling-delay = <0>;
+   trips {
+   atlas0_alert_0: atlas0-alert-0 {
+   temperature = <8>;  /* millicelsius */
+   hysteresis = <1>;   /* millicelsius */
+   type = "active";
+   };
+   atlas0_alert_1: atlas0-alert-1 {
+   temperature = <85000>;  /* millicelsius */
+   hysteresis = <1>;   /* millicelsius */
+   type = "active";
+   };
+   atlas0_alert_2: atlas0-alert-2 {
+   temperature = <9>;  /* millicelsius */
+   hysteresis = <1>;   /* millicelsius */
+   type = "active";
+   };
+   atlas0_alert_3: atlas0-alert-3 {
+   temperature = <95000>;  /* millicelsius */
+   hysteresis = <1>;   /* millicelsius */
+   type = "active";
+   };
+   atlas0_alert_4: atlas0-alert-4 {
+   temperature = <10>; /* millicelsius */
+   hysteresis = <1>;   /* millicelsius */
+   type = "active";
+   };
+   atlas0_alert_5: atlas0-alert-5 {
+   temperature = <105000>; /* millicelsius */
+   hysteresis = <1>;   /* millicelsius */
+   type = "active";
+   };
+   atlas0_alert_6: atlas0-alert-6 {
+   temperature = <11>; /* millicelsius */
+   hysteresis = <1>;   /* millicelsius */
+   type = "active";
+   };
+   };
+   };
+
+   atlas1_thermal: atlas1-thermal {
+   thermal-sensors = <&tmu_atlas1>;
+   polling-delay-passive = <0>;
+   polling-delay = <0>;
+   trips {
+   atlas1_alert_0: atlas1-alert-0 {
+   temperature = <8>;  /* millicelsius */
+   hysteresis = <1>;   /* millicelsius */
+   type = "active";
+   };
+   atlas1_alert_1: atlas1-alert-1 {
+   temperature = <85000>;  /* millicelsius */
+   hysteresis = <1>;   /* millicelsius */
+   type = "active";
+   };
+   atlas1_alert_2: atlas1-alert-2 {
+   temperature = <9>;  /* millicelsius */
+   hysteresis = <1>;   /* millicelsius */
+   type = "active";
+   };
+   atlas1_alert_3: atlas1-alert-3 {
+   temperature = <95000>;  /* millicelsius */
+   hysteresis = <1>;   /* millicelsius */
+   type = "active";
+   };
+   atlas1_alert_4: atlas1-alert-4 {
+   temperature = <10>; /* millicelsius */
+   hysteresis = <1>;   /* millicelsius */
+   

[PATCH v7 5/9] arm64: dts: exynos: Add RTC and ADC dt node for Exynos5433 SoC

[Chanwoo Choi]

This patch adds RTC (Real Time Clock) dt node for Exynos5433 SoC and adds
ADC dt node for Exynos5433 SoC. The c1b501564c98a94b4(iio: adc: exynos_adc:
Add support for exynos7) commit supports the ADC for Exynos7. Exynos5433's ADC
IP is the same with Exynos7's ADC IP. Exynos5433 has a little different from
ADCv2 on ADC_CON2 register. Exynos5433 don't contain OSEL/ESEL /HIGHF of 
ADC_CON2.

Cc: Kukjin Kim 
Signed-off-by: Chanwoo Choi 
Acked-by: Inki Dae 
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index d745205..0e0e9c9 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -815,6 +815,24 @@
clock-names = "clkout16";
clocks = <&xxti>;
};
+
+   rtc: rtc@1059 {
+   compatible = "samsung,exynos3250-rtc";
+   reg = <0x1059 0x100>;
+   interrupts = <0 385 0>, <0 386 0>;
+   status = "disabled";
+   };
+
+   adc: adc@14d1 {
+   compatible = "samsung,exynos7-adc";
+   reg = <0x14d1 0x100>;
+   interrupts = <0 438 0>;
+   clock-names = "adc";
+   clocks = <&cmu_peric CLK_PCLK_ADCIF>;
+   #io-channel-cells = <1>;
+   io-channel-ranges;
+   status = "disabled";
+   };
};
 
timer {
-- 
1.8.5.5

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v7 0/9] arm64: Add the support for new Exynos5433 SoC

[Chanwoo Choi]

This patchset adds new 64-bit Exynos5433 Samsung SoC which contains quad
Cortex-A57 and quad Cortex-A53. It is desigend with the 20nm low power process.

Depends on:
- This patch-set has the dependency on Exynos5433 clock driver[1] and pinctrl 
driver[2].
The Exynos5433 clock controller patch-set[1] was merged by Michael Turquette.
and Exynos5433's pinctrl patch[2] was merged by Linus Walleij. Exynos5433's TMU 
patch[3]
will be refactoring without feature update.

[1] 
http://git.linaro.org/people/mike.turquette/linux.git/commit/cc91909b9683c834485fd0627708c81d9398bf02
[2] 
https://git.kernel.org/cgit/linux/kernel/git/linusw/linux-pinctrl.git/commit/?h=for-next&id=3c5ecc9ed3537846fd95e8f288d6d6968075879f
[3] [PATCH 0/3] thermal: exynos: Add support for Exynos5433 TMU
- https://lkml.org/lkml/2015/2/26/234

Changelog:

Changes fromv v6:
(https://lkml.org/lkml/2015/3/9/1036)
- Fix wrong base address of CMU_MSCL dt node (0x105d -> 0x150d)
- Adjust the length of memory mapped region for all clock domains

Changes from v5:
(https://lkml.org/lkml/2015/3/5/27)
- Move 'timer' dt node under root node by Mark Rutland's comment

Changes from v4:
(https://lkml.org/lkml/2015/2/24/2)
- Rebased it on Linux 4.0-rc2
- Remove CONFIG_ARCH_EXYNOS5433 configuration by Arnd Bergmann's comment
- Move 'aliases' dt node from SoC dtsi to board dts file by Arnd Bergmann's 
comment
- Add Exynos5433 TMU patches which got the Lukasz Majewski's reviewed message

Changes from v3:
(https://lkml.org/lkml/2015/2/12/65)
- Rebased it on Linux 4.0-rc1.
- Remove ARM_GIC and ARM_AMBA dependency because CONFIG_ARM64 already included 
them.

Changes from v2:
(https://lkml.org/lkml/2014/12/2/134)
: Fix the range of GICC memory map (0x1000 -> 0x2000)
: Fix address space of 'range' property under 'soc' node
: Add ADMA / I2S dt node for sound playback/capture
- Select ARM_AMBA/ARM_GIC/HAVE_S3C_RTC for Exynos5433 in arch/arm64/Kconfig
- Send separate patch-set for Exynos5433 clock controller[1][2] and pinctrl[3]

Changes from v1:
(https://lkml.org/lkml/2014/11/27/92)
- Merge two patches (patch2, patch3) to solve incomplete description
- Exynos5433 Clock driver
 : Fix wrong register and code clean by using space instead of tab
 : Add CLK_IGNORE_UNUSED flag to pclk_sysreg_* clock for accessing system 
control register
 : Remove duplicate definition on the patch for CMU_BUS{0|1|2} domain
- Exynos5433 SoC DTS
 : Remove un-supported properties of arch_timer
 : Remove 'clock-frequency' property from 'cpus' dt node
 : Fix interrupt type from edge rising triggering to level high triggering
   because Cortex-A53/A57 use level triggering.
 : Fix defult address-size/size-celss from 1 to 2 because Exynos5433 is 64-bit 
SoC
 : Modify 'fin_pll' dt node to remove un-needed and ugly code
 : Move 'chipid' dt node under 'soc'
 : Use lowercase on all case in exynos5433.dtsi
 : Add PSCI dt node for secondary cpu boot
 : Add 'samsung,exynos5433' compatible to MCT dt node
- Divide pinctrl patch from this patchset
- Add new following patches:
  : clocksource: exynos_mct: Add the support for Exynos 64bit SoC
  : arm64: Enable Exynos5433 SoC in the defconfig
-

Chanwoo Choi (6):
  arm64: dts: exynos: Add dts files for 64-bit Exynos5433 SoC
  arm64: dts: exynos: Add SPI/PDMA dt node for Exynos5433
  arm64: dts: exynos: Add PMU dt node for Exynos5433
  arm64: dts: exynos: Add RTC and ADC dt node for Exynos5433 SoC
  arm64: dts: exynos: Add TMU sensor dt node for Exynos5433 SoC
  arm64: dts: exynos: Add thermal-zones dt node for Exynos5433 SoC

Inha Song (2):
  arm64: dts: exynos: Add ADMA dt node for Exynos5433 SoC
  arm64: dts: exynos: Add I2S dt node for Exynos5433 SoC

Jaehoon Chung (1):
  arm64: dts: exynos: Add MSHC dt node for Exynos5433

 .../devicetree/bindings/arm/samsung/pmu.txt|   1 +
 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 698 +++
 .../dts/exynos/exynos5433-tmu-sensor-conf.dtsi |  22 +
 arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi | 231 +
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 931 +
 5 files changed, 1883 insertions(+)
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu-sensor-conf.dtsi
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
 create mode 100644 arch/arm64/boot/dts/exynos/exynos5433.dtsi

-- 
1.8.5.5

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v7 2/9] arm64: dts: exynos: Add MSHC dt node for Exynos5433

[Chanwoo Choi]

From: Jaehoon Chung 

This patch adds MSHC (Mobile Storage Host Controller) dt node for Exynos5433
SoC. MSHC is an interface between the system the SD/MMC card.

Cc: Kukjin Kim 
Cc: Mark Rutland 
Cc: Marc Zyngier 
Cc: Arnd Bergmann 
Cc: Olof Johansson 
Cc: Catalin Marinas 
Cc: Will Deacon 
Signed-off-by: Jaehoon Chung 
Signed-off-by: Chanwoo Choi 
Acked-by: Inki Dae 
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 38 ++
 1 file changed, 38 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 125feba..8367915 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -655,6 +655,44 @@
status = "disabled";
};
 
+   mshc_0: mshc@1554 {
+   compatible = "samsung,exynos7-dw-mshc-smu";
+   interrupts = <0 225 0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x1554 0x2000>;
+   clocks = <&cmu_fsys CLK_ACLK_MMC0>,
+<&cmu_fsys CLK_SCLK_MMC0>;
+   clock-names = "biu", "ciu";
+   fifo-depth = <0x40>;
+   status = "disabled";
+   };
+
+   mshc_1: mshc@1555 {
+   compatible = "samsung,exynos7-dw-mshc-smu";
+   interrupts = <0 226 0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x1555 0x2000>;
+   clocks = <&cmu_fsys CLK_ACLK_MMC1>,
+<&cmu_fsys CLK_SCLK_MMC1>;
+   clock-names = "biu", "ciu";
+   fifo-depth = <0x40>;
+   status = "disabled";
+   };
+
+   mshc_2: mshc@1556 {
+   compatible = "samsung,exynos7-dw-mshc-smu";
+   interrupts = <0 227 0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x1556 0x2000>;
+   clocks = <&cmu_fsys CLK_ACLK_MMC2>,
+<&cmu_fsys CLK_SCLK_MMC2>;
+   clock-names = "biu", "ciu";
+   fifo-depth = <0x40>;
+   status = "disabled";
+   };
};
 
timer {
-- 
1.8.5.5

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v7 6/9] arm64: dts: exynos: Add ADMA dt node for Exynos5433 SoC

[Chanwoo Choi]

From: Inha Song 

This patch adds ADMA (Advanced DMA) device tree node for Exynos5433 SoC.
In Exynos5433 SoC, ADMA is used for I2S audio interface.

Cc: Kukjin Kim 
Signed-off-by: Inha Song 
Acked-by: Inki Dae 
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 0e0e9c9..1155205 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -426,6 +426,17 @@
#dma-channels = <8>;
#dma-requests = <32>;
};
+
+   adma: adma@1142 {
+   compatible = "arm,pl330", "arm,primecell";
+   reg = <0x1142 0x1000>;
+   interrupts = <0 73 0>;
+   clocks = <&cmu_aud CLK_ACLK_DMAC>;
+   clock-names = "apb_pclk";
+   #dma-cells = <1>;
+   #dma-channels = <8>;
+   #dma-requests = <32>;
+   };
};
 
serial_0: serial@14c1 {
-- 
1.8.5.5

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v7 4/9] arm64: dts: exynos: Add PMU dt node for Exynos5433

[Chanwoo Choi]

This patch adds PMU (Power Management Unit) dt node for Exynos5433 SoC and
set the source clock for CLKOUT register as xxti .

Cc: Kukjin Kim 
Signed-off-by: Chanwoo Choi 
[ideal.song: Add the setting of CLKOUT register]
Signed-off-by: Inha Song 
Acked-by: Inki Dae 
---
 Documentation/devicetree/bindings/arm/samsung/pmu.txt | 1 +
 arch/arm64/boot/dts/exynos/exynos5433.dtsi| 8 
 2 files changed, 9 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt 
b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
index 67b2113..a87fc43 100644
--- a/Documentation/devicetree/bindings/arm/samsung/pmu.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
@@ -10,6 +10,7 @@ Properties:
   - "samsung,exynos5260-pmu" - for Exynos5260 SoC.
   - "samsung,exynos5410-pmu" - for Exynos5410 SoC,
   - "samsung,exynos5420-pmu" - for Exynos5420 SoC.
+  - "samsung,exynos5433-pmu" - for Exynos5433 SoC.
   - "samsung,exynos7-pmu" - for Exynos7 SoC.
second value must be always "syscon".
 
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index dbecbba..d745205 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -807,6 +807,14 @@
fifo-depth = <0x40>;
status = "disabled";
};
+
+   pmu_system_controller: system-controller@105c {
+   compatible = "samsung,exynos5433-pmu", "syscon";
+   reg = <0x105c 0x5008>;
+   #clock-cells = <1>;
+   clock-names = "clkout16";
+   clocks = <&xxti>;
+   };
};
 
timer {
-- 
1.8.5.5

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [REGRESSION] "of: Fix premature bootconsole disable with 'stdout-path'" breaks console on tty0

[Jon Masters]

Hi Peter,

On 03/17/2015 01:47 PM, Peter Hurley wrote:

> On 03/17/2015 12:48 PM, Jon Masters wrote:
>> On 03/16/2015 03:46 PM, Peter Hurley wrote:
>>> On 03/16/2015 02:35 PM, Hans de Goede wrote:
 To be clear about my aarch64 remark, that relates to the behavior of 
 aarch64 acpi using
 machines, those will also output to both a serial tty and tty0 when the 
 acpi equivalent
 of stdout-path is present and points to a serial tty.
>>>
>>> I already made comments addressing the unsuitability of the license for the
>>> aarch64 acpi console;
>>
>> Yes, you did. However, I believe you might have outdated information.
>> Have you read the SPCR in the past few months, or are you looking at a
>> version prior to update that was made in October of 2014?
> 
> The version of the Serial Port Console Redirection Table specification
> I was referring to is downloadable here:
> 
> https://msdn.microsoft.com/en-us/library/windows/hardware/dn639132%28v=vs.85%29.aspx
> 
> That page says Last Updated: October 21, 2014

Ok. You've got the most recent version :) Let me predicate the following
with the assertion that I am not a lawyer and I am not offering legal
advice. But I have worked with Microsoft (and many other large hardware
and software vendors) for some time on topics related to standardization
of ARM and I am offering to reach back out to them to resolve any
legitimate concerns arising here. The thing we need to ascertain is
whether there is a legitimate concern.

>> Can you be specific about your concerns? The license has already been
>> changed once (I instigated the request that lead to that change to drop
>> several pages of terse terms that used to cover the first few pages). I
>> have found the Microsoft team extremely responsive and amenable to
>> resolving issues, so if you would do us the service of articulating what
>> the concern is, I'll reach back out and get that addressed. I have a
>> direct line into their server and legal teams to discuss this issue.
> 
> Well, I'm deducing somewhat here because the code that would use the
> SPCR table format has not been submitted. So I don't _know_ what license(s)
> you intend to submit with.

Fair enough. I wrote an initial quick and dirty implementation of SPCR
parsing which I handed off to a colleague to cleanup. They are indeed
planning such a submission. So such an implementation does in fact exist
and there is an intent to submit. Ultimately, ACPI based ARM systems
(and even x86 ones) will be better off for supporting SPCR. While not
required, it does obviate the need for both "console=" and "earlycon="
kernel command line parameters, and thus improves end user experience by
making console setup automatic. We decided to include SPCR in the SBBR
rather than writing a new table on the understanding that writing a new
table was otherwise the default, and a wasted effort when such a
specification already existed. The concern you raise was anticipated,
and the changes mentioned were already made. I'm sure we'll be able to
ask for additional clarification and changes also.

> So if you and Microsoft have worked out some deal where Microsoft has
> licensed the SPCR spec to you under GPL v2 terms, then, great! there is no
> problem.

I am willing to assist in brokering a discussion on this. But first we
should ascertain what is necessary here and articulate that succinctly.



> Now, that's just my interpretation of it; maybe the Linux Foundation's
> lawyers would see it differently.

Who ultimately is going to make the legal call on this one? In other
words, would an opinion from LF be the best thing to pursue? I can reach
out and connect a few people off-list for some conversation.

Ultimately, I believe Microsoft are willing to have a productive
conversation with us on these topics. I have found them very amenable
and professional when collaborating on ARM related standardization
topics and I am sure we can resolve any issues arising here.

Jon.

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH V5 2/2] ARM: dts: Add HS400 support for exynos5420 and exynos5800

[Alim Akhtar]

Thanks Kukjin for looking into this.
I will rebase on top of your for-next and send again.

On Tue, Mar 17, 2015 at 7:42 AM, Kukjin Kim  wrote:
> Alim Akhtar wrote:
>>
>> Ping?
>>
> Alim,
>
> Can you please re-send it based on latest my tree?
> It would be helpful for me ;)
>
> Thanks,
> Kukjin
>
>> On Wed, Feb 25, 2015 at 12:05 PM, Jaehoon Chung  
>> wrote:
>> > Hi, Alim.
>> >
>> > Acked-by: Jaehoon Chung 
>> >
>> > Best Regards,
>> > Jaehoon Chung
>> >
>> > On 01/29/2015 11:41 AM, Alim Akhtar wrote:
>> >> From: Seungwon Jeon 
>> >>
>> >> HS400 timing values are added for SMDK5420, exynos5420-peach-pit
>> >> and exynos5800-peach-pi boards.
>> >> This also adds RCLK GPIO line, this gpio should be in pull-down
>> >> state.
>> >> This also enables HS400 on peach-pi and this updates the clock frequency
>> >> to 800MHz to be set as input clock to controller.
>> >>
>> >> Signed-off-by: Seungwon Jeon 
>> >> Signed-off-by: Alim Akhtar 
>> >> [Alim: addressed review comments]
>> >> ---
>> >>  arch/arm/boot/dts/exynos5420-peach-pit.dts |4 +++-
>> >>  arch/arm/boot/dts/exynos5420-pinctrl.dtsi  |7 +++
>> >>  arch/arm/boot/dts/exynos5420-smdk5420.dts  |4 +++-
>> >>  arch/arm/boot/dts/exynos5800-peach-pi.dts  |7 +--
>> >>  4 files changed, 18 insertions(+), 4 deletions(-)
>> >>
>> >> diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts 
>> >> b/arch/arm/boot/dts/exynos5420-peach-
>> pit.dts
>> >> index 9a050e1..f7a44a4 100644
>> >> --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
>> >> +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
>> >> @@ -569,8 +569,10 @@
>> >>   samsung,dw-mshc-ciu-div = <3>;
>> >>   samsung,dw-mshc-sdr-timing = <0 4>;
>> >>   samsung,dw-mshc-ddr-timing = <0 2>;
>> >> + samsung,dw-mshc-hs400-timing = <0 2>;
>> >> + samsung,read-strobe-delay = <90>;
>> >>   pinctrl-names = "default";
>> >> - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
>> >> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8 &sd0_rclk>;
>> >>   bus-width = <8>;
>> >>  };
>> >>
>> >> diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi 
>> >> b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
>> >> index ba686e4..8b15316 100644
>> >> --- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
>> >> +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
>> >> @@ -201,6 +201,13 @@
>> >>   samsung,pin-drv = <3>;
>> >>   };
>> >>
>> >> + sd0_rclk: sd0-rclk {
>> >> + samsung,pins = "gpc0-7";
>> >> + samsung,pin-function = <2>;
>> >> + samsung,pin-pud = <1>;
>> >> + samsung,pin-drv = <3>;
>> >> + };
>> >> +
>> >>   sd1_cmd: sd1-cmd {
>> >>   samsung,pins = "gpc1-1";
>> >>   samsung,pin-function = <2>;
>> >> diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts 
>> >> b/arch/arm/boot/dts/exynos5420-smdk5420.dts
>> >> index 8be3d7b..2078a1f 100644
>> >> --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
>> >> +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
>> >> @@ -80,8 +80,10 @@
>> >>   samsung,dw-mshc-ciu-div = <3>;
>> >>   samsung,dw-mshc-sdr-timing = <0 4>;
>> >>   samsung,dw-mshc-ddr-timing = <0 2>;
>> >> + samsung,dw-mshc-hs400-timing = <0 2>;
>> >> + samsung,read-strobe-delay = <90>;
>> >>   pinctrl-names = "default";
>> >> - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
>> >> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8 
>> >> &sd0_rclk>;
>> >>   bus-width = <8>;
>> >>   cap-mmc-highspeed;
>> >>   };
>> >> diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts 
>> >> b/arch/arm/boot/dts/exynos5800-peach-pi.dts
>> >> index e8fdda8..96f0d61 100644
>> >> --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
>> >> +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
>> >> @@ -550,15 +550,18 @@
>> >>   num-slots = <1>;
>> >>   broken-cd;
>> >>   mmc-hs200-1_8v;
>> >> + mmc-hs400-1_8v;
>> >>   cap-mmc-highspeed;
>> >>   non-removable;
>> >>   card-detect-delay = <200>;
>> >> - clock-frequency = <4>;
>> >> + clock-frequency = <8>;
>> >>   samsung,dw-mshc-ciu-div = <3>;
>> >>   samsung,dw-mshc-sdr-timing = <0 4>;
>> >>   samsung,dw-mshc-ddr-timing = <0 2>;
>> >> + samsung,dw-mshc-hs400-timing = <0 2>;
>> >> + samsung,read-strobe-delay = <90>;
>> >>   pinctrl-names = "default";
>> >> - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
>> >> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8 &sd0_rclk>;
>> >>   bus-width = <8>;
>> >>  };
>



-- 
Regards,
Alim
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v2 2/3] leds: ktd2692: add device tree bindings for ktd2692

[Jaehoon Chung]

On 03/17/2015 05:45 PM, Ingi Kim wrote:
> This patch adds the device tree bindings for ktd2692 flash LEDs.
> Add optional properties 'flash-timeout-us' to control flash timeout
> and 'vin-supply' for flash-led regulator
> 
> Signed-off-by: Ingi Kim 
> ---
>  .../devicetree/bindings/leds/leds-ktd2692.txt  | 37 
> ++
>  1 file changed, 37 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/leds/leds-ktd2692.txt
> 
> diff --git a/Documentation/devicetree/bindings/leds/leds-ktd2692.txt 
> b/Documentation/devicetree/bindings/leds/leds-ktd2692.txt
> new file mode 100644
> index 000..1b44225
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/leds/leds-ktd2692.txt
> @@ -0,0 +1,37 @@
> +* Kinetic Technologies - KTD2692 Flash LED Driver
> +
> +KTD2692 is the ideal power solution for high-power flash LEDs.
> +It uses ExpressWire single-wire programming for maximum flexibility.
> +
> +The ExpressWire interface through CTRL pin can control LED on/off and
> +enable/disable the IC, Movie/Flash mode current, Flash timeout,
> +LVP(low voltage protection).
> +
> +Required properties:
> + - compatible: "kinetic,ktd2692"
> + - ctrl-gpio : gpio pin in order control ktd2692 flash led.
> + There is an internal 300kOhm pull-down resistor at this pin
> + - supply : "vin" LED supply
> +
> +Optional property:
> + - flash-timeout-us : Maximum flash timeout in microseconds.
> + flash timeout ranges from 0 to 1835000us and
> + default is 1049000us.
> +
> +Example:
> +
> +vbat: fixedregulator@0 {
> + compatible = "regulator-fixed";
> + regulator-name = "vbat-supply";
> + regulator-min-microvolt = <500>;
> + regulator-max-microvolt = <500>;
> + gpio = <>;

gpio = <> ? What do you mean?
And this is described at 
Documentation/devicetree/bindings/regulator/fixed-regulator.txt
I'm not sure whether this example really needs.

Best Regards,
Jaehoon Chung

> + regulator-always-on;
> +};
> +
> +flash-led {
> + compatible = "kinetic,ktd2692";
> + ctrl-gpio = <&gpc0 1 0>;
> + flash-timeout-us = <1835000>;
> + vin-supply = <&vbat>;
> +};
> 

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v16 11/11] ARM: qcom: Update defconfig to enable cpuidle

[Lina Iyer]

Update defconfig to allow cpuidle for QCOM cpus.

* Enable QCOM_PM
* Enable ARM_QCOM_CPUIDLE

Cc: Kumar Gala 
Signed-off-by: Lina Iyer 
---
 arch/arm/configs/qcom_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
index 8c7da33..56bda6b 100644
--- a/arch/arm/configs/qcom_defconfig
+++ b/arch/arm/configs/qcom_defconfig
@@ -30,6 +30,7 @@ CONFIG_CLEANCACHE=y
 CONFIG_ARM_APPENDED_DTB=y
 CONFIG_ARM_ATAG_DTB_COMPAT=y
 CONFIG_CPU_IDLE=y
+CONFIG_ARM_QCOM_CPUIDLE=y
 CONFIG_VFP=y
 CONFIG_NEON=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
@@ -135,6 +136,7 @@ CONFIG_DMADEVICES=y
 CONFIG_QCOM_BAM_DMA=y
 CONFIG_STAGING=y
 CONFIG_QCOM_GSBI=y
+CONFIG_QCOM_PM=y
 CONFIG_COMMON_CLK_QCOM=y
 CONFIG_APQ_MMCC_8084=y
 CONFIG_IPQ_GCC_806X=y
-- 
2.1.0

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v16 10/11] ARM: dts: qcom: Add idle state device nodes for 8064

[Lina Iyer]

Add ARM common idle state device bindings for cpuidle support for APQ
8064.

Support Standalone power collapse (SPC) idle state (power down that does not
affect any SoC idle states) for each cpu.

Cc: Kumar Gala 
Signed-off-by: Lina Iyer 
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi 
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 9fd24bc..592e985 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -23,6 +23,7 @@
next-level-cache = <&L2>;
qcom,acc = <&acc0>;
qcom,saw = <&saw0>;
+   cpu-idle-states = <&CPU_SPC>;
};
 
cpu@1 {
@@ -33,6 +34,7 @@
next-level-cache = <&L2>;
qcom,acc = <&acc1>;
qcom,saw = <&saw1>;
+   cpu-idle-states = <&CPU_SPC>;
};
 
cpu@2 {
@@ -43,6 +45,7 @@
next-level-cache = <&L2>;
qcom,acc = <&acc2>;
qcom,saw = <&saw2>;
+   cpu-idle-states = <&CPU_SPC>;
};
 
cpu@3 {
@@ -53,12 +56,23 @@
next-level-cache = <&L2>;
qcom,acc = <&acc3>;
qcom,saw = <&saw3>;
+   cpu-idle-states = <&CPU_SPC>;
};
 
L2: l2-cache {
compatible = "cache";
cache-level = <2>;
};
+
+   idle-states {
+   CPU_SPC: spc {
+   compatible = "qcom,idle-state-spc",
+   "arm,idle-state";
+   entry-latency-us = <400>;
+   exit-latency-us = <900>;
+   min-residency-us = <3000>;
+   };
+   };
};
 
cpu-pmu {
-- 
2.1.0

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v16 08/11] ARM: dts: qcom: Add idle states device nodes for 8974/8074

[Lina Iyer]

Add ARM common idle states device bindings for cpuidle support for APQ
8974/8074.

Support Standalone power collapse (SPC) idle state (power down that does
not affect any SoC idle states) for each cpu.

Cc: Kumar Gala 
Signed-off-by: Lina Iyer 
---
 arch/arm/boot/dts/qcom-msm8974.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi 
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 5a41f44..1c28f0f 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -22,6 +22,7 @@
next-level-cache = <&L2>;
qcom,acc = <&acc0>;
qcom,saw = <&saw0>;
+   cpu-idle-states = <&CPU_SPC>;
};
 
cpu@1 {
@@ -32,6 +33,7 @@
next-level-cache = <&L2>;
qcom,acc = <&acc1>;
qcom,saw = <&saw1>;
+   cpu-idle-states = <&CPU_SPC>;
};
 
cpu@2 {
@@ -42,6 +44,7 @@
next-level-cache = <&L2>;
qcom,acc = <&acc2>;
qcom,saw = <&saw2>;
+   cpu-idle-states = <&CPU_SPC>;
};
 
cpu@3 {
@@ -52,6 +55,7 @@
next-level-cache = <&L2>;
qcom,acc = <&acc3>;
qcom,saw = <&saw3>;
+   cpu-idle-states = <&CPU_SPC>;
};
 
L2: l2-cache {
@@ -59,6 +63,16 @@
cache-level = <2>;
qcom,saw = <&saw_l2>;
};
+
+   idle-states {
+   CPU_SPC: spc {
+   compatible = "qcom,idle-state-spc",
+   "arm,idle-state";
+   entry-latency-us = <150>;
+   exit-latency-us = <200>;
+   min-residency-us = <2000>;
+   };
+   };
};
 
cpu-pmu {
-- 
2.1.0

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v16 06/11] ARM: dts: qcom: Add power-controller device node for 8084 Krait CPUs

[Lina Iyer]

Each Krait CPU in the QCOM 8084 SoC has an SAW power controller to
regulate the power to the cpu and aide the core in entering idle states.
Reference the SAW instance and associate the instance with the CPU core.

Cc: Kumar Gala 
Signed-off-by: Lina Iyer 
Reviewed-by: Stephen Boyd 
---
 arch/arm/boot/dts/qcom-apq8084.dtsi | 26 +-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi 
b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 1f130bc..71182bf 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -21,6 +21,7 @@
enable-method = "qcom,kpss-acc-v2";
next-level-cache = <&L2>;
qcom,acc = <&acc0>;
+   qcom,saw = <&saw0>;
};
 
cpu@1 {
@@ -30,6 +31,7 @@
enable-method = "qcom,kpss-acc-v2";
next-level-cache = <&L2>;
qcom,acc = <&acc1>;
+   qcom,saw = <&saw1>;
};
 
cpu@2 {
@@ -39,6 +41,7 @@
enable-method = "qcom,kpss-acc-v2";
next-level-cache = <&L2>;
qcom,acc = <&acc2>;
+   qcom,saw = <&saw2>;
};
 
cpu@3 {
@@ -48,6 +51,7 @@
enable-method = "qcom,kpss-acc-v2";
next-level-cache = <&L2>;
qcom,acc = <&acc3>;
+   qcom,saw = <&saw3>;
};
 
L2: l2-cache {
@@ -144,7 +148,27 @@
};
};
 
-   saw_l2: regulator@f9012000 {
+   saw0: power-controller@f9089000 {
+   compatible = "qcom,apq8084-saw2-v2.1-cpu";
+   reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;
+   };
+
+   saw1: power-controller@f9099000 {
+   compatible = "qcom,apq8084-saw2-v2.1-cpu";
+   reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>;
+   };
+
+   saw2: power-controller@f90a9000 {
+   compatible = "qcom,apq8084-saw2-v2.1-cpu";
+   reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>;
+   };
+
+   saw3: power-controller@f90b9000 {
+   compatible = "qcom,apq8084-saw2-v2.1-cpu";
+   reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>;
+   };
+
+   saw_l2: power-controller@f9012000 {
compatible = "qcom,saw2";
reg = <0xf9012000 0x1000>;
regulator;
-- 
2.1.0

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v16 09/11] ARM: dts: qcom: Add idle states device nodes for 8084

[Lina Iyer]

Add ARM common idle states device bindings for cpuidle support for APQ
8084.

Support Standalone power collapse (SPC) idle state (power down that does not
affect any SoC idle states) for each cpu.

Cc: Kumar Gala 
Signed-off-by: Lina Iyer 
---
 arch/arm/boot/dts/qcom-apq8084.dtsi | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi 
b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 71182bf..6126d47 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -22,6 +22,7 @@
next-level-cache = <&L2>;
qcom,acc = <&acc0>;
qcom,saw = <&saw0>;
+   cpu-idle-states = <&CPU_SPC>;
};
 
cpu@1 {
@@ -32,6 +33,7 @@
next-level-cache = <&L2>;
qcom,acc = <&acc1>;
qcom,saw = <&saw1>;
+   cpu-idle-states = <&CPU_SPC>;
};
 
cpu@2 {
@@ -42,6 +44,7 @@
next-level-cache = <&L2>;
qcom,acc = <&acc2>;
qcom,saw = <&saw2>;
+   cpu-idle-states = <&CPU_SPC>;
};
 
cpu@3 {
@@ -52,6 +55,7 @@
next-level-cache = <&L2>;
qcom,acc = <&acc3>;
qcom,saw = <&saw3>;
+   cpu-idle-states = <&CPU_SPC>;
};
 
L2: l2-cache {
@@ -59,6 +63,16 @@
cache-level = <2>;
qcom,saw = <&saw_l2>;
};
+
+   idle-states {
+   CPU_SPC: spc {
+   compatible = "qcom,idle-state-spc",
+   "arm,idle-state";
+   entry-latency-us = <150>;
+   exit-latency-us = <200>;
+   min-residency-us = <2000>;
+   };
+   };
};
 
cpu-pmu {
-- 
2.1.0

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v16 00/11] ARM: qcom: cpuidle support for 8064, 8074, 8084

[Lina Iyer]

Hi,

This patchset is based on common cpuidle driver for ARM and cpuidle_ops changes
by Daniel Lezcano [1]. The cpuidle driver supports ARM architecture clockgating
(WFI) and the cpu power state (SPC) for the QCOM cpus.

Changes since v15:
https://www.mail-archive.com/devicetree@vger.kernel.org/msg64700.html
- Clean up cpuidle-arm.c to use devm_kzalloc and print error codes.
- Remove qcom,idle-state-stby as a DT mode, instead use the ARM WFI defined in
  ARM cpuidle driver for clock gating/standby modes. The platform driver will
  default to standby for all cpus after executing any low power state. This 
allows
  us to be completely compatible with generic ARM cpuidle driver and not send 
out
  cpu_pm notifications that are sent out for all 'platform states'.
- Cleaned up comments around setting SPM states.
- Platform idle state (SPC) starts at index 1, previous patch was overwritting
  ARM WFI state, which is mandated to be default state at index 0. 
- Removed duplicate cpu_pm_enter() and cpu_pm_exit() callbacks.
- Re-introduce ARM_QCOM_CPUIDLE defconfig item to enable/disable QCOM cpuidle
  support.
- Update documentation on standby state to indicate that this state is no longer
  defined in the DT.
- Remove unused qcom,saw2-v1.* compatibles from documentation.
- Rebased on top of SCM changes that were pulled in Kumar's 'soc' branch [2].
- Removed Reviewed-by tags from DT patches due to change in idle states.

Changes since v14:
- Support for cpuidle_ops
- SPM probe changes to register cpuidle
- Rebase on top of 4.0-rc1
- Remove SCM patches from series. Rebased on top of Kumar's tree
- Removed cpuidle-qcom.c in favor of ARM generic cpuidle driver
- Included Daniel's change for supporting creating cpuidle devices by platform

Tested on: 8074, 8084.

Thanks,
Lina

[1]. https://lkml.org/lkml/2015/3/3/271
[2]. https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg847249.html

Daniel Lezcano (1):
  ARM: cpuidle: Register per cpuidle device

Lina Iyer (10):
  ARM: qcom: Add Subsystem Power Manager (SPM) driver
  ARM: cpuidle: qcom: Add documentation for qcom cpuidle states
  ARM: cpuidle: Add cpuidle support for QCOM cpus
  ARM: dts: qcom: Add power-controller device node for 8074 Krait CPUs
  ARM: dts: qcom: Add power-controller device node for 8084 Krait CPUs
  ARM: dts: qcom: Update power-controller device node for 8064 Krait
CPUs
  ARM: dts: qcom: Add idle states device nodes for 8974/8074
  ARM: dts: qcom: Add idle states device nodes for 8084
  ARM: dts: qcom: Add idle state device nodes for 8064
  ARM: qcom: Update defconfig to enable cpuidle

 .../bindings/arm/msm/qcom,idle-state.txt   |  84 +
 .../devicetree/bindings/arm/msm/qcom,saw2.txt  |  29 +-
 arch/arm/boot/dts/qcom-apq8064.dtsi|  30 +-
 arch/arm/boot/dts/qcom-apq8084.dtsi|  40 +-
 arch/arm/boot/dts/qcom-msm8974.dtsi|  40 +-
 arch/arm/configs/qcom_defconfig|   2 +
 arch/arm/include/asm/cpuidle_ops.h |   5 +
 drivers/cpuidle/Kconfig.arm|   7 +
 drivers/cpuidle/cpuidle-arm.c  |  39 +-
 drivers/soc/qcom/Kconfig   |   7 +
 drivers/soc/qcom/Makefile  |   1 +
 drivers/soc/qcom/spm.c | 408 +
 12 files changed, 674 insertions(+), 18 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt
 create mode 100644 drivers/soc/qcom/spm.c

-- 
2.1.0

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v16 02/11] ARM: qcom: Add Subsystem Power Manager (SPM) driver

[Lina Iyer]

SPM is a hardware block that controls the peripheral logic surrounding
the application cores (cpu/l$). When the core executes WFI instruction,
the SPM takes over the putting the core in low power state as
configured. The wake up for the SPM is an interrupt at the GIC, which
then completes the rest of low power mode sequence and brings the core
out of low power mode.

The SPM has a set of control registers that configure the SPMs
individually based on the type of the core and the runtime conditions.
SPM is a finite state machine block to which a sequence is provided and
it interprets the bytes and executes them in sequence. Each low power
mode that the core can enter into is provided to the SPM as a sequence.

Configure the SPM to set the core (cpu or L2) into its low power mode,
the index of the first command in the sequence is set in the SPM_CTL
register. When the core executes ARM wfi instruction, it triggers the
SPM state machine to start executing from that index. The SPM state
machine waits until the interrupt occurs and starts executing the rest
of the sequence until it hits the end of the sequence. The end of the
sequence jumps the core out of its low power mode.

Add support for an idle driver to set up the SPM to place the core in
Standby or Standalone power collapse mode when the core is idle.

Based on work by: Mahesh Sivasubramanian ,
Ai Li , Praveen Chidambaram 
Original tree available at -
git://codeaurora.org/quic/la/kernel/msm-3.10.git

Cc: Stephen Boyd 
Cc: Arnd Bergmann 
Cc: Kevin Hilman 
Cc: Daniel Lezcano 
Signed-off-by: Lina Iyer 
---
 .../devicetree/bindings/arm/msm/qcom,saw2.txt  |  29 +-
 drivers/soc/qcom/Kconfig   |   7 +
 drivers/soc/qcom/Makefile  |   1 +
 drivers/soc/qcom/spm.c | 408 +
 4 files changed, 439 insertions(+), 6 deletions(-)
 create mode 100644 drivers/soc/qcom/spm.c

diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt 
b/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
index 1505fb8..664aa91 100644
--- a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
@@ -2,11 +2,20 @@ SPM AVS Wrapper 2 (SAW2)
 
 The SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the
 Adaptive Voltage Scaling (AVS) hardware. The SPM is a programmable
-micro-controller that transitions a piece of hardware (like a processor or
+power-controller that transitions a piece of hardware (like a processor or
 subsystem) into and out of low power modes via a direct connection to
 the PMIC. It can also be wired up to interact with other processors in the
 system, notifying them when a low power state is entered or exited.
 
+Multiple revisions of the SAW hardware are supported using these Device Nodes.
+SAW2 revisions differ in the register offset and configuration data. Also, the
+same revision of the SAW in different SoCs may have different configuration
+data due the the differences in hardware capabilities. Hence the SoC name, the
+version of the SAW hardware in that SoC and the distinction between cpu (big
+or Little) or cache, may be needed to uniquely identify the SAW register
+configuration and initialization data. The compatible string is used to
+indicate this parameter.
+
 PROPERTIES
 
 - compatible:
@@ -14,10 +23,11 @@ PROPERTIES
Value type: 
Definition: shall contain "qcom,saw2". A more specific value should be
one of:
-"qcom,saw2-v1"
-"qcom,saw2-v1.1"
-"qcom,saw2-v2"
-"qcom,saw2-v2.1"
+   "qcom,saw2-v2"
+   "qcom,saw2-v2.1"
+   "qcom,apq8064-saw2-v1.1-cpu"
+   "qcom,msm8974-saw2-v2.1-cpu"
+   "qcom,apq8084-saw2-v2.1-cpu"
 
 - reg:
Usage: required
@@ -26,10 +36,17 @@ PROPERTIES
the register region. An optional second element specifies
the base address and size of the alias register region.
 
+- regulator:
+   Usage: optional
+   Value type: boolean
+   Definition: Indicates that this SPM device acts as a regulator device
+   device for the core (CPU or Cache) the SPM is attached
+   to.
 
 Example:
 
-   regulator@2099000 {
+   power-controller@2099000 {
compatible = "qcom,saw2";
reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
+   regulator;
};
diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
index 7bd2c94..628bcba 100644
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
@@ -9,3 +9,10 @@ config QCOM_GSBI
   functions for connecting the underlying serial UART, SPI, and I2C
   devices to the output pins.
 
+config QCOM_PM
+   bool "Qualcomm Power Management"
+  

[PATCH v16 05/11] ARM: dts: qcom: Add power-controller device node for 8074 Krait CPUs

[Lina Iyer]

Each Krait CPU in the QCOM 8074/8974 SoC has an SAW power controller to
regulate the power to the cpu and aide the core in entering idle states.
Reference the SAW instance and associate the instance with the CPU core.

Cc: Kumar Gala 
Signed-off-by: Lina Iyer 
Reviewed-by: Stephen Boyd 
---
 arch/arm/boot/dts/qcom-msm8974.dtsi | 26 +-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi 
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index e265ec1..5a41f44 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -21,6 +21,7 @@
reg = <0>;
next-level-cache = <&L2>;
qcom,acc = <&acc0>;
+   qcom,saw = <&saw0>;
};
 
cpu@1 {
@@ -30,6 +31,7 @@
reg = <1>;
next-level-cache = <&L2>;
qcom,acc = <&acc1>;
+   qcom,saw = <&saw1>;
};
 
cpu@2 {
@@ -39,6 +41,7 @@
reg = <2>;
next-level-cache = <&L2>;
qcom,acc = <&acc2>;
+   qcom,saw = <&saw2>;
};
 
cpu@3 {
@@ -48,6 +51,7 @@
reg = <3>;
next-level-cache = <&L2>;
qcom,acc = <&acc3>;
+   qcom,saw = <&saw3>;
};
 
L2: l2-cache {
@@ -144,7 +148,27 @@
};
};
 
-   saw_l2: regulator@f9012000 {
+   saw0: power-controller@f9089000 {
+   compatible = "qcom,msm8974-saw2-v2.1-cpu";
+   reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;
+   };
+
+   saw1: power-controller@f9099000 {
+   compatible = "qcom,msm8974-saw2-v2.1-cpu";
+   reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>;
+   };
+
+   saw2: power-controller@f90a9000 {
+   compatible = "qcom,msm8974-saw2-v2.1-cpu";
+   reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>;
+   };
+
+   saw3: power-controller@f90b9000 {
+   compatible = "qcom,msm8974-saw2-v2.1-cpu";
+   reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>;
+   };
+
+   saw_l2: power-controller@f9012000 {
compatible = "qcom,saw2";
reg = <0xf9012000 0x1000>;
regulator;
-- 
2.1.0

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v16 04/11] ARM: cpuidle: Add cpuidle support for QCOM cpus

[Lina Iyer]

Register cpuidle ops for Krait Processor Sub-System. Supports v1 and v2
versions of KPSS.

Define ARM_QCOM_CPUIDLE config item to enable cpuidle support.

Cc: Stephen Boyd 
Cc: Arnd Bergmann 
Cc: Kevin Hilman 
Cc: Daniel Lezcano 
Signed-off-by: Lina Iyer 
---
 arch/arm/include/asm/cpuidle_ops.h | 5 +
 drivers/cpuidle/Kconfig.arm| 7 +++
 2 files changed, 12 insertions(+)

diff --git a/arch/arm/include/asm/cpuidle_ops.h 
b/arch/arm/include/asm/cpuidle_ops.h
index be0a612..adc8874 100644
--- a/arch/arm/include/asm/cpuidle_ops.h
+++ b/arch/arm/include/asm/cpuidle_ops.h
@@ -1,3 +1,8 @@
 /*
  * List of cpuidle operations
  */
+
+#if IS_ENABLED(CONFIG_ARM_QCOM_CPUIDLE)
+CPUIDLE_OPS(qcom_kpss_v1)
+CPUIDLE_OPS(qcom_kpss_v2)
+#endif
diff --git a/drivers/cpuidle/Kconfig.arm b/drivers/cpuidle/Kconfig.arm
index 1ab9a48..b1494acb 100644
--- a/drivers/cpuidle/Kconfig.arm
+++ b/drivers/cpuidle/Kconfig.arm
@@ -75,3 +75,10 @@ config ARM_MVEBU_V7_CPUIDLE
depends on ARCH_MVEBU
help
  Select this to enable cpuidle on Armada 370, 38x and XP processors.
+
+config ARM_QCOM_CPUIDLE
+   bool "CPU Idle Driver for QCOM processors"
+   depends on ARCH_QCOM
+   select ARM_CPUIDLE
+   help
+ Select this to enable cpuidle on QCOM processors.
-- 
2.1.0

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v16 07/11] ARM: dts: qcom: Update power-controller device node for 8064 Krait CPUs

[Lina Iyer]

Update the SAW2 DT bindings to add qcom,apq8064-saw2-v1.1-cpu compatible
binding string to configure SPM registers and allow the SPM to put the
core in deeper idle states when the core is idle.

Cc: Kumar Gala 
Signed-off-by: Lina Iyer 
Reviewed-by: Stephen Boyd 
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi 
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index b3154c0..9fd24bc 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -139,26 +139,26 @@
reg = <0x020b8000 0x1000>, <0x02008000 0x1000>;
};
 
-   saw0: regulator@2089000 {
-   compatible = "qcom,saw2";
+   saw0: power-controller@2089000 {
+   compatible = "qcom,apq8064-saw2-v1.1-cpu", "qcom,saw2";
reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
regulator;
};
 
-   saw1: regulator@2099000 {
-   compatible = "qcom,saw2";
+   saw1: power-controller@2099000 {
+   compatible = "qcom,apq8064-saw2-v1.1-cpu", "qcom,saw2";
reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
regulator;
};
 
-   saw2: regulator@20a9000 {
-   compatible = "qcom,saw2";
+   saw2: power-controller@20a9000 {
+   compatible = "qcom,apq8064-saw2-v1.1-cpu", "qcom,saw2";
reg = <0x020a9000 0x1000>, <0x02009000 0x1000>;
regulator;
};
 
-   saw3: regulator@20b9000 {
-   compatible = "qcom,saw2";
+   saw3: power-controller@20b9000 {
+   compatible = "qcom,apq8064-saw2-v1.1-cpu", "qcom,saw2";
reg = <0x020b9000 0x1000>, <0x02009000 0x1000>;
regulator;
};
-- 
2.1.0

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v16 03/11] ARM: cpuidle: qcom: Add documentation for qcom cpuidle states

[Lina Iyer]

Add documentation for cpuidle states of QCOM cpus. In addition to
arm-idle-state compatible string, the ARM idle state definition must
define one of the following compatible strings -
"qcom,idle-state-ret",
"qcom,idle-state-spc",
"qcom,idle-state-pc",

The compatibles helps the SPM platform driver to use the correct idle
function when the index to the idle state is passed to the platform
driver.

Signed-off-by: Lina Iyer 
---
 .../bindings/arm/msm/qcom,idle-state.txt   | 84 ++
 1 file changed, 84 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt

diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt 
b/Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt
new file mode 100644
index 000..06df04c
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt
@@ -0,0 +1,84 @@
+QCOM Idle States for cpuidle driver
+
+ARM provides idle-state node to define the cpuidle states, as defined in [1].
+cpuidle-qcom is the cpuidle driver for Qualcomm SoCs and uses these idle
+states. Idle states have different enter/exit latency and residency values.
+The idle states supported by the QCOM SoC are defined as -
+
+* Standby
+* Retention
+* Standalone Power Collapse (Standalone PC or SPC)
+* Power Collapse (PC)
+
+Standby: Standby does a little more in addition to architectural clock gating.
+When the WFI instruction is executed the ARM core would gate its internal
+clocks. In addition to gating the clocks, QCOM cpus use this instruction as a
+trigger to execute the SPM state machine. The SPM state machine waits for the
+interrupt to trigger the core back in to active. This triggers the cache
+hierarchy to enter standby states, when all cpus are idle. An interrupt brings
+the SPM state machine out of its wait, the next step is to ensure that the
+cache hierarchy is also out of standby, and then the cpu is allowed to resume
+execution. This state is defined as a generic ARM WFI state by the ARM cpuidle
+driver and is not defined in the DT. The SPM state machine should be
+configured to execute this state by default and after executing every other
+state below.
+
+Retention: Retention is a low power state where the core is clock gated and
+the memory and the registers associated with the core are retained. The
+voltage may be reduced to the minimum value needed to keep the processor
+registers active. The SPM should be configured to execute the retention
+sequence and would wait for interrupt, before restoring the cpu to execution
+state. Retention may have a slightly higher latency than Standby.
+
+Standalone PC: A cpu can power down and warmboot if there is a sufficient time
+between the time it enters idle and the next known wake up. SPC mode is used
+to indicate a core entering a power down state without consulting any other
+cpu or the system resources. This helps save power only on that core.  The SPM
+sequence for this idle state is programmed to power down the supply to the
+core, wait for the interrupt, restore power to the core, and ensure the
+system state including cache hierarchy is ready before allowing core to
+resume. Applying power and resetting the core causes the core to warmboot
+back into Elevation Level (EL) which trampolines the control back to the
+kernel. Entering a power down state for the cpu, needs to be done by trapping
+into a EL. Failing to do so, would result in a crash enforced by the warm boot
+code in the EL for the SoC. On SoCs with write-back L1 cache, the cache has to
+be flushed in s/w, before powering down the core.
+
+Power Collapse: This state is similar to the SPC mode, but distinguishes
+itself in that the cpu acknowledges and permits the SoC to enter deeper sleep
+modes. In a hierarchical power domain SoC, this means L2 and other caches can
+be flushed, system bus, clocks - lowered, and SoC main XO clock gated and
+voltages reduced, provided all cpus enter this state.  Since the span of low
+power modes possible at this state is vast, the exit latency and the residency
+of this low power mode would be considered high even though at a cpu level,
+this essentially is cpu power down. The SPM in this state also may handshake
+with the Resource power manager (RPM) processor in the SoC to indicate a
+complete application processor subsystem shut down.
+
+The idle-state for QCOM SoCs are distinguished by the compatible property of
+the idle-states device node.
+
+The devicetree representation of the idle state should be -
+
+Required properties:
+
+- compatible: Must be one of -
+   "qcom,idle-state-ret",
+   "qcom,idle-state-spc",
+   "qcom,idle-state-pc",
+   and "arm,idle-state".
+
+Other required and optional properties are specified in [1].
+
+Example:
+
+   idle-states {
+   CPU_SPC: spc {
+   compatible = "qcom

[PATCH v16 01/11] ARM: cpuidle: Register per cpuidle device

[Lina Iyer]

From: Daniel Lezcano 

Some architectures have some cpus which does not support idle states or
may be ready to do idle states only when the platform dependencies are
probed.

Let the underlying low level code return -ENOSYS when it is not possible
to set an idle state at this time.

Signed-off-by: Daniel Lezcano 
Signed-off-by: Lina Iyer 
[Minor clean ups]
---
 drivers/cpuidle/cpuidle-arm.c | 39 +--
 1 file changed, 37 insertions(+), 2 deletions(-)

diff --git a/drivers/cpuidle/cpuidle-arm.c b/drivers/cpuidle/cpuidle-arm.c
index 1c94b88..e176469 100644
--- a/drivers/cpuidle/cpuidle-arm.c
+++ b/drivers/cpuidle/cpuidle-arm.c
@@ -17,6 +17,9 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 #include 
 
@@ -93,6 +96,7 @@ static const struct of_device_id arm_idle_state_match[] 
__initconst = {
 static int __init arm_idle_init(void)
 {
int cpu, ret;
+   struct cpuidle_device *dev;
struct cpuidle_driver *drv = &arm_idle_driver;
 
/*
@@ -105,18 +109,49 @@ static int __init arm_idle_init(void)
if (ret <= 0)
return ret ? : -ENODEV;
 
+
+   ret = cpuidle_register_driver(drv);
+   if (ret) {
+   pr_err("Failed to register cpuidle driver\n");
+   return ret;
+   }
+
/*
 * Call arch CPU operations in order to initialize
 * idle states suspend back-end specific data
 */
for_each_possible_cpu(cpu) {
ret = arm_cpuidle_init(cpu);
+
+   /*
+* -ENOSYS: Either the platform driver shall register
+* a cpuidle device for this cpu, or there are no
+* supported idle states.
+*/
+   if (ret == -ENOSYS)
+   continue;
+
if (ret) {
-   pr_err("CPU %d failed to init idle CPU ops\n", cpu);
+   pr_err("CPU %d failed to init idle CPU ops, err=%d\n",
+   cpu, ret);
return ret;
}
+
+   dev = devm_kzalloc(get_cpu_device(cpu), sizeof(*dev),
+   GFP_KERNEL);
+   if (!dev)
+   return -ENOMEM;
+
+   dev->cpu = cpu;
+   ret = cpuidle_register_device(dev);
+   if (ret) {
+   pr_err("Failed to register cpuidle device for CPU %d, 
err=%d\n",
+  cpu, ret);
+   kfree(dev);
+   continue;
+   }
}
 
-   return cpuidle_register(drv, NULL);
+   return ret;
 }
 device_initcall(arm_idle_init);
-- 
2.1.0

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [REGRESSION] "of: Fix premature bootconsole disable with 'stdout-path'" breaks console on tty0

[Andreas Schwab]

Peter Hurley  writes:

> Would you share what the actual prom stdout string value is?
> (linux,stdout-path is equivalent)

You mean the contents of chosen/linux,stdout-path?

"/pci@0,f000/NVDA,Parent@10/NVDA,Display-B@1"

Andreas.

-- 
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
"And now for something completely different."
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH] of/irq: Fix of_irq_parse_one() returned error codes

[Laurent Pinchart]

The error code paths that require cleanup use a goto to jump to the
cleanup code and return an error code. However, the error code variable
res, which is initialized to -EINVAL when declared, is then overwritten
with the return value of of_parse_phandle_with_args(), and reused as the
return code from of_irq_parse_one(). This leads to an undetermined error
being returned instead of the expected -EINVAL value. Fix it.

Signed-off-by: Laurent Pinchart 
---
 drivers/of/irq.c | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/of/irq.c b/drivers/of/irq.c
index 0d7765807f49..1a7980692f25 100644
--- a/drivers/of/irq.c
+++ b/drivers/of/irq.c
@@ -290,7 +290,7 @@ int of_irq_parse_one(struct device_node *device, int index, 
struct of_phandle_ar
struct device_node *p;
const __be32 *intspec, *tmp, *addr;
u32 intsize, intlen;
-   int i, res = -EINVAL;
+   int i, res;
 
pr_debug("of_irq_parse_one: dev=%s, index=%d\n", 
of_node_full_name(device), index);
 
@@ -323,15 +323,19 @@ int of_irq_parse_one(struct device_node *device, int 
index, struct of_phandle_ar
 
/* Get size of interrupt specifier */
tmp = of_get_property(p, "#interrupt-cells", NULL);
-   if (tmp == NULL)
+   if (tmp == NULL) {
+   res = -EINVAL;
goto out;
+   }
intsize = be32_to_cpu(*tmp);
 
pr_debug(" intsize=%d intlen=%d\n", intsize, intlen);
 
/* Check index */
-   if ((index + 1) * intsize > intlen)
+   if ((index + 1) * intsize > intlen) {
+   res = -EINVAL;
goto out;
+   }
 
/* Copy intspec into irq structure */
intspec += index * intsize;
-- 
Regards,

Laurent Pinchart

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 2/4 v3] dt/bindings: Add binding for BCM2835 mailbox driver

[Scott Branden]

Hi Lubomir,


On 15-03-17 10:27 AM, Lee Jones wrote:

On Thu, 12 Mar 2015, Eric Anholt wrote:


From: Lubomir Rintel 

Signed-off-by: Lubomir Rintel 
Signed-off-by: Craig McGeachie 
Signed-off-by: Eric Anholt 
---


v2: Split into a separate patch for submitting to the devicetree list.
 Consistently start node docs with a capital letter. device's
 address in the example shouldn't have "0x". Drop machine-specific
 interrupt numbers from the docs.  (changes by anholt).

v3: Move the file to just bcm2835-mbox.txt, clean up formatting
 (changes by anholt, from review by Lee Jones).


Thanks for fixing up.


.../devicetree/bindings/mailbox/bcm2835-mbox.txt  | 19 +++
  1 file changed, 19 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/mailbox/bcm2835-mbox.txt


I don't see any unruliness or causes of controversy.

Acked-by: Lee Jones 


diff --git a/Documentation/devicetree/bindings/mailbox/bcm2835-mbox.txt 
b/Documentation/devicetree/bindings/mailbox/bcm2835-mbox.txt
new file mode 100644
index 000..0bb2b9d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/bcm2835-mbox.txt
I am trying to standarize all broadcom device tree bindings in the 
format "brcm,binding.txt".


Could you please rename this file to brcm,bcm2835-mbox.txt for 
consistency in bindings?


Regards,
 Scott
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH RESEND v6 2/2] leds: tlc591xx: Driver for the TI 8/16 Channel i2c LED driver

[Andrew Lunn]

The TLC59116 is an I2C bus controlled 16-channel LED driver.  The
TLC59108 is an I2C bus controlled 8-channel LED driver, which is very
similar to the TLC59116. Each LED output has its own 8-bit
fixed-frequency PWM controller to control the brightness of the LED.
The LEDs can also be fixed off and on, making them suitable for use as
GPOs.

This is based on a driver from Belkin, but has been extensively
rewritten and extended to support both 08 and 16 versions.

Signed-off-by: Andrew Lunn 
Tested-by: Imre Kaloz 
Cc: matthew.fathe...@belkin.com
---
 drivers/leds/Kconfig |   8 ++
 drivers/leds/Makefile|   1 +
 drivers/leds/leds-tlc591xx.c | 300 +++
 3 files changed, 309 insertions(+)
 create mode 100644 drivers/leds/leds-tlc591xx.c

diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index 966b9605f5f0..a38b17a10bd2 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -467,6 +467,14 @@ config LEDS_TCA6507
  LED driver chips accessed via the I2C bus.
  Driver support brightness control and hardware-assisted blinking.
 
+config LEDS_TLC591XX
+   tristate "LED driver for TLC59108 and TLC59116 controllers"
+   depends on LEDS_CLASS && I2C
+   select REGMAP_I2C
+   help
+ This option enables support for Texas Instruments TLC59108
+ and TLC59116 LED controllers.
+
 config LEDS_MAX8997
tristate "LED support for MAX8997 PMIC"
depends on LEDS_CLASS && MFD_MAX8997
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
index bf4609338e10..749dbe38ab27 100644
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_LEDS_LP8501) += leds-lp8501.o
 obj-$(CONFIG_LEDS_LP8788)  += leds-lp8788.o
 obj-$(CONFIG_LEDS_LP8860)  += leds-lp8860.o
 obj-$(CONFIG_LEDS_TCA6507) += leds-tca6507.o
+obj-$(CONFIG_LEDS_TLC591XX)+= leds-tlc591xx.o
 obj-$(CONFIG_LEDS_CLEVO_MAIL)  += leds-clevo-mail.o
 obj-$(CONFIG_LEDS_IPAQ_MICRO)  += leds-ipaq-micro.o
 obj-$(CONFIG_LEDS_HP6XX)   += leds-hp6xx.o
diff --git a/drivers/leds/leds-tlc591xx.c b/drivers/leds/leds-tlc591xx.c
new file mode 100644
index ..de16c29d7895
--- /dev/null
+++ b/drivers/leds/leds-tlc591xx.c
@@ -0,0 +1,300 @@
+/*
+ * Copyright 2014 Belkin Inc.
+ * Copyright 2015 Andrew Lunn 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define TLC591XX_MAX_LEDS  16
+
+#define TLC591XX_REG_MODE1 0x00
+#define MODE1_RESPON_ADDR_MASK 0xF0
+#define MODE1_NORMAL_MODE  (0 << 4)
+#define MODE1_SPEED_MODE   (1 << 4)
+
+#define TLC591XX_REG_MODE2 0x01
+#define MODE2_DIM  (0 << 5)
+#define MODE2_BLINK(1 << 5)
+#define MODE2_OCH_STOP (0 << 3)
+#define MODE2_OCH_ACK  (1 << 3)
+
+#define TLC591XX_REG_PWM(x)(0x02 + (x))
+
+#define TLC591XX_REG_GRPPWM0x12
+#define TLC591XX_REG_GRPFREQ   0x13
+
+/* LED Driver Output State, determine the source that drives LED outputs */
+#define LEDOUT_OFF 0x0 /* Output LOW */
+#define LEDOUT_ON  0x1 /* Output HI-Z */
+#define LEDOUT_DIM 0x2 /* Dimming */
+#define LEDOUT_BLINK   0x3 /* Blinking */
+#define LEDOUT_MASK0x3
+
+#define ldev_to_led(c) container_of(c, struct tlc591xx_led, ldev)
+#define work_to_led(work)  container_of(work, struct tlc591xx_led, work)
+
+struct tlc591xx_led {
+   bool active;
+   unsigned int led_no;
+   struct led_classdev ldev;
+   struct work_struct work;
+   struct tlc591xx_priv *priv;
+};
+
+struct tlc591xx_priv {
+   struct tlc591xx_led leds[TLC591XX_MAX_LEDS];
+   struct regmap *regmap;
+   unsigned int reg_ledout_offset;
+};
+
+struct tlc591xx {
+   unsigned int max_leds;
+   unsigned int reg_ledout_offset;
+};
+
+static const struct tlc591xx tlc59116 = {
+   .max_leds = 16,
+   .reg_ledout_offset = 0x14,
+};
+
+static const struct tlc591xx tlc59108 = {
+   .max_leds = 8,
+   .reg_ledout_offset = 0x0c,
+};
+
+static int
+tlc591xx_set_mode(struct regmap *regmap, u8 mode)
+{
+   int err;
+   u8 val;
+
+   err = regmap_write(regmap, TLC591XX_REG_MODE1, MODE1_NORMAL_MODE);
+   if (err)
+   return err;
+
+   val = MODE2_OCH_STOP | mode;
+
+   return regmap_write(regmap, TLC591XX_REG_MODE2, val);
+}
+
+static int
+tlc591xx_set_ledout(struct tlc591xx_priv *priv, struct tlc591xx_led *led,
+   u8 val)
+{
+   unsigned int i = (led->led_no % 4) * 2;
+   unsigned int mask = LEDOUT_MASK << i;
+   unsigned int addr = priv->reg_ledout_offset + (led->led_no >> 2);
+
+

[PATCH RESEND v6 0/2] Driver for TI tlc591xx 8/16 Channel i2c LED driver

[Andrew Lunn]

This patchset is a driver for the TI tlc59116 16 Channel i2c LED
driver and tlc59108 8 Channel i2c LED driver. This driver is used on
the Belkin WRT1900AC access point and the C code is derived from code
Belkin contributed to OpenWRT.  However it has been extensively
re-written, and a device tree binding added to replace platform data.

Cc: matthew.fathe...@belkin.com

Since v5:
  Hard code number of LEDs, rather than #define
  Moved common fields from led into priv
  Moved reg_ledout into priv, removed helper functions
  Cache brightness to avoid race conditions
  tlc591xx_led_set -> tlc591xx_set_brightness
  Be paranoid with of_match_device() and client->dev.of_node

Since v4:
  Fix Oops on module unload reported by Vignesh R

Since v3:
  Generalized and added support for tlc59108
  brightness == 0 and brightness == LED_FULL disable PWM and used
fixed OFF/ON mode

Since v2:
  Remove incorrect /* Mode register ? */ comment
  Parenthesis around the macro arguments
  Converted many signed variables into unsigned
  Saved an initialization


Since v1:
  s/uint8_t/u8/g
  Remove empty line
  Removed #gpio-cells
  Added select REGMAP_I2C
  Sorted #includes into alphabetic order
  Added missing MODULE_DEVICE_TABLE(of, ...)
  Check return value of regmap_write()
  Simplified tlc59116_set_mode()

Andrew Lunn (2):
  leds: tlc59116: Document binding for the TI 16 Channel i2c LED driver
  leds: tlc59116: Driver for the TI 16 Channel i2c LED driver

 .../devicetree/bindings/leds/leds-tlc59116.txt |  41 
 drivers/leds/Kconfig   |   7 +
 drivers/leds/Makefile  |   1 +
 drivers/leds/leds-tlc59116.c   | 253 +
 4 files changed, 302 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/leds/leds-tlc59116.txt
 create mode 100644 drivers/leds/leds-tlc59116.c

-- 
2.1.3
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH RESEND v6 1/2] leds: tlc591xx: Document binding for the TI 8/16 Channel i2c LED driver

[Andrew Lunn]

Document the binding for the TLC591xx LED driver.

Signed-off-by: Andrew Lunn 
Tested-by: Imre Kaloz 
Cc: matthew.fathe...@belkin.com
---
 .../devicetree/bindings/leds/leds-tlc591xx.txt | 40 ++
 1 file changed, 40 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/leds/leds-tlc591xx.txt

diff --git a/Documentation/devicetree/bindings/leds/leds-tlc591xx.txt 
b/Documentation/devicetree/bindings/leds/leds-tlc591xx.txt
new file mode 100644
index ..3bbbf7024411
--- /dev/null
+++ b/Documentation/devicetree/bindings/leds/leds-tlc591xx.txt
@@ -0,0 +1,40 @@
+LEDs connected to tlc59116 or tlc59108
+
+Required properties
+- compatible: should be "ti,tlc59116" or "ti,tlc59108"
+- #address-cells: must be 1
+- #size-cells: must be 0
+- reg: typically 0x68
+
+Each led is represented as a sub-node of the ti,tlc59116.
+See Documentation/devicetree/bindings/leds/common.txt
+
+LED sub-node properties:
+- reg: number of LED line, 0 to 15 or 0 to 7
+- label: (optional) name of LED
+- linux,default-trigger : (optional)
+
+Examples:
+
+tlc59116@68 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "ti,tlc59116";
+   reg = <0x68>;
+
+   wan@0 {
+   label = "wrt1900ac:amber:wan";
+   reg = <0x0>;
+   };
+
+   2g@2 {
+   label = "wrt1900ac:white:2g";
+   reg = <0x2>;
+   };
+
+   alive@9 {
+   label = "wrt1900ac:green:alive";
+   reg = <0x9>;
+   linux,default_trigger = "heartbeat";
+   };
+};
-- 
2.1.4

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 4/4] ARM: DT: msm8960: Add ADM device node

[Andy Gross]

This patch adds support for the ADM DMA on the MSM8960 SOC

Signed-off-by: Andy Gross 
---
 arch/arm/boot/dts/qcom-msm8960.dtsi |   21 +
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi 
b/arch/arm/boot/dts/qcom-msm8960.dtsi
index e1b0d5c..1b7c4c4 100644
--- a/arch/arm/boot/dts/qcom-msm8960.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8960.dtsi
@@ -4,6 +4,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 / {
@@ -238,5 +239,25 @@
vmmc-supply = <&vsdcc_fixed>;
};
};
+
+   adm_dma: dma@1832 {
+   compatible = "qcom,adm";
+   reg = <0x1832 0xE>;
+   interrupts = ;
+   #dma-cells = <1>;
+
+   clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
+   clock-names = "core", "iface";
+
+   resets = <&gcc ADM0_RESET>,
+<&gcc ADM0_PBUS_RESET>,
+<&gcc ADM0_C0_RESET>,
+<&gcc ADM0_C1_RESET>,
+<&gcc ADM0_C2_RESET>;
+   reset-names = "clk", "pbus", "c0", "c1", "c2";
+   qcom,ee = <1>;
+
+   status = "disabled";
+   };
};
 };
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 2/4] ARM: DT: apq8064: Add ADM device node

[Andy Gross]

This patch adds support for the ADM DMA on the APQ8064 SOC.

Signed-off-by: Andy Gross 
---
 arch/arm/boot/dts/qcom-apq8064.dtsi |   21 +
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi 
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index b3154c0..0f24334 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -2,6 +2,7 @@
 
 #include "skeleton.dtsi"
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -349,5 +350,25 @@
pinctrl-0 = <&sdc4_gpios>;
};
};
+
+   adm_dma: dma@1832 {
+   compatible = "qcom,adm";
+   reg = <0x1832 0xE>;
+   interrupts = ;
+   #dma-cells = <1>;
+
+   clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
+   clock-names = "core", "iface";
+
+   resets = <&gcc ADM0_RESET>,
+<&gcc ADM0_PBUS_RESET>,
+<&gcc ADM0_C0_RESET>,
+<&gcc ADM0_C1_RESET>,
+<&gcc ADM0_C2_RESET>;
+   reset-names = "clk", "pbus", "c0", "c1", "c2";
+   qcom,ee = <1>;
+
+   status = "disabled";
+   };
};
 };
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 3/4] ARM: DT: msm8660: Add ADM device nodes

[Andy Gross]

This patch adds support for the ADM DMA on the MSM8660 SOC

Signed-off-by: Andy Gross 
---
 arch/arm/boot/dts/qcom-msm8660.dtsi |   42 +++
 1 file changed, 42 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi 
b/arch/arm/boot/dts/qcom-msm8660.dtsi
index 0affd61..8043c12 100644
--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
@@ -4,7 +4,9 @@
 
 #include 
 #include 
+#include 
 #include 
+#include 
 
 / {
model = "Qualcomm MSM8660";
@@ -196,6 +198,46 @@
vmmc-supply = <&vsdcc_fixed>;
};
};
+
+   adm_dma0: dma@1832 {
+   compatible = "qcom,adm";
+   reg = <0x1832 0x10>;
+   interrupts = ;
+   #dma-cells = <1>;
+
+   clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
+   clock-names = "core", "iface";
+
+   resets = <&gcc ADM0_RESET>,
+<&gcc ADM0_PBUS_RESET>,
+<&gcc ADM0_C0_RESET>,
+<&gcc ADM0_C1_RESET>,
+<&gcc ADM0_C2_RESET>;
+   reset-names = "clk", "pbus", "c0", "c1", "c2";
+   qcom,ee = <1>;
+
+   status = "disabled";
+   };
+
+   adm_dma1: dma@1842 {
+   compatible = "qcom,adm";
+   reg = <0x1842 0xE>;
+   interrupts = ;
+   #dma-cells = <1>;
+
+   clocks = <&gcc ADM1_CLK>, <&gcc ADM1_PBUS_CLK>;
+   clock-names = "core", "iface";
+
+   resets = <&gcc ADM1_RESET>,
+<&gcc ADM1_PBUS_RESET>,
+<&gcc ADM1_C0_RESET>,
+<&gcc ADM1_C1_RESET>,
+<&gcc ADM1_C2_RESET>;
+   reset-names = "clk", "pbus", "c0", "c1", "c2";
+   qcom,ee = <1>;
+
+   status = "disabled";
+   };
};
 
 };
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 1/4] ARM: DT: ipq8064: Add ADM device node

[Andy Gross]

This patch adds support for the ADM DMA on the IPQ8064 SOC

Signed-off-by: Andy Gross 
---
 arch/arm/boot/dts/qcom-ipq8064-ap148.dts |4 
 arch/arm/boot/dts/qcom-ipq8064.dtsi  |   23 +++
 2 files changed, 27 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts 
b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
index 55b2910..7f9ea50 100644
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
@@ -62,6 +62,10 @@
 
cs-gpios = <&qcom_pinmux 20 0>;
 
+   dmas = <&adm_dma 6>,
+   <&adm_dma 5>;
+   dma-names = "rx", "tx";
+
flash: m25p80@0 {
compatible = "s25fl256s1";
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi 
b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index cb225da..4108ac4 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -2,7 +2,10 @@
 
 #include "skeleton.dtsi"
 #include 
+#include 
 #include 
+#include 
+
 
 / {
model = "Qualcomm IPQ8064";
@@ -279,5 +282,25 @@
#clock-cells = <1>;
#reset-cells = <1>;
};
+
+   adm_dma: dma@1830 {
+   compatible = "qcom,adm";
+   reg = <0x1830 0x10>;
+   interrupts = ;
+   #dma-cells = <1>;
+
+   clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
+   clock-names = "core", "iface";
+
+   resets = <&gcc ADM0_RESET>,
+<&gcc ADM0_PBUS_RESET>,
+<&gcc ADM0_C0_RESET>,
+<&gcc ADM0_C1_RESET>,
+<&gcc ADM0_C2_RESET>;
+   reset-names = "clk", "pbus", "c0", "c1", "c2";
+   qcom,ee = <0>;
+
+   status = "disabled";
+   };
};
 };
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 0/4] Add Qualcomm ADM DMA support

[Andy Gross]

This patch set adds support for the Qualcomm ADM DMA controller that is present
in the APQ8064, IPQ8064, MSM8660, and MSM8960.

Andy Gross (4):
  ARM: DT: ipq8064: Add ADM device node
  ARM: DT: apq8064: Add ADM device node
  ARM: DT: msm8660: Add ADM device nodes
  ARM: DT: msm8960: Add ADM device node

 arch/arm/boot/dts/qcom-apq8064.dtsi  |   21 +++
 arch/arm/boot/dts/qcom-ipq8064-ap148.dts |4 +++
 arch/arm/boot/dts/qcom-ipq8064.dtsi  |   23 
 arch/arm/boot/dts/qcom-msm8660.dtsi  |   42 ++
 arch/arm/boot/dts/qcom-msm8960.dtsi  |   21 +++
 5 files changed, 111 insertions(+)

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v7] media: i2c: add support for omnivision's ov2659 sensor

[Lad Prabhakar]

From: Benoit Parrot 

this patch adds support for omnivision's ov2659
sensor, the driver supports following features:
1: Asynchronous probing
2: DT support
3: Media controller support

Signed-off-by: Benoit Parrot 
Signed-off-by: Lad, Prabhakar 
Acked-by: Sakari Ailus 
---
 Changes for v7:
 --
 a: Changed to proper colorspace.
 b: fix V4L2_CID_PIXEL_RATE control.

 v6: https://patchwork.kernel.org/patch/6012751/
 v5: https://patchwork.kernel.org/patch/6000161/
 v4: https://patchwork.kernel.org/patch/5961661/
 v3: https://patchwork.kernel.org/patch/5959401/
 v2: https://patchwork.kernel.org/patch/5859801/
 v1: https://patchwork.linuxtv.org/patch/27919/
 
 .../devicetree/bindings/media/i2c/ov2659.txt   |   38 +
 MAINTAINERS|   10 +
 drivers/media/i2c/Kconfig  |   11 +
 drivers/media/i2c/Makefile |1 +
 drivers/media/i2c/ov2659.c | 1534 
 include/media/ov2659.h |   33 +
 6 files changed, 1627 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/i2c/ov2659.txt
 create mode 100644 drivers/media/i2c/ov2659.c
 create mode 100644 include/media/ov2659.h

diff --git a/Documentation/devicetree/bindings/media/i2c/ov2659.txt 
b/Documentation/devicetree/bindings/media/i2c/ov2659.txt
new file mode 100644
index 000..cabc7d8
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/ov2659.txt
@@ -0,0 +1,38 @@
+* OV2659 1/5-Inch 2Mp SOC Camera
+
+The Omnivision OV2659 is a 1/5-inch SOC camera, with an active array size of
+1632H x 1212V. It is programmable through a SCCB. The OV2659 sensor supports
+multiple resolutions output, such as UXGA, SVGA, 720p. It also can support
+YUV422, RGB565/555 or raw RGB output formats.
+
+Required Properties:
+- compatible: Must be "ovti,ov2659"
+- reg: I2C slave address
+- clocks: reference to the xvclk input clock.
+- clock-names: should be "xvclk".
+- link-frequencies: target pixel clock frequency.
+
+For further reading on port node refer to
+Documentation/devicetree/bindings/media/video-interfaces.txt.
+
+Example:
+
+   i2c0@1c22000 {
+   ...
+   ...
+ov2659@30 {
+   compatible = "ovti,ov2659";
+   reg = <0x30>;
+
+   clocks = <&clk_ov2659 0>;
+   clock-names = "xvclk";
+
+   port {
+   ov2659_0: endpoint {
+   remote-endpoint = <&vpfe_ep>;
+   link-frequencies = /bits/ 64 <7000>;
+   };
+   };
+   };
+   ...
+   };
diff --git a/MAINTAINERS b/MAINTAINERS
index ddc5a8c..4006cc8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8910,6 +8910,16 @@ T:   git 
git://linuxtv.org/mhadli/v4l-dvb-davinci_devices.git
 S: Maintained
 F: drivers/media/platform/am437x/
 
+OV2659 OMNIVISION SENSOR DRIVER
+M: Lad, Prabhakar 
+L: linux-me...@vger.kernel.org
+W: http://linuxtv.org/
+Q: http://patchwork.linuxtv.org/project/linux-media/list/
+T: git git://linuxtv.org/mhadli/v4l-dvb-davinci_devices.git
+S: Maintained
+F: drivers/media/i2c/ov2659.c
+F: include/media/ov2659.h
+
 SIS 190 ETHERNET DRIVER
 M: Francois Romieu 
 L: net...@vger.kernel.org
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index da58c9b..6f30ea7 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -466,6 +466,17 @@ config VIDEO_APTINA_PLL
 config VIDEO_SMIAPP_PLL
tristate
 
+config VIDEO_OV2659
+   tristate "OmniVision OV2659 sensor support"
+   depends on VIDEO_V4L2 && I2C
+   depends on MEDIA_CAMERA_SUPPORT
+   ---help---
+ This is a Video4Linux2 sensor-level driver for the OmniVision
+ OV2659 camera.
+
+ To compile this driver as a module, choose M here: the
+ module will be called ov2659.
+
 config VIDEO_OV7640
tristate "OmniVision OV7640 sensor support"
depends on I2C && VIDEO_V4L2
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index 98589001..f165fae 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -77,3 +77,4 @@ obj-$(CONFIG_VIDEO_SMIAPP_PLL)+= smiapp-pll.o
 obj-$(CONFIG_VIDEO_AK881X) += ak881x.o
 obj-$(CONFIG_VIDEO_IR_I2C)  += ir-kbd-i2c.o
 obj-$(CONFIG_VIDEO_ML86V7667)  += ml86v7667.o
+obj-$(CONFIG_VIDEO_OV2659) += ov2659.o
diff --git a/drivers/media/i2c/ov2659.c b/drivers/media/i2c/ov2659.c
new file mode 100644
index 000..b0626d7
--- /dev/null
+++ b/drivers/media/i2c/ov2659.c
@@ -0,0 +1,1534 @@
+/*
+ * Omnivision OV2659 CMOS Image Sensor driver
+ *
+ * Copyright (C) 2015 Texas Instruments, Inc.
+ *
+ * Benoit Parrot 
+ * Lad, Prabhakar 
+ *
+ * This program is free so

Re: [PATCH 2/2] add newhaven lcd tty driver on i2c

[atull]

On Tue, 17 Mar 2015, Greg Kroah-Hartman wrote:

> On Tue, Mar 17, 2015 at 03:36:47PM -0500, Alan Tull wrote:
> > Supports the Newhaven NHD‐0216K3Z‐NSW‐BBW 2x16 LCD module as i2c slave.
> > Devices will show up as /dev/ttyLCD0, etc.
> > 
> >  * Backspace is supported to the beginning of the current line.
> > * i.e. printf '\b' > /dev/ttyLCD0
> > 
> >  * ESC [ 2 J
> > * erase whole display and reset cursor to home.
> > * i.e. printf '\e[2J' > /dev/ttyLCD0
> > 
> >  * ESC [ 2 K
> > * erase current line and set cursor to beginning of line.
> > * i.e. printf '\e[2K' > /dev/ttyLCD0
> > 
> >  * CR and LF are supported.
> > 
> >  * Vertical scroll when cursor is on bottom line and receive end of line.
> > 
> > Default brightness can be set from the device tree/plat data.
> > 
> > Brightness can be set from a sysfs file, for example:
> >  * echo 6 > /sys/devices/soc.0/ffc04000.i2c/i2c-0/0-0028/brightness
> > 
> > Signed-off-by: Alan Tull 
> 
> This should use the new fb_tft api instead of trying to look like a tty
> device.  That framework is merged in the staging-next branch of the
> staging.git kernel tree and will show up in 4.1-rc1.  Please port this
> driver to that api and submit a patch for me to take for the staging
> tree so that we don't have one-off devices like this.

Cool! Will do.

Thanks!
Alan

> 
> thanks,
> 
> greg k-h
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at  http://www.tux.org/lkml/
> 

Re: [PATCH 2/2] add newhaven lcd tty driver on i2c

[Greg Kroah-Hartman]

On Tue, Mar 17, 2015 at 03:36:47PM -0500, Alan Tull wrote:
> Supports the Newhaven NHD‐0216K3Z‐NSW‐BBW 2x16 LCD module as i2c slave.
> Devices will show up as /dev/ttyLCD0, etc.
> 
>  * Backspace is supported to the beginning of the current line.
> * i.e. printf '\b' > /dev/ttyLCD0
> 
>  * ESC [ 2 J
> * erase whole display and reset cursor to home.
> * i.e. printf '\e[2J' > /dev/ttyLCD0
> 
>  * ESC [ 2 K
> * erase current line and set cursor to beginning of line.
> * i.e. printf '\e[2K' > /dev/ttyLCD0
> 
>  * CR and LF are supported.
> 
>  * Vertical scroll when cursor is on bottom line and receive end of line.
> 
> Default brightness can be set from the device tree/plat data.
> 
> Brightness can be set from a sysfs file, for example:
>  * echo 6 > /sys/devices/soc.0/ffc04000.i2c/i2c-0/0-0028/brightness
> 
> Signed-off-by: Alan Tull 

This should use the new fb_tft api instead of trying to look like a tty
device.  That framework is merged in the staging-next branch of the
staging.git kernel tree and will show up in 4.1-rc1.  Please port this
driver to that api and submit a patch for me to take for the staging
tree so that we don't have one-off devices like this.

thanks,

greg k-h
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 1/2] of: handle both '/' and ':' in path strings

[Leif Lindholm]

On Tue, Mar 17, 2015 at 12:30:31PM -0700, Brian Norris wrote:
> Commit 106937e8ccdc ("of: fix handling of '/' in options for
> of_find_node_by_path()") caused a regression in OF handling of
> stdout-path. While it fixes some cases which have '/' after the ':', it
> breaks cases where there is more than one '/' *before* the ':'.
> 
> For example, it breaks this boot string
> 
>   stdout-path = "/rdb/serial@f040ab00:115200";
> 
> So rather than doing sequentialized checks (first for '/', then for ':';
> or vice versa), to get the correct behavior we need to check for the
> first occurrence of either one of them.
> 
> It so happens that the handy strcspn() helper can do just that.
> 
> Fixes: 106937e8ccdc ("of: fix handling of '/' in options for 
> of_find_node_by_path()")
> Signed-off-by: Brian Norris 
> Cc: sta...@vger.kernel.org
> ---
> This is for -stable only because the regression is marked for stable. Not sure
> the first one deserves to go to -stable, actually...
> 
>  drivers/of/base.c | 7 +--
>  1 file changed, 1 insertion(+), 6 deletions(-)
> 
> diff --git a/drivers/of/base.c b/drivers/of/base.c
> index adb8764861c0..966d6fdcf427 100644
> --- a/drivers/of/base.c
> +++ b/drivers/of/base.c
> @@ -715,13 +715,8 @@ static struct device_node *__of_find_node_by_path(struct 
> device_node *parent,
>  {
>   struct device_node *child;
>   int len;
> - const char *end;
>  
> - end = strchr(path, ':');
> - if (!end)
> - end = strchrnul(path, '/');
> -
> - len = end - path;
> + len = strcspn(path, "/:");
>   if (!len)
>   return NULL;
>  
> -- 
> 1.9.1

Yeah, that's neater that the fix I sent out earlier today.

Acked-by: Leif Lindholm 
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 2/2] of: unittest: Add option string test case with longer path

[Leif Lindholm]

On Tue, Mar 17, 2015 at 12:30:32PM -0700, Brian Norris wrote:
> There were regressions seen with commit 106937e8ccdc ("of: fix handling
> of '/' in options for of_find_node_by_path()"), where we couldn't handle
> extra '/' before the ':'. Let's test for this now.
> 
> Confirmed that this test fails without the previous patch and passes
> when patched. All other tests pass.
> 
> Signed-off-by: Brian Norris 
> ---
>  drivers/of/unittest.c | 5 +
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c
> index aba8946cac46..52c45c7df07f 100644
> --- a/drivers/of/unittest.c
> +++ b/drivers/of/unittest.c
> @@ -97,6 +97,11 @@ static void __init of_selftest_find_node_by_name(void)
>"option path test, subcase #1 failed\n");
>   of_node_put(np);
>  
> + np = 
> of_find_node_opts_by_path("/testcase-data/testcase-device1:test/option", 
> &options);
> + selftest(np && !strcmp("test/option", options),
> +  "option path test, subcase #2 failed\n");
> + of_node_put(np);
> +
>   np = of_find_node_opts_by_path("/testcase-data:testoption", NULL);
>   selftest(np, "NULL option path test failed\n");
>   of_node_put(np);
> -- 
> 1.9.1

Acked-by: Leif Lindholm 
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 2/2] add newhaven lcd tty driver on i2c

[Alan Tull]

Supports the Newhaven NHD‐0216K3Z‐NSW‐BBW 2x16 LCD module as i2c slave.
Devices will show up as /dev/ttyLCD0, etc.

 * Backspace is supported to the beginning of the current line.
* i.e. printf '\b' > /dev/ttyLCD0

 * ESC [ 2 J
* erase whole display and reset cursor to home.
* i.e. printf '\e[2J' > /dev/ttyLCD0

 * ESC [ 2 K
* erase current line and set cursor to beginning of line.
* i.e. printf '\e[2K' > /dev/ttyLCD0

 * CR and LF are supported.

 * Vertical scroll when cursor is on bottom line and receive end of line.

Default brightness can be set from the device tree/plat data.

Brightness can be set from a sysfs file, for example:
 * echo 6 > /sys/devices/soc.0/ffc04000.i2c/i2c-0/0-0028/brightness

Signed-off-by: Alan Tull 
---
 drivers/tty/Kconfig|5 +
 drivers/tty/Makefile   |1 +
 drivers/tty/newhaven_lcd.c |  733 
 include/linux/platform_data/newhaven_lcd.h |   25 +
 4 files changed, 764 insertions(+)
 create mode 100644 drivers/tty/newhaven_lcd.c
 create mode 100644 include/linux/platform_data/newhaven_lcd.h

diff --git a/drivers/tty/Kconfig b/drivers/tty/Kconfig
index b24aa01..c392405 100644
--- a/drivers/tty/Kconfig
+++ b/drivers/tty/Kconfig
@@ -419,4 +419,9 @@ config DA_CONSOLE
help
  This enables a console on a Dash channel.
 
+config NEWHAVEN_LCD
+   tristate "NEWHAVEN LCD"
+   help
+ Add support for a TTY device on a Newhaven I2C LCD device.
+
 endif # TTY
diff --git a/drivers/tty/Makefile b/drivers/tty/Makefile
index 58ad1c0..f6a3d56 100644
--- a/drivers/tty/Makefile
+++ b/drivers/tty/Makefile
@@ -29,5 +29,6 @@ obj-$(CONFIG_SYNCLINK)+= synclink.o
 obj-$(CONFIG_PPC_EPAPR_HV_BYTECHAN) += ehv_bytechan.o
 obj-$(CONFIG_GOLDFISH_TTY) += goldfish.o
 obj-$(CONFIG_DA_TTY)   += metag_da.o
+obj-$(CONFIG_NEWHAVEN_LCD) += newhaven_lcd.o
 
 obj-y += ipwireless/
diff --git a/drivers/tty/newhaven_lcd.c b/drivers/tty/newhaven_lcd.c
new file mode 100644
index 000..d79ee47
--- /dev/null
+++ b/drivers/tty/newhaven_lcd.c
@@ -0,0 +1,733 @@
+/*
+ * TTY on a LCD connected to I2C
+ * Supports Newhaven NHD-0216K3Z-NSW-BBW Serial LCD Module
+ *
+ * Copyright (C) 2013-2015 Altera Corporation.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see .
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DRV_NAME "lcd-comm"
+#define DEV_NAME "ttyLCD"
+#define MAX_NEWHAVEN_LCD_COUNT 256
+
+#define LCD_COMMAND 0xfe
+#define LCD_DISPLAY_ON  0x41
+#define LCD_DISPLAY_OFF 0x42
+#define LCD_SET_CURSOR  0x45
+#define LCD_BACKSPACE   0x4e
+#define LCD_CLEAR_SCREEN0x51
+#define LCD_BRIGHTNESS  0x53
+#define LCD_CUSTOM_CHAR 0x54
+#define LCD_BYTES_PER_FONT  8
+#define LCD_BYTES_PER_FONT_CMD  (LCD_BYTES_PER_FONT + 3)
+
+#define LCD_BRIGHTNESS_MIN 1
+#define LCD_BRIGHTNESS_MAX 8
+
+#define ASCII_BS0x08
+#define ASCII_LF0x0a
+#define ASCII_CR0x0d
+#define ASCII_ESC   0x1b
+#define ASCII_SPACE 0x20
+#define ASCII_BACKSLASH 0x5c
+#define ASCII_TILDE 0x7e
+
+/* Valid displayable character in LCD panel's font table */
+#define valid_font(x) (0x20 <= (x) && (x) <= 0x7f)
+
+/*
+ * The display module displays a right arrow instead of tilde for
+ * ascii 0x7e. Also, it displays a Japanese character instead of a
+ * backslash character for ascii 0x5c. Work around these by loading
+ * custom characters into the display module's cg ram.
+ */
+struct custom_font {
+   char font[LCD_BYTES_PER_FONT];
+   char ascii;
+};
+
+#define CUSTOM_BACKSLASH0x00
+#define CUSTOM_TILDE0x01
+
+struct custom_font custom_fonts[] = {
+   [CUSTOM_BACKSLASH] = {
+   { 0x00, 0x10, 0x08, 0x04, 0x02, 0x01, 0x00, 0x00, },
+   ASCII_BACKSLASH,
+   },
+   [CUSTOM_TILDE] = {
+   { 0x00, 0x00, 0x00, 0x08, 0x15, 0x02, 0x00, 0x00, },
+   ASCII_TILDE,
+   },
+};
+
+struct lcd {
+   struct device *dev;
+   struct i2c_client *client;
+   struct tty_port port;
+   unsigned int width;
+   unsigned int height;
+   unsigned int brightness;
+   char *buffer;
+   unsigned int top_li

[PATCH 1/2] newhaven lcd: device tree bindings documentation

[Alan Tull]

Add documention for the newhaven lcd device tree bindings.

Signed-off-by: Alan Tull 
---
 .../devicetree/bindings/tty/newhaven_lcd.txt   |   21 
 1 file changed, 21 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/tty/newhaven_lcd.txt

diff --git a/Documentation/devicetree/bindings/tty/newhaven_lcd.txt 
b/Documentation/devicetree/bindings/tty/newhaven_lcd.txt
new file mode 100644
index 000..14b48fc
--- /dev/null
+++ b/Documentation/devicetree/bindings/tty/newhaven_lcd.txt
@@ -0,0 +1,21 @@
+* TTY on a Newhaven NHD‐0216K3Z‐NSW‐BBW LCD connected to I2C
+
+Required properties:
+- compatible: Should be "newhaven,nhd-0216k3z-nsw-bbw"
+- reg: i2c address
+- height: should be 2 lines
+- width: should be 16 characters
+- brightness: backlight brightness. Range is 1 to 8, where
+  1=OFF and 8=maximum brightness.
+
+Example:
+
+&i2c0 {
+   lcd: lcd@28 {
+   compatible = "newhaven,nhd-0216k3z-nsw-bbw";
+   reg = <0x28>;
+   height = <2>;
+   width = <16>;
+   brightness = <8>;
+   };
+
-- 
1.7.9.5

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH] Revert "of: Fix premature bootconsole disable with 'stdout-path'"

[Peter Hurley]

This reverts commit 2fa645cb2703d9b3786d850db815414dfeefa51d.

The assumption that at least 1 preferred console will be registered
when the stdout-path property is set is invalid, which can result
in _no_ consoles.

Signed-off-by: Peter Hurley 
---
 drivers/of/base.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index adb8764..8b904e5 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -1893,10 +1893,8 @@ void of_alias_scan(void * (*dt_alloc)(u64 size, u64 
align))
name = of_get_property(of_chosen, "linux,stdout-path", 
NULL);
if (IS_ENABLED(CONFIG_PPC) && !name)
name = of_get_property(of_aliases, "stdout", NULL);
-   if (name) {
+   if (name)
of_stdout = of_find_node_opts_by_path(name, 
&of_stdout_options);
-   add_preferred_console("stdout-path", 0, NULL);
-   }
}
 
if (!of_aliases)
-- 
2.3.3

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 0/5] of: overlay: Assorted fixes

[Rob Herring]

On Tue, Mar 17, 2015 at 3:30 PM, Pantelis Antoniou
 wrote:
> The first patch makes sure that no overlays are being left over from
> the unit tests.
>
> The second puts the overlays as objects in the sysfs in
> /sys/firmware/devicetree/overlays while the next one adds a master
> overlay enable switch (that once is set to disabled can't be re-enabled)
>
> The next updates the ABI docs and the final one adds me as the
> maintainer for device tree overlays.

You call this fixes, but it looks like new functionality to me. So
this looks like 4.1 material.

Rob

>
> Pantelis Antoniou (5):
>   of: unittest: overlay: Keep track of created overlays
>   of: overlay: kobjectify overlay objects
>   of: overlay: Master enable switch
>   Documentation: ABI: /sys/firmware/devicetree/overlays
>   MAINTAINERS: Pantelis Antoniou device tree overlay maintainer
>
>  .../ABI/testing/sysfs-firmware-devicetree-overlays |   9 ++
>  MAINTAINERS|   9 ++
>  drivers/of/base.c  |   5 +
>  drivers/of/of_private.h|   9 ++
>  drivers/of/overlay.c   | 116 
> -
>  drivers/of/unittest.c  |  62 +++
>  6 files changed, 208 insertions(+), 2 deletions(-)
>  create mode 100644 
> Documentation/ABI/testing/sysfs-firmware-devicetree-overlays
>
> --
> 1.7.12
>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 0/5] of: overlay: Assorted fixes

[Pantelis Antoniou]

> On Mar 17, 2015, at 22:37 , Rob Herring  wrote:
> 
> On Tue, Mar 17, 2015 at 3:30 PM, Pantelis Antoniou
>  wrote:
>> The first patch makes sure that no overlays are being left over from
>> the unit tests.
>> 
>> The second puts the overlays as objects in the sysfs in
>> /sys/firmware/devicetree/overlays while the next one adds a master
>> overlay enable switch (that once is set to disabled can't be re-enabled)
>> 
>> The next updates the ABI docs and the final one adds me as the
>> maintainer for device tree overlays.
> 
> You call this fixes, but it looks like new functionality to me. So
> this looks like 4.1 material.
> 

Yep, they are not 4.0 material. They are not major functional changes though.

> Rob
> 

Regards

— Pantelis

>> 
>> Pantelis Antoniou (5):
>>  of: unittest: overlay: Keep track of created overlays
>>  of: overlay: kobjectify overlay objects
>>  of: overlay: Master enable switch
>>  Documentation: ABI: /sys/firmware/devicetree/overlays
>>  MAINTAINERS: Pantelis Antoniou device tree overlay maintainer
>> 
>> .../ABI/testing/sysfs-firmware-devicetree-overlays |   9 ++
>> MAINTAINERS|   9 ++
>> drivers/of/base.c  |   5 +
>> drivers/of/of_private.h|   9 ++
>> drivers/of/overlay.c   | 116 
>> -
>> drivers/of/unittest.c  |  62 +++
>> 6 files changed, 208 insertions(+), 2 deletions(-)
>> create mode 100644 
>> Documentation/ABI/testing/sysfs-firmware-devicetree-overlays
>> 
>> --
>> 1.7.12
>> 

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 0/2] TTY Driver for Newhaven LCD module

[Alan Tull]

Supports a 2 line by 16 character LCD module over I2C.

Alan Tull (2):
  newhaven lcd: device tree bindings documentation
  add newhaven lcd tty driver on i2c

 .../devicetree/bindings/tty/newhaven_lcd.txt   |   21 +
 drivers/tty/Kconfig|5 +
 drivers/tty/Makefile   |1 +
 drivers/tty/newhaven_lcd.c |  733 
 include/linux/platform_data/newhaven_lcd.h |   25 +
 5 files changed, 785 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/tty/newhaven_lcd.txt
 create mode 100644 drivers/tty/newhaven_lcd.c
 create mode 100644 include/linux/platform_data/newhaven_lcd.h

-- 
1.7.9.5

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 4/5] Documentation: ABI: /sys/firmware/devicetree/overlays

[Pantelis Antoniou]

Documentation ABI entry for overlays sysfs entries.

Signed-off-by: Pantelis Antoniou 
---
 Documentation/ABI/testing/sysfs-firmware-devicetree-overlays | 9 +
 1 file changed, 9 insertions(+)
 create mode 100644 Documentation/ABI/testing/sysfs-firmware-devicetree-overlays

diff --git a/Documentation/ABI/testing/sysfs-firmware-devicetree-overlays 
b/Documentation/ABI/testing/sysfs-firmware-devicetree-overlays
new file mode 100644
index 000..5a07499
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-firmware-devicetree-overlays
@@ -0,0 +1,9 @@
+What:  /sys/firmware/devicetree/overlays/
+Date:  March 2015
+Contact:   Pantelis Antoniou 
+Description:
+   This directory contains the applied device tree overlays of
+   the running system, as directories of the overlay id.
+
+   enable: The master enable switch, by default is 1, and when
+   set to 0 it cannot be re-enabled for security reasons.
-- 
1.7.12

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 3/5] of: overlay: Master enable switch

[Pantelis Antoniou]

Implement a throw once master enable switch to protect against any
further overlay applications if the administrator desires so.

Signed-off-by: Pantelis Antoniou 
---
 drivers/of/overlay.c | 66 +++-
 1 file changed, 65 insertions(+), 1 deletion(-)

diff --git a/drivers/of/overlay.c b/drivers/of/overlay.c
index f17f5ef..6688797 100644
--- a/drivers/of/overlay.c
+++ b/drivers/of/overlay.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "of_private.h"
 
@@ -55,6 +56,9 @@ struct of_overlay {
struct kobject kobj;
 };
 
+/* master enable switch; once set to 0 can't be re-enabled */
+static atomic_t ov_enable = ATOMIC_INIT(1);
+
 static int of_overlay_apply_one(struct of_overlay *ov,
struct device_node *target, const struct device_node *overlay);
 
@@ -345,6 +349,60 @@ static struct kobj_type of_overlay_ktype = {
 
 static struct kset *ov_kset;
 
+static ssize_t enable_read(struct file *filp, struct kobject *kobj,
+   struct bin_attribute *bin_attr, char *buf,
+   loff_t offset, size_t count)
+{
+   char tbuf[3];
+
+   if (offset < 0)
+   return -EINVAL;
+
+   if (offset >= sizeof(tbuf))
+   return 0;
+
+   if (count > sizeof(tbuf) - offset)
+   count = sizeof(tbuf) - offset;
+
+   /* fill in temp */
+   tbuf[0] = '0' + atomic_read(&ov_enable);
+   tbuf[1] = '\n';
+   tbuf[2] = '\0';
+
+   /* copy to buffer */
+   memcpy(buf, tbuf + offset, count);
+
+   return count;
+}
+
+static ssize_t enable_write(struct file *filp, struct kobject *kobj,
+   struct bin_attribute *bin_attr, char *buf,
+   loff_t off, size_t count)
+{
+   int new_enable;
+
+   if (off != 0 || (buf[0] != '0' && buf[1] != '1'))
+   return -EINVAL;
+
+   new_enable = buf[0] - '0';
+   if (new_enable != 0 && new_enable != 1)
+   return -EINVAL;
+
+   /* NOP for same value */
+   if (new_enable == atomic_read(&ov_enable))
+   return count;
+
+   /* if we've disabled it, no going back */
+   if (atomic_read(&ov_enable) == 0)
+   return -EPERM;
+
+   atomic_set(&ov_enable, new_enable);
+   return count;
+}
+
+/* just a single char + '\n' + '\0' */
+static BIN_ATTR_RW(enable, 3);
+
 /**
  * of_overlay_create() - Create and apply an overlay
  * @tree:  Device node containing all the overlays
@@ -360,6 +418,10 @@ int of_overlay_create(struct device_node *tree)
struct of_overlay *ov;
int err, id;
 
+   /* administratively disabled */
+   if (!atomic_read(&ov_enable))
+   return -EPERM;
+
/* allocate the overlay structure */
ov = kzalloc(sizeof(*ov), GFP_KERNEL);
if (ov == NULL)
@@ -596,5 +658,7 @@ int of_overlay_init(void)
if (!ov_kset)
return -ENOMEM;
 
-   return 0;
+   rc = sysfs_create_bin_file(&ov_kset->kobj, &bin_attr_enable);
+   WARN(rc, "%s: error adding enable attribute\n", __func__);
+   return rc;
 }
-- 
1.7.12

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 2/5] of: overlay: kobjectify overlay objects

[Pantelis Antoniou]

We are going to need the overlays to appear on sysfs with runtime
global properties (like master enable) so turn them into kobjects.

Signed-off-by: Pantelis Antoniou 
---
 drivers/of/base.c   |  5 +
 drivers/of/of_private.h |  9 +
 drivers/of/overlay.c| 52 +++--
 3 files changed, 64 insertions(+), 2 deletions(-)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index adb8764..9b4d6f9 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -192,6 +192,7 @@ int __of_attach_node_sysfs(struct device_node *np)
 static int __init of_init(void)
 {
struct device_node *np;
+   int ret;
 
/* Create the kset, and register existing nodes */
mutex_lock(&of_mutex);
@@ -208,6 +209,10 @@ static int __init of_init(void)
if (of_root)
proc_symlink("device-tree", NULL, 
"/sys/firmware/devicetree/base");
 
+   ret = of_overlay_init();
+   if (ret != 0)
+   pr_warn("of_init: of_overlay_init failed!\n");
+
return 0;
 }
 core_initcall(of_init);
diff --git a/drivers/of/of_private.h b/drivers/of/of_private.h
index 8e882e7..120eb44 100644
--- a/drivers/of/of_private.h
+++ b/drivers/of/of_private.h
@@ -90,4 +90,13 @@ extern void __of_detach_node_sysfs(struct device_node *np);
 #define for_each_transaction_entry_reverse(_oft, _te) \
list_for_each_entry_reverse(_te, &(_oft)->te_list, node)
 
+#if defined(CONFIG_OF_OVERLAY)
+extern int of_overlay_init(void);
+#else
+static inline int of_overlay_init(void)
+{
+   return 0;
+}
+#endif
+
 #endif /* _LINUX_OF_PRIVATE_H */
diff --git a/drivers/of/overlay.c b/drivers/of/overlay.c
index dee9270..f17f5ef 100644
--- a/drivers/of/overlay.c
+++ b/drivers/of/overlay.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "of_private.h"
 
@@ -51,6 +52,7 @@ struct of_overlay {
int count;
struct of_overlay_info *ovinfo_tab;
struct of_changeset cset;
+   struct kobject kobj;
 };
 
 static int of_overlay_apply_one(struct of_overlay *ov,
@@ -325,6 +327,24 @@ static int of_free_overlay_info(struct of_overlay *ov)
 static LIST_HEAD(ov_list);
 static DEFINE_IDR(ov_idr);
 
+static inline struct of_overlay *kobj_to_overlay(struct kobject *kobj)
+{
+   return container_of(kobj, struct of_overlay, kobj);
+}
+
+void of_overlay_release(struct kobject *kobj)
+{
+   struct of_overlay *ov = kobj_to_overlay(kobj);
+
+   kfree(ov);
+}
+
+static struct kobj_type of_overlay_ktype = {
+   .release = of_overlay_release,
+};
+
+static struct kset *ov_kset;
+
 /**
  * of_overlay_create() - Create and apply an overlay
  * @tree:  Device node containing all the overlays
@@ -350,6 +370,9 @@ int of_overlay_create(struct device_node *tree)
 
of_changeset_init(&ov->cset);
 
+   /* initialize kobject */
+   kobject_init(&ov->kobj, &of_overlay_ktype);
+
mutex_lock(&of_mutex);
 
id = idr_alloc(&ov_idr, ov, 0, 0, GFP_KERNEL);
@@ -385,6 +408,14 @@ int of_overlay_create(struct device_node *tree)
goto err_revert_overlay;
}
 
+   ov->kobj.kset = ov_kset;
+   err = kobject_add(&ov->kobj, NULL, "%d", id);
+   if (err != 0) {
+   pr_err("%s: kobject_add() failed for tree@%s\n",
+   __func__, tree->full_name);
+   goto err_cancel_overlay;
+   }
+
/* add to the tail of the overlay list */
list_add_tail(&ov->node, &ov_list);
 
@@ -392,6 +423,8 @@ int of_overlay_create(struct device_node *tree)
 
return id;
 
+err_cancel_overlay:
+   of_changeset_revert(&ov->cset);
 err_revert_overlay:
 err_abort_trans:
of_free_overlay_info(ov);
@@ -512,7 +545,9 @@ int of_overlay_destroy(int id)
of_free_overlay_info(ov);
idr_remove(&ov_idr, id);
of_changeset_destroy(&ov->cset);
-   kfree(ov);
+
+   kobject_del(&ov->kobj);
+   kobject_put(&ov->kobj);
 
err = 0;
 
@@ -542,7 +577,8 @@ int of_overlay_destroy_all(void)
of_changeset_revert(&ov->cset);
of_free_overlay_info(ov);
idr_remove(&ov_idr, ov->id);
-   kfree(ov);
+   kobject_del(&ov->kobj);
+   kobject_put(&ov->kobj);
}
 
mutex_unlock(&of_mutex);
@@ -550,3 +586,15 @@ int of_overlay_destroy_all(void)
return 0;
 }
 EXPORT_SYMBOL_GPL(of_overlay_destroy_all);
+
+/* called from of_init() */
+int of_overlay_init(void)
+{
+   int rc;
+
+   ov_kset = kset_create_and_add("overlays", NULL, &of_kset->kobj);
+   if (!ov_kset)
+   return -ENOMEM;
+
+   return 0;
+}
-- 
1.7.12

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 5/5] MAINTAINERS: Pantelis Antoniou device tree overlay maintainer

[Pantelis Antoniou]

Add me as the device tree overlays maintainer.

Signed-off-by: Pantelis Antoniou 
---
 MAINTAINERS | 9 +
 1 file changed, 9 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 0e1abe8..24aa339 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7187,6 +7187,15 @@ F:   Documentation/devicetree/
 F: arch/*/boot/dts/
 F: include/dt-bindings/
 
+OPEN FIRMWARE AND DEVICE TREE OVERLAYS
+M: Pantelis Antoniou 
+L: devicetree@vger.kernel.org
+S: Maintained
+F: Documentation/devicetree/dynamic-resolution-notes.txt
+F: Documentation/devicetree/overlay-notes.txt
+F: drivers/of/overlay.c
+F: drivers/of/resolver.c
+
 OPENRISC ARCHITECTURE
 M: Jonas Bonn 
 W: http://openrisc.net
-- 
1.7.12

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 0/5] of: overlay: Assorted fixes

[Pantelis Antoniou]

The first patch makes sure that no overlays are being left over from
the unit tests.

The second puts the overlays as objects in the sysfs in
/sys/firmware/devicetree/overlays while the next one adds a master
overlay enable switch (that once is set to disabled can't be re-enabled)

The next updates the ABI docs and the final one adds me as the
maintainer for device tree overlays.

Pantelis Antoniou (5):
  of: unittest: overlay: Keep track of created overlays
  of: overlay: kobjectify overlay objects
  of: overlay: Master enable switch
  Documentation: ABI: /sys/firmware/devicetree/overlays
  MAINTAINERS: Pantelis Antoniou device tree overlay maintainer

 .../ABI/testing/sysfs-firmware-devicetree-overlays |   9 ++
 MAINTAINERS|   9 ++
 drivers/of/base.c  |   5 +
 drivers/of/of_private.h|   9 ++
 drivers/of/overlay.c   | 116 -
 drivers/of/unittest.c  |  62 +++
 6 files changed, 208 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-firmware-devicetree-overlays

-- 
1.7.12

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 1/5] of: unittest: overlay: Keep track of created overlays

[Pantelis Antoniou]

During the course of the overlay selftests some of them remain
applied. While this does not pose a real problem, make sure you track
them and destroy them at the end of the test.

Signed-off-by: Pantelis Antoniou 
---
 drivers/of/unittest.c | 62 +++
 1 file changed, 62 insertions(+)

diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c
index 4e60682..c711534 100644
--- a/drivers/of/unittest.c
+++ b/drivers/of/unittest.c
@@ -23,6 +23,8 @@
 #include 
 #include 
 
+#include 
+
 #include "of_private.h"
 
 static struct selftest_results {
@@ -1115,6 +1117,59 @@ static const char *overlay_path(int nr)
 
 static const char *bus_path = "/testcase-data/overlay-node/test-bus";
 
+/* it is guaranteed that overlay ids are assigned in sequence */
+#define MAX_SELFTEST_OVERLAYS  256
+static unsigned long overlay_id_bits[BITS_TO_LONGS(MAX_SELFTEST_OVERLAYS)];
+static int overlay_first_id = -1;
+
+static void of_selftest_track_overlay(int id)
+{
+   if (overlay_first_id < 0)
+   overlay_first_id = id;
+   id -= overlay_first_id;
+
+   /* we shouldn't need that many */
+   BUG_ON(id >= MAX_SELFTEST_OVERLAYS);
+   overlay_id_bits[BIT_WORD(id)] |= BIT_MASK(id);
+}
+
+static void of_selftest_untrack_overlay(int id)
+{
+   if (overlay_first_id < 0)
+   return;
+   id -= overlay_first_id;
+   BUG_ON(id >= MAX_SELFTEST_OVERLAYS);
+   overlay_id_bits[BIT_WORD(id)] &= ~BIT_MASK(id);
+}
+
+static void of_selftest_destroy_tracked_overlays(void)
+{
+   int id, ret, defers;
+
+   if (overlay_first_id < 0)
+   return;
+
+   /* try until no defers */
+   do {
+   defers = 0;
+   /* remove in reverse order */
+   for (id = MAX_SELFTEST_OVERLAYS - 1; id >= 0; id--) {
+   if (!(overlay_id_bits[BIT_WORD(id)] & BIT_MASK(id)))
+   continue;
+
+   ret = of_overlay_destroy(id + overlay_first_id);
+   if (ret != 0) {
+   defers++;
+   pr_warn("%s: overlay destroy failed for #%d\n",
+   __func__, id + overlay_first_id);
+   continue;
+   }
+
+   overlay_id_bits[BIT_WORD(id)] &= ~BIT_MASK(id);
+   }
+   } while (defers > 0);
+}
+
 static int of_selftest_apply_overlay(int selftest_nr, int overlay_nr,
int *overlay_id)
 {
@@ -1136,6 +1191,7 @@ static int of_selftest_apply_overlay(int selftest_nr, int 
overlay_nr,
goto out;
}
id = ret;
+   of_selftest_track_overlay(id);
 
ret = 0;
 
@@ -1349,6 +1405,7 @@ static void of_selftest_overlay_6(void)
return;
}
ov_id[i] = ret;
+   of_selftest_track_overlay(ov_id[i]);
}
 
for (i = 0; i < 2; i++) {
@@ -1373,6 +1430,7 @@ static void of_selftest_overlay_6(void)
PDEV_OVERLAY));
return;
}
+   of_selftest_untrack_overlay(ov_id[i]);
}
 
for (i = 0; i < 2; i++) {
@@ -1417,6 +1475,7 @@ static void of_selftest_overlay_8(void)
return;
}
ov_id[i] = ret;
+   of_selftest_track_overlay(ov_id[i]);
}
 
/* now try to remove first overlay (it should fail) */
@@ -1439,6 +1498,7 @@ static void of_selftest_overlay_8(void)
PDEV_OVERLAY));
return;
}
+   of_selftest_untrack_overlay(ov_id[i]);
}
 
selftest(1, "overlay test %d passed\n", 8);
@@ -1861,6 +1921,8 @@ static void __init of_selftest_overlay(void)
of_selftest_overlay_i2c_cleanup();
 #endif
 
+   of_selftest_destroy_tracked_overlays();
+
 out:
of_node_put(bus_np);
 }
-- 
1.7.12

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [REGRESSION] "of: Fix premature bootconsole disable with 'stdout-path'" breaks console on tty0

[Peter Hurley]

On 03/17/2015 10:20 AM, Peter Hurley wrote:
> On 03/17/2015 09:43 AM, Hans de Goede wrote:
>> Hi,
>>
>> On 17-03-15 14:30, Rob Herring wrote:
>>> On Tue, Mar 17, 2015 at 3:20 AM, Hans de Goede  wrote:
>>
>> 
>>
 TBH I do not understand why we're even arguing here, AFAICT the behavior
 change
 is an unwanted side-effect of your patch, so the solution is to rewrite the
 patch
 so that we get the same end result (not turning off bootconsole-s too 
 early)
 without
 the unwanted side-effect, and you agreed to work on that ?
>>>
>>> I intend to revert this if we don't have a fix soon.
>>>
>>> I think we just need a flag saying we've enabled the earlycon from
>>> stdout-path or not and then add the preferred console based on that. I
>>> assume with "earlycon" only on the command-line, getting console only
>>> on stdout-path is okay.
>>
>> Yes, if a user explicitly specifies something like "earlycon" on the
>> commandline then not automatically getting console output on tty0 is
>> fine AFAICT. The use case important for me / distros is when no
>> console= (or related) arguments are present on the cmdline at all,
>> then the desired behavior is to have console output on tty0 as well
>> as on any serial console specified with stdout-path.
> 
> The issues raised by this patch have nothing to do with earlycon.
> 
> 1. PowerPC boot crash - the report with the most troubleshooting info right 
> now
>implicates some buffer overflow or console mismanagement triggered by 
> simply
>having defined a preferred console. This needs to be figured out 
> regardless,
>and this is what I'm working right now.
> 
> 2. Hans' use-case was _already broken_ even before this patch; _any_ driver
>that adds a preferred console before the vt console driver will cause
>this problem. So again, this needs to be fixed regardless.

Rob,

You're right; this patch will need to be reverted. I'll send you a revert.

Regards,
Peter Hurley
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [REGRESSION] "of: Fix premature bootconsole disable with 'stdout-path'" breaks console on tty0

[Peter Hurley]

On 03/17/2015 03:44 PM, Peter Hurley wrote:
> On 03/17/2015 03:35 PM, Andreas Schwab wrote:
>> Peter Hurley  writes:
>>
>>> It doesn't boot?
>>
>> It boots right into user space, but the initrd doesn't like something
>> (perhaps the missing console) and exits.  Note that the framebuffer
>> console does work, but all I see are the penguins.
>>
>> [6.235604] Warning: unable to open an initial console.
> 
> Thanks, Andreas. I had figured out from your earlier email that your
> specific breakage was the absence of any console.

Would you share what the actual prom stdout string value is?
(linux,stdout-path is equivalent)

Regards,
Peter Hurley

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [REGRESSION] "of: Fix premature bootconsole disable with 'stdout-path'" breaks console on tty0

[Peter Hurley]

On 03/17/2015 03:35 PM, Andreas Schwab wrote:
> Peter Hurley  writes:
> 
>> It doesn't boot?
> 
> It boots right into user space, but the initrd doesn't like something
> (perhaps the missing console) and exits.  Note that the framebuffer
> console does work, but all I see are the penguins.
> 
> [6.235604] Warning: unable to open an initial console.

Thanks, Andreas. I had figured out from your earlier email that your
specific breakage was the absence of any console.

Regards,
Peter Hurley

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [REGRESSION] "of: Fix premature bootconsole disable with 'stdout-path'" breaks console on tty0

[Andreas Schwab]

Peter Hurley  writes:

> It doesn't boot?

It boots right into user space, but the initrd doesn't like something
(perhaps the missing console) and exits.  Note that the framebuffer
console does work, but all I see are the penguins.

[6.235604] Warning: unable to open an initial console.
[6.237611] Freeing unused kernel memory: 2156K (c0a0a000 - 
c0c25000)
[6.262059] mount (70) used greatest stack depth: 10064 bytes left
[6.298795] mkdir (76) used greatest stack depth: 9760 bytes left
[6.376450] sysrq: SysRq : Changing Loglevel
[6.376513] sysrq: Loglevel set to 1
[6.430512] systemd-udevd[111]: starting version 208
[6.488367] udevadm (112) used greatest stack depth: 9312 bytes left
[6.605581] ata_id (127) used greatest stack depth: 8400 bytes left
[8.578710] btrfs (217) used greatest stack depth: 8032 bytes left
[8.700698] PM: Starting manual resume from disk
[   13.354795] EXT4-fs (dm-1): mounting ext3 file system using the ext4 
subsystem
[   13.391899] EXT4-fs (dm-1): mounted filesystem with ordered data mode. Opts: 
(null)
[   23.852033] Kernel panic - not syncing: Attempted to kill init! 
exitcode=0x0100
[   23.852033] 
[   23.852067] CPU: 1 PID: 1 Comm: run-init Not tainted 4.0.0-rc4-test #27
[   23.852078] Call Trace:
[   23.852095] [c001ee0bbb30] [c06f8f64] .dump_stack+0x88/0xa8 
(unreliable)
[   23.852118] [c001ee00] [c06f52f8] .panic+0xe8/0x284
[   23.852139] [c001ee0bbc50] [c0045b38] .do_exit+0x550/0xa08
[   23.852156] [c001ee0bbd30] [c0047178] .do_group_exit+0x48/0xbc
[   23.852173] [c001ee0bbdc0] [c0047200] .__wake_up_parent+0x0/0x38
[   23.852192] [c001ee0bbe30] [c0007d18] system_call+0x38/0xd0

Andreas.

-- 
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
"And now for something completely different."
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 2/2] of: unittest: Add option string test case with longer path

[Brian Norris]

There were regressions seen with commit 106937e8ccdc ("of: fix handling
of '/' in options for of_find_node_by_path()"), where we couldn't handle
extra '/' before the ':'. Let's test for this now.

Confirmed that this test fails without the previous patch and passes
when patched. All other tests pass.

Signed-off-by: Brian Norris 
---
 drivers/of/unittest.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c
index aba8946cac46..52c45c7df07f 100644
--- a/drivers/of/unittest.c
+++ b/drivers/of/unittest.c
@@ -97,6 +97,11 @@ static void __init of_selftest_find_node_by_name(void)
 "option path test, subcase #1 failed\n");
of_node_put(np);
 
+   np = 
of_find_node_opts_by_path("/testcase-data/testcase-device1:test/option", 
&options);
+   selftest(np && !strcmp("test/option", options),
+"option path test, subcase #2 failed\n");
+   of_node_put(np);
+
np = of_find_node_opts_by_path("/testcase-data:testoption", NULL);
selftest(np, "NULL option path test failed\n");
of_node_put(np);
-- 
1.9.1

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 1/2] of: handle both '/' and ':' in path strings

[Brian Norris]

Commit 106937e8ccdc ("of: fix handling of '/' in options for
of_find_node_by_path()") caused a regression in OF handling of
stdout-path. While it fixes some cases which have '/' after the ':', it
breaks cases where there is more than one '/' *before* the ':'.

For example, it breaks this boot string

  stdout-path = "/rdb/serial@f040ab00:115200";

So rather than doing sequentialized checks (first for '/', then for ':';
or vice versa), to get the correct behavior we need to check for the
first occurrence of either one of them.

It so happens that the handy strcspn() helper can do just that.

Fixes: 106937e8ccdc ("of: fix handling of '/' in options for 
of_find_node_by_path()")
Signed-off-by: Brian Norris 
Cc: sta...@vger.kernel.org
---
This is for -stable only because the regression is marked for stable. Not sure
the first one deserves to go to -stable, actually...

 drivers/of/base.c | 7 +--
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index adb8764861c0..966d6fdcf427 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -715,13 +715,8 @@ static struct device_node *__of_find_node_by_path(struct 
device_node *parent,
 {
struct device_node *child;
int len;
-   const char *end;
 
-   end = strchr(path, ':');
-   if (!end)
-   end = strchrnul(path, '/');
-
-   len = end - path;
+   len = strcspn(path, "/:");
if (!len)
return NULL;
 
-- 
1.9.1

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v1 0/3] drivers: net: xgene: Add second SGMII based 1G interface

[David Miller]

From: Keyur Chudgar 
Date: Tue, 17 Mar 2015 11:27:10 -0700

> This patch adds support for second SGMII based 1G interface.
>   
> Signed-off-by: Keyur Chudgar 
> Signed-off-by: Iyappan Subramanian 

Series applied to net-next, thanks.
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 01/10] dt/bindings: Add binding for BCM2835 mailbox driver

[Eric Anholt]

Stephen Warren  writes:

> On 03/12/2015 05:23 PM, Eric Anholt wrote:
>> Device base maintainers weren't excited about my patch for
>> -EPROBE_DEFER, because then a new DT would mean we start failing to
>> probe the USB driver in an older kernel, which whould be a
>> regression in the case that the user had U-Boot setting up USB for
>> them.
>
> The main ABI issue is that old DTs should work with new kernels. The
> other way around is nice, but certainly not as strict a requirement. I
> don't think that should block a change. Do you have a link to the
> thread; I don't think I noticed it.

http://comments.gmane.org/gmane.linux.kernel/1906119


signature.asc
Description: PGP signature

Re: [REGRESSION] "of: Fix premature bootconsole disable with 'stdout-path'" breaks console on tty0

[Andreas Schwab]

Hans de Goede  writes:

> Actually that is more likely to be caused by:
>
> https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/drivers/of?id=106937e8ccdcf0f4b95fbf0fe9abd42766cade33
>
> Try reverting that one, also see:

That doesn't help.

> Note that if either if these patches are the culprit likely
> your system is still booting you're just not getting any
> messages on either video output

No, it is panicking.

Andreas.

-- 
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
"And now for something completely different."
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 1/4] ARM: BCM2835: Add a function for doing an rmb() between device reads.

[Eric Anholt]

Stephen Warren  writes:

> On 03/12/2015 08:32 PM, Eric Anholt wrote:
>> Stephen Warren was concerned that the rmb() present in the new mailbox
>> driver was unnecessary, and after seeing the docs, that it was just so
>> surprising that somebody would come along and remove it later.  The
>> explanation for the need for the rmb() is long enough that we won't
>> want to place it at every callsite.  Make a wrapper with the whole
>> explanation in it, so that anyone wondering what's going on sees the
>> docs right there.
>
>> diff --git a/include/soc/bcm2835/peripheral-workaround.h 
>> b/include/soc/bcm2835/peripheral-workaround.h
>
>> +static inline void bcm2835_peripheral_read_workaround(void)
>> +{
>> +#ifdef CONFIG_ARCH_BCM2835
>
> Would this header be included if that wasn't defined? Perhaps that'll be
> answered by a later patch...

Well, we may find we need workaround rmb()s in, say, dwc2.  I don't
think we'd want to have them unconditional on other architectures when
bcm2835 isn't included in the build.

>> +/*
>> + * The BCM2835 bus is unusual in that it doesn't guarantee
>> + * ordering between reads from different peripherals (where
>> + * peripherals roughly correspond to Linux devices).  From
>> + * BCM2835 ARM Peripherals.pdf, page 7:
>
> Many buses don't guarantee ordering; that's quite common. The issue is
> that the CPU then doesn't match up the correct read request and
> response, thus causing it to swap the results of read requests. That's
> the unusual part. It would be useful to spell that out more explicitly
> in this introduction, even though it is called out in the example below.
>
> BTW, the ARM mailing list is linux-arm-ker...@lists.infradead.org not
> linux-arm-ker...@vger.kernel.org.

Fixed in my send-email script, thanks!


signature.asc
Description: PGP signature

Re: [PATCH 3/4 v4] mailbox: Enable BCM2835 mailbox support

[Eric Anholt]

Lee Jones  writes:

> On Mon, 16 Mar 2015, Stephen Warren wrote:
>
>> On 03/12/2015 08:32 PM, Eric Anholt wrote:
>> > From: Lubomir Rintel 
>> > 
>> > Implement BCM2835 mailbox support as a device registered with the
>> > general purpose mailbox framework. Implementation based on commits by
>> > Lubomir Rintel [1], Suman Anna and Jassi Brar [2] on which to base the
>> > implementation.
>> > 
>> > [1] 
>> > http://lists.infradead.org/pipermail/linux-rpi-kernel/2013-April/000528.html
>> > [2] 
>> > http://lists.infradead.org/pipermail/linux-rpi-kernel/2013-May/000546.html
>> > 
>> > Signed-off-by: Lubomir Rintel 
>> > Signed-off-by: Craig McGeachie 
>> > Signed-off-by: Suman Anna 
>> > Signed-off-by: Jassi Brar 
>> > Signed-off-by: Eric Anholt 
>> > Cc: Jassi Brar 
>> > Acked-by: Lee Jones 
>> 
>> Acks often don't carry over when there are significant changes.
>
> Did I even Ack this?

Yeah, I don't see any record of it, looks like I misread the mail
thread.


signature.asc
Description: PGP signature

Re: [PATCH 1/5] USB: ehci-atmel: rework clk handling

[Alan Stern]

On Tue, 17 Mar 2015, Boris Brezillon wrote:

> The EHCI IP only needs the UTMI/UPLL (uclk) and the peripheral (iclk)
> clocks to work properly. Remove the useless system clock (fclk).
> 
> Avoid calling set_rate on the fixed rate UTMI/IPLL clock and remove
> useless IS_ENABLED(CONFIG_COMMON_CLK) tests (all at91 platforms have been
> moved to the CCF).
> 
> This patch also fixes a bug introduced by 3440ef1 (ARM: at91/dt: fix USB
> high-speed clock to select UTMI), which was leaving the usb clock
> uninitialized and preventing the OHCI driver from setting the usb clock
> rate to 48MHz.
> This bug was caused by several things:
> 1/ usb clock drivers set the CLK_SET_RATE_GATE flag, which means the rate
>cannot be changed once the clock is prepared
> 2/ The EHCI driver was retrieving and preparing/enabling the uhpck
>clock which was in turn preparing its parent clock (the usb clock),
>thus preventing any rate change because of 1/
> 
> Signed-off-by: Boris Brezillon 

Acked-by: Alan Stern 

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 2/5] USB: host: ohci-at91: remove useless uclk clock

[Alan Stern]

On Tue, 17 Mar 2015, Boris Brezillon wrote:

> Now that the system clock driver is forwarding set_rate request to the
> parent clock, we can safely call clk_set_rate on the system clk and get
> rid of the uclk field.
> 
> Signed-off-by: Boris Brezillon 

Acked-by: Alan Stern 

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCHv3 0/5] arm-cci400: PMU monitoring support on ARM64

[Will Deacon]

On Tue, Mar 10, 2015 at 03:18:50PM +, Suzuki K. Poulose wrote:
> From: "Suzuki K. Poulose" 
> 
> This series enables the PMU monitoring support for CCI400 on ARM64.
> The existing CCI400 driver code is a mix of PMU driver and the MCPM
> driver code. The MCPM driver is only used on ARM(32) and contains
> arm32 assembly and hence can't be built on ARM64. This patch splits
> the code to
> 
>  - ARM_CCI400_PORT_CTRL driver - depends on ARM && V7
>  - ARM_CCI400_PMU driver

If you repost this with acks added and my feedback addressed, then I'm
happy to put together a branch for arm-soc along with your other CCI PMU
fix for event validation.

Will
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 5/5] arm-cci: Fix CCI PMU event validation

[Will Deacon]

On Tue, Mar 10, 2015 at 03:18:55PM +, Suzuki K. Poulose wrote:
> From: "Suzuki K. Poulose" 
> 
> We mask the event with the CCI_PMU_EVENT_MASK, before passing
> the config to pmu_validate_hw_event(), which causes extra bits
> to be ignored and qualifies an invalid event code as valid.
> 
> e.g,
>  $ perf stat -a -C 0 -e CCI_400/config=0x1ff,name=cycles/ sleep 1
>Performance counter stats for 'system wide':
> 
>  506951142  cycles
> 
>1.013879626 seconds time elapsed
> 
> where, cycles has an event coding of 0xff. This patch also removes
> the unnecessary 'event' mask in pmu_write_register, since the config_base
> is set by the pmu code after the event is validated.
> 
> Changes since V2:
>  - Switch to input unsigned long for pmu_validate_hw_event()
> 
> Signed-off-by: Suzuki K. Poulose 
> ---
>  drivers/bus/arm-cci.c |   10 ++
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c
> index 581190d..89c86e9 100644
> --- a/drivers/bus/arm-cci.c
> +++ b/drivers/bus/arm-cci.c
> @@ -179,12 +179,15 @@ enum cci400_perf_events {
>  #define CCI_REV_R1_MASTER_PORT_MIN_EV0x00
>  #define CCI_REV_R1_MASTER_PORT_MAX_EV0x11
>  
> -static int pmu_validate_hw_event(u8 hw_event)
> +static int pmu_validate_hw_event(unsigned long hw_event)
>  {
>   u8 ev_source = CCI_PMU_EVENT_SOURCE(hw_event);
>   u8 ev_code = CCI_PMU_EVENT_CODE(hw_event);
>   int if_type;
>  
> + if (hw_event & ~CCI_PMU_EVENT_MASK)
> + return -ENOENT;

Given that you want to build this for arm64, shouldn't CCI_PMU_EVENT_MASK
be an unsigned long too (i.e. 0xffUL)? Otherwise you won't detect set bits
in the upper word here.

Will
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html