Re: [PATCH v1 1/3] ARM: dts: rockchip: add core rk3036 dts

2015-09-17 Thread Xing Zheng

On 2015年08月28日 16:59, Heiko Stuebner wrote:

Hi,

Am Freitag, 28. August 2015, 13:46:46 schrieb Xing Zheng:

Initial release for rk3036, node definitions rk3036 sdk board.

Signed-off-by: Xing Zheng
---

Changes in v1: None

  arch/arm/boot/dts/Makefile   |1 +
  arch/arm/boot/dts/rk3036-sdk.dts |  362
++ 2 files changed, 363 insertions(+)

as Eddie already said, please split into two files ... just look at the other
Rockchip socs for inspiration :-)

Done.

  create mode 100644 arch/arm/boot/dts/rk3036-sdk.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 6d7cec1..7014a3b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -501,6 +501,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3066a-bqcurie2.dtb \
rk3066a-marsboard.dtb \
rk3066a-rayeager.dtb \
+   rk3036-sdk.dtb \
rk3188-radxarock.dtb \
rk3288-evb-act8846.dtb \
rk3288-evb-rk808.dtb \
diff --git a/arch/arm/boot/dts/rk3036-sdk.dts
b/arch/arm/boot/dts/rk3036-sdk.dts new file mode 100644
index 000..0149c9a
--- /dev/null
+++ b/arch/arm/boot/dts/rk3036-sdk.dts
@@ -0,0 +1,362 @@
+/*
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include
+#include
+#include
+#include
+#include
+#include "skeleton.dtsi"
+
+/ {
+   compatible = "rockchip,rk3036";
+
+   interrupt-parent =<&gic>;
+
+   aliases {
+   serial0 =&uart0;
+   serial1 =&uart1;
+   serial2 =&uart2;
+   };
+
+   memory {
+   reg =<0x6000 0x4000>;

missing
device_type = "memory";

Done.



+   };
+
+arm-pmu {
+compatible = "arm,cortex-a7-pmu";
+interrupts =,
+;

missing interrupt-affinity to map irq->cpu_core ?

Done.

+};
+
+   cpus {
+   #address-cells =<1>;
+   #size-cells =<0>;
+   //enable-method = "rockchip,rk3066-smp";

please don't leave commented code around


Done.

+
+   cpu@f00 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg =<0xf00>;
+   operating-points =<
+   /* KHzuV */
+816000 100
+   >;
+   #cooling-cells =<2>; /* min followed by max */
+   clock-latency =<4>;
+   clocks =<&cru ARMCLK>;
+   resets =<&cru SRST_CORE0>;
+   };
+   cpu@f01 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg =<0xf01>;
+   resets =<&cru SRST_CORE1>;
+   };
+   };
+
+   amba {
+   compatible = "arm,amba-bus";
+   #address-cells =<1>;
+   #size-cells =<1>;
+   ranges;
+
+pdma: pdma@20078000 {
+  

Re: [PATCH v1 1/3] ARM: dts: rockchip: add core rk3036 dts

2015-08-28 Thread Heiko Stuebner
Hi,

Am Freitag, 28. August 2015, 13:46:46 schrieb Xing Zheng:
> Initial release for rk3036, node definitions rk3036 sdk board.
> 
> Signed-off-by: Xing Zheng 
> ---
> 
> Changes in v1: None
> 
>  arch/arm/boot/dts/Makefile   |1 +
>  arch/arm/boot/dts/rk3036-sdk.dts |  362
> ++ 2 files changed, 363 insertions(+)

as Eddie already said, please split into two files ... just look at the other 
Rockchip socs for inspiration :-)


>  create mode 100644 arch/arm/boot/dts/rk3036-sdk.dts
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 6d7cec1..7014a3b 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -501,6 +501,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
>   rk3066a-bqcurie2.dtb \
>   rk3066a-marsboard.dtb \
>   rk3066a-rayeager.dtb \
> + rk3036-sdk.dtb \
>   rk3188-radxarock.dtb \
>   rk3288-evb-act8846.dtb \
>   rk3288-evb-rk808.dtb \
> diff --git a/arch/arm/boot/dts/rk3036-sdk.dts
> b/arch/arm/boot/dts/rk3036-sdk.dts new file mode 100644
> index 000..0149c9a
> --- /dev/null
> +++ b/arch/arm/boot/dts/rk3036-sdk.dts
> @@ -0,0 +1,362 @@
> +/*
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "skeleton.dtsi"
> +
> +/ {
> + compatible = "rockchip,rk3036";
> +
> + interrupt-parent = <&gic>;
> +
> + aliases {
> + serial0 = &uart0;
> + serial1 = &uart1;
> + serial2 = &uart2;
> + };
> +
> + memory {
> + reg = <0x6000 0x4000>;

missing
device_type = "memory";


> + };
> +
> +arm-pmu {
> +compatible = "arm,cortex-a7-pmu";
> +interrupts = ,
> + ;

missing interrupt-affinity to map irq->cpu_core ?


> +};
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + //enable-method = "rockchip,rk3066-smp";

please don't leave commented code around


> +
> + cpu@f00 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a7";
> + reg = <0xf00>;
> + operating-points = <
> + /* KHzuV */
> +  816000 100
> + >;
> + #cooling-cells = <2>; /* min followed by max */
> + clock-latency = <4>;
> + clocks = <&cru ARMCLK>;
> + resets = <&cru SRST_CORE0>;
> + };
> + cpu@f01 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a7";
> + reg = <0xf01>;
> + resets = <&cru SRST_CORE1>;
> + };
> + };
> +
> + amba {
> + compatible = "arm,amba-bus";
> +   

Re: [PATCH v1 1/3] ARM: dts: rockchip: add core rk3036 dts

2015-08-28 Thread Eddie Cai
Hi ZhengXing

You should have two file for dts part. One is rk3036.dtsi for soc. The
other one is rk3036-sdk.dts for board.

2015-08-28 13:46 GMT+08:00 Xing Zheng :
> Initial release for rk3036, node definitions rk3036 sdk board.
>
> Signed-off-by: Xing Zheng 
> ---
>
> Changes in v1: None
>
>  arch/arm/boot/dts/Makefile   |1 +
>  arch/arm/boot/dts/rk3036-sdk.dts |  362 
> ++
>  2 files changed, 363 insertions(+)
>  create mode 100644 arch/arm/boot/dts/rk3036-sdk.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 6d7cec1..7014a3b 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -501,6 +501,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
> rk3066a-bqcurie2.dtb \
> rk3066a-marsboard.dtb \
> rk3066a-rayeager.dtb \
> +   rk3036-sdk.dtb \
> rk3188-radxarock.dtb \
> rk3288-evb-act8846.dtb \
> rk3288-evb-rk808.dtb \
> diff --git a/arch/arm/boot/dts/rk3036-sdk.dts 
> b/arch/arm/boot/dts/rk3036-sdk.dts
> new file mode 100644
> index 000..0149c9a
> --- /dev/null
> +++ b/arch/arm/boot/dts/rk3036-sdk.dts
> @@ -0,0 +1,362 @@
> +/*
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "skeleton.dtsi"
> +
> +/ {
> +   compatible = "rockchip,rk3036";
> +
> +   interrupt-parent = <&gic>;
> +
> +   aliases {
> +   serial0 = &uart0;
> +   serial1 = &uart1;
> +   serial2 = &uart2;
> +   };
> +
> +   memory {
> +   reg = <0x6000 0x4000>;
> +   };
> +
> +arm-pmu {
> +compatible = "arm,cortex-a7-pmu";
> +interrupts = ,
> + ;
> +};
> +
> +   cpus {
> +   #address-cells = <1>;
> +   #size-cells = <0>;
> +   //enable-method = "rockchip,rk3066-smp";
> +
> +   cpu@f00 {
> +   device_type = "cpu";
> +   compatible = "arm,cortex-a7";
> +   reg = <0xf00>;
> +   operating-points = <
> +   /* KHzuV */
> +816000 100
> +   >;
> +   #cooling-cells = <2>; /* min followed by max */
> +   clock-latency = <4>;
> +   clocks = <&cru ARMCLK>;
> +   resets = <&cru SRST_CORE0>;
> +   };
> +   cpu@f01 {
> +   device_type = "cpu";
> +   compatible = "arm,cortex-a7";
> +   reg = <0xf01>;
> +   resets = <&cru SRST_CORE1>;
> +   };
> +   };
> +
> +   amba {
> +   compatible = "arm,amba-bus";
> +   #address-cells = <1>;
> +   #size-cells = <1>;
> 

[PATCH v1 1/3] ARM: dts: rockchip: add core rk3036 dts

2015-08-27 Thread Xing Zheng
Initial release for rk3036, node definitions rk3036 sdk board.

Signed-off-by: Xing Zheng 
---

Changes in v1: None

 arch/arm/boot/dts/Makefile   |1 +
 arch/arm/boot/dts/rk3036-sdk.dts |  362 ++
 2 files changed, 363 insertions(+)
 create mode 100644 arch/arm/boot/dts/rk3036-sdk.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 6d7cec1..7014a3b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -501,6 +501,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3066a-bqcurie2.dtb \
rk3066a-marsboard.dtb \
rk3066a-rayeager.dtb \
+   rk3036-sdk.dtb \
rk3188-radxarock.dtb \
rk3288-evb-act8846.dtb \
rk3288-evb-rk808.dtb \
diff --git a/arch/arm/boot/dts/rk3036-sdk.dts b/arch/arm/boot/dts/rk3036-sdk.dts
new file mode 100644
index 000..0149c9a
--- /dev/null
+++ b/arch/arm/boot/dts/rk3036-sdk.dts
@@ -0,0 +1,362 @@
+/*
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "skeleton.dtsi"
+
+/ {
+   compatible = "rockchip,rk3036";
+
+   interrupt-parent = <&gic>;
+
+   aliases {
+   serial0 = &uart0;
+   serial1 = &uart1;
+   serial2 = &uart2;
+   };
+
+   memory {
+   reg = <0x6000 0x4000>;
+   };
+
+arm-pmu {
+compatible = "arm,cortex-a7-pmu";
+interrupts = ,
+ ;
+};
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   //enable-method = "rockchip,rk3066-smp";
+
+   cpu@f00 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg = <0xf00>;
+   operating-points = <
+   /* KHzuV */
+816000 100
+   >;
+   #cooling-cells = <2>; /* min followed by max */
+   clock-latency = <4>;
+   clocks = <&cru ARMCLK>;
+   resets = <&cru SRST_CORE0>;
+   };
+   cpu@f01 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg = <0xf01>;
+   resets = <&cru SRST_CORE1>;
+   };
+   };
+
+   amba {
+   compatible = "arm,amba-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+pdma: pdma@20078000 {
+compatible = "arm,pl330", "arm,primecell";
+reg = <0x20078000 0x4000>;
+interrupts = ,
+ ;
+#dma-cells = <1>;
+clocks = <&cru ACLK_DMAC2>;
+clock-names = "apb_pclk";
+