date:20160901

[PATCH] drm: rcar-du: add ADV7513 HDMI encoder

2016-09-01 Thread Sergei Shtylyov

The R-Car DU driver keeps a list of the external encoders which it uses
to  get  the encoder type.  Renesas Wheat board uses Analog Devices ADV7513
HDMI encoder, unlike the other Renesas boards which all use ADV7511W --
add it to the encoder list.

Signed-off-by: Sergei Shtylyov 

---
This patch is against the 'drm/next/du' branch of Laurent Pinchart's 'media.git'
repo...

 drivers/gpu/drm/rcar-du/rcar_du_kms.c |1 +
 1 file changed, 1 insertion(+)

Index: media/drivers/gpu/drm/rcar-du/rcar_du_kms.c
===
--- media.orig/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ media/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -362,6 +362,7 @@ static int rcar_du_encoders_init_one(str
} encoders[] = {
{ "adi,adv7123", RCAR_DU_ENCODER_VGA },
{ "adi,adv7511w", RCAR_DU_ENCODER_HDMI },
+   { "adi,adv7513", RCAR_DU_ENCODER_HDMI },
{ "thine,thc63lvdm83d", RCAR_DU_ENCODER_LVDS },
};

[PATCH 1/2] libdrm: add etnaviv drm support

2016-09-01 Thread Christian Gmeiner

Hi Emil,

thanks a lot for the review.

2016-08-30 15:03 GMT+02:00 Emil Velikov :
> On 30 August 2016 at 08:14, Christian Gmeiner
>  wrote:
>> From: The etnaviv authors 
>>
>> Add the libdrm_etnaviv helper library to encapsulate etnaviv-specific 
>> interfaces to the DRM.
>>
>> Signed-off-by: Christian Gmeiner 
>> Signed-off-by: Lucas Stach 
> Just double-checking:
>  - you've looked that all the relevant freedreno patches have been
> ported over, correct ?
>  - the feature checking bug (mentioned on IRC) has been fixed ?
>
>> diff --git a/configure.ac b/configure.ac
>> index e3048c7..64f3e6c 100644
>> --- a/configure.ac
>> +++ b/configure.ac
>
>> @@ -274,6 +279,9 @@ if test "x$drm_cv_atomic_primitives" = "xnone"; then
>>
>> LIBDRM_ATOMICS_NOT_FOUND_MSG($TEGRA, tegra, NVIDIA Tegra, 
>> tegra-experimental-api)
>> TEGRA=no
>> +
>> +   LIBDRM_ATOMICS_NOT_FOUND_MSG($ETNAVIV, etnaviv, Vivante, 
>> etnaviv-experimental-api)
> Reading this hunk reminds me what a bad name I've used. Then again
> nothing better comes up atm. If you can think of any please shout.
>
>> +++ b/etnaviv/Android.mk
> Have you tried building/using etna on Android ?
>

No.. if it is an easy job I would give it a try. Shall I drop it?

>
>> +++ b/etnaviv/Makefile.am
>> @@ -0,0 +1,27 @@
>> +AUTOMAKE_OPTIONS=subdir-objects
> There are no subdirectories so you don't need this. Then again, can we
> move the freedreno one to configure.ac - just append to
> AM_INIT_AUTOMAKE.
>

Okay

>> +include Makefile.sources
>> +
>> +AM_CFLAGS = \
>> +   $(WARN_CFLAGS) \
>> +   -I$(top_srcdir) \
>> +   $(PTHREADSTUBS_CFLAGS) \
>> +   -I$(top_srcdir)/include/drm
>> +
>> +libdrm_etnaviv_ladir = $(libdir)
>> +libdrm_etnaviv_la_LTLIBRARIES = libdrm_etnaviv.la
>> +libdrm_etnaviv_la_LDFLAGS = -version-number 0:0:0 -no-undefined
> Maybe make this 1:0:0 ?
>

Sure.. why not.

>> --- /dev/null
>> +++ b/etnaviv/etnaviv-symbol-check
>> @@ -0,0 +1,45 @@
>> +#!/bin/bash
>> +
>> +# The following symbols (past the first five) are taken from the public 
>> headers.
>> +# A list of the latter should be available 
>> Makefile.sources/LIBDRM_FREEDRENO_H_FILES
>> +
> LIBDRM_ETNAVIV_H_FILES?
>

Opps... good catch. Will fix it in v2.

>
>> new file mode 100644
>> index 000..462241c
>> --- /dev/null
>> +++ b/etnaviv/etnaviv_drm.h
> Double-checking: this file is identical to the one produced by make
> headers_install, correct ?
>

I need to check that - if something is wrong it will be fixed in v2.

greets
--
Christian Gmeiner, MSc

https://soundcloud.com/christian-gmeiner

[Bug 66963] Rv6xx dpm problems

2016-09-01 Thread bugzilla-dae...@freedesktop.org

https://bugs.freedesktop.org/show_bug.cgi?id=66963

--- Comment #290 from Zetok  ---
Created attachment 126166
  --> https://bugs.freedesktop.org/attachment.cgi?id=126166=edit
dmesg with reverted 02376d8282b88f07d0716da6155094c8760b1a13 on 4.6.3

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[Bug 66963] Rv6xx dpm problems

2016-09-01 Thread bugzilla-dae...@freedesktop.org

https://bugs.freedesktop.org/show_bug.cgi?id=66963

--- Comment #289 from Zetok  ---
Created attachment 126165
  --> https://bugs.freedesktop.org/attachment.cgi?id=126165=edit
dmesg without reverted 02376d8282b88f07d0716da6155094c8760b1a13 on 4.6.3

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[Bug 66963] Rv6xx dpm problems

2016-09-01 Thread bugzilla-dae...@freedesktop.org

ment #244. Any chance of
> getting this patch into the kernel?
> 
> If anyone is willing to write a fix, as opposed to a workaround, for this
> issue, I would be happy to test it on my device.

Yeah, no, that didn't help a bit.

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[PATCH v2 4/4] arm: dts: qcom: apq8064-ifc6410: Add HDMI support

2016-09-01 Thread Archit Taneja

Add HDMI support on IFC6410. Populate the regulators required by HDMI-TX
and PHY. Establish the link between the MDP4 DTV encoder and HDMI. Create
a generic micro HDMI connector DT node. The msm drm driver doesn't parse
for HDMI connectors in DT, but it will do so later.

Cc: Rob Herring 
Cc: devicetree at vger.kernel.org

Signed-off-by: Archit Taneja 
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 74 ++
 1 file changed, 74 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts 
b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 2eeb090..3d37cab 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -43,6 +43,17 @@
};
};

+   hdmi-out {
+   compatible = "hdmi-connector";
+   type = "d";
+
+   port {
+   hdmi_con: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   };
+
soc {
pinctrl at 80 {
card_detect: card_detect {
@@ -64,6 +75,25 @@
bias-disable;
};
};
+
+   hdmi_pinctrl: hdmi-pinctrl {
+   mux {
+   pins = "gpio70", "gpio71", "gpio72";
+   function = "hdmi";
+   };
+
+   pinconf_ddc {
+   pins = "gpio70", "gpio71";
+   bias-pull-up;
+   drive-strength = <2>;
+   };
+
+   pinconf_hpd {
+   pins = "gpio72";
+   bias-pull-down;
+   drive-strength = <16>;
+   };
+   };
};

rpm at 108000 {
@@ -329,5 +359,49 @@
mmc-pwrseq = <_pwrseq>;
};
};
+
+   hdmi-tx at 4a0 {
+   status = "okay";
+
+   core-vdda-supply = <_hdmi_switch>;
+   hdmi-mux-supply = <_3p3v>;
+
+   hpd-gpios = <_pinmux 72 GPIO_ACTIVE_HIGH>;
+
+   pinctrl-names = "default";
+   pinctrl-0 = <_pinctrl>;
+
+   ports {
+   port at 0 {
+   endpoint {
+   remote-endpoint = 
<_dtv_out>;
+   };
+   };
+
+   port at 1 {
+   endpoint {
+   remote-endpoint = <_con>;
+   };
+   };
+   };
+   };
+
+   hdmi-phy at 4a00400 {
+   status = "okay";
+
+   core-vdda-supply = <_hdmi_switch>;
+   };
+
+   mdp at 510 {
+   status = "okay";
+
+   ports {
+   port at 3 {
+   endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+   };
};
 };
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[PATCH v2 3/4] arm: dts: qcom: apq8064: Add display DT nodes

2016-09-01 Thread Archit Taneja

APQ8064 contains a MDP4 based display controller. It contains a HDMI, LVDS
and 2 DSI outputs.

Add display DT nodes for MDP4, HDMI TX and HDMI PHY. MDP4 based display
blocks have a flat device hierarchy.

Nodes for other outputs will be added later.

Cc: Rob Herring 
Cc: devicetree at vger.kernel.org

Signed-off-by: Archit Taneja 
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 91 +
 1 file changed, 91 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi 
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 74a9b6c..b688fb6 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -955,6 +955,97 @@
reset-names = "axi", "ahb", "por", "pci", "phy";
status = "disabled";
};
+
+   hdmi: hdmi-tx at 4a0 {
+   compatible = "qcom,hdmi-tx-8960";
+   reg = <0x04a0 0x2f0>;
+   reg-names = "core_physical";
+   interrupts = ;
+   clocks = < HDMI_APP_CLK>,
+< HDMI_M_AHB_CLK>,
+< HDMI_S_AHB_CLK>;
+   clock-names = "core_clk",
+ "master_iface_clk",
+ "slave_iface_clk";
+
+   phys = <_phy>;
+   phy-names = "hdmi-phy";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port at 0 {
+   reg = <0>;
+   hdmi_in: endpoint {
+   };
+   };
+
+   port at 1 {
+   reg = <1>;
+   hdmi_out: endpoint {
+   };
+   };
+   };
+   };
+
+   hdmi_phy: hdmi-phy at 4a00400 {
+   compatible = "qcom,hdmi-phy-8960";
+   reg = <0x4a00400 0x60>,
+ <0x4a00500 0x100>;
+   reg-names = "hdmi_phy",
+   "hdmi_pll";
+
+   clocks = < HDMI_S_AHB_CLK>;
+   clock-names = "slave_iface_clk";
+   };
+
+   mdp: mdp at 510 {
+   compatible = "qcom,mdp4";
+   reg = <0x0510 0xf>;
+   interrupts = ;
+   clocks = < MDP_CLK>,
+< MDP_AHB_CLK>,
+< MDP_AXI_CLK>,
+< MDP_LUT_CLK>,
+< HDMI_TV_CLK>,
+< MDP_TV_CLK>;
+   clock-names = "core_clk",
+ "iface_clk",
+ "bus_clk",
+ "lut_clk",
+ "hdmi_clk",
+ "tv_clk";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port at 0 {
+   reg = <0>;
+   mdp_lvds_out: endpoint {
+   };
+   };
+
+   port at 1 {
+   reg = <1>;
+   mdp_dsi1_out: endpoint {
+   };
+   };
+
+   port at 2 {
+   reg = <2>;
+   mdp_dsi2_out: endpoint {
+   };
+   };
+
+   port at 3 {
+   reg = <3>;
+   mdp_dtv_out: endpoint {
+   };
+   };
+   };
+   };
};
 };
 #include "qcom-apq8064-pins.dtsi"
-- 
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[PATCH v2 2/4] drm/msm/hdmi: Clean up HDMI gpio DT bindings

2016-09-01 Thread Archit Taneja

Make the following changes in the HDMI gpio bindings:

- Use "-gpios" as the suffix for all the gpio names
- Move all the gpios to optional, since there are platforms that use none
  of them.
- The HPD gpio is a standard one, remove the "qcom,hdmi-tx-" prefix from
  it.
- Add a missing lpm gpio used on some platforms.

Make the necessary changes in the driver to incorporate these changes.

There hasn't been any upstream DT that uses the HDMI bindings, so it's
okay to change and move around these properties.

Cc: Rob Herring 
Cc: devicetree at vger.kernel.org
Signed-off-by: Archit Taneja 
---
v2:
- Keep "qcom,hdmi-tx-" suffix for all gpios except for hpd.
- Use "-gpios" suffix instead of "-gpio".
- Move all the gpios to optional properties.

 .../devicetree/bindings/display/msm/hdmi.txt| 11 ++-
 drivers/gpu/drm/msm/hdmi/hdmi.c | 21 +++--
 2 files changed, 25 insertions(+), 7 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.txt 
b/Documentation/devicetree/bindings/display/msm/hdmi.txt
index ce84459..f1a83ab 100644
--- a/Documentation/devicetree/bindings/display/msm/hdmi.txt
+++ b/Documentation/devicetree/bindings/display/msm/hdmi.txt
@@ -13,17 +13,18 @@ Required properties:
 - interrupts: The interrupt signal from the hdmi block.
 - clocks: device clocks
   See ../clocks/clock-bindings.txt for details.
-- qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin
-- qcom,hdmi-tx-ddc-data-gpio: ddc data pin
-- qcom,hdmi-tx-hpd-gpio: hpd pin
 - core-vdda-supply: phandle to supply regulator
 - hdmi-mux-supply: phandle to mux regulator
 - phys: the phandle for the HDMI PHY device
 - phy-names: the name of the corresponding PHY device

 Optional properties:
-- qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
-- qcom,hdmi-tx-mux-sel-gpio: hdmi mux select pin
+- qcom,hdmi-tx-ddc-clk-gpios: ddc clk pin
+- qcom,hdmi-tx-ddc-data-gpios: ddc data pin
+- hpd-gpios: hpd pin
+- qcom,hdmi-tx-mux-en-gpios: hdmi mux enable pin
+- qcom,hdmi-tx-mux-sel-gpios: hdmi mux select pin
+- qcom,hdmi-tx-mux-lpm-gpios: hdmi mux lpm pin
 - power-domains: reference to the power domain(s), if available.
 - pinctrl-names: the pin control state names; should contain "default"
 - pinctrl-0: the default pinctrl state (active)
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.c b/drivers/gpu/drm/msm/hdmi/hdmi.c
index 9737207..a968cad 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi.c
@@ -422,12 +422,29 @@ static const struct {

 static int msm_hdmi_get_gpio(struct device_node *of_node, const char *name)
 {
-   int gpio = of_get_named_gpio(of_node, name, 0);
+   int gpio;
+
+   /* try with the gpio names as in the table (downstream bindings) */
+   gpio = of_get_named_gpio(of_node, name, 0);
if (gpio < 0) {
char name2[32];
-   snprintf(name2, sizeof(name2), "%s-gpio", name);
+
+   /* try with the gpio names as in the upstream bindings */
+   snprintf(name2, sizeof(name2), "%s-gpios", name);
gpio = of_get_named_gpio(of_node, name2, 0);
if (gpio < 0) {
+   char name3[32];
+
+   /*
+* try again after stripping out the "qcom,hdmi-tx"
+* prefix. This is mainly to match "hpd-gpios" used
+* in the upstream bindings
+*/
+   if (sscanf(name2, "qcom,hdmi-tx-%s", name3))
+   gpio = of_get_named_gpio(of_node, name3, 0);
+   }
+
+   if (gpio < 0) {
DBG("failed to get gpio: %s (%d)", name, gpio);
gpio = -1;
}
-- 
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[PATCH v2 1/4] drm/msm/mdp4: Fix issue with LCDC/LVDS port parsing

2016-09-01 Thread Archit Taneja

The LVDS port is the first in the list of the output ports in MDP4.
The driver assumed that if the port and its corresponding endpoint
is defined, then there should be a panel node too. This isn't
necessary since boards may not really use a LVDS panel. Don't fail
if there isn't a panel node available.

While we're at it, use of_graph_get_endpoint_by_regs instead of
of_graph_get_next_endpoint to make it more explicit that the LVDS
output is at port 0.

Signed-off-by: Archit Taneja 
---
 drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c | 23 ---
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c 
b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c
index 7b39e89..571a91e 100644
--- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c
+++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c
@@ -228,18 +228,21 @@ static struct device_node *mdp4_detect_lcdc_panel(struct 
drm_device *dev)
struct device_node *endpoint, *panel_node;
struct device_node *np = dev->dev->of_node;

-   endpoint = of_graph_get_next_endpoint(np, NULL);
+   /*
+* LVDS/LCDC is the first port described in the list of ports in the
+* MDP4 DT node.
+*/
+   endpoint = of_graph_get_endpoint_by_regs(np, 0, -1);
if (!endpoint) {
-   DBG("no endpoint in MDP4 to fetch LVDS panel\n");
+   DBG("no LVDS remote endpoint\n");
return NULL;
}

-   /* don't proceed if we have an endpoint but no panel_node tied to it */
panel_node = of_graph_get_remote_port_parent(endpoint);
if (!panel_node) {
-   dev_err(dev->dev, "no valid panel node\n");
+   DBG("no valid panel node in LVDS endpoint\n");
of_node_put(endpoint);
-   return ERR_PTR(-ENODEV);
+   return NULL;
}

of_node_put(endpoint);
@@ -262,14 +265,12 @@ static int mdp4_modeset_init_intf(struct mdp4_kms 
*mdp4_kms,
switch (intf_type) {
case DRM_MODE_ENCODER_LVDS:
/*
-* bail out early if:
-* - there is no panel node (no need to initialize lcdc
-*   encoder and lvds connector), or
-* - panel node is a bad pointer
+* bail out early if there is no panel node (no need to
+* initialize LCDC encoder and LVDS connector)
 */
panel_node = mdp4_detect_lcdc_panel(dev);
-   if (IS_ERR_OR_NULL(panel_node))
-   return PTR_ERR(panel_node);
+   if (!panel_node)
+   return 0;

encoder = mdp4_lcdc_encoder_init(dev, panel_node);
if (IS_ERR(encoder)) {
-- 
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[PATCH v2 0/4] drm/msm: HDMI support on IFC6410

2016-09-01 Thread Archit Taneja

This set adds the display DT parts for the APQ8064 based IFC6410 board.
There were a couple of small fixes/cleanups required in the driver to
use the correct bindings. Those are a part of this patchset too.

Changes in v2:
- Incorporated comments on HDMI gpio bindings as suggested by Rob H.

Archit Taneja (4):
  drm/msm/mdp4: Fix issue with LCDC/LVDS port parsing
  drm/msm/hdmi: Clean up HDMI gpio DT bindings
  arm: dts: qcom: apq8064: Add display DT nodes
  arm: dts: qcom: apq8064-ifc6410: Add HDMI support

 .../devicetree/bindings/display/msm/hdmi.txt   | 11 +--
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 74 ++
 arch/arm/boot/dts/qcom-apq8064.dtsi| 91 ++
 drivers/gpu/drm/msm/hdmi/hdmi.c| 21 -
 drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c| 23 +++---
 5 files changed, 202 insertions(+), 18 deletions(-)

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[PATCH v2] drm/sun4i: Clear encoder->bridge if a bridge is not found

2016-09-01 Thread Maxime Ripard

On Thu, Sep 01, 2016 at 02:13:32PM +0800, Chen-Yu Tsai wrote:
> The KMS helpers (drm_atomic_helper_check_modeset/mode_fixup) pass
> encoder->bridge directly to drm_bridge_mode_fixup, which expects a
> valid pointer, or NULL (in which case it just returns).
> 
> Clear encoder->bridge if a bridge is not found, instead of keeping
> the ERR_PTR value.
> 
> Since other drm_bridge functions also follow this pattern of checking
> for a non-NULL pointer, we can drop the ifs around the calls and just
> pass the pointer directly.
> 
> Fixes: 894f5a9f4b4a ("drm/sun4i: Add bridge support")
> Signed-off-by: Chen-Yu Tsai 

Applied, thanks!
Maxime

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[PATCH 7/7] ARM: sun8i: sina33: Enable display

2016-09-01 Thread Maxime Ripard

Enable the display pipeline with the associated 7" panel sold with the
SinA33.

Signed-off-by: Maxime Ripard 
---
 arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 34 ++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts 
b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
index fef6abc0a703..1fa2b5a80ec2 100644
--- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
+++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
@@ -61,6 +61,27 @@
chosen {
stdout-path = "serial0:115200n8";
};
+
+   panel {
+   compatible = "sinlinx,sina33-lcd-7";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port at 0 {
+   reg = <0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   panel_input: endpoint at 0 {
+   reg = <0>;
+   remote-endpoint = <_out_panel>;
+   };
+   };
+   };
+};
+
+ {
+   status = "okay";
 };

  {
@@ -207,6 +228,19 @@
regulator-name = "vcc-rtc";
 };

+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgb666_pins_a>;
+   status = "okay";
+};
+
+_out {
+   tcon0_out_panel: endpoint at 0 {
+   reg = <0>;
+   remote-endpoint = <_input>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_b>;
-- 
2.9.2

[PATCH 6/7] ARM: sun8i: a33: Add RGB666 pins

2016-09-01 Thread Maxime Ripard

The LCD output needs to be muxed. Add the proper pinctrl node.

Signed-off-by: Maxime Ripard 
---
 arch/arm/boot/dts/sun8i-a33.dtsi | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index 5f9dbd17eb50..d5f93c05846f 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -300,6 +300,16 @@
interrupts = ,
 ;

+   tcon0_rgb666_pins_a: tcon0_rgb666 at 0 {
+   allwinner,pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
+"PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
+"PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
+"PD24", "PD25", "PD26", "PD27";
+   allwinner,function = "lcd0";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
uart0_pins_b: uart0 at 1 {
allwinner,pins = "PB0", "PB1";
allwinner,function = "uart0";
-- 
2.9.2

[PATCH 5/7] ARM: sun8i: a33: Add display pipeline

2016-09-01 Thread Maxime Ripard

Add all the needed blocks to the A33 DTSI.

Signed-off-by: Maxime Ripard 
---
 arch/arm/boot/dts/sun8i-a33.dtsi | 184 +++
 1 file changed, 184 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index deb0cd613e97..5f9dbd17eb50 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -64,6 +64,42 @@
};

soc at 01c0 {
+   tcon0: lcd-controller at 01c0c000 {
+   compatible = "allwinner,sun8i-a23-tcon";
+   reg = <0x01c0c000 0x1000>;
+   interrupts = ;
+   clocks = < CLK_BUS_LCD>,
+< CLK_LCD_CH0>;
+   clock-names = "ahb",
+ "tcon-ch0";
+   clock-output-names = "tcon-pixel-clock";
+   resets = < RST_BUS_LCD>;
+   reset-names = "lcd";
+   status = "disabled";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   tcon0_in: port at 0 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0>;
+
+   tcon0_in_drc0: endpoint at 0 {
+   reg = <0>;
+   remote-endpoint = 
<_out_tcon0>;
+   };
+   };
+
+   tcon0_out: port at 1 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <1>;
+   };
+   };
+   };
+
crypto: crypto-engine at 01c15000 {
compatible = "allwinner,sun4i-a10-crypto";
reg = <0x01c15000 0x1000>;
@@ -104,6 +140,154 @@
status = "disabled";
#phy-cells = <1>;
};
+
+   fe0: display-frontend at 01e0 {
+   compatible = "allwinner,sun8i-a33-display-frontend";
+   reg = <0x01e0 0x2>;
+   interrupts = ;
+   clocks = < CLK_BUS_DE_FE>, < CLK_DE_FE>,
+< CLK_DRAM_DE_FE>;
+   clock-names = "ahb", "mod",
+ "ram";
+   resets = < RST_BUS_DE_FE>;
+   status = "disabled";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   fe0_out: port at 1 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <1>;
+
+   fe0_out_sat0: endpoint at 0 {
+   reg = <0>;
+   remote-endpoint = 
<_in_fe0>;
+   };
+   };
+   };
+   };
+
+   be0: display-backend at 01e6 {
+   compatible = "allwinner,sun8i-a33-display-backend";
+   reg = <0x01e6 0x1>;
+   clocks = < CLK_BUS_DE_BE>, < CLK_DE_BE>,
+< CLK_DRAM_DE_BE>;
+   clock-names = "ahb", "mod",
+ "ram";
+   resets = < RST_BUS_DE_BE>;
+
+   assigned-clocks = < CLK_DE_BE>;
+   assigned-clock-rates = <3>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   be0_in: port at 0 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0>;
+
+   be0_in_sat0: endpoint at 0 {
+   reg = <0>;
+   remote-endpoint = 
<_out_be0>;
+   };
+   };
+
+   be0_out: port at 1 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <1>;
+

[PATCH 4/7] drm/panel: Add Sinlinx SinA33 7" panel

2016-09-01 Thread Maxime Ripard

The SinA33 has an unidentified panel. Add the timings for it under a new
compatible.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/panel/panel-simple.c | 26 ++
 1 file changed, 26 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-simple.c 
b/drivers/gpu/drm/panel/panel-simple.c
index 85143d1b9b31..af142e804245 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -1409,6 +1409,29 @@ static const struct panel_desc shelly_sca07010_bfn_lnn = 
{
.bus_format = MEDIA_BUS_FMT_RGB666_1X18,
 };

+static const struct drm_display_mode sinlinx_sina33_lcd_7_mode = {
+   .clock = 66000,
+   .hdisplay = 1024,
+   .hsync_start = 1024 + 160,
+   .hsync_end = 1024 + 160 + 70,
+   .htotal = 1024 + 160 + 70 + 90,
+   .vdisplay = 600,
+   .vsync_start = 600 + 127,
+   .vsync_end = 600 + 127 + 20,
+   .vtotal = 600 + 127 + 20 + 3,
+   .vrefresh = 60,
+};
+
+static const struct panel_desc sinlinx_sina33_lcd_7 = {
+   .modes = _sina33_lcd_7_mode,
+   .num_modes = 1,
+   .size = {
+   .width = 154,
+   .height = 87,
+   },
+   .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
+};
+
 static const struct drm_display_mode starry_kr122ea0sra_mode = {
.clock = 147000,
.hdisplay = 1920,
@@ -1644,6 +1667,9 @@ static const struct of_device_id platform_of_match[] = {
.compatible = "shelly,sca07010-bfn-lnn",
.data = _sca07010_bfn_lnn,
}, {
+   .compatible = "sinlinx,sina33-lcd-7",
+   .data = _sina33_lcd_7,
+   }, {
.compatible = "starry,kr122ea0sra",
.data = _kr122ea0sra,
}, {
-- 
2.9.2

[PATCH 3/7] drm/sun4i: Add SAT and DRC drivers

2016-09-01 Thread Maxime Ripard

The A33 pipeline also has some new components called SAT and DRC. Even
though their exact features and programming model is not known (or
documented), they need to be clocked for the pipeline to carry the video
signal all the way.

Add minimal drivers for those that just claim the needed resources for the
pipeline to operate properly.

Signed-off-by: Maxime Ripard 
---
 .../bindings/display/sunxi/sun4i-drm.txt   |  37 +++
 drivers/gpu/drm/sun4i/Makefile |   3 +-
 drivers/gpu/drm/sun4i/sun6i_drc.c  | 117 +
 drivers/gpu/drm/sun4i/sun8i_sat.c  | 105 ++
 4 files changed, 261 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/sun4i/sun6i_drc.c
 create mode 100644 drivers/gpu/drm/sun4i/sun8i_sat.c

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt 
b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index d467ea93ac08..87c3c8dd34cb 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -51,6 +51,43 @@ Required properties:
   second the block connected to the TCON channel 1 (usually the TV
   encoder)

+SAT
+---
+
+The SAT, found in the A33, allows to do some color correction.
+
+Required properties:
+  - compatible: value must be one of:
+* allwinner,sun8i-a33-sat
+  - reg: base address and size of the memory-mapped region.
+  - clock: phandles to bus clock feeding the SAT
+  - resets: phandles to the reset line driving the SAT
+
+- ports: A ports node with endpoint definitions as defined in
+  Documentation/devicetree/bindings/media/video-interfaces.txt. The
+  first port should be the input endpoints, the second one the outputs
+
+DRC
+---
+
+The DRC, found in the latest Allwinner SoCs (A31, A23, A33), allows to
+do some backlight control to enhance the power consumption.
+
+Required properties:
+  - compatible: value must be one of:
+* allwinner,sun8i-a33-drc
+  - reg: base address and size of the memory-mapped region.
+  - interrupts: interrupt associated to this IP
+  - clocks: phandles to the clocks feeding the DRC
+* ahb: the DRC interface clock
+* mod: the DRC module clock
+* ram: the DRC DRAM clock
+  - clock-names: the clock names mentioned above
+  - resets: phandles to the reset line driving the DRC
+
+- ports: A ports node with endpoint definitions as defined in
+  Documentation/devicetree/bindings/media/video-interfaces.txt. The
+  first port should be the input endpoints, the second one the outputs

 Display Engine Backend
 --
diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index 58cd55149827..f1d208941a43 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -9,5 +9,6 @@ sun4i-tcon-y += sun4i_dotclock.o

 obj-$(CONFIG_DRM_SUN4I)+= sun4i-drm.o sun4i-tcon.o
 obj-$(CONFIG_DRM_SUN4I)+= sun4i_backend.o
-
+obj-$(CONFIG_DRM_SUN4I)+= sun6i_drc.o
+obj-$(CONFIG_DRM_SUN4I)+= sun8i_sat.o
 obj-$(CONFIG_DRM_SUN4I)+= sun4i_tv.o
diff --git a/drivers/gpu/drm/sun4i/sun6i_drc.c 
b/drivers/gpu/drm/sun4i/sun6i_drc.c
new file mode 100644
index ..93ded536876b
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/sun6i_drc.c
@@ -0,0 +1,117 @@
+/*
+ * Copyright (C) 2016 Free Electrons
+ *
+ * Maxime Ripard 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct sun6i_drc {
+   struct clk  *bus_clk;
+   struct clk  *mod_clk;
+   struct reset_control*reset;
+};
+
+static int sun6i_drc_bind(struct device *dev, struct device *master,
+void *data)
+{
+   struct sun6i_drc *drc;
+   int ret;
+
+   drc = devm_kzalloc(dev, sizeof(*drc), GFP_KERNEL);
+   if (!drc)
+   return -ENOMEM;
+   dev_set_drvdata(dev, drc);
+
+   drc->reset = devm_reset_control_get(dev, NULL);
+   if (IS_ERR(drc->reset)) {
+   dev_err(dev, "Couldn't get our reset line\n");
+   return PTR_ERR(drc->reset);
+   }
+
+   ret = reset_control_deassert(drc->reset);
+   if (ret) {
+   dev_err(dev, "Couldn't deassert our reset line\n");
+   return ret;
+   }
+
+   drc->bus_clk = devm_clk_get(dev, "ahb");
+   if (IS_ERR(drc->bus_clk)) {
+   dev_err(dev, "Couldn't get our bus clock\n");
+   ret = PTR_ERR(drc->bus_clk);
+   goto err_assert_reset;
+   }
+   clk_prepare_enable(drc->bus_clk);
+
+   drc->mod_clk = devm_clk_get(dev, "mod");
+   if

[PATCH 2/7] drm/sun4i: support A33 tcon

2016-09-01 Thread Maxime Ripard

The A33 has a significantly different pipeline, with components that differ
too.

Make sure we had compatible for them.

Signed-off-by: Maxime Ripard 
---
 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 7 ++-
 drivers/gpu/drm/sun4i/sun4i_backend.c | 1 +
 drivers/gpu/drm/sun4i/sun4i_drv.c | 8 +---
 drivers/gpu/drm/sun4i/sun4i_tcon.c| 8 +++-
 4 files changed, 19 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt 
b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index df8f4aeefe4c..d467ea93ac08 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -26,7 +26,9 @@ TCON
 The TCON acts as a timing controller for RGB, LVDS and TV interfaces.

 Required properties:
- - compatible: value should be "allwinner,sun5i-a13-tcon".
+ - compatible: value must be either:
+   * allwinner,sun5i-a13-tcon
+   * allwinner,sun8i-a23-tcon
  - reg: base address and size of memory-mapped region
  - interrupts: interrupt associated to this IP
  - clocks: phandles to the clocks feeding the TCON. Three are needed:
@@ -59,6 +61,7 @@ system.
 Required properties:
   - compatible: value must be one of:
 * allwinner,sun5i-a13-display-backend
+* allwinner,sun8i-a33-display-backend
   - reg: base address and size of the memory-mapped region.
   - clocks: phandles to the clocks feeding the frontend and backend
 * ahb: the backend interface clock
@@ -80,6 +83,7 @@ deinterlacing and color space conversion.
 Required properties:
   - compatible: value must be one of:
 * allwinner,sun5i-a13-display-frontend
+* allwinner,sun8i-a33-display-frontend
   - reg: base address and size of the memory-mapped region.
   - interrupts: interrupt associated to this IP
   - clocks: phandles to the clocks feeding the frontend and backend
@@ -104,6 +108,7 @@ extra node.
 Required properties:
   - compatible: value must be one of:
 * allwinner,sun5i-a13-display-engine
+* allwinner,sun8i-a33-display-engine

   - allwinner,pipelines: list of phandle to the display engine
 frontends available.
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c 
b/drivers/gpu/drm/sun4i/sun4i_backend.c
index 3ab560450a82..9bfd2e45fceb 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -345,6 +345,7 @@ static int sun4i_backend_remove(struct platform_device 
*pdev)

 static const struct of_device_id sun4i_backend_of_table[] = {
{ .compatible = "allwinner,sun5i-a13-display-backend" },
+   { .compatible = "allwinner,sun8i-a33-display-backend" },
{ }
 };
 MODULE_DEVICE_TABLE(of, sun4i_backend_of_table);
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c 
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 942f62e2441c..26431c2b5670 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -199,13 +199,14 @@ static const struct component_master_ops 
sun4i_drv_master_ops = {

 static bool sun4i_drv_node_is_frontend(struct device_node *node)
 {
-   return of_device_is_compatible(node,
-  "allwinner,sun5i-a13-display-frontend");
+   return of_device_is_compatible(node, 
"allwinner,sun5i-a13-display-frontend") ||
+   of_device_is_compatible(node, 
"allwinner,sun8i-a33-display-frontend");
 }

 static bool sun4i_drv_node_is_tcon(struct device_node *node)
 {
-   return of_device_is_compatible(node, "allwinner,sun5i-a13-tcon");
+   return of_device_is_compatible(node, "allwinner,sun5i-a13-tcon") ||
+   of_device_is_compatible(node, "allwinner,sun8i-a23-tcon");
 }

 static int compare_of(struct device *dev, void *data)
@@ -320,6 +321,7 @@ static int sun4i_drv_remove(struct platform_device *pdev)

 static const struct of_device_id sun4i_drv_of_table[] = {
{ .compatible = "allwinner,sun5i-a13-display-engine" },
+   { .compatible = "allwinner,sun8i-a33-display-engine" },
{ }
 };
 MODULE_DEVICE_TABLE(of, sun4i_drv_of_table);
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c 
b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index fde6af1230d2..078328193168 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -488,8 +488,13 @@ static int sun4i_tcon_bind(struct device *dev, struct 
device *master,
tcon->drm = drm;
tcon->dev = dev;

-   if (of_device_is_compatible(dev->of_node, "allwinner,sun5i-a13-tcon"))
+   if (of_device_is_compatible(dev->of_node, "allwinner,sun5i-a13-tcon")) {
tcon->has_mux = true;
+   tcon->has_channel_1 = true;
+   } else {
+   tcon->has_mux = false;
+   tcon->has_channel_1 = false;
+   }

tcon->lcd_rst = devm_reset_control_get(dev, "lcd");
if (IS_ERR(tcon->lcd_rst)) {
@@ -585,6 +590,7

[PATCH 1/7] drm/sun4i: support TCONs without channel 1

2016-09-01 Thread Maxime Ripard

Some Allwinner SoCs, such as the A33, have a variation of the TCON that
doesn't have a second channel (or it is not wired to anything).

Make sure we can handle that case.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_tcon.c | 34 +-
 drivers/gpu/drm/sun4i/sun4i_tcon.h |  2 ++
 2 files changed, 23 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c 
b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index 9180e7e7b551..fde6af1230d2 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -59,11 +59,13 @@ void sun4i_tcon_channel_disable(struct sun4i_tcon *tcon, 
int channel)
regmap_update_bits(tcon->regs, SUN4I_TCON0_CTL_REG,
   SUN4I_TCON0_CTL_TCON_ENABLE, 0);
clk_disable_unprepare(tcon->dclk);
-   } else if (channel == 1) {
-   regmap_update_bits(tcon->regs, SUN4I_TCON1_CTL_REG,
-  SUN4I_TCON1_CTL_TCON_ENABLE, 0);
-   clk_disable_unprepare(tcon->sclk1);
+   return;
}
+
+   WARN_ON(!tcon->has_channel_1);
+   regmap_update_bits(tcon->regs, SUN4I_TCON1_CTL_REG,
+  SUN4I_TCON1_CTL_TCON_ENABLE, 0);
+   clk_disable_unprepare(tcon->sclk1);
 }
 EXPORT_SYMBOL(sun4i_tcon_channel_disable);

@@ -75,12 +77,14 @@ void sun4i_tcon_channel_enable(struct sun4i_tcon *tcon, int 
channel)
   SUN4I_TCON0_CTL_TCON_ENABLE,
   SUN4I_TCON0_CTL_TCON_ENABLE);
clk_prepare_enable(tcon->dclk);
-   } else if (channel == 1) {
-   regmap_update_bits(tcon->regs, SUN4I_TCON1_CTL_REG,
-  SUN4I_TCON1_CTL_TCON_ENABLE,
-  SUN4I_TCON1_CTL_TCON_ENABLE);
-   clk_prepare_enable(tcon->sclk1);
+   return;
}
+
+   WARN_ON(!tcon->has_channel_1);
+   regmap_update_bits(tcon->regs, SUN4I_TCON1_CTL_REG,
+  SUN4I_TCON1_CTL_TCON_ENABLE,
+  SUN4I_TCON1_CTL_TCON_ENABLE);
+   clk_prepare_enable(tcon->sclk1);
 }
 EXPORT_SYMBOL(sun4i_tcon_channel_enable);

@@ -198,6 +202,8 @@ void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon,
u8 clk_delay;
u32 val;

+   WARN_ON(!tcon->has_channel_1);
+
/* Adjust clock delay */
clk_delay = sun4i_tcon_get_clk_delay(mode, 1);
regmap_update_bits(tcon->regs, SUN4I_TCON1_CTL_REG,
@@ -321,10 +327,12 @@ static int sun4i_tcon_init_clocks(struct device *dev,
return PTR_ERR(tcon->sclk0);
}

-   tcon->sclk1 = devm_clk_get(dev, "tcon-ch1");
-   if (IS_ERR(tcon->sclk1)) {
-   dev_err(dev, "Couldn't get the TCON channel 1 clock\n");
-   return PTR_ERR(tcon->sclk1);
+   if (tcon->has_channel_1) {
+   tcon->sclk1 = devm_clk_get(dev, "tcon-ch1");
+   if (IS_ERR(tcon->sclk1)) {
+   dev_err(dev, "Couldn't get the TCON channel 1 clock\n");
+   return PTR_ERR(tcon->sclk1);
+   }
}

return sun4i_dclk_create(dev, tcon);
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h 
b/drivers/gpu/drm/sun4i/sun4i_tcon.h
index 100bfa093277..12bd48925f4d 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
@@ -164,6 +164,8 @@ struct sun4i_tcon {
boolhas_mux;

struct drm_panel*panel;
+
+   boolhas_channel_1;
 };

 struct drm_bridge *sun4i_tcon_find_bridge(struct device_node *node);
-- 
2.9.2

[PATCH 0/7] drm/sun4i: Introduce A33 display driver

2016-09-01 Thread Maxime Ripard

Hi everyone,

This serie introduces the support in the sun4i-drm driver for the A33.

Beside the new IPs and special cases for the A33 new IPs, there's
nothing really outstanding, and is now at feature parity with the A13.

This serie is based on my A33 CCU patches posted earlier today here:
http://lists.infradead.org/pipermail/linux-arm-kernel/2016-September/453208.html

Let me know what you think,
Maxime

Maxime Ripard (7):
  drm/sun4i: support TCONs without channel 1
  drm/sun4i: support A33 tcon
  drm/sun4i: Add SAT and DRC drivers
  drm/panel: Add Sinlinx SinA33 7" panel
  ARM: sun8i: a33: Add display pipeline
  ARM: sun8i: a33: Add RGB666 pins
  ARM: sun8i: sina33: Enable display

 .../bindings/display/sunxi/sun4i-drm.txt   |  44 -
 arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts |  34 
 arch/arm/boot/dts/sun8i-a33.dtsi   | 194 +
 drivers/gpu/drm/panel/panel-simple.c   |  26 +++
 drivers/gpu/drm/sun4i/Makefile |   3 +-
 drivers/gpu/drm/sun4i/sun4i_backend.c  |   1 +
 drivers/gpu/drm/sun4i/sun4i_drv.c  |   8 +-
 drivers/gpu/drm/sun4i/sun4i_tcon.c |  42 +++--
 drivers/gpu/drm/sun4i/sun4i_tcon.h |   2 +
 drivers/gpu/drm/sun4i/sun6i_drc.c  | 117 +
 drivers/gpu/drm/sun4i/sun8i_sat.c  | 105 +++
 11 files changed, 557 insertions(+), 19 deletions(-)
 create mode 100644 drivers/gpu/drm/sun4i/sun6i_drc.c
 create mode 100644 drivers/gpu/drm/sun4i/sun8i_sat.c

-- 
2.9.2

[PATCH RFC] drm: Fix property handling for mode object without object type

2016-09-01 Thread Jyri Sarha

Fix property handling for mode object without mode object type.
drm_property_change_valid_get() crashes if atomic ioctl for mode
object does not specify the mode object type. This patch makes
drm_property_change_valid_get() to tolerate such requests.

Signed-off-by: Jyri Sarha 
---

This used to work in v4.8, but I have no idea if this is a right fix
or should we just gracefully reject ioctls to mode object properties
without mode object type. In such a case we need to fix our test tool [1].

[1] https://github.com/tomba/kmsxx

 drivers/gpu/drm/drm_property.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_property.c b/drivers/gpu/drm/drm_property.c
index 4139afb..67261a2 100644
--- a/drivers/gpu/drm/drm_property.c
+++ b/drivers/gpu/drm/drm_property.c
@@ -877,7 +877,9 @@ bool drm_property_change_valid_get(struct drm_property 
*property,
return true;

*ref = __drm_mode_object_find(property->dev, value,
- property->values[0]);
+ property->num_values ?
+ property->values[0] :
+ DRM_MODE_OBJECT_ANY);
return *ref != NULL;
}

-- 
1.9.1

[PATCH RFC] ARM: dts: samsung: add rga-lvds panel in itop elite

2016-09-01 Thread Ayaka



å¾æç iPad å³é
Thank you
> Andrzej Hajda  æ¼ 2016å¹´9æ1æ¥ ä¸å3:04 
> å¯«éï¼
> 
>> On 08/31/2016 07:55 PM, ayaka wrote:
>> 
>>> On 08/31/2016 08:30 PM, Andrzej Hajda wrote:
>>> Hi,
>>> 
>>> 
 On 08/30/2016 12:50 AM, Randy Li wrote:
 It is actually a lvds panel connected through a rga-lvds bridge.
 But I really have no idea about what does a port mean in fimd node.
 
 Also how should I configure this panel size? I think the i2c found
 on the panel schematic, but it more likely to be used a touch screen
 touth. Also the touch screen is not supported in currently driver.
 
 Signed-off-by: Randy Li 
 ---
  arch/arm/boot/dts/exynos4412-itop-elite.dts | 35 
 ++---
  1 file changed, 32 insertions(+), 3 deletions(-)
 
 diff --git a/arch/arm/boot/dts/exynos4412-itop-elite.dts 
 b/arch/arm/boot/dts/exynos4412-itop-elite.dts
 index e1cda54..2d67385 100644
 --- a/arch/arm/boot/dts/exynos4412-itop-elite.dts
 +++ b/arch/arm/boot/dts/exynos4412-itop-elite.dts
 @@ -139,6 +139,20 @@
  assigned-clocks = < CLK_MOUT_CAM0>;
  assigned-clock-parents = < CLK_XUSBXTI>;
  };
 +
 +vcc_sys_lcd: sys-lcd {
 +compatible = "regulator-fixed";
 +regulator-name = "vcc_5v";
 +regulator-min-microvolt = <500>;
 +regulator-max-microvolt = <500>;
 +gpio = < 4 GPIO_ACTIVE_HIGH>;
 +};
 +
 +panel: panel {
 +ddc-i2c-bus = <_3>;
 +power-supply = <_sys_lcd>;
 +enable-gpios = < 2 GPIO_ACTIVE_HIGH>;
 +};
>>> Panel has no compatible string, which driver will handle this node?
>> The problem is that, it is panel not supported by kernel. 
> 
> For simple panel you can take a look at [1][2]. Ie. if the panel needs
> only power supply and enable gpio, you just need to add few lines to [2].
But I still don't know which compatible string I should use, "simple-dpi" ?
> 
> 
> [1]: Documentation/devicetree/bindings/display/panel/simple-panel.txt
> [2]: drivers/gpu/drm/panel/panel-simple.c
> 
>> Is it possible 
>> to support without adding a new driver for it ? I know there is a 
>> simple-dpi for MIPI, but what is for parallel video or lvds?
> 
> simple-dpi is just parallel output. LVDS is not supported by Exynos4412 but
> boards usually have RGB/LVDS bridge for such panels, I have no access to
> itop
> board schematics, but I suppose it has such bridge. LVDS bridges often
> do not
> need Linux driver, so from developer point of view LVDS panels with such
> bridge
Yes it is.
> are handled the same way as RGB panels. Example fimd bindings for RGB panels
> are in [3].
> 
> [3]: arch/arm/boot/dts/exynos4210-universal_c210.dts
> 
Would it appear as a frame buffer device in Linux ? Regard of display timings, 
I could solve it later. If the frame buffer node is created, I could know I 
have a way to test.
>>> Regards
>>> Andrzej
>> The other problem is that I don't how to configure the display-times, 
>> the datasheet for CLAA070WP03XG only talk about total time, active time 
>> and blank time for both Horizontal an Vertical time. Does it mean the 
>> front-porch and sync-len for horizontal and vertical are zero ?
> 
> You can look at vendor's code.
It is a very old kernel. But it seems that they didn't configure the fimd but 
the frame buffer.
> Or just experiment with different values.
> The equation is: total=active+back_porch+blank+front_porch.
> So if htotal=864, hactive=800, hblank=64, then hporches are 0.
> In case of vtotal=1288, vactive=1200, vblank=8 you have left 80 for porches,
> you can try to split them equally for front and back for starters.
But timings diagram in data sheet doesn't look like that, I have asked the 
vendor for some help, I hope I could get a reply from the vendor.
> 
> Regards
> Andrzej
> 
>> 
>> +   ports {
>> +   #address-cells = <1>;
>> +   #size-cells = <0>;
>> +   port at 3 {
>> +   reg = <3>;
>> +   rga_lvds: endpoint {
>> +   remote-endpoint = <>;
>> +   };
>> +   };
>> +   };
>> +
>> +   panel: panel at 0 {
>> +   compatible = "panel-simple";
>> +
>> +   power-supply = <_sys_lcd>;
>> +   enable-gpios = < 2 GPIO_ACTIVE_HIGH>;
>> +   display-timings {
>> +   timing-0 {
>> +   clock-frequency = <6677>;
>> +   hactive = <800>;
>> +   vactive = <1280>;
>> +   hfront-porch = <0>;
>> +   hback-porch = <64>;
>> +   hsync-len = <0>;
>> +   vfront-porch = <0>;
>> +   vback-porch = <8>;
>> +

[PATCH libdrm] modetest: add mediatek to module list

2016-09-01 Thread Emil Velikov

On 1 September 2016 at 02:48, Nicolas Boichat  wrote:
> From: Daniel Kurtz 
>
> There is a mediatek drm kms driver: Add "mediatek" to the static
> lists of driver names.
>
Pushed as well as the modetest patch. Thanks !

Can I interest you in adding support for platform devices in the DRM
device API ?
It will help us nuke all of these and any future ones.

If you're wondering what information it should provide I'm leaning
towards - enough to be able to construct a libudev id_path_tag-like
string. Although if you have anything else in mind please go ahead.
You can check what we provide for PCI devices via tests/drmdevice.c

Thanks
EmIl

[PATCH 2/3] drm/bridge: adv7533: Initialize regulators

2016-09-01 Thread Archit Taneja



On 09/01/2016 02:00 AM, Laurent Pinchart wrote:
> Hi Archit,
>
> On Wednesday 31 Aug 2016 22:24:30 Archit Taneja wrote:
>> On 8/31/2016 9:23 PM, Laurent Pinchart wrote:
>>> On Wednesday 31 Aug 2016 16:22:09 Archit Taneja wrote:
 ADV7533 requires supply to the AVDD, V1P2 and V3P3 pins for proper
 functionality.

 Initialize and enable the regulators during probe itself. Controlling
 these dynamically is left for later.
>>>
>>> You should document the power supplies in the DT bindings.
>>
>> The DT bindings doc update was a part of the same series. I accidentally
>> Cc'd you only for this patch.
>
> No worries. What's the patch's subject ?

It is: dt-bindings: drm/bridge: adv7511: Add regulators for ADV7533

https://patchwork.kernel.org/patch/9306945/

Thanks,
Archit

>
 Cc: dri-devel at lists.freedesktop.org
 Cc: Laurent Pinchart 
 Signed-off-by: Archit Taneja 
 ---

drivers/gpu/drm/bridge/adv7511/adv7511.h | 16 ++
drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 34 +++--
drivers/gpu/drm/bridge/adv7511/adv7533.c | 45 +
3 files changed, 86 insertions(+), 9 deletions(-)
>

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

[PATCH] drm: expand cea861 mode timing table

2016-09-01 Thread Harry Wentland

Bumping this one up again. This patch is fairly contained and is a 
pre-requisite for drivers that want 4k at 60 mode support on HDMI.

-Harry

On 2016-05-13 06:44 PM, Eric Yang wrote:
> This patch expand the cea861 mode timing table to include vic 65
> to 107. This allows more modes to be reported on newer displays,
> including 4k at 60Hz on HDMI, which was previously only reported if
> the display edid has a detailed timing descriptor block specifying
> the exact timing
>
> v2:
> - fix formating of the added modes to match the existing onces
>
> Signed-off-by: Eric Yang 
> ---
>   drivers/gpu/drm/drm_edid.c | 215 
> +
>   drivers/video/hdmi.c   |   4 +
>   include/linux/hdmi.h   |   2 +
>   3 files changed, 221 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 04cb487..4fb69ee 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -988,6 +988,221 @@ static const struct drm_display_mode edid_cea_modes[] = 
> {
>  2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
>  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
>.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 65 - 1280x720 at 24Hz */
> + { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59341, 1280, 3040,
> +3080, 3300, 0, 720, 725, 730, 750, 0,
> +DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> +   .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 66 - 1280x720 at 25Hz */
> + { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
> +3740, 3960, 0, 720, 725, 730, 750, 0,
> +DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> +   .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 67 - 1280x720 at 30Hz */
> + { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74176, 1280, 3040,
> +3080, 3300, 0, 720, 725, 730, 750, 0,
> +DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> +   .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 68 - 1280x720 at 50Hz */
> + { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
> +1760, 1980, 0, 720, 725, 730, 750, 0,
> +DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> +   .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 69 - 1280x720 at 60Hz */
> + { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74176, 1280, 1390,
> +1430, 1650, 0, 720, 725, 730, 750, 0,
> +DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> +   .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 70 - 1280x720 at 100Hz */
> + { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
> +1760, 1980, 0, 720, 725, 730, 750, 0,
> +DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> +   .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 71 - 1280x720 at 120Hz */
> + { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148352, 1280, 1390,
> +1430, 1650, 0, 720, 725, 730, 750, 0,
> +DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> +   .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 72 - 1920x1080 at 24Hz */
> + { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74176, 1920, 2558,
> +2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
> +DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> +   .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 73 - 1920x1080 at 25Hz */
> + { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
> +2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
> +DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> +   .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 74 - 1920x1080 at 30Hz */
> + { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74176, 1920, 2008,
> +2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
> +DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> +   .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 75 - 1920x1080 at 50Hz */
> + { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
> +2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
> +DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> +   .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 76 - 1920x1080 at 60Hz */
> + { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148352, 1920, 2008,
> +2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
> +DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> +   .vrefresh = 60, .picture_aspect_ratio =

[Bug 89746] Mesa and LLVM 3.6+ break opengl for genymotion

2016-09-01 Thread bugzilla-dae...@freedesktop.org

https://bugs.freedesktop.org/show_bug.cgi?id=89746

--- Comment #20 from Emil Velikov  ---
Darek, please open a separate bug for your issue.

In general using "export LIBGL_DEBUG=verbose" and/or "export LD_DEBUG=libs"
allows everyone to see a bit more about which libraries are picked and why
things are failing. It's worth adding some of that in the report.

-- 
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[PATCH 6/6] drm: cleanup drm_core_{init,exit}()

2016-09-01 Thread David Herrmann

Various cleanups to the DRM core initialization and exit handlers:

 - Register chrdev last: Once register_chrdev() returns, open() will
   succeed on the given chrdevs. This is usually not an issue, as no
   chardevs are registered, yet. However, nodes can be created by
   user-space via mknod(2), even though such major/minor combinations are
   unknown to the kernel. Avoid calling into drm_stub_open() in those
   cases.
   Again, drm_stub_open() would just bail out as the inode is unknown,
   but it's really non-obvious if you hack on drm_stub_open().

 - Unify error-paths into just one label. All the error-path helpers can
   be called even though the constructors were not called yet, or failed.
   Hence, just call all cleanups unconditionally.

 - Call into drm_global_release(). This is a no-op, but provides
   debugging helpers in case there're GLOBALS left on module unload. This
   function was unused until now.

 - Use DRM_ERROR() instead of printk(), and also print the error-code on
   failure (even if it is static!).

 - Don't throw away error-codes of register_chrdev()!

 - Don't hardcode -1 as errno. This is just plain wrong.

 - Order exit-handlers in the exact reverse order of initialization
   (except if the order actually matters for syncing-reasons, which is
   not the case here, though).

v2:
 - Call drm_core_exit() directly from the init-error-handler. Requires to
   drop __exit annotation, though.

Signed-off-by: David Herrmann 
---
 drivers/gpu/drm/drm_drv.c | 48 ++-
 1 file changed, 22 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index d771453..0773547 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -941,52 +941,48 @@ static const struct file_operations drm_stub_fops = {
.llseek = noop_llseek,
 };

+static void drm_core_exit(void)
+{
+   unregister_chrdev(DRM_MAJOR, "drm");
+   debugfs_remove(drm_debugfs_root);
+   drm_sysfs_destroy();
+   idr_destroy(_minors_idr);
+   drm_connector_ida_destroy();
+   drm_global_release();
+}
+
 static int __init drm_core_init(void)
 {
-   int ret = -ENOMEM;
+   int ret;

drm_global_init();
drm_connector_ida_init();
idr_init(_minors_idr);

-   if (register_chrdev(DRM_MAJOR, "drm", _stub_fops))
-   goto err_p1;
-
ret = drm_sysfs_init();
if (ret < 0) {
-   printk(KERN_ERR "DRM: Error creating drm class.\n");
-   goto err_p2;
+   DRM_ERROR("Cannot create DRM class: %d\n", ret);
+   goto error;
}

drm_debugfs_root = debugfs_create_dir("dri", NULL);
if (!drm_debugfs_root) {
-   DRM_ERROR("Cannot create /sys/kernel/debug/dri\n");
-   ret = -1;
-   goto err_p3;
+   ret = -ENOMEM;
+   DRM_ERROR("Cannot create debugfs-root: %d\n", ret);
+   goto error;
}

+   ret = register_chrdev(DRM_MAJOR, "drm", _stub_fops);
+   if (ret < 0)
+   goto error;
+
DRM_INFO("Initialized\n");
return 0;
-err_p3:
-   drm_sysfs_destroy();
-err_p2:
-   unregister_chrdev(DRM_MAJOR, "drm");

-   idr_destroy(_minors_idr);
-err_p1:
+error:
+   drm_core_exit();
return ret;
 }

-static void __exit drm_core_exit(void)
-{
-   debugfs_remove(drm_debugfs_root);
-   drm_sysfs_destroy();
-
-   unregister_chrdev(DRM_MAJOR, "drm");
-
-   drm_connector_ida_destroy();
-   idr_destroy(_minors_idr);
-}
-
 module_init(drm_core_init);
 module_exit(drm_core_exit);
-- 
2.9.3

[PATCH 5/6] drm: drop obsolete drm_core.h

2016-09-01 Thread David Herrmann

The drm_core.h header contains a set of constants meant to be used
throughout DRM. However, as it turns out, they're each used just once and
don't bring any benefit. They're also grossly mis-named and lack
name-spacing. This patch inlines them, or moves them into drm_internal.h
as appropriate:

 - CORE_AUTHOR and CORE_DESC are inlined into corresponding MODULE_*()
   macros. It's just confusing having to follow 2 pointers when trying to
   find the definition of these fields. Grep'ping for MODULE_AUTHOR()
   should reveal the full information, if there's no strong reason not to.

 - CORE_NAME, CORE_DATE, CORE_MAJOR, CORE_MINOR, and CORE_PATCHLEVEL are
   inlined into the sysfs 'version' attribute. They're stripped
   everywhere else (which is just some printk() statements). CORE_NAME
   just doesn't make *any* sense, as we hard-code it in many places,
   anyway. The other constants are outdated and just serve
   binary-compatibility purposes. Hence, inline them in 'version' sysfs
   attribute (we might even try dropping it..).

 - DRM_IF_MAJOR and DRM_IF_MINOR are moved into drm_internal.h as they're
   only used by the global ioctl handlers. Furthermore, versioning
   interfaces breaks backports and as such is deprecated, anyway. We just
   keep them for historic reasons. I doubt anyone will ever modify them
   again.

Signed-off-by: David Herrmann 
---
 drivers/gpu/drm/drm_drv.c  |  8 +++-
 drivers/gpu/drm/drm_internal.h |  3 +++
 drivers/gpu/drm/drm_ioc32.c|  1 -
 drivers/gpu/drm/drm_ioctl.c|  1 -
 drivers/gpu/drm/drm_sysfs.c|  8 +---
 include/drm/drm_core.h | 34 --
 6 files changed, 7 insertions(+), 48 deletions(-)
 delete mode 100644 include/drm/drm_core.h

diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 9ab0016..d771453 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -33,7 +33,6 @@
 #include 
 #include 
 #include 
-#include 
 #include "drm_crtc_internal.h"
 #include "drm_legacy.h"
 #include "drm_internal.h"
@@ -46,8 +45,8 @@
 unsigned int drm_debug = 0;
 EXPORT_SYMBOL(drm_debug);

-MODULE_AUTHOR(CORE_AUTHOR);
-MODULE_DESCRIPTION(CORE_DESC);
+MODULE_AUTHOR("Gareth Hughes, Leif Delgass, JosÃ© Fonseca, Jon Smirl");
+MODULE_DESCRIPTION("DRM shared core routines");
 MODULE_LICENSE("GPL and additional rights");
 MODULE_PARM_DESC(debug, "Enable debug output, where each bit enables a debug 
category.\n"
 "\t\tBit 0 (0x01) will enable CORE messages (drm core code)\n"
@@ -966,8 +965,7 @@ static int __init drm_core_init(void)
goto err_p3;
}

-   DRM_INFO("Initialized %s %d.%d.%d %s\n",
-CORE_NAME, CORE_MAJOR, CORE_MINOR, CORE_PATCHLEVEL, CORE_DATE);
+   DRM_INFO("Initialized\n");
return 0;
 err_p3:
drm_sysfs_destroy();
diff --git a/drivers/gpu/drm/drm_internal.h b/drivers/gpu/drm/drm_internal.h
index 9b66cc4..3d6a587 100644
--- a/drivers/gpu/drm/drm_internal.h
+++ b/drivers/gpu/drm/drm_internal.h
@@ -21,6 +21,9 @@
  * OTHER DEALINGS IN THE SOFTWARE.
  */

+#define DRM_IF_MAJOR 1
+#define DRM_IF_MINOR 4
+
 /* drm_irq.c */
 extern unsigned int drm_timestamp_monotonic;

diff --git a/drivers/gpu/drm/drm_ioc32.c b/drivers/gpu/drm/drm_ioc32.c
index 57676f8..2795d6a 100644
--- a/drivers/gpu/drm/drm_ioc32.c
+++ b/drivers/gpu/drm/drm_ioc32.c
@@ -32,7 +32,6 @@
 #include 

 #include 
-#include 

 #define DRM_IOCTL_VERSION32DRM_IOWR(0x00, drm_version32_t)
 #define DRM_IOCTL_GET_UNIQUE32 DRM_IOWR(0x01, drm_unique32_t)
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index bc5c65e..845390f 100644
--- a/drivers/gpu/drm/drm_ioctl.c
+++ b/drivers/gpu/drm/drm_ioctl.c
@@ -29,7 +29,6 @@
  */

 #include 
-#include 
 #include 
 #include "drm_legacy.h"
 #include "drm_internal.h"
diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
index 32dd821..9a37196 100644
--- a/drivers/gpu/drm/drm_sysfs.c
+++ b/drivers/gpu/drm/drm_sysfs.c
@@ -19,7 +19,6 @@
 #include 

 #include 
-#include 
 #include 
 #include "drm_internal.h"

@@ -37,12 +36,7 @@ static char *drm_devnode(struct device *dev, umode_t *mode)
return kasprintf(GFP_KERNEL, "dri/%s", dev_name(dev));
 }

-static CLASS_ATTR_STRING(version, S_IRUGO,
-   CORE_NAME " "
-   __stringify(CORE_MAJOR) "."
-   __stringify(CORE_MINOR) "."
-   __stringify(CORE_PATCHLEVEL) " "
-   CORE_DATE);
+static CLASS_ATTR_STRING(version, S_IRUGO, "drm 1.1.0 20060810");

 /**
  * drm_sysfs_init - initialize sysfs helpers
diff --git a/include/drm/drm_core.h b/include/drm/drm_core.h
deleted file mode 100644
index 4e75238..000
--- a/include/drm/drm_core.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright 2004 Jon Smirl 
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software

[PATCH 4/6] drm: provide management functions for drm_file

2016-09-01 Thread David Herrmann

Rather than doing drm_file allocation/destruction right in the fops, lets
provide separate helpers. This decouples drm_file management from the
still-mandatory drm-fops. It prepares for use of drm_file without the
fops, both by possible separate fops implementations and APIs (not that I
am aware of any such plans), and more importantly from in-kernel use where
no real file is available.

Signed-off-by: David Herrmann 
---
 drivers/gpu/drm/drm_drv.c  | 135 +
 drivers/gpu/drm/drm_fops.c | 132 +++-
 drivers/gpu/drm/drm_internal.h |   4 ++
 3 files changed, 147 insertions(+), 124 deletions(-)

diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 57ce973..9ab0016 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -95,6 +95,141 @@ void drm_ut_debug_printk(const char *function_name, const 
char *format, ...)
 }
 EXPORT_SYMBOL(drm_ut_debug_printk);

+/**
+ * drm_file_alloc - allocate file context
+ * @minor: minor to allocate on
+ *
+ * This allocates a new DRM file context. It is not linked into any context and
+ * can be used by the caller freely. Note that the context keeps a pointer to
+ * @minor, so it must be freed before @minor is.
+ *
+ * The legacy paths might require the drm_global_mutex to be held.
+ *
+ * RETURNS:
+ * Pointer to newly allocated context, ERR_PTR on failure.
+ */
+struct drm_file *drm_file_alloc(struct drm_minor *minor)
+{
+   struct drm_device *dev = minor->dev;
+   struct drm_file *file;
+   int ret;
+
+   file = kzalloc(sizeof(*file), GFP_KERNEL);
+   if (!file)
+   return ERR_PTR(-ENOMEM);
+
+   file->pid = get_pid(task_pid(current));
+   file->minor = minor;
+   file->authenticated = capable(CAP_SYS_ADMIN); /* legacy compat */
+   INIT_LIST_HEAD(>lhead);
+   INIT_LIST_HEAD(>fbs);
+   mutex_init(>fbs_lock);
+   INIT_LIST_HEAD(>blobs);
+   INIT_LIST_HEAD(>pending_event_list);
+   INIT_LIST_HEAD(>event_list);
+   init_waitqueue_head(>event_wait);
+   file->event_space = 4096; /* set aside 4k for event buffer */
+   mutex_init(>event_read_lock);
+
+   if (drm_core_check_feature(dev, DRIVER_GEM))
+   drm_gem_open(dev, file);
+   if (drm_core_check_feature(dev, DRIVER_PRIME))
+   drm_prime_init_file_private(>prime);
+
+   if (dev->driver->open) {
+   ret = dev->driver->open(dev, file);
+   if (ret < 0)
+   goto out_prime_destroy;
+   }
+
+   if (drm_is_primary_client(file)) {
+   ret = drm_master_open(file);
+   if (ret)
+   goto out_close;
+   }
+
+   return file;
+
+out_close:
+   if (dev->driver->postclose)
+   dev->driver->postclose(dev, file);
+out_prime_destroy:
+   if (drm_core_check_feature(dev, DRIVER_PRIME))
+   drm_prime_destroy_file_private(>prime);
+   if (drm_core_check_feature(dev, DRIVER_GEM))
+   drm_gem_release(dev, file);
+   put_pid(file->pid);
+   kfree(file);
+   return ERR_PTR(ret);
+}
+
+/**
+ * drm_file_free - free file context
+ * @file: context to free, or NULL
+ *
+ * This destroys and deallocates a DRM file context previously allocated via
+ * drm_file_alloc(). The caller must make sure to unlink it from any contexts
+ * before calling this.
+ *
+ * The legacy paths might require the drm_global_mutex to be held.
+ *
+ * If NULL is passed, this is a no-op.
+ *
+ * RETURNS:
+ * 0 on success, or error code on failure.
+ */
+void drm_file_free(struct drm_file *file)
+{
+   struct drm_pending_event *e;
+   struct drm_device *dev;
+
+   if (!file)
+   return;
+
+   dev = file->minor->dev;
+
+   if (dev->driver->preclose)
+   dev->driver->preclose(dev, file);
+   if (!drm_core_check_feature(dev, DRIVER_MODESET))
+   drm_legacy_lock_release(dev, file->legacy_filp);
+   if (drm_core_check_feature(dev, DRIVER_HAVE_DMA))
+   drm_legacy_reclaim_buffers(dev, file);
+
+   spin_lock_irq(>event_lock);
+   while ((e = list_first_entry_or_null(>pending_event_list,
+struct drm_pending_event,
+pending_link))) {
+   list_del(>pending_link);
+   e->file_priv = NULL;
+   }
+   while ((e = list_first_entry_or_null(>event_list,
+struct drm_pending_event, link))) {
+   list_del(>link);
+   kfree(e);
+   }
+   spin_unlock_irq(>event_lock);
+
+   drm_legacy_ctxbitmap_flush(dev, file);
+
+   if (drm_core_check_feature(dev, DRIVER_MODESET)) {
+   drm_fb_release(file);
+   drm_property_destroy_user_blobs(dev, file);
+   }
+
+   if (drm_core_check_feature(dev, DRIVER_GEM))
+

[PATCH 3/6] drm: rename drm_file.filp to drm_file.legacy_filp

2016-09-01 Thread David Herrmann

We don't want anyone but legacy DRM1 code to use drm_file.filp. Especially
for in-kernel contexts, this might be set to NULL, so lets make sure
no-one accesses it, ever.

Signed-off-by: David Herrmann 
---
 drivers/gpu/drm/drm_bufs.c | 7 ---
 drivers/gpu/drm/drm_fops.c | 2 +-
 include/drm/drmP.h | 2 +-
 3 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
index c3a12cd..d2803de 100644
--- a/drivers/gpu/drm/drm_bufs.c
+++ b/drivers/gpu/drm/drm_bufs.c
@@ -1456,7 +1456,7 @@ int drm_legacy_mapbufs(struct drm_device *dev, void *data,
if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA))
return -EINVAL;

-   if (!dma)
+   if (!dma || !file_priv->legacy_filp)
return -EINVAL;

spin_lock(>buf_lock);
@@ -1478,12 +1478,13 @@ int drm_legacy_mapbufs(struct drm_device *dev, void 
*data,
retcode = -EINVAL;
goto done;
}
-   virtual = vm_mmap(file_priv->filp, 0, map->size,
+   virtual = vm_mmap(file_priv->legacy_filp, 0, map->size,
  PROT_READ | PROT_WRITE,
  MAP_SHARED,
  token);
} else {
-   virtual = vm_mmap(file_priv->filp, 0, dma->byte_count,
+   virtual = vm_mmap(file_priv->legacy_filp, 0,
+ dma->byte_count,
  PROT_READ | PROT_WRITE,
  MAP_SHARED, 0);
}
diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
index e9d66f5..69ef23c 100644
--- a/drivers/gpu/drm/drm_fops.c
+++ b/drivers/gpu/drm/drm_fops.c
@@ -198,7 +198,7 @@ static int drm_open_helper(struct file *filp, struct 
drm_minor *minor)
return -ENOMEM;

filp->private_data = priv;
-   priv->filp = filp;
+   priv->legacy_filp = filp;
priv->pid = get_pid(task_pid(current));
priv->minor = minor;

diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 0f69f56..2197ab1 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -330,7 +330,7 @@ struct drm_file {
/** Lock for synchronization of access to object_idr. */
spinlock_t table_lock;

-   struct file *filp;
+   struct file *legacy_filp; /* might be NULL! */
void *driver_priv;

struct drm_master *master; /* master this node is currently associated 
with
-- 
2.9.3

[PATCH 2/6] drm: use drm_file to tag vm-bos

2016-09-01 Thread David Herrmann

Rather than using "struct file*", use "struct drm_file*" as tag VM tag for
BOs. This will pave the way for "struct drm_file*" without any "struct
file*" back-pointer.

Signed-off-by: David Herrmann 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c |  3 ++-
 drivers/gpu/drm/ast/ast_ttm.c   |  3 ++-
 drivers/gpu/drm/bochs/bochs_mm.c|  3 ++-
 drivers/gpu/drm/cirrus/cirrus_ttm.c |  3 ++-
 drivers/gpu/drm/drm_gem.c   |  8 +++
 drivers/gpu/drm/drm_vma_manager.c   | 40 -
 drivers/gpu/drm/mgag200/mgag200_ttm.c   |  3 ++-
 drivers/gpu/drm/nouveau/nouveau_bo.c|  3 ++-
 drivers/gpu/drm/qxl/qxl_ttm.c   |  3 ++-
 drivers/gpu/drm/radeon/radeon_ttm.c |  3 ++-
 include/drm/drm_vma_manager.h   | 20 +
 11 files changed, 51 insertions(+), 41 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 9b61c8b..d975346 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -225,7 +225,8 @@ static int amdgpu_verify_access(struct ttm_buffer_object 
*bo, struct file *filp)

if (amdgpu_ttm_tt_get_usermm(bo->ttm))
return -EPERM;
-   return drm_vma_node_verify_access(>gem_base.vma_node, filp);
+   return drm_vma_node_verify_access(>gem_base.vma_node,
+ filp->private_data);
 }

 static void amdgpu_move_null(struct ttm_buffer_object *bo,
diff --git a/drivers/gpu/drm/ast/ast_ttm.c b/drivers/gpu/drm/ast/ast_ttm.c
index b29a412..608df4c 100644
--- a/drivers/gpu/drm/ast/ast_ttm.c
+++ b/drivers/gpu/drm/ast/ast_ttm.c
@@ -150,7 +150,8 @@ static int ast_bo_verify_access(struct ttm_buffer_object 
*bo, struct file *filp)
 {
struct ast_bo *astbo = ast_bo(bo);

-   return drm_vma_node_verify_access(>gem.vma_node, filp);
+   return drm_vma_node_verify_access(>gem.vma_node,
+ filp->private_data);
 }

 static int ast_ttm_io_mem_reserve(struct ttm_bo_device *bdev,
diff --git a/drivers/gpu/drm/bochs/bochs_mm.c b/drivers/gpu/drm/bochs/bochs_mm.c
index 5c5638a..269cfca 100644
--- a/drivers/gpu/drm/bochs/bochs_mm.c
+++ b/drivers/gpu/drm/bochs/bochs_mm.c
@@ -128,7 +128,8 @@ static int bochs_bo_verify_access(struct ttm_buffer_object 
*bo,
 {
struct bochs_bo *bochsbo = bochs_bo(bo);

-   return drm_vma_node_verify_access(>gem.vma_node, filp);
+   return drm_vma_node_verify_access(>gem.vma_node,
+ filp->private_data);
 }

 static int bochs_ttm_io_mem_reserve(struct ttm_bo_device *bdev,
diff --git a/drivers/gpu/drm/cirrus/cirrus_ttm.c 
b/drivers/gpu/drm/cirrus/cirrus_ttm.c
index 1cc9ee6..bb2438d 100644
--- a/drivers/gpu/drm/cirrus/cirrus_ttm.c
+++ b/drivers/gpu/drm/cirrus/cirrus_ttm.c
@@ -150,7 +150,8 @@ static int cirrus_bo_verify_access(struct ttm_buffer_object 
*bo, struct file *fi
 {
struct cirrus_bo *cirrusbo = cirrus_bo(bo);

-   return drm_vma_node_verify_access(>gem.vma_node, filp);
+   return drm_vma_node_verify_access(>gem.vma_node,
+ filp->private_data);
 }

 static int cirrus_ttm_io_mem_reserve(struct ttm_bo_device *bdev,
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index 9134ae1..465bacd 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -257,7 +257,7 @@ drm_gem_object_release_handle(int id, void *ptr, void *data)

if (drm_core_check_feature(dev, DRIVER_PRIME))
drm_gem_remove_prime_handles(obj, file_priv);
-   drm_vma_node_revoke(>vma_node, file_priv->filp);
+   drm_vma_node_revoke(>vma_node, file_priv);

if (dev->driver->gem_close_object)
dev->driver->gem_close_object(obj, file_priv);
@@ -372,7 +372,7 @@ drm_gem_handle_create_tail(struct drm_file *file_priv,

handle = ret;

-   ret = drm_vma_node_allow(>vma_node, file_priv->filp);
+   ret = drm_vma_node_allow(>vma_node, file_priv);
if (ret)
goto err_remove;

@@ -386,7 +386,7 @@ drm_gem_handle_create_tail(struct drm_file *file_priv,
return 0;

 err_revoke:
-   drm_vma_node_revoke(>vma_node, file_priv->filp);
+   drm_vma_node_revoke(>vma_node, file_priv);
 err_remove:
spin_lock(_priv->table_lock);
idr_remove(_priv->object_idr, handle);
@@ -991,7 +991,7 @@ int drm_gem_mmap(struct file *filp, struct vm_area_struct 
*vma)
if (!obj)
return -EINVAL;

-   if (!drm_vma_node_is_allowed(node, filp)) {
+   if (!drm_vma_node_is_allowed(node, priv)) {
drm_gem_object_unreference_unlocked(obj);
return -EACCES;
}
diff --git a/drivers/gpu/drm/drm_vma_manager.c 
b/drivers/gpu/drm/drm_vma_manager.c
index f306c88..a788a80 100644
--- a/drivers/gpu/drm/drm_vma_manager.c
+++ b/drivers/gpu/drm/drm_vma_manager.c
@@ -25,7 +25,6 @@

[PATCH 1/6] drm: remove redundant drm_file->uid

2016-09-01 Thread David Herrmann

Each DRM file-context caches the EUID of the process that opened the file.
It is used exclusively for debugging purposes in /proc/dri/ and friends.

Note, however, that we can already fetch the EUID from
priv->pid->task->creds. The pointer-chasing will not hurt us, since it is
only about debugging, anyway.

Since we already are in an rcu-read-side, we can use __task_cred() rather
than task_cred_xxx().

Signed-off-by: David Herrmann 
---
 drivers/gpu/drm/drm_fops.c | 1 -
 drivers/gpu/drm/drm_info.c | 4 +++-
 include/drm/drmP.h | 1 -
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
index 323c238..e9d66f5 100644
--- a/drivers/gpu/drm/drm_fops.c
+++ b/drivers/gpu/drm/drm_fops.c
@@ -199,7 +199,6 @@ static int drm_open_helper(struct file *filp, struct 
drm_minor *minor)

filp->private_data = priv;
priv->filp = filp;
-   priv->uid = current_euid();
priv->pid = get_pid(task_pid(current));
priv->minor = minor;

diff --git a/drivers/gpu/drm/drm_info.c b/drivers/gpu/drm/drm_info.c
index 9ae353f..1df2d33 100644
--- a/drivers/gpu/drm/drm_info.c
+++ b/drivers/gpu/drm/drm_info.c
@@ -80,6 +80,7 @@ int drm_clients_info(struct seq_file *m, void *data)
struct drm_info_node *node = (struct drm_info_node *) m->private;
struct drm_device *dev = node->minor->dev;
struct drm_file *priv;
+   kuid_t uid;

seq_printf(m,
   "%20s %5s %3s master a %5s %10s\n",
@@ -98,13 +99,14 @@ int drm_clients_info(struct seq_file *m, void *data)

rcu_read_lock(); /* locks pid_task()->comm */
task = pid_task(priv->pid, PIDTYPE_PID);
+   uid = task ? __task_cred(task)->euid : GLOBAL_ROOT_UID;
seq_printf(m, "%20s %5d %3d   %c%c %5d %10u\n",
   task ? task->comm : "",
   pid_vnr(priv->pid),
   priv->minor->index,
   drm_is_current_master(priv) ? 'y' : 'n',
   priv->authenticated ? 'y' : 'n',
-  from_kuid_munged(seq_user_ns(m), priv->uid),
+  from_kuid_munged(seq_user_ns(m), uid),
   priv->magic);
rcu_read_unlock();
}
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index d488a72..0f69f56 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -320,7 +320,6 @@ struct drm_file {
unsigned is_master:1;

struct pid *pid;
-   kuid_t uid;
drm_magic_t magic;
struct list_head lhead;
struct drm_minor *minor;
-- 
2.9.3

[PATCH 0/6] DRM Core Cleanups

2016-09-01 Thread David Herrmann

Hey

The remaining cleanup patches pending on dri-devel in one batch. Random cleanups
all over the place. Should all be straightforward.

Thanks
David

David Herrmann (6):
  drm: remove redundant drm_file->uid
  drm: use drm_file to tag vm-bos
  drm: rename drm_file.filp to drm_file.legacy_filp
  drm: provide management functions for drm_file
  drm: drop obsolete drm_core.h
  drm: cleanup drm_core_{init,exit}()

 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c |   3 +-
 drivers/gpu/drm/ast/ast_ttm.c   |   3 +-
 drivers/gpu/drm/bochs/bochs_mm.c|   3 +-
 drivers/gpu/drm/cirrus/cirrus_ttm.c |   3 +-
 drivers/gpu/drm/drm_bufs.c  |   7 +-
 drivers/gpu/drm/drm_drv.c   | 191 ++--
 drivers/gpu/drm/drm_fops.c  | 133 ++
 drivers/gpu/drm/drm_gem.c   |   8 +-
 drivers/gpu/drm/drm_info.c  |   4 +-
 drivers/gpu/drm/drm_internal.h  |   7 ++
 drivers/gpu/drm/drm_ioc32.c |   1 -
 drivers/gpu/drm/drm_ioctl.c |   1 -
 drivers/gpu/drm/drm_sysfs.c |   8 +-
 drivers/gpu/drm/drm_vma_manager.c   |  40 +++
 drivers/gpu/drm/mgag200/mgag200_ttm.c   |   3 +-
 drivers/gpu/drm/nouveau/nouveau_bo.c|   3 +-
 drivers/gpu/drm/qxl/qxl_ttm.c   |   3 +-
 drivers/gpu/drm/radeon/radeon_ttm.c |   3 +-
 include/drm/drmP.h  |   3 +-
 include/drm/drm_core.h  |  34 --
 include/drm/drm_vma_manager.h   |  20 ++--
 21 files changed, 235 insertions(+), 246 deletions(-)
 delete mode 100644 include/drm/drm_core.h

-- 
2.9.3

[PATCH 26/26] drm/omap: panel-lgphilips-lb035q02: Add note for incorrect data drive edge and DE level

2016-09-01 Thread Peter Ujfalusi

According to the datasheet of the panel, both data, DEN and sync signals
are expected to be driven on the falling edge of the DOTCLK.
The DE is active low according to the documentation.

Signed-off-by: Peter Ujfalusi 
---
 drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c 
b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
index b36fa0a57b61..43d21edb51f5 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
@@ -36,6 +36,11 @@ static struct videomode lb035q02_vm = {
.flags  = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
  DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_SYNC_NEGEDGE |
  DISPLAY_FLAGS_PIXDATA_POSEDGE,
+   /*
+* Note: According to the panel documentation:
+* DE is active LOW
+* DATA needs to be driven on the FALLING edge
+*/
 };

 struct panel_drv_data {
-- 
2.9.3

[PATCH 25/26] drm/omap: panel-sharp-ls037v7dw01: Add note for incorrect data drive edge

2016-09-01 Thread Peter Ujfalusi

According to the datasheet of the panel, both data, DEN and sync signals
are expected to be driven on the falling edge of the DOTCLK.

Signed-off-by: Peter Ujfalusi 
---
 drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c 
b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
index fd33156bc34c..04fe235b7cac 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
@@ -52,6 +52,10 @@ static const struct videomode sharp_ls_vm = {
.flags  = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
  DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_SYNC_NEGEDGE |
  DISPLAY_FLAGS_PIXDATA_POSEDGE,
+   /*
+* Note: According to the panel documentation:
+* DATA needs to be driven on the FALLING edge
+*/
 };

 #define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
-- 
2.9.3

[PATCH 24/26] drm/omap: panel-tpo-td028ttec1: Add note for incorrect sync drive edge

2016-09-01 Thread Peter Ujfalusi

According to the datasheet of the panel, both data, DEN and sync signals
are expected to be driven on the falling edge of the DOTCLK.

Signed-off-by: Peter Ujfalusi 
---
 drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c 
b/drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c
index c003f4dd2a18..f313dbfcbacb 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c
@@ -56,6 +56,10 @@ static struct videomode td028ttec1_panel_vm = {
.flags  = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
  DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_SYNC_POSEDGE |
  DISPLAY_FLAGS_PIXDATA_NEGEDGE,
+   /*
+* Note: According to the panel documentation:
+* SYNC needs to be driven on the FALLING edge
+*/
 };

 #define JBT_COMMAND0x000
-- 
2.9.3

[PATCH 23/26] drm/omap: panel-tpo-td043mtea1: Add note for incorrect sync drive edge

2016-09-01 Thread Peter Ujfalusi

According to the datasheet of the panel, both data, DEN and sync signals
are expected to be driven on the falling edge of the DOTCLK.

Signed-off-by: Peter Ujfalusi 
---
 drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c 
b/drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c
index f78102aab2e6..0787dba44faa 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c
@@ -89,6 +89,10 @@ static const struct videomode tpo_td043_vm = {
.flags  = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
  DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_SYNC_POSEDGE |
  DISPLAY_FLAGS_PIXDATA_NEGEDGE,
+   /*
+* Note: According to the panel documentation:
+* SYNC needs to be driven on the FALLING edge
+*/
 };

 #define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
-- 
2.9.3

[PATCH 22/26] drm/omap: Use consistent name for struct videomode

2016-09-01 Thread Peter Ujfalusi

Use 'vm' to refer to a struct videomode instead of 'p', 't', 'timings' or
something else.

The code will be easier to follow if we use consistent names.

Signed-off-by: Peter Ujfalusi 
---
 .../gpu/drm/omapdrm/displays/connector-analog-tv.c |  26 ++---
 drivers/gpu/drm/omapdrm/displays/connector-dvi.c   |  26 ++---
 drivers/gpu/drm/omapdrm/displays/connector-hdmi.c  |  26 ++---
 drivers/gpu/drm/omapdrm/displays/encoder-opa362.c  |  20 ++--
 drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c  |  31 +++---
 .../gpu/drm/omapdrm/displays/encoder-tpd12s015.c   |  20 ++--
 drivers/gpu/drm/omapdrm/displays/panel-dpi.c   |  26 ++---
 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c|  23 ++---
 .../omapdrm/displays/panel-lgphilips-lb035q02.c|  26 ++---
 .../drm/omapdrm/displays/panel-nec-nl8048hl11.c|  26 ++---
 .../drm/omapdrm/displays/panel-sharp-ls037v7dw01.c |  26 ++---
 .../drm/omapdrm/displays/panel-sony-acx565akm.c|  26 ++---
 .../drm/omapdrm/displays/panel-tpo-td028ttec1.c|  26 ++---
 .../drm/omapdrm/displays/panel-tpo-td043mtea1.c|  26 ++---
 drivers/gpu/drm/omapdrm/dss/dispc.c| 114 ++---
 drivers/gpu/drm/omapdrm/dss/display.c  |   8 +-
 drivers/gpu/drm/omapdrm/dss/dpi.c  |  38 +++
 drivers/gpu/drm/omapdrm/dss/dsi.c  | 108 +--
 drivers/gpu/drm/omapdrm/dss/dss.h  |   5 +-
 drivers/gpu/drm/omapdrm/dss/hdmi.h |   8 +-
 drivers/gpu/drm/omapdrm/dss/hdmi4.c|  32 +++---
 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c   |   8 +-
 drivers/gpu/drm/omapdrm/dss/hdmi5.c|  32 +++---
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c   |  68 ++--
 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c  |  58 +--
 drivers/gpu/drm/omapdrm/dss/omapdss.h  |  57 +--
 drivers/gpu/drm/omapdrm/dss/output.c   |   5 +-
 drivers/gpu/drm/omapdrm/dss/rfbi.c |  52 +-
 drivers/gpu/drm/omapdrm/dss/sdi.c  |  30 +++---
 drivers/gpu/drm/omapdrm/dss/venc.c |  39 ---
 drivers/gpu/drm/omapdrm/omap_connector.c   |  20 ++--
 drivers/gpu/drm/omapdrm/omap_crtc.c|  18 ++--
 drivers/gpu/drm/omapdrm/omap_encoder.c |   8 +-
 33 files changed, 527 insertions(+), 535 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c 
b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
index 53a4e6942616..aaa8a58390f1 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
@@ -24,12 +24,12 @@ struct panel_drv_data {

struct device *dev;

-   struct videomode timings;
+   struct videomode vm;

bool invert_polarity;
 };

-static const struct videomode tvc_pal_timings = {
+static const struct videomode tvc_pal_vm = {
.hactive= 720,
.vactive= 574,
.pixelclock = 1350,
@@ -93,7 +93,7 @@ static int tvc_enable(struct omap_dss_device *dssdev)
if (omapdss_device_is_enabled(dssdev))
return 0;

-   in->ops.atv->set_timings(in, >timings);
+   in->ops.atv->set_timings(in, >vm);

if (!ddata->dev->of_node) {
in->ops.atv->set_type(in, OMAP_DSS_VENC_TYPE_COMPOSITE);
@@ -127,32 +127,32 @@ static void tvc_disable(struct omap_dss_device *dssdev)
 }

 static void tvc_set_timings(struct omap_dss_device *dssdev,
-   struct videomode *timings)
+   struct videomode *vm)
 {
struct panel_drv_data *ddata = to_panel_data(dssdev);
struct omap_dss_device *in = ddata->in;

-   ddata->timings = *timings;
-   dssdev->panel.timings = *timings;
+   ddata->vm = *vm;
+   dssdev->panel.vm = *vm;

-   in->ops.atv->set_timings(in, timings);
+   in->ops.atv->set_timings(in, vm);
 }

 static void tvc_get_timings(struct omap_dss_device *dssdev,
-   struct videomode *timings)
+   struct videomode *vm)
 {
struct panel_drv_data *ddata = to_panel_data(dssdev);

-   *timings = ddata->timings;
+   *vm = ddata->vm;
 }

 static int tvc_check_timings(struct omap_dss_device *dssdev,
-   struct videomode *timings)
+struct videomode *vm)
 {
struct panel_drv_data *ddata = to_panel_data(dssdev);
struct omap_dss_device *in = ddata->in;

-   return in->ops.atv->check_timings(in, timings);
+   return in->ops.atv->check_timings(in, vm);
 }

 static u32 tvc_get_wss(struct omap_dss_device *dssdev)
@@ -254,14 +254,14 @@ static int tvc_probe(struct platform_device *pdev)
return -ENODEV;
}

-   ddata->timings = tvc_pal_timings;
+   ddata->vm = tvc_pal_vm;

dssdev = >dssdev;
dssdev->driver = _driver;
dssdev->dev = >dev;
dssdev->type

[PATCH 21/26] drm/omap: Replace struct omap_video_timings with videomode

2016-09-01 Thread Peter Ujfalusi

omap_video_timings can be replaced with the generic videomode in omapdrm
and the omap_video_timings can be removed.

This patch will replace the omap_video_timings with videomode.
With the change we no longer need the functions to convert to/from
videomode and drm_display_mode to omap_video_timings, these can be removed
as well.

Signed-off-by: Peter Ujfalusi 
---
 .../gpu/drm/omapdrm/displays/connector-analog-tv.c | 10 +--
 drivers/gpu/drm/omapdrm/displays/connector-dvi.c   | 10 +--
 drivers/gpu/drm/omapdrm/displays/connector-hdmi.c  | 10 +--
 drivers/gpu/drm/omapdrm/displays/encoder-opa362.c  |  8 +--
 drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c  | 10 +--
 .../gpu/drm/omapdrm/displays/encoder-tpd12s015.c   |  8 +--
 drivers/gpu/drm/omapdrm/displays/panel-dpi.c   | 16 ++---
 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c|  2 +-
 .../omapdrm/displays/panel-lgphilips-lb035q02.c| 10 +--
 .../drm/omapdrm/displays/panel-nec-nl8048hl11.c| 10 +--
 .../drm/omapdrm/displays/panel-sharp-ls037v7dw01.c | 10 +--
 .../drm/omapdrm/displays/panel-sony-acx565akm.c| 10 +--
 .../drm/omapdrm/displays/panel-tpo-td028ttec1.c| 10 +--
 .../drm/omapdrm/displays/panel-tpo-td043mtea1.c| 10 +--
 drivers/gpu/drm/omapdrm/dss/dispc.c| 30 
 drivers/gpu/drm/omapdrm/dss/display.c  | 39 +-
 drivers/gpu/drm/omapdrm/dss/dpi.c  | 10 +--
 drivers/gpu/drm/omapdrm/dss/dsi.c  | 24 +++
 drivers/gpu/drm/omapdrm/dss/dss.h  |  4 +-
 drivers/gpu/drm/omapdrm/dss/hdmi.h |  8 +--
 drivers/gpu/drm/omapdrm/dss/hdmi4.c|  8 +--
 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c   |  2 +-
 drivers/gpu/drm/omapdrm/dss/hdmi5.c|  8 +--
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c   |  4 +-
 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c  |  6 +-
 drivers/gpu/drm/omapdrm/dss/omapdss.h  | 82 +++--
 drivers/gpu/drm/omapdrm/dss/output.c   |  2 +-
 drivers/gpu/drm/omapdrm/dss/rfbi.c |  2 +-
 drivers/gpu/drm/omapdrm/dss/sdi.c  | 10 +--
 drivers/gpu/drm/omapdrm/dss/venc.c | 14 ++--
 drivers/gpu/drm/omapdrm/omap_connector.c   | 84 +++---
 drivers/gpu/drm/omapdrm/omap_crtc.c| 11 +--
 drivers/gpu/drm/omapdrm/omap_drv.h |  7 +-
 drivers/gpu/drm/omapdrm/omap_encoder.c |  6 +-
 34 files changed, 178 insertions(+), 317 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c 
b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
index 264182f97194..53a4e6942616 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
@@ -24,12 +24,12 @@ struct panel_drv_data {

struct device *dev;

-   struct omap_video_timings timings;
+   struct videomode timings;

bool invert_polarity;
 };

-static const struct omap_video_timings tvc_pal_timings = {
+static const struct videomode tvc_pal_timings = {
.hactive= 720,
.vactive= 574,
.pixelclock = 1350,
@@ -127,7 +127,7 @@ static void tvc_disable(struct omap_dss_device *dssdev)
 }

 static void tvc_set_timings(struct omap_dss_device *dssdev,
-   struct omap_video_timings *timings)
+   struct videomode *timings)
 {
struct panel_drv_data *ddata = to_panel_data(dssdev);
struct omap_dss_device *in = ddata->in;
@@ -139,7 +139,7 @@ static void tvc_set_timings(struct omap_dss_device *dssdev,
 }

 static void tvc_get_timings(struct omap_dss_device *dssdev,
-   struct omap_video_timings *timings)
+   struct videomode *timings)
 {
struct panel_drv_data *ddata = to_panel_data(dssdev);

@@ -147,7 +147,7 @@ static void tvc_get_timings(struct omap_dss_device *dssdev,
 }

 static int tvc_check_timings(struct omap_dss_device *dssdev,
-   struct omap_video_timings *timings)
+   struct videomode *timings)
 {
struct panel_drv_data *ddata = to_panel_data(dssdev);
struct omap_dss_device *in = ddata->in;
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
index 53967a4a96a7..f4f8bf07f38b 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
@@ -19,7 +19,7 @@

 #include "../dss/omapdss.h"

-static const struct omap_video_timings dvic_default_timings = {
+static const struct videomode dvic_default_timings = {
.hactive= 640,
.vactive= 480,

@@ -42,7 +42,7 @@ struct panel_drv_data {
struct omap_dss_device dssdev;
struct omap_dss_device *in;

-   struct omap_video_timings timings;
+   struct videomode timings;

struct i2c_adapter *i2c_adapter;
 };
@@ -113,7 +113,7 @@

[PATCH 20/26] drm/omap: Change the types of struct omap_video_timings members

2016-09-01 Thread Peter Ujfalusi

omap_video_timings struct have the same members as struct videomode, but
their types are different. As first step change the types of the
omap_video_timings struct members to match their counterpart in
struct videomode to catch any type cast related issues.

Signed-off-by: Peter Ujfalusi 
---
 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c |  2 +-
 drivers/gpu/drm/omapdrm/dss/dispc.c |  5 +++--
 drivers/gpu/drm/omapdrm/dss/dpi.c   |  2 +-
 drivers/gpu/drm/omapdrm/dss/omapdss.h   | 18 +-
 drivers/gpu/drm/omapdrm/dss/sdi.c   |  2 +-
 5 files changed, 15 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c 
b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
index c3d2a12358fa..8f676b8ac038 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
@@ -1023,7 +1023,7 @@ static int dsicm_memory_read(struct omap_dss_device 
*dssdev,
goto err1;
}

-   size = min(w * h * 3,
+   size = min((u32)w * h * 3,
dssdev->panel.timings.hactive *
dssdev->panel.timings.vactive * 3);

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c 
b/drivers/gpu/drm/omapdrm/dss/dispc.c
index 30f8b732be44..eb3454dd55b1 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -2870,7 +2870,8 @@ int dispc_wb_setup(const struct omap_dss_writeback_info 
*wi,
int wbdelay;

wbdelay = min(mgr_timings->vfront_porch +
- mgr_timings->vsync_len + 
mgr_timings->vback_porch, 255);
+ mgr_timings->vsync_len + mgr_timings->vback_porch,
+ (u32)255);

/* WBDELAYCOUNT */
REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), wbdelay, 7, 0);
@@ -3242,7 +3243,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
ht = timings->pixelclock / xtot;
vt = timings->pixelclock / xtot / ytot;

-   DSSDBG("pck %u\n", timings->pixelclock);
+   DSSDBG("pck %lu\n", timings->pixelclock);
DSSDBG("hsync_len %d hfp %d hbp %d vsw %d vfp %d vbp %d\n",
t.hsync_len, t.hfront_porch, t.hback_porch,
t.vsync_len, t.vfront_porch, t.vback_porch);
diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c 
b/drivers/gpu/drm/omapdrm/dss/dpi.c
index d653f492cbfd..8fb40efa65af 100644
--- a/drivers/gpu/drm/omapdrm/dss/dpi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dpi.c
@@ -351,7 +351,7 @@ static int dpi_set_mode(struct dpi_data *dpi)
pck = fck / lck_div / pck_div;

if (pck != t->pixelclock) {
-   DSSWARN("Could not find exact pixel clock. Requested %d Hz, got 
%lu Hz\n",
+   DSSWARN("Could not find exact pixel clock. Requested %lu Hz, 
got %lu Hz\n",
t->pixelclock, pck);

t->pixelclock = pck;
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h 
b/drivers/gpu/drm/omapdrm/dss/omapdss.h
index 0d8228426505..21a93401c6ae 100644
--- a/drivers/gpu/drm/omapdrm/dss/omapdss.h
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h
@@ -301,23 +301,23 @@ struct omap_dss_dsi_config {

 struct omap_video_timings {
/* Unit: pixels */
-   u16 hactive;
+   u32 hactive;
/* Unit: pixels */
-   u16 vactive;
+   u32 vactive;
/* Unit: Hz */
-   u32 pixelclock;
+   unsigned long pixelclock;
/* Unit: pixel clocks */
-   u16 hsync_len;  /* Horizontal synchronization pulse width */
+   u32 hsync_len;  /* Horizontal synchronization pulse width */
/* Unit: pixel clocks */
-   u16 hfront_porch;   /* Horizontal front porch */
+   u32 hfront_porch;   /* Horizontal front porch */
/* Unit: pixel clocks */
-   u16 hback_porch;/* Horizontal back porch */
+   u32 hback_porch;/* Horizontal back porch */
/* Unit: line clocks */
-   u16 vsync_len;  /* Vertical synchronization pulse width */
+   u32 vsync_len;  /* Vertical synchronization pulse width */
/* Unit: line clocks */
-   u16 vfront_porch;   /* Vertical front porch */
+   u32 vfront_porch;   /* Vertical front porch */
/* Unit: line clocks */
-   u16 vback_porch;/* Vertical back porch */
+   u32 vback_porch;/* Vertical back porch */

enum display_flags flags; /* display flags */
 };
diff --git a/drivers/gpu/drm/omapdrm/dss/sdi.c 
b/drivers/gpu/drm/omapdrm/dss/sdi.c
index 3b076329a3ac..c8658f97ab7d 100644
--- a/drivers/gpu/drm/omapdrm/dss/sdi.c
+++ b/drivers/gpu/drm/omapdrm/dss/sdi.c
@@ -162,7 +162,7 @@ static int sdi_display_enable(struct omap_dss_device 
*dssdev)
pck = fck / dispc_cinfo.lck_div / dispc_cinfo.pck_div;

if (pck != t->pixelclock) {
-

[PATCH 19/26] drm/omap: omap_display_timings: Use display_flags for sync edge

2016-09-01 Thread Peter Ujfalusi

In preparation to move the stack to use the generic videmode
struct for display timing information.

Signed-off-by: Peter Ujfalusi 
---
 drivers/gpu/drm/omapdrm/displays/connector-dvi.c   |  5 ++---
 drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c  |  5 +++--
 .../drm/omapdrm/displays/panel-lgphilips-lb035q02.c|  5 ++---
 .../gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c|  5 ++---
 .../gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c |  5 ++---
 .../gpu/drm/omapdrm/displays/panel-sony-acx565akm.c|  5 ++---
 .../gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c|  5 ++---
 .../gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c|  5 ++---
 drivers/gpu/drm/omapdrm/dss/dispc.c| 18 ++
 drivers/gpu/drm/omapdrm/dss/display.c  |  4 
 drivers/gpu/drm/omapdrm/dss/dsi.c  |  3 ++-
 drivers/gpu/drm/omapdrm/dss/omapdss.h  |  3 ---
 drivers/gpu/drm/omapdrm/dss/rfbi.c |  3 ++-
 drivers/gpu/drm/omapdrm/dss/sdi.c  |  3 +--
 drivers/gpu/drm/omapdrm/dss/venc.c | 10 --
 drivers/gpu/drm/omapdrm/omap_connector.c   |  5 +++--
 16 files changed, 35 insertions(+), 54 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
index 6f130862db8a..53967a4a96a7 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
@@ -33,10 +33,9 @@ static const struct omap_video_timings dvic_default_timings 
= {
.vsync_len  = 4,
.vback_porch= 7,

-   .sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
-
.flags  = DISPLAY_FLAGS_HSYNC_HIGH | DISPLAY_FLAGS_VSYNC_HIGH |
- DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE,
+ DISPLAY_FLAGS_SYNC_NEGEDGE | DISPLAY_FLAGS_DE_HIGH |
+ DISPLAY_FLAGS_PIXDATA_POSEDGE,
 };

 struct panel_drv_data {
diff --git a/drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c 
b/drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c
index eec079e017f0..69b4feab964c 100644
--- a/drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c
+++ b/drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c
@@ -115,8 +115,9 @@ static void tfp410_disable(struct omap_dss_device *dssdev)

 static void tfp410_fix_timings(struct omap_video_timings *timings)
 {
-   timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
-   timings->flags |= DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE;
+   timings->flags |= DISPLAY_FLAGS_DE_HIGH |
+ DISPLAY_FLAGS_PIXDATA_POSEDGE |
+ DISPLAY_FLAGS_SYNC_POSEDGE;
 }

 static void tfp410_set_timings(struct omap_dss_device *dssdev,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c 
b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
index 33cdc107ed21..4328d6781228 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
@@ -33,10 +33,9 @@ static struct omap_video_timings lb035q02_timings = {
.vfront_porch   = 4,
.vback_porch= 18,

-   .sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
-
.flags  = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
- DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE,
+ DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_SYNC_NEGEDGE |
+ DISPLAY_FLAGS_PIXDATA_POSEDGE,
 };

 struct panel_drv_data {
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c 
b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
index 64f6f42dbe92..58f39f588c62 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
@@ -76,10 +76,9 @@ static const struct omap_video_timings 
nec_8048_panel_timings = {
.vsync_len  = 1,
.vback_porch= 4,

-   .sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
-
.flags  = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
- DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE,
+ DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_SYNC_POSEDGE |
+ DISPLAY_FLAGS_PIXDATA_POSEDGE,
 };

 #define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c 
b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
index fb7e032209bd..d41ba3152859 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
@@ -49,10 +49,9 @@ static const struct omap_video_timings sharp_ls_timings = {
.vfront_porch   = 1,
.vback_porch= 1,

-

[PATCH 18/26] drm/omap: omap_display_timings: Use display_flags for pixel data edge

2016-09-01 Thread Peter Ujfalusi

In preparation to move the stack to use the generic videmode
struct for display timing information.

Signed-off-by: Peter Ujfalusi 
---
 drivers/gpu/drm/omapdrm/displays/connector-dvi.c |  3 +--
 drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c|  3 +--
 .../gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c  |  3 +--
 drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c  |  3 +--
 .../gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c   |  3 +--
 drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c  |  3 +--
 drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c  |  3 +--
 drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c  |  3 +--
 drivers/gpu/drm/omapdrm/dss/dispc.c  | 16 +---
 drivers/gpu/drm/omapdrm/dss/display.c|  9 +
 drivers/gpu/drm/omapdrm/dss/dsi.c|  3 ++-
 drivers/gpu/drm/omapdrm/dss/omapdss.h|  2 --
 drivers/gpu/drm/omapdrm/dss/rfbi.c   |  3 ++-
 drivers/gpu/drm/omapdrm/dss/sdi.c|  2 +-
 drivers/gpu/drm/omapdrm/dss/venc.c   |  8 
 drivers/gpu/drm/omapdrm/omap_connector.c |  3 +--
 16 files changed, 24 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
index b94bfca0ecae..6f130862db8a 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
@@ -33,11 +33,10 @@ static const struct omap_video_timings dvic_default_timings 
= {
.vsync_len  = 4,
.vback_porch= 7,

-   .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,

.flags  = DISPLAY_FLAGS_HSYNC_HIGH | DISPLAY_FLAGS_VSYNC_HIGH |
- DISPLAY_FLAGS_DE_HIGH,
+ DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE,
 };

 struct panel_drv_data {
diff --git a/drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c 
b/drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c
index e3b8dddc90bd..eec079e017f0 100644
--- a/drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c
+++ b/drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c
@@ -115,9 +115,8 @@ static void tfp410_disable(struct omap_dss_device *dssdev)

 static void tfp410_fix_timings(struct omap_video_timings *timings)
 {
-   timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
-   timings->flags |= DISPLAY_FLAGS_DE_HIGH;
+   timings->flags |= DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE;
 }

 static void tfp410_set_timings(struct omap_dss_device *dssdev,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c 
b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
index 7d4c59bf1950..33cdc107ed21 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
@@ -33,11 +33,10 @@ static struct omap_video_timings lb035q02_timings = {
.vfront_porch   = 4,
.vback_porch= 18,

-   .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,

.flags  = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
- DISPLAY_FLAGS_DE_HIGH,
+ DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE,
 };

 struct panel_drv_data {
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c 
b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
index 6f7bc89ff9ee..64f6f42dbe92 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
@@ -76,11 +76,10 @@ static const struct omap_video_timings 
nec_8048_panel_timings = {
.vsync_len  = 1,
.vback_porch= 4,

-   .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,

.flags  = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
- DISPLAY_FLAGS_DE_HIGH,
+ DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE,
 };

 #define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c 
b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
index a18dd7160df0..fb7e032209bd 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
@@ -49,11 +49,10 @@ static const struct omap_video_timings sharp_ls_timings = {
.vfront_porch   = 1,
.vback_porch= 1,

-   .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,

[PATCH 17/26] drm/omap: omap_display_timings: Use display_flags for double_pixel mode

2016-09-01 Thread Peter Ujfalusi

In preparation to move the stack to use the generic videmode
struct for display timing information.

Signed-off-by: Peter Ujfalusi 
---
 drivers/gpu/drm/omapdrm/dss/dispc.c  | 6 +++---
 drivers/gpu/drm/omapdrm/dss/hdmi4.c  | 2 +-
 drivers/gpu/drm/omapdrm/dss/hdmi5.c  | 2 +-
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c | 4 ++--
 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c| 3 +--
 drivers/gpu/drm/omapdrm/dss/omapdss.h| 2 --
 drivers/gpu/drm/omapdrm/omap_connector.c | 5 +++--
 7 files changed, 11 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c 
b/drivers/gpu/drm/omapdrm/dss/dispc.c
index ae1e25b33391..39a9c34694f5 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -3270,8 +3270,9 @@ void dispc_mgr_set_timings(enum omap_channel channel,
t.vactive /= 2;

if (dispc.feat->supports_double_pixel)
-   REG_FLD_MOD(DISPC_CONTROL, t.double_pixel ? 1 : 0,
-   19, 17);
+   REG_FLD_MOD(DISPC_CONTROL,
+   !!(t.flags & DISPLAY_FLAGS_DOUBLECLK),
+   19, 17);
}

dispc_mgr_set_size(channel, t.hactive, t.vactive);
@@ -4206,7 +4207,6 @@ static const struct dispc_errata_i734_data {
.vsync_len = 1, .vfront_porch = 1, .vback_porch = 1,
.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
-   .double_pixel = false,

.flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
 DISPLAY_FLAGS_DE_HIGH,
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
index 2a5a71a25423..891518502d3d 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi4.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
@@ -175,7 +175,7 @@ static int hdmi_power_on_full(struct omap_dss_device 
*dssdev)
   p->vactive);

pc = p->pixelclock;
-   if (p->double_pixel)
+   if (p->flags & DISPLAY_FLAGS_DOUBLECLK)
pc *= 2;

/* DSS_HDMI_TCLK is bitclk / 10 */
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
index 45f445523a4f..8206ef69caf1 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
@@ -187,7 +187,7 @@ static int hdmi_power_on_full(struct omap_dss_device 
*dssdev)
   p->vactive);

pc = p->pixelclock;
-   if (p->double_pixel)
+   if (p->flags & DISPLAY_FLAGS_DOUBLECLK)
pc *= 2;

/* DSS_HDMI_TCLK is bitclk / 10 */
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
index f64f389939d1..e86972b98a91 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
@@ -315,7 +315,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config 
*video_cfg,
video_cfg->v_fc_config.timings.vback_porch /= 2;
}

-   if (cfg->timings.double_pixel) {
+   if (cfg->timings.flags & DISPLAY_FLAGS_DOUBLECLK) {
video_cfg->v_fc_config.timings.hactive *= 2;
video_cfg->hblank *= 2;
video_cfg->v_fc_config.timings.hfront_porch *= 2;
@@ -382,7 +382,7 @@ static void hdmi_core_video_config(struct hdmi_core_data 
*core,
REG_FLD_MOD(base, HDMI_CORE_FC_INVIDCONF,
cfg->v_fc_config.hdmi_dvi_mode, 3, 3);

-   if (ovt->double_pixel)
+   if (ovt->flags & DISPLAY_FLAGS_DOUBLECLK)
REG_FLD_MOD(base, HDMI_CORE_FC_PRCONF, 2, 7, 4);
else
REG_FLD_MOD(base, HDMI_CORE_FC_PRCONF, 1, 7, 4);
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
index b86e5a357456..20effa9260ec 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
@@ -208,7 +208,6 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format 
*video_fmt,
timings->vfront_porch = param->timings.vfront_porch;
timings->vsync_len = param->timings.vsync_len;

-   timings->double_pixel = param->timings.double_pixel;
timings->flags = param->timings.flags;

if (param->timings.flags & DISPLAY_FLAGS_INTERLACED) {
@@ -218,7 +217,7 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format 
*video_fmt,
timings->vsync_len /= 2;
}

-   if (param->timings.double_pixel) {
+   if (param->timings.flags & DISPLAY_FLAGS_DOUBLECLK) {
video_fmt->x_res *= 2;
timings->hfront_porch *= 2;
timings->hsync_len *= 2;
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h 
b/drivers/gpu/drm/omapdrm/dss/omapdss.h
index 4aa8ebfa69fc..b14d2a72b966 100644
--- a/drivers/gpu/drm/omapdrm/dss/omapdss.h
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h
@@ -324,8

[PATCH 16/26] drm/omap: omap_display_timings: Use display_flags for DE level

2016-09-01 Thread Peter Ujfalusi

In preparation to move the stack to use the generic videmode
struct for display timing information.

Signed-off-by: Peter Ujfalusi 
---
 drivers/gpu/drm/omapdrm/displays/connector-dvi.c  |  4 ++--
 drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c |  2 +-
 .../drm/omapdrm/displays/panel-lgphilips-lb035q02.c   |  4 ++--
 .../gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c   |  4 ++--
 .../drm/omapdrm/displays/panel-sharp-ls037v7dw01.c|  4 ++--
 .../gpu/drm/omapdrm/displays/panel-sony-acx565akm.c   |  4 ++--
 .../gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c   |  4 ++--
 .../gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c   |  4 ++--
 drivers/gpu/drm/omapdrm/dss/dispc.c   | 19 +++
 drivers/gpu/drm/omapdrm/dss/display.c |  8 
 drivers/gpu/drm/omapdrm/dss/dsi.c |  3 ++-
 drivers/gpu/drm/omapdrm/dss/omapdss.h |  2 --
 drivers/gpu/drm/omapdrm/dss/rfbi.c|  3 ++-
 drivers/gpu/drm/omapdrm/dss/venc.c|  6 ++
 drivers/gpu/drm/omapdrm/omap_connector.c  |  2 +-
 15 files changed, 29 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
index b81c366ba63a..b94bfca0ecae 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
@@ -34,10 +34,10 @@ static const struct omap_video_timings dvic_default_timings 
= {
.vback_porch= 7,

.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
-   .de_level   = OMAPDSS_SIG_ACTIVE_HIGH,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,

-   .flags  = DISPLAY_FLAGS_HSYNC_HIGH | DISPLAY_FLAGS_VSYNC_HIGH,
+   .flags  = DISPLAY_FLAGS_HSYNC_HIGH | DISPLAY_FLAGS_VSYNC_HIGH |
+ DISPLAY_FLAGS_DE_HIGH,
 };

 struct panel_drv_data {
diff --git a/drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c 
b/drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c
index d768217cefe0..e3b8dddc90bd 100644
--- a/drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c
+++ b/drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c
@@ -117,7 +117,7 @@ static void tfp410_fix_timings(struct omap_video_timings 
*timings)
 {
timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
-   timings->de_level = OMAPDSS_SIG_ACTIVE_HIGH;
+   timings->flags |= DISPLAY_FLAGS_DE_HIGH;
 }

 static void tfp410_set_timings(struct omap_dss_device *dssdev,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c 
b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
index 999dec6c2cff..7d4c59bf1950 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
@@ -34,10 +34,10 @@ static struct omap_video_timings lb035q02_timings = {
.vback_porch= 18,

.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
-   .de_level   = OMAPDSS_SIG_ACTIVE_HIGH,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,

-   .flags  = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW,
+   .flags  = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
+ DISPLAY_FLAGS_DE_HIGH,
 };

 struct panel_drv_data {
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c 
b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
index c45eb3520346..6f7bc89ff9ee 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
@@ -77,10 +77,10 @@ static const struct omap_video_timings 
nec_8048_panel_timings = {
.vback_porch= 4,

.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
-   .de_level   = OMAPDSS_SIG_ACTIVE_HIGH,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,

-   .flags  = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW,
+   .flags  = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
+ DISPLAY_FLAGS_DE_HIGH,
 };

 #define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c 
b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
index a83e6a1b894b..a18dd7160df0 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
@@ -50,10 +50,10 @@ static const struct omap_video_timings sharp_ls_timings = {
.vback_porch= 1,

.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
-   .de_level   = OMAPDSS_SIG_ACTIVE_HIGH,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,

-   .flags  = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW,
+   .flags  =

[PATCH 15/26] drm/omap: omap_display_timings: Use display_flags for h/vsync level

2016-09-01 Thread Peter Ujfalusi

In preparation to move the stack to use the generic videmode
struct for display timing information.

Signed-off-by: Peter Ujfalusi 
---
 .../gpu/drm/omapdrm/displays/connector-analog-tv.c |  3 +-
 drivers/gpu/drm/omapdrm/displays/connector-dvi.c   |  4 +--
 drivers/gpu/drm/omapdrm/displays/connector-hdmi.c  |  3 +-
 .../omapdrm/displays/panel-lgphilips-lb035q02.c|  4 +--
 .../drm/omapdrm/displays/panel-nec-nl8048hl11.c|  4 +--
 .../drm/omapdrm/displays/panel-sharp-ls037v7dw01.c |  4 +--
 .../drm/omapdrm/displays/panel-sony-acx565akm.c|  5 ++--
 .../drm/omapdrm/displays/panel-tpo-td028ttec1.c|  5 ++--
 .../drm/omapdrm/displays/panel-tpo-td043mtea1.c|  4 +--
 drivers/gpu/drm/omapdrm/dss/dispc.c| 33 --
 drivers/gpu/drm/omapdrm/dss/display.c  | 18 ++--
 drivers/gpu/drm/omapdrm/dss/dsi.c  |  6 ++--
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c   |  4 +--
 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c  |  6 ++--
 drivers/gpu/drm/omapdrm/dss/omapdss.h  |  4 ---
 drivers/gpu/drm/omapdrm/dss/rfbi.c |  6 ++--
 drivers/gpu/drm/omapdrm/dss/venc.c | 10 +++
 drivers/gpu/drm/omapdrm/omap_connector.c   | 12 
 18 files changed, 52 insertions(+), 83 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c 
b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
index 0a7491427832..264182f97194 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
@@ -40,7 +40,8 @@ static const struct omap_video_timings tvc_pal_timings = {
.vfront_porch   = 5,
.vback_porch= 41,

-   .flags  = DISPLAY_FLAGS_INTERLACED,
+   .flags  = DISPLAY_FLAGS_INTERLACED | DISPLAY_FLAGS_HSYNC_LOW |
+ DISPLAY_FLAGS_VSYNC_LOW,
 };

 static const struct of_device_id tvc_of_match[];
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
index adbcd566a7ec..b81c366ba63a 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
@@ -33,11 +33,11 @@ static const struct omap_video_timings dvic_default_timings 
= {
.vsync_len  = 4,
.vback_porch= 7,

-   .vsync_level= OMAPDSS_SIG_ACTIVE_HIGH,
-   .hsync_level= OMAPDSS_SIG_ACTIVE_HIGH,
.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
.de_level   = OMAPDSS_SIG_ACTIVE_HIGH,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
+
+   .flags  = DISPLAY_FLAGS_HSYNC_HIGH | DISPLAY_FLAGS_VSYNC_HIGH,
 };

 struct panel_drv_data {
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
index 8e246b9142d7..f9809f4eb390 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
@@ -32,8 +32,7 @@ static const struct omap_video_timings hdmic_default_timings 
= {
.vfront_porch   = 11,
.vback_porch= 31,

-   .vsync_level= OMAPDSS_SIG_ACTIVE_LOW,
-   .hsync_level= OMAPDSS_SIG_ACTIVE_LOW,
+   .flags  = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW,
 };

 struct panel_drv_data {
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c 
b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
index 9c114da37a6b..999dec6c2cff 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
@@ -33,11 +33,11 @@ static struct omap_video_timings lb035q02_timings = {
.vfront_porch   = 4,
.vback_porch= 18,

-   .vsync_level= OMAPDSS_SIG_ACTIVE_LOW,
-   .hsync_level= OMAPDSS_SIG_ACTIVE_LOW,
.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
.de_level   = OMAPDSS_SIG_ACTIVE_HIGH,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
+
+   .flags  = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW,
 };

 struct panel_drv_data {
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c 
b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
index 1e1acc6e06cb..c45eb3520346 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
@@ -76,11 +76,11 @@ static const struct omap_video_timings 
nec_8048_panel_timings = {
.vsync_len  = 1,
.vback_porch= 4,

-   .vsync_level= OMAPDSS_SIG_ACTIVE_LOW,
-   .hsync_level= OMAPDSS_SIG_ACTIVE_LOW,
.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
.de_level   = OMAPDSS_SIG_ACTIVE_HIGH,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
+
+   .flags  = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW,

[PATCH 14/26] drm/omap: dispc: Simplify _dispc_mgr_set_lcd_timings() parameters

2016-09-01 Thread Peter Ujfalusi

Instead of passing the omap_video_timings structure's members individually,
use the pointer to the struct.

Signed-off-by: Peter Ujfalusi 
---
 drivers/gpu/drm/omapdrm/dss/dispc.c | 38 ++---
 1 file changed, 14 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c 
b/drivers/gpu/drm/omapdrm/dss/dispc.c
index 858d87dd7fe8..915609be7a33 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -3141,29 +3141,23 @@ bool dispc_mgr_timings_ok(enum omap_channel channel,
return true;
 }

-static void _dispc_mgr_set_lcd_timings(enum omap_channel channel, int 
hsync_len,
-   int hfp, int hbp, int vsw, int vfp, int vbp,
-   enum omap_dss_signal_level vsync_level,
-   enum omap_dss_signal_level hsync_level,
-   enum omap_dss_signal_edge data_pclk_edge,
-   enum omap_dss_signal_level de_level,
-   enum omap_dss_signal_edge sync_pclk_edge)
-
+static void _dispc_mgr_set_lcd_timings(enum omap_channel channel,
+  struct omap_video_timings *ovt)
 {
u32 timing_h, timing_v, l;
bool onoff, rf, ipc, vs, hs, de;

-   timing_h = FLD_VAL(hsync_len-1, dispc.feat->sw_start, 0) |
-   FLD_VAL(hfp-1, dispc.feat->fp_start, 8) |
-   FLD_VAL(hbp-1, dispc.feat->bp_start, 20);
-   timing_v = FLD_VAL(vsw-1, dispc.feat->sw_start, 0) |
-   FLD_VAL(vfp, dispc.feat->fp_start, 8) |
-   FLD_VAL(vbp, dispc.feat->bp_start, 20);
+   timing_h = FLD_VAL(ovt->hsync_len - 1, dispc.feat->sw_start, 0) |
+  FLD_VAL(ovt->hfront_porch - 1, dispc.feat->fp_start, 8) |
+  FLD_VAL(ovt->hback_porch - 1, dispc.feat->bp_start, 20);
+   timing_v = FLD_VAL(ovt->vsync_len - 1, dispc.feat->sw_start, 0) |
+  FLD_VAL(ovt->vfront_porch, dispc.feat->fp_start, 8) |
+  FLD_VAL(ovt->vback_porch, dispc.feat->bp_start, 20);

dispc_write_reg(DISPC_TIMING_H(channel), timing_h);
dispc_write_reg(DISPC_TIMING_V(channel), timing_v);

-   switch (vsync_level) {
+   switch (ovt->vsync_level) {
case OMAPDSS_SIG_ACTIVE_LOW:
vs = true;
break;
@@ -3174,7 +3168,7 @@ static void _dispc_mgr_set_lcd_timings(enum omap_channel 
channel, int hsync_len,
BUG();
}

-   switch (hsync_level) {
+   switch (ovt->hsync_level) {
case OMAPDSS_SIG_ACTIVE_LOW:
hs = true;
break;
@@ -3185,7 +3179,7 @@ static void _dispc_mgr_set_lcd_timings(enum omap_channel 
channel, int hsync_len,
BUG();
}

-   switch (de_level) {
+   switch (ovt->de_level) {
case OMAPDSS_SIG_ACTIVE_LOW:
de = true;
break;
@@ -3196,7 +3190,7 @@ static void _dispc_mgr_set_lcd_timings(enum omap_channel 
channel, int hsync_len,
BUG();
}

-   switch (data_pclk_edge) {
+   switch (ovt->data_pclk_edge) {
case OMAPDSS_DRIVE_SIG_RISING_EDGE:
ipc = false;
break;
@@ -3210,7 +3204,7 @@ static void _dispc_mgr_set_lcd_timings(enum omap_channel 
channel, int hsync_len,
/* always use the 'rf' setting */
onoff = true;

-   switch (sync_pclk_edge) {
+   switch (ovt->sync_pclk_edge) {
case OMAPDSS_DRIVE_SIG_FALLING_EDGE:
rf = false;
break;
@@ -3270,11 +3264,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
}

if (dss_mgr_is_lcd(channel)) {
-   _dispc_mgr_set_lcd_timings(channel,
-   t.hsync_len, t.hfront_porch, t.hback_porch,
-   t.vsync_len, t.vfront_porch, t.vback_porch,
-   t.vsync_level, t.hsync_level, t.data_pclk_edge,
-   t.de_level, t.sync_pclk_edge);
+   _dispc_mgr_set_lcd_timings(channel, );

xtot = t.hactive + t.hfront_porch + t.hsync_len + t.hback_porch;
ytot = t.vactive + t.vfront_porch + t.vsync_len + t.vback_porch;
-- 
2.9.3

[PATCH 13/26] drm/omap: omap_display_timings: Use display_flags for interlace mode

2016-09-01 Thread Peter Ujfalusi

Remove the interlace member and add display_flags to omap_video_timings to
configure the interlace mode.

Signed-off-by: Peter Ujfalusi 
---
 drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c | 2 +-
 drivers/gpu/drm/omapdrm/displays/connector-hdmi.c  | 2 --
 drivers/gpu/drm/omapdrm/dss/dispc.c| 7 +++
 drivers/gpu/drm/omapdrm/dss/dsi.c  | 2 +-
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c   | 4 ++--
 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c  | 6 +++---
 drivers/gpu/drm/omapdrm/dss/omapdss.h  | 4 ++--
 drivers/gpu/drm/omapdrm/dss/rfbi.c | 2 +-
 drivers/gpu/drm/omapdrm/dss/venc.c | 8 
 drivers/gpu/drm/omapdrm/omap_connector.c   | 6 --
 10 files changed, 21 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c 
b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
index d14cc2e3b8e2..0a7491427832 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
@@ -40,7 +40,7 @@ static const struct omap_video_timings tvc_pal_timings = {
.vfront_porch   = 5,
.vback_porch= 41,

-   .interlace  = true,
+   .flags  = DISPLAY_FLAGS_INTERLACED,
 };

 static const struct of_device_id tvc_of_match[];
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
index 00e3aa212202..8e246b9142d7 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
@@ -34,8 +34,6 @@ static const struct omap_video_timings hdmic_default_timings 
= {

.vsync_level= OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level= OMAPDSS_SIG_ACTIVE_LOW,
-
-   .interlace  = false,
 };

 struct panel_drv_data {
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c 
b/drivers/gpu/drm/omapdrm/dss/dispc.c
index f21b7dd0f492..858d87dd7fe8 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -2607,7 +2607,7 @@ static int dispc_ovl_setup_common(enum omap_plane plane,
u16 in_height = height;
u16 in_width = width;
int x_predecim = 1, y_predecim = 1;
-   bool ilace = mgr_timings->interlace;
+   bool ilace = !!(mgr_timings->flags & DISPLAY_FLAGS_INTERLACED);
unsigned long pclk = dispc_plane_pclk_rate(plane);
unsigned long lclk = dispc_plane_lclk_rate(plane);

@@ -3128,7 +3128,7 @@ bool dispc_mgr_timings_ok(enum omap_channel channel,

if (dss_mgr_is_lcd(channel)) {
/* TODO: OMAP4+ supports interlace for LCD outputs */
-   if (timings->interlace)
+   if (timings->flags & DISPLAY_FLAGS_INTERLACED)
return false;

if (!_dispc_lcd_timings_ok(timings->hsync_len,
@@ -3292,7 +3292,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,

DSSDBG("hsync %luHz, vsync %luHz\n", ht, vt);
} else {
-   if (t.interlace)
+   if (t.flags & DISPLAY_FLAGS_INTERLACED)
t.vactive /= 2;

if (dispc.feat->supports_double_pixel)
@@ -4232,7 +4232,6 @@ static const struct dispc_errata_i734_data {
.vsync_len = 1, .vfront_porch = 1, .vback_porch = 1,
.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
-   .interlace = false,
.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
.de_level = OMAPDSS_SIG_ACTIVE_HIGH,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 9ed17dba2849..0d05ac9931a2 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -4122,7 +4122,7 @@ static int dsi_display_init_dispc(struct platform_device 
*dsidev,
 * override interlace, logic level and edge related parameters in
 * omap_video_timings with default values
 */
-   dsi->timings.interlace = false;
+   dsi->timings.flags &= ~DISPLAY_FLAGS_INTERLACED;
dsi->timings.hsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
dsi->timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
dsi->timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
index 2baef4f7714b..62268f8d62c6 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
@@ -303,7 +303,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config 
*video_cfg,
cfg->timings.vback_porch;
video_cfg->v_fc_config.hdmi_dvi_mode = cfg->hdmi_dvi_mode;

-   if (cfg->timings.interlace) {
+   if (cfg->timings.flags &

[PATCH 12/26] drm/omap: HDMI5: Use pointer to cfg->v_fc_config.timings in hdmi_core_video_config

2016-09-01 Thread Peter Ujfalusi

By using a pointer to the omap_vode_timings struct we can unwrap lines to
make the code easier to follow.

Signed-off-by: Peter Ujfalusi 
---
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c | 47 ++--
 1 file changed, 20 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
index 457dbd2f93a2..2baef4f7714b 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
@@ -329,13 +329,12 @@ static void hdmi_core_video_config(struct hdmi_core_data 
*core,
struct hdmi_core_vid_config *cfg)
 {
void __iomem *base = core->base;
+   struct omap_video_timings *ovt = >v_fc_config.timings;
unsigned char r = 0;
bool vsync_pol, hsync_pol;

-   vsync_pol =
-   cfg->v_fc_config.timings.vsync_level == OMAPDSS_SIG_ACTIVE_HIGH;
-   hsync_pol =
-   cfg->v_fc_config.timings.hsync_level == OMAPDSS_SIG_ACTIVE_HIGH;
+   vsync_pol = ovt->vsync_level == OMAPDSS_SIG_ACTIVE_HIGH;
+   hsync_pol = ovt->hsync_level == OMAPDSS_SIG_ACTIVE_HIGH;

/* Set hsync, vsync and data-enable polarity  */
r = hdmi_read_reg(base, HDMI_CORE_FC_INVIDCONF);
@@ -343,20 +342,16 @@ static void hdmi_core_video_config(struct hdmi_core_data 
*core,
r = FLD_MOD(r, hsync_pol, 5, 5);
r = FLD_MOD(r, cfg->data_enable_pol, 4, 4);
r = FLD_MOD(r, cfg->vblank_osc, 1, 1);
-   r = FLD_MOD(r, cfg->v_fc_config.timings.interlace, 0, 0);
+   r = FLD_MOD(r, ovt->interlace, 0, 0);
hdmi_write_reg(base, HDMI_CORE_FC_INVIDCONF, r);

/* set x resolution */
-   REG_FLD_MOD(base, HDMI_CORE_FC_INHACTIV1,
-   cfg->v_fc_config.timings.hactive >> 8, 4, 0);
-   REG_FLD_MOD(base, HDMI_CORE_FC_INHACTIV0,
-   cfg->v_fc_config.timings.hactive & 0xFF, 7, 0);
+   REG_FLD_MOD(base, HDMI_CORE_FC_INHACTIV1, ovt->hactive >> 8, 4, 0);
+   REG_FLD_MOD(base, HDMI_CORE_FC_INHACTIV0, ovt->hactive & 0xFF, 7, 0);

/* set y resolution */
-   REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV1,
-   cfg->v_fc_config.timings.vactive >> 8, 4, 0);
-   REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV0,
-   cfg->v_fc_config.timings.vactive & 0xFF, 7, 0);
+   REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV1, ovt->vactive >> 8, 4, 0);
+   REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV0, ovt->vactive & 0xFF, 7, 0);

/* set horizontal blanking pixels */
REG_FLD_MOD(base, HDMI_CORE_FC_INHBLANK1, cfg->hblank >> 8, 4, 0);
@@ -366,30 +361,28 @@ static void hdmi_core_video_config(struct hdmi_core_data 
*core,
REG_FLD_MOD(base, HDMI_CORE_FC_INVBLANK, cfg->vblank, 7, 0);

/* set horizontal sync offset */
-   REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINDELAY1,
-   cfg->v_fc_config.timings.hfront_porch >> 8, 4, 0);
-   REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINDELAY0,
-   cfg->v_fc_config.timings.hfront_porch & 0xFF, 7, 0);
+   REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINDELAY1, ovt->hfront_porch >> 8,
+   4, 0);
+   REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINDELAY0, ovt->hfront_porch & 0xFF,
+   7, 0);

/* set vertical sync offset */
-   REG_FLD_MOD(base, HDMI_CORE_FC_VSYNCINDELAY,
-   cfg->v_fc_config.timings.vfront_porch, 7, 0);
+   REG_FLD_MOD(base, HDMI_CORE_FC_VSYNCINDELAY, ovt->vfront_porch, 7, 0);

/* set horizontal sync pulse width */
-   REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINWIDTH1,
-   (cfg->v_fc_config.timings.hsync_len >> 8), 1, 0);
-   REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINWIDTH0,
-   cfg->v_fc_config.timings.hsync_len & 0xFF, 7, 0);
+   REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINWIDTH1, (ovt->hsync_len >> 8),
+   1, 0);
+   REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINWIDTH0, ovt->hsync_len & 0xFF,
+   7, 0);

/*  set vertical sync pulse width */
-   REG_FLD_MOD(base, HDMI_CORE_FC_VSYNCINWIDTH,
-   cfg->v_fc_config.timings.vsync_len, 5, 0);
+   REG_FLD_MOD(base, HDMI_CORE_FC_VSYNCINWIDTH, ovt->vsync_len, 5, 0);

/* select DVI mode */
REG_FLD_MOD(base, HDMI_CORE_FC_INVIDCONF,
-   cfg->v_fc_config.hdmi_dvi_mode, 3, 3);
+   cfg->v_fc_config.hdmi_dvi_mode, 3, 3);

-   if (cfg->v_fc_config.timings.double_pixel)
+   if (ovt->double_pixel)
REG_FLD_MOD(base, HDMI_CORE_FC_PRCONF, 2, 7, 4);
else
REG_FLD_MOD(base, HDMI_CORE_FC_PRCONF, 1, 7, 4);
-- 
2.9.3

[PATCH 11/26] drm/omap: omap_display_timings: rename vbp to vback_porch

2016-09-01 Thread Peter Ujfalusi

In preparation to move the stack to use the generic videmode
struct for display timing information.

Signed-off-by: Peter Ujfalusi 
---
 drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c|  2 +-
 drivers/gpu/drm/omapdrm/displays/connector-dvi.c  |  2 +-
 drivers/gpu/drm/omapdrm/displays/connector-hdmi.c |  2 +-
 .../gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c   |  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c   |  2 +-
 .../gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c|  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c   |  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c   |  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c   |  2 +-
 drivers/gpu/drm/omapdrm/dss/dispc.c   | 15 ---
 drivers/gpu/drm/omapdrm/dss/display.c |  4 ++--
 drivers/gpu/drm/omapdrm/dss/dsi.c |  4 ++--
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c  |  6 +++---
 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c |  6 +++---
 drivers/gpu/drm/omapdrm/dss/omapdss.h |  2 +-
 drivers/gpu/drm/omapdrm/dss/rfbi.c|  2 +-
 drivers/gpu/drm/omapdrm/dss/venc.c|  4 ++--
 drivers/gpu/drm/omapdrm/omap_connector.c  |  4 ++--
 18 files changed, 33 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c 
b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
index 51d0d45a6675..d14cc2e3b8e2 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
@@ -38,7 +38,7 @@ static const struct omap_video_timings tvc_pal_timings = {
.hback_porch= 68,
.vsync_len  = 5,
.vfront_porch   = 5,
-   .vbp= 41,
+   .vback_porch= 41,

.interlace  = true,
 };
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
index efd122760833..adbcd566a7ec 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
@@ -31,7 +31,7 @@ static const struct omap_video_timings dvic_default_timings = 
{

.vfront_porch   = 3,
.vsync_len  = 4,
-   .vbp= 7,
+   .vback_porch= 7,

.vsync_level= OMAPDSS_SIG_ACTIVE_HIGH,
.hsync_level= OMAPDSS_SIG_ACTIVE_HIGH,
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
index 7d60e465d354..00e3aa212202 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
@@ -30,7 +30,7 @@ static const struct omap_video_timings hdmic_default_timings 
= {
.hback_porch= 48,
.vsync_len  = 2,
.vfront_porch   = 11,
-   .vbp= 31,
+   .vback_porch= 31,

.vsync_level= OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level= OMAPDSS_SIG_ACTIVE_LOW,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c 
b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
index 66d30ba7db81..9c114da37a6b 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
@@ -31,7 +31,7 @@ static struct omap_video_timings lb035q02_timings = {

.vsync_len  = 2,
.vfront_porch   = 4,
-   .vbp= 18,
+   .vback_porch= 18,

.vsync_level= OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level= OMAPDSS_SIG_ACTIVE_LOW,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c 
b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
index 9cb02c4bce41..1e1acc6e06cb 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
@@ -74,7 +74,7 @@ static const struct omap_video_timings nec_8048_panel_timings 
= {
.hback_porch= 4,
.vfront_porch   = 3,
.vsync_len  = 1,
-   .vbp= 4,
+   .vback_porch= 4,

.vsync_level= OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level= OMAPDSS_SIG_ACTIVE_LOW,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c 
b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
index 3b23aaf2676d..79cb8bde1cca 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
@@ -47,7 +47,7 @@ static const struct omap_video_timings sharp_ls_timings = {

.vsync_len  = 1,
.vfront_porch   = 1,
-   .vbp= 1,
+   .vback_porch= 1,

.vsync_level= OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level= OMAPDSS_SIG_ACTIVE_LOW,
diff --git

[PATCH 10/26] drm/omap: omap_display_timings: rename vfp to vfront_porch

2016-09-01 Thread Peter Ujfalusi

In preparation to move the stack to use the generic videmode
struct for display timing information.

Signed-off-by: Peter Ujfalusi 
---
 drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c|  2 +-
 drivers/gpu/drm/omapdrm/displays/connector-dvi.c  |  2 +-
 drivers/gpu/drm/omapdrm/displays/connector-hdmi.c |  2 +-
 .../gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c   |  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c   |  2 +-
 .../gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c|  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c   |  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c   |  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c   |  2 +-
 drivers/gpu/drm/omapdrm/dss/dispc.c   | 15 ---
 drivers/gpu/drm/omapdrm/dss/display.c |  4 ++--
 drivers/gpu/drm/omapdrm/dss/dsi.c |  4 ++--
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c  |  6 +++---
 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c |  6 +++---
 drivers/gpu/drm/omapdrm/dss/omapdss.h |  2 +-
 drivers/gpu/drm/omapdrm/dss/rfbi.c|  2 +-
 drivers/gpu/drm/omapdrm/dss/venc.c|  4 ++--
 drivers/gpu/drm/omapdrm/omap_connector.c  |  4 ++--
 18 files changed, 33 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c 
b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
index ce33f47f4eea..51d0d45a6675 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
@@ -37,7 +37,7 @@ static const struct omap_video_timings tvc_pal_timings = {
.hfront_porch   = 12,
.hback_porch= 68,
.vsync_len  = 5,
-   .vfp= 5,
+   .vfront_porch   = 5,
.vbp= 41,

.interlace  = true,
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
index 91516fbc711b..efd122760833 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
@@ -29,7 +29,7 @@ static const struct omap_video_timings dvic_default_timings = 
{
.hsync_len  = 32,
.hback_porch= 80,

-   .vfp= 3,
+   .vfront_porch   = 3,
.vsync_len  = 4,
.vbp= 7,

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
index 6e75da30dc9d..7d60e465d354 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
@@ -29,7 +29,7 @@ static const struct omap_video_timings hdmic_default_timings 
= {
.hfront_porch   = 16,
.hback_porch= 48,
.vsync_len  = 2,
-   .vfp= 11,
+   .vfront_porch   = 11,
.vbp= 31,

.vsync_level= OMAPDSS_SIG_ACTIVE_LOW,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c 
b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
index 5b2dd1e48705..66d30ba7db81 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
@@ -30,7 +30,7 @@ static struct omap_video_timings lb035q02_timings = {
.hback_porch= 68,

.vsync_len  = 2,
-   .vfp= 4,
+   .vfront_porch   = 4,
.vbp= 18,

.vsync_level= OMAPDSS_SIG_ACTIVE_LOW,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c 
b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
index ce0ab77a6fcd..9cb02c4bce41 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
@@ -72,7 +72,7 @@ static const struct omap_video_timings nec_8048_panel_timings 
= {
.hfront_porch   = 6,
.hsync_len  = 1,
.hback_porch= 4,
-   .vfp= 3,
+   .vfront_porch   = 3,
.vsync_len  = 1,
.vbp= 4,

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c 
b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
index 917f145e8d88..3b23aaf2676d 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
@@ -46,7 +46,7 @@ static const struct omap_video_timings sharp_ls_timings = {
.hback_porch= 28,

.vsync_len  = 1,
-   .vfp= 1,
+   .vfront_porch   = 1,
.vbp= 1,

.vsync_level= OMAPDSS_SIG_ACTIVE_LOW,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c 
b/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
index

[PATCH 09/26] drm/omap: omap_display_timings: rename vsw to vsync_len

2016-09-01 Thread Peter Ujfalusi

In preparation to move the stack to use the generic videmode
struct for display timing information.

Signed-off-by: Peter Ujfalusi 
---
 drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c  |  2 +-
 drivers/gpu/drm/omapdrm/displays/connector-dvi.c|  2 +-
 drivers/gpu/drm/omapdrm/displays/connector-hdmi.c   |  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c |  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c |  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c  |  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c |  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c |  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c |  2 +-
 drivers/gpu/drm/omapdrm/dss/dispc.c | 12 ++--
 drivers/gpu/drm/omapdrm/dss/display.c   |  4 ++--
 drivers/gpu/drm/omapdrm/dss/dsi.c   |  4 ++--
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c|  6 +++---
 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c   |  6 +++---
 drivers/gpu/drm/omapdrm/dss/omapdss.h   |  2 +-
 drivers/gpu/drm/omapdrm/dss/rfbi.c  |  2 +-
 drivers/gpu/drm/omapdrm/dss/venc.c  |  4 ++--
 drivers/gpu/drm/omapdrm/omap_connector.c|  4 ++--
 18 files changed, 31 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c 
b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
index 2dbc6a42fb32..ce33f47f4eea 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
@@ -36,7 +36,7 @@ static const struct omap_video_timings tvc_pal_timings = {
.hsync_len  = 64,
.hfront_porch   = 12,
.hback_porch= 68,
-   .vsw= 5,
+   .vsync_len  = 5,
.vfp= 5,
.vbp= 41,

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
index 6cf541cb9933..91516fbc711b 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
@@ -30,7 +30,7 @@ static const struct omap_video_timings dvic_default_timings = 
{
.hback_porch= 80,

.vfp= 3,
-   .vsw= 4,
+   .vsync_len  = 4,
.vbp= 7,

.vsync_level= OMAPDSS_SIG_ACTIVE_HIGH,
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
index 24d047844b7c..6e75da30dc9d 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
@@ -28,7 +28,7 @@ static const struct omap_video_timings hdmic_default_timings 
= {
.hsync_len  = 96,
.hfront_porch   = 16,
.hback_porch= 48,
-   .vsw= 2,
+   .vsync_len  = 2,
.vfp= 11,
.vbp= 31,

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c 
b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
index 295904a5f28d..5b2dd1e48705 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
@@ -29,7 +29,7 @@ static struct omap_video_timings lb035q02_timings = {
.hfront_porch   = 20,
.hback_porch= 68,

-   .vsw= 2,
+   .vsync_len  = 2,
.vfp= 4,
.vbp= 18,

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c 
b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
index d408824a3341..ce0ab77a6fcd 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
@@ -73,7 +73,7 @@ static const struct omap_video_timings nec_8048_panel_timings 
= {
.hsync_len  = 1,
.hback_porch= 4,
.vfp= 3,
-   .vsw= 1,
+   .vsync_len  = 1,
.vbp= 4,

.vsync_level= OMAPDSS_SIG_ACTIVE_LOW,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c 
b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
index b36df2c66db1..917f145e8d88 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
@@ -45,7 +45,7 @@ static const struct omap_video_timings sharp_ls_timings = {
.hfront_porch   = 1,
.hback_porch= 28,

-   .vsw= 1,
+   .vsync_len  = 1,
.vfp= 1,
.vbp= 1,

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c 
b/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
index

[PATCH 08/26] drm/omap: omap_display_timings: rename hbp to hback_porch

2016-09-01 Thread Peter Ujfalusi

In preparation to move the stack to use the generic videmode
struct for display timing information.

Signed-off-by: Peter Ujfalusi 
---
 .../gpu/drm/omapdrm/displays/connector-analog-tv.c|  2 +-
 drivers/gpu/drm/omapdrm/displays/connector-dvi.c  |  2 +-
 drivers/gpu/drm/omapdrm/displays/connector-hdmi.c |  2 +-
 .../drm/omapdrm/displays/panel-lgphilips-lb035q02.c   |  2 +-
 .../gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c   |  2 +-
 .../drm/omapdrm/displays/panel-sharp-ls037v7dw01.c|  2 +-
 .../gpu/drm/omapdrm/displays/panel-sony-acx565akm.c   |  2 +-
 .../gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c   |  2 +-
 .../gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c   |  2 +-
 drivers/gpu/drm/omapdrm/dss/dispc.c   | 19 ++-
 drivers/gpu/drm/omapdrm/dss/display.c |  4 ++--
 drivers/gpu/drm/omapdrm/dss/dsi.c | 11 ++-
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c  |  4 ++--
 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c |  6 +++---
 drivers/gpu/drm/omapdrm/dss/omapdss.h |  2 +-
 drivers/gpu/drm/omapdrm/dss/rfbi.c|  2 +-
 drivers/gpu/drm/omapdrm/dss/venc.c|  4 ++--
 drivers/gpu/drm/omapdrm/omap_connector.c  |  4 ++--
 18 files changed, 38 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c 
b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
index 6d089b337bcb..2dbc6a42fb32 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
@@ -35,7 +35,7 @@ static const struct omap_video_timings tvc_pal_timings = {
.pixelclock = 1350,
.hsync_len  = 64,
.hfront_porch   = 12,
-   .hbp= 68,
+   .hback_porch= 68,
.vsw= 5,
.vfp= 5,
.vbp= 41,
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
index cf893866aca0..6cf541cb9933 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
@@ -27,7 +27,7 @@ static const struct omap_video_timings dvic_default_timings = 
{

.hfront_porch   = 48,
.hsync_len  = 32,
-   .hbp= 80,
+   .hback_porch= 80,

.vfp= 3,
.vsw= 4,
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
index fd1178b57f79..24d047844b7c 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
@@ -27,7 +27,7 @@ static const struct omap_video_timings hdmic_default_timings 
= {
.pixelclock = 25175000,
.hsync_len  = 96,
.hfront_porch   = 16,
-   .hbp= 48,
+   .hback_porch= 48,
.vsw= 2,
.vfp= 11,
.vbp= 31,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c 
b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
index 677db7b22a02..295904a5f28d 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
@@ -27,7 +27,7 @@ static struct omap_video_timings lb035q02_timings = {

.hsync_len  = 2,
.hfront_porch   = 20,
-   .hbp= 68,
+   .hback_porch= 68,

.vsw= 2,
.vfp= 4,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c 
b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
index aff07f810796..d408824a3341 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
@@ -71,7 +71,7 @@ static const struct omap_video_timings nec_8048_panel_timings 
= {
.pixelclock = LCD_PIXEL_CLOCK,
.hfront_porch   = 6,
.hsync_len  = 1,
-   .hbp= 4,
+   .hback_porch= 4,
.vfp= 3,
.vsw= 1,
.vbp= 4,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c 
b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
index c8348090e745..b36df2c66db1 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
@@ -43,7 +43,7 @@ static const struct omap_video_timings sharp_ls_timings = {

.hsync_len  = 2,
.hfront_porch   = 1,
-   .hbp= 28,
+   .hback_porch= 28,

.vsw= 1,
.vfp= 1,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c 
b/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
index fab0e98577f5..ed55ad9fa731

[PATCH 07/26] drm/omap: omap_display_timings: rename hfp to hfront_porch

2016-09-01 Thread Peter Ujfalusi

In preparation to move the stack to use the generic videmode
struct for display timing information.

Signed-off-by: Peter Ujfalusi 
---
 .../gpu/drm/omapdrm/displays/connector-analog-tv.c |  2 +-
 drivers/gpu/drm/omapdrm/displays/connector-dvi.c   |  2 +-
 drivers/gpu/drm/omapdrm/displays/connector-hdmi.c  |  2 +-
 .../omapdrm/displays/panel-lgphilips-lb035q02.c|  2 +-
 .../drm/omapdrm/displays/panel-nec-nl8048hl11.c|  2 +-
 .../drm/omapdrm/displays/panel-sharp-ls037v7dw01.c |  2 +-
 .../drm/omapdrm/displays/panel-sony-acx565akm.c|  2 +-
 .../drm/omapdrm/displays/panel-tpo-td028ttec1.c|  2 +-
 .../drm/omapdrm/displays/panel-tpo-td043mtea1.c|  2 +-
 drivers/gpu/drm/omapdrm/dss/dispc.c| 22 --
 drivers/gpu/drm/omapdrm/dss/display.c  |  4 ++--
 drivers/gpu/drm/omapdrm/dss/dsi.c  | 22 +++---
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c   |  8 
 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c  |  6 +++---
 drivers/gpu/drm/omapdrm/dss/omapdss.h  |  2 +-
 drivers/gpu/drm/omapdrm/dss/rfbi.c |  2 +-
 drivers/gpu/drm/omapdrm/dss/venc.c |  4 ++--
 drivers/gpu/drm/omapdrm/omap_connector.c   |  4 ++--
 18 files changed, 47 insertions(+), 45 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c 
b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
index 5205a8ef6038..6d089b337bcb 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
@@ -34,7 +34,7 @@ static const struct omap_video_timings tvc_pal_timings = {
.vactive= 574,
.pixelclock = 1350,
.hsync_len  = 64,
-   .hfp= 12,
+   .hfront_porch   = 12,
.hbp= 68,
.vsw= 5,
.vfp= 5,
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
index e9a8ea5043e6..cf893866aca0 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
@@ -25,7 +25,7 @@ static const struct omap_video_timings dvic_default_timings = 
{

.pixelclock = 2350,

-   .hfp= 48,
+   .hfront_porch   = 48,
.hsync_len  = 32,
.hbp= 80,

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
index 707fd62cb99c..fd1178b57f79 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
@@ -26,7 +26,7 @@ static const struct omap_video_timings hdmic_default_timings 
= {
.vactive= 480,
.pixelclock = 25175000,
.hsync_len  = 96,
-   .hfp= 16,
+   .hfront_porch   = 16,
.hbp= 48,
.vsw= 2,
.vfp= 11,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c 
b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
index 6fbf07048df0..677db7b22a02 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
@@ -26,7 +26,7 @@ static struct omap_video_timings lb035q02_timings = {
.pixelclock = 650,

.hsync_len  = 2,
-   .hfp= 20,
+   .hfront_porch   = 20,
.hbp= 68,

.vsw= 2,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c 
b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
index e0462aaf62f1..aff07f810796 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
@@ -69,7 +69,7 @@ static const struct omap_video_timings nec_8048_panel_timings 
= {
.hactive= LCD_XRES,
.vactive= LCD_YRES,
.pixelclock = LCD_PIXEL_CLOCK,
-   .hfp= 6,
+   .hfront_porch   = 6,
.hsync_len  = 1,
.hbp= 4,
.vfp= 3,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c 
b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
index 5e96edebdd5c..c8348090e745 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
@@ -42,7 +42,7 @@ static const struct omap_video_timings sharp_ls_timings = {
.pixelclock = 1920,

.hsync_len  = 2,
-   .hfp= 1,
+   .hfront_porch   = 1,
.hbp= 28,

.vsw= 1,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c 
b/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
index e679d8d62e18..fab0e98577f5 100644
---

[PATCH 06/26] drm/omap: omap_display_timings: rename hsw to hsync_len

2016-09-01 Thread Peter Ujfalusi

In preparation to move the stack to use the generic videmode
struct for display timing information.

Signed-off-by: Peter Ujfalusi 
---
 .../gpu/drm/omapdrm/displays/connector-analog-tv.c |  2 +-
 drivers/gpu/drm/omapdrm/displays/connector-dvi.c   |  2 +-
 drivers/gpu/drm/omapdrm/displays/connector-hdmi.c  |  2 +-
 .../omapdrm/displays/panel-lgphilips-lb035q02.c|  2 +-
 .../drm/omapdrm/displays/panel-nec-nl8048hl11.c|  2 +-
 .../drm/omapdrm/displays/panel-sharp-ls037v7dw01.c |  2 +-
 .../drm/omapdrm/displays/panel-sony-acx565akm.c|  2 +-
 .../drm/omapdrm/displays/panel-tpo-td028ttec1.c|  2 +-
 .../drm/omapdrm/displays/panel-tpo-td043mtea1.c|  2 +-
 drivers/gpu/drm/omapdrm/dss/dispc.c| 29 +++---
 drivers/gpu/drm/omapdrm/dss/display.c  |  4 +--
 drivers/gpu/drm/omapdrm/dss/dsi.c  | 22 
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c   |  8 +++---
 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c  | 12 -
 drivers/gpu/drm/omapdrm/dss/omapdss.h  |  2 +-
 drivers/gpu/drm/omapdrm/dss/rfbi.c |  2 +-
 drivers/gpu/drm/omapdrm/dss/venc.c |  4 +--
 drivers/gpu/drm/omapdrm/omap_connector.c   |  4 +--
 18 files changed, 53 insertions(+), 52 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c 
b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
index a57e1efb12ac..5205a8ef6038 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
@@ -33,7 +33,7 @@ static const struct omap_video_timings tvc_pal_timings = {
.hactive= 720,
.vactive= 574,
.pixelclock = 1350,
-   .hsw= 64,
+   .hsync_len  = 64,
.hfp= 12,
.hbp= 68,
.vsw= 5,
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
index b25c05c27c80..e9a8ea5043e6 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
@@ -26,7 +26,7 @@ static const struct omap_video_timings dvic_default_timings = 
{
.pixelclock = 2350,

.hfp= 48,
-   .hsw= 32,
+   .hsync_len  = 32,
.hbp= 80,

.vfp= 3,
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
index 33bc41c5cf71..707fd62cb99c 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
@@ -25,7 +25,7 @@ static const struct omap_video_timings hdmic_default_timings 
= {
.hactive= 640,
.vactive= 480,
.pixelclock = 25175000,
-   .hsw= 96,
+   .hsync_len  = 96,
.hfp= 16,
.hbp= 48,
.vsw= 2,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c 
b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
index dc8d191e3635..6fbf07048df0 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
@@ -25,7 +25,7 @@ static struct omap_video_timings lb035q02_timings = {

.pixelclock = 650,

-   .hsw= 2,
+   .hsync_len  = 2,
.hfp= 20,
.hbp= 68,

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c 
b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
index 83658b9077fc..e0462aaf62f1 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
@@ -70,7 +70,7 @@ static const struct omap_video_timings nec_8048_panel_timings 
= {
.vactive= LCD_YRES,
.pixelclock = LCD_PIXEL_CLOCK,
.hfp= 6,
-   .hsw= 1,
+   .hsync_len  = 1,
.hbp= 4,
.vfp= 3,
.vsw= 1,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c 
b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
index c2dda73ac466..5e96edebdd5c 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
@@ -41,7 +41,7 @@ static const struct omap_video_timings sharp_ls_timings = {

.pixelclock = 1920,

-   .hsw= 2,
+   .hsync_len  = 2,
.hfp= 1,
.hbp= 28,

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c 
b/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
index a7a6d5239f31..e679d8d62e18 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c

[PATCH 05/26] drm/omap: omap_display_timings: rename y_res to vactive

2016-09-01 Thread Peter Ujfalusi

In preparation to move the stack to use the generic videmode
struct for display timing information.

Signed-off-by: Peter Ujfalusi 
---
 drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c |  2 +-
 drivers/gpu/drm/omapdrm/displays/connector-dvi.c   |  2 +-
 drivers/gpu/drm/omapdrm/displays/connector-hdmi.c  |  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c|  8 
 .../gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c|  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c|  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c |  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c|  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c|  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c|  2 +-
 drivers/gpu/drm/omapdrm/dss/dispc.c| 14 +++---
 drivers/gpu/drm/omapdrm/dss/display.c  |  6 +++---
 drivers/gpu/drm/omapdrm/dss/dsi.c  | 12 ++--
 drivers/gpu/drm/omapdrm/dss/hdmi4.c|  3 ++-
 drivers/gpu/drm/omapdrm/dss/hdmi5.c|  3 ++-
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c   |  6 +++---
 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c  |  2 +-
 drivers/gpu/drm/omapdrm/dss/omapdss.h  |  2 +-
 drivers/gpu/drm/omapdrm/dss/rfbi.c |  6 +++---
 drivers/gpu/drm/omapdrm/dss/venc.c |  4 ++--
 drivers/gpu/drm/omapdrm/omap_connector.c   |  4 ++--
 21 files changed, 45 insertions(+), 43 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c 
b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
index 190a03672181..a57e1efb12ac 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
@@ -31,7 +31,7 @@ struct panel_drv_data {

 static const struct omap_video_timings tvc_pal_timings = {
.hactive= 720,
-   .y_res  = 574,
+   .vactive= 574,
.pixelclock = 1350,
.hsw= 64,
.hfp= 12,
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
index c6e02e1a3799..b25c05c27c80 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
@@ -21,7 +21,7 @@

 static const struct omap_video_timings dvic_default_timings = {
.hactive= 640,
-   .y_res  = 480,
+   .vactive= 480,

.pixelclock = 2350,

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
index ef5ae08b362b..33bc41c5cf71 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
@@ -23,7 +23,7 @@

 static const struct omap_video_timings hdmic_default_timings = {
.hactive= 640,
-   .y_res  = 480,
+   .vactive= 480,
.pixelclock = 25175000,
.hsw= 96,
.hfp= 16,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c 
b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
index c34f2aa0118b..c3d2a12358fa 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
@@ -383,7 +383,7 @@ static void dsicm_get_resolution(struct omap_dss_device 
*dssdev,
u16 *xres, u16 *yres)
 {
*xres = dssdev->panel.timings.hactive;
-   *yres = dssdev->panel.timings.y_res;
+   *yres = dssdev->panel.timings.vactive;
 }

 static ssize_t dsicm_num_errors_show(struct device *dev,
@@ -893,7 +893,7 @@ static int dsicm_update(struct omap_dss_device *dssdev,
/* XXX no need to send this every frame, but dsi break if not done */
r = dsicm_set_update_window(ddata, 0, 0,
dssdev->panel.timings.hactive,
-   dssdev->panel.timings.y_res);
+   dssdev->panel.timings.vactive);
if (r)
goto err;

@@ -1025,7 +1025,7 @@ static int dsicm_memory_read(struct omap_dss_device 
*dssdev,

size = min(w * h * 3,
dssdev->panel.timings.hactive *
-   dssdev->panel.timings.y_res * 3);
+   dssdev->panel.timings.vactive * 3);

in->ops.dsi->bus_lock(in);

@@ -1187,7 +1187,7 @@ static int dsicm_probe(struct platform_device *pdev)
return r;

ddata->timings.hactive = 864;
-   ddata->timings.y_res = 480;
+   ddata->timings.vactive = 480;
ddata->timings.pixelclock = 864 * 480 * 60;

dssdev = >dssdev;
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c

[PATCH 04/26] drm/omap: omap_display_timings: rename x_res to hactive

2016-09-01 Thread Peter Ujfalusi

In preparation to move the stack to use the generic videmode
struct for display timing information.

Signed-off-by: Peter Ujfalusi 
---
 .../gpu/drm/omapdrm/displays/connector-analog-tv.c   |  2 +-
 drivers/gpu/drm/omapdrm/displays/connector-dvi.c |  2 +-
 drivers/gpu/drm/omapdrm/displays/connector-hdmi.c|  2 +-
 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c  |  8 
 .../drm/omapdrm/displays/panel-lgphilips-lb035q02.c  |  2 +-
 .../gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c  |  2 +-
 .../drm/omapdrm/displays/panel-sharp-ls037v7dw01.c   |  2 +-
 .../gpu/drm/omapdrm/displays/panel-sony-acx565akm.c  |  2 +-
 .../gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c  |  2 +-
 .../gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c  |  2 +-
 drivers/gpu/drm/omapdrm/dss/dispc.c  | 16 
 drivers/gpu/drm/omapdrm/dss/display.c|  6 +++---
 drivers/gpu/drm/omapdrm/dss/dpi.c|  2 +-
 drivers/gpu/drm/omapdrm/dss/dsi.c| 20 ++--
 drivers/gpu/drm/omapdrm/dss/hdmi4.c  |  2 +-
 drivers/gpu/drm/omapdrm/dss/hdmi5.c  |  2 +-
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c |  6 +++---
 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c|  2 +-
 drivers/gpu/drm/omapdrm/dss/omapdss.h|  2 +-
 drivers/gpu/drm/omapdrm/dss/rfbi.c   |  6 +++---
 drivers/gpu/drm/omapdrm/dss/venc.c   |  4 ++--
 drivers/gpu/drm/omapdrm/omap_connector.c |  4 ++--
 22 files changed, 49 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c 
b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
index 3485d1ecd655..190a03672181 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
@@ -30,7 +30,7 @@ struct panel_drv_data {
 };

 static const struct omap_video_timings tvc_pal_timings = {
-   .x_res  = 720,
+   .hactive= 720,
.y_res  = 574,
.pixelclock = 1350,
.hsw= 64,
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
index 684b7aeda411..c6e02e1a3799 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c
@@ -20,7 +20,7 @@
 #include "../dss/omapdss.h"

 static const struct omap_video_timings dvic_default_timings = {
-   .x_res  = 640,
+   .hactive= 640,
.y_res  = 480,

.pixelclock = 2350,
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c 
b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
index 7bdf83af9797..ef5ae08b362b 100644
--- a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
+++ b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
@@ -22,7 +22,7 @@
 #include "../dss/omapdss.h"

 static const struct omap_video_timings hdmic_default_timings = {
-   .x_res  = 640,
+   .hactive= 640,
.y_res  = 480,
.pixelclock = 25175000,
.hsw= 96,
diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c 
b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
index b1f3b818edf4..c34f2aa0118b 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
@@ -382,7 +382,7 @@ static const struct backlight_ops dsicm_bl_ops = {
 static void dsicm_get_resolution(struct omap_dss_device *dssdev,
u16 *xres, u16 *yres)
 {
-   *xres = dssdev->panel.timings.x_res;
+   *xres = dssdev->panel.timings.hactive;
*yres = dssdev->panel.timings.y_res;
 }

@@ -892,7 +892,7 @@ static int dsicm_update(struct omap_dss_device *dssdev,

/* XXX no need to send this every frame, but dsi break if not done */
r = dsicm_set_update_window(ddata, 0, 0,
-   dssdev->panel.timings.x_res,
+   dssdev->panel.timings.hactive,
dssdev->panel.timings.y_res);
if (r)
goto err;
@@ -1024,7 +1024,7 @@ static int dsicm_memory_read(struct omap_dss_device 
*dssdev,
}

size = min(w * h * 3,
-   dssdev->panel.timings.x_res *
+   dssdev->panel.timings.hactive *
dssdev->panel.timings.y_res * 3);

in->ops.dsi->bus_lock(in);
@@ -1186,7 +1186,7 @@ static int dsicm_probe(struct platform_device *pdev)
if (r)
return r;

-   ddata->timings.x_res = 864;
+   ddata->timings.hactive = 864;
ddata->timings.y_res = 480;
ddata->timings.pixelclock = 864 * 480 * 60;

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c 
b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
index 6dfb96cea293..c8b5462f462f 100644
---

[PATCH 03/26] video: of: display_timing: Add support for syncclk-active property

2016-09-01 Thread Peter Ujfalusi

Configure the DISPLAY_FLAGS_SYNC_POSEDGE/NEGEDGE flags according to the
binding document.
If the syncclk-active is present in DT, configure the flags accordingly, if
it is omitted it means that the SYNC edge is following the pixdata
configuration.

Signed-off-by: Peter Ujfalusi 
CC: Rob Herring 
CC: Mark Rutland 
CC: devicetree at vger.kernel.org
---
 drivers/video/of_display_timing.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/video/of_display_timing.c 
b/drivers/video/of_display_timing.c
index 8a1076beecd3..db992c684f09 100644
--- a/drivers/video/of_display_timing.c
+++ b/drivers/video/of_display_timing.c
@@ -88,6 +88,15 @@ static int of_parse_display_timing(const struct device_node 
*np,
dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
DISPLAY_FLAGS_PIXDATA_NEGEDGE;

+   if (!of_property_read_u32(np, "syncclk-active", ))
+   dt->flags |= val ? DISPLAY_FLAGS_SYNC_POSEDGE :
+   DISPLAY_FLAGS_SYNC_NEGEDGE;
+   else if (dt->flags & (DISPLAY_FLAGS_PIXDATA_POSEDGE |
+ DISPLAY_FLAGS_PIXDATA_NEGEDGE))
+   dt->flags |= dt->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE ?
+   DISPLAY_FLAGS_SYNC_POSEDGE :
+   DISPLAY_FLAGS_SYNC_NEGEDGE;
+
if (of_property_read_bool(np, "interlaced"))
dt->flags |= DISPLAY_FLAGS_INTERLACED;
if (of_property_read_bool(np, "doublescan"))
-- 
2.9.3

[PATCH 02/26] video: display_timing: Add flags to select the edge when the sync is driven

2016-09-01 Thread Peter Ujfalusi

The sync can be - and for some panels it must be - driven on different edge
then the data.

Signed-off-by: Peter Ujfalusi 
CC: Rob Herring 
CC: Mark Rutland 
CC: devicetree at vger.kernel.org
---
 include/video/display_timing.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/include/video/display_timing.h b/include/video/display_timing.h
index 28d9d0d566ca..3d289e990aca 100644
--- a/include/video/display_timing.h
+++ b/include/video/display_timing.h
@@ -28,6 +28,10 @@ enum display_flags {
DISPLAY_FLAGS_INTERLACED= BIT(8),
DISPLAY_FLAGS_DOUBLESCAN= BIT(9),
DISPLAY_FLAGS_DOUBLECLK = BIT(10),
+   /* drive sync on pos. edge */
+   DISPLAY_FLAGS_SYNC_POSEDGE  = BIT(11),
+   /* drive sync on neg. edge */
+   DISPLAY_FLAGS_SYNC_NEGEDGE  = BIT(12),
 };

 /*
-- 
2.9.3

[PATCH 01/26] dt-bindings: display: display-timing: Add property to configure sync drive edge

2016-09-01 Thread Peter Ujfalusi

There are display panels which demands that the sync signal is driven on
different edge than the pixel data.
With the syncclk-active property we can specify the clk edge to be used to
drive the sync signal. When the property is missing it indicates that the
sync is driven on the same edge as the pixel data.

Signed-off-by: Peter Ujfalusi 
CC: Rob Herring 
CC: Mark Rutland 
CC: devicetree at vger.kernel.org
---
 Documentation/devicetree/bindings/display/panel/display-timing.txt | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/display-timing.txt 
b/Documentation/devicetree/bindings/display/panel/display-timing.txt
index e1d4a0b59612..1436292e7a56 100644
--- a/Documentation/devicetree/bindings/display/panel/display-timing.txt
+++ b/Documentation/devicetree/bindings/display/panel/display-timing.txt
@@ -32,6 +32,12 @@ optional properties:
- active low  = drive pixel data on falling edge/
sample data on rising edge
- ignored = ignored
+ - syncclk-active: with
+   - active high = drive sync on rising edge/
+   sample sync on falling edge
+   - active low  = drive sync on falling edge/
+   sample sync on rising edge
+   - omitted = same configuration as pixelclk-active
  - interlaced (bool): boolean to enable interlaced mode
  - doublescan (bool): boolean to enable doublescan mode
  - doubleclk (bool): boolean to enable doubleclock mode
-- 
2.9.3

[PATCH 00/26] drm/omap: Convert to use videomode from omap_video_timings

2016-09-01 Thread Peter Ujfalusi

Hi,

The following series will convert the omapdrm stack to use the generic videmode
instead of the private omap_video_timings struct for the panel information.

Since we have several panels under omapdrm/displays/ where the data drive edge
is set to be different then the sync drive edge, the first three patch will add
support to select the sync drive edge via DT.
I was not able to locate the datasheet for all the panels and because the
different edge was used in omapdrm and omapfb for a long time without complains
from users - and they were written this way - I think it is a valid that we can
have panels requiring different edge for data and sync to be driven.

The rest of the patches are most mechanical ones. I have decided to split it up
to small chunks and did one change at the time to finally remove the
omap_video_timings from omapdrm.


CC: Rob Herring 
CC: Mark Rutland 
CC: devicetree at vger.kernel.org

Regards,
Peter
---
Peter Ujfalusi (26):
  dt-bindings: display: display-timing: Add property to configure sync
drive edge
  video: display_timing: Add flags to select the edge when the sync is
driven
  video: of: display_timing: Add support for syncclk-active property
  drm/omap: omap_display_timings: rename x_res to hactive
  drm/omap: omap_display_timings: rename y_res to vactive
  drm/omap: omap_display_timings: rename hsw to hsync_len
  drm/omap: omap_display_timings: rename hfp to hfront_porch
  drm/omap: omap_display_timings: rename hbp to hback_porch
  drm/omap: omap_display_timings: rename vsw to vsync_len
  drm/omap: omap_display_timings: rename vfp to vfront_porch
  drm/omap: omap_display_timings: rename vbp to vback_porch
  drm/omap: HDMI5: Use pointer to cfg->v_fc_config.timings in
hdmi_core_video_config
  drm/omap: omap_display_timings: Use display_flags for interlace mode
  drm/omap: dispc: Simplify _dispc_mgr_set_lcd_timings() parameters
  drm/omap: omap_display_timings: Use display_flags for h/vsync level
  drm/omap: omap_display_timings: Use display_flags for DE level
  drm/omap: omap_display_timings: Use display_flags for double_pixel
mode
  drm/omap: omap_display_timings: Use display_flags for pixel data edge
  drm/omap: omap_display_timings: Use display_flags for sync edge
  drm/omap: Change the types of struct omap_video_timings members
  drm/omap: Replace struct omap_video_timings with videomode
  drm/omap: Use consistent name for struct videomode
  drm/omap: panel-tpo-td043mtea1: Add note for incorrect sync drive edge
  drm/omap: panel-tpo-td028ttec1: Add note for incorrect sync drive edge
  drm/omap: panel-sharp-ls037v7dw01: Add note for incorrect data drive
edge
  drm/omap: panel-lgphilips-lb035q02: Add note for incorrect data drive
edge and DE level

 .../bindings/display/panel/display-timing.txt  |   6 +
 .../gpu/drm/omapdrm/displays/connector-analog-tv.c |  47 ++---
 drivers/gpu/drm/omapdrm/displays/connector-dvi.c   |  50 +++--
 drivers/gpu/drm/omapdrm/displays/connector-hdmi.c  |  49 +++--
 drivers/gpu/drm/omapdrm/displays/encoder-opa362.c  |  20 +-
 drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c  |  31 ++-
 .../gpu/drm/omapdrm/displays/encoder-tpd12s015.c   |  20 +-
 drivers/gpu/drm/omapdrm/displays/panel-dpi.c   |  30 ++-
 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c|  25 ++-
 .../omapdrm/displays/panel-lgphilips-lb035q02.c|  59 +++---
 .../drm/omapdrm/displays/panel-nec-nl8048hl11.c|  52 +++--
 .../drm/omapdrm/displays/panel-sharp-ls037v7dw01.c |  58 +++---
 .../drm/omapdrm/displays/panel-sony-acx565akm.c|  53 +++--
 .../drm/omapdrm/displays/panel-tpo-td028ttec1.c|  57 +++---
 .../drm/omapdrm/displays/panel-tpo-td043mtea1.c|  54 ++---
 drivers/gpu/drm/omapdrm/dss/dispc.c| 222 +
 drivers/gpu/drm/omapdrm/dss/display.c  |  78 +---
 drivers/gpu/drm/omapdrm/dss/dpi.c  |  40 ++--
 drivers/gpu/drm/omapdrm/dss/dsi.c  | 156 ---
 drivers/gpu/drm/omapdrm/dss/dss.h  |   5 +-
 drivers/gpu/drm/omapdrm/dss/hdmi.h |   8 +-
 drivers/gpu/drm/omapdrm/dss/hdmi4.c|  31 +--
 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c   |   8 +-
 drivers/gpu/drm/omapdrm/dss/hdmi5.c|  31 +--
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c   |  85 
 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c  |  73 ---
 drivers/gpu/drm/omapdrm/dss/omapdss.h  |  98 +++--
 drivers/gpu/drm/omapdrm/dss/output.c   |   5 +-
 drivers/gpu/drm/omapdrm/dss/rfbi.c |  49 +++--
 drivers/gpu/drm/omapdrm/dss/sdi.c  |  33 ++-
 drivers/gpu/drm/omapdrm/dss/venc.c |  97 +
 drivers/gpu/drm/omapdrm/omap_connector.c   |  87 +---
 drivers/gpu/drm/omapdrm/omap_crtc.c|  17 +-
 drivers/gpu/drm/omapdrm/omap_drv.h |   7 +-

[Bug 89746] Mesa and LLVM 3.6+ break opengl for genymotion

2016-09-01 Thread bugzilla-dae...@freedesktop.org

https://bugs.freedesktop.org/show_bug.cgi?id=89746

--- Comment #19 from Darek Deoniziak  ---
Hi, not really sure if my issue is related to this one.

The problem with genymotion occured to me while using DRI_PRIME=1 genymotion
after updating drivers using oibaf ppa
https://launchpad.net/~oibaf/+archive/ubuntu/graphics-drivers on Ubuntu 16.04.

I have Dell Inspirion 7548 with Radeon Opal R7 M265. Genymotion on Intel 5500
Broadwell G2 still works.

glxinfo OpenGL renderer: Gallium 0.4 on AMD OLAND (DRM 2.43.0 /
4.4.0-36-generic, LLVM 3.9.0)

I know it is newer LLVM and probably problem was fixed in the past, not sure
what version of LLVM is used in stock 16.04.

While running genymotion with DRI_PRIME=1 I am getting these errors:
libGL error: unable to load driver: radeonsi_dri.so
libGL error: driver pointer missing
libGL error: failed to load driver: radeonsi
libGL error: unable to load driver: swrast_dri.so
libGL error: failed to load driver: swrast

I've searched around the web and added this to my .profile:
export LD_PRELOAD='/usr/$LIB/libstdc++.so.6'
export DISPLAY=:0

That helped with running steam but not genymotion. But actually I am not sure
if this is related to the emulator issue itself, I might have been getting
these error messages too before I've updated oibaf drivers. The genymotion main
menu panel to run emulators work, but emulators won't display.

The genymotion emulator log gives me: [Genymotion Player] [Warning]
Unrecognized OpenGL version

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[PATCH v2] drm/sun4i: Clear encoder->bridge if a bridge is not found

2016-09-01 Thread Chen-Yu Tsai

The KMS helpers (drm_atomic_helper_check_modeset/mode_fixup) pass
encoder->bridge directly to drm_bridge_mode_fixup, which expects a
valid pointer, or NULL (in which case it just returns).

Clear encoder->bridge if a bridge is not found, instead of keeping
the ERR_PTR value.

Since other drm_bridge functions also follow this pattern of checking
for a non-NULL pointer, we can drop the ifs around the calls and just
pass the pointer directly.

Fixes: 894f5a9f4b4a ("drm/sun4i: Add bridge support")
Signed-off-by: Chen-Yu Tsai 
---
Changes since v2:

  - Add comments stating encoder->bridge can be NULL and drm_bridge_*
functions check for it.
  - Move clearing of encoder->bridge to if-else block of bridge setup
---
 drivers/gpu/drm/sun4i/sun4i_rgb.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c 
b/drivers/gpu/drm/sun4i/sun4i_rgb.c
index d4e52522ec53..d69847b243af 100644
--- a/drivers/gpu/drm/sun4i/sun4i_rgb.c
+++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c
@@ -154,8 +154,8 @@ static void sun4i_rgb_encoder_enable(struct drm_encoder 
*encoder)
if (!IS_ERR(tcon->panel))
drm_panel_enable(tcon->panel);

-   if (!IS_ERR(encoder->bridge))
-   drm_bridge_enable(encoder->bridge);
+   /* encoder->bridge can be NULL; drm_bridge_enable checks for it */
+   drm_bridge_enable(encoder->bridge);

sun4i_tcon_channel_enable(tcon, 0);
 }
@@ -170,8 +170,8 @@ static void sun4i_rgb_encoder_disable(struct drm_encoder 
*encoder)

sun4i_tcon_channel_disable(tcon, 0);

-   if (!IS_ERR(encoder->bridge))
-   drm_bridge_disable(encoder->bridge);
+   /* encoder->bridge can be NULL; drm_bridge_disable checks for it */
+   drm_bridge_disable(encoder->bridge);

if (!IS_ERR(tcon->panel))
drm_panel_disable(tcon->panel);
@@ -274,6 +274,8 @@ int sun4i_rgb_init(struct drm_device *drm)
dev_err(drm->dev, "Couldn't attach our bridge\n");
goto err_cleanup_connector;
}
+   } else {
+   encoder->bridge = NULL;
}

return 0;
-- 
2.9.3

[PATCH v7 3/8] clk: rockchip: rk3399: add ddrc clock support

2016-09-01 Thread Heiko Stübner

Am Montag, 22. August 2016, 11:36:19 schrieb Lin Huang:
> add ddrc clock setting, so we can do ddr frequency
> scaling on rk3399 platform in future.
> 
> Signed-off-by: Lin Huang 

applied to my clk-branch for 4.9


Thanks
Heiko

[RFC v4 1/3] drm/fence: add in-fences support

2016-09-01 Thread Gustavo Padovan

Hi Maarten,

2016-09-01 Maarten Lankhorst :

> Op 31-08-16 om 21:07 schreef Gustavo Padovan:
> > From: Gustavo Padovan 
> >
> > There is now a new property called FENCE_FD attached to every plane
> > state that receives the sync_file fd from userspace via the atomic commit
> > IOCTL.
> >
> > The fd is then translated to a fence (that may be a fence_collection
> > subclass or just a normal fence) and then used by DRM to fence_wait() for
> > all fences in the sync_file to signal. So it only commits when all
> > framebuffers are ready to scanout.
> >
> > v2: Comments by Daniel Vetter:
> > - remove set state->fence = NULL in destroy phase
> > - accept fence -1 as valid and just return 0
> > - do not call fence_get() - sync_file_fences_get() already calls it
> > - fence_put() if state->fence is already set, in case userspace
> > set the property more than once.
> >
> > v3: WARN_ON if fence is set but state has no FB
> >
> > Signed-off-by: Gustavo Padovan 
> > ---
> >  drivers/gpu/drm/Kconfig |  1 +
> >  drivers/gpu/drm/drm_atomic.c| 19 +++
> >  drivers/gpu/drm/drm_atomic_helper.c |  3 +++
> >  drivers/gpu/drm/drm_crtc.c  |  7 +++
> >  include/drm/drm_crtc.h  |  4 
> >  5 files changed, 34 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
> > index c02be6a..07f9c60 100644
> > --- a/drivers/gpu/drm/Kconfig
> > +++ b/drivers/gpu/drm/Kconfig
> > @@ -12,6 +12,7 @@ menuconfig DRM
> > select I2C
> > select I2C_ALGOBIT
> > select DMA_SHARED_BUFFER
> > +   select SYNC_FILE
> > help
> >   Kernel-level support for the Direct Rendering Infrastructure (DRI)
> >   introduced in XFree86 4.0. If you say Y here, you need to select
> > diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> > index 5cb2e22..9e6c4e7 100644
> > --- a/drivers/gpu/drm/drm_atomic.c
> > +++ b/drivers/gpu/drm/drm_atomic.c
> > @@ -30,6 +30,7 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  
> >  #include "drm_crtc_internal.h"
> >  
> > @@ -690,6 +691,17 @@ int drm_atomic_plane_set_property(struct drm_plane 
> > *plane,
> > drm_atomic_set_fb_for_plane(state, fb);
> > if (fb)
> > drm_framebuffer_unreference(fb);
> > +   } else if (property == config->prop_fence_fd) {
> > +   if (U642I64(val) == -1)
> > +   return 0;
> > +
> > +   if (state->fence)
> > +   fence_put(state->fence);
> > +
> > +   state->fence = sync_file_get_fence(val);
> > +   if (!state->fence)
> > +   return -EINVAL;
> > @@ -749,6 +761,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
> >  
> > if (property == config->prop_fb_id) {
> > *val = (state->fb) ? state->fb->base.id : 0;
> > +   } else if (property == config->prop_fence_fd) {
> > +   *val = -1;
> > } else if (property == config->prop_crtc_id) {
> > *val = (state->crtc) ? state->crtc->base.id : 0;
> > } else if (property == config->prop_crtc_x) {
> > @@ -824,6 +838,11 @@ static int drm_atomic_plane_check(struct drm_plane 
> > *plane,
> > return -EINVAL;
> > }
> >  
> > +   if (WARN_ON(state->fence && !state->fb)) {
> > +   DRM_DEBUG_ATOMIC("in-fence set but no FB\n");
> > +   return -EINVAL;
> > +   }
> Why is this a error? Could be useful to fence a modeset disable.

Yes. I didn't envision that use case.  I'll change that for the next
version.

> 
> It might make more sense to put the fence inside the crtc state, not the 
> plane state. Updates are done per crtc and moving planes
> between multiple crtc's inside a single commit is not allowed. I'd like to 
> know what others think of that.
> 
> I'm not sure this patch is tested, looks like plane_duplicate_state is not 
> clearing ->fence, probably resulting in WARNs.

It is tested, but I'n not seeing any warning there. Which WARNs are you
talking about? And why do we need to clear fence there? we don't clean
anything else on duplicate.

Gustavo

[PATCH v4 8/8] ARM: dts: am335x-evmsk: Add blue-and-red-wiring -property to lcdc node

2016-09-01 Thread Jyri Sarha

Add blue-and-red-wiring -property to lcdc node. The am335x-evmsk has
blue and red wires crossed to get 24-bit RGB (and 16-bit BGR)
support. After this patch am335x-evmsk supports BGR565, RGB888, and
XRGB color formats. See details in
Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt.

Signed-off-by: Jyri Sarha 
---
 arch/arm/boot/dts/am335x-evmsk.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-evmsk.dts 
b/arch/arm/boot/dts/am335x-evmsk.dts
index 23b94e7..034e117 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -712,4 +712,6 @@

  {
status = "okay";
+
+   blue-and-red-wiring = "crossed";
 };
-- 
1.9.1

[PATCH v4 7/8] ARM: dts: am335x-evmsk: Whitespace cleanup of lcdc related nodes

2016-09-01 Thread Jyri Sarha

Whitespace cleanup of lcdc related nodes. Do all indentation and
alignment with tabs instead of spaces.

Signed-off-by: Jyri Sarha 
---
 arch/arm/boot/dts/am335x-evmsk.dts | 40 +++---
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/arch/arm/boot/dts/am335x-evmsk.dts 
b/arch/arm/boot/dts/am335x-evmsk.dts
index 09308d6..23b94e7 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -170,29 +170,29 @@
pinctrl-1 = <_pins_sleep>;
status = "okay";
panel-info {
-   ac-bias   = <255>;
-   ac-bias-intrpt= <0>;
-   dma-burst-sz  = <16>;
-   bpp   = <32>;
-   fdd   = <0x80>;
-   sync-edge = <0>;
-   sync-ctrl = <1>;
-   raster-order  = <0>;
-   fifo-th   = <0>;
+   ac-bias = <255>;
+   ac-bias-intrpt  = <0>;
+   dma-burst-sz= <16>;
+   bpp = <32>;
+   fdd = <0x80>;
+   sync-edge   = <0>;
+   sync-ctrl   = <1>;
+   raster-order= <0>;
+   fifo-th = <0>;
};
display-timings {
480x272 {
-   hactive = <480>;
-   vactive = <272>;
-   hback-porch = <43>;
-   hfront-porch= <8>;
-   hsync-len   = <4>;
-   vback-porch = <12>;
-   vfront-porch= <4>;
-   vsync-len   = <10>;
+   hactive = <480>;
+   vactive = <272>;
+   hback-porch = <43>;
+   hfront-porch= <8>;
+   hsync-len   = <4>;
+   vback-porch = <12>;
+   vfront-porch= <4>;
+   vsync-len   = <10>;
clock-frequency = <900>;
-   hsync-active= <0>;
-   vsync-active= <0>;
+   hsync-active= <0>;
+   vsync-active= <0>;
};
};
};
@@ -711,5 +711,5 @@
 };

  {
-  status = "okay";
+   status = "okay";
 };
-- 
1.9.1

[PATCH v4 6/8] ARM: dts: am335x-evm: Add blue-and-red-wiring -property to lcdc node

2016-09-01 Thread Jyri Sarha

Add blue-and-red-wiring -property to lcdc node. The am335x-evm has
blue and red wires crossed to get 24-bit RGB (and 16-bit BGR)
support. After this patch am335x-evm supports BGR565, RGB888, and
XRGB color formats. See details in
Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt.

Signed-off-by: Jyri Sarha 
---
 arch/arm/boot/dts/am335x-evm.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 5d28712..c3cbce0 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -497,6 +497,8 @@

  {
status = "okay";
+
+   blue-and-red-wiring = "crossed";
 };

  {
-- 
1.9.1

[PATCH v4 5/8] ARM: dts: am335x-boneblack: Add blue-and-red-wiring -property to LCDC node

2016-09-01 Thread Jyri Sarha

Add blue-and-red-wiring -property to LCDC node. Also adds comments on
how to get support 24 bit RGB mode. After this patch am335x-boneblack
support RGB565, BGR888, and XBGR color formats. See details in
Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt.

The BBB has straight color wiring from am335x to tda19988, however the
tda19988 can be configured to cross the blue and red wires. The
comments show how to do that with video-ports property of tda19988
node and how to tell LCDC that blue and red wires are crossed, with
blue-and-red-wiring LCDC node property. This changes supported color
formats from 16 bit RGB and 24 bit BGR to 16 bit BGR and 24 bit RGB.

Signed-off-by: Jyri Sarha 
---
 arch/arm/boot/dts/am335x-boneblack.dts | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-boneblack.dts 
b/arch/arm/boot/dts/am335x-boneblack.dts
index 528559b..a32d73a 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -90,6 +90,14 @@

  {
status = "okay";
+
+   /* If you want to get 24 bit RGB and 16 BGR mode instead of
+* current 16 bit RGB and 24 BGR modes, set the propety
+* below to "crossed" and uncomment the video-ports -property
+* in tda19988 node.
+*/
+   blue-and-red-wiring = "straight";
+
port {
lcdc_0: endpoint at 0 {
remote-endpoint = <_0>;
@@ -106,6 +114,9 @@
pinctrl-0 = <_hdmi_bonelt_pins>;
pinctrl-1 = <_hdmi_bonelt_off_pins>;

+   /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
+   /* video-ports = <0x234501>; */
+
#sound-dai-cells = <0>;
audio-ports = < TDA998x_I2S 0x03>;

-- 
1.9.1

[PATCH v4 4/8] drm/tilcdc: Choose console BPP that supports RGB

2016-09-01 Thread Jyri Sarha

Choose console BPP that supports RGB and remove the old fbdev bpp
selection code. LCDC on AM335x has red and blue wires switched between
24 bit and 16 bit colors. If 24 format is wired for RGB colors, the 16
bit format is wired for BGR. drm_fbdev_cma_init() does not currently
like anything else but RGB formats, so we must choose such bytes per
pixel value that supports RGB.

Signed-off-by: Jyri Sarha 
---
 drivers/gpu/drm/tilcdc/tilcdc_drv.c  | 14 +-
 drivers/gpu/drm/tilcdc/tilcdc_drv.h  |  1 -
 drivers/gpu/drm/tilcdc/tilcdc_external.c |  7 +++
 drivers/gpu/drm/tilcdc/tilcdc_external.h |  2 +-
 drivers/gpu/drm/tilcdc/tilcdc_panel.c|  2 --
 drivers/gpu/drm/tilcdc/tilcdc_tfp410.c   |  2 --
 6 files changed, 9 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c 
b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
index ed4dc5c..bbb5d4c 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
@@ -240,7 +240,6 @@ static int tilcdc_load(struct drm_device *dev, unsigned 
long flags)
struct platform_device *pdev = dev->platformdev;
struct device_node *node = pdev->dev.of_node;
struct tilcdc_drm_private *priv;
-   struct tilcdc_module *mod;
struct resource *res;
u32 bpp = 0;
int ret;
@@ -336,6 +335,7 @@ static int tilcdc_load(struct drm_device *dev, unsigned 
long flags)
DBG("Revision 1 LCDC supports only RGB565 format");
priv->pixelformats = tilcdc_rev1_formats;
priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats);
+   bpp = 16;
} else {
const char *str = "\0";

@@ -345,17 +345,20 @@ static int tilcdc_load(struct drm_device *dev, unsigned 
long flags)
priv->pixelformats = tilcdc_crossed_formats;
priv->num_pixelformats =
ARRAY_SIZE(tilcdc_crossed_formats);
+   bpp = 32; /* Choose bpp with RGB support for fbdef */
} else if (0 == strcmp(str, "straight")) {
DBG("Configured for straight blue and red wires");
priv->pixelformats = tilcdc_straight_formats;
priv->num_pixelformats =
ARRAY_SIZE(tilcdc_straight_formats);
+   bpp = 16; /* Choose bpp with RGB support for fbdef */
} else {
DBG("Blue and red wiring '%s' unknown, use legacy mode",
str);
priv->pixelformats = tilcdc_legacy_formats;
priv->num_pixelformats =
ARRAY_SIZE(tilcdc_legacy_formats);
+   bpp = 16; /* This is just a guess */
}
}

@@ -372,7 +375,7 @@ static int tilcdc_load(struct drm_device *dev, unsigned 
long flags)
if (ret < 0)
goto fail_mode_config_cleanup;

-   ret = tilcdc_add_external_encoders(dev, );
+   ret = tilcdc_add_external_encoders(dev);
if (ret < 0)
goto fail_component_cleanup;
}
@@ -395,13 +398,6 @@ static int tilcdc_load(struct drm_device *dev, unsigned 
long flags)
goto fail_vblank_cleanup;
}

-   list_for_each_entry(mod, _list, list) {
-   DBG("%s: preferred_bpp: %d", mod->name, mod->preferred_bpp);
-   bpp = mod->preferred_bpp;
-   if (bpp > 0)
-   break;
-   }
-
drm_mode_config_reset(dev);

priv->fbdev = drm_fbdev_cma_init(dev, bpp,
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h 
b/drivers/gpu/drm/tilcdc/tilcdc_drv.h
index 0e19c14..a6e5e6d 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h
@@ -116,7 +116,6 @@ struct tilcdc_module {
const char *name;
struct list_head list;
const struct tilcdc_module_ops *funcs;
-   unsigned int preferred_bpp;
 };

 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_external.c 
b/drivers/gpu/drm/tilcdc/tilcdc_external.c
index 849b23e..68e8950 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_external.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_external.c
@@ -52,7 +52,7 @@ static int tilcdc_external_mode_valid(struct drm_connector 
*connector,
return MODE_OK;
 }

-static int tilcdc_add_external_encoder(struct drm_device *dev, int *bpp,
+static int tilcdc_add_external_encoder(struct drm_device *dev,
   struct drm_connector *connector)
 {
struct tilcdc_drm_private *priv = dev->dev_private;
@@ -64,7 +64,6 @@ static int tilcdc_add_external_encoder(struct drm_device 
*dev, int *bpp,
/* Only tda998x is supported at the moment. */
tilcdc_crtc_set_simulate_vesa_sync(priv->crtc, true);

[PATCH v4 3/8] drm/tilcdc: Add blue-and-red-crossed devicetree property

2016-09-01 Thread Jyri Sarha

Add "blue-and-red-wiring"-device tree property and update devicetree
binding document.

The red and blue components are reversed between 24 and 16 bit modes
on am335x LCDC output pins. To get 24 RGB format the red and blue
wires has to be crossed and this in turn causes 16 colors output to be
in BGR format. With straight wiring the 16 color is RGB and 24 bit is
BGR.

The new property describes whether the red and blue wires are crossed
or not. If the property is not present or its value is not recognized
the legacy mode is assumed. The legacy configuration supports RGB565,
RGB888 and XRGB formats. However, depending on wiring, the red and
blue colors are swapped in either 16 or 24-bit color modes.

For more details see section 3.1.1 in AM335x Silicon Errata:
http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=sprz360

Signed-off-by: Jyri Sarha 
---
 .../devicetree/bindings/display/tilcdc/tilcdc.txt  | 22 
 drivers/gpu/drm/tilcdc/tilcdc_drv.c| 41 ++
 drivers/gpu/drm/tilcdc/tilcdc_drv.h|  4 +++
 drivers/gpu/drm/tilcdc/tilcdc_plane.c  |  9 ++---
 4 files changed, 70 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt 
b/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt
index 6efa4c5..a5007aa 100644
--- a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt
+++ b/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt
@@ -17,6 +17,18 @@ Optional properties:
the lcd controller.
  - max-pixelclock: The maximum pixel clock that can be supported
by the lcd controller in KHz.
+ - blue-and-red-wiring: Recognized values "default", "straight" or
+   "crossed". This property deals with the LCDC revision 2 (found on
+   AM335x) color errata [1].
+- "straight" indicates normal wiring that supports RGB565,
+  BGR888, and XBGR color formats.
+- "crossed" indicates wiring that has blue and red wires
+  crossed. This setup supports BGR565, RGB888 and XRGB
+  formats.
+- If the property is not present or its value is not recognized
+  the legacy mode is assumed. This configuration supports RGB565,
+  RGB888 and XRGB formats. However, depending on wiring, the red
+  and blue colors are swapped in either 16 or 24-bit color modes.

 Optional nodes:

@@ -28,6 +40,14 @@ Optional nodes:
Documentation/devicetree/bindings/display/tilcdc/tfp410.txt for connecting
tfp410 DVI encoder or lcd panel to lcdc

+[1] There is an errata about AM335x color wiring. For 16-bit color mode
+the wires work as they should (LCD_DATA[0:4] is for Blue[3:7]),
+but for 24 bit color modes the wiring of blue and red components is
+crossed and LCD_DATA[0:4] is for Red[3:7] and LCD_DATA[11:15] is
+for Blue[3-7]. For more details see section 3.1.1 in AM335x
+Silicon Errata:
+
http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=sprz360
+
 Example:

fb: fb at 4830e000 {
@@ -37,6 +57,8 @@ Example:
interrupts = <36>;
ti,hwmods = "lcdc";

+   blue-and-red-wiring = "crossed";
+
port {
lcdc_0: endpoint at 0 {
remote-endpoint = <_0>;
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c 
b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
index e45c268..ed4dc5c 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
@@ -33,6 +33,20 @@

 static LIST_HEAD(module_list);

+static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 };
+
+static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565,
+  DRM_FORMAT_BGR888,
+  DRM_FORMAT_XBGR };
+
+static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565,
+ DRM_FORMAT_RGB888,
+ DRM_FORMAT_XRGB };
+
+static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565,
+DRM_FORMAT_RGB888,
+DRM_FORMAT_XRGB };
+
 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
const struct tilcdc_module_ops *funcs)
 {
@@ -318,6 +332,33 @@ static int tilcdc_load(struct drm_device *dev, unsigned 
long flags)

pm_runtime_put_sync(dev->dev);

+   if (priv->rev == 1) {
+   DBG("Revision 1 LCDC supports only RGB565 format");
+   priv->pixelformats = tilcdc_rev1_formats;
+   priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats);
+   } else {
+   const char *str = "\0";
+
+   of_property_read_string(node, "blue-and-red-wiring", );
+   if (0 == strcmp(str, "crossed")) {
+   DBG("Configured for crossed blue and red

[PATCH v4 2/8] drm/tilcdc: Write DMA base and ceiling address with single instruction

2016-09-01 Thread Jyri Sarha

Write DMA base and ceiling address with a single instruction, if
available. This should make it more unlikely that LCDC would fetch the
DMA addresses in the middle of an update. Having bad combination of
addresses in dma base and ceiling (e.g base > ceiling) can cause
unpredictaple behavior in LCDC.

Signed-off-by: Jyri Sarha 
---
 drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 10 --
 drivers/gpu/drm/tilcdc/tilcdc_regs.h | 14 ++
 2 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c 
b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index 6350f2a..84b36fd 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -70,6 +70,7 @@ static void set_scanout(struct drm_crtc *crtc, struct 
drm_framebuffer *fb)
struct drm_gem_cma_object *gem;
unsigned int depth, bpp;
dma_addr_t start, end;
+   u64 dma_base_and_ceiling;

drm_fb_get_bpp_depth(fb->pixel_format, , );
gem = drm_fb_cma_get_gem_obj(fb, 0);
@@ -80,8 +81,13 @@ static void set_scanout(struct drm_crtc *crtc, struct 
drm_framebuffer *fb)

end = start + (crtc->mode.vdisplay * fb->pitches[0]);

-   tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, start);
-   tilcdc_write(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG, end - 1);
+   /* Write LCDC_DMA_FB_BASE_ADDR_0_REG and LCDC_DMA_FB_CEILING_ADDR_0_REG
+* with a single insruction, if available. This should make it more
+* unlikely that LCDC would fetch the DMA addresses in the middle of
+* an update.
+*/
+   dma_base_and_ceiling = (u64)(end - 1) << 32 | start;
+   tilcdc_write64(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, dma_base_and_ceiling);

if (tilcdc_crtc->curr_fb)
drm_flip_work_queue(_crtc->unref_work,
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_regs.h 
b/drivers/gpu/drm/tilcdc/tilcdc_regs.h
index 1bf5e25..f57c0d6 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_regs.h
+++ b/drivers/gpu/drm/tilcdc/tilcdc_regs.h
@@ -119,6 +119,20 @@ static inline void tilcdc_write(struct drm_device *dev, 
u32 reg, u32 data)
iowrite32(data, priv->mmio + reg);
 }

+static inline void tilcdc_write64(struct drm_device *dev, u32 reg, u64 data)
+{
+   struct tilcdc_drm_private *priv = dev->dev_private;
+   volatile void __iomem *addr = priv->mmio + reg;
+
+#ifdef iowrite64
+   iowrite64(data, addr);
+#else
+   __iowmb();
+   /* This compiles to strd (=64-bit write) on ARM7 */
+   *(volatile u64 __force *)addr = __cpu_to_le64(data);
+#endif
+}
+
 static inline u32 tilcdc_read(struct drm_device *dev, u32 reg)
 {
struct tilcdc_drm_private *priv = dev->dev_private;
-- 
1.9.1

[PATCH v4 1/8] drm/tilcdc: Remove drm_helper_disable_unused_functions() call

2016-09-01 Thread Jyri Sarha

drm_helper_disable_unused_functions() should not be called by atomic
drivers.

Signed-off-by: Jyri Sarha 
---
 drivers/gpu/drm/tilcdc/tilcdc_drv.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c 
b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
index 3404d24..e45c268 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
@@ -361,8 +361,6 @@ static int tilcdc_load(struct drm_device *dev, unsigned 
long flags)
break;
}

-   drm_helper_disable_unused_functions(dev);
-
drm_mode_config_reset(dev);

priv->fbdev = drm_fbdev_cma_init(dev, bpp,
-- 
1.9.1

[PATCH v4 0/8] drm/tilcdc: Address LCDC rev 2 color errata + other fixes

2016-09-01 Thread Jyri Sarha

Changes since v3:
- "drm/tilcdc: Write DMA base and ceiling address with single instruction"
  - Adjust comments, no functional changes
- "drm/tilcdc: Add blue-and-red-crossed devicetree property"
  - Remove "default" from recognized property values
  - Clean up commit description
- "ARM: dts: am335x-boneblack: Add blue-and-red-wiring -property to LCDC node"
  - Minor comment adjustmen 

Changes since v2:
- Fiddle with color wiring propety once more, now it follows this Tomi's
  comment:
  - No property set: driver advertises RG16 and RG24. This is
wrong, but that's what the current status is, right?
  - Property set to "default" or "straight" or whatever: driver
says RG16 and BG24
  - Property set to "crossed": driver says BG16 and RG24
- Add v2 version of "drm/tilcdc: Write DMA base and ceiling address with..."
  - The first version was sent individually, this second version has
__iowmb(); and __cpu_to_le64(); added to tilcdc_write64()

Changes since v1:
- Change the blue-and-red-wiring property to boolean blue-and-red-crossed
  - This breaks to little backward compatibility the earlier series had, but
makes the binding more straight forward
  - This changes requires changes to am335x-evm and am335x-evmsk dts-files
  - The old beaglebone-black dts files remain compatible, but the patch
suggests in commenst on how to support 24-bit RGB mode with BBB

The first patch ("drm/tilcdc: Remove drm_helper_disable_unused_functions()
call") is completely independent fix.

The red and blue components are reversed between 24 and 16 bit modes
on am335x LCDC output pins. To get 24 RGB format the wires red and
blue wires has to be crossed and this in turn causes 16 colors output
to be in BGR format. With straight wiring the 16 color is RGB and 24
bit is BGR. These patches try to deal with the issue in reasonable
manner.

For more details see section 3.1.1 in AM335x Silicon Errata:
http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=sprz360

Jyri Sarha (8):
  drm/tilcdc: Remove drm_helper_disable_unused_functions() call
  drm/tilcdc: Write DMA base and ceiling address with single instruction
  drm/tilcdc: Add blue-and-red-crossed devicetree property
  drm/tilcdc: Choose console BPP that supports RGB
  ARM: dts: am335x-boneblack: Add blue-and-red-wiring -property to LCDC
node
  ARM: dts: am335x-evm: Add blue-and-red-wiring -property to lcdc node
  ARM: dts: am335x-evmsk: Whitespace cleanup of lcdc related nodes
  ARM: dts: am335x-evmsk: Add blue-and-red-wiring -property to lcdc node

 .../devicetree/bindings/display/tilcdc/tilcdc.txt  | 22 +
 arch/arm/boot/dts/am335x-boneblack.dts | 11 +
 arch/arm/boot/dts/am335x-evm.dts   |  2 +
 arch/arm/boot/dts/am335x-evmsk.dts | 42 
 drivers/gpu/drm/tilcdc/tilcdc_crtc.c   | 10 +++-
 drivers/gpu/drm/tilcdc/tilcdc_drv.c| 57 +-
 drivers/gpu/drm/tilcdc/tilcdc_drv.h|  5 +-
 drivers/gpu/drm/tilcdc/tilcdc_external.c   |  7 ++-
 drivers/gpu/drm/tilcdc/tilcdc_external.h   |  2 +-
 drivers/gpu/drm/tilcdc/tilcdc_panel.c  |  2 -
 drivers/gpu/drm/tilcdc/tilcdc_plane.c  |  9 ++--
 drivers/gpu/drm/tilcdc/tilcdc_regs.h   | 14 ++
 drivers/gpu/drm/tilcdc/tilcdc_tfp410.c |  2 -
 13 files changed, 136 insertions(+), 49 deletions(-)

-- 
1.9.1

[PATCH] drm/hisilicon: Don't set drm_device->platformdev

2016-09-01 Thread Xinliang Liu

Hi,

On 29 August 2016 at 15:49, Daniel Vetter  wrote:
> It's deprecated and only should be used by drivers which still use
> drm_platform_init, not by anyone else.
>
> And indeed it's entirely unused and can be nuked.
>
> This required a bit more fudging, but I guess kirin_dc_ops really
> wants to operate on the platform_device, not something else. Also
> bonus points for implementing abstraction, and then storing the vfunc
> in a global variable.
>
> v2: Don't break the build s badly :(
> Note that the cleanup function is a bit confused: ade_data was never
> set as drvdata, and calling drm_crtc_cleanup directly is a bug - this
> is called indirectly through drm_mode_config_cleanup, which calls into
> crtc->destroy, which already has the call to drm_crtc_cleanup. Which
> means we can just nuke it.
>
> Note this is the 2nd attempt after the first one failed and had to be
> reverted again in
>
> commit 9cd2e854d61ccfa51686f3ed7b0c917708fc641f
> Author: Daniel Vetter 
> Date:   Wed Aug 17 13:59:40 2016 +0200
>
> Revert "drm/hisilicon: Don't set drm_device->platformdev"
>
> Cc: Xinliang Liu 
> Cc: Xinwei Kong 
> Cc: Archit Taneja 
> Cc: Sean Paul 
> Signed-off-by: Daniel Vetter 
> ---
>  drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 11 +++
>  drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c |  8 +++-
>  drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h |  4 ++--
>  3 files changed, 8 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 
> b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
> index 7e7a4d43d6b6..26022122bcd1 100644
> --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
> +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
> @@ -974,9 +974,9 @@ static int ade_dts_parse(struct platform_device *pdev, 
> struct ade_hw_ctx *ctx)
> return 0;
>  }
>
> -static int ade_drm_init(struct drm_device *dev)
> +static int ade_drm_init(struct platform_device *pdev)
>  {
> -   struct platform_device *pdev = dev->platformdev;
> +   struct drm_device *dev = platform_get_drvdata(pdev);

if we can get the platformdev here, how about just get pdev here and
don't change the parameter of ade_drm_init :
-   struct platform_device *pdev = dev->platformdev;
+   struct platform_device *pdev = o_platform_device(dev->dev);


Best,
-xinliang


> struct ade_data *ade;
> struct ade_hw_ctx *ctx;
> struct ade_crtc *acrtc;
> @@ -1035,13 +1035,8 @@ static int ade_drm_init(struct drm_device *dev)
> return 0;
>  }
>
> -static void ade_drm_cleanup(struct drm_device *dev)
> +static void ade_drm_cleanup(struct platform_device *pdev)
>  {
> -   struct platform_device *pdev = dev->platformdev;
> -   struct ade_data *ade = platform_get_drvdata(pdev);
> -   struct drm_crtc *crtc = >acrtc.base;
> -
> -   drm_crtc_cleanup(crtc);
>  }
>
>  const struct kirin_dc_ops ade_dc_ops = {
> diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c 
> b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
> index 1fc2f502d20d..b9b8c25da5e3 100644
> --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
> +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
> @@ -41,7 +41,7 @@ static int kirin_drm_kms_cleanup(struct drm_device *dev)
>  #endif
> drm_kms_helper_poll_fini(dev);
> drm_vblank_cleanup(dev);
> -   dc_ops->cleanup(dev);
> +   dc_ops->cleanup(to_platform_device(dev->dev));
> drm_mode_config_cleanup(dev);
> devm_kfree(dev->dev, priv);
> dev->dev_private = NULL;
> @@ -103,7 +103,7 @@ static int kirin_drm_kms_init(struct drm_device *dev)
> kirin_drm_mode_config_init(dev);
>
> /* display controller init */
> -   ret = dc_ops->init(dev);
> +   ret = dc_ops->init(to_platform_device(dev->dev));
> if (ret)
> goto err_mode_config_cleanup;
>
> @@ -137,7 +137,7 @@ static int kirin_drm_kms_init(struct drm_device *dev)
>  err_unbind_all:
> component_unbind_all(dev->dev, dev);
>  err_dc_cleanup:
> -   dc_ops->cleanup(dev);
> +   dc_ops->cleanup(to_platform_device(dev->dev));
>  err_mode_config_cleanup:
> drm_mode_config_cleanup(dev);
> devm_kfree(dev->dev, priv);
> @@ -210,8 +210,6 @@ static int kirin_drm_bind(struct device *dev)
> if (!drm_dev)
> return -ENOMEM;
>
> -   drm_dev->platformdev = to_platform_device(dev);
> -
> ret = kirin_drm_kms_init(drm_dev);
> if (ret)
> goto err_drm_dev_unref;
> diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h 
> b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h
> index 1a07caf8e7f4..a0bb217c4c64 100644
> --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h
> +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h
> @@ -15,8 +15,8 @@
>
>  /* display controller init/cleanup ops */
>  struct kirin_dc_ops {
> -   int (*init)(struct drm_device *dev);
> -   void (*cleanup)(struct drm_device

[PATCH v7 7/8] PM / devfreq: rockchip: add devfreq driver for rk3399 dmc

2016-09-01 Thread Heiko Stübner

Hi,

Am Montag, 22. August 2016, 11:36:23 schrieb Lin Huang:
> base on dfi result, we do ddr frequency scaling, register
> dmc driver to devfreq framework, and use simple-ondemand
> policy.
> 
> Signed-off-by: Lin Huang 
> Reviewed-by: Chanwoo Choi 
> ---

[...]

> diff --git a/drivers/devfreq/rk3399_dmc.c b/drivers/devfreq/rk3399_dmc.c
> new file mode 100644
> index 000..b73a73c
> --- /dev/null
> +++ b/drivers/devfreq/rk3399_dmc.c
> @@ -0,0 +1,499 @@
> +/*
> + * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd.
> + * Author: Lin Huang 
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
> for + * more details.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 

I've split out the needed sip interface-header from patch1 and provide
a stable signed tag you can pull into the devfreq tree.


Heiko


The following changes since commit 29b4817d4018df78086157ea3a55c1d9424a7cfc:

  Linux 4.8-rc1 (2016-08-07 18:18:00 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git 
tags/rockchip-ddr-sip

for you to fetch changes up to 97dd82682f1a6174698fbea149a04b4cabc58c4f:

  soc: rockchip: add header for ddr rate SIP interface (2016-08-31 18:53:24 
+0200)


Header file defining the SIP-interface to the ATF for DDR frequency changes


Lin Huang (1):
  soc: rockchip: add header for ddr rate SIP interface

 include/soc/rockchip/rockchip_sip.h | 27 +++
 1 file changed, 27 insertions(+)
 create mode 100644 include/soc/rockchip/rockchip_sip.h

[PATCH v7 1/8] clk: rockchip: add new clock-type for the ddrclk

2016-09-01 Thread Heiko Stübner

Am Montag, 22. August 2016, 11:36:17 schrieb Lin Huang:
> On new rockchip platform(rk3399 etc), there have dcf controller to
> do ddr frequency scaling, and this controller will implement in
> arm-trust-firmware. We add a special clock-type to handle that.
> 
> Signed-off-by: Lin Huang 

Applied with some changes:
- split the sip header into a separate patch [0], as we'll need the
  devfreq part to also have access to that
- reword the commit message [1] to have some more details on what
  we want to accomplish here
- drop the NO_CACHE flag as per our chat, as we now also have the
  round-rate talking to the ATF, so the cached value should actuall match


[0] 
https://git.kernel.org/cgit/linux/kernel/git/mmind/linux-rockchip.git/commit/?id=97dd82682f1a6174698fbea149a04b4cabc58c4f
[1] 
https://git.kernel.org/cgit/linux/kernel/git/mmind/linux-rockchip.git/commit/?id=a4f182bf81f18f91f1aef6289fcdfa6a2ac51b99



> ---
> Changes in v7:
> - add rockchip_ddrclk_sip_ops so we can distinguish other ddr clock operate
> - add ROCKCHIP_SIP_CONFIG_* in rockchip_sip.h give constants a specific name
> 
> Changes in v6:
> - none
> 
> Changes in v5:
> - delete unuse mux_flag
> - use div_flag to distinguish sip call and other operate
> 
> Changes in v4:
> - use arm_smccc_smc() to set/read ddr rate
> 
> Changes in v3:
> - use sip call to set/read ddr rate
> 
> Changes in v2:
> - use GENMASK instead val_mask
> - use divider_recalc_rate() instead DIV_ROUND_UP_ULL
> - cleanup code
> 
> Changes in v1:
> - none
> 
>  drivers/clk/rockchip/Makefile   |   1 +
>  drivers/clk/rockchip/clk-ddr.c  | 157
>  drivers/clk/rockchip/clk.c  | 
>  9 +++
>  drivers/clk/rockchip/clk.h  |  35 
>  include/soc/rockchip/rockchip_sip.h |  27 +++
>  5 files changed, 229 insertions(+)
>  create mode 100644 drivers/clk/rockchip/clk-ddr.c
>  create mode 100644 include/soc/rockchip/rockchip_sip.h
> 
> diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
> index f47a2fa..b5f2c8e 100644
> --- a/drivers/clk/rockchip/Makefile
> +++ b/drivers/clk/rockchip/Makefile
> @@ -8,6 +8,7 @@ obj-y += clk-pll.o
>  obj-y+= clk-cpu.o
>  obj-y+= clk-inverter.o
>  obj-y+= clk-mmc-phase.o
> +obj-y+= clk-ddr.o
>  obj-$(CONFIG_RESET_CONTROLLER)   += softrst.o
> 
>  obj-y+= clk-rk3036.o
> diff --git a/drivers/clk/rockchip/clk-ddr.c b/drivers/clk/rockchip/clk-ddr.c
> new file mode 100644
> index 000..224e07e
> --- /dev/null
> +++ b/drivers/clk/rockchip/clk-ddr.c
> @@ -0,0 +1,157 @@
> +/*
> + * Copyright (c) 2016 Rockchip Electronics Co. Ltd.
> + * Author: Lin Huang 
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "clk.h"
> +
> +struct rockchip_ddrclk {
> + struct clk_hw   hw;
> + void __iomem*reg_base;
> + int mux_offset;
> + int mux_shift;
> + int mux_width;
> + int div_shift;
> + int div_width;
> + int ddr_flag;
> + spinlock_t  *lock;
> +};
> +
> +#define to_rockchip_ddrclk_hw(hw) container_of(hw, struct rockchip_ddrclk,
> hw) +
> +static int rockchip_ddrclk_sip_set_rate(struct clk_hw *hw, unsigned long
> drate, +  unsigned long prate)
> +{
> + struct rockchip_ddrclk *ddrclk = to_rockchip_ddrclk_hw(hw);
> + unsigned long flags;
> + struct arm_smccc_res res;
> +
> + spin_lock_irqsave(ddrclk->lock, flags);
> + arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, drate, 0,
> +   ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE,
> +   0, 0, 0, 0, );
> + spin_unlock_irqrestore(ddrclk->lock, flags);
> +
> + return res.a0;
> +}
> +
> +static unsigned long
> +rockchip_ddrclk_sip_recalc_rate(struct clk_hw *hw,
> + unsigned long parent_rate)
> +{
> + struct arm_smccc_res res;
> +
> + arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, 0, 0,
> +   ROCKCHIP_SIP_CONFIG_DRAM_GET_RATE,
> +   0, 0, 0, 0, );
> +
> + return res.a0;
> +}
> +
> +static long rockchip_ddrclk_sip_round_rate(struct clk_hw *hw,
> +unsigned long rate,
> +unsigned long *prate)
> +{
> + struct arm_smccc_res res;
> +
> + arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, rate, 0,
> +

[PATCH 2/2] drm/hisilicon: Make it compile again

2016-09-01 Thread Xinliang Liu

Hi,

On 26 August 2016 at 10:28, Rob Clark  wrote:
> On Thu, Aug 25, 2016 at 9:48 PM, Xinliang Liu  
> wrote:
>> On 17 August 2016 at 19:11, Daniel Vetter  wrote:
>>> On Wed, Aug 17, 2016 at 07:02:01PM +0800, Xinliang Liu wrote:
 Hi,

 On 17 August 2016 at 18:17, Daniel Vetter  
 wrote:
 > I just broke the build :(
 >
 > Note that the cleanup function is a bit confused: ade_data was never
 > set as drvdata, and calling drm_crtc_cleanup directly is a bug - this

 Yes, this is a bug. Thanks for pointing out this.

 > is called indirectly through drm_mode_config_cleanup, which calls into
 > crtc->destroy, which already has the call to drm_crtc_cleanup. Which
 > means we can just nuke it.
 >
 > Aside: I have no idea why this driver depends upon ARM64. It doesn't
 > build warning-free on 32bit, but otherwise it's perfectly fine.

 Because this driver is written for ARM64 SoCs.
>>>
>>> It makes compile-testing harder, the same reasons why depending upon
>>
>> What compile-testing we will have? I just try to understand the problem.
>
> it is useful for others who don't have the hw to be able to compile
> test core changes (hence kconfig COMPILE_TEST option) to at least
> catch the sorts of problems that compilers can catch..

Understand! Thanks Rob.

-xinliang

>
> BR,
> -R
>
>
>> Thanks,
>> -xinliang
>>
>>> specific arm platforms is really annoying (but lukily that problem seems
>>> to have stopped being one for the drm subsystem at least). Depending on
>>> CONFIG_OF and other stuff that's really needed is perfectly fine, but imo
>>> depending upon specific platforms and stuff really isn't.
>>> -Daniel
>>>

 Thanks,
 -xinliang

 >
 > Cc: Xinliang Liu 
 > Cc: Xinwei Kong 
 > Cc: Chen Feng 
 > Cc: Sean Paul 
 > Fixes: d25bcfb8c2e1 ("drm/hisilicon: Don't set drm_device->platformdev")
 > Signed-off-by: Daniel Vetter 
 > ---
 >  drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 9 ++---
 >  drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 4 ++--
 >  2 files changed, 4 insertions(+), 9 deletions(-)
 >
 > diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 
 > b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
 > index 91188f33b1d9..c64c82cb7e71 100644
 > --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
 > +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
 > @@ -991,7 +991,7 @@ static int ade_dts_parse(struct platform_device 
 > *pdev, struct ade_hw_ctx *ctx)
 >
 >  static int ade_drm_init(struct platform_device *pdev)
 >  {
 > -   struct drm_device *drm_dev = platform_get_drvdata(dev);
 > +   struct drm_device *dev = platform_get_drvdata(pdev);
 > struct ade_data *ade;
 > struct ade_hw_ctx *ctx;
 > struct ade_crtc *acrtc;
 > @@ -1052,14 +1052,9 @@ static int ade_drm_init(struct platform_device 
 > *pdev)
 >
 >  static void ade_drm_cleanup(struct platform_device *pdev)
 >  {
 > -   struct drm_device *drm_dev = platform_get_drvdata(dev);
 > -   struct ade_data *ade = platform_get_drvdata(pdev);
 > -   struct drm_crtc *crtc = >acrtc.base;
 > -
 > -   drm_crtc_cleanup(crtc);
 >  }
 >
 >  const struct kirin_dc_ops ade_dc_ops = {
 > .init = ade_drm_init,
 > .cleanup = ade_drm_cleanup
 > -;
 > +};
 > diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c 
 > b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
 > index 6b0f9f6c16e1..b9b8c25da5e3 100644
 > --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
 > +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
 > @@ -103,7 +103,7 @@ static int kirin_drm_kms_init(struct drm_device *dev)
 > kirin_drm_mode_config_init(dev);
 >
 > /* display controller init */
 > -   ret = dc_ops->init(to_platform_device(dev));
 > +   ret = dc_ops->init(to_platform_device(dev->dev));
 > if (ret)
 > goto err_mode_config_cleanup;
 >
 > @@ -137,7 +137,7 @@ static int kirin_drm_kms_init(struct drm_device *dev)
 >  err_unbind_all:
 > component_unbind_all(dev->dev, dev);
 >  err_dc_cleanup:
 > -   dc_ops->cleanup(dev);
 > +   dc_ops->cleanup(to_platform_device(dev->dev));
 >  err_mode_config_cleanup:
 > drm_mode_config_cleanup(dev);
 > devm_kfree(dev->dev, priv);
 > --
 > 2.8.1
 >
 > ___
 > dri-devel mailing list
 > dri-devel at lists.freedesktop.org
 > https://lists.freedesktop.org/mailman/listinfo/dri-devel
>>>
>>> --
>>> Daniel Vetter
>>> Software Engineer, Intel Corporation
>>> http://blog.ffwll.ch
>> ___
>> dri-devel mailing list
>> dri-devel at

[PATCH 09/10] drm/doc: Document color space handling

2016-09-01 Thread Lionel Landwerlin

On 31/08/16 17:09, Daniel Vetter wrote:
> Again move it from the unmaintainable csv into DOC free-form overview
> sections.
>
> Cc: Lionel Landwerlin 
> Signed-off-by: Daniel Vetter 
> ---
>   Documentation/gpu/drm-kms.rst| 12 +
>   Documentation/gpu/kms-properties.csv |  5 
>   drivers/gpu/drm/drm_color_mgmt.c | 48 
> 
>   include/drm/drm_color_mgmt.h | 11 ++---
>   4 files changed, 68 insertions(+), 8 deletions(-)

Reviewed-by: Lionel Landwerlin 

Just one tiny nit below.

>
> diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst
> index 6be8d3359620..53b872c105d2 100644
> --- a/Documentation/gpu/drm-kms.rst
> +++ b/Documentation/gpu/drm-kms.rst
> @@ -296,6 +296,18 @@ Plane Composition Properties
>   .. kernel-doc:: drivers/gpu/drm/drm_blend.c
>  :export:
>   
> +Color Management Properties
> +---
> +
> +.. kernel-doc:: drivers/gpu/drm/drm_color_mgmt.c
> +   :doc: overview
> +
> +.. kernel-doc:: include/drm/drm_color_mgmt.h
> +   :internal:
> +
> +.. kernel-doc:: drivers/gpu/drm/drm_color_mgmt.c
> +   :export:
> +
>   Existing KMS Properties
>   ---
>   
> diff --git a/Documentation/gpu/kms-properties.csv 
> b/Documentation/gpu/kms-properties.csv
> index 1aa2493d1ef9..1a5729c4af65 100644
> --- a/Documentation/gpu/kms-properties.csv
> +++ b/Documentation/gpu/kms-properties.csv
> @@ -24,11 +24,6 @@ Owner Module/Drivers,Group,Property Name,Type,Property 
> Values,Object attached,De
>   ,,âsuggested Yâ,RANGE,"Min=0, Max=0x",Connector,property to 
> suggest an Y offset for a connector
>   ,Optional,"""aspect ratio""",ENUM,"{ ""None"", ""4:3"", ""16:9"" 
> }",Connector,TDB
>   ,,âdirtyâ,ENUM | IMMUTABLE,"{ ""Off"", ""On"", ""Annotate"" 
> }",Connector,TBD
> -,,âDEGAMMA_LUTâ,BLOB,0,CRTC,DRM property to set the degamma lookup table 
> (LUT) mapping pixel data from the framebuffer before it is given to the 
> transformation matrix. The data is an interpreted as an array of struct 
> drm_color_lut elements. Hardware might choose not to use the full precision 
> of the LUT elements nor use all the elements of the LUT (for example the 
> hardware might choose to interpolate between LUT[0] and LUT[4]).
> -,,âDEGAMMA_LUT_SIZEâ,RANGE | IMMUTABLE,"Min=0, Max=UINT_MAX",CRTC,DRM 
> property to gives the size of the lookup table to be set on the DEGAMMA_LUT 
> property (the size depends on the underlying hardware).
> -,,âCTMâ,BLOB,0,CRTC,DRM property to set the current transformation 
> matrix (CTM) apply to pixel data after the lookup through the degamma LUT and 
> before the lookup through the gamma LUT. The data is an interpreted as a 
> struct drm_color_ctm.
> -,,âGAMMA_LUTâ,BLOB,0,CRTC,DRM property to set the gamma lookup table 
> (LUT) mapping pixel data after to the transformation matrix to data sent to 
> the connector. The data is an interpreted as an array of struct drm_color_lut 
> elements. Hardware might choose not to use the full precision of the LUT 
> elements nor use all the elements of the LUT (for example the hardware might 
> choose to interpolate between LUT[0] and LUT[4]).
> -,,âGAMMA_LUT_SIZEâ,RANGE | IMMUTABLE,"Min=0, Max=UINT_MAX",CRTC,DRM 
> property to gives the size of the lookup table to be set on the GAMMA_LUT 
> property (the size depends on the underlying hardware).
>   i915,Generic,"""Broadcast RGB""",ENUM,"{ ""Automatic"", ""Full"", ""Limited 
> 16:235"" }",Connector,"When this property is set to Limited 16:235 and CTM is 
> set, the hardware will be programmed with the result of the multiplication of 
> CTM by the limited range matrix to ensure the pixels normaly in the range 
> 0..1.0 are remapped to the range 16/255..235/255."
>   ,,âaudioâ,ENUM,"{ ""force-dvi"", ""off"", ""auto"", ""on"" 
> }",Connector,TBD
>   ,SDVO-TV,âmodeâ,ENUM,"{ ""NTSC_M"", ""NTSC_J"", ""NTSC_443"", ""PAL_B"" 
> } etc.",Connector,TBD
> diff --git a/drivers/gpu/drm/drm_color_mgmt.c 
> b/drivers/gpu/drm/drm_color_mgmt.c
> index aca1b7a6397c..23b792746cfd 100644
> --- a/drivers/gpu/drm/drm_color_mgmt.c
> +++ b/drivers/gpu/drm/drm_color_mgmt.c
> @@ -26,6 +26,54 @@
>   
>   #include "drm_crtc_internal.h"
>   
> +/**
> + * DOC: overview
> + *
> + * Color management or color space adjustements is supported through a set 
> of 5
> + * properties on the _crtc object. They are set up by calling
> + * drm_crtc_enable_color_mgmt().
> + *
> + * "DEGAMMA_LUTâ:
> + *   Blob property to set the degamma lookup table (LUT) mapping pixel data
> + *   from the framebuffer before it is given to the transformation matrix.
> + *   The data is an interpreted as an array of struct _color_lut 
> elements.
> + *   Hardware might choose not to use the full precision of the LUT elements
> + *   nor use all the elements of the LUT (for example the hardware might
> + *   choose to interpolate between LUT[0] and LUT[4]).
> + *
> + * âDEGAMMA_LUT_SIZEâ:
> +

[PATCH v8 05/18] dmaengine: st_fdma: Add STMicroelectronics FDMA engine driver support

2016-09-01 Thread Peter Griffin

Hi Vinod,

Thanks for reviewing.

On Tue, 30 Aug 2016, Vinod Koul wrote:

> On Fri, Aug 26, 2016 at 03:56:40PM +0100, Peter Griffin wrote:
> 
> >  config STM32_DMA
> > bool "STMicroelectronics STM32 DMA support"
> > depends on ARCH_STM32
> > @@ -567,7 +580,6 @@ config ZX_DMA
> > help
> >   Support the DMA engine for ZTE ZX296702 platform devices.
> >  
> > -
> 
> unrelated change?

OK will remove and send a separate patch.
> 
> > +   fdev->chans = devm_kzalloc(>dev,
> > +  fdev->nr_channels
> > +  * sizeof(struct st_fdma_chan), GFP_KERNEL);
> 
> devm_kcalloc()

Will fix in next version.

> 
> > +   if (!fdev->chans)
> > +   return -ENOMEM;
> > +
> > +   fdev->dev = >dev;
> > +   fdev->drvdata = drvdata;
> > +   platform_set_drvdata(pdev, fdev);
> > +
> > +   fdev->irq = platform_get_irq(pdev, 0);
> > +   if (fdev->irq < 0) {
> > +   dev_err(>dev, "Failed to get irq resource\n");
> > +   return -EINVAL;
> > +   }
> > +
> > +   ret = devm_request_irq(>dev, fdev->irq, st_fdma_irq_handler, 0,
> > +  dev_name(>dev), fdev);
> > +   if (ret) {
> > +   dev_err(>dev, "Failed to request irq (%d)\n", ret);
> > +   goto err;
> > +   }
> > +
> > +   fdev->slim_rproc = st_slim_rproc_alloc(pdev, fdev->fw_name);
> > +   if (!fdev->slim_rproc) {
> > +   ret = PTR_ERR(fdev->slim_rproc);
> > +   dev_err(>dev, "slim_rproc_alloc failed (%d)\n", ret);
> > +   goto err;
> > +   }
> > +
> > +   /* Initialise list of FDMA channels */
> > +   INIT_LIST_HEAD(>dma_device.channels);
> > +   for (i = 0; i < fdev->nr_channels; i++) {
> > +   struct st_fdma_chan *fchan = >chans[i];
> > +
> > +   fchan->fdev = fdev;
> > +   fchan->vchan.desc_free = st_fdma_free_desc;
> > +   vchan_init(>vchan, >dma_device);
> 
> this initialized a tasklet
> 
> > +static int st_fdma_remove(struct platform_device *pdev)
> > +{
> > +   struct st_fdma_dev *fdev = platform_get_drvdata(pdev);
> > +
> > +   devm_free_irq(>dev, fdev->irq, fdev);
> > +   st_slim_rproc_put(fdev->slim_rproc);
> > +   of_dma_controller_free(pdev->dev.of_node);
> > +   dma_async_device_unregister(>dma_device);
> 
> and that vchan tasklet is not quisced here :(

Eeek, good spot. Will fix in next version.

> 
> > +MODULE_LICENSE("GPL v2");
> > +MODULE_DESCRIPTION("STMicroelectronics FDMA engine driver");
> > +MODULE_AUTHOR("Ludovic.barre ");
> > +MODULE_AUTHOR("Peter Griffin ");
> 
> No MODULE_ALIAS?

Will add in next version.

regards,

Peter.

[GIT PULL] omapdrm changes for 4.9

2016-09-01 Thread Tomi Valkeinen

Hi Dave,

Please pull a few small fixes and cleanups for omapdrm for v4.9.

 Tomi

The following changes since commit 3eab887a55424fc2c27553b7bfe32330df83f7b8:

  Linux 4.8-rc4 (2016-08-28 15:04:33 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git tags/omapdrm-4.9

for you to fetch changes up to fd83ee7803bbd1932d3b24b039353a39e6ffa0fc:

  drm/omapdrm: Remove double gamma table write in omap_crtc_atomic_flush() 
(2016-09-01 10:57:46 +0300)


omapdrm changes for 4.9

Only minor fixes and cleanups here.


Andrew F. Davis (1):
  drm/omap: remove unneeded conversions to bool

Jyri Sarha (1):
  drm/omapdrm: Remove double gamma table write in omap_crtc_atomic_flush()

Tomi Valkeinen (3):
  drm/omap: fix plane check when crtc is disabled
  drm/omap: cleanup omap_plane_atomic_check()
  drm/omap: print error instead of WARN() if plane setup fails

 drivers/gpu/drm/omapdrm/dss/dispc.c  |  6 +++---
 drivers/gpu/drm/omapdrm/omap_crtc.c  | 13 -
 drivers/gpu/drm/omapdrm/omap_plane.c | 28 ++--
 3 files changed, 21 insertions(+), 26 deletions(-)

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[PATCH RFC] ARM: dts: samsung: add rga-lvds panel in itop elite

2016-09-01 Thread Andrzej Hajda

On 09/01/2016 10:24 AM, Ayaka wrote:
>
> å¾æç iPad å³é
> Thank you
>> Andrzej Hajda  æ¼ 2016å¹´9æ1æ¥ ä¸å3:04 
>> å¯«éï¼
>>
>>> On 08/31/2016 07:55 PM, ayaka wrote:
>>>
 On 08/31/2016 08:30 PM, Andrzej Hajda wrote:
 Hi,


> On 08/30/2016 12:50 AM, Randy Li wrote:
> It is actually a lvds panel connected through a rga-lvds bridge.
> But I really have no idea about what does a port mean in fimd node.
>
> Also how should I configure this panel size? I think the i2c found
> on the panel schematic, but it more likely to be used a touch screen
> touth. Also the touch screen is not supported in currently driver.
>
> Signed-off-by: Randy Li 
> ---
>  arch/arm/boot/dts/exynos4412-itop-elite.dts | 35 
> ++---
>  1 file changed, 32 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos4412-itop-elite.dts 
> b/arch/arm/boot/dts/exynos4412-itop-elite.dts
> index e1cda54..2d67385 100644
> --- a/arch/arm/boot/dts/exynos4412-itop-elite.dts
> +++ b/arch/arm/boot/dts/exynos4412-itop-elite.dts
> @@ -139,6 +139,20 @@
>  assigned-clocks = < CLK_MOUT_CAM0>;
>  assigned-clock-parents = < CLK_XUSBXTI>;
>  };
> +
> +vcc_sys_lcd: sys-lcd {
> +compatible = "regulator-fixed";
> +regulator-name = "vcc_5v";
> +regulator-min-microvolt = <500>;
> +regulator-max-microvolt = <500>;
> +gpio = < 4 GPIO_ACTIVE_HIGH>;
> +};
> +
> +panel: panel {
> +ddc-i2c-bus = <_3>;
> +power-supply = <_sys_lcd>;
> +enable-gpios = < 2 GPIO_ACTIVE_HIGH>;
> +};
 Panel has no compatible string, which driver will handle this node?
>>> The problem is that, it is panel not supported by kernel. 
>> For simple panel you can take a look at [1][2]. Ie. if the panel needs
>> only power supply and enable gpio, you just need to add few lines to [2].
> But I still don't know which compatible string I should use, "simple-dpi" ?

Have you looked at [2]?
Or just run command in kernel git tree:
git log -p drivers/gpu/drm/panel/panel-simple.c

To add support for specific panel you add:
1. display mode(s),
2. panel description,
3. panel compatible string.

And then you use this compatible in dts.
To have patches accepted in mainline you should add bindings
for the panel, check history of dri-devel to see how to do it.

>>
>> [1]: Documentation/devicetree/bindings/display/panel/simple-panel.txt
>> [2]: drivers/gpu/drm/panel/panel-simple.c
>>
>>> Is it possible 
>>> to support without adding a new driver for it ? I know there is a 
>>> simple-dpi for MIPI, but what is for parallel video or lvds?
>> simple-dpi is just parallel output. LVDS is not supported by Exynos4412 but
>> boards usually have RGB/LVDS bridge for such panels, I have no access to
>> itop
>> board schematics, but I suppose it has such bridge. LVDS bridges often
>> do not
>> need Linux driver, so from developer point of view LVDS panels with such
>> bridge
> Yes it is.
>> are handled the same way as RGB panels. Example fimd bindings for RGB panels
>> are in [3].
>>
>> [3]: arch/arm/boot/dts/exynos4210-universal_c210.dts
>>
> Would it appear as a frame buffer device in Linux ? Regard of display 
> timings, I could solve it later. If the frame buffer node is created, I could 
> know I have a way to test.

Yes, it should, if everything is properly done /dev/fb0 should be available.
Roughly steps to do:
1. add panel definition to drivers/gpu/drm/panel/panel-simple.c.
2. add panel entry and fimd bindings to itop dts.
3. enable exynos dpi, simple panel, drm_framebuffer in .config.


 Regards
 Andrzej
>>> The other problem is that I don't how to configure the display-times, 
>>> the datasheet for CLAA070WP03XG only talk about total time, active time 
>>> and blank time for both Horizontal an Vertical time. Does it mean the 
>>> front-porch and sync-len for horizontal and vertical are zero ?
>> You can look at vendor's code.
> It is a very old kernel. But it seems that they didn't configure the fimd but 
> the frame buffer.

This is just matter of different display framework they have used.
In current kernel you should use drm framework.

>> Or just experiment with different values.
>> The equation is: total=active+back_porch+blank+front_porch.
>> So if htotal=864, hactive=800, hblank=64, then hporches are 0.
>> In case of vtotal=1288, vactive=1200, vblank=8 you have left 80 for porches,
>> you can try to split them equally for front and back for starters.
> But timings diagram in data sheet doesn't look like that, I have asked the 
> vendor for some help, I hope I could get a reply from the vendor.

After entering CLAA070WP03XG into web search you can find datasheet of it.
It contains timings specified above.

Regards
Andrzej


>> Regards
>> Andrzej
>>
>>> +   ports {
>>> +

[Intel-gfx] [PATCH 08/10] drm: Extract drm_color_mgmt.[hc]

2016-09-01 Thread Lionel Landwerlin

On 31/08/16 17:09, Daniel Vetter wrote:
> For both the new degamm/lut/gamma atomic combo, and the old legacy
> gamma tables.
>
> Signed-off-by: Daniel Vetter
> ---
>   drivers/gpu/drm/Makefile|   2 +-
>   drivers/gpu/drm/drm_color_mgmt.c| 248 
> 
>   drivers/gpu/drm/drm_crtc.c  | 220 
>   drivers/gpu/drm/drm_crtc_internal.h |   4 +
>   include/drm/drm_color_mgmt.h|  56 
>   include/drm/drm_crtc.h  |  28 +---
>   6 files changed, 310 insertions(+), 248 deletions(-)
>   create mode 100644 drivers/gpu/drm/drm_color_mgmt.c
>   create mode 100644 include/drm/drm_color_mgmt.h

Acked-by: Lionel Landwerlin 

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[Bug 97548] Crash on freesync code (dmesg)

2016-09-01 Thread bugzilla-dae...@freedesktop.org

https://bugs.freedesktop.org/show_bug.cgi?id=97548

Jarkko K  changed:

   What|Removed |Added

Summary|DPM states not working  |Crash on freesync code
   ||(dmesg)

--- Comment #2 from Jarkko K  ---
I was able to get DPM states working again. I don't know what actually broke
them. but the freesync log crash is still valid.

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[PATCH v2] drm/doc: Add a few words on validation with IGT

2016-09-01 Thread Daniel Vetter

On Thu, Sep 01, 2016 at 09:41:35AM +0200, Tomeu Vizoso wrote:
> Also provide some pointers for building IGT as some kernel hackers might
> not be that familiar with building stuff on Linux distros.
> 
> Signed-off-by: Tomeu Vizoso 
> Cc: Daniel Vetter 

Applied to drm-misc, thanks.
-Daniel

> ---
>  Documentation/gpu/drm-uapi.rst | 37 +
>  1 file changed, 37 insertions(+)
> 
> diff --git a/Documentation/gpu/drm-uapi.rst b/Documentation/gpu/drm-uapi.rst
> index 12b47c30fe2e..1ba301cebe16 100644
> --- a/Documentation/gpu/drm-uapi.rst
> +++ b/Documentation/gpu/drm-uapi.rst
> @@ -156,6 +156,43 @@ other hand, a driver requires shared state between 
> clients which is
>  visible to user-space and accessible beyond open-file boundaries, they
>  cannot support render nodes.
>  
> +Validating changes with IGT
> +===
> +
> +There's a collection of tests that aims to cover the whole functionality of
> +DRM drivers and that can be used to check that changes to DRM drivers or the
> +core don't regress existing functionality. This test suite is called IGT and
> +its code can be found in https://cgit.freedesktop.org/drm/igt-gpu-tools/.
> +
> +To build IGT, start by installing its build dependencies. In Debian-based
> +systems::
> +
> + # apt-get build-dep intel-gpu-tools
> +
> +And in Fedora-based systems::
> +
> + # dnf builddep intel-gpu-tools
> +
> +Then clone the repository::
> +
> + $ git clone git://anongit.freedesktop.org/drm/igt-gpu-tools
> +
> +Configure the build system and start the build::
> +
> + $ cd igt-gpu-tools && ./autogen.sh && make -j6
> +
> +Download the piglit dependency::
> +
> + $ ./scripts/run-tests.sh -d
> +
> +And run the tests::
> +
> + $ ./scripts/run-tests.sh -t kms -t core -s
> +
> +run-tests.sh is a wrapper around piglit that will execute the tests matching
> +the -t options. A report in HTML format will be available in
> +./results/html/index.html. Results can be compared with piglit.
> +
>  VBlank event handling
>  =
>  
> -- 
> 2.7.4
> 
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

[PATCH v3 0/8] drm/tilcdc: Address LCDC rev 2 color errata + other fixes

2016-09-01 Thread Tomi Valkeinen

On 31/08/16 16:14, Jyri Sarha wrote:
> Changes since v2:
> - Fiddle with color wiring propety once more, now it follows this Tomi's
>   comment:
>   - No property set: driver advertises RG16 and RG24. This is
> wrong, but that's what the current status is, right?
>   - Property set to "default" or "straight" or whatever: driver
> says RG16 and BG24
>   - Property set to "crossed": driver says BG16 and RG24
> - Add v2 version of "drm/tilcdc: Write DMA base and ceiling address with..."
>   - The first version was sent individually, this second version has
> __iowmb(); and __cpu_to_le64(); added to tilcdc_write64()
> 
> Changes since v1:
> - Change the blue-and-red-wiring property to boolean blue-and-red-crossed
>   - This breaks to little backward compatibility the earlier series had, but
> makes the binding more straight forward
>   - This changes requires changes to am335x-evm and am335x-evmsk dts-files
>   - The old beaglebone-black dts files remain compatible, but the patch
> suggests in commenst on how to support 24-bit RGB mode with BBB
> 
> The first patch ("drm/tilcdc: Remove drm_helper_disable_unused_functions()
> call") is completely independent fix.
> 
> The red and blue components are reversed between 24 and 16 bit modes
> on am335x LCDC output pins. To get 24 RGB format the wires red and
> blue wires has to be crossed and this in turn causes 16 colors output
> to be in BGR format. With straight wiring the 16 color is RGB and 24
> bit is BGR. These patches try to deal with the issue in reasonable
> manner.
> 
> For more details see section 3.1.1 in AM335x Silicon Errata:
> http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=sprz360

Aside the few minor comments I had, for the series:

Reviewed-by: Tomi Valkeinen 

 Tomi

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[PATCH v3 3/8] drm/tilcdc: Add blue-and-red-crossed devicetree property

2016-09-01 Thread Tomi Valkeinen



On 31/08/16 16:14, Jyri Sarha wrote:
> Add "blue-and-red-wiring"-device tree property and update devicetree
> binding document. The red and blue components are reversed between 24
> and 16 bit modes on am335x LCDC output pins. To get 24 RGB format the
> red and blue wires has to be crossed and this in turn causes 16 colors
> output to be in BGR format. With straight wiring the 16 color is RGB
> and 24 bit is BGR. The new property describes whether the red and blue
> wires are crossed or not. If the property is not present or its value
> is not recognized the legacy mode is assumed. The legacy configuration
> supports RGB565, RGB888 and XRGB formats. However, depending on
> wiring, the red and blue colors are swapped in either 16 or 24-bit
> color modes.
> 
> For more details see section 3.1.1 in AM335x Silicon Errata:
> http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=sprz360
> 
> Signed-off-by: Jyri Sarha 
> ---
>  .../devicetree/bindings/display/tilcdc/tilcdc.txt  | 22 
>  drivers/gpu/drm/tilcdc/tilcdc_drv.c| 42 
> ++
>  drivers/gpu/drm/tilcdc/tilcdc_drv.h|  4 +++
>  drivers/gpu/drm/tilcdc/tilcdc_plane.c  |  9 ++---
>  4 files changed, 71 insertions(+), 6 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt 
> b/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt
> index 6efa4c5..5b7b5f8 100644
> --- a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt
> +++ b/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt
> @@ -17,6 +17,18 @@ Optional properties:
> the lcd controller.
>   - max-pixelclock: The maximum pixel clock that can be supported
> by the lcd controller in KHz.
> + - blue-and-red-wiring: Recognized values "default", "straight" or
> +   "crossed". This property deals with the LCDC revision 2 (found on
> +   AM335x) color errata [1].
> + - "default" and "straight" indicates normal wiring that supports

I didn't mean to add two values for this =). Just use one, there's no
benefit in supporting multiple values meaning the same thing.

 Tomi

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[PATCH v3 2/8] drm/tilcdc: Write DMA base and ceiling address with single instruction

2016-09-01 Thread Jyri Sarha

On 09/01/16 10:13, Tomi Valkeinen wrote:
> On 31/08/16 16:14, Jyri Sarha wrote:
>> Write DMA base and ceiling address with a single instruction, if
>> available. This should make it more unlikely that LCDC would fetch the
>> DMA addresses in the middle of an update. Having bad combination of
>> addresses in dma base and ceiling (e.g base > ceiling) can cause
>> unpredictaple behavior in LCDC.
>>
>> Signed-off-by: Jyri Sarha 
>> ---
>>  drivers/gpu/drm/tilcdc/tilcdc_crtc.c |  9 +++--
>>  drivers/gpu/drm/tilcdc/tilcdc_regs.h | 14 ++
>>  2 files changed, 21 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c 
>> b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
>> index 6350f2a..41ec5b3 100644
>> --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
>> +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
>> @@ -70,6 +70,7 @@ static void set_scanout(struct drm_crtc *crtc, struct 
>> drm_framebuffer *fb)
>>  struct drm_gem_cma_object *gem;
>>  unsigned int depth, bpp;
>>  dma_addr_t start, end;
>> +u64 dma_base_and_ceiling;
>>  
>>  drm_fb_get_bpp_depth(fb->pixel_format, , );
>>  gem = drm_fb_cma_get_gem_obj(fb, 0);
>> @@ -80,8 +81,12 @@ static void set_scanout(struct drm_crtc *crtc, struct 
>> drm_framebuffer *fb)
>>  
>>  end = start + (crtc->mode.vdisplay * fb->pitches[0]);
>>  
>> -tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, start);
>> -tilcdc_write(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG, end - 1);
>> +/* Write DMA base and ceiling address with a single insruction,
>> + * if available. This should make it more unlikely that LCDC would
>> + * fetch the DMA addresses in the middle of an update.
>> + */
> 
> I think it would be good to have the register names mentioned in the
> above comment. Otherwise I can imagine grepping for CEILING_ADDR, and
> not finding it set anywhere in the driver...
> 

Ok, I'll do one more quick round for this patch. I also move the comment
before 64-bit assignment in tilcdc_write64() after the __iowmb();.

BR,
Jyri

[PATCH v3 2/8] drm/tilcdc: Write DMA base and ceiling address with single instruction

2016-09-01 Thread Tomi Valkeinen

On 31/08/16 16:14, Jyri Sarha wrote:
> Write DMA base and ceiling address with a single instruction, if
> available. This should make it more unlikely that LCDC would fetch the
> DMA addresses in the middle of an update. Having bad combination of
> addresses in dma base and ceiling (e.g base > ceiling) can cause
> unpredictaple behavior in LCDC.
> 
> Signed-off-by: Jyri Sarha 
> ---
>  drivers/gpu/drm/tilcdc/tilcdc_crtc.c |  9 +++--
>  drivers/gpu/drm/tilcdc/tilcdc_regs.h | 14 ++
>  2 files changed, 21 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c 
> b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> index 6350f2a..41ec5b3 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> @@ -70,6 +70,7 @@ static void set_scanout(struct drm_crtc *crtc, struct 
> drm_framebuffer *fb)
>   struct drm_gem_cma_object *gem;
>   unsigned int depth, bpp;
>   dma_addr_t start, end;
> + u64 dma_base_and_ceiling;
>  
>   drm_fb_get_bpp_depth(fb->pixel_format, , );
>   gem = drm_fb_cma_get_gem_obj(fb, 0);
> @@ -80,8 +81,12 @@ static void set_scanout(struct drm_crtc *crtc, struct 
> drm_framebuffer *fb)
>  
>   end = start + (crtc->mode.vdisplay * fb->pitches[0]);
>  
> - tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, start);
> - tilcdc_write(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG, end - 1);
> + /* Write DMA base and ceiling address with a single insruction,
> +  * if available. This should make it more unlikely that LCDC would
> +  * fetch the DMA addresses in the middle of an update.
> +  */

I think it would be good to have the register names mentioned in the
above comment. Otherwise I can imagine grepping for CEILING_ADDR, and
not finding it set anywhere in the driver...

 Tomi

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[RE]Re: drm/atmel-hlcdc: connector type & fbdev mode settings

2016-09-01 Thread 정형진

Ah.. yes it is. sama5 has only raw RGB interface. I confused with other
device.
and I also checked your previos commit. (LVDS -> Unknown)

Atmel's wiki have to be updated.


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[PATCH] drm/omapdrm: Remove double gamma table write in omap_crtc_atomic_flush()

2016-09-01 Thread Tomi Valkeinen

On 31/08/16 20:17, Jyri Sarha wrote:
> Remove double gamma table write in omap_crtc_atomic_flush().
> Fixes commit 492a426a2fc53
> ("drm/omapdrm: Implement gamma_lut atomic crtc properties")
> 
> Signed-off-by: Jyri Sarha 
> ---
>  drivers/gpu/drm/omapdrm/omap_crtc.c | 13 -
>  1 file changed, 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c 
> b/drivers/gpu/drm/omapdrm/omap_crtc.c
> index 180f644..bdbbe3d 100644
> --- a/drivers/gpu/drm/omapdrm/omap_crtc.c
> +++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
> @@ -411,19 +411,6 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
>   dispc_mgr_set_gamma(omap_crtc->channel, lut, length);
>   }
>  
> - if (crtc->state->color_mgmt_changed) {
> - struct drm_color_lut *lut = NULL;
> - uint length = 0;
> -
> - if (crtc->state->gamma_lut) {
> - lut = (struct drm_color_lut *)
> - crtc->state->gamma_lut->data;
> - length = crtc->state->gamma_lut->length /
> - sizeof(*lut);
> - }
> - dispc_mgr_set_gamma(omap_crtc->channel, lut, length);
> - }
> -
>   if (dispc_mgr_is_enabled(omap_crtc->channel)) {
>  
>   DBG("%s: GO", omap_crtc->name);

Thanks, I've picked this up for 4.9.

 Tomi

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[PATCH libdrm] modetest: add mediatek to module list

2016-09-01 Thread Nicolas Boichat

From: Daniel Kurtz 

There is a mediatek drm kms driver: Add "mediatek" to the static
lists of driver names.

Signed-off-by: Daniel Kurtz 
Signed-off-by: JB Tsai 
Signed-off-by: Nicolas Boichat 
---
 tests/util/kms.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/util/kms.c b/tests/util/kms.c
index c20134e..4d89ac8 100644
--- a/tests/util/kms.c
+++ b/tests/util/kms.c
@@ -143,6 +143,7 @@ static const char * const modules[] = {
"fsl-dcu-drm",
"vc4",
"virtio_gpu",
+   "mediatek",
 };

 int util_open(const char *device, const char *module)
-- 
2.8.0.rc3.226.g39d4020

[PATCH v2] drm/doc: Add a few words on validation with IGT

2016-09-01 Thread Tomeu Vizoso

Also provide some pointers for building IGT as some kernel hackers might
not be that familiar with building stuff on Linux distros.

Signed-off-by: Tomeu Vizoso 
Cc: Daniel Vetter 
---
 Documentation/gpu/drm-uapi.rst | 37 +
 1 file changed, 37 insertions(+)

diff --git a/Documentation/gpu/drm-uapi.rst b/Documentation/gpu/drm-uapi.rst
index 12b47c30fe2e..1ba301cebe16 100644
--- a/Documentation/gpu/drm-uapi.rst
+++ b/Documentation/gpu/drm-uapi.rst
@@ -156,6 +156,43 @@ other hand, a driver requires shared state between clients 
which is
 visible to user-space and accessible beyond open-file boundaries, they
 cannot support render nodes.

+Validating changes with IGT
+===
+
+There's a collection of tests that aims to cover the whole functionality of
+DRM drivers and that can be used to check that changes to DRM drivers or the
+core don't regress existing functionality. This test suite is called IGT and
+its code can be found in https://cgit.freedesktop.org/drm/igt-gpu-tools/.
+
+To build IGT, start by installing its build dependencies. In Debian-based
+systems::
+
+   # apt-get build-dep intel-gpu-tools
+
+And in Fedora-based systems::
+
+   # dnf builddep intel-gpu-tools
+
+Then clone the repository::
+
+   $ git clone git://anongit.freedesktop.org/drm/igt-gpu-tools
+
+Configure the build system and start the build::
+
+   $ cd igt-gpu-tools && ./autogen.sh && make -j6
+
+Download the piglit dependency::
+
+   $ ./scripts/run-tests.sh -d
+
+And run the tests::
+
+   $ ./scripts/run-tests.sh -t kms -t core -s
+
+run-tests.sh is a wrapper around piglit that will execute the tests matching
+the -t options. A report in HTML format will be available in
+./results/html/index.html. Results can be compared with piglit.
+
 VBlank event handling
 =

-- 
2.7.4

[PATCH] modetest: Also print the pixel clock

2016-09-01 Thread Alex Deucher

On Wed, Aug 31, 2016 at 10:45 PM, StÃ©phane Marchesin
 wrote:
> This can be useful for debugging. xrandr prints it, so why not.
> ---
>  tests/modetest/modetest.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)

Reviewed-by: Alex Deucher 

>
> diff --git a/tests/modetest/modetest.c b/tests/modetest/modetest.c
> index 21d5438..dedd286 100644
> --- a/tests/modetest/modetest.c
> +++ b/tests/modetest/modetest.c
> @@ -198,7 +198,7 @@ static void dump_encoders(struct device *dev)
>
>  static void dump_mode(drmModeModeInfo *mode)
>  {
> -   printf("  %s %d %d %d %d %d %d %d %d %d",
> +   printf("  %s %d %d %d %d %d %d %d %d %d %d",
>mode->name,
>mode->vrefresh,
>mode->hdisplay,
> @@ -208,7 +208,8 @@ static void dump_mode(drmModeModeInfo *mode)
>mode->vdisplay,
>mode->vsync_start,
>mode->vsync_end,
> -  mode->vtotal);
> +  mode->vtotal,
> +  mode->clock);
>
> printf(" flags: ");
> mode_flag_str(mode->flags);
> --
> 2.8.0.rc3.226.g39d4020
>
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH RFC] ARM: dts: samsung: add rga-lvds panel in itop elite

2016-09-01 Thread Andrzej Hajda

On 08/31/2016 07:55 PM, ayaka wrote:
>
> On 08/31/2016 08:30 PM, Andrzej Hajda wrote:
>> Hi,
>>
>>
>> On 08/30/2016 12:50 AM, Randy Li wrote:
>>> It is actually a lvds panel connected through a rga-lvds bridge.
>>> But I really have no idea about what does a port mean in fimd node.
>>>
>>> Also how should I configure this panel size? I think the i2c found
>>> on the panel schematic, but it more likely to be used a touch screen
>>> touth. Also the touch screen is not supported in currently driver.
>>>
>>> Signed-off-by: Randy Li 
>>> ---
>>>   arch/arm/boot/dts/exynos4412-itop-elite.dts | 35 
>>> ++---
>>>   1 file changed, 32 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/exynos4412-itop-elite.dts 
>>> b/arch/arm/boot/dts/exynos4412-itop-elite.dts
>>> index e1cda54..2d67385 100644
>>> --- a/arch/arm/boot/dts/exynos4412-itop-elite.dts
>>> +++ b/arch/arm/boot/dts/exynos4412-itop-elite.dts
>>> @@ -139,6 +139,20 @@
>>> assigned-clocks = < CLK_MOUT_CAM0>;
>>> assigned-clock-parents = < CLK_XUSBXTI>;
>>> };
>>> +   
>>> +   vcc_sys_lcd: sys-lcd {
>>> +   compatible = "regulator-fixed";
>>> +   regulator-name = "vcc_5v";
>>> +   regulator-min-microvolt = <500>;
>>> +   regulator-max-microvolt = <500>;
>>> +   gpio = < 4 GPIO_ACTIVE_HIGH>;
>>> +   };
>>> +
>>> +   panel: panel {
>>> +   ddc-i2c-bus = <_3>;
>>> +   power-supply = <_sys_lcd>;
>>> +   enable-gpios = < 2 GPIO_ACTIVE_HIGH>;
>>> +   };
>> Panel has no compatible string, which driver will handle this node?
> The problem is that, it is panel not supported by kernel. 

For simple panel you can take a look at [1][2]. Ie. if the panel needs
only power supply and enable gpio, you just need to add few lines to [2].

[1]: Documentation/devicetree/bindings/display/panel/simple-panel.txt
[2]: drivers/gpu/drm/panel/panel-simple.c

> Is it possible 
> to support without adding a new driver for it ? I know there is a 
> simple-dpi for MIPI, but what is for parallel video or lvds?

simple-dpi is just parallel output. LVDS is not supported by Exynos4412 but
boards usually have RGB/LVDS bridge for such panels, I have no access to
itop
board schematics, but I suppose it has such bridge. LVDS bridges often
do not
need Linux driver, so from developer point of view LVDS panels with such
bridge
are handled the same way as RGB panels. Example fimd bindings for RGB panels
are in [3].

[3]: arch/arm/boot/dts/exynos4210-universal_c210.dts

>> Regards
>> Andrzej
> The other problem is that I don't how to configure the display-times, 
> the datasheet for CLAA070WP03XG only talk about total time, active time 
> and blank time for both Horizontal an Vertical time. Does it mean the 
> front-porch and sync-len for horizontal and vertical are zero ?

You can look at vendor's code. Or just experiment with different values.
The equation is: total=active+back_porch+blank+front_porch.
So if htotal=864, hactive=800, hblank=64, then hporches are 0.
In case of vtotal=1288, vactive=1200, vblank=8 you have left 80 for porches,
you can try to split them equally for front and back for starters.

Regards
Andrzej

>
> +   ports {
> +   #address-cells = <1>;
> +   #size-cells = <0>;
> +   port at 3 {
> +   reg = <3>;
> +   rga_lvds: endpoint {
> +   remote-endpoint = <>;
> +   };
> +   };
> +   };
> +
> +   panel: panel at 0 {
> +   compatible = "panel-simple";
> +
> +   power-supply = <_sys_lcd>;
> +   enable-gpios = < 2 GPIO_ACTIVE_HIGH>;
> +   display-timings {
> +   timing-0 {
> +   clock-frequency = <6677>;
> +   hactive = <800>;
> +   vactive = <1280>;
> +   hfront-porch = <0>;
> +   hback-porch = <64>;
> +   hsync-len = <0>;
> +   vfront-porch = <0>;
> +   vback-porch = <8>;
> +   vsync-len = <0>;
> +   };
> +  };
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" 
> in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>
>

[PATCH 1/2] drm/udl: fix a NULL pointer reference in udl_gem_free_object().

2016-09-01 Thread Daniel Vetter

On Thu, Sep 1, 2016 at 3:22 AM, Haixia Shi  wrote:
> Daniel
>
> Thanks! I agree the PATCH 1/2 needs some more work.
>
> What do you think about the PATCH 2/2 (suspend/resume) -- would it
> make sense to review it as a single standalone patch?

Sure, but I have no clue about usb or udl-specific issues (I only
analyzed the generic lifetime issues in patch 1/2), I think you need
someone else for this. Sean Paul could probably help you out here.
-Daniel

>
> Regards, Haixia
>
> On Wed, Aug 31, 2016 at 2:17 PM, Daniel Vetter  wrote:
>> On Wed, Aug 31, 2016 at 11:05 PM, Daniel Vetter  wrote:
>>> On Wed, Aug 31, 2016 at 10:45 PM, Haixia Shi  wrote:
 For details see 
 https://bugs.chromium.org/p/chromium/issues/detail?id=468050

 So drm_mode_config_cleanup() is called from udl_driver_unload() in
 which we found there's still a framebuffer left, hence the WARN in
 drm_crtc.c:5495. This also forcefully releases all the buffers.

 A bit later the actual drm_buf_release comes in which attempts to
 release the buffer again.
>>>
>>> Leaving a drm_framebuffer behind on unload is definitely a bug, but
>>> not fixed with this patch here I think.
>>>
>>> The dma-buf lifetime issue is far worse, since we simply don't
>>> handling those leaking past the lifetime of the exporting drm_device
>>> at all. The dma-buf has references to a lot more than just the vma
>>> manager. What we probably need is that every exported dma-buf holds a
>>> ref on the underlying drm_device, but that means untangling the
>>> refcounting of that vs unplugging it.
>>
>> Just noticed that these problems started only when dma-buf export
>> support was added (by you) to udl. That dma-buf support is a bit
>> hack-ish (e.g. it leaks sg mappings since udl_unmap_dma_buf isn't
>> implemented. Rough sketch of a fix:
>>
>> - fix up udl_dmabuf.c. We could/should probably put most of these into
>> the core as a set of helpers for drivers which use plain shmem gem
>> objects.
>>
>> - fix udl load/unload to no longer be midlayered, i.e. get rid of the
>> ->load/unload hooks. There's tons of examples and drivers out there
>> for templates.
>>
>> - fix up the unplug hook to correctly unregister everything. With the
>> fixed load/unload all the unplugged tracking is probably no longer
>> neeeded. Also with this you can drop the drm_global_mutex dance from
>> drm_unplug_dev. Also the sequence in drm_unplug_dev is wrong like the
>> midlayered ->unload. First it should do all the unregistering, then
>> release internal resources. Atm it's the other way round.
>>
>> - make sure _all_ public objects (open files, counted by
>> dev->open_count, dma-bufs, ...) hold a full reference onto the
>> drm_device. For the dma-buf case this probably needs changes in
>> drm_prime.c.
>>
>> - Fix that little ordering issue with the leaking fb. It's probably
>> not getting cleanup up as it should in udl_fbdev_unplug.
>>
>> tada, bug fixed for real!
>>
>> Cheers, Daniel
>> --
>> Daniel Vetter
>> Software Engineer, Intel Corporation
>> +41 (0) 79 365 57 48 - http://blog.ffwll.ch



-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

[RFC v4 1/3] drm/fence: add in-fences support

2016-09-01 Thread Maarten Lankhorst

Op 31-08-16 om 21:07 schreef Gustavo Padovan:
> From: Gustavo Padovan 
>
> There is now a new property called FENCE_FD attached to every plane
> state that receives the sync_file fd from userspace via the atomic commit
> IOCTL.
>
> The fd is then translated to a fence (that may be a fence_collection
> subclass or just a normal fence) and then used by DRM to fence_wait() for
> all fences in the sync_file to signal. So it only commits when all
> framebuffers are ready to scanout.
>
> v2: Comments by Daniel Vetter:
>   - remove set state->fence = NULL in destroy phase
>   - accept fence -1 as valid and just return 0
>   - do not call fence_get() - sync_file_fences_get() already calls it
>   - fence_put() if state->fence is already set, in case userspace
>   set the property more than once.
>
> v3: WARN_ON if fence is set but state has no FB
>
> Signed-off-by: Gustavo Padovan 
> ---
>  drivers/gpu/drm/Kconfig |  1 +
>  drivers/gpu/drm/drm_atomic.c| 19 +++
>  drivers/gpu/drm/drm_atomic_helper.c |  3 +++
>  drivers/gpu/drm/drm_crtc.c  |  7 +++
>  include/drm/drm_crtc.h  |  4 
>  5 files changed, 34 insertions(+)
>
> diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
> index c02be6a..07f9c60 100644
> --- a/drivers/gpu/drm/Kconfig
> +++ b/drivers/gpu/drm/Kconfig
> @@ -12,6 +12,7 @@ menuconfig DRM
>   select I2C
>   select I2C_ALGOBIT
>   select DMA_SHARED_BUFFER
> + select SYNC_FILE
>   help
> Kernel-level support for the Direct Rendering Infrastructure (DRI)
> introduced in XFree86 4.0. If you say Y here, you need to select
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 5cb2e22..9e6c4e7 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -30,6 +30,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #include "drm_crtc_internal.h"
>  
> @@ -690,6 +691,17 @@ int drm_atomic_plane_set_property(struct drm_plane 
> *plane,
>   drm_atomic_set_fb_for_plane(state, fb);
>   if (fb)
>   drm_framebuffer_unreference(fb);
> + } else if (property == config->prop_fence_fd) {
> + if (U642I64(val) == -1)
> + return 0;
> +
> + if (state->fence)
> + fence_put(state->fence);
> +
> + state->fence = sync_file_get_fence(val);
> + if (!state->fence)
> + return -EINVAL;
> @@ -749,6 +761,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
>  
>   if (property == config->prop_fb_id) {
>   *val = (state->fb) ? state->fb->base.id : 0;
> + } else if (property == config->prop_fence_fd) {
> + *val = -1;
>   } else if (property == config->prop_crtc_id) {
>   *val = (state->crtc) ? state->crtc->base.id : 0;
>   } else if (property == config->prop_crtc_x) {
> @@ -824,6 +838,11 @@ static int drm_atomic_plane_check(struct drm_plane 
> *plane,
>   return -EINVAL;
>   }
>  
> + if (WARN_ON(state->fence && !state->fb)) {
> + DRM_DEBUG_ATOMIC("in-fence set but no FB\n");
> + return -EINVAL;
> + }
Why is this a error? Could be useful to fence a modeset disable.

It might make more sense to put the fence inside the crtc state, not the plane 
state. Updates are done per crtc and moving planes
between multiple crtc's inside a single commit is not allowed. I'd like to know 
what others think of that.

I'm not sure this patch is tested, looks like plane_duplicate_state is not 
clearing ->fence, probably resulting in WARNs.

> diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
> b/drivers/gpu/drm/drm_atomic_helper.c
> index dff2389..f817452 100644
> --- a/drivers/gpu/drm/drm_atomic_helper.c
> +++ b/drivers/gpu/drm/drm_atomic_helper.c
> @@ -3156,6 +3156,9 @@ void __drm_atomic_helper_plane_destroy_state(struct 
> drm_plane_state *state)
>  {
>   if (state->fb)
>   drm_framebuffer_unreference(state->fb);
> +
> + if (state->fence)
> + fence_put(state->fence);
>  }
>  EXPORT_SYMBOL(__drm_atomic_helper_plane_destroy_state);
>  
> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> index b95c48ac..6eaeb73 100644
> --- a/drivers/gpu/drm/drm_crtc.c
> +++ b/drivers/gpu/drm/drm_crtc.c
> @@ -338,6 +338,7 @@ int drm_universal_plane_init(struct drm_device *dev, 
> struct drm_plane *plane,
>  
>   if (drm_core_check_feature(dev, DRIVER_ATOMIC)) {
>   drm_object_attach_property(>base, config->prop_fb_id, 0);
> + drm_object_attach_property(>base, config->prop_fence_fd, 
> -1);
>   drm_object_attach_property(>base, config->prop_crtc_id, 
> 0);
>   drm_object_attach_property(>base, config->prop_crtc_x, 
> 0);
>   drm_object_attach_property(>base, config->prop_crtc_y, 
> 0);
> @@ -610,6 +611,12 @@

[Bug 100871] radeon fails to initialize one DisplayPort monitor

2016-09-01 Thread bugzilla-dae...@bugzilla.kernel.org

https://bugzilla.kernel.org/show_bug.cgi?id=100871

--- Comment #13 from Reg  ---
Created attachment 231671
  --> https://bugzilla.kernel.org/attachment.cgi?id=231671=edit
Xorg.0.log - All 6 screens good kernel-3.16.7-35-default

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[Bug 100871] radeon fails to initialize one DisplayPort monitor

2016-09-01 Thread bugzilla-dae...@bugzilla.kernel.org

https://bugzilla.kernel.org/show_bug.cgi?id=100871

--- Comment #12 from Reg  ---
Created attachment 231661
  --> https://bugzilla.kernel.org/attachment.cgi?id=231661=edit
dmsg - All 6 screens good kernel-3.16.7-35-default

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[Bug 100871] radeon fails to initialize one DisplayPort monitor

2016-09-01 Thread bugzilla-dae...@bugzilla.kernel.org

https://bugzilla.kernel.org/show_bug.cgi?id=100871

Reg  changed:

   What|Removed |Added

 CC||reg at regproctor.com

--- Comment #11 from Reg  ---
I think I have the same problem but I have a more complicated setup and because
of that I have been able to identify more symptoms which may help.

In any case, here's everything I have been able to determine but first the
hardware setup: My graphics card is "HD 5870 Eyefinity 6" which has 6
DisplayPorts. I have them setup in a grid of 3 across by 2 down. Each display
is at a resolution of 2560x1440 creating a total work area of 7680x2880 in a
Xinerama setup running on the KDE4 desktop.

I currently have 3 kernels in my grub list which are:
  kernel-3.16.7
  kernel-4.7.0
  kernel-4.7.2

Of these 3.16.7 was with opensuse 13.2 and the other two came into being when I
switched over to Tumbleweed, SUSE's rolling distribution.

With the kernel 3.16.7 I had no problem with all DisplayPorts turning on as
they should all the time. When I changed over to Tumbleweed it still worked
fine. However, the other two kernels would only turn on the first two displays.
That happens during boot long before Xorg gets loaded.

In Xorg the behavior is a little strange when it gets DisplayPorts off from the
kernel. Xorg will acknowledge all 6 displays but it is not able to turn on any
that are initially off when the kernel was handling them. E.g.: the last 4
monitors in the case of the 4.x kernels.

The upshot is that when I go to the multidisplay setup part of KDE all 6
displays are showing as active even though only the first two are turned on in
reality. If I disable and re-enable the displays turned off, they don't turn
on. If I use xrandr to turn them on, no dice. That is, if they are off when the
kernel was handling them they are off for good, nothing in Xorg or KDE can
change it that I have found.

There was a bunch of updates for Tumbleweed a few days ago. With this update
the kernel 4.7.2 was added and 3.16.7 started to not always boot with all the
displays on. In fact, it was consistently leaving out display 0 and 5 (first
and last on the graphics card). However, after much playing with the "radeon."
kernel boot parameters I found that setting radeon.agpmode=-1 seemed to make it
consistently on leave only 1 monitor off, monitor 0. No other "radeon." setting
seemed to help.

However, on several boots I could get variations... I must have rebooted 50+
times last night. Occasionally I would get only 4 of the 6 on and even more
occasionally I would get all 6 on like it should be.

Trying all the "radeon." settings seemed to have no effect on the 4.x kernels
and they still only booted with 2 of the 6 displays on... as if someone hard
coded a 2 output limit in the kernel code for testing and forgot to remove the
test code.

I also found two other curious symptoms on the 3.16.7 kernel:

- If I turn the monitor off and back on while booting that the kernel left off
sometimes I can get the kernel to recognise that display and leave it on during
boot. If it gets to the gui before I can turn off/on the monitor then it's too
late. Again, this is very iffy, some times it works and some times it doesn't.

- Since the latest updates, if I let KDE turn off all the monitors, say I walk
away for a while so that power saving kicks in, then all the monitors that were
on will come back on. However if I leave it too long, like over night, then
some displays may not come back on, and, once they are off when they should be
on again, there is no turning them back on without clearing the KDE cache and
rebooting before that cache gets refreshed. This usually means logging out of
my profile, logging in as root user, clearing my profile's KDE/plasma cache,
rebooting, making sure I get a boot that the kernel turns on all the displays
and the logging in to my profile again... not exactly and long term workable
way to be.

I have attached my dmesg with the 3.16.7 kernel working correctly (I just got
very lucky so I preserved the logs). Tomorrow, I can get you the logs of 3.16.7
not coming up correctly and the other two kernels coming up with only 2
displays on out of the 6 there should be.

That's all that I have figured out so far. As you can guess with my setup it's
rather important that I get this fixed or I'll have to revert back to an older
release which I don't want to do for several reasons. The upshot, I am at your
disposal to figure this out, just tell me what you need me to do.

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[PATCH v2] drm/fsl-dcu: Fix endian issue when using clk_register_divider

2016-09-01 Thread Meng Yi

Hi Stefan,

Could you test this patch on vf610, I think it will woks fine.

When could you merge this path? And how about the patches for gamma correction 
and multi-layer support by the way?

Best Regards,
Meng

> > > diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
> > > b/drivers/gpu/drm/fsl- dcu/fsl_dcu_drm_drv.c index 7882387..a590ce8
> > > 100644
> > > --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
> > > +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
> > > @@ -386,7 +386,8 @@ static int fsl_dcu_drm_probe(struct
> > > platform_device
> > > *pdev)
> > >   snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix",
> > > pix_clk_in_name);
> > >   fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name,
> > >   pix_clk_in_name, 0, base + DCU_DIV_RATIO,
> > > - 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL);
> > > + !strcmp(fsl_dev->soc->name, "ls1021a")?24:0, 8,
> > > + CLK_DIVIDER_ROUND_CLOSEST, NULL);
> >
> > Tested-by: Meng Yi 
> 
> On LS1021A-TWR board.
> >
> > >   if (IS_ERR(fsl_dev->pix_clk)) {
> > >   dev_err(dev, "failed to register pix clk\n");
> > >   ret = PTR_ERR(fsl_dev->pix_clk);
> > > --
> > > 2.1.0.27.g96db324

[Bug 97025] flip queue failed: Device or resource busy

2016-09-01 Thread bugzilla-dae...@freedesktop.org

https://bugs.freedesktop.org/show_bug.cgi?id=97025

--- Comment #19 from Bernd Steinhauser  ---
Yes, the ones around 11383x.

I can't yet be sure about DP, but I'll check again.
The problem is that I can't find a way to trigger it, it just happens randomly.

The DisplayPort Monitor is my main screen, it would mean I have to work for 1
week or so without it.

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