[ANNOUNCE] libdrm 2.4.110
Daniel Stone (1): drm/atomic: Stable sort for atomic request de-duplication Dylan Baker (9): meson: use dictionary kwargs meson: add override_dependency when possible meson: switch the meson builtin for symbol visiblity meson: switch to cc.get_supported_arguments meson: use more standard formatting for better readability meson: use cc.check_header instead of open coding meson: use cc.has_function_attribute instead of open coding meson: use the modern interface for pkg.generate meson: use summary() instead of message Eric Engestrom (1): use standard `__typeof__()` instead of GNU extension `typeof()` Guchun Chen (1): tests/amdgpu: Add VCN test support for Biege Goby Raviteja Goud Talla (1): intel: sync i915_pciids.h with kernel Samuel Pitoiset (4): amdgpu: update_drm.h for new CTX OP to set/get stable pstates amdgpu: implement new CTX OP to set/get stable pstates tests/amdgpu: add a test for new CTX OP to get/set stable pstates build: bump version to 2.4.110 Sathishkumar S (1): tests/amdgpu: add jpeg tests support Simon Ser (1): releasing: s/master/main/ Tejas Upadhyay (1): intel: Add support for ADL-N ravitejax (1): intel: Add support for RPLS platform git tag: libdrm-2.4.110 https://dri.freedesktop.org/libdrm/libdrm-2.4.110.tar.xz SHA256: eecee4c4b47ed6d6ce1a9be3d6d92102548ea35e442282216d47d05293cf9737 libdrm-2.4.110.tar.xz SHA512: 52f92ef1fe4c218a1d7dba53ef43334dbfca80e3209afe59f3a32c4bf67473126534e990df07a931a12d46a3b997c21ef17c1c4d8a0c88d44d5c6c040e3b6be3 libdrm-2.4.110.tar.xz PGP: https://dri.freedesktop.org/libdrm/libdrm-2.4.110.tar.xz.sig
Re: [PATCH libdrm] amdgpu: Add context priority override function.
Reviewed-by: Samuel Pitoiset
On 4/17/19 8:33 PM, Bas Nieuwenhuizen wrote:
This way we can override the priority of a single context using a
master fd.
Since we cannot usefully create an amdgpu device of a master fd
without the fd deduplication kicking in this takes a plain fd.
This can be used by e.g. radv to get high priority contexts using
a master fd from the primary node or a lease.
---
amdgpu/amdgpu-symbol-check | 1 +
amdgpu/amdgpu.h| 15 +++
amdgpu/amdgpu_cs.c | 25 +
3 files changed, 41 insertions(+)
diff --git a/amdgpu/amdgpu-symbol-check b/amdgpu/amdgpu-symbol-check
index 96a44b40..4d806922 100755
--- a/amdgpu/amdgpu-symbol-check
+++ b/amdgpu/amdgpu-symbol-check
@@ -38,6 +38,7 @@ amdgpu_cs_create_syncobj2
amdgpu_cs_ctx_create
amdgpu_cs_ctx_create2
amdgpu_cs_ctx_free
+amdgpu_cs_ctx_override_priority
amdgpu_cs_destroy_semaphore
amdgpu_cs_destroy_syncobj
amdgpu_cs_export_syncobj
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index d6de3b8d..3d838e08 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -911,6 +911,21 @@ int amdgpu_cs_ctx_create(amdgpu_device_handle dev,
*/
int amdgpu_cs_ctx_free(amdgpu_context_handle context);
+/**
+ * Override the submission priority for the given context using a master fd.
+ *
+ * \param dev - \c [in] device handle
+ * \param context- \c [in] context handle for context id
+ * \param master_fd - \c [in] The master fd to authorize the override.
+ * \param priority - \c [in] The priority to assign to the context.
+ *
+ * \return 0 on success or a a negative Posix error code on failure.
+ */
+int amdgpu_cs_ctx_override_priority(amdgpu_device_handle dev,
+amdgpu_context_handle context,
+int master_fd,
+unsigned priority);
+
/**
* Query reset state for the specific GPU Context
*
diff --git a/amdgpu/amdgpu_cs.c b/amdgpu/amdgpu_cs.c
index 5bedf748..7ee844fb 100644
--- a/amdgpu/amdgpu_cs.c
+++ b/amdgpu/amdgpu_cs.c
@@ -142,6 +142,31 @@ drm_public int amdgpu_cs_ctx_free(amdgpu_context_handle
context)
return r;
}
+drm_public int amdgpu_cs_ctx_override_priority(amdgpu_device_handle dev,
+ amdgpu_context_handle context,
+ int master_fd,
+ unsigned priority)
+{
+ int r;
+
+ if (!dev || !context || master_fd < 0)
+ return -EINVAL;
+
+ union drm_amdgpu_sched args;
+ memset(&args, 0, sizeof(args));
+
+ args.in.op = AMDGPU_SCHED_OP_CONTEXT_PRIORITY_OVERRIDE;
+ args.in.fd = dev->fd;
+ args.in.priority = priority;
+ args.in.ctx_id = context->id;
+
+ r = drmCommandWrite(master_fd, DRM_AMDGPU_SCHED, &args, sizeof(args));
+ if (r)
+ return r;
+
+ return 0;
+}
+
drm_public int amdgpu_cs_query_reset_state(amdgpu_context_handle context,
uint32_t *state, uint32_t *hangs)
{
___
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Re: [PATCH] vulkan: Add VK_EXT_calibrated_timestamps extension (radv and anv) [v4]
The RADV bits are:
Reviewed-by: Samuel Pitoiset
Thanks!
On 10/16/18 7:31 AM, Keith Packard wrote:
Offers three clocks, device, clock monotonic and clock monotonic
raw. Could use some kernel support to reduce the deviation between
clock values.
v2:
Ensure deviation is at least as big as the GPU time interval.
v3:
Set device->lost when returning DEVICE_LOST.
Use MAX2 and DIV_ROUND_UP instead of open coding these.
Delete spurious TIMESTAMP in radv version.
Suggested-by: Jason Ekstrand
Suggested-by: Lionel Landwerlin
v4:
Add anv_gem_reg_read to anv_gem_stubs.c
Suggested-by: Jason Ekstrand
Signed-off-by: Keith Packard
---
src/amd/vulkan/radv_device.c | 81 +++
src/amd/vulkan/radv_extensions.py | 1 +
src/intel/vulkan/anv_device.c | 89 ++
src/intel/vulkan/anv_extensions.py | 1 +
src/intel/vulkan/anv_gem.c | 13 +
src/intel/vulkan/anv_gem_stubs.c | 7 +++
src/intel/vulkan/anv_private.h | 2 +
7 files changed, 194 insertions(+)
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 174922780fc..80050485e54 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -4955,3 +4955,84 @@ radv_GetDeviceGroupPeerMemoryFeatures(
VK_PEER_MEMORY_FEATURE_GENERIC_SRC_BIT |
VK_PEER_MEMORY_FEATURE_GENERIC_DST_BIT;
}
+
+static const VkTimeDomainEXT radv_time_domains[] = {
+ VK_TIME_DOMAIN_DEVICE_EXT,
+ VK_TIME_DOMAIN_CLOCK_MONOTONIC_EXT,
+ VK_TIME_DOMAIN_CLOCK_MONOTONIC_RAW_EXT,
+};
+
+VkResult radv_GetPhysicalDeviceCalibrateableTimeDomainsEXT(
+ VkPhysicalDevice physicalDevice,
+ uint32_t *pTimeDomainCount,
+ VkTimeDomainEXT *pTimeDomains)
+{
+ int d;
+ VK_OUTARRAY_MAKE(out, pTimeDomains, pTimeDomainCount);
+
+ for (d = 0; d < ARRAY_SIZE(radv_time_domains); d++) {
+ vk_outarray_append(&out, i) {
+ *i = radv_time_domains[d];
+ }
+ }
+
+ return vk_outarray_status(&out);
+}
+
+static uint64_t
+radv_clock_gettime(clockid_t clock_id)
+{
+ struct timespec current;
+ int ret;
+
+ ret = clock_gettime(clock_id, ¤t);
+ if (ret < 0 && clock_id == CLOCK_MONOTONIC_RAW)
+ ret = clock_gettime(CLOCK_MONOTONIC, ¤t);
+ if (ret < 0)
+ return 0;
+
+ return (uint64_t) current.tv_sec * 10ULL + current.tv_nsec;
+}
+
+VkResult radv_GetCalibratedTimestampsEXT(
+ VkDevice _device,
+ uint32_t timestampCount,
+ const VkCalibratedTimestampInfoEXT *pTimestampInfos,
+ uint64_t *pTimestamps,
+ uint64_t *pMaxDeviation)
+{
+ RADV_FROM_HANDLE(radv_device, device, _device);
+ uint32_t clock_crystal_freq =
device->physical_device->rad_info.clock_crystal_freq;
+ int d;
+ uint64_t begin, end;
+
+ begin = radv_clock_gettime(CLOCK_MONOTONIC_RAW);
+
+ for (d = 0; d < timestampCount; d++) {
+ switch (pTimestampInfos[d].timeDomain) {
+ case VK_TIME_DOMAIN_DEVICE_EXT:
+ pTimestamps[d] = device->ws->query_value(device->ws,
+
RADEON_TIMESTAMP);
+ break;
+ case VK_TIME_DOMAIN_CLOCK_MONOTONIC_EXT:
+ pTimestamps[d] = radv_clock_gettime(CLOCK_MONOTONIC);
+ break;
+
+ case VK_TIME_DOMAIN_CLOCK_MONOTONIC_RAW_EXT:
+ pTimestamps[d] = begin;
+ break;
+ default:
+ pTimestamps[d] = 0;
+ break;
+ }
+ }
+
+ end = radv_clock_gettime(CLOCK_MONOTONIC_RAW);
+
+ uint64_t clock_period = end - begin;
+ uint64_t device_period = DIV_ROUND_UP(100, clock_crystal_freq);
+
+ *pMaxDeviation = MAX2(clock_period, device_period);
+
+ return VK_SUCCESS;
+}
diff --git a/src/amd/vulkan/radv_extensions.py
b/src/amd/vulkan/radv_extensions.py
index 5dcedae1c63..4c81d3f0068 100644
--- a/src/amd/vulkan/radv_extensions.py
+++ b/src/amd/vulkan/radv_extensions.py
@@ -92,6 +92,7 @@ EXTENSIONS = [
Extension('VK_KHR_display', 23,
'VK_USE_PLATFORM_DISPLAY_KHR'),
Extension('VK_EXT_direct_mode_display', 1,
'VK_USE_PLATFORM_DISPLAY_KHR'),
Extension('VK_EXT_acquire_xlib_display', 1,
'VK_USE_PLATFORM_XL
Re: [PATCH libdrm 1/3] headers: sync amdgpu_drm.h from airlied/drm-next
On 04/03/2017 10:27 AM, Nicolai Hähnle wrote:
From: Nicolai Hähnle
Changes include: PRT and preemption flags, sensor info, and some more
changes for Vega10.
Cool, thanks. I will be able to re-send the sensor info series for mesa. :)
Generated using make headers_install from airlied/drm-next commit
320d8c3d38739fa8e31a076b86cbdafcf8897d5e.
Signed-off-by: Nicolai Hähnle
---
include/drm/amdgpu_drm.h | 56 +++-
1 file changed, 55 insertions(+), 1 deletion(-)
diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index fa56499..516a9f2 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -225,20 +225,21 @@ struct drm_amdgpu_gem_userptr {
#define AMDGPU_TILING_BANK_HEIGHT_MASK 0x3
#define AMDGPU_TILING_MACRO_TILE_ASPECT_SHIFT 19
#define AMDGPU_TILING_MACRO_TILE_ASPECT_MASK 0x3
#define AMDGPU_TILING_NUM_BANKS_SHIFT 21
#define AMDGPU_TILING_NUM_BANKS_MASK 0x3
/* GFX9 and later: */
#define AMDGPU_TILING_SWIZZLE_MODE_SHIFT 0
#define AMDGPU_TILING_SWIZZLE_MODE_MASK0x1f
+/* Set/Get helpers for tiling flags. */
#define AMDGPU_TILING_SET(field, value) \
(((__u64)(value) & AMDGPU_TILING_##field##_MASK) <<
AMDGPU_TILING_##field##_SHIFT)
#define AMDGPU_TILING_GET(value, field) \
(((__u64)(value) >> AMDGPU_TILING_##field##_SHIFT) &
AMDGPU_TILING_##field##_MASK)
#define AMDGPU_GEM_METADATA_OP_SET_METADATA 1
#define AMDGPU_GEM_METADATA_OP_GET_METADATA 2
/** The same structure is shared for input/output */
struct drm_amdgpu_gem_metadata {
@@ -348,31 +349,47 @@ struct drm_amdgpu_gem_op {
/** GEM object handle */
__u32 handle;
/** AMDGPU_GEM_OP_* */
__u32 op;
/** Input or return value */
__u64 value;
};
#define AMDGPU_VA_OP_MAP 1
#define AMDGPU_VA_OP_UNMAP 2
+#define AMDGPU_VA_OP_CLEAR 3
+#define AMDGPU_VA_OP_REPLACE 4
/* Delay the page table update till the next CS */
#define AMDGPU_VM_DELAY_UPDATE (1 << 0)
/* Mapping flags */
/* readable mapping */
#define AMDGPU_VM_PAGE_READABLE(1 << 1)
/* writable mapping */
#define AMDGPU_VM_PAGE_WRITEABLE (1 << 2)
/* executable mapping, new for VI */
#define AMDGPU_VM_PAGE_EXECUTABLE (1 << 3)
+/* partially resident texture */
+#define AMDGPU_VM_PAGE_PRT (1 << 4)
+/* MTYPE flags use bit 5 to 8 */
+#define AMDGPU_VM_MTYPE_MASK (0xf << 5)
+/* Default MTYPE. Pre-AI must use this. Recommended for newer ASICs. */
+#define AMDGPU_VM_MTYPE_DEFAULT(0 << 5)
+/* Use NC MTYPE instead of default MTYPE */
+#define AMDGPU_VM_MTYPE_NC (1 << 5)
+/* Use WC MTYPE instead of default MTYPE */
+#define AMDGPU_VM_MTYPE_WC (2 << 5)
+/* Use CC MTYPE instead of default MTYPE */
+#define AMDGPU_VM_MTYPE_CC (3 << 5)
+/* Use UC MTYPE instead of default MTYPE */
+#define AMDGPU_VM_MTYPE_UC (4 << 5)
struct drm_amdgpu_gem_va {
/** GEM object handle */
__u32 handle;
__u32 _pad;
/** AMDGPU_VA_OP_* */
__u32 operation;
/** AMDGPU_VM_PAGE_* */
__u32 flags;
/** va address to assign . Must be correctly aligned.*/
@@ -421,23 +438,26 @@ struct drm_amdgpu_cs_out {
union drm_amdgpu_cs {
struct drm_amdgpu_cs_in in;
struct drm_amdgpu_cs_out out;
};
/* Specify flags to be used for IB */
/* This IB should be submitted to CE */
#define AMDGPU_IB_FLAG_CE (1<<0)
-/* CE Preamble */
+/* Preamble flag, which means the IB could be dropped if no context switch */
#define AMDGPU_IB_FLAG_PREAMBLE (1<<1)
+/* Preempt flag, IB should set Pre_enb bit if PREEMPT flag detected */
+#define AMDGPU_IB_FLAG_PREEMPT (1<<2)
+
struct drm_amdgpu_cs_chunk_ib {
__u32 _pad;
/** AMDGPU_IB_FLAG_* */
__u32 flags;
/** Virtual address to begin IB execution */
__u64 va_start;
/** Size of submission */
__u32 ib_bytes;
/** HW IP to submit to */
__u32 ip_type;
@@ -499,20 +519,24 @@ struct drm_amdgpu_cs_chunk_data {
/* Subquery id: Query GFX CE firmware version */
#define AMDGPU_INFO_FW_GFX_CE 0x06
/* Subquery id: Query GFX RLC firmware version */
#define AMDGPU_INFO_FW_GFX_RLC 0x07
/* Subquery id: Query GFX MEC firmware version */
#define AMDGPU_INFO_FW_GFX_MEC 0x08
/* Subquery id: Query SMC firmware version */
#define AMDGPU_INFO_FW_SMC 0x0a
/* Subquery id: Query SDMA firmware version */
#define AMDGPU_INFO_FW_SDMA 0x0b
+ /* Subquery id: Query PSP SOS firmware version */
+ #define AMDGPU_INFO_FW_SOS 0x0c
+ /* Subque
Re: [PATCH 0/2] drm/ttm, amdgpu: fix use-after-free in recent deadlock fix
On 02/14/2017 10:18 AM, Nicolai Hähnle wrote: Hi all, based on my current theory on how a deadlock could happen in the buffer allocation code, these two patches should fix the deadlock without having a use-after-free. I'm still working on a way to clean up the ttm_bo_init sequence overall, but I'm separating these two out for a hopefully quick fix, since in my book use-after-frees are worse than deadlocks. Samuel, I'd very much appreciate if you could check that the deadlocks in Hitman remain fixed with these two patches. Looks good. Thanks! Thanks, Nicolai ___ amd-gfx mailing list amd-...@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH libdrm 0/4] libdrm: add new GPU sensor interface for AMDGPU
On 02/14/2017 10:43 AM, Christian König wrote: Am 14.02.2017 um 02:44 schrieb Emil Velikov: On 14 February 2017 at 00:08, Samuel Pitoiset wrote: Hi, This series implements a new GPU sensor interface which will allow to query the current temperature and the shader/memory clocks via the GALLIUM_HUD. This adds the same functionality as the Radeon driver. The first patch of the series syncs amdgpu_drm.h with kernel headers. Branch is here: https://cgit.freedesktop.org/~hakzsam/drm/log/?h=si_clocks_temp Please review. Thanks! Samuel Pitoiset (4): amdgpu: sync amdgpu_drm.h with the kernel Samuel, Please read through drm/include/drm/README in particular "When and how to update these files". JFYI multiple people are trying to get various UABI in, so do keep an eye open for fireworks. amdgpu: add new GPU sensor related interface amdgpu: allow to query GPU sensor related information You'll need to add the new interface(s) to the symbols test. `make check' must pass. Bump version for 2.4.76 release Skim through RELEASING for details on how to roll one. Pardon, if I'm flocking up a dead horse here. Please keep an eye open on this Emil. Additionally to what said before you didn't used upstream, but rather the branch including the DC code (with the freesync IOCTL). We are probably not getting this upstream like that, so pushing it into libdrm is clearly not a good idea. Thanks for your feedbacks. I will first wait for the kernel interface to be merged before making a new series. Regards, Christian. Thanks Emil ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 0/2] drm/ttm, amdgpu: fix use-after-free in recent deadlock fix
On 02/14/2017 10:18 AM, Nicolai Hähnle wrote: Hi all, based on my current theory on how a deadlock could happen in the buffer allocation code, these two patches should fix the deadlock without having a use-after-free. I'm still working on a way to clean up the ttm_bo_init sequence overall, but I'm separating these two out for a hopefully quick fix, since in my book use-after-frees are worse than deadlocks. Samuel, I'd very much appreciate if you could check that the deadlocks in Hitman remain fixed with these two patches. Sure, I will check. Thanks, Nicolai ___ amd-gfx mailing list amd-...@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH libdrm 2/4] amdgpu: add new GPU sensor related interface
This will be used to expose the current GPU temperature, the
shader clock and eventually the memory clock (for non-APUs).
Signed-off-by: Samuel Pitoiset
---
include/drm/amdgpu_drm.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index 2be8b8dc..cd9c8223 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -534,6 +534,14 @@ struct drm_amdgpu_cs_chunk_data {
#define AMDGPU_INFO_VBIOS_IMAGE 0x2
/* Query UVD handles */
#define AMDGPU_INFO_NUM_HANDLES0x1C
+/* Query GPU sensor related information */
+#define AMDGPU_INFO_GPU_SENSOR 0x1D
+ /* Query the current shader clock */
+ #define AMDGPU_INFO_GPU_SENSOR_SCLK 0x1
+ /* Query the current memory clock */
+ #define AMDGPU_INFO_GPU_SENSOR_MCLK 0x2
+ /* Query the current temperature */
+ #define AMDGPU_INFO_GPU_SENSOR_TEMP 0x3
#define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0
#define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff
@@ -597,6 +605,10 @@ struct drm_amdgpu_info {
uint32_t type;
uint32_t offset;
} vbios_info;
+
+ struct {
+ uint32_t type;
+ } gpu_sensor_info;
};
};
--
2.11.1
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[PATCH libdrm 1/4] amdgpu: sync amdgpu_drm.h with the kernel
Signed-off-by: Samuel Pitoiset
---
include/drm/amdgpu_drm.h | 123 +++
1 file changed, 123 insertions(+)
diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index d8f24976..2be8b8dc 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -50,6 +50,8 @@ extern "C" {
#define DRM_AMDGPU_WAIT_CS 0x09
#define DRM_AMDGPU_GEM_OP 0x10
#define DRM_AMDGPU_GEM_USERPTR 0x11
+#define DRM_AMDGPU_WAIT_FENCES 0x12
+#define DRM_AMDGPU_FREESYNC0x14
#define DRM_IOCTL_AMDGPU_GEM_CREATEDRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
#define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)
@@ -63,6 +65,8 @@ extern "C" {
#define DRM_IOCTL_AMDGPU_WAIT_CS DRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_WAIT_CS, union drm_amdgpu_wait_cs)
#define DRM_IOCTL_AMDGPU_GEM_OPDRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_GEM_OP, struct drm_amdgpu_gem_op)
#define DRM_IOCTL_AMDGPU_GEM_USERPTR DRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_GEM_USERPTR, struct drm_amdgpu_gem_userptr)
+#define DRM_IOCTL_AMDGPU_WAIT_FENCES DRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_WAIT_FENCES, union drm_amdgpu_wait_fences)
+#define DRM_IOCTL_AMDGPU_FREESYNC DRM_IOWR(DRM_COMMAND_BASE +
DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
#define AMDGPU_GEM_DOMAIN_CPU 0x1
#define AMDGPU_GEM_DOMAIN_GTT 0x2
@@ -79,6 +83,10 @@ extern "C" {
#define AMDGPU_GEM_CREATE_CPU_GTT_USWC (1 << 2)
/* Flag that the memory should be in VRAM and cleared */
#define AMDGPU_GEM_CREATE_VRAM_CLEARED (1 << 3)
+/* Flag that create shadow bo(GTT) while allocating vram bo */
+#define AMDGPU_GEM_CREATE_SHADOW (1 << 4)
+/* Flag that allocating the BO should use linear VRAM */
+#define AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS (1 << 5)
struct drm_amdgpu_gem_create_in {
/** the requested memory size */
@@ -303,6 +311,32 @@ union drm_amdgpu_wait_cs {
struct drm_amdgpu_wait_cs_out out;
};
+struct drm_amdgpu_fence {
+ uint32_t ctx_id;
+ uint32_t ip_type;
+ uint32_t ip_instance;
+ uint32_t ring;
+ uint64_t seq_no;
+};
+
+struct drm_amdgpu_wait_fences_in {
+ /** This points to uint64_t * which points to fences */
+ uint64_t fences;
+ uint32_t fence_count;
+ uint32_t wait_all;
+ uint64_t timeout_ns;
+};
+
+struct drm_amdgpu_wait_fences_out {
+ uint32_t status;
+ uint32_t first_signaled;
+};
+
+union drm_amdgpu_wait_fences {
+ struct drm_amdgpu_wait_fences_in in;
+ struct drm_amdgpu_wait_fences_out out;
+};
+
#define AMDGPU_GEM_OP_GET_GEM_CREATE_INFO 0
#define AMDGPU_GEM_OP_SET_PLACEMENT1
@@ -329,6 +363,8 @@ struct drm_amdgpu_gem_op {
#define AMDGPU_VM_PAGE_WRITEABLE (1 << 2)
/* executable mapping, new for VI */
#define AMDGPU_VM_PAGE_EXECUTABLE (1 << 3)
+/* partially resident texture */
+#define AMDGPU_VM_PAGE_PRT (1 << 4)
struct drm_amdgpu_gem_va {
/** GEM object handle */
@@ -434,6 +470,7 @@ struct drm_amdgpu_cs_chunk_data {
*
*/
#define AMDGPU_IDS_FLAGS_FUSION 0x1
+#define AMDGPU_IDS_FLAGS_PREEMPTION 0x2
/* indicate if acceleration can be working */
#define AMDGPU_INFO_ACCEL_WORKING 0x00
@@ -483,6 +520,20 @@ struct drm_amdgpu_cs_chunk_data {
#define AMDGPU_INFO_DEV_INFO 0x16
/* visible vram usage */
#define AMDGPU_INFO_VIS_VRAM_USAGE 0x17
+/* number of TTM buffer evictions */
+#define AMDGPU_INFO_NUM_EVICTIONS 0x18
+/* Query memory about VRAM and GTT domains */
+#define AMDGPU_INFO_MEMORY 0x19
+/* Query vce clock table */
+#define AMDGPU_INFO_VCE_CLOCK_TABLE0x1A
+/* Query vbios related information */
+#define AMDGPU_INFO_VBIOS 0x1B
+ /* Subquery id: Query vbios size */
+ #define AMDGPU_INFO_VBIOS_SIZE 0x1
+ /* Subquery id: Query vbios image */
+ #define AMDGPU_INFO_VBIOS_IMAGE 0x2
+/* Query UVD handles */
+#define AMDGPU_INFO_NUM_HANDLES0x1C
#define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0
#define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff
@@ -541,6 +592,11 @@ struct drm_amdgpu_info {
} read_mmr_reg;
struct drm_amdgpu_query_fw query_fw;
+
+ struct {
+ uint32_t type;
+ uint32_t offset;
+ } vbios_info;
};
};
@@ -568,6 +624,34 @@ struct drm_amdgpu_info_vram_gtt {
uint64_t gtt_size;
};
+struct drm_amdgpu_heap_info {
+ /** max. physical memory */
+ uint64_t total_heap_size;
+
+ /** Theoretical max. available memory in the given heap */
+ uint64_t
[PATCH libdrm 4/4] Bump version for 2.4.76 release
For AMDGPU GPU sensor interface. Signed-off-by: Samuel Pitoiset --- configure.ac | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configure.ac b/configure.ac index 8e593324..8b2db691 100644 --- a/configure.ac +++ b/configure.ac @@ -20,7 +20,7 @@ AC_PREREQ([2.63]) AC_INIT([libdrm], -[2.4.75], +[2.4.76], [https://bugs.freedesktop.org/enter_bug.cgi?product=DRI], [libdrm]) -- 2.11.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH libdrm 3/4] amdgpu: allow to query GPU sensor related information
This exposes amdgpu_query_gpu_sensor_info().
Signed-off-by: Samuel Pitoiset
---
amdgpu/amdgpu.h | 19 +++
amdgpu/amdgpu_gpu_info.c | 15 +++
2 files changed, 34 insertions(+)
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 7b26a04c..b040f6ab 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -1059,6 +1059,25 @@ int amdgpu_query_gds_info(amdgpu_device_handle dev,
struct amdgpu_gds_resource_info *gds_info);
/**
+ * Query information about GPU sensor.
+ *
+ * The return size is query-specific and depends on the "sensor_type"
+ * parameter. No more than "size" bytes is returned.
+ *
+ * \param dev - \c [in] Device handle. See
#amdgpu_device_initialize()
+ * \param sensor_type - \c [in] AMDGPU_INFO_GPU_SENSOR_*
+ * \param size- \c [in] Size of the returned value.
+ * \param value - \c [out] Pointer to the return value.
+ *
+ * \return 0 on success\n
+ * <0 - Negative POSIX Error code
+ *
+*/
+int amdgpu_query_gpu_sensor_info(amdgpu_device_handle dev,
+unsigned sensor_type,
+unsigned size, void *value);
+
+/**
* Read a set of consecutive memory-mapped registers.
* Not all registers are allowed to be read by userspace.
*
diff --git a/amdgpu/amdgpu_gpu_info.c b/amdgpu/amdgpu_gpu_info.c
index 66c7e0e1..778c2ee1 100644
--- a/amdgpu/amdgpu_gpu_info.c
+++ b/amdgpu/amdgpu_gpu_info.c
@@ -314,3 +314,18 @@ int amdgpu_query_gds_info(amdgpu_device_handle dev,
return 0;
}
+
+int amdgpu_query_gpu_sensor_info(amdgpu_device_handle dev, unsigned
sensor_type,
+unsigned size, void *value)
+{
+ struct drm_amdgpu_info request;
+
+ memset(&request, 0, sizeof(request));
+ request.return_pointer = (uintptr_t)value;
+ request.return_size = size;
+ request.query = AMDGPU_INFO_GPU_SENSOR;
+ request.gpu_sensor_info.type = sensor_type;
+
+ return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request,
+ sizeof(struct drm_amdgpu_info));
+}
--
2.11.1
___
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[PATCH libdrm 0/4] libdrm: add new GPU sensor interface for AMDGPU
Hi, This series implements a new GPU sensor interface which will allow to query the current temperature and the shader/memory clocks via the GALLIUM_HUD. This adds the same functionality as the Radeon driver. The first patch of the series syncs amdgpu_drm.h with kernel headers. Branch is here: https://cgit.freedesktop.org/~hakzsam/drm/log/?h=si_clocks_temp Please review. Thanks! Samuel Pitoiset (4): amdgpu: sync amdgpu_drm.h with the kernel amdgpu: add new GPU sensor related interface amdgpu: allow to query GPU sensor related information Bump version for 2.4.76 release amdgpu/amdgpu.h | 19 +++ amdgpu/amdgpu_gpu_info.c | 15 ++ configure.ac | 2 +- include/drm/amdgpu_drm.h | 135 +++ 4 files changed, 170 insertions(+), 1 deletion(-) -- 2.11.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] nouveau: fix nv40_perfctr_next() cleanup regression
Reviewed-by: Samuel Pitoiset
On 03/14/2016 03:24 PM, Arnd Bergmann wrote:
> gcc-6 warns about code in the nouveau driver that is obviously silly:
>
> drivers/gpu/drm/nouveau/nvkm/engine/pm/nv40.c: In function
> 'nv40_perfctr_next':
> drivers/gpu/drm/nouveau/nvkm/engine/pm/nv40.c:62:19: warning: self-comparison
> always evaluats to false [-Wtautological-compare]
>if (pm->sequence != pm->sequence) {
>
> The behavior was accidentally introduced in a patch described as "This is
> purely preparation for upcoming commits, there should be no code changes
> here.".
> As far as I can tell, that was true for the rest of that patch except for
> this one function, which has been changed to a NOP.
>
> This patch restores the original behavior.
>
> Signed-off-by: Arnd Bergmann
> Fixes: 8c1aeaa13954 ("drm/nouveau/pm: cosmetic changes")
> ---
> drivers/gpu/drm/nouveau/nvkm/engine/pm/nv40.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/pm/nv40.c
> b/drivers/gpu/drm/nouveau/nvkm/engine/pm/nv40.c
> index 4bef72a9d106..3fda594700e0 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/engine/pm/nv40.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/engine/pm/nv40.c
> @@ -59,9 +59,11 @@ static void
> nv40_perfctr_next(struct nvkm_pm *pm, struct nvkm_perfdom *dom)
> {
> struct nvkm_device *device = pm->engine.subdev.device;
> - if (pm->sequence != pm->sequence) {
> + struct nv40_pm *nv40pm = container_of(pm, struct nv40_pm, base);
> +
> + if (nv40pm->sequence != pm->sequence) {
> nvkm_wr32(device, 0x400084, 0x0020);
> - pm->sequence = pm->sequence;
> + nv40pm->sequence = pm->sequence;
> }
> }
>
>
[Nouveau] [PATCH] [resend] nouveau: Disable AGP for SiS 761
This patch has been merged by Ben yesterday.
http://cgit.freedesktop.org/~darktama/nouveau/commit/?id=8c713f90a63ffca10d122af09d439f3409c933ed
Why do you send a new version ? Is the previous patch wrong?
On 09/30/2015 01:48 PM, Ondrej Zary wrote:
> SiS 761 chipset does not support AGP cards but has AGP capability (for
> the onboard video). At least PC Chips A31G board using this chipset has
> an AGP-like AGPro slot that's wired to the PCI bus. Enabling AGP will
> fail (GPU lockup and software fbcon, X11 hangs).
>
> Add support for matching just the host bridge in nvkm_device_agp_quirks
> and add entry for SiS 761 with mode 0 (AGP disabled).
>
> Signed-off-by: Ondrej Zary
> ---
> drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.c |8 ++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.c
> b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.c
> index 814cb51..385a90f 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.c
> @@ -35,6 +35,8 @@ static const struct nvkm_device_agp_quirk
> nvkm_device_agp_quirks[] = {
> /* VIA Apollo PRO133x / GeForce FX 5600 Ultra - fdo#20341 */
> { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_NVIDIA, 0x0311, 2 },
> + /* SiS 761 does not support AGP cards, use PCI mode */
> + { PCI_VENDOR_ID_SI, 0x0761, PCI_ANY_ID, PCI_ANY_ID, 0 },
> {},
> };
>
> @@ -137,8 +139,10 @@ nvkm_agp_ctor(struct nvkm_pci *pci)
> while (quirk->hostbridge_vendor) {
> if (info.device->vendor == quirk->hostbridge_vendor &&
> info.device->device == quirk->hostbridge_device &&
> - pci->pdev->vendor == quirk->chip_vendor &&
> - pci->pdev->device == quirk->chip_device) {
> + (quirk->chip_vendor == (u16)PCI_ANY_ID ||
> + pci->pdev->vendor == quirk->chip_vendor) &&
> + (quirk->chip_device == (u16)PCI_ANY_ID ||
> + pci->pdev->device == quirk->chip_device)) {
> nvkm_info(subdev, "forcing default agp mode to %dX, "
> "use NvAGP= to override\n",
> quirk->mode);
[PATCH] drm/nouveau: remove unused function
On 09/15/2015 09:45 AM, Sudip Mukherjee wrote: > On Wed, Sep 02, 2015 at 12:08:08PM +0530, Sudip Mukherjee wrote: >> coverity.com reported that memset was using a buffer of size 0, on >> checking the code it turned out that the function was not being used. So >> remove it. >> >> Signed-off-by: Sudip Mukherjee >> --- > A gentle ping. Good catch! Thanks for reporting this, but the commit message should be something like: "bios: remove unused nvbios_pmuTp() function" The next time, don't forget to send patches to nouveau at lists.freedesktop.org. ;) This patch is: Reviewed-by: Samuel Pitoiset > > regards > sudip > ___ > dri-devel mailing list > dri-devel at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] rnndb/dsi: Add more bits for DSI PHY
On 08/24/2015 10:16 PM, Rob Clark wrote: > On Mon, Aug 24, 2015 at 4:20 PM, Samuel Pitoiset > wrote: >> Hi Hai, >> >> I don't know what those bits are used for, but I'm a bit curious about how >> did you find them? >> >> Also, the next time don't forget to send patches related to envytools to >> nouveau at lists.freedesktop.org >> (or better send a pull request from github). > fwiw, those are actually for freedreno envytools ;-) Oh really? I have never heard about an envytools for freedreno! :) > > (although I suppose at some point we should maybe try to get it all > back into a single repo..) > > BR, > -R > >> Thanks. >> >> >> On 08/13/2015 11:44 PM, Hai Li wrote: >>> More registers and bit fields are added for PHY timings >>> and bitclk source selection. >>> >>> Signed-off-by: Hai Li >>> --- >>>rnndb/dsi/dsi.xml | 11 +-- >>>1 file changed, 9 insertions(+), 2 deletions(-) >>> >>> diff --git a/rnndb/dsi/dsi.xml b/rnndb/dsi/dsi.xml >>> index 02cfa3b..956f3ff 100644 >>> --- a/rnndb/dsi/dsi.xml >>> +++ b/rnndb/dsi/dsi.xml >>> @@ -217,6 +217,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ >>> rules-ng.xsd"> >>> >>> >>> >>> + >>> + >>> + >>> >>> >>> >>> @@ -437,7 +440,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ >>> rules-ng.xsd"> >>> >>> >>>- >>> + >>> + >>> + >>> >>> >>>@@ -608,7 +613,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ >>> rules-ng.xsd"> >>> >>> >>>- >>> + >>> + >>> + >>> >>> >>> >> >> ___ >> dri-devel mailing list >> dri-devel at lists.freedesktop.org >> http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] rnndb/dsi: Add more bits for DSI PHY
Hi Hai, I don't know what those bits are used for, but I'm a bit curious about how did you find them? Also, the next time don't forget to send patches related to envytools to nouveau at lists.freedesktop.org (or better send a pull request from github). Thanks. On 08/13/2015 11:44 PM, Hai Li wrote: > More registers and bit fields are added for PHY timings > and bitclk source selection. > > Signed-off-by: Hai Li > --- > rnndb/dsi/dsi.xml | 11 +-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/rnndb/dsi/dsi.xml b/rnndb/dsi/dsi.xml > index 02cfa3b..956f3ff 100644 > --- a/rnndb/dsi/dsi.xml > +++ b/rnndb/dsi/dsi.xml > @@ -217,6 +217,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ > rules-ng.xsd"> > > > > + > + > + > > > > @@ -437,7 +440,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ > rules-ng.xsd"> > > > > - > + > + > + > > > > @@ -608,7 +613,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ > rules-ng.xsd"> > > > > - > + > + > + > > >
[Nouveau] [PATCH 8/8] acpi: Use booleans when probing different _DSM types
On 05/26/2015 02:46 PM, Pierre Moreau wrote:
> I'm thinking of re-writing this patch to just OR the different returned
> retval and test for individual bits directly in the final conditionals.
> So this would give something like:
>
>
> int retval = 0;
>
> while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
> vga_count++;
> retval |= nouveau_dsm_pci_probe(pdev);
> }
> while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_3D << 8, pdev)) != NULL) {
> vga_count++;
> retval |= nouveau_dsm_pci_probe(pdev);
> }
>
> if (retval & NOUVEAU_DSM_HAS_OPT) {
> acpi_get_name(nouveau_dsm_priv.dhandle, ACPI_FULL_PATHNAME,
> &buffer);
> printk(KERN_INFO "VGA switcheroo: detected Optimus DSM method %s
> handle\n",
> acpi_method_name);
> nouveau_dsm_priv.optimus_detected = true;
> ret = true;
> } else if (vga_count == 2 && (retval & NOUVEAU_DSM_HAS_MUX) && guid_valid) {
> acpi_get_name(nouveau_dsm_priv.dhandle, ACPI_FULL_PATHNAME,
> &buffer);
> printk(KERN_INFO "VGA switcheroo: detected mux DSM switching method %s
> handle\n",
> acpi_method_name);
> nouveau_dsm_priv.mux_detected = true;
> ret = true;
> } else if (retval & NOUVEAU_DSM_HAS_GMUX) {
> acpi_get_name(nouveau_dsm_priv.dhandle, ACPI_FULL_PATHNAME,
> &buffer);
> printk(KERN_INFO "VGA switcheroo: detected gmux DSM switching method %s
> handle\n",
> acpi_method_name);
> nouveau_dsm_priv.gmux_detected = true;
> ret = true;
> }
>
>
> Any opinions on this?
If this improves readability of the code, go ahead.
>
> Pierre
>
> - Mail original -
>> Signed-off-by: Pierre Moreau
>> ---
>> drm/nouveau/nouveau_acpi.c | 14 +++---
>> 1 file changed, 7 insertions(+), 7 deletions(-)
>>
>> diff --git a/drm/nouveau/nouveau_acpi.c b/drm/nouveau/nouveau_acpi.c
>> index 3d6a1ea..5d63621 100644
>> --- a/drm/nouveau/nouveau_acpi.c
>> +++ b/drm/nouveau/nouveau_acpi.c
>> @@ -297,8 +297,8 @@ static bool nouveau_dsm_detect(void)
>> char acpi_method_name[255] = { 0 };
>> struct acpi_buffer buffer = {sizeof(acpi_method_name),
>> acpi_method_name};
>> struct pci_dev *pdev = NULL;
>> -int has_dsm = 0;
>> -int has_optimus = 0;
>> +bool has_mux = false;
>> +bool has_optimus = false;
>> bool has_gmux = false;
>> int vga_count = 0;
>> bool guid_valid;
>> @@ -317,9 +317,9 @@ static bool nouveau_dsm_detect(void)
>>
>> retval = nouveau_dsm_pci_probe(pdev);
>> if (retval & NOUVEAU_DSM_HAS_MUX)
>> -has_dsm |= 1;
>> +has_mux = true;
>> if (retval & NOUVEAU_DSM_HAS_OPT)
>> -has_optimus = 1;
>> +has_optimus = true;
>> if (retval & NOUVEAU_DSM_HAS_GMUX)
>> has_gmux = true;
>> }
>> @@ -329,9 +329,9 @@ static bool nouveau_dsm_detect(void)
>>
>> retval = nouveau_dsm_pci_probe(pdev);
>> if (retval & NOUVEAU_DSM_HAS_MUX)
>> -has_dsm |= 1;
>> +has_mux = true;
>> if (retval & NOUVEAU_DSM_HAS_OPT)
>> -has_optimus = 1;
>> +has_optimus = true;
>> if (retval & NOUVEAU_DSM_HAS_GMUX)
>> has_gmux = true;
>> }
>> @@ -344,7 +344,7 @@ static bool nouveau_dsm_detect(void)
>> acpi_method_name);
>> nouveau_dsm_priv.optimus_detected = true;
>> ret = true;
>> -} else if (vga_count == 2 && has_dsm && guid_valid) {
>> +} else if (vga_count == 2 && has_mux && guid_valid) {
>> acpi_get_name(nouveau_dsm_priv.dhandle, ACPI_FULL_PATHNAME,
>> &buffer);
>> printk(KERN_INFO "VGA switcheroo: detected mux DSM switching
>> method %s handle\n",
>> --
>> 2.4.1
>>
>> ___
>> dri-devel mailing list
>> dri-devel at lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/dri-devel
>>
> ___
> Nouveau mailing list
> Nouveau at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH 7/8] acpi: Add support for Apple Gmux _DMS
On 05/26/2015 12:22 AM, Pierre Moreau wrote:
> Signed-off-by: Pierre Moreau
> ---
> drm/nouveau/nouveau_acpi.c | 53
> --
> drm/nouveau/nouveau_acpi.h | 2 ++
> drm/nouveau/nouveau_drm.c | 6 --
> drm/nouveau/nouveau_vga.c | 10 +
> 4 files changed, 63 insertions(+), 8 deletions(-)
>
> diff --git a/drm/nouveau/nouveau_acpi.c b/drm/nouveau/nouveau_acpi.c
> index 104d291..3d6a1ea 100644
> --- a/drm/nouveau/nouveau_acpi.c
> +++ b/drm/nouveau/nouveau_acpi.c
> @@ -29,6 +29,10 @@
>
> #define NOUVEAU_DSM_OPTIMUS_SET_POWERDOWN
> (NOUVEAU_DSM_OPTIMUS_POWERDOWN_PS3 | NOUVEAU_DSM_OPTIMUS_FLAGS_CHANGED)
>
> +#define NOUVEAU_DSM_GMUX_V1_CAPS (3 << 6)
> +
> +#define NOUVEAU_DSM_GMUX_V2_CAPS (1 << 1)
> +
> /* result of the optimus caps function */
> #define OPTIMUS_ENABLED (1 << 0)
> #define OPTIMUS_STATUS_MASK (3 << 3)
> @@ -45,6 +49,7 @@
> static struct nouveau_dsm_priv {
> bool mux_detected;
> bool optimus_detected;
> + bool gmux_detected;
> acpi_handle dhandle;
> acpi_handle rom_handle;
> } nouveau_dsm_priv;
> @@ -57,8 +62,13 @@ bool nouveau_has_mux(void) {
> return nouveau_dsm_priv.mux_detected;
> }
>
> +bool nouveau_has_gmux(void) {
> + return nouveau_dsm_priv.gmux_detected;
> +}
> +
> #define NOUVEAU_DSM_HAS_MUX 0x1
> #define NOUVEAU_DSM_HAS_OPT 0x2
> +#define NOUVEAU_DSM_HAS_GMUX 0x4
>
> #ifdef CONFIG_VGA_SWITCHEROO
> static const uint32_t nouveau_mux_dsm_rid = 0x0102;
> @@ -73,6 +83,18 @@ static const char nouveau_op_dsm_muid[] = {
> 0xA7, 0x2B, 0x60, 0x42, 0xA6, 0xB5, 0xBE, 0xE0,
> };
>
> +static const uint32_t nouveau_gmux_v1_dsm_rid = 0x101;
> +static const char nouveau_gmux_v1_dsm_muid[] = {
> + 0xA6, 0x69, 0x86, 0x99, 0xE9, 0x8B, 0xFB, 0x49,
> + 0xBD, 0xDB, 0x51, 0xA1, 0xEF, 0xE1, 0x9C, 0x3D,
> +};
> +
> +static const uint32_t nouveau_gmux_v2_dsm_rid = 0x001;
> +static const char nouveau_gmux_v2_dsm_muid[] = {
> + 0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44,
> + 0xB0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B,
> +};
> +
> static int nouveau_evaluate_optimus_dsm(acpi_handle handle, int func, int
> arg, uint32_t *result)
> {
> int i;
> @@ -161,6 +183,17 @@ static int nouveau_evaluate_mux_dsm(acpi_handle handle,
> int func, int arg)
> return ret;
> }
>
> +static int nouveau_check_gmux_dsm(acpi_handle handle)
> +{
> + bool has_v1 = acpi_check_dsm(handle, nouveau_gmux_v1_dsm_muid,
> + nouveau_gmux_v1_dsm_rid,
> + NOUVEAU_DSM_GMUX_V1_CAPS);
> + bool has_v2 = acpi_check_dsm(handle, nouveau_gmux_v2_dsm_muid,
> + nouveau_gmux_v2_dsm_rid,
> + NOUVEAU_DSM_GMUX_V2_CAPS);
> + return has_v1 || has_v2;
> +}
> +
> static int nouveau_dsm_switch_mux(acpi_handle handle, int mux_id)
> {
> mxm_wmi_call_mxmx(mux_id == NOUVEAU_DSM_MUX_LED_STAMINA ?
> MXM_MXDS_ADAPTER_IGD : MXM_MXDS_ADAPTER_0);
> @@ -238,6 +271,9 @@ static int nouveau_dsm_pci_probe(struct pci_dev *pdev)
> 1 << NOUVEAU_DSM_MUX_POWER))
> retval |= NOUVEAU_DSM_HAS_MUX;
>
> + if (nouveau_check_gmux_dsm(dhandle))
> + retval |= NOUVEAU_DSM_HAS_GMUX;
> +
> if (nouveau_check_optimus_dsm(dhandle))
> retval |= NOUVEAU_DSM_HAS_OPT;
>
> @@ -263,6 +299,7 @@ static bool nouveau_dsm_detect(void)
> struct pci_dev *pdev = NULL;
> int has_dsm = 0;
> int has_optimus = 0;
> + bool has_gmux = false;
> int vga_count = 0;
> bool guid_valid;
> int retval;
> @@ -283,6 +320,8 @@ static bool nouveau_dsm_detect(void)
> has_dsm |= 1;
> if (retval & NOUVEAU_DSM_HAS_OPT)
> has_optimus = 1;
> + if (retval & NOUVEAU_DSM_HAS_GMUX)
> + has_gmux = true;
> }
>
> while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_3D << 8, pdev)) != NULL)
> {
> @@ -293,9 +332,11 @@ static bool nouveau_dsm_detect(void)
> has_dsm |= 1;
> if (retval & NOUVEAU_DSM_HAS_OPT)
> has_optimus = 1;
> + if (retval & NOUVEAU_DSM_HAS_GMUX)
> + has_gmux = true;
> }
>
> - /* find the optimus DSM or the mux DSM */
> + /* find the optimus DSM, the mux DSM or the gmux DSM */
> if (has_optimus == 1) {
> acpi_get_name(nouveau_dsm_priv.dhandle, ACPI_FULL_PATHNAME,
> &buffer);
> @@ -310,6 +351,13 @@ static bool nouveau_dsm_detect(void)
> acpi_method_name);
> nouveau_dsm_priv.mux_detected = true;
> ret = true;
> + } else if (has_gmux) {
> + acpi_get_name(nouveau_dsm_priv.dhandle, ACPI_FULL_PATHNAME,
> + &buffer);
> + printk(KE
[Nouveau] [PATCH 5/8] acpi: Check returned object type by Optimus _DSM locally
On 05/26/2015 12:22 AM, Pierre Moreau wrote:
> Most _DSM will return an integer value of 0x8002 when given an unknown
> UUID, revision ID or function ID. Checking locally allows us to differentiate
> that case from other ACPI errors, and to not report a "failed to evaluate
> _DSM"
> if 0x8002 is returned which was confusing.
>
> Signed-off-by: Pierre Moreau
> ---
> drm/nouveau/nouveau_acpi.c | 15 ---
> 1 file changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/drm/nouveau/nouveau_acpi.c b/drm/nouveau/nouveau_acpi.c
> index 073f7d7..7aeaf7d 100644
> --- a/drm/nouveau/nouveau_acpi.c
> +++ b/drm/nouveau/nouveau_acpi.c
> @@ -88,12 +88,12 @@ static int nouveau_evaluate_optimus_dsm(acpi_handle
> handle, int func, int arg, u
> for (i = 0; i < 4; i++)
> args_buff[i] = (arg >> i * 8) & 0xFF;
>
> - obj = acpi_evaluate_dsm_typed(handle, nouveau_op_dsm_muid,
> nouveau_op_dsm_rid,
> - func, &argv4, ACPI_TYPE_BUFFER);
> + obj = acpi_evaluate_dsm(handle, nouveau_op_dsm_muid, nouveau_op_dsm_rid,
> + func, &argv4);
> if (!obj) {
> acpi_handle_info(handle, "failed to evaluate _DSM\n");
> return AE_ERROR;
> - } else {
> + } else if (obj->type == ACPI_TYPE_BUFFER) {
> if (!result && obj->buffer.length == 4) {
> *result = obj->buffer.pointer[0];
> *result |= (obj->buffer.pointer[1] << 8);
> @@ -101,6 +101,15 @@ static int nouveau_evaluate_optimus_dsm(acpi_handle
> handle, int func, int arg, u
> *result |= (obj->buffer.pointer[3] << 24);
> }
> ACPI_FREE(obj);
> + } else if (obj->type == ACPI_TYPE_INTEGER &&
> +obj->integer.value == 0x8002) {
> + acpi_handle_debug(handle, "failed to query Optimus _DSM\n");
> + ACPI_FREE(obj);
> + return -ENODEV;
> + } else {
> + acpi_handle_err(handle, "unexpected returned value by Optimus
> _DSM\n");
> + ACPI_FREE(obj);
> + return AE_ERROR;
> }
>
> return 0;
How do you handle the case where result is NULL and the type is
ACPI_TYPE_BUFFER ?
Because you don't return any error. Is that expected?
[Nouveau] [PATCH 4/8] acpi: Allow evaluate_optimus_dsm to take NULL results
On 05/26/2015 12:22 AM, Pierre Moreau wrote:
> Signed-off-by: Pierre Moreau
> ---
> drm/nouveau/nouveau_acpi.c | 10 --
> 1 file changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/drm/nouveau/nouveau_acpi.c b/drm/nouveau/nouveau_acpi.c
> index 36f4a40..073f7d7 100644
> --- a/drm/nouveau/nouveau_acpi.c
> +++ b/drm/nouveau/nouveau_acpi.c
> @@ -88,15 +88,14 @@ static int nouveau_evaluate_optimus_dsm(acpi_handle
> handle, int func, int arg, u
> for (i = 0; i < 4; i++)
> args_buff[i] = (arg >> i * 8) & 0xFF;
>
> - *result = 0;
> obj = acpi_evaluate_dsm_typed(handle, nouveau_op_dsm_muid,
> nouveau_op_dsm_rid,
> func, &argv4, ACPI_TYPE_BUFFER);
> if (!obj) {
> acpi_handle_info(handle, "failed to evaluate _DSM\n");
> return AE_ERROR;
> } else {
> - if (obj->buffer.length == 4) {
> - *result |= obj->buffer.pointer[0];
> + if (!result && obj->buffer.length == 4) {
> + *result = obj->buffer.pointer[0];
segfault here if result is NULL! ;)
> *result |= (obj->buffer.pointer[1] << 8);
> *result |= (obj->buffer.pointer[2] << 16);
> *result |= (obj->buffer.pointer[3] << 24);
> @@ -322,18 +321,17 @@ void nouveau_register_dsm_handler(void)
> /* Must be called for Optimus models before the card can be turned off */
> void nouveau_switcheroo_optimus_dsm(void)
> {
> - u32 result = 0;
> if (!nouveau_dsm_priv.optimus_detected)
> return;
>
> nouveau_evaluate_optimus_dsm(nouveau_dsm_priv.dhandle,
>NOUVEAU_DSM_OPTIMUS_FLAGS,
> - 0x3, &result);
> + 0x3, NULL);
>
> nouveau_evaluate_optimus_dsm(nouveau_dsm_priv.dhandle,
>NOUVEAU_DSM_OPTIMUS_CAPS,
>NOUVEAU_DSM_OPTIMUS_SET_POWERDOWN,
> - &result);
> + NULL);
>
> }
>
[Nouveau] [PATCH 2/8] acpi: Add evaluate to functons evaluating _DSM
s/functons/functions in the commit message.
On 05/26/2015 12:22 AM, Pierre Moreau wrote:
> This makes it clearer when reading the function name, as well as following the
> names of the related ACPI function.
>
> Signed-off-by: Pierre Moreau
> ---
> drm/nouveau/nouveau_acpi.c | 25 ++---
> 1 file changed, 14 insertions(+), 11 deletions(-)
>
> diff --git a/drm/nouveau/nouveau_acpi.c b/drm/nouveau/nouveau_acpi.c
> index 4a48e21..1f18018 100644
> --- a/drm/nouveau/nouveau_acpi.c
> +++ b/drm/nouveau/nouveau_acpi.c
> @@ -71,7 +71,7 @@ static const char nouveau_op_dsm_muid[] = {
> 0xA7, 0x2B, 0x60, 0x42, 0xA6, 0xB5, 0xBE, 0xE0,
> };
>
> -static int nouveau_optimus_dsm(acpi_handle handle, int func, int arg,
> uint32_t *result)
> +static int nouveau_evaluate_optimus_dsm(acpi_handle handle, int func, int
> arg, uint32_t *result)
> {
> int i;
> union acpi_object *obj;
> @@ -118,7 +118,7 @@ static int nouveau_check_optimus_dsm(acpi_handle handle)
>* Function 0 returns a Buffer containing available functions.
>* The args parameter is ignored for function 0, so just put 0 in it
>*/
> - if (nouveau_optimus_dsm(handle, 0, 0, &result))
> + if (nouveau_evaluate_optimus_dsm(handle, 0, 0, &result))
> return 0;
>
> /*
> @@ -128,7 +128,7 @@ static int nouveau_check_optimus_dsm(acpi_handle handle)
> return result & 1 && result & (1 << NOUVEAU_DSM_OPTIMUS_CAPS);
> }
>
> -static int nouveau_mux_dsm(acpi_handle handle, int func, int arg)
> +static int nouveau_evaluate_mux_dsm(acpi_handle handle, int func, int arg)
> {
> int ret = 0;
> union acpi_object *obj;
> @@ -155,7 +155,7 @@ static int nouveau_dsm_switch_mux(acpi_handle handle, int
> mux_id)
> {
> mxm_wmi_call_mxmx(mux_id == NOUVEAU_DSM_MUX_LED_STAMINA ?
> MXM_MXDS_ADAPTER_IGD : MXM_MXDS_ADAPTER_0);
> mxm_wmi_call_mxds(mux_id == NOUVEAU_DSM_MUX_LED_STAMINA ?
> MXM_MXDS_ADAPTER_IGD : MXM_MXDS_ADAPTER_0);
> - return nouveau_mux_dsm(handle, NOUVEAU_DSM_MUX_LED, mux_id);
> + return nouveau_evaluate_mux_dsm(handle, NOUVEAU_DSM_MUX_LED, mux_id);
> }
>
> static int nouveau_dsm_set_discrete_state(acpi_handle handle, enum
> vga_switcheroo_state state)
> @@ -165,7 +165,7 @@ static int nouveau_dsm_set_discrete_state(acpi_handle
> handle, enum vga_switchero
> arg = NOUVEAU_DSM_MUX_POWER_SPEED;
> else
> arg = NOUVEAU_DSM_MUX_POWER_STAMINA;
> - nouveau_mux_dsm(handle, NOUVEAU_DSM_MUX_POWER, arg);
> + nouveau_evaluate_mux_dsm(handle, NOUVEAU_DSM_MUX_POWER, arg);
> return 0;
> }
>
> @@ -233,8 +233,8 @@ static int nouveau_dsm_pci_probe(struct pci_dev *pdev)
>
> if (retval & NOUVEAU_DSM_HAS_OPT) {
> uint32_t result;
> - nouveau_optimus_dsm(dhandle, NOUVEAU_DSM_OPTIMUS_CAPS, 0,
> - &result);
> + nouveau_evaluate_optimus_dsm(dhandle, NOUVEAU_DSM_OPTIMUS_CAPS,
> + 0, &result);
> dev_info(&pdev->dev, "optimus capabilities: %s, status %s%s\n",
>(result & OPTIMUS_ENABLED) ? "enabled" : "disabled",
>(result & OPTIMUS_DYNAMIC_PWR_CAP) ? "dynamic power, "
> : "",
> @@ -324,11 +324,14 @@ void nouveau_switcheroo_optimus_dsm(void)
> if (!nouveau_dsm_priv.optimus_detected)
> return;
>
> - nouveau_optimus_dsm(nouveau_dsm_priv.dhandle, NOUVEAU_DSM_OPTIMUS_FLAGS,
> - 0x3, &result);
> + nouveau_evaluate_optimus_dsm(nouveau_dsm_priv.dhandle,
> + NOUVEAU_DSM_OPTIMUS_FLAGS,
> + 0x3, &result);
>
> - nouveau_optimus_dsm(nouveau_dsm_priv.dhandle, NOUVEAU_DSM_OPTIMUS_CAPS,
> - NOUVEAU_DSM_OPTIMUS_SET_POWERDOWN, &result);
> + nouveau_evaluate_optimus_dsm(nouveau_dsm_priv.dhandle,
> + NOUVEAU_DSM_OPTIMUS_CAPS,
> + NOUVEAU_DSM_OPTIMUS_SET_POWERDOWN,
> + &result);
>
> }
>
[PATCH] drm: nouveau: core: engine: perfmon: base: Remove unused function
Hi Rickard,
Thanks for submitting this patch, but I already submitted the same a few
weeks ago. :-)
This function will be removed when I will submit my work on this area.
Greetings,
Samuel Pitoiset.
On 01/11/2015 07:12 PM, Rickard Strandqvist wrote:
> Remove the function nouveau_perfsig_wrap() that is not used anywhere.
>
> This was partially found by using a static code analysis program called
> cppcheck.
>
> Signed-off-by: Rickard Strandqvist
> ---
> drivers/gpu/drm/nouveau/core/engine/perfmon/base.c | 20
>
> drivers/gpu/drm/nouveau/core/engine/perfmon/priv.h |5 -
> 2 files changed, 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/nouveau/core/engine/perfmon/base.c
> b/drivers/gpu/drm/nouveau/core/engine/perfmon/base.c
> index 6301381..d0c5255 100644
> --- a/drivers/gpu/drm/nouveau/core/engine/perfmon/base.c
> +++ b/drivers/gpu/drm/nouveau/core/engine/perfmon/base.c
> @@ -80,26 +80,6 @@ nouveau_perfsig_find(struct nouveau_perfmon *ppm, const
> char *name, u32 size,
> return nouveau_perfsig_find_(dom, name, size);
> }
>
> -struct nouveau_perfctr *
> -nouveau_perfsig_wrap(struct nouveau_perfmon *ppm, const char *name,
> - struct nouveau_perfdom **pdom)
> -{
> - struct nouveau_perfsig *sig;
> - struct nouveau_perfctr *ctr;
> -
> - sig = nouveau_perfsig_find(ppm, name, strlen(name), pdom);
> - if (!sig)
> - return NULL;
> -
> - ctr = kzalloc(sizeof(*ctr), GFP_KERNEL);
> - if (ctr) {
> - ctr->signal[0] = sig;
> - ctr->logic_op = 0x;
> - }
> -
> - return ctr;
> -}
> -
>
> /***
>* Perfmon object classes
>
> **/
> diff --git a/drivers/gpu/drm/nouveau/core/engine/perfmon/priv.h
> b/drivers/gpu/drm/nouveau/core/engine/perfmon/priv.h
> index 0ac8714..1a0989e 100644
> --- a/drivers/gpu/drm/nouveau/core/engine/perfmon/priv.h
> +++ b/drivers/gpu/drm/nouveau/core/engine/perfmon/priv.h
> @@ -30,11 +30,6 @@ struct nouveau_perfsig {
> const char *name;
> };
>
> -struct nouveau_perfdom;
> -struct nouveau_perfctr *
> -nouveau_perfsig_wrap(struct nouveau_perfmon *, const char *,
> - struct nouveau_perfdom **);
> -
> struct nouveau_specdom {
> u16 signal_nr;
> const struct nouveau_specsig *signal;
