subject:"\[PATCH v6 6\/8\] Documentation\: bindings\: add dt documentation for rk3399 dmc"

[PATCH v6 6/8] Documentation: bindings: add dt documentation for rk3399 dmc

2016-08-24 Thread hl

Hi Chanwoo Choi,


On 2016å¹´08æ23æ¥ 13:05, Chanwoo Choi wrote:
> Hi Lin,
>
> On 2016ë 08ì 22ì¼ 07:16, hl wrote:
>> Hi Chanwoo Choi,
>>
>> On 2016å¹´08æ17æ¥ 12:50, Chanwoo Choi wrote:
>>> Hi Lin,
>>>
>>> On 2016ë 08ì 17ì¼ 07:36, Lin Huang wrote:
 This patch adds the documentation for rockchip rk3399 dmc driver.

 Signed-off-by: Lin Huang 
 ---
 Changes in v6:
 -Add more detail in Documentation

 Changes in v5:
 -None

 Changes in v4:
 -None

 Changes in v3:
 -None

 Changes in v2:
 -None

 Changes in v1:
 -None
.../devicetree/bindings/devfreq/rk3399_dmc.txt | 84 
 ++
1 file changed, 84 insertions(+)
create mode 100644 
 Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt

 diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt 
 b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
 new file mode 100644
 index 000..e73067c
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
 @@ -0,0 +1,84 @@
 +* Rockchip rk3399 DMC(Dynamic Memory Controller) device
 +
 +Required properties:
 +- compatible: Must be "rockchip,rk3399-dmc".
 +- devfreq-events: Node to get ddr loading, Refer to
 +  Documentation/devicetree/bindings/devfreq/rockchip-dif.txt
 +- interrupts: The interrupt number to the cpu. The interrupt specifier 
 format
 +  depends on the interrupt controller. it should be dcf 
 interrupts,
 +  when ddr dvfs finish, it will happen.
>>> If possible, you better to keep the indentation with other properties.
>>> s/it->It, dcf->DCF, ddr->DDR
>>>
>>>
 +- clocks: Phandles for clock specified in "clock-names" property
 +- clock-names : The name of clock used by the DFI, must be "pclk_ddr_mon";
 +- operating-points-v2: Refer to 
 Documentation/devicetree/bindings/power/opp.txt
 +   for details.
>>> ditto.
>>>
 +- center-supply: Dmc supply node.
>>> s/Dmc/DMC becaue DMC an abbreviation.
>>>
 +- status: Marks the node enabled/disabled.
 +
 +Optional properties:
 +- ddr_timing: ddr timing need to pass to arm trust firmware
 +- upthreshold: the upthreshold to simpleondeamnd policy
 +- downdifferential: The downdifferential to simpleondeamnd policy
 +
 +Example:
 +ddr_timing: ddr_timing {
 +compatible = "rockchip,ddr-timing";
>>> I can't find the 'rockchip,ddr-timing' driver on linux-next git repo 
>>> (20160816).
>>> If ddr_timing includes the only properties for ddr_timing,
>>> I recommend you make the separate a .dtsi file including
>>> the ddr timing configuration. I add the reference and an example on below.
>>>
 +ddr3_speed_bin = <21>;
 +pd_idle = <0>;
 +sr_idle = <0>;
 +sr_mc_gate_idle = <0>;
 +srpd_lite_idle= <0>;
 +standby_idle = <0>;
 +dram_dll_dis_freq = <300>;
 +phy_dll_dis_freq = <125>;
 +
 +ddr3_odt_dis_freq = <333>;
 +ddr3_drv = ;
 +ddr3_odt = ;
 +phy_ddr3_ca_drv = ;
 +phy_ddr3_dq_drv = ;
 +phy_ddr3_odt = ;
 +
 +lpddr3_odt_dis_freq = <333>;
 +lpddr3_drv = ;
 +lpddr3_odt = ;
 +phy_lpddr3_ca_drv = ;
 +phy_lpddr3_dq_drv = ;
 +phy_lpddr3_odt = ;
 +
 +lpddr4_odt_dis_freq = <333>;
 +lpddr4_drv = ;
 +lpddr4_dq_odt = ;
 +lpddr4_ca_odt = ;
 +phy_lpddr4_ca_drv = ;
 +phy_lpddr4_ck_cs_drv = ;
 +phy_lpddr4_dq_drv = ;
 +phy_lpddr4_odt = ;
 +};
 +
 +dmc_opp_table: dmc_opp_table {
 +compatible = "operating-points-v2";
 +
 +opp00 {
 +opp-hz = /bits/ 64 <3>;
 +opp-microvolt = <90>;
 +};
 +opp01 {
 +opp-hz = /bits/ 64 <66600>;
 +opp-microvolt = <90>;
 +};
 +};
 +
 +dmc: dmc {
 +compatible = "rockchip,rk3399-dmc";
 +devfreq-events = <&dfi>;
 +interrupts = ;
 +clocks = <&cru SCLK_DDRCLK>;
 +clock-names = "dmc_clk";
 +ddr_timing = <&ddr_timing>;
>>> You can use the following '#include' instead of 'ddr_timing'
>>> because the ddr_timing is not a device driver. Instead,
>>> the rk3399-dmc must need the ddr timing configuration.
>>>
>>>  #include "rk3399-dmc-timing-conf.dtsi"
>>>
>>> You can refer the similar usage case[1].
>>> The *.conf.dtsi is used on exynos3250 tmu dt node[2].
>>>
>>> [1] arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi
>>> [2] arch/arm/boot/dts/exynos3250.dtsi, 224 line.
>>>
 +operating-points-v2 =

[PATCH v6 6/8] Documentation: bindings: add dt documentation for rk3399 dmc

2016-08-23 Thread Chanwoo Choi

Hi Lin,

On 2016ë 08ì 22ì¼ 07:16, hl wrote:
> Hi Chanwoo Choi,
> 
> On 2016å¹´08æ17æ¥ 12:50, Chanwoo Choi wrote:
>> Hi Lin,
>>
>> On 2016ë 08ì 17ì¼ 07:36, Lin Huang wrote:
>>> This patch adds the documentation for rockchip rk3399 dmc driver.
>>>
>>> Signed-off-by: Lin Huang 
>>> ---
>>> Changes in v6:
>>> -Add more detail in Documentation
>>>
>>> Changes in v5:
>>> -None
>>>
>>> Changes in v4:
>>> -None
>>>
>>> Changes in v3:
>>> -None
>>>
>>> Changes in v2:
>>> -None
>>>
>>> Changes in v1:
>>> -None
>>>   .../devicetree/bindings/devfreq/rk3399_dmc.txt | 84 
>>> ++
>>>   1 file changed, 84 insertions(+)
>>>   create mode 100644 
>>> Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt 
>>> b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
>>> new file mode 100644
>>> index 000..e73067c
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
>>> @@ -0,0 +1,84 @@
>>> +* Rockchip rk3399 DMC(Dynamic Memory Controller) device
>>> +
>>> +Required properties:
>>> +- compatible: Must be "rockchip,rk3399-dmc".
>>> +- devfreq-events: Node to get ddr loading, Refer to
>>> +  Documentation/devicetree/bindings/devfreq/rockchip-dif.txt
>>> +- interrupts: The interrupt number to the cpu. The interrupt specifier 
>>> format
>>> +  depends on the interrupt controller. it should be dcf interrupts,
>>> +  when ddr dvfs finish, it will happen.
>> If possible, you better to keep the indentation with other properties.
>> s/it->It, dcf->DCF, ddr->DDR
>>
>>
>>> +- clocks: Phandles for clock specified in "clock-names" property
>>> +- clock-names : The name of clock used by the DFI, must be "pclk_ddr_mon";
>>> +- operating-points-v2: Refer to 
>>> Documentation/devicetree/bindings/power/opp.txt
>>> +   for details.
>> ditto.
>>
>>> +- center-supply: Dmc supply node.
>> s/Dmc/DMC becaue DMC an abbreviation.
>>
>>> +- status: Marks the node enabled/disabled.
>>> +
>>> +Optional properties:
>>> +- ddr_timing: ddr timing need to pass to arm trust firmware
>>> +- upthreshold: the upthreshold to simpleondeamnd policy
>>> +- downdifferential: The downdifferential to simpleondeamnd policy
>>> +
>>> +Example:
>>> +ddr_timing: ddr_timing {
>>> +compatible = "rockchip,ddr-timing";
>> I can't find the 'rockchip,ddr-timing' driver on linux-next git repo 
>> (20160816).
>> If ddr_timing includes the only properties for ddr_timing,
>> I recommend you make the separate a .dtsi file including
>> the ddr timing configuration. I add the reference and an example on below.
>>
>>> +ddr3_speed_bin = <21>;
>>> +pd_idle = <0>;
>>> +sr_idle = <0>;
>>> +sr_mc_gate_idle = <0>;
>>> +srpd_lite_idle= <0>;
>>> +standby_idle = <0>;
>>> +dram_dll_dis_freq = <300>;
>>> +phy_dll_dis_freq = <125>;
>>> +
>>> +ddr3_odt_dis_freq = <333>;
>>> +ddr3_drv = ;
>>> +ddr3_odt = ;
>>> +phy_ddr3_ca_drv = ;
>>> +phy_ddr3_dq_drv = ;
>>> +phy_ddr3_odt = ;
>>> +
>>> +lpddr3_odt_dis_freq = <333>;
>>> +lpddr3_drv = ;
>>> +lpddr3_odt = ;
>>> +phy_lpddr3_ca_drv = ;
>>> +phy_lpddr3_dq_drv = ;
>>> +phy_lpddr3_odt = ;
>>> +
>>> +lpddr4_odt_dis_freq = <333>;
>>> +lpddr4_drv = ;
>>> +lpddr4_dq_odt = ;
>>> +lpddr4_ca_odt = ;
>>> +phy_lpddr4_ca_drv = ;
>>> +phy_lpddr4_ck_cs_drv = ;
>>> +phy_lpddr4_dq_drv = ;
>>> +phy_lpddr4_odt = ;
>>> +};
>>> +
>>> +dmc_opp_table: dmc_opp_table {
>>> +compatible = "operating-points-v2";
>>> +
>>> +opp00 {
>>> +opp-hz = /bits/ 64 <3>;
>>> +opp-microvolt = <90>;
>>> +};
>>> +opp01 {
>>> +opp-hz = /bits/ 64 <66600>;
>>> +opp-microvolt = <90>;
>>> +};
>>> +};
>>> +
>>> +dmc: dmc {
>>> +compatible = "rockchip,rk3399-dmc";
>>> +devfreq-events = <&dfi>;
>>> +interrupts = ;
>>> +clocks = <&cru SCLK_DDRCLK>;
>>> +clock-names = "dmc_clk";
>>> +ddr_timing = <&ddr_timing>;
>> You can use the following '#include' instead of 'ddr_timing'
>> because the ddr_timing is not a device driver. Instead,
>> the rk3399-dmc must need the ddr timing configuration.
>>
>> #include "rk3399-dmc-timing-conf.dtsi"
>>
>> You can refer the similar usage case[1].
>> The *.conf.dtsi is used on exynos3250 tmu dt node[2].
>>
>> [1] arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi
>> [2] arch/arm/boot/dts/exynos3250.dtsi, 224 line.
>>
>>> +operating-points-v2 = <&dmc_opp_table>;
>>> +center-supply = <&ppvar_centerlogic>;
>>> +upthreshold = <15>;
>>> +downdifferential = <10>;
>>> +status = "disabled";
>>> +};
>>> +
>>>
>> For example,
>> I think that

[PATCH v6 6/8] Documentation: bindings: add dt documentation for rk3399 dmc

2016-08-22 Thread hl

Hi Chanwoo Choi,

On 2016å¹´08æ17æ¥ 12:50, Chanwoo Choi wrote:
> Hi Lin,
>
> On 2016ë 08ì 17ì¼ 07:36, Lin Huang wrote:
>> This patch adds the documentation for rockchip rk3399 dmc driver.
>>
>> Signed-off-by: Lin Huang 
>> ---
>> Changes in v6:
>> -Add more detail in Documentation
>>
>> Changes in v5:
>> -None
>>
>> Changes in v4:
>> -None
>>
>> Changes in v3:
>> -None
>>
>> Changes in v2:
>> -None
>>
>> Changes in v1:
>> -None
>>   .../devicetree/bindings/devfreq/rk3399_dmc.txt | 84 
>> ++
>>   1 file changed, 84 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
>>
>> diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt 
>> b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
>> new file mode 100644
>> index 000..e73067c
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
>> @@ -0,0 +1,84 @@
>> +* Rockchip rk3399 DMC(Dynamic Memory Controller) device
>> +
>> +Required properties:
>> +- compatible: Must be "rockchip,rk3399-dmc".
>> +- devfreq-events: Node to get ddr loading, Refer to
>> +  Documentation/devicetree/bindings/devfreq/rockchip-dif.txt
>> +- interrupts: The interrupt number to the cpu. The interrupt specifier 
>> format
>> +  depends on the interrupt controller. it should be dcf interrupts,
>> +  when ddr dvfs finish, it will happen.
> If possible, you better to keep the indentation with other properties.
> s/it->It, dcf->DCF, ddr->DDR
>
>
>> +- clocks: Phandles for clock specified in "clock-names" property
>> +- clock-names : The name of clock used by the DFI, must be "pclk_ddr_mon";
>> +- operating-points-v2: Refer to 
>> Documentation/devicetree/bindings/power/opp.txt
>> +   for details.
> ditto.
>
>> +- center-supply: Dmc supply node.
> s/Dmc/DMC becaue DMC an abbreviation.
>
>> +- status: Marks the node enabled/disabled.
>> +
>> +Optional properties:
>> +- ddr_timing: ddr timing need to pass to arm trust firmware
>> +- upthreshold: the upthreshold to simpleondeamnd policy
>> +- downdifferential: The downdifferential to simpleondeamnd policy
>> +
>> +Example:
>> +ddr_timing: ddr_timing {
>> +compatible = "rockchip,ddr-timing";
> I can't find the 'rockchip,ddr-timing' driver on linux-next git repo 
> (20160816).
> If ddr_timing includes the only properties for ddr_timing,
> I recommend you make the separate a .dtsi file including
> the ddr timing configuration. I add the reference and an example on below.
>
>> +ddr3_speed_bin = <21>;
>> +pd_idle = <0>;
>> +sr_idle = <0>;
>> +sr_mc_gate_idle = <0>;
>> +srpd_lite_idle  = <0>;
>> +standby_idle = <0>;
>> +dram_dll_dis_freq = <300>;
>> +phy_dll_dis_freq = <125>;
>> +
>> +ddr3_odt_dis_freq = <333>;
>> +ddr3_drv = ;
>> +ddr3_odt = ;
>> +phy_ddr3_ca_drv = ;
>> +phy_ddr3_dq_drv = ;
>> +phy_ddr3_odt = ;
>> +
>> +lpddr3_odt_dis_freq = <333>;
>> +lpddr3_drv = ;
>> +lpddr3_odt = ;
>> +phy_lpddr3_ca_drv = ;
>> +phy_lpddr3_dq_drv = ;
>> +phy_lpddr3_odt = ;
>> +
>> +lpddr4_odt_dis_freq = <333>;
>> +lpddr4_drv = ;
>> +lpddr4_dq_odt = ;
>> +lpddr4_ca_odt = ;
>> +phy_lpddr4_ca_drv = ;
>> +phy_lpddr4_ck_cs_drv = ;
>> +phy_lpddr4_dq_drv = ;
>> +phy_lpddr4_odt = ;
>> +};
>> +
>> +dmc_opp_table: dmc_opp_table {
>> +compatible = "operating-points-v2";
>> +
>> +opp00 {
>> +opp-hz = /bits/ 64 <3>;
>> +opp-microvolt = <90>;
>> +};
>> +opp01 {
>> +opp-hz = /bits/ 64 <66600>;
>> +opp-microvolt = <90>;
>> +};
>> +};
>> +
>> +dmc: dmc {
>> +compatible = "rockchip,rk3399-dmc";
>> +devfreq-events = <&dfi>;
>> +interrupts = ;
>> +clocks = <&cru SCLK_DDRCLK>;
>> +clock-names = "dmc_clk";
>> +ddr_timing = <&ddr_timing>;
> You can use the following '#include' instead of 'ddr_timing'
> because the ddr_timing is not a device driver. Instead,
> the rk3399-dmc must need the ddr timing configuration.
>
>   #include "rk3399-dmc-timing-conf.dtsi"
>
> You can refer the similar usage case[1].
> The *.conf.dtsi is used on exynos3250 tmu dt node[2].
>
> [1] arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi
> [2] arch/arm/boot/dts/exynos3250.dtsi, 224 line.
>
>> +operating-points-v2 = <&dmc_opp_table>;
>> +center-supply = <&ppvar_centerlogic>;
>> +upthreshold = <15>;
>> +downdifferential = <10>;
>> +status = "disabled";
>> +};
>> +
>>
> For example,
>

[PATCH v6 6/8] Documentation: bindings: add dt documentation for rk3399 dmc

2016-08-17 Thread Chanwoo Choi

Hi Lin,

On 2016ë 08ì 17ì¼ 07:36, Lin Huang wrote:
> This patch adds the documentation for rockchip rk3399 dmc driver.
> 
> Signed-off-by: Lin Huang 
> ---
> Changes in v6:
> -Add more detail in Documentation
> 
> Changes in v5:
> -None
> 
> Changes in v4:
> -None
> 
> Changes in v3:
> -None
> 
> Changes in v2:
> -None 
> 
> Changes in v1:
> -None
>  .../devicetree/bindings/devfreq/rk3399_dmc.txt | 84 
> ++
>  1 file changed, 84 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
> 
> diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt 
> b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
> new file mode 100644
> index 000..e73067c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
> @@ -0,0 +1,84 @@
> +* Rockchip rk3399 DMC(Dynamic Memory Controller) device
> +
> +Required properties:
> +- compatible: Must be "rockchip,rk3399-dmc".
> +- devfreq-events: Node to get ddr loading, Refer to
> +   Documentation/devicetree/bindings/devfreq/rockchip-dif.txt
> +- interrupts: The interrupt number to the cpu. The interrupt specifier format
> +   depends on the interrupt controller. it should be dcf interrupts,
> +   when ddr dvfs finish, it will happen.

If possible, you better to keep the indentation with other properties.
s/it->It, dcf->DCF, ddr->DDR


> +- clocks: Phandles for clock specified in "clock-names" property
> +- clock-names : The name of clock used by the DFI, must be "pclk_ddr_mon";
> +- operating-points-v2: Refer to 
> Documentation/devicetree/bindings/power/opp.txt
> +for details.

ditto.

> +- center-supply: Dmc supply node.

s/Dmc/DMC becaue DMC an abbreviation.

> +- status: Marks the node enabled/disabled.
> +
> +Optional properties:
> +- ddr_timing: ddr timing need to pass to arm trust firmware
> +- upthreshold: the upthreshold to simpleondeamnd policy
> +- downdifferential: The downdifferential to simpleondeamnd policy
> +
> +Example:
> + ddr_timing: ddr_timing {
> + compatible = "rockchip,ddr-timing";

I can't find the 'rockchip,ddr-timing' driver on linux-next git repo (20160816).
If ddr_timing includes the only properties for ddr_timing,
I recommend you make the separate a .dtsi file including
the ddr timing configuration. I add the reference and an example on below.

> + ddr3_speed_bin = <21>;
> + pd_idle = <0>;
> + sr_idle = <0>;
> + sr_mc_gate_idle = <0>;
> + srpd_lite_idle  = <0>;
> + standby_idle = <0>;
> + dram_dll_dis_freq = <300>;
> + phy_dll_dis_freq = <125>;
> +
> + ddr3_odt_dis_freq = <333>;
> + ddr3_drv = ;
> + ddr3_odt = ;
> + phy_ddr3_ca_drv = ;
> + phy_ddr3_dq_drv = ;
> + phy_ddr3_odt = ;
> +
> + lpddr3_odt_dis_freq = <333>;
> + lpddr3_drv = ;
> + lpddr3_odt = ;
> + phy_lpddr3_ca_drv = ;
> + phy_lpddr3_dq_drv = ;
> + phy_lpddr3_odt = ;
> +
> + lpddr4_odt_dis_freq = <333>;
> + lpddr4_drv = ;
> + lpddr4_dq_odt = ;
> + lpddr4_ca_odt = ;
> + phy_lpddr4_ca_drv = ;
> + phy_lpddr4_ck_cs_drv = ;
> + phy_lpddr4_dq_drv = ;
> + phy_lpddr4_odt = ;
> + };
> +
> + dmc_opp_table: dmc_opp_table {
> + compatible = "operating-points-v2";
> +
> + opp00 {
> + opp-hz = /bits/ 64 <3>;
> + opp-microvolt = <90>;
> + };
> + opp01 {
> + opp-hz = /bits/ 64 <66600>;
> + opp-microvolt = <90>;
> + };
> + };
> +
> + dmc: dmc {
> + compatible = "rockchip,rk3399-dmc";
> + devfreq-events = <&dfi>;
> + interrupts = ;
> + clocks = <&cru SCLK_DDRCLK>;
> + clock-names = "dmc_clk";
> + ddr_timing = <&ddr_timing>;

You can use the following '#include' instead of 'ddr_timing'
because the ddr_timing is not a device driver. Instead,
the rk3399-dmc must need the ddr timing configuration.

#include "rk3399-dmc-timing-conf.dtsi"

You can refer the similar usage case[1].
The *.conf.dtsi is used on exynos3250 tmu dt node[2].

[1] arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi
[2] arch/arm/boot/dts/exynos3250.dtsi, 224 line.

> + operating-points-v2 = <&dmc_opp_table>;
> + center-supply = <&ppvar_centerlogic>;
> + upthreshold = <15>;
> + downdifferential = <10>;
> + status = "disabled";
> + };
> +
> 

For example,
I think that you can add the following timing .dtsi file.
- arch/arm/boot/dts/rk3399-dmc-timing-conf.dtsi

/*
 * Device tree sources for RK3399 DDR timing configuration

[PATCH v6 6/8] Documentation: bindings: add dt documentation for rk3399 dmc

2016-08-17 Thread Lin Huang

This patch adds the documentation for rockchip rk3399 dmc driver.

Signed-off-by: Lin Huang 
---
Changes in v6:
-Add more detail in Documentation

Changes in v5:
-None

Changes in v4:
-None

Changes in v3:
-None

Changes in v2:
-None 

Changes in v1:
-None
 .../devicetree/bindings/devfreq/rk3399_dmc.txt | 84 ++
 1 file changed, 84 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt

diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt 
b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
new file mode 100644
index 000..e73067c
--- /dev/null
+++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
@@ -0,0 +1,84 @@
+* Rockchip rk3399 DMC(Dynamic Memory Controller) device
+
+Required properties:
+- compatible: Must be "rockchip,rk3399-dmc".
+- devfreq-events: Node to get ddr loading, Refer to
+ Documentation/devicetree/bindings/devfreq/rockchip-dif.txt
+- interrupts: The interrupt number to the cpu. The interrupt specifier format
+ depends on the interrupt controller. it should be dcf interrupts,
+ when ddr dvfs finish, it will happen.
+- clocks: Phandles for clock specified in "clock-names" property
+- clock-names : The name of clock used by the DFI, must be "pclk_ddr_mon";
+- operating-points-v2: Refer to Documentation/devicetree/bindings/power/opp.txt
+  for details.
+- center-supply: Dmc supply node.
+- status: Marks the node enabled/disabled.
+
+Optional properties:
+- ddr_timing: ddr timing need to pass to arm trust firmware
+- upthreshold: the upthreshold to simpleondeamnd policy
+- downdifferential: The downdifferential to simpleondeamnd policy
+
+Example:
+   ddr_timing: ddr_timing {
+   compatible = "rockchip,ddr-timing";
+   ddr3_speed_bin = <21>;
+   pd_idle = <0>;
+   sr_idle = <0>;
+   sr_mc_gate_idle = <0>;
+   srpd_lite_idle  = <0>;
+   standby_idle = <0>;
+   dram_dll_dis_freq = <300>;
+   phy_dll_dis_freq = <125>;
+
+   ddr3_odt_dis_freq = <333>;
+   ddr3_drv = ;
+   ddr3_odt = ;
+   phy_ddr3_ca_drv = ;
+   phy_ddr3_dq_drv = ;
+   phy_ddr3_odt = ;
+
+   lpddr3_odt_dis_freq = <333>;
+   lpddr3_drv = ;
+   lpddr3_odt = ;
+   phy_lpddr3_ca_drv = ;
+   phy_lpddr3_dq_drv = ;
+   phy_lpddr3_odt = ;
+
+   lpddr4_odt_dis_freq = <333>;
+   lpddr4_drv = ;
+   lpddr4_dq_odt = ;
+   lpddr4_ca_odt = ;
+   phy_lpddr4_ca_drv = ;
+   phy_lpddr4_ck_cs_drv = ;
+   phy_lpddr4_dq_drv = ;
+   phy_lpddr4_odt = ;
+   };
+
+   dmc_opp_table: dmc_opp_table {
+   compatible = "operating-points-v2";
+
+   opp00 {
+   opp-hz = /bits/ 64 <3>;
+   opp-microvolt = <90>;
+   };
+   opp01 {
+   opp-hz = /bits/ 64 <66600>;
+   opp-microvolt = <90>;
+   };
+   };
+
+   dmc: dmc {
+   compatible = "rockchip,rk3399-dmc";
+   devfreq-events = <&dfi>;
+   interrupts = ;
+   clocks = <&cru SCLK_DDRCLK>;
+   clock-names = "dmc_clk";
+   ddr_timing = <&ddr_timing>;
+   operating-points-v2 = <&dmc_opp_table>;
+   center-supply = <&ppvar_centerlogic>;
+   upthreshold = <15>;
+   downdifferential = <10>;
+   status = "disabled";
+   };
+
-- 
2.6.6

[PATCH v6 6/8] Documentation: bindings: add dt documentation for rk3399 dmc

[PATCH v6 6/8] Documentation: bindings: add dt documentation for rk3399 dmc

[PATCH v6 6/8] Documentation: bindings: add dt documentation for rk3399 dmc

[PATCH v6 6/8] Documentation: bindings: add dt documentation for rk3399 dmc

[PATCH v6 6/8] Documentation: bindings: add dt documentation for rk3399 dmc

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