Re: R3XX lockup possible solution

2006-06-25 Thread Peter Zubaj
Hi,

I tested this on my card.

01:00.0 VGA compatible controller: ATI Technologies Inc Radeon R300 NE
[Radeon 9500 Pro] (prog-if 00 [VGA])
Subsystem: ATI Technologies Inc Radeon R300 NE [Radeon 9500 Pro]
Flags: bus master, stepping, 66MHz, medium devsel, latency 255,
IRQ 21
Memory at d000 (32-bit, prefetchable) [size=128M]
I/O ports at c800 [size=256]
Memory at dfef (32-bit, non-prefetchable) [size=64K]
Expansion ROM at dfec [disabled] [size=128K]
Capabilities: access denied

First, I think, you shouldn't touch register 0x140, you write value 0x22
there. For my card there is 0x2D (this is power on default and is not
changed by fglrx). When value 0x22 is written there, I have got
corrupted console and X desktop too.

Basically I tried ut2004. With ColorTiling On. Without you fix computer
locked immediately (on game start, or in game menu). With this fix I was
able to play ut2004 for more then 10 minutes (without lock - for now I
don't have time to test more). I will try to compare other values with
values from dump from my card.

Peter Zubaj

On Sat, 2006-06-24 at 17:27 +0200, Jerome Glisse wrote:
 Attached is the possible initialization we lack for r3xx chipset, might also
 be usefull for r4xx. I am still not 100% confident that this solve lockup but
 i have been able to run things a lot longuer than before without lockup.
 
 Thus i want other people to test this and report if this solve any lockup
 they might experience with r3xx/r4xx and DRI.
 
 To use this change the #define ADDR to your card ADDR (use lspci -v)
 then gcc r300init.c -o initr300 quit any X, go the console run sync, launch
 the program (as root) rerun X and test with app which used to lockup.
 
 You will have to press several time a key to go over initialization
 step in the program if it lockup your computer please report last
 things you see printed.
 
 Report your status.
 
 PS: Sorry for cross posting but i wanted to have as many tester as possible.
 
 best,
 Jerome Glisse
 
 To get the ADDR use lspci -v then this is second Memory at line of your
 graphic card for example:
 
 :01:00.0 VGA compatible controller: ATI Technologies Inc RV350 NJ
 [Radeon 98 00 XT] (prog-if 00 [VGA])
 Subsystem: Micro-Star International Co., Ltd.: Unknown device 9560
 Flags: bus master, stepping, 66MHz, medium devsel, latency 64, IRQ 177
 Memory at f000 (32-bit, prefetchable) [size=128M]
 I/O ports at c000 [size=256]
 Memory at fe9f (32-bit, non-prefetchable) [size=64K]
 Expansion ROM at fe9c [disabled] [size=128K]
 Capabilities: available only to root
 
 #define ADDR 0xfe9f
 
 
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Re: Re : R3XX lockup possible solution

2006-06-25 Thread Peter Zubaj
Hi,

Use primary. Try to comment out every row in r300init.c which contains
0x140 (do not comment out already commented rows). This should
prevent screen corruption).

Peter Zubaj

On Sun, 2006-06-25 at 15:26 +0400, Elie Morisse wrote:
 Le 24.06.2006 19:27:02, Jerome Glisse a écrit :
  Attached is the possible initialization we lack for r3xx chipset, might also
  be usefull for r4xx. I am still not 100% confident that this solve lockup 
  but
  i have been able to run things a lot longuer than before without lockup.
  
  Thus i want other people to test this and report if this solve any lockup
  they might experience with r3xx/r4xx and DRI.
  
  To use this change the #define ADDR to your card ADDR (use lspci -v)
  then gcc r300init.c -o initr300 quit any X, go the console run sync, launch
  the program (as root) rerun X and test with app which used to lockup.
  
  You will have to press several time a key to go over initialization
  step in the program if it lockup your computer please report last
  things you see printed.
  
  Report your status.
  
  PS: Sorry for cross posting but i wanted to have as many tester as possible.
  
  best,
  Jerome Glisse
  
  To get the ADDR use lspci -v then this is second Memory at line of your
  graphic card for example:
  
  :01:00.0 VGA compatible controller: ATI Technologies Inc RV350 NJ
  [Radeon 98 00 XT] (prog-if 00 [VGA])
  Subsystem: Micro-Star International Co., Ltd.: Unknown device 9560
  Flags: bus master, stepping, 66MHz, medium devsel, latency 64, IRQ 
  177
  Memory at f000 (32-bit, prefetchable) [size=128M]
  I/O ports at c000 [size=256]
  Memory at fe9f (32-bit, non-prefetchable) [size=64K]
  Expansion ROM at fe9c [disabled] [size=128K]
  Capabilities: available only to root
  
 
 Glimmer of hope didn't bright long enough :'( , this doesn't seem to fix any 
 lockup for me. I tested Half-Life, Deus Ex, Hitman 2 and Jedi Outcast; 
 differently to another feedback those games have always been working but 
 lockup after a few minutes.
 
 However i noticed that lspci displays different ADDR for primary and 
 secondary.. on bugzilla you were peeping out the secondary entry while on ml 
 this is the primary one. Here's my lspci output :
 
 02:00.0 VGA compatible controller: ATI Technologies Inc Radeon R350 [Radeon 
 9800 Pro] (prog-if 00 [VGA])
 Subsystem: ATI Technologies Inc Unknown device 0002
 Flags: bus master, stepping, 66MHz, medium devsel, latency 32, IRQ 19
 Memory at d800 (32-bit, prefetchable) [size=128M]
 I/O ports at d000 [size=256]
 Memory at e900 (32-bit, non-prefetchable) [size=64K]
 [virtual] Expansion ROM at e800 [disabled] [size=128K]
 Capabilities: access denied
 
 02:00.1 Display controller: ATI Technologies Inc Radeon R350 [Radeon 9800 
 Pro] (Secondary)
 Subsystem: ATI Technologies Inc Unknown device 0003
 Flags: stepping, 66MHz, medium devsel
 Memory at e000 (32-bit, prefetchable) [disabled] [size=128M]
 Memory at e901 (32-bit, non-prefetchable) [disabled] [size=64K]
 Capabilities: access denied
 
 First i tried the primary one (e900), but it screwed up both text mode 
 and X, when the second one(e901) worked with some RD errors but 
 obviously makes no difference for the games above. Which one should be the 
 correct one ?
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Re: Re : R3XX lockup possible solution

2006-06-25 Thread Peter Zubaj
Sorry, 0x0140 an not 0x140.

Peter Zubaj


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Re: Using the R300 driver on Intel-based Macs?

2006-05-25 Thread Peter Zubaj
Hi,

This is nice tool to play with.

Peter

http://lists.freedesktop.org/archives/xorg/2006-May/015496.html

On Thu, 2006-05-25 at 12:52 +0300, Pekka Enberg wrote:

 Aah, thanks.  Well, I am stuck with this chip, so please let me know if
 I can help out with reverse engineering the R500 chip as I am sure ATI
 will ignore my request for documentation once again :-).
 
   Pekka




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Re: Re: Radeon X1600?

2006-02-07 Thread Peter Zubaj
Hi,

AFAIK there is not linux driver for X1600 (fglrx doesn't support this card 
too). This card is nearly useless under linux for now.

Peter Zubaj


John Clemens schrieb:

 There was a post on this list at the end of december(?) indicating that
 ATI was not interested in helping open source with 3D specs anymore..
 I'm guessing they didn't do much with the r300 line either.. but does
 anyone know anything or have any official word on whether the r500
 series of radeon cards will ever be supported by anything other than
 fglrx for 3D? Any official word from ATI? Is anything known about these
 cards?

AFAIK no one has even started reverse-engineering their driver. There is
official word from ATI that they will not give any information to
developers of free drivers. German computer magazine c't asked them.
Theres one or two sentences about it in an article about the linux
driver situation (page 168, magazine from 27.12.2005).
The r300 driver was written without any information from ATI. It works
with cards up to the X850.

Philipp






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Re: R300 fragment program write to depth

2006-01-21 Thread Peter Zubaj
Hi,

What about early z test ? AFAIK default is early z test on (only for alpha 
textures is off). Look for update_early_z function. 

Peter Zubaj

On Saturday 21 January 2006 19:14, Jerome Glisse wrote:
 Hi,

 Write to depth in fragment program doesn't work.
 Looking at fglrx dump, shows that sometimes fglrx
 doesn't even set the R300_PFS_NODE_OUTPUT_DEPTH.
 Also using a fragment program very similar to one
 produced by fglrx doesn't work. I (Ben too) suspect
 that we miss somethings elsewhere.
 Did anyone already looked at that ?

 Btw after talking with Ben Skeggs we agreed on keeping
 is code for swizzling so i will remove r300_fragprog_swz.c
 anyway it was never used in the cvs code.

 best,
 Jerome Glisse



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Re: [R300] Activating Fast Write mode kills the machine

2005-11-11 Thread Peter Zubaj
Hi,

I will be very surprise if this is stable configuration with your card.
Make sure you save all data before running 3D. It will random lock in 3D.

Peter Zubaj

I installed the latest X.Org server from Debian (6.8.99.901.dfsg.1-2)
and decided to try DRI (I have a Radeon 9500 Pro).



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Re: [r300] r300 driver locks up with Xglx

2005-07-01 Thread Peter Zubaj
Hi,

Some of r300 driver lockups are card dependant (and for now I have
only these card dependand lockups). Cards which will lock (soon or
later) are  9500 Pro (maybe 9500 too), 9700, 9800. What card do you have ?

Try to load fglrx 2d driver first, then uload it and then use r300 driver.

Peter Zubaj


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OT: r300 - display corruption frglrx - radeon

2005-06-26 Thread Peter Zubaj

Hi,

For display corruption when switching from fglrx to radeon driver are 
responsible RADEON_SURFACEx_ register.


One question: for what are these surfaces good ?

Peter Zubaj


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Re: [patches] Re: r300 radeon 9800 lockup

2005-05-29 Thread Peter Zubaj

Hi,

First patch helped lot (but there are still lockups).
Second - no diffrence with or without.

Peter Zubaj

Nicolai Haehnle wrote:


Hi everybody,

I once again tripped upon an R300 lockup (possibly the same one that 
everybody's been talking about) and spent the last one and half days 
chasing it down.


It turns out that writing the vertex buffer age to scratch registers (the 
ones that are written back to main memory) during a 3D sequence is a bad 
idea. Apparently, this confuses the memory controller so much that some 
part of the engine locks up hard.


The attached patch.out-of-loop-dispatch-age fixes this, at least for me.

The attached patch.remove-userspace-pacifiers removes additional unnecessary 
emission of the pacifier sequence from the userspace driver. Userspace 
isn't supposed to emit this sequence anyway.


Could everybody please test whether 
a) the first patch really does fix the lockups people are seeing and
b) whether combining both the first and the second patch causes any 
regressions.


If everything's fine with these patches, I'm going to commit them in a few 
days or so.


cu,
Nicolai
 





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Re: radeon 9600se?

2005-05-29 Thread Peter Zubaj
Hi,

No, you are not correct.
You need cvs version of xorg, cvs version of mesa and cvs version of
r300 driver from r300.sf.net. r300 driver is still in alpha stage (it
can lock or crash your computer).

Peter Zubaj




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Re: r300 bugs

2005-05-29 Thread Peter Zubaj
Hi,

16 bpp is not supported in r300 driver. It will be probably supported
if  fglrx will support 16 bpp (I think, this will never hapend.

Peter Zubaj



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Re: [R300] new snapshot ?

2005-05-19 Thread Peter Zubaj
Jerome Glisse wrote:

 -stencil

Stencil should work. GL_ATI_separate_stencil is not implemented
(hardware support it).

I think, fog is not implemented too.


Moreover i see that 9800 are reported to crash with the driver ? Is this
still true ?

I have 9500 Pro. Some opengl application locks after while. Enemy
Teritori lock immediatly after match begin if extensions are enabled
If extensions are dissabled in options menu it works good, but slow.

Peter Zubaj


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Re: licenses, R300 code, etc

2005-05-01 Thread Peter Zubaj

Vladimir Dergachev writes:
* the R300 driver derived from it appears under the same
  license due to the notices left over from R200 files
  (as we originally thought to merge the code in R200).
  This needs approval from everyone who contributed to R300 -
  please let me know !

Do what you want (use any licence you want) with few rows I added.
Peter Zubaj
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Re: r300 Radeon 9800 Pro lockups

2005-04-14 Thread Peter Zubaj
I would like to know this too. I used xorg 6.8.1 + modified original 
patch with r300 support - this worked ok.
Then I upgraded to xorg 6.8.2 (found that it doesn't support r300) . I 
tryed cvs (same problem as you).

Peter Zubaj
Jonathan Bastien-Filiatrault wrote:
Hi list,
   I have tried the experimental r300 driver with my Radeon 9800 Pro.
The rendering speed and accuracy are simply amazing. Unfortunately, I am
getting random lockups about every five minutes. The Xorg process takes
100% CPU and I have to reboot to get the graphics card in a usable
state. The OS besides that seems to be unnafected. If I move the mouse,
it locks up in a matter of seconds. Could anyone give me pointers/test
cases to help debug this ? It seems that fixing this lockup would be the
last little step to have working free software drivers for the ATI
Radeon line.
Thank you for your time,
Jonathan
 


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Re: r300 - alpha test

2005-03-21 Thread Peter Zubaj
I just realized something - isn't the application supposed to change
Z test for that ?

I don't know, but all application I tested and which uses alpha test -
has z test enabled and all displays errors (tuxracer, enemy territory,
fire - from mesa/demos)


Maybe what really happens is that disabling Z test is broken.

Z test is not disabled - it is enabled. Problem is - even alpha test
fails (and fragment is discarded) z value is still written (and this
looks wrong).

On the other hand, as Nicolai points out it would be nice to know
what that register does and whether other bits have any function.

AFAIK:

fglrx initialize 0x4f14 register to 0x0001, but when alpha test is
enabled it sets it to 0x. I have to do more tests to see if
fglrx sets this register back to 0x0001 (for now looks, like it is
not set back, but I need to make test program for it).

Peter Zubaj

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r300 - alpha test

2005-03-19 Thread Peter Zubaj
Hi,
Looks like register 4F14 (alias unk4f10[2]) controls some sort of depth 
test (probably some optimalization).

To get ALPHA TEST work correctly (not writing to depth) needs to be set 
to 0x. Then alpha textures looks correct (no more depth fighting 
in fire, et, tuxracer). Otherways is set to 0x0001.

Is there any other meaning of this register? Can I change this, because 
now is set to 0x0001 ?

Peter Zubaj


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[R300] - Stencil support

2005-03-13 Thread Peter Zubaj
Hi,
I played with stencil and this patch is output.
I tested it only on stenciltst from 
http://www.sgi.com/products/software/opengl/examples/glut/examples/
This app doesn't use Z_TEST.  It show correct output. Somene with more 
mesa and r300 knowledge should correct it (there are still problems).

Peter Zubaj
diff -u -r o/r300_ioctl.c n/r300_ioctl.c
--- o/r300_ioctl.c	2005-03-04 18:57:28.0 +0100
+++ n/r300_ioctl.c	2005-03-13 23:04:31.0 +0100
@@ -58,6 +58,7 @@
 
 #define CLEARBUFFER_COLOR	0x1
 #define CLEARBUFFER_DEPTH	0x2
+#define CLEARBUFFER_STENCIL	0x4
 
 static void r300ClearBuffer(r300ContextPtr r300, int flags, int buffer)
 {
@@ -205,8 +206,9 @@
 
 	R300_STATECHANGE(r300, zs);
 	if (flags  CLEARBUFFER_DEPTH) {
-		r300-hw.zs.cmd[R300_ZS_CNTL_0] = 0x6; // test and write
-		r300-hw.zs.cmd[R300_ZS_CNTL_1] = (R300_ZS_ALWAYSR300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
+		r300-hw.zs.cmd[R300_ZS_CNTL_0] = (r300-hw.zs.cmd[R300_ZS_CNTL_0]  1) | 0x6; // test and write
+		r300-hw.zs.cmd[R300_ZS_CNTL_1] = ~(R300_ZS_MASK  R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
+		r300-hw.zs.cmd[R300_ZS_CNTL_1] |= (R300_ZS_ALWAYSR300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
 /*
 		R300_STATECHANGE(r300, zb);
 		r300-hw.zb.cmd[R300_ZB_OFFSET] =
@@ -217,8 +219,23 @@
 			r300-radeon.radeonScreen-depthPitch;
 */
 	} else {
-		r300-hw.zs.cmd[R300_ZS_CNTL_0] = 0; // disable
-		r300-hw.zs.cmd[R300_ZS_CNTL_1] = 0;
+		r300-hw.zs.cmd[R300_ZS_CNTL_0] = (r300-hw.zs.cmd[R300_ZS_CNTL_0]  1) | R300_RB3D_Z_DISABLED_1; // disable
+		r300-hw.zs.cmd[R300_ZS_CNTL_1] = ~(R300_ZS_MASK  R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
+	}
+	
+	R300_STATECHANGE(r300, zs);
+	if (flags  CLEARBUFFER_STENCIL) {
+		r300-hw.zs.cmd[R300_ZS_CNTL_0] = (r300-hw.zs.cmd[R300_ZS_CNTL_0]  (~1)) | 0x1;
+		r300-hw.zs.cmd[R300_ZS_CNTL_1] = ~((R300_ZS_MASK  R300_RB3D_ZS1_FRONT_FUNC_SHIFT) | (R300_ZS_MASK  R300_RB3D_ZS1_BACK_FUNC_SHIFT));
+		r300-hw.zs.cmd[R300_ZS_CNTL_1] |= 
+		(R300_ZS_ALWAYSR300_RB3D_ZS1_FRONT_FUNC_SHIFT) | 
+		(R300_ZS_REPLACER300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT) |
+		(R300_ZS_REPLACER300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT) |
+		(R300_ZS_REPLACER300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT) |
+		(R300_ZS_ALWAYSR300_RB3D_ZS1_BACK_FUNC_SHIFT) |
+		(R300_ZS_REPLACER300_RB3D_ZS1_BACK_FAIL_OP_SHIFT) |
+		(R300_ZS_REPLACER300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT) |
+		(R300_ZS_REPLACER300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT) ;
 	}
 			
 	/* Make sure we have enough space */
@@ -314,6 +331,11 @@
 		bits |= CLEARBUFFER_DEPTH;
 		mask = ~DD_DEPTH_BIT;
 	}
+	
+	if ( (mask  DD_STENCIL_BIT)  r300-state.hw_stencil) {
+		bits |= CLEARBUFFER_STENCIL;
+		mask = ~DD_STENCIL_BIT;
+	}
 
 	if (mask) {
 		if (RADEON_DEBUG  DEBUG_FALLBACKS)
diff -u -r o/r300_reg.h n/r300_reg.h
--- o/r300_reg.h	2005-03-05 12:16:21.0 +0100
+++ n/r300_reg.h	2005-03-13 22:54:51.795679904 +0100
@@ -1116,7 +1116,7 @@
 #   define R300_RB3D_Z_TEST  0x0012
 #   define R300_RB3D_Z_TEST_AND_WRITE0x0016
 #   define R300_RB3D_Z_WRITE_ONLY	 0x0006
-#	define R300_RB3D_STENCIL_ENABLE		 (01)  /* UNKNOWN yet.. */
+#	define R300_RB3D_STENCIL_ENABLE		 0x0001  /* UNKNOWN yet.. */
 
 #define R300_RB3D_ZSTENCIL_CNTL_1   0x4F04
 		/* functions */
diff -u -r o/r300_state.c n/r300_state.c
--- o/r300_state.c	2005-03-12 21:56:29.0 +0100
+++ n/r300_state.c	2005-03-13 23:00:46.0 +0100
@@ -483,9 +483,9 @@
 			else
 newval = R300_RB3D_Z_TEST;
 		} else
-			newval = 0;
+			newval = R300_RB3D_Z_DISABLED_1;
 
-		r300-hw.zs.cmd[R300_ZS_CNTL_0] = newval;
+		r300-hw.zs.cmd[R300_ZS_CNTL_0] = (r300-hw.zs.cmd[R300_ZS_CNTL_0]  1) | newval;
 		break;
 
 	case GL_STENCIL_TEST:
@@ -609,7 +609,6 @@
 		r300-hw.zs.cmd[R300_ZS_CNTL_1] |= R300_ZS_ALWAYS  R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
 		break;
 	}
-
 }
 
 
@@ -621,13 +620,14 @@
 static void r300DepthMask(GLcontext* ctx, GLboolean mask)
 {
 	r300ContextPtr r300 = R300_CONTEXT(ctx);
+	uint32_t newval = 0;
 
 	if (!ctx-Depth.Test)
 		return;
 
 	R300_STATECHANGE(r300, zs);
-	r300-hw.zs.cmd[R300_ZS_CNTL_0] = mask
-		? R300_RB3D_Z_TEST_AND_WRITE : R300_RB3D_Z_TEST;
+	newval = mask ? R300_RB3D_Z_TEST_AND_WRITE : R300_RB3D_Z_TEST;
+	r300-hw.zs.cmd[R300_ZS_CNTL_0] = (r300-hw.zs.cmd[R300_ZS_CNTL_0]  1) | newval;
 }
 
 
@@ -866,8 +866,7 @@
 {
 	r300ContextPtr rmesa = R300_CONTEXT(ctx);
 	GLuint refmask = ((ctx-Stencil.Ref[0]  R300_RB3D_ZS2_STENCIL_REF_SHIFT) |
-			  (ctx-Stencil.
-			   ValueMask[0]  R300_RB3D_ZS2_STENCIL_MASK_SHIFT));
+			  (ctx-Stencil.ValueMask[0]  R300_RB3D_ZS2_STENCIL_MASK_SHIFT));
 	GLuint flag;
 
 	R300_STATECHANGE(rmesa, zs);
@@ -902,7 +901,10 @@
 
 	R300_STATECHANGE(rmesa, zs);
 		/* It is easier to mask what's left.. */
-	rmesa-hw.zs.cmd[R300_ZS_CNTL_1] = (R300_ZS_MASK  R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
+	rmesa-hw.zs.cmd[R300_ZS_CNTL_1] = 
+	(R300_ZS_MASK  R300_RB3D_ZS1_DEPTH_FUNC_SHIFT) | 
+	(R300_ZS_MASK  R300_RB3D_ZS1_FRONT_FUNC_SHIFT) | 
+	(R300_ZS_MASK  R300_RB3D_ZS1_BACK_FUNC_SHIFT

Re: [r300] VB mode success

2005-02-18 Thread Peter Zubaj
Hi,
I  tested latest CVS of  r300 driver. Card is Rageon 9700Pro (NE).
I tested immediate and VB mode, both of them work  ok - no locks (tested 
in glxgearx, tuxracer, nehe lesson06) . Even with x11perf -shmput 500 I 
can not lock machne.

Some screenshots from enemy territory (VB mode):
http://www.gaya.sk/~pzubaj/scr/et1.jpg
http://www.gaya.sk/~pzubaj/scr/et2.jpg
http://www.gaya.sk/~pzubaj/scr/et3.jpg
http://www.gaya.sk/~pzubaj/scr/et4.jpg
http://www.gaya.sk/~pzubaj/scr/et5.jpg
http://www.gaya.sk/~pzubaj/scr/et6.jpg
I trayed attached patch. With this patch still everything works ok - no 
lock.

Then I removed all  occurrence of (from r300 driver):
reg_start(0x4f18,0);
e32(0x0003);
Still everything works ok - no lock.
Then I removed every
reg_start(R300_RB3D_DSTCACHE_CTLSTAT,0);
e32(0x000a);
computer immediately lock.
For me looks like (my opinions):
R300_RB3D_DSTCACHE_CTLSTAT is needs to be regural inserted to stream.
Register 0x4f18  is only need at begin and end of 3d drawing.
Peter Zubaj
diff -u o/radeon_cp.c n/radeon_cp.c
--- o/radeon_cp.c	2005-01-02 07:18:39.0 +0100
+++ n/radeon_cp.c	2005-02-18 21:36:51.0 +0100
@@ -984,32 +984,14 @@
 	RING_LOCALS;
 	DRM_DEBUG(\n);
 
-	if (IS_FAMILY_R300(dev_priv)) {
-		BEGIN_RING( 10 );
-
-		OUT_RING_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0x0002);
-		OUT_RING_REG(0x4F18, 0x0001); /* Z cache? */
-
-		/* It seems a delay is needed */
-  	OUT_RING( CP_PACKET3( RADEON_CP_NOP, 0 ) );
-	OUT_RING( 0x0 );
-
-		RADEON_PURGE_CACHE();
-
-		RADEON_WAIT_UNTIL_IDLE();
-
-		ADVANCE_RING();
-	} else {
+	BEGIN_RING(6);
 
-		BEGIN_RING(6);
+	RADEON_PURGE_CACHE();
+	RADEON_PURGE_ZCACHE();
+	RADEON_WAIT_UNTIL_IDLE();
 
-		RADEON_PURGE_CACHE();
-		RADEON_PURGE_ZCACHE();
-		RADEON_WAIT_UNTIL_IDLE();
+	ADVANCE_RING();
 
-		ADVANCE_RING();
-		}
-		
 	COMMIT_RING();
 
 	return radeon_do_wait_for_idle(dev_priv);
diff -u o/radeon_state.c n/radeon_state.c
--- o/radeon_state.c	2005-02-13 11:35:54.0 +0100
+++ n/radeon_state.c	2005-02-18 21:38:41.0 +0100
@@ -1021,16 +1021,11 @@
 	/* Wait for the 3D stream to idle before dispatching the bitblt.
 	 * This will prevent data corruption between the two streams.
 	 */
-	if (IS_FAMILY_R300(dev_priv)) {
-		/* Make sure the new caches are flushed */
-		radeon_do_cp_idle(dev_priv);
-	} else {
-		BEGIN_RING(2);
+	BEGIN_RING(2);
 
-		RADEON_WAIT_UNTIL_3D_IDLE();
+	RADEON_WAIT_UNTIL_3D_IDLE();
 
-		ADVANCE_RING();
-	}
+	ADVANCE_RING();
 
 	for (i = 0; i  nbox; i++) {
 		int x = pbox[i].x1;
@@ -1348,9 +1343,12 @@
 	 */
 	if (IS_FAMILY_R300(dev_priv)) {
 	
-		BEGIN_RING(10);
-OUT_RING_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0x0002);
-OUT_RING_REG(0x4F18, 0x0001); /* Z cache? */
+		/*BEGIN_RING(10);*/
+		BEGIN_RING(8);
+/*OUT_RING_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0x0002);
+OUT_RING_REG(0x4F18, 0x0001);*/ /* Z cache? */
+		
+		OUT_RING_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0x000A);
 
 /* It seems a delay is needed */
 OUT_RING( CP_PACKET3( RADEON_CP_NOP, 0 ) );



Re: R300 success stories

2005-02-14 Thread Peter Zubaj
For me looks like:
If you uncoment r300 support in 
int radeon_do_cp_idle(drm_radeon_private_t * dev_priv)
and in
static void radeon_cp_dispatch_swap(drm_device_t * dev)
x will work ok (no more locks or crash), but no 3d.

Peter Zubaj


Vsetko o SuperStar
http://superstar.atlas.sk



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Re: [r300] testing results

2005-01-15 Thread Peter Zubaj
Did you get latest CVS x.org source with support for r300 ? Or did you 
patch it with ati.patch from r300_driver ?

D. Hageman wrote:

I just got done with the second try at this.  I pulled the Mesa and 
r300_driver cvs trees this morning and recompiled.  The only hitch was 
that apparently some changes have happened to the radeon and r200 
driver in the Mesa tree that doesn't allow it to compile.  Looks like 
someone added some code with some defines that didn't get into the 
header.

At any rate, still the same situation with the glxgears.  It works, 
but it works slow.  I don't get any lockups.  I think the r300_demo is 
working fine.  Enabling the LIBGL_DEBUG doesn't show that it isn't 
finding anything like r300_dri.so or something.

 


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Re: [R300] noisy_cube snapshot

2005-01-02 Thread Peter Zubaj
glxgeas and lesson06 works ok - no more lockups here.
This is big improvement :-)

x11perf still locks (and x server crash sometimes) even without using
3D. Where can be problem ???

Peter Zubaj


http://www.logofun.pobox.sk - urobte radost svojmu telefonu



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RE: amd64 + r300.sf.net drivers

2005-01-02 Thread Peter Zubaj
Hi,

You need drm kernel module too.
It is in r300_driver/drm - you need drm and radeon kernel module. Look
in readme in r300_driver/drm to info how to compile.

Peter Zubaj




RAMMSTEIN, 22.02.2005 o 20,00, Bratislava Incheba, 
Info: 0904 666 363, http://www.xl.sk 



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Re: [R300] rotating_gears snapshot

2004-12-31 Thread Peter Zubaj
Hi,

I played with it yesterday.
I have x11perf lockups too. And X sometimes crash (simply exits) to
login screen. I use FC3 and then when I do ctrl+alt+F1 (to get to
console) system freezes (few uppers rows are redrawn (maybe by console
text)), but no switch to text mode.

When I uncomment these rows - then x11perf works (and no more X
crash), but 3D locks as expexted:

In radeon_cp.c in function radeon_do_cp_idle

if (IS_FAMILY_R300(dev_priv)) {
BEGIN_RING( 4 );

OUT_RING_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0x0002);
OUT_RING_REG(0x4F18, 0x0001); /* Z cache? */

ADVANCE_RING();
}

and in radeon_stat.c in function radeon_cp_dispatch_swap:

if (IS_FAMILY_R300(dev_priv)) {
/* Make sure the new caches are flushed */
radeon_do_cp_idle(dev_priv);
} else {
BEGIN_RING(2);

RADEON_WAIT_UNTIL_3D_IDLE();

ADVANCE_RING();
}

changed to

BEGIN_RING(2);

RADEON_WAIT_UNTIL_3D_IDLE();

ADVANCE_RING();

Peter Zubaj



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Info: 0904 666 363, http://www.xl.sk 



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Re: [R300] rotating_gears snapshot

2004-12-31 Thread Peter Zubaj
r300_demo runs with or without this code (and without code in
radeon_state.c too)

One more thing: try this code instead:

if (IS_FAMILY_R300(dev_priv)) {
BEGIN_RING( 6 );

OUT_RING_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0x0002);
OUT_RING_REG(0x4F18, 0x0001); /* Z cache? */

/* It seems a delay is needed */
  OUT_RING( CP_PACKET3( RADEON_CP_NOP, 0 ) );
OUT_RING( 0x0 );

ADVANCE_RING();
} 



With this code I was able run glxgears on full screen (with glxgears
2/dev/null - produced lock). Maybe I have only luck :-)

Peter Zubaj

RAMMSTEIN, 22.02.2005 o 20,00, Bratislava Incheba, 
Info: 0904 666 363, http://www.xl.sk 



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Re: [R300] shimmering_gears snapshot

2004-12-29 Thread Peter Zubaj
Hi,

I tryed r300 driver from r300.sourceforge.net.
I have Athlon XP 1800 and ATI Radeon 9500 Pro - 128 MB.
It worked somehow :-) .

Here is screenshot of glxgears:
http://www.gaya.sk/~pzubaj/scr1.png

For this window size I have got 600 FPS (this is 4 times faster as
software rendering).

I have one problem. When I resize glxgear window to full screen, only
upper half of window is rendered and computer immediatly locks.

Peter Zubaj


http://www.logofun.pobox.sk - urobte radost svojmu telefonu



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