Re: [Intel-gfx] [PATCH 2/2] drm/i915: enable 36bit physical address for hardware status page
On 2010.01.15 14:51:41 -0800, Eric Anholt wrote: On Tue, 5 Jan 2010 11:25:06 +0800, Zhenyu Wang zhen...@linux.intel.com wrote: This enables possible 36bit address mask on 965G that use physical address for hw status page. Signed-off-by: Zhenyu Wang zhen...@linux.intel.com Applied to for-linus. Thanks! My understanding is that with the current 2 patches applied, the other swiotlb stuff in intel-agp is not required. Is that right? Yes. We've already tried to make dma mapping stuff in intel-agp to work with any pci mapping implement, so does swiotlb now although we just pass through it. -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 signature.asc Description: Digital signature -- Throughout its 18-year history, RSA Conference consistently attracts the world's best and brightest in the field, creating opportunities for Conference attendees to learn about information security's most important issues through interactions with peers, luminaries and emerging and established companies. http://p.sf.net/sfu/rsaconf-dev2dev-- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [Intel-gfx] [PATCH 2/2] drm/i915: enable 36bit physical address for hardware status page
On Tue, 5 Jan 2010 11:25:06 +0800, Zhenyu Wang zhen...@linux.intel.com wrote: This enables possible 36bit address mask on 965G that use physical address for hw status page. Signed-off-by: Zhenyu Wang zhen...@linux.intel.com Applied to for-linus. Thanks! My understanding is that with the current 2 patches applied, the other swiotlb stuff in intel-agp is not required. Is that right? pgpZ3RjzqNgUb.pgp Description: PGP signature -- Throughout its 18-year history, RSA Conference consistently attracts the world's best and brightest in the field, creating opportunities for Conference attendees to learn about information security's most important issues through interactions with peers, luminaries and emerging and established companies. http://p.sf.net/sfu/rsaconf-dev2dev-- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [Intel-gfx] [PATCH 2/2] drm/i915: enable 36bit physical address for hardware status page
On 2010.01.05 13:37:00 +0800, ykzhao wrote: Do we need to add the explicit DMA mask for using 32bit DMA mask? No, 32bit mask is the default. -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 signature.asc Description: Digital signature -- This SF.Net email is sponsored by the Verizon Developer Community Take advantage of Verizon's best-in-class app development support A streamlined, 14 day to market process makes app distribution fast and easy Join now and get one step closer to millions of Verizon customers http://p.sf.net/sfu/verizon-dev2dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [Intel-gfx] [PATCH 2/2] drm/i915: enable 36bit physical address for hardware status page
On Tue, 2010-01-05 at 11:25 +0800, Zhenyu Wang wrote:
This enables possible 36bit address mask on 965G that use physical
address for hw status page.
Signed-off-by: Zhenyu Wang zhen...@linux.intel.com
---
drivers/char/agp/intel-agp.c|6 +-
drivers/gpu/drm/i915/i915_dma.c |4
2 files changed, 9 insertions(+), 1 deletions(-)
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 30c36ac..3999a5f 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -2460,10 +2460,14 @@ static int __devinit agp_intel_probe(struct pci_dev
*pdev,
bridge-mode);
}
- if (bridge-driver-mask_memory == intel_i965_mask_memory)
+ if (bridge-driver-mask_memory == intel_i965_mask_memory) {
if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(36)))
dev_err(intel_private.pcidev-dev,
set gfx device dma mask 36bit failed!\n);
+ else
+ pci_set_consistent_dma_mask(intel_private.pcidev,
+ DMA_BIT_MASK(36));
+ }
It seems that both pci_set_dma_mask/set_consistent_dma_mask will be
called when the DMA mask is set correctly.
Can we use the following format so that it is easy to understand?
if (!pci_set_dma_mask() !pci_set_consistent_dma_mask()) {
success;
} else
failure;
Do we need to add the explicit DMA mask for using 32bit DMA mask?
pci_set_drvdata(pdev, bridge);
return agp_add_bridge(bridge);
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 02607ed..750f6c8 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -134,6 +134,10 @@ static int i915_init_phys_hws(struct drm_device *dev)
memset(dev_priv-hw_status_page, 0, PAGE_SIZE);
+ if (IS_I965G(dev))
+ dev_priv-dma_status_page |= (dev_priv-dma_status_page 28)
+ 0xf0;
+
I915_WRITE(HWS_PGA, dev_priv-dma_status_page);
DRM_DEBUG_DRIVER(Enabled hardware status page\n);
return 0;
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