Re: [edk2] [PATCH edk2-platforms 6/8] Silicon/SynQuacer/DeviceTree: align uart DT nodes

2018-01-25 Thread Leif Lindholm
On Thu, Jan 25, 2018 at 12:27:34PM +, Ard Biesheuvel wrote:
> Align the UART DT nodes:
> - use 'uart' not 'fuart' as node name for the second serial port
> - create an alias 'serial1' for the second serial port
> - use UART clock reference instead of hardcoded frequency
> - split 'clocks' property into 1 cell per phandle
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel 

Reviewed-by: Leif Lindholm 

> ---
>  Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 8 +---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi 
> b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
> index 37a3981f0360..7c3518facb98 100644
> --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
> +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
> @@ -32,6 +32,7 @@
>  
>  aliases {
>  serial0 = _uart0;
> +serial1 = 
>  };
>  
>  chosen {
> @@ -436,15 +437,16 @@
>  compatible = "arm,pl011", "arm,primecell";
>  reg = <0x0 0x2a40 0x0 0x1000>;
>  interrupts = ;
> -clocks = <_uart _apb>;
> +clocks = <_uart>, <_apb>;
>  clock-names = "uartclk", "apb_pclk";
>  };
>  
> -fuart: fuart@5104 {
> +fuart: uart@5104 {
>  compatible = "snps,dw-apb-uart";
>  reg = <0x0 0x5104 0x0 0x1000>;
>  interrupts = ;
> -clock-frequency = <6250>;
> +clocks = <_uart>, <_apb>;
> +clock-names = "baudclk", "apb_pclk";
>  reg-io-width = <4>;
>  reg-shift = <2>;
>  };
> -- 
> 2.11.0
> 
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[edk2] [PATCH edk2-platforms 6/8] Silicon/SynQuacer/DeviceTree: align uart DT nodes

2018-01-25 Thread Ard Biesheuvel
Align the UART DT nodes:
- use 'uart' not 'fuart' as node name for the second serial port
- create an alias 'serial1' for the second serial port
- use UART clock reference instead of hardcoded frequency
- split 'clocks' property into 1 cell per phandle

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel 
---
 Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi 
b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
index 37a3981f0360..7c3518facb98 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
@@ -32,6 +32,7 @@
 
 aliases {
 serial0 = _uart0;
+serial1 = 
 };
 
 chosen {
@@ -436,15 +437,16 @@
 compatible = "arm,pl011", "arm,primecell";
 reg = <0x0 0x2a40 0x0 0x1000>;
 interrupts = ;
-clocks = <_uart _apb>;
+clocks = <_uart>, <_apb>;
 clock-names = "uartclk", "apb_pclk";
 };
 
-fuart: fuart@5104 {
+fuart: uart@5104 {
 compatible = "snps,dw-apb-uart";
 reg = <0x0 0x5104 0x0 0x1000>;
 interrupts = ;
-clock-frequency = <6250>;
+clocks = <_uart>, <_apb>;
+clock-names = "baudclk", "apb_pclk";
 reg-io-width = <4>;
 reg-shift = <2>;
 };
-- 
2.11.0

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