RE: Is this a case of basic insulation?
Another option is to use contiguous sleeving and clamps whose mounting features do not require penetrating the sleeving. Regards, Peter L. Tarver, PE Product Safety Manager Sanmina-SCI Homologation Services San Jose, CA peter.tar...@sanmina-sci.com From: don_borow...@selinc.com Sent: Friday, January 17, 2003 8:38 AM If polymeric hardware can't handle the heat, one could use ceramic hardware. I just received some product info from a company called Ceramco www.ceramcoceramics.com that among other things produces a line of ceramic nuts, bolts and washers. Don Borowski This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Ron Pickard: emc-p...@hypercom.com Dave Heald: davehe...@attbi.com For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: http://ieeepstc.mindcruiser.com/ Click on browse and then emc-pstc mailing list
RE: Is this a case of basic insulation?
I assume this is an off line switcher. If so, the FET is at mains potential and the required creepage and clearance distances is the same as the hot-to-ground creepage requirement(4 mm or is it 3 mm? for creepage). I would not use the chassis as a heatsink myself. Even dirt cheap PC power supplies don't do this. But if you must, is a heatsink pad defined as single insulated? You might need two pads to constitute double insulation. Another route is to use a full-pack FET (already encased in an insulating material) along with a pad. But do we define creepage under the assumption that one insulation layer has a defect? If so then the full-pack and pad will not do if we assume that the pad has a defect. The FET could be held with a clamp of some sort. This FET-insulation-chassis arrangement will have quite a bit of thermal resistance You can calculate this and might find that you are better off thermally and cost-wise with a small heatsink attached directly to the FET and floating at mains potential. To reduce the E-field noise being thrown around, by the heatsink connected to the FET Drain, you can use a full-pack FET and connect the heatsink to the floating circuit common. In this case you will not need a pad and I wouldn't bother with heatsink paste. A package such as a TO220 or TO218, when mounted on a flat heatsink, will work just fine without that messy paste. I also wouldn't worry about the junction temp if it is 100 C and even 125 C is acceptable. I see engineers spending too much time and money trying to keep junction temperatures luke warm. I can get into a whole page on reliability in the real world (and how to calculate it and how some methods are bogus) but will spare you at this time. Dave Cuthbert Micron Technology From: Peter L. Tarver [mailto:peter.tar...@sanmina-sci.com] Sent: Friday, January 17, 2003 8:26 AM To: EMC-PSTC (E-mail) Subject: RE: Is this a case of basic insulation? Vic - Your assumption that at least Basic insulation is required is correct. However, creepage distances are based on rms voltages, not peak. The below assumes that the voltages you mentioned are present on the heatsink of the FET. Assuming that a true rms meter will indicate an rms voltage between 250 Vrms and 300 Vrms, the minimum require creepage from Table 2L is 3.2 mm. Based on the peak voltage you mentioned, the minimum required clearance distance from Table 2H is 2.0 mm, plus the added distance from Table 2J of 0.2, gives a total minimum clearance distance of 2.2 mm. Without knowing the particulars of the FET and its heatsink in any great detail, an insulating pad is an appropriate and common means of complying with the standard. Unless you can demonstrate that the pad will not compress to less than 3.2 mm thickness in the application, you'll probably need a shouldered washer or something similar to add additional creepage between the screw shank and the FET's heatsink. Polymeric screws are available, but I can't speak regarding their use in an elevated temperature. Regards, Peter L. Tarver, PE Product Safety Manager Sanmina-SCI Homologation Services San Jose, CA peter.tar...@sanmina-sci.com -Original Message- From: Gibling, Vic Sent: Friday, January 17, 2003 12:00 AM We drive a FET based H-bridge from rectified 230VAC mains; thus 320Vpk across the bridge. We have assumed the insulation between the rectified power return and chassis (Class 1 product) is basic, thus requiring 4mm creepage (IEC950). The proposed FETs need to be attached to a heat sink and we would like to use the chassis for this purpose. Our problem is that the FETs have around 2mm creepage between their exposed heatsink surface and the fixing screw, insufficient to meet the basic insulation creepage distance. Is our interpretation regarding basic insulation correct/reasonable? If we use an insulative thermal pad between the FET and chassis, does the compression of the pad exclude the air path thus offering sufficient protection? I am aware of such pads offering 4.5kV breakdown. Thank you Vic Gibling Compliance Engineer e2v technologies Ltd Waterhouse Lane Chelmsford ESSEX CM1 2QU Telephone: +44 (0) 01245 493493 Direct Line: +44 (0) 01245 453352 Facsimile: +44 (0) 01245 453410 E-mail: vic.gibl...@e2vtechnologies.com Internet: www.e2vtechnologies.com --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Ron Pickard: emc-p...@hypercom.com Dave Heald: davehe...@attbi.com For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher
RE: Is this a case of basic insulation?
If polymeric hardware can't handle the heat, one could use ceramic hardware. I just received some product info from a company called Ceramco www.ceramcoceramics.com that among other things produces a line of ceramic nuts, bolts and washers. Don Borowski Schweitzer Engineering Labs Pullman, WA Peter L. Tarver peter.tar...@sanmina-sci.com@majordomo.ieee.org on 01/17/2003 07:26:25 AM Please respond to Peter L. Tarver peter.tar...@sanmina-sci.com Sent by:owner-emc-p...@majordomo.ieee.org To:EMC-PSTC \(E-mail\) emc-p...@majordomo.ieee.org cc: Subject:RE: Is this a case of basic insulation? Vic - Your assumption that at least Basic insulation is required is correct. However, creepage distances are based on rms voltages, not peak. The below assumes that the voltages you mentioned are present on the heatsink of the FET. Assuming that a true rms meter will indicate an rms voltage between 250 Vrms and 300 Vrms, the minimum require creepage from Table 2L is 3.2 mm. Based on the peak voltage you mentioned, the minimum required clearance distance from Table 2H is 2.0 mm, plus the added distance from Table 2J of 0.2, gives a total minimum clearance distance of 2.2 mm. Without knowing the particulars of the FET and its heatsink in any great detail, an insulating pad is an appropriate and common means of complying with the standard. Unless you can demonstrate that the pad will not compress to less than 3.2 mm thickness in the application, you'll probably need a shouldered washer or something similar to add additional creepage between the screw shank and the FET's heatsink. Polymeric screws are available, but I can't speak regarding their use in an elevated temperature. Regards, Peter L. Tarver, PE Product Safety Manager Sanmina-SCI Homologation Services San Jose, CA peter.tar...@sanmina-sci.com -Original Message- From: Gibling, Vic Sent: Friday, January 17, 2003 12:00 AM We drive a FET based H-bridge from rectified 230VAC mains; thus 320Vpk across the bridge. We have assumed the insulation between the rectified power return and chassis (Class 1 product) is basic, thus requiring 4mm creepage (IEC950). The proposed FETs need to be attached to a heat sink and we would like to use the chassis for this purpose. Our problem is that the FETs have around 2mm creepage between their exposed heatsink surface and the fixing screw, insufficient to meet the basic insulation creepage distance. Is our interpretation regarding basic insulation correct/reasonable? If we use an insulative thermal pad between the FET and chassis, does the compression of the pad exclude the air path thus offering sufficient protection? I am aware of such pads offering 4.5kV breakdown. Thank you Vic Gibling Compliance Engineer e2v technologies Ltd Waterhouse Lane Chelmsford ESSEX CM1 2QU Telephone: +44 (0) 01245 493493 Direct Line: +44 (0) 01245 453352 Facsimile: +44 (0) 01245 453410 E-mail: vic.gibl...@e2vtechnologies.com Internet: www.e2vtechnologies.com --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Ron Pickard: emc-p...@hypercom.com Dave Heald: davehe...@attbi.com For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: http://ieeepstc.mindcruiser.com/ Click on browse and then emc-pstc mailing list This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Ron Pickard: emc-p...@hypercom.com Dave Heald: davehe...@attbi.com For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: http://ieeepstc.mindcruiser.com/ Click on browse and then emc-pstc mailing list This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Ron Pickard: emc-p...@hypercom.com Dave Heald: davehe
RE: Is this a case of basic insulation?
Vic - Your assumption that at least Basic insulation is required is correct. However, creepage distances are based on rms voltages, not peak. The below assumes that the voltages you mentioned are present on the heatsink of the FET. Assuming that a true rms meter will indicate an rms voltage between 250 Vrms and 300 Vrms, the minimum require creepage from Table 2L is 3.2 mm. Based on the peak voltage you mentioned, the minimum required clearance distance from Table 2H is 2.0 mm, plus the added distance from Table 2J of 0.2, gives a total minimum clearance distance of 2.2 mm. Without knowing the particulars of the FET and its heatsink in any great detail, an insulating pad is an appropriate and common means of complying with the standard. Unless you can demonstrate that the pad will not compress to less than 3.2 mm thickness in the application, you'll probably need a shouldered washer or something similar to add additional creepage between the screw shank and the FET's heatsink. Polymeric screws are available, but I can't speak regarding their use in an elevated temperature. Regards, Peter L. Tarver, PE Product Safety Manager Sanmina-SCI Homologation Services San Jose, CA peter.tar...@sanmina-sci.com -Original Message- From: Gibling, Vic Sent: Friday, January 17, 2003 12:00 AM We drive a FET based H-bridge from rectified 230VAC mains; thus 320Vpk across the bridge. We have assumed the insulation between the rectified power return and chassis (Class 1 product) is basic, thus requiring 4mm creepage (IEC950). The proposed FETs need to be attached to a heat sink and we would like to use the chassis for this purpose. Our problem is that the FETs have around 2mm creepage between their exposed heatsink surface and the fixing screw, insufficient to meet the basic insulation creepage distance. Is our interpretation regarding basic insulation correct/reasonable? If we use an insulative thermal pad between the FET and chassis, does the compression of the pad exclude the air path thus offering sufficient protection? I am aware of such pads offering 4.5kV breakdown. Thank you Vic Gibling Compliance Engineer e2v technologies Ltd Waterhouse Lane Chelmsford ESSEX CM1 2QU Telephone: +44 (0) 01245 493493 Direct Line: +44 (0) 01245 453352 Facsimile: +44 (0) 01245 453410 E-mail: vic.gibl...@e2vtechnologies.com Internet: www.e2vtechnologies.com --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Ron Pickard: emc-p...@hypercom.com Dave Heald: davehe...@attbi.com For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: http://ieeepstc.mindcruiser.com/ Click on browse and then emc-pstc mailing list This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Ron Pickard: emc-p...@hypercom.com Dave Heald: davehe...@attbi.com For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: http://ieeepstc.mindcruiser.com/ Click on browse and then emc-pstc mailing list
Is this a case of basic insulation?
Hi to you all, We would appreciate your views please. We drive a FET based H-bridge from rectified 230VAC mains; thus 320Vpk across the bridge. We have assumed the insulation between the rectified power return and chassis (Class 1 product) is basic, thus requiring 4mm creepage (IEC950). The proposed FETs need to be attached to a heat sink and we would like to use the chassis for this purpose. Our problem is that the FETs have around 2mm creepage between their exposed heatsink surface and the fixing screw, insufficient to meet the basic insulation creepage distance. Is our interpretation regarding basic insulation correct/reasonable? If we use an insulative thermal pad between the FET and chassis, does the compression of the pad exclude the air path thus offering sufficient protection? I am aware of such pads offering 4.5kV breakdown. Thank you Vic Gibling Compliance Engineer e2v technologies Ltd Waterhouse Lane Chelmsford ESSEX CM1 2QU Telephone: +44 (0) 01245 493493 Direct Line: +44 (0) 01245 453352 Facsimile: +44 (0) 01245 453410 E-mail: vic.gibl...@e2vtechnologies.com Internet: www.e2vtechnologies.com This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Ron Pickard: emc-p...@hypercom.com Dave Heald: davehe...@attbi.com For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: http://ieeepstc.mindcruiser.com/ Click on browse and then emc-pstc mailing list
