Re: IEC 950 Insulation Requirements
George and Rich, I have a memo from UL that they accept UL Recognized multilayer boards in lieu of the tests in 2.9.7. Basically they state that the bond strength tests in UL796 (standard for PWBs) are not equivalent to the bond strength tests in Clause 2.9.7 of UL1950, but that the multilayer board is accepted as a Recognized Component meeting US component standard. However, for supplementary or double/reinforced insulation reuirements you must ensure compliance with the minimum 0.4 mm distance through insulation requirements. Best Regards, Hi George: Along this line, I was asked, if placing power and ground traces on separate (PCB) layers would be an acceptable way of reducing clearance requirements between (gndpwr) traces. Is there anyway to anticipate clearance between PCB layers of a multi layered board? Is there a need to as far as 950 is concerned? I haven't been able to find anything that mentions this. Supposedly, the insulation between traces on separate PCB layers should constitute solid insulation (not clearance). Therefore, the requirements of Sub-clause 2.9.4.1 should apply. Depending on the insulation, the 0.4 mm requirement for reinforced solid insulation may apply. (There is no dimensional requirement for solid basic insulation.) This is a three-dimensional problem. The 0.4 mm applies in all three dimensions with respect to plated-through holes. Also, at the edges of the board, the construction must meet the applicable creepage distance if the inner layer conductors extend to the edge of the board. The issue is complicated by certification houses who require proof that the insulation bonds within the board comply with Sub-clause 2.9.7, spacings filled by insulating compound. This sub-clause requires proof that no voids or cracks are likely in the solid insulation provided by the prepreg layers. Such PCB multilayer construction may be difficult to prove. You should take up this question with your certifier, as the applicability of the requirements to multi-layer PCBs may vary with the certifier. (UL 1950 Second Edition Application Guidelines, number 2.9.4-001 implies acceptance of multi-layer glass fiber PCBs as supplementary or reinforced insulation between layers. However, this same guideline does not appear in the current Guidelines.) I'm surprised the PCB design would require power and ground on separate layers. Most primary power circuits can be adequately insulated from ground without using multi-layer technology. In my experience, the only use of ground in power supply circuits is for the return of the Y capacitors, which need not have 25-amp capability. But, if the power circuit is a secondary power circuit, then such construction may effectively use multi-layer technology. Best regards, Rich - Richard Nute Product Safety Engineer Hewlett-Packard Company Product Regulations Group AiO Division Tel : +1 619 655 3329 Effective 6/12/99: +1 858 655 3329 16399 West Bernardo Drive FAX : +1 619 655 4979 Effective 6/12/99: +1 858 655 4979 San Diego, California 92127 e-mail: ri...@sdd.hp.com - - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: unsubscribe emc-pstc (without the quotes). For help, send mail to ed.pr...@cubic.com, j...@gwmail.monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators). PETER S. MERGUERIAN MANAGING DIRECTOR PRODUCT TESTING DIVISION I.T.L. (PRODUCT TESTING) LTD. HACHAROSHET 26, P.O.B. 211 OR YEHUDA 60251, ISRAEL TEL: 972-3-5339022 FAX: 972-3-5339019 E-MAIL: pe...@itl.co.il Visit our Website: http://www.itl.co.il - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: unsubscribe emc-pstc (without the quotes). For help, send mail to ed.pr...@cubic.com, j...@gwmail.monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
RE: IEC 950 Insulation Requirements
Thanks to all who responded ! Your help is greatly appreciated. George - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: unsubscribe emc-pstc (without the quotes). For help, send mail to ed.pr...@cubic.com, j...@gwmail.monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
RE: IEC 950 Insulation Requirements
George, Clause 2.9.4.3 of UL 1950 addresses PWB insulation as follows: Supplementary or Reinforced insulation between conductor layers in single-layer and multi-layer printed boards shall meet one of the following requirements. Either: - the insulation shall have a minimum distance through insulation of 0.4mm, or - the insulation shall comprise two or more layers of prepreg or other thin sheet insulating material. There is no requirement for distance through insulation of individual layers nor the overall insulation. The overall insulation in the finished printed board shall pass the appropriate electric strength test of 5.3.2. Printed boards having supplementary or reinforced insulation comprising of fewer than three layers of prepreg or other thin sheet insulating material shall be subjected to routine testing for electric strength. Printed boards employing thin sheet insulating material other than prepreg shall pass the thermal ageing and thermal cycling tests of 2.9.5. If you pass a hipot test between the layers you should be okay. Patty Elliot Qualcomm, Inc. p...@qualcomm.com At 12:51 PM 4/13/99 -0400, Sparacino,George wrote: Hello Group, Along this line, I was asked, if placing power and ground traces on separate (PCB) layers would be an acceptable way of reducing clearance requirements between (gndpwr) traces. Is there anyway to anticipate clearance between PCB layers of a multi layered board? Is there a need to as far as 950 is concerned? I haven't been able to find anything that mentions this. I would appreciate any input on this issue. Thanks, George -Original Message- From:jrbar...@lexmark.com [SMTP:jrbar...@lexmark.com] Sent:Monday, April 12, 1999 2:14 PM To: emc-p...@majordomo.ieee.org Subject: Re: IEC 950 Insulation Requirements Donald, The numeric suffixes key Table 0.1 to Figure 5A: * OP1 through OP6 are all OPERATIONAL INSULATION (clause 1.2.9.1) which does not provide protection from electric shock. * B1 through B8 are all BASIC INSULATION (clause 1.2.9.2) which provides one level of protection from electric shock. * S1 and S2 are both SUPPLEMENTARY INSULATION (clause 1.2.9.3) which provides a second level of protection from electric shock. * R1 through R4 are all REINFORCED INSULATION (clause 1.2.9.5), which is equivalent to DOUBLE INSULATION (clause 1.2.9.4), which consists of BASIC plus SUPPLEMENTARY INSULATION. * S/R is SUPPLEMENTARY or REINFORCED INSULATION that meets Table 0.1 notes 3 4. The insulation requirements cover not only the expected peak voltages, but also the transient voltages that may appear on the different circuits. They also cover the possibility of a pinhole or insufficient overlap of the insulation permitting an arc to occur. Insulation requirements are mainly covered by IEC 950: * Section 2.9 Clearances, creepage distances and distances through insulation. * Section 5.3 Electric strength. * Section 5.4 Abnormal operating and fault conditions. * Annex F (normative) Measurement of creepage distances and clearances. Clearance is distance through the air. If an arc occurs, and then stops, the air is assumed to completely return to normal. Creepage is distance over the surface of an insulator. If an arc occurs and then stops there can be damage that leaves the surface conductive or otherwise more prone to arc again. The required creepage distances are a function of: * Transient voltages. * Pollution class-- how much crud can build up on a surface its likelihood of getting wet. * Comparative Tracking Index (CTI)-- how badly insulator gets damaged by an arc. John Barnes Advisory Engineer Lexmark International donald%hq.rossvideo@interlock.lexmark.com on 04/12/99 11:11:56 AM Please respond to donald%hq.rossvideo@interlock.lexmark.com To: emc-pstc%majordomo.ieee@interlock.lexmark.com cc:(bcc: John Barnes/Lex/Lexmark) Subject: IEC 950 Insulation Requirements I have just received a copy of the IEC 950 standard and after reviewing the insulation requirements outlined in section 2.2.6 I have a question that the group maybe able to shed some light on. The question relates to the two table 0.1 and Table 5 which is intended to give examples for the application of the various insulation requirements. In the two table it appears there are numerical reference to the different categories of insulation, for example OP1, OP2, B1, B2 etc. I have reviewed the entire standard and I can not find any other reference other then these tables to these numerical references of the different categories of insulation. Could some one provide some insight in the the intent and use of these tables? Are the numerical references simply to identify
Re: IEC 950 Insulation Requirements
Hi George: Along this line, I was asked, if placing power and ground traces on separate (PCB) layers would be an acceptable way of reducing clearance requirements between (gndpwr) traces. Is there anyway to anticipate clearance between PCB layers of a multi layered board? Is there a need to as far as 950 is concerned? I haven't been able to find anything that mentions this. Supposedly, the insulation between traces on separate PCB layers should constitute solid insulation (not clearance). Therefore, the requirements of Sub-clause 2.9.4.1 should apply. Depending on the insulation, the 0.4 mm requirement for reinforced solid insulation may apply. (There is no dimensional requirement for solid basic insulation.) This is a three-dimensional problem. The 0.4 mm applies in all three dimensions with respect to plated-through holes. Also, at the edges of the board, the construction must meet the applicable creepage distance if the inner layer conductors extend to the edge of the board. The issue is complicated by certification houses who require proof that the insulation bonds within the board comply with Sub-clause 2.9.7, spacings filled by insulating compound. This sub-clause requires proof that no voids or cracks are likely in the solid insulation provided by the prepreg layers. Such PCB multilayer construction may be difficult to prove. You should take up this question with your certifier, as the applicability of the requirements to multi-layer PCBs may vary with the certifier. (UL 1950 Second Edition Application Guidelines, number 2.9.4-001 implies acceptance of multi-layer glass fiber PCBs as supplementary or reinforced insulation between layers. However, this same guideline does not appear in the current Guidelines.) I'm surprised the PCB design would require power and ground on separate layers. Most primary power circuits can be adequately insulated from ground without using multi-layer technology. In my experience, the only use of ground in power supply circuits is for the return of the Y capacitors, which need not have 25-amp capability. But, if the power circuit is a secondary power circuit, then such construction may effectively use multi-layer technology. Best regards, Rich - Richard Nute Product Safety Engineer Hewlett-Packard Company Product Regulations Group AiO Division Tel : +1 619 655 3329 Effective 6/12/99: +1 858 655 3329 16399 West Bernardo Drive FAX : +1 619 655 4979 Effective 6/12/99: +1 858 655 4979 San Diego, California 92127 e-mail: ri...@sdd.hp.com - - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: unsubscribe emc-pstc (without the quotes). For help, send mail to ed.pr...@cubic.com, j...@gwmail.monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
RE: IEC 950 Insulation Requirements
Hello Group, Along this line, I was asked, if placing power and ground traces on separate (PCB) layers would be an acceptable way of reducing clearance requirements between (gndpwr) traces. Is there anyway to anticipate clearance between PCB layers of a multi layered board? Is there a need to as far as 950 is concerned? I haven't been able to find anything that mentions this. I would appreciate any input on this issue. Thanks, George -Original Message- From: jrbar...@lexmark.com [SMTP:jrbar...@lexmark.com] Sent: Monday, April 12, 1999 2:14 PM To: emc-p...@majordomo.ieee.org Subject: Re: IEC 950 Insulation Requirements Donald, The numeric suffixes key Table 0.1 to Figure 5A: * OP1 through OP6 are all OPERATIONAL INSULATION (clause 1.2.9.1) which does not provide protection from electric shock. * B1 through B8 are all BASIC INSULATION (clause 1.2.9.2) which provides one level of protection from electric shock. * S1 and S2 are both SUPPLEMENTARY INSULATION (clause 1.2.9.3) which provides a second level of protection from electric shock. * R1 through R4 are all REINFORCED INSULATION (clause 1.2.9.5), which is equivalent to DOUBLE INSULATION (clause 1.2.9.4), which consists of BASIC plus SUPPLEMENTARY INSULATION. * S/R is SUPPLEMENTARY or REINFORCED INSULATION that meets Table 0.1 notes 3 4. The insulation requirements cover not only the expected peak voltages, but also the transient voltages that may appear on the different circuits. They also cover the possibility of a pinhole or insufficient overlap of the insulation permitting an arc to occur. Insulation requirements are mainly covered by IEC 950: * Section 2.9 Clearances, creepage distances and distances through insulation. * Section 5.3 Electric strength. * Section 5.4 Abnormal operating and fault conditions. * Annex F (normative) Measurement of creepage distances and clearances. Clearance is distance through the air. If an arc occurs, and then stops, the air is assumed to completely return to normal. Creepage is distance over the surface of an insulator. If an arc occurs and then stops there can be damage that leaves the surface conductive or otherwise more prone to arc again. The required creepage distances are a function of: * Transient voltages. * Pollution class-- how much crud can build up on a surface its likelihood of getting wet. * Comparative Tracking Index (CTI)-- how badly insulator gets damaged by an arc. John Barnes Advisory Engineer Lexmark International donald%hq.rossvideo@interlock.lexmark.com on 04/12/99 11:11:56 AM Please respond to donald%hq.rossvideo@interlock.lexmark.com To: emc-pstc%majordomo.ieee@interlock.lexmark.com cc:(bcc: John Barnes/Lex/Lexmark) Subject: IEC 950 Insulation Requirements I have just received a copy of the IEC 950 standard and after reviewing the insulation requirements outlined in section 2.2.6 I have a question that the group maybe able to shed some light on. The question relates to the two table 0.1 and Table 5 which is intended to give examples for the application of the various insulation requirements. In the two table it appears there are numerical reference to the different categories of insulation, for example OP1, OP2, B1, B2 etc. I have reviewed the entire standard and I can not find any other reference other then these tables to these numerical references of the different categories of insulation. Could some one provide some insight in the the intent and use of these tables? Are the numerical references simply to identify various circuits to circuit situations and which of the five categories of insulation applies? Thanks before hand Donald McElheran Product Engineering Ross Video Ltd. - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: unsubscribe emc-pstc (without the quotes). For help, send mail to ed.pr...@cubic.com, j...@gwmail.monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators). - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: unsubscribe emc-pstc (without the quotes). For help, send mail to ed.pr...@cubic.com, j...@gwmail.monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators). - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: unsubscribe emc-pstc (without the quotes). For help, send mail to ed.pr...@cubic.com, j...@gwmail.monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list
Re: IEC 950 Insulation Requirements
Donald, The numeric suffixes key Table 0.1 to Figure 5A: * OP1 through OP6 are all OPERATIONAL INSULATION (clause 1.2.9.1) which does not provide protection from electric shock. * B1 through B8 are all BASIC INSULATION (clause 1.2.9.2) which provides one level of protection from electric shock. * S1 and S2 are both SUPPLEMENTARY INSULATION (clause 1.2.9.3) which provides a second level of protection from electric shock. * R1 through R4 are all REINFORCED INSULATION (clause 1.2.9.5), which is equivalent to DOUBLE INSULATION (clause 1.2.9.4), which consists of BASIC plus SUPPLEMENTARY INSULATION. * S/R is SUPPLEMENTARY or REINFORCED INSULATION that meets Table 0.1 notes 3 4. The insulation requirements cover not only the expected peak voltages, but also the transient voltages that may appear on the different circuits. They also cover the possibility of a pinhole or insufficient overlap of the insulation permitting an arc to occur. Insulation requirements are mainly covered by IEC 950: * Section 2.9 Clearances, creepage distances and distances through insulation. * Section 5.3 Electric strength. * Section 5.4 Abnormal operating and fault conditions. * Annex F (normative) Measurement of creepage distances and clearances. Clearance is distance through the air. If an arc occurs, and then stops, the air is assumed to completely return to normal. Creepage is distance over the surface of an insulator. If an arc occurs and then stops there can be damage that leaves the surface conductive or otherwise more prone to arc again. The required creepage distances are a function of: * Transient voltages. * Pollution class-- how much crud can build up on a surface its likelihood of getting wet. * Comparative Tracking Index (CTI)-- how badly insulator gets damaged by an arc. John Barnes Advisory Engineer Lexmark International donald%hq.rossvideo@interlock.lexmark.com on 04/12/99 11:11:56 AM Please respond to donald%hq.rossvideo@interlock.lexmark.com To: emc-pstc%majordomo.ieee@interlock.lexmark.com cc:(bcc: John Barnes/Lex/Lexmark) Subject: IEC 950 Insulation Requirements I have just received a copy of the IEC 950 standard and after reviewing the insulation requirements outlined in section 2.2.6 I have a question that the group maybe able to shed some light on. The question relates to the two table 0.1 and Table 5 which is intended to give examples for the application of the various insulation requirements. In the two table it appears there are numerical reference to the different categories of insulation, for example OP1, OP2, B1, B2 etc. I have reviewed the entire standard and I can not find any other reference other then these tables to these numerical references of the different categories of insulation. Could some one provide some insight in the the intent and use of these tables? Are the numerical references simply to identify various circuits to circuit situations and which of the five categories of insulation applies? Thanks before hand Donald McElheran Product Engineering Ross Video Ltd. - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: unsubscribe emc-pstc (without the quotes). For help, send mail to ed.pr...@cubic.com, j...@gwmail.monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators). - This message is coming from the emc-pstc discussion list. To cancel your subscription, send mail to majord...@ieee.org with the single line: unsubscribe emc-pstc (without the quotes). For help, send mail to ed.pr...@cubic.com, j...@gwmail.monarch.com, ri...@sdd.hp.com, or roger.volgst...@compaq.com (the list administrators).
