date:20160319

Re: [fpc-devel] Implementing SHA256 Unit.

2016-03-19 Thread Garry Wood

>I'm trying to write a sha256 implementation in pure pascal like sha1 and md5 
>units.
>With negative results.
>Someone can helpme with this?

 I recently ported the implementation from LibTimCrypt / wpa_supplicant (which 
are both from public domain implementations), you can find the unit here:

https://github.com/ultibohub/Core/blob/master/source/rtl/ultibo/core/crypto.pas

This is for our Ultibo embedded project but the code is pure pascal and should 
compile for any platform if you adjust the uses clause.

This has been validated against a number of test vectors available from 
different sources and seems correct although I can’t test on big endian CPU at 
present. The unit also includes ports of AES, DES, DES3 and RC4 ciphers as well 
as MD5 and SHA1.

Cheers,

Garry.
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Re: [fpc-devel] STM32F407 fun

2016-03-19 Thread Andrew Haines


On 03/19/2016 09:20 AM, Michael Ring wrote:
OK, seems you are not using trunk or an outdated version of trunk as 
there are quite a number of units for stm32f4 available in current trunk:


stm32f401xx.pp
stm32f407xx.pp
stm32f411xe.pp
stm32f429xx.pp
stm32f446xx.pp

So I'd recomment to either upgrade to current trunk or at least copy 
the unit specially made for your chip to your installation and compile 
it by adding it to the list of controller units in the embedded rtl 
makefile and changing controllerunitstr to match the correct filename.


Ok I updated. I was using a trunk version from late October. Fpc is 
moving pretty fast.


Good that we agree that 128MB is the right memory size, I first 
thought that you are using trunk and that the 128MB configured in the 
cpuinfo are wrong and instead 112MB is correct.
I haven't compiled for this chip for a while, I am mostly targeting 
f401, f411 and lately the f469 chips (I really like the STM32F469 
Discovery board) these days...




I've had this board for probably 6 years sitting waiting for me to do 
something with it. A year or two ago I got a HD44780 lcd to work with it 
using gcc. But didn't go further with it than that. I'm pretty 
inexperienced with embedded stuff.


Andrew
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Re: [fpc-devel] STM32F407 fun

2016-03-19 Thread Michael Ring


Aehm, and yes, I meant 128kb, not 128MB ;-)

Michael

Am 19.03.16 um 14:20 schrieb Michael Ring:
OK, seems you are not using trunk or an outdated version of trunk as 
there are quite a number of units for stm32f4 available in current trunk:


stm32f401xx.pp
stm32f407xx.pp
stm32f411xe.pp
stm32f429xx.pp
stm32f446xx.pp

So I'd recomment to either upgrade to current trunk or at least copy 
the unit specially made for your chip to your installation and compile 
it by adding it to the list of controller units in the embedded rtl 
makefile and changing controllerunitstr to match the correct filename.


Good that we agree that 128MB is the right memory size, I first 
thought that you are using trunk and that the 128MB configured in the 
cpuinfo are wrong and instead 112MB is correct.
I haven't compiled for this chip for a while, I am mostly targeting 
f401, f411 and lately the f469 chips (I really like the STM32F469 
Discovery board) these days...


Michael

Am 19.03.16 um 14:03 schrieb Andrew Haines:

On 03/19/2016 07:36 AM, Michael Ring wrote:

Re-reading your initial mail I am kind of wondering what you 
actually did ?


When using -WpSTM32F407VG you will automagially use stm32f407xx.pp unit
which is the correct one for your chip and also stack should be correct
as ram size is set to 128MB.



First off thanks for looking at this. I'm not sure where you are 
getting 128MB...?



How/why did you use STM32F429 unit for the chip?


There was no entry in fpc for STM32F407VG. I added
+  (controllertypestr:'STM32F407VG'; 
controllerunitstr:'STM32F429';cputype:cpu_armv7em; 
fputype:fpu_soft; flashbase:$0800; flashsize:$0008; 
srambase:$2000; sramsize:$0002),




Michael



Am 19.03.16 um 12:36 schrieb Michael Ring:
/Are you sure about RAM? I checked in cpuinfo, it is set to 128MB, 
this />>/matches what is written in the user manual, (Page 70) 
/>>//>>/http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00037051.pdf 



/>>//>>

On the first page of that link under memories it says:

Up to 192+4 Kbytes of SRAM including 64-
Kbyte of CCM (core coupled memory) data
RAM.

Looking in the C header file stm32f4xx.h I find:
#define CCMDATARAM_BASE   ((uint32_t)0x1000) /*!< CCM(core 
coupled memory) data RAM(64 KB) base address in the alias region  */
#define SRAM1_BASE((uint32_t)0x2000) /*!< SRAM1(112 
KB) base address in the alias region */
#define SRAM2_BASE((uint32_t)0x2001C000) /*!< SRAM2(16 
KB) base address in the alias region  */


So starting from SRAM1_BASE there is 128kB of contiguous memory.

1024 * 128 = $2

Looking at 
http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00071990.pdf 
for STM32F429VG is says:

 Up to 256+4 KB of SRAM including 64-KB
of CCM (core coupled memory) data RAM

I couldn't find a specific header for the *29 chip but I'm assuming 
the extra 64kB memory it has is in that block so there is 192kB of 
memory. This matches the define for the *29 chip:
(controllertypestr:'STM32F429XG'; 
controllerunitstr:'STM32F429';cputype:cpu_armv7em; 
fputype:fpu_soft; flashbase:$0800; flashsize:$0010; 
srambase:$2000; sramsize:$0003),


1024 * 192 = $3


//>>/or are the last 16k for some special use? Could not find a hint 
while />>/quickly searching through the manual. />>//>>/Michael />>


I attached the changes I made to include the stm32f407vg chip in fpc.



Andrew




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Re: [fpc-devel] STM32F407 fun

2016-03-19 Thread Michael Ring

OK, seems you are not using trunk or an outdated version of trunk as 
there are quite a number of units for stm32f4 available in current trunk:


stm32f401xx.pp
stm32f407xx.pp
stm32f411xe.pp
stm32f429xx.pp
stm32f446xx.pp

So I'd recomment to either upgrade to current trunk or at least copy the 
unit specially made for your chip to your installation and compile it by 
adding it to the list of controller units in the embedded rtl makefile 
and changing controllerunitstr to match the correct filename.


Good that we agree that 128MB is the right memory size, I first thought 
that you are using trunk and that the 128MB configured in the cpuinfo 
are wrong and instead 112MB is correct.
I haven't compiled for this chip for a while, I am mostly targeting 
f401, f411 and lately the f469 chips (I really like the STM32F469 
Discovery board) these days...


Michael

Am 19.03.16 um 14:03 schrieb Andrew Haines:

On 03/19/2016 07:36 AM, Michael Ring wrote:

Re-reading your initial mail I am kind of wondering what you actually 
did ?


When using -WpSTM32F407VG you will automagially use stm32f407xx.pp unit
which is the correct one for your chip and also stack should be correct
as ram size is set to 128MB.



First off thanks for looking at this. I'm not sure where you are 
getting 128MB...?



How/why did you use STM32F429 unit for the chip?


There was no entry in fpc for STM32F407VG. I added
+  (controllertypestr:'STM32F407VG'; 
controllerunitstr:'STM32F429';cputype:cpu_armv7em; 
fputype:fpu_soft; flashbase:$0800; flashsize:$0008; 
srambase:$2000; sramsize:$0002),




Michael



Am 19.03.16 um 12:36 schrieb Michael Ring:
/Are you sure about RAM? I checked in cpuinfo, it is set to 128MB, 
this />>/matches what is written in the user manual, (Page 70) 
/>>//>>/http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00037051.pdf 



/>>//>>

On the first page of that link under memories it says:

Up to 192+4 Kbytes of SRAM including 64-
Kbyte of CCM (core coupled memory) data
RAM.

Looking in the C header file stm32f4xx.h I find:
#define CCMDATARAM_BASE   ((uint32_t)0x1000) /*!< CCM(core 
coupled memory) data RAM(64 KB) base address in the alias region  */
#define SRAM1_BASE((uint32_t)0x2000) /*!< SRAM1(112 
KB) base address in the alias region */
#define SRAM2_BASE((uint32_t)0x2001C000) /*!< SRAM2(16 KB) 
base address in the alias region  */


So starting from SRAM1_BASE there is 128kB of contiguous memory.

1024 * 128 = $2

Looking at 
http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00071990.pdf 
for STM32F429VG is says:

 Up to 256+4 KB of SRAM including 64-KB
of CCM (core coupled memory) data RAM

I couldn't find a specific header for the *29 chip but I'm assuming 
the extra 64kB memory it has is in that block so there is 192kB of 
memory. This matches the define for the *29 chip:
(controllertypestr:'STM32F429XG'; 
controllerunitstr:'STM32F429';cputype:cpu_armv7em; 
fputype:fpu_soft; flashbase:$0800; flashsize:$0010; 
srambase:$2000; sramsize:$0003),


1024 * 192 = $3


//>>/or are the last 16k for some special use? Could not find a hint 
while />>/quickly searching through the manual. />>//>>/Michael />>


I attached the changes I made to include the stm32f407vg chip in fpc.



Andrew




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Re: [fpc-devel] STM32F407 fun

2016-03-19 Thread Andrew Haines


On 03/19/2016 07:36 AM, Michael Ring wrote:


Re-reading your initial mail I am kind of wondering what you actually did ?

When using -WpSTM32F407VG you will automagially use stm32f407xx.pp unit
which is the correct one for your chip and also stack should be correct
as ram size is set to 128MB.



First off thanks for looking at this. I'm not sure where you are getting 
128MB...?


How/why did you use STM32F429 unit for the chip?


There was no entry in fpc for STM32F407VG. I added
+  (controllertypestr:'STM32F407VG'; controllerunitstr:'STM32F429'; 
   cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$0800; 
flashsize:$0008; srambase:$2000; sramsize:$0002),



Michael



Am 19.03.16 um 12:36 schrieb Michael Ring:
/Are you sure about RAM? I checked in cpuinfo, it is set to 128MB, this />>/matches what is written in the user manual, (Page 70) />>//>>/http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00037051.pdf 

/>>//>>

On the first page of that link under memories it says:

Up to 192+4 Kbytes of SRAM including 64-
Kbyte of CCM (core coupled memory) data
RAM.

Looking in the C header file stm32f4xx.h I find:
#define CCMDATARAM_BASE   ((uint32_t)0x1000) /*!< CCM(core coupled 
memory) data RAM(64 KB) base address in the alias region  */
#define SRAM1_BASE((uint32_t)0x2000) /*!< SRAM1(112 KB) base 
address in the alias region */
#define SRAM2_BASE((uint32_t)0x2001C000) /*!< SRAM2(16 KB) base 
address in the alias region  */

So starting from SRAM1_BASE there is 128kB of contiguous memory.

1024 * 128 = $2

Looking at 
http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00071990.pdf
 for STM32F429VG is says:
 Up to 256+4 KB of SRAM including 64-KB
of CCM (core coupled memory) data RAM

I couldn't find a specific header for the *29 chip but I'm assuming the extra 
64kB memory it has is in that block so there is 192kB of memory. This matches 
the define for the *29 chip:
(controllertypestr:'STM32F429XG'; controllerunitstr:'STM32F429';
cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$0800; 
flashsize:$0010; srambase:$2000; sramsize:$0003),

1024 * 192 = $3

 
//>>/or are the last 16k for some special use? Could not find a hint while />>/quickly searching through the manual. />>//>>/Michael />>


I attached the changes I made to include the stm32f407vg chip in fpc.



Andrew


Index: compiler/arm/cpuinfo.pas
===
--- compiler/arm/cpuinfo.pas	(revision 32211)
+++ compiler/arm/cpuinfo.pas	(working copy)
@@ -250,7 +250,9 @@
   ct_stm32f107rc,
   ct_stm32f107vb,
   ct_stm32f107vc,
-  
+
+  ct_stm32f407vg, // 1M flash
+
   ct_stm32f429xe, // 512K flash
   ct_stm32f429xg, // 1M flash
   ct_stm32f429xi, // 2M flash
@@ -644,7 +646,9 @@
   (controllertypestr:'STM32F107RC'; controllerunitstr:'STM32F10X_CL'; cputype:cpu_armv7m; fputype:fpu_soft; flashbase:$0800; flashsize:$0004; srambase:$2000; sramsize:$0001),
   (controllertypestr:'STM32F107VB'; controllerunitstr:'STM32F10X_CL'; cputype:cpu_armv7m; fputype:fpu_soft; flashbase:$0800; flashsize:$0002; srambase:$2000; sramsize:$0001),
   (controllertypestr:'STM32F107VC'; controllerunitstr:'STM32F10X_CL'; cputype:cpu_armv7m; fputype:fpu_soft; flashbase:$0800; flashsize:$0004; srambase:$2000; sramsize:$0001),
-  
+
+  (controllertypestr:'STM32F407VG'; controllerunitstr:'STM32F429';cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$0800; flashsize:$0008; srambase:$2000; sramsize:$0002),
+
   (controllertypestr:'STM32F429XE'; controllerunitstr:'STM32F429';cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$0800; flashsize:$0008; srambase:$2000; sramsize:$0003),
   (controllertypestr:'STM32F429XG'; controllerunitstr:'STM32F429';cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$0800; flashsize:$0010; srambase:$2000; sramsize:$0003),
   (controllertypestr:'STM32F429XI'; controllerunitstr:'STM32F429';cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$0800; flashsize:$0020; srambase:$2000; sramsize:$0003),
Index: compiler/systems/t_embed.pas
===
--- compiler/systems/t_embed.pas	(revision 32211)
+++ compiler/systems/t_embed.pas	(working copy)
@@ -401,7 +401,9 @@
   ct_stm32f107rc,
   ct_stm32f107vb,
   ct_stm32f107vc,
-  
+
+  ct_stm32f407vg,
+
   ct_stm32f429xe,
   ct_stm32f429xg,
   ct_stm32f429xi,

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Re: [fpc-devel] STM32F407 fun

2016-03-19 Thread Andrew Haines


On 03/19/2016 04:19 AM, Jeppe Johansen wrote:

On 03/19/2016 04:47 AM, Andrew Haines wrote:
I'm guessing there is some define I have to use and everything will 
start working :)


Where do I go from here?
You need to remove classes from your used units. It needs a thread 
manager to work.
The default thread manager simply halts the program if anything calls 
it, so that's exactly what you are seeing.

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Ok well that was easy :) It is working now.

Thanks again,

Andrew
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Re: [fpc-devel] Bug 29760 on FPC 3.0 Win64

2016-03-19 Thread LacaK




If you find it useful add it please to "tests/test" and/or replace
"tw28748.pp" (as it is subset of this)
Or give mee feedback what should be changed, added or so.


tests/test/cg/taddcurr.pp contains already most of those tests in a
systematic way.


this test was added after FPC 3.0 release ? If yes, then okay. If not
then this test is not sufficient to catch above mentioned bug


No, this test is much older. That test already checks 
adding/subtracting/multiplying and dividing currency values. Your test 
checks the same with integer/double, but that merely adds type 
conversions from double/integer to currency. It's this type conversion 
that is broken in FPC 3.0, and hence that's what should be tested.


Ok, then I have questions:

1. Is there any example of test, which tests others type conversions, 
which I can adapt to currency ?
2. Or is there someone more experienced than me, who is willing write 
such test ?
3. Is it possible at least as temporary solution copy/paste "my tests" 
to tw28748.pp ?


I think, that it is reasonable make steps that will prevent same error 
to raise again in future ...


Thanks
-Laco.

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Re: [fpc-devel] STM32F407 fun

2016-03-19 Thread Michael Ring


Re-reading your initial mail I am kind of wondering what you actually did ?

When using -WpSTM32F407VG you will automagially use stm32f407xx.pp unit 
which is the correct one for your chip and also stack should be correct 
as ram size is set to 128MB.


How/why did you use STM32F429 unit for the chip?

Michael

Am 19.03.16 um 12:36 schrieb Michael Ring:
Are you sure about RAM? I checked in cpuinfo, it is set to 128MB, this 
matches what is written in the user manual, (Page 70)


http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00037051.pdf 



or are the last 16k for some special use? Could not find a hint while 
quickly searching through the manual.


Michael


Am 19.03.16 um 04:47 schrieb Andrew Haines:

Hi,

I've been trying to get a very simple program to run on my discovery 
board that I've had for a while(STM32F407VG). Using st-util with gdb 
I managed to make some progress.


I've been using the code in fpc for STM32F429 since it's pretty 
similar. My first problem was that the stackpointer was too high. The 
STM32F407VG has 64kb less memory than the STM32F429. I added a define 
in compiler/arm/cpuinfo.pas with the correct info and had it use the 
STM32F429 unit. That fixed my first problem.


The next/current problem is in CommonInit in system.
SynchronizeTimeoutEvent:=RtlEventCreate;

RtlEventCreate has:
result:=currenttm.rtleventcreate();
This produces the assembly:
0x8007e08  push {lr}
(gdb) i registers pc
pc 0x8007e0a0x8007e0a 



0x8007e0a  ldr r0, [pc, #8]
; (0x8007e14 )

(gdb) i registers r0
r0 0x20001dc0   536878528  // the address 1dc0 seems 
reasonable. Location of currenttm+rtleventcreate?


0x8007e0c  ldr r0, [r0, #0] 
(gdb) i registers r0

r0 0x0  0

0x8007e0e  blx r0

For the last instruction r0 is nil. This causes the default interrupt 
handler to be called which loops forever.


backtrace is:
(gdb) bt
#0  0x08007e0e in SYSTEM_$$_RTLEVENTCREATE$$PRTLEVENT ()
#1  0x0800ce5e in CLASSES_$$_COMMONINIT ()
#2  0x08012886 in CLASSES_$$_init ()
#3  0x08007a5c in fpc_initializeunits ()
#4  0x08000294 in main () at blinky.lpr:48

I compiled the crosscompiler with:
make clean  buildbase  CROSSINSTALL=1 CROSSOPT="-XParm-none-eabi-" 
OS_TARGET=embedded CPU_TARGET=arm SUBARCH=armv7em


the program is compiled with
-Oparmv7em
-WpSTM32F407VG

I'm guessing there is some define I have to use and everything will 
start working :)


Where do I go from here?

Thanks in advance,

Andrew Haines


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Re: [fpc-devel] STM32F407 fun

2016-03-19 Thread Michael Ring

Are you sure about RAM? I checked in cpuinfo, it is set to 128MB, this 
matches what is written in the user manual, (Page 70)


http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00037051.pdf

or are the last 16k for some special use? Could not find a hint while 
quickly searching through the manual.


Michael


Am 19.03.16 um 04:47 schrieb Andrew Haines:

Hi,

I've been trying to get a very simple program to run on my discovery 
board that I've had for a while(STM32F407VG). Using st-util with gdb I 
managed to make some progress.


I've been using the code in fpc for STM32F429 since it's pretty 
similar. My first problem was that the stackpointer was too high. The 
STM32F407VG has 64kb less memory than the STM32F429. I added a define 
in compiler/arm/cpuinfo.pas with the correct info and had it use the 
STM32F429 unit. That fixed my first problem.


The next/current problem is in CommonInit in system.
SynchronizeTimeoutEvent:=RtlEventCreate;

RtlEventCreate has:
result:=currenttm.rtleventcreate();
This produces the assembly:
0x8007e08  push   {lr}
(gdb) i registers pc
pc 0x8007e0a0x8007e0a 



0x8007e0a  ldrr0, [pc, 
#8]; (0x8007e14 )

(gdb) i registers r0
r0 0x20001dc0   536878528  // the address 1dc0 seems 
reasonable. Location of currenttm+rtleventcreate?


0x8007e0c  ldrr0, [r0, #0] 
(gdb) i registers r0

r0 0x0  0

0x8007e0e  blxr0

For the last instruction r0 is nil. This causes the default interrupt 
handler to be called which loops forever.


backtrace is:
(gdb) bt
#0  0x08007e0e in SYSTEM_$$_RTLEVENTCREATE$$PRTLEVENT ()
#1  0x0800ce5e in CLASSES_$$_COMMONINIT ()
#2  0x08012886 in CLASSES_$$_init ()
#3  0x08007a5c in fpc_initializeunits ()
#4  0x08000294 in main () at blinky.lpr:48

I compiled the crosscompiler with:
make clean  buildbase  CROSSINSTALL=1 CROSSOPT="-XParm-none-eabi-" 
OS_TARGET=embedded CPU_TARGET=arm SUBARCH=armv7em


the program is compiled with
-Oparmv7em
-WpSTM32F407VG

I'm guessing there is some define I have to use and everything will 
start working :)


Where do I go from here?

Thanks in advance,

Andrew Haines


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[fpc-devel] Bootstrapping aarch64

2016-03-19 Thread Alfred

1: ok; I will put a bootstrapper for aarch64 on fpcup github, for as 
long as needed.

2a: you're right, there is a nice ppca64 (no exe) available !
2b: you talk about 3.0.0; I was not able to compile 3.0.0 for 
aarch64-linux; am I mistaken ?

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Re: [fpc-devel] Bootstrapping aarch64

2016-03-19 Thread Sven Barth

Am 19.03.2016 08:26 schrieb "Alfred" :
>
> After a successful install (with fpclazup) of FPC/Lazarus 64bit on an
Odroid-C2 running Arch Linux 64 bit, I have a few questions.
>
> The initial (bootstrap) compiler was build by cross-compiling (trunk)
from Win32 to Aarch64.
> Only trunk supports aarch64.
>
> So, bootstrap version is 3.1.1. But trunk may only be build by 3.0.0.
>
> Questions/remarks:
>
> 1: As maintainer of fpc(laz)up, I am in need of a public available
bootstrap compiler for aarch64.
> 2: The version check should be suppressed for aarch64 (atm fpc[laz]up
does suppress the check by itself).

Starting trunk's top-level make with the correct options (crossall,
CPU_TARGET, CROSSOPT fot the target flags, etc) and a 3.0.0 should already
result in a native compiler for Aarch64-linux, as the Makefile already does
what you described here (compiling a cross compiler first and then a native
compiler). At the end there should be a ppcrossaarch64.exe and a ppcaarch64
(no .exe!) [Note: I don't know whether the compiler suffix is really
aarch64, as I've never worked with it yet].

There won't be any bootstrap compiler however until the next major version
containing the new platform is released as trunk is a moving target (it can
happen from one revision to the next that trunk can no longer be compiled
by the previous revision).

> 3: Some makefiles of Lazarus where not (yet) able to compile for aarch64
(as I remember correctly: main and lcl/interfaces had no aarch64-linux
target).

You should raise this issue either on the Lazarus mailing list or the bug
tracker.

Regards,
Sven
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Re: [fpc-devel] STM32F407 fun

2016-03-19 Thread Jeppe Johansen


On 03/19/2016 04:47 AM, Andrew Haines wrote:
I'm guessing there is some define I have to use and everything will 
start working :)


Where do I go from here?
You need to remove classes from your used units. It needs a thread 
manager to work.
The default thread manager simply halts the program if anything calls 
it, so that's exactly what you are seeing.

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[fpc-devel] Bootstrapping aarch64

2016-03-19 Thread Alfred

After a successful install (with fpclazup) of FPC/Lazarus 64bit on an 
Odroid-C2 running Arch Linux 64 bit, I have a few questions.


The initial (bootstrap) compiler was build by cross-compiling (trunk) 
from Win32 to Aarch64.

Only trunk supports aarch64.

So, bootstrap version is 3.1.1. But trunk may only be build by 3.0.0.

Questions/remarks:

1: As maintainer of fpc(laz)up, I am in need of a public available 
bootstrap compiler for aarch64.
2: The version check should be suppressed for aarch64 (atm fpc[laz]up 
does suppress the check by itself).
3: Some makefiles of Lazarus where not (yet) able to compile for aarch64 
(as I remember correctly: main and lcl/interfaces had no aarch64-linux 
target).


Thanks.
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Re: [fpc-devel] Implementing SHA256 Unit.

Re: [fpc-devel] STM32F407 fun

Re: [fpc-devel] STM32F407 fun

Re: [fpc-devel] STM32F407 fun

Re: [fpc-devel] STM32F407 fun

Re: [fpc-devel] STM32F407 fun

Re: [fpc-devel] Bug 29760 on FPC 3.0 Win64

Re: [fpc-devel] STM32F407 fun

Re: [fpc-devel] STM32F407 fun

[fpc-devel] Bootstrapping aarch64

Re: [fpc-devel] Bootstrapping aarch64

Re: [fpc-devel] STM32F407 fun

[fpc-devel] Bootstrapping aarch64

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