Re: [OpenRD Ultimate] e1000phy(88E1149/88E1121) has a initialize issue
On Sun, Jun 20, 2010 at 09:15:00PM +0900, Norikatsu Shigemura wrote: Hi yongari. On Tue, 15 Jun 2010 11:09:23 -0700 Pyun YongHyeon pyu...@gmail.com wrote: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Jun 13 05:02:14 sidearms kernel: mge1: watchdog timeout Jun 13 05:02:14 sidearms kernel: mge1: Timeout on link-up ^ This part looks like a bug in mge(4). Driver does not know how long it would take to get a valid link. Waiting for valid link in driver initialization does not work(e.g Starting controller without UTP cable may always fail on mge(4)). I think mge(4) should implement correct link state change handling. Thanks for your pointed out. I didn't notice. I'll fix this issue like following on mge_start_locked(). - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - if ((ifp-if_drv_flags (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != - IFF_DRV_RUNNING) + if (IFM_SUBTYPE(sc-mii-mii_media_active) == IFM_NONE || + (ifp-if_drv_flags (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != IFF_DRV_RUNNING) No, that change may not enough to fix a missing link state handling. mge(4) needs a miibus_statchg KOBJ handler and it requires a lot of code changes in mge(4). - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - I found a initialize issue in e1000phy.c. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - --- sys/dev/mii/e1000phy.c.orig 2010-05-01 10:17:15.282196000 +0900 +++ sys/dev/mii/e1000phy.c2010-06-13 16:19:46.616650536 +0900 @@ -278,6 +278,7 @@ case MII_MODEL_MARVELL_E1118: break; case MII_MODEL_MARVELL_E1116: + case MII_MODEL_MARVELL_E1149: page = PHY_READ(sc, E1000_EADR); /* Select page 3, LED control register. */ PHY_WRITE(sc, E1000_EADR, 3); - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - I confirmed OK on my environment, OpenRD Ultimate has a 88E1121(I saw it, physically): Once it was there but I removed it due to some other issues seen on Yukon Ultra. That part will program LED access so I guess it wouldn't affect normal network activity. Hum..., like following? At least, by current way, second NIC doesn't link-up if link connected. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - case MII_MODEL_MARVELL_E1118: + case MII_MODEL_MARVELL_E1149: break; This change was also backed out due to 88E8072 issue on establishing 100Mbps link. e1000phy(4)'s 88E1149 PHY handling seems to require more work as some Yukon Ultra/Ultra II still have problems. ATM I have no idea whether this issue comes from MAC controller or not. case MII_MODEL_MARVELL_E1116: page = PHY_READ(sc, E1000_EADR); /* Select page 3, LED control register. */ PHY_WRITE(sc, E1000_EADR, 3); - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 88E1116R might be RGMII variant of 88E1116. Because I don't have controller that has 88E1116R I didn't treat it as 88E1116. With that change could you use straight cable without help of MDI/MDI-X converter? Sorry, I don't have 88E1116R machine, so I don't know. Ok. ___ freebsd-current@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-current To unsubscribe, send any mail to freebsd-current-unsubscr...@freebsd.org
Re: [OpenRD Ultimate] e1000phy(88E1149/88E1121) has a initialize issue
Hi Kristof. On Sun, 13 Jun 2010 22:13:31 +0200 Kristof Provost kris...@sigsegv.be wrote: I have a OpenRD Ultimate, which has two GbE ports - if_mge(4). But I couldn't use mge1 like following. So I tried to investigate. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Jun 13 05:02:14 sidearms kernel: mge1: watchdog timeout Jun 13 05:02:14 sidearms kernel: mge1: Timeout on link-up - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - I believe the mge(4) driver incorrectly configures the PHY address for the second interface. Can you give the attached patch a try? Thank you. I think so, too. And, by FDT, I suggest following patch. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - /* Tell the MAC where to find the PHY so autoneg works */ - miisc = LIST_FIRST(sc-mii-mii_phys); - MGE_WRITE(sc, MGE_REG_PHYDEV, miisc-mii_phy); + MGE_WRITE(sc, MGE_REG_PHYDEV, sc-phyaddr); - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- Norikatsu Shigemura n...@freebsd.org ___ freebsd-current@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-current To unsubscribe, send any mail to freebsd-current-unsubscr...@freebsd.org
Re: [OpenRD Ultimate] e1000phy(88E1149/88E1121) has a initialize issue
Hi yongari. On Tue, 15 Jun 2010 11:09:23 -0700 Pyun YongHyeon pyu...@gmail.com wrote: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Jun 13 05:02:14 sidearms kernel: mge1: watchdog timeout Jun 13 05:02:14 sidearms kernel: mge1: Timeout on link-up ^ This part looks like a bug in mge(4). Driver does not know how long it would take to get a valid link. Waiting for valid link in driver initialization does not work(e.g Starting controller without UTP cable may always fail on mge(4)). I think mge(4) should implement correct link state change handling. Thanks for your pointed out. I didn't notice. I'll fix this issue like following on mge_start_locked(). - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - if ((ifp-if_drv_flags (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != - IFF_DRV_RUNNING) + if (IFM_SUBTYPE(sc-mii-mii_media_active) == IFM_NONE || + (ifp-if_drv_flags (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != IFF_DRV_RUNNING) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - I found a initialize issue in e1000phy.c. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - --- sys/dev/mii/e1000phy.c.orig 2010-05-01 10:17:15.282196000 +0900 +++ sys/dev/mii/e1000phy.c 2010-06-13 16:19:46.616650536 +0900 @@ -278,6 +278,7 @@ case MII_MODEL_MARVELL_E1118: break; case MII_MODEL_MARVELL_E1116: + case MII_MODEL_MARVELL_E1149: page = PHY_READ(sc, E1000_EADR); /* Select page 3, LED control register. */ PHY_WRITE(sc, E1000_EADR, 3); - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - I confirmed OK on my environment, OpenRD Ultimate has a 88E1121(I saw it, physically): Once it was there but I removed it due to some other issues seen on Yukon Ultra. That part will program LED access so I guess it wouldn't affect normal network activity. Hum..., like following? At least, by current way, second NIC doesn't link-up if link connected. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - case MII_MODEL_MARVELL_E1118: + case MII_MODEL_MARVELL_E1149: break; case MII_MODEL_MARVELL_E1116: page = PHY_READ(sc, E1000_EADR); /* Select page 3, LED control register. */ PHY_WRITE(sc, E1000_EADR, 3); - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 88E1116R might be RGMII variant of 88E1116. Because I don't have controller that has 88E1116R I didn't treat it as 88E1116. With that change could you use straight cable without help of MDI/MDI-X converter? Sorry, I don't have 88E1116R machine, so I don't know. ___ freebsd-current@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-current To unsubscribe, send any mail to freebsd-current-unsubscr...@freebsd.org
Re: [OpenRD Ultimate] e1000phy(88E1149/88E1121) has a initialize issue
On 2010-06-20 21:03:51 (+0900), Norikatsu Shigemura n...@freebsd.org wrote: On Sun, 13 Jun 2010 22:13:31 +0200 Kristof Provost kris...@sigsegv.be wrote: I have a OpenRD Ultimate, which has two GbE ports - if_mge(4). But I couldn't use mge1 like following. So I tried to investigate. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Jun 13 05:02:14 sidearms kernel: mge1: watchdog timeout Jun 13 05:02:14 sidearms kernel: mge1: Timeout on link-up - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - I believe the mge(4) driver incorrectly configures the PHY address for the second interface. Can you give the attached patch a try? Thank you. I think so, too. And, by FDT, I suggest following patch. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - /* Tell the MAC where to find the PHY so autoneg works */ - miisc = LIST_FIRST(sc-mii-mii_phys); - MGE_WRITE(sc, MGE_REG_PHYDEV, miisc-mii_phy); + MGE_WRITE(sc, MGE_REG_PHYDEV, sc-phyaddr); - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - I think that's correct, but I haven't been able to test it on my board yet. Does this work for you on a board with two GbE ports? If so I'll try to get someone to commit it. Regards, Kristof ___ freebsd-current@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-current To unsubscribe, send any mail to freebsd-current-unsubscr...@freebsd.org
Re: [OpenRD Ultimate] e1000phy(88E1149/88E1121) has a initialize issue
Hi Kristof. On Sun, 20 Jun 2010 15:01:00 +0200 Kristof Provost kris...@sigsegv.be wrote: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - /* Tell the MAC where to find the PHY so autoneg works */ - miisc = LIST_FIRST(sc-mii-mii_phys); - MGE_WRITE(sc, MGE_REG_PHYDEV, miisc-mii_phy); + MGE_WRITE(sc, MGE_REG_PHYDEV, sc-phyaddr); - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - I think that's correct, but I haven't been able to test it on my board yet. Does this work for you on a board with two GbE ports? If so I'll try to get someone to commit it. Yes, good works well. I reported following: http://lists.freebsd.org/pipermail/freebsd-arm/2010-June/002402.html Thank you. -- Norikatsu Shigemura n...@freebsd.org ___ freebsd-current@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-current To unsubscribe, send any mail to freebsd-current-unsubscr...@freebsd.org
Re: [OpenRD Ultimate] e1000phy(88E1149/88E1121) has a initialize issue
On Sun, Jun 13, 2010 at 11:37:23PM +0900, Norikatsu Shigemura wrote:
Hi yongari!
I have a OpenRD Ultimate, which has two GbE ports - if_mge(4). But
I couldn't use mge1 like following. So I tried to investigate.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - -
Jun 13 05:02:14 sidearms kernel: mge1: watchdog timeout
Jun 13 05:02:14 sidearms kernel: mge1: Timeout on link-up
^
This part looks like a bug in mge(4). Driver does not know how long
it would take to get a valid link. Waiting for valid link in driver
initialization does not work(e.g Starting controller without UTP
cable may always fail on mge(4)). I think mge(4) should implement
correct link state change handling.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - -
I found a initialize issue in e1000phy.c.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - -
--- sys/dev/mii/e1000phy.c.orig 2010-05-01 10:17:15.282196000 +0900
+++ sys/dev/mii/e1000phy.c2010-06-13 16:19:46.616650536 +0900
@@ -278,6 +278,7 @@
case MII_MODEL_MARVELL_E1118:
break;
case MII_MODEL_MARVELL_E1116:
+ case MII_MODEL_MARVELL_E1149:
page = PHY_READ(sc, E1000_EADR);
/* Select page 3, LED control register. */
PHY_WRITE(sc, E1000_EADR, 3);
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - -
I confirmed OK on my environment, OpenRD Ultimate has a 88E1121(I
saw it, physically):
Once it was there but I removed it due to some other issues seen on
Yukon Ultra. That part will program LED access so I guess it
wouldn't affect normal network activity.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - -
Jun 13 15:20:01 sidearms kernel: miibus0: miibus_probe: ma.mii_id1 = 0x141,
ma.mii_id2 = 0xcb3
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - -
And I confirmed that MII chipset ID is same as 88E1249.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - -
mge0
Marvell OBIO Memory:
4043776000-4043784191
Marvell OBIO IRQ:
11
12
13
14
46
miibus0
e1000phy0 pnpinfo oui=0x5043 model=0xb rev=0x3 at phyno=0
mge1
Marvell OBIO Memory:
4043792384-4043800575
Marvell OBIO IRQ:
15
16
17
18
47
miibus1
e1000phy1 pnpinfo oui=0x5043 model=0xb rev=0x3 at phyno=1
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - -
BTW, I knew same issue on OpenRD Client, it has a 88E1116R, maybe.
Sorry, I don't already have it. I couldn't confirm.
So accordingly my memo:
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - -
miibus0: ma.mii_id1 = 0x141, ma.mii_id2 = 0xe40
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - -
I found many initialize issues on 88E1116R by not existing on
e1000phy.c. Maybe 88E1116 = 88E1116R like following:
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - -
switch (esc-mii_model) {
case MII_MODEL_MARVELL_E:
case MII_MODEL_MARVELL_E1112:
case MII_MODEL_MARVELL_E1116:
+ case MII_MODEL_MARVELL_E1116R:
case MII_MODEL_MARVELL_E1118:
case MII_MODEL_MARVELL_E1149:
case MII_MODEL_MARVELL_PHYG65G:
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - -
But there are many points, I don't know that this modify is right.
88E1116R might be RGMII variant of 88E1116. Because I don't have
controller that has 88E1116R I didn't treat it as 88E1116. With
that change could you use straight cable without help of MDI/MDI-X
converter?
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[OpenRD Ultimate] e1000phy(88E1149/88E1121) has a initialize issue
Hi yongari!
I have a OpenRD Ultimate, which has two GbE ports - if_mge(4). But
I couldn't use mge1 like following. So I tried to investigate.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - -
Jun 13 05:02:14 sidearms kernel: mge1: watchdog timeout
Jun 13 05:02:14 sidearms kernel: mge1: Timeout on link-up
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - -
I found a initialize issue in e1000phy.c.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - -
--- sys/dev/mii/e1000phy.c.orig 2010-05-01 10:17:15.282196000 +0900
+++ sys/dev/mii/e1000phy.c 2010-06-13 16:19:46.616650536 +0900
@@ -278,6 +278,7 @@
case MII_MODEL_MARVELL_E1118:
break;
case MII_MODEL_MARVELL_E1116:
+ case MII_MODEL_MARVELL_E1149:
page = PHY_READ(sc, E1000_EADR);
/* Select page 3, LED control register. */
PHY_WRITE(sc, E1000_EADR, 3);
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - -
I confirmed OK on my environment, OpenRD Ultimate has a 88E1121(I
saw it, physically):
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - -
Jun 13 15:20:01 sidearms kernel: miibus0: miibus_probe: ma.mii_id1 = 0x141,
ma.mii_id2 = 0xcb3
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - -
And I confirmed that MII chipset ID is same as 88E1249.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - -
mge0
Marvell OBIO Memory:
4043776000-4043784191
Marvell OBIO IRQ:
11
12
13
14
46
miibus0
e1000phy0 pnpinfo oui=0x5043 model=0xb rev=0x3 at phyno=0
mge1
Marvell OBIO Memory:
4043792384-4043800575
Marvell OBIO IRQ:
15
16
17
18
47
miibus1
e1000phy1 pnpinfo oui=0x5043 model=0xb rev=0x3 at phyno=1
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - -
BTW, I knew same issue on OpenRD Client, it has a 88E1116R, maybe.
Sorry, I don't already have it. I couldn't confirm.
So accordingly my memo:
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - -
miibus0: ma.mii_id1 = 0x141, ma.mii_id2 = 0xe40
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - -
I found many initialize issues on 88E1116R by not existing on
e1000phy.c. Maybe 88E1116 = 88E1116R like following:
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - -
switch (esc-mii_model) {
case MII_MODEL_MARVELL_E:
case MII_MODEL_MARVELL_E1112:
case MII_MODEL_MARVELL_E1116:
+ case MII_MODEL_MARVELL_E1116R:
case MII_MODEL_MARVELL_E1118:
case MII_MODEL_MARVELL_E1149:
case MII_MODEL_MARVELL_PHYG65G:
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - -
But there are many points, I don't know that this modify is right.
--
Hayabusa, Okaerinasai!
Norikatsu Shigemura n...@freebsd.org
___
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Re: [OpenRD Ultimate] e1000phy(88E1149/88E1121) has a initialize issue
On 2010-06-13 23:37:23 (+0900), Norikatsu Shigemura n...@freebsd.org wrote:
Hi yongari!
I have a OpenRD Ultimate, which has two GbE ports - if_mge(4). But
I couldn't use mge1 like following. So I tried to investigate.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - -
Jun 13 05:02:14 sidearms kernel: mge1: watchdog timeout
Jun 13 05:02:14 sidearms kernel: mge1: Timeout on link-up
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - -
I believe the mge(4) driver incorrectly configures the PHY address for
the second interface. Can you give the attached patch a try?
I'm not familiar with the PHY code so I won't comment on those changes.
Regards,
Kristof
Index: sys/dev/mge/if_mge.c
===
--- sys/dev/mge/if_mge.c (revision 208113)
+++ sys/dev/mge/if_mge.c (working copy)
@@ -606,7 +606,6 @@
mge_attach(device_t dev)
{
struct mge_softc *sc;
- struct mii_softc *miisc;
struct ifnet *ifp;
uint8_t hwaddr[ETHER_ADDR_LEN];
int i, error ;
@@ -690,9 +689,9 @@
}
sc-mii = device_get_softc(sc-miibus);
- /* Tell the MAC where to find the PHY so autoneg works */
- miisc = LIST_FIRST(sc-mii-mii_phys);
- MGE_WRITE(sc, MGE_REG_PHYDEV, miisc-mii_phy);
+ /* Tell the MAC where to find the PHY so autoneg works
+ * We assume a static mapping (see mge_miibus_readreg) */
+ MGE_WRITE(sc, MGE_REG_PHYDEV, device_get_unit(dev) + MII_ADDR_BASE);
/* Attach interrupt handlers */
for (i = 0; i 2; ++i) {
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