RE: [PATCH, ARM, iWMMXT] Check IWMMXT_GR_REGS in the SECONDARY_RELOAD MACRO
At 2013-05-24 15:19:36,Chung-Ju Wu jasonw...@gmail.com wrote:
2013/5/24 Xinyu Qi x...@marvell.com:
Hi,
For this simple case, compiled with option -march=iwmmxt -O, #define
N 64 signed int b[N]; signed long long j[N], d[N]; void foo (void) {
int i;
for (i = 0; i N; i++)
j[i] = d[i] b[i];
}
An internal compiler error occurs,
error: insn does not satisfy its constraints:
(insn 112 74 75 3 (set (reg:SI 96 wcgr0)
(mem/c:SI (plus:SI (reg:SI 3 r3 [orig:174 ivtmp.19 ] [174])
(reg/f:SI 0 r0 [183])) [0 MEM[symbol: b, index:
ivtmp.19_14, offset: 0B]+0 S4 A32])) {*iwmmxt_movsi_insn}
(nil))
The load address of wmmx wcgr register cannot accept the register offset
mode and the reload pass fails to fix it, so that such error happens.
This issue could be solved by adding check code for IWMMXT_GR_REGS class
in the SECONDARY_RELOAD MACRO if TARGET_IWMMXT. Current code only
check the IWMMXT_REGS group.
Patch attached with a new test.
Pass full dejagnu test. No regression.
Is this fix proper?
OK for trunk?
I cannot approve it. But here are some comments and hope it helps.
Hi Chung-Ju,
Thanks for your comments:)
I fixed the typo you mentioned and regenerated the patch attached.
ChangeLog
gcc/
2013-05-24 Xinyu Qi x...@marvell.com
* config/arm/arm.h (SECONDARY_OUTPUT_RELOAD_CLASS): Check
IWMMXT_GR_REGS register class.
(SECONDARY_INPUT_RELOAD_CLASS): Likewise.
testsuite/
2013-05-24 Xinyu Qi x...@marvell.com
* gcc.target/arm/mmx-3.c: New test.
Thanks,
Xinyu
ChangeLog
gcc/
2013-05-24 Xinyu Qi x...@marvell.com
* config/arm/arm.h (SECONDARY_OUTPUT_RELOAD_CLASS):
Check IWMMXT_GR_REGS.
This line just ends at 81 column.
How about this one?
2013-05-24 Xinyu Qi x...@marvell.com
* config/arm/arm.h (SECONDARY_OUTPUT_RELOAD_CLASS): Check
IWMMXT_GR_REGS register class.
(SECONDARY_INPUT_RELOAD_CLASS): Likewise.
testsuite/
2013-05-24 Xinyu Qi x...@marvell.com
* gcc.target/arm/mmx-3.c: New test.
Index: gcc/config/arm/arm.h
===
--- gcc/config/arm/arm.h(revision 199090)
+++ gcc/config/arm/arm.h(working copy)
@@ -1280,7 +1280,8 @@
((TARGET_VFP TARGET_HARD_FLOAT\
IS_VFP_CLASS (CLASS))\
? coproc_secondary_reload_class (MODE, X, FALSE)\
- : (TARGET_IWMMXT (CLASS) == IWMMXT_REGS)\
+ : (TARGET_IWMMXT ((CLASS) == IWMMXT_REGS)\
+|| (CLASS) == IWMMXT_GR_REGS)\
I think it should be
+ : (TARGET_IWMMXT ((CLASS) == IWMMXT_REGS\
+|| (CLASS) == IWMMXT_GR_REGS))\
? coproc_secondary_reload_class (MODE, X, TRUE)\
: TARGET_32BIT\
? (((MODE) == HImode ! arm_arch4 true_regnum (X) == -1) \
@@
-1293,7 +1294,8 @@
((TARGET_VFP TARGET_HARD_FLOAT\
IS_VFP_CLASS (CLASS))\
? coproc_secondary_reload_class (MODE, X, FALSE) :\
-(TARGET_IWMMXT (CLASS) == IWMMXT_REGS) ?\
+(TARGET_IWMMXT ((CLASS) == IWMMXT_REGS\
+ || (CLASS) == IWMMXT_GR_REGS)) ?\
coproc_secondary_reload_class (MODE, X, TRUE) :\
(TARGET_32BIT ?\
(((CLASS) == IWMMXT_REGS || (CLASS) == IWMMXT_GR_REGS)\
It seems that you didn't CC arm maintainer.
Let me do this for you. :)
Best regards,
jasonwucj
GR_secondary_reload.diff
Description: GR_secondary_reload.diff
[PATCH, ARM, iWMMXT] Check IWMMXT_GR_REGS in the SECONDARY_RELOAD MACRO
Hi,
For this simple case, compiled with option -march=iwmmxt -O,
#define N 64
signed int b[N];
signed long long j[N], d[N];
void foo (void)
{
int i;
for (i = 0; i N; i++)
j[i] = d[i] b[i];
}
An internal compiler error occurs,
error: insn does not satisfy its constraints:
(insn 112 74 75 3 (set (reg:SI 96 wcgr0)
(mem/c:SI (plus:SI (reg:SI 3 r3 [orig:174 ivtmp.19 ] [174])
(reg/f:SI 0 r0 [183])) [0 MEM[symbol: b, index: ivtmp.19_14,
offset: 0B]+0 S4 A32])) {*iwmmxt_movsi_insn}
(nil))
The load address of wmmx wcgr register cannot accept the register offset mode
and the reload pass fails to fix it, so that such error happens.
This issue could be solved by adding check code for IWMMXT_GR_REGS class in the
SECONDARY_RELOAD MACRO if TARGET_IWMMXT. Current code only check the
IWMMXT_REGS group.
Patch attached with a new test.
Pass full dejagnu test. No regression.
Is this fix proper?
OK for trunk?
ChangeLog
gcc/
2013-05-24 Xinyu Qi x...@marvell.com
* config/arm/arm.h (SECONDARY_OUTPUT_RELOAD_CLASS): Check
IWMMXT_GR_REGS.
(SECONDARY_INPUT_RELOAD_CLASS): Likewise.
testsuite/
2013-05-24 Xinyu Qi x...@marvell.com
* gcc.target/arm/mmx-3.c: New test.
gr_secondary_reload.diff
Description: gr_secondary_reload.diff
RE: [PATCH, ARM, iWMMXT] PR target/54338 - Include IWMMXT_GR_REGS in ALL_REGS
At 2013-04-30 18:45:42,Matthew Gretton-Dann matthew.gretton-d...@linaro.org wrote: Hi, On 08/04/13 06:28, Xinyu Qi wrote: At 2013-04-02 17:50:03,Ramana Radhakrishnan ramra...@arm.com wrote: On 04/02/13 10:40, Xinyu Qi wrote: Hi, According to Vladimir Makarov's analysis, the root cause of PR target/54338 is that ALL_REGS doesn't contain IWMMXT_GR_REGS in REG_CLASS_CONTENTS. It seems there is no reason to exclude the IWMMXT_GR_REGS from ALL_REGS as IWMMXT_GR_REGS are the real registers. This patch simply makes ALL_REGS include IWMMXT_GR_REGS to fix this PR. Since the test case gcc.target/arm/mmx-2.c would fail for the same reason and become pass with this fix, no extra test case need to be add. Pass arm.exp test. Patch attached. Testing just with arm.exp is not enough. Ok if no regressions running the entire regression testsuite for C and C++ for arm*-*-*eabi with an iwmmxt configuration. Hi Ramana, I run the full dejagnu test with -march=iwmmxt2 specified in the whole progress for this patch. No regression but a lot of new pass found in the test. Please help to commit it. ChangeLog 2013-04-02 Xinyu Qi x...@marvell.com PR target/54338 * config/arm/arm.h (REG_CLASS_CONTENTS): Include IWMMXT_GR_REGS in ALL_REGS. It looks to me as if this should also be applied to the 4.8 branch - Xinyu do you agree? Hi Matt, I'm OK with the patch applied to the 4.8 branch. (But I only tested the patch for the trunk.) Thanks, Xinyu If so is the backport OK for 4.8? Thanks, Matt -- Matthew Gretton-Dann Toolchain Working Group, Linaro
[PATCH, ARM, iWMMXT] PR target/54338 - Include IWMMXT_GR_REGS in ALL_REGS
Hi, According to Vladimir Makarov's analysis, the root cause of PR target/54338 is that ALL_REGS doesn't contain IWMMXT_GR_REGS in REG_CLASS_CONTENTS. It seems there is no reason to exclude the IWMMXT_GR_REGS from ALL_REGS as IWMMXT_GR_REGS are the real registers. This patch simply makes ALL_REGS include IWMMXT_GR_REGS to fix this PR. Since the test case gcc.target/arm/mmx-2.c would fail for the same reason and become pass with this fix, no extra test case need to be add. Pass arm.exp test. Patch attached. ChangeLog 2013-04-02 Xinyu Qi x...@marvell.com * config/arm/arm.h (REG_CLASS_CONTENTS): Include IWMMXT_GR_REGS in ALL_REGS. OK? Thanks, Xinyu IWMMXT_GR_REGS.diff Description: IWMMXT_GR_REGS.diff
RE: [PATCH, ARM, iWMMXT] Fix define_constants for WCGR
At 2013-01-22 19:58:43,Ramana Radhakrishnan ramra...@arm.com wrote: On 01/22/13 09:21, Xinyu Qi wrote: Ping, Fix ChangeLog The ChangeLog format includes . date Author's name a...@c.com If you want a patch accepted in the future, please help by creating the Changelog entry in the correct format, i.e. fill in the author's name as well as email address as below. I've created an entry as below. Please remember to do so for every patch you submit - thanks. DATE Xinyu Qi x...@marvell.com * config/arm/arm.h (FIRST_IWMMXT_GR_REGNUM): Add comment. * config/arm/iwmmxt.md (WCGR0): Update. (WCGR1, WCGR2, WCGR3): Likewise. The patch by itself is OK but surprisingly I never saw this earlier. Your ping has removed the date from the original post so I couldn't track it down. Anyway, please apply. regards, Ramana Hi Ramana, Since I have no write access, would you mind to help to check in this patch? The patch is attached. ChangeLog 2013-01-31 Xinyu Qi x...@marvell.com * config/arm/arm.h (FIRST_IWMMXT_GR_REGNUM): Add comment. * config/arm/iwmmxt.md (WCGR0): Update. (WCGR1, WCGR2, WCGR3): Likewise. Thanks, Xinyu WCGR.DIFF Description: WCGR.DIFF
RE: [PATCH, ARM, iWMMXT] Fix define_constants for WCGR
At 2013-01-22 19:58:43,Ramana Radhakrishnan ramra...@arm.com wrote: On 01/22/13 09:21, Xinyu Qi wrote: Ping, Fix ChangeLog The ChangeLog format includes . date Author's name a...@c.com If you want a patch accepted in the future, please help by creating the Changelog entry in the correct format, i.e. fill in the author's name as well as email address as below. I've created an entry as below. Please remember to do so for every patch you submit - thanks. DATE Xinyu Qi x...@marvell.com * config/arm/arm.h (FIRST_IWMMXT_GR_REGNUM): Add comment. * config/arm/iwmmxt.md (WCGR0): Update. (WCGR1, WCGR2, WCGR3): Likewise. The patch by itself is OK but surprisingly I never saw this earlier. Your ping has removed the date from the original post so I couldn't track it down. Anyway, please apply. regards, Ramana Hi Nick, Since I have no write access, would you mind to help to check in this patch which has already been approved? The patch is attached. ChangeLog 2013-01-31 Xinyu Qi x...@marvell.com * config/arm/arm.h (FIRST_IWMMXT_GR_REGNUM): Add comment. * config/arm/iwmmxt.md (WCGR0): Update. (WCGR1, WCGR2, WCGR3): Likewise. Thanks, Xinyu WCGR.diff Description: WCGR.diff
RE: [PING][PATCH, ARM, iWMMXT] Fix define_constants for WCGR
Ping, Fix ChangeLog * config/arm/arm.h (FIRST_IWMMXT_GR_REGNUM): Add comment. * config/arm/iwmmxt.md (WCGR0): Update. (WCGR1, WCGR2, WCGR3): Likewise. Hi, It is necessary to sync the constants WCGR0 to WCGR3 in iwmmxt.md with the IWMMXT_GR_REGNUM in arm.h. ChangeLog * config/arm/arm.h (FIRST_IWMMXT_GR_REGNUM): Add comment. * config/arm/iwmmxt.md (WCGR0, WCGR1): Update. * config/arm/iwmmxt.md (WCGR2, WCGR3): Likewise. Index: config/arm/arm.h === --- config/arm/arm.h (revision 194603) +++ config/arm/arm.h (working copy) @@ -947,6 +947,8 @@ #define FIRST_IWMMXT_REGNUM (LAST_HI_VFP_REGNUM + 1) #define LAST_IWMMXT_REGNUM (FIRST_IWMMXT_REGNUM + 15) + +/* Need to sync with WCGR in iwmmxt.md. */ #define FIRST_IWMMXT_GR_REGNUM (LAST_IWMMXT_REGNUM + 1) #define LAST_IWMMXT_GR_REGNUM(FIRST_IWMMXT_GR_REGNUM + 3) Index: config/arm/iwmmxt.md === --- config/arm/iwmmxt.md (revision 194603) +++ config/arm/iwmmxt.md (working copy) @@ -19,12 +19,12 @@ ;; along with GCC; see the file COPYING3. If not see ;; http://www.gnu.org/licenses/. -;; Register numbers +;; Register numbers. Need to sync with FIRST_IWMMXT_GR_REGNUM in arm.h (define_constants - [(WCGR0 43) - (WCGR1 44) - (WCGR2 45) - (WCGR3 46) + [(WCGR0 96) + (WCGR1 97) + (WCGR2 98) + (WCGR3 99) ] ) OK? Thanks, Xinyu
RE: [PING][PATCH, ARM, iWMMXT] Fix define_constants for WCGR
At 2013-01-22 19:58:43,Ramana Radhakrishnan ramra...@arm.com wrote: On 01/22/13 09:21, Xinyu Qi wrote: Ping, Fix ChangeLog The ChangeLog format includes . date Author's name a...@c.com If you want a patch accepted in the future, please help by creating the Changelog entry in the correct format, i.e. fill in the author's name as well as email address as below. I've created an entry as below. Please remember to do so for every patch you submit - thanks. DATE Xinyu Qi x...@marvell.com * config/arm/arm.h (FIRST_IWMMXT_GR_REGNUM): Add comment. * config/arm/iwmmxt.md (WCGR0): Update. (WCGR1, WCGR2, WCGR3): Likewise. The patch by itself is OK but surprisingly I never saw this earlier. Your ping has removed the date from the original post so I couldn't track it down. Hi Ramana, Thanks for reviewing. I forget to keep the date which shows the original post is at Wed, 26 Dec 2012 You can find it at http://gcc.gnu.org/ml/gcc-patches/2012-12/msg01418.html I would remember to set the correct Changelog entry next time. Anyway, please apply. BTW, since I have no write access, would you mind to help to check in this patch? Thanks! Xinyu regards, Ramana
[PATCH, ARM, iWMMXT] Fix define_constants for WCGR
Hi, It is necessary to sync the constants WCGR0 to WCGR3 in iwmmxt.md with the IWMMXT_GR_REGNUM in arm.h. ChangeLog * config/arm/arm.h (FIRST_IWMMXT_GR_REGNUM): Add comment. * config/arm/iwmmxt.md (WCGR0, WCGR1): Update. * config/arm/iwmmxt.md (WCGR2, WCGR3): Likewise. Index: config/arm/arm.h === --- config/arm/arm.h(revision 194603) +++ config/arm/arm.h(working copy) @@ -947,6 +947,8 @@ #define FIRST_IWMMXT_REGNUM(LAST_HI_VFP_REGNUM + 1) #define LAST_IWMMXT_REGNUM (FIRST_IWMMXT_REGNUM + 15) + +/* Need to sync with WCGR in iwmmxt.md. */ #define FIRST_IWMMXT_GR_REGNUM (LAST_IWMMXT_REGNUM + 1) #define LAST_IWMMXT_GR_REGNUM (FIRST_IWMMXT_GR_REGNUM + 3) Index: config/arm/iwmmxt.md === --- config/arm/iwmmxt.md(revision 194603) +++ config/arm/iwmmxt.md(working copy) @@ -19,12 +19,12 @@ ;; along with GCC; see the file COPYING3. If not see ;; http://www.gnu.org/licenses/. -;; Register numbers +;; Register numbers. Need to sync with FIRST_IWMMXT_GR_REGNUM in arm.h (define_constants - [(WCGR0 43) - (WCGR1 44) - (WCGR2 45) - (WCGR3 46) + [(WCGR0 96) + (WCGR1 97) + (WCGR2 98) + (WCGR3 99) ] ) OK? Thanks, Xinyu
Could IWMMXT_GR_REGS be contained by ALL_REGS in ARM back end?
Hi, Some one point out the root cause for the bug 54338 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54338 is that the IWMMXT_GR_REGS is not contained in ALL_REGS so that an assertion fail is triggered in front end. I checked the macro REG_CLASS_CONTENTS in arm.h and confirmed it. This ICE could be fixed if make ALL_REGS contain IWMMXT_GR_REGS. Is there any concerns that IWMMXT_GR_REGS shouldn't be included in ALL_REGS? Thanks, Xinyu
internal compiler error in find_costs_and_classes
Hi,
I did some iwmmxt intrinsic test for mainline gcc with this check-in
r190511 | nickc | 2012-08-19 15:11:35 +0800 (Sun, 19 Aug 2012) | 3 lines
PR target/54306
* config/arm/mmintrin.h: Remove spurious #endif.
and encountered an internal compiler error for this simple case, with option
-march=iwmmxt2 -S
#includemmintrin.h
__m64 foo(__m64 r, int i)
{
r = _mm_slli_si64(r, i);
return r;
}
internal compiler error: in find_costs_and_classes, at ira-costs.c:1711
While with -O, compiling could pass.
File a bug?
Tnahks,
Xinyu
RE: [PING] iwMMXt patches
-Original Message- From: Matt Turner [mailto:matts...@gmail.com] To: Xinyu Qi Cc: Ramana Radhakrishnan; GCC Patches Subject: Re: [PING] iwMMXt patches On Thu, May 3, 2012 at 12:59 AM, Xinyu Qi x...@marvell.com wrote: From: Matt Turner [mailto:matts...@gmail.com] To: Xinyu Qi Cc: Ramana Radhakrishnan; GCC Patches Subject: Re: [PING] iwMMXt patches On Tue, Apr 17, 2012 at 4:17 PM, Matt Turner matts...@gmail.com wrote: Are these patches ready to go in? It looks like they were ack'd. http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01815.html http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01817.html http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01816.html http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01818.html http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01819.html We (OLPC) will need these patches for reasonable iwMMXt performance and the ability to use VFP and iwMMXt together. Thanks, Matt Xinyu, With these patches I don't see a new -mcpu flag. Isn't a tune/cpu flag the normal way to activate this code? Other .md files have statements like (eq_attr tune cortexa8), but I don't see how to turn on the marvell-f-iwmmxt attribute, ie (eq_attr marvell_f_iwmmxt yes). Please let me know. Thanks, Matt Hi Matt, I updated the patches several months ago by following the review opinions form Richard Earnshaw [richard.earns...@arm.com] (unfortunately, no further feedback) The newest patches are http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01787.html http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01788.html http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01789.html http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01786.html http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01599.html The main discussion is in http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01786.html No new -mcpu flag is introduced in the patches. You can simply turn on marvell-f-iwmmxt by -mcpu=iwmmxt2(or -march=iwmmxt2). (Of course it is odd to treat the iwmmxt2 as a name of cpu) Thanks, Xinyu Thanks for the email, Xinyu! We (OLPC) will test the patches and then I'll resubmit them to gcc-patches@ and try to get them included. They're definitely needed for us, since they fix PR35294 (iwmmxt shift and logical intrinsics are broken). By the way, are there patches for add general instruction scheduling support for Marvell CPUs like the Armada 610? Thanks again, Matt Hi Matt, Thank you very much! It is our pleasure to contribute some Marvell cores' pipeline description to GCC, and we are preparing the patch right now. We would submit it as soon as it is ready. (It might take several days to work out). Thanks again, Xinyu
RE: [PING] iwMMXt patches
From: Matt Turner [mailto:matts...@gmail.com] To: Xinyu Qi Cc: Ramana Radhakrishnan; GCC Patches Subject: Re: [PING] iwMMXt patches On Tue, Apr 17, 2012 at 4:17 PM, Matt Turner matts...@gmail.com wrote: Are these patches ready to go in? It looks like they were ack'd. http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01815.html http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01817.html http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01816.html http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01818.html http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01819.html We (OLPC) will need these patches for reasonable iwMMXt performance and the ability to use VFP and iwMMXt together. Thanks, Matt Xinyu, With these patches I don't see a new -mcpu flag. Isn't a tune/cpu flag the normal way to activate this code? Other .md files have statements like (eq_attr tune cortexa8), but I don't see how to turn on the marvell-f-iwmmxt attribute, ie (eq_attr marvell_f_iwmmxt yes). Please let me know. Thanks, Matt Hi Matt, I updated the patches several months ago by following the review opinions form Richard Earnshaw [richard.earns...@arm.com] (unfortunately, no further feedback) The newest patches are http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01787.html http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01788.html http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01789.html http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01786.html http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01599.html The main discussion is in http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01786.html No new -mcpu flag is introduced in the patches. You can simply turn on marvell-f-iwmmxt by -mcpu=iwmmxt2(or -march=iwmmxt2). (Of course it is odd to treat the iwmmxt2 as a name of cpu) Thanks, Xinyu
RE: PING: [PATCH, ARM, iWMMXt][1/5]: ARM code generic change
PING At 2012-02-03 10:02:28,Xinyu Qi x...@marvell.com wrote: PING http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01787.html At 2011-12-29 14:20:20,Xinyu Qi x...@marvell.com wrote: At 2011-12-15 00:47:48,Richard Earnshaw rearn...@arm.com wrote: On 14/07/11 08:35, Xinyu Qi wrote: Hi, It is the first part of iWMMXt maintenance. *config/arm/arm.c (arm_option_override): Enable iWMMXt with VFP. iWMMXt and NEON are incompatible. iWMMXt unsupported under Thumb-2 mode. (arm_expand_binop_builtin): Accept immediate op (with mode VOID) *config/arm/arm.md: Resettle include location of iwmmxt.md so that *arm_movdi and *arm_movsi_insn could be used when iWMMXt is enabled. With the current work in trunk to handle enabled attributes and per-alternative predicable attributes (Thanks Bernd) we should be able to get rid of *cond_iwmmxt_movsi_insn in iwmmxt.md file. It's not a matter for this patch but for a follow-up patch. Actually we should probably do the same for the various insns that are dotted around all over the place with final conditions that prevent matching - atleast makes the backend description slightly smaller :). Add pipeline description file include. It is enough to say (filename): Include. in the changelog entry. The include for the pipeline description file should be with the patch that you add this in i.e. patch #5. Please add this to MD_INCLUDES in t-arm as well. Also as a general note, please provide a correct Changelog entry. This is not the format that we expect Changelog entries to be in. Please look at the coding standards on the website for this or at other patches submitted with respect to Changelog entries. Please fix this for each patch in the patch stack. cheers Ramana Thanks for reviewing. I have updated the patches and the Changelog. *config/arm/arm.c (arm_option_override): Enable iWMMXt with VFP. (arm_expand_binop_builtin): Accept VOIDmode op. *config/arm/arm.md (*arm_movdi, *arm_movsi_insn): Remove condition !TARGET_IWMMXT. (iwmmxt.md): Include location. Thanks, Xinyu= + VFP and iWMMXt however can coexist. */ if (TARGET_IWMMXT + TARGET_HARD_FLOAT !TARGET_VFP) +sorry (iWMMXt and non-VFP floating point unit); + + /* iWMMXt and NEON are incompatible. */ if (TARGET_IWMMXT + TARGET_NEON) +sorry (iWMMXt and NEON); - /* ??? iWMMXt insn patterns need auditing for Thumb-2. */ + /* iWMMXt unsupported under Thumb-2 mode. */ if (TARGET_THUMB2 TARGET_IWMMXT) sorry (Thumb-2 iWMMXt); Don't use sorry() when a feature is not supported by the hardware; sorry() is used when GCC is currently unable to support something that it should. Use error() in these cases. Secondly, iWMMXt is incompatible with the entire Thumb ISA, not just the Thumb-2 extensions to the Thumb ISA. Done. +;; Load the Intel Wireless Multimedia Extension patterns (include +iwmmxt.md) + No, the extension patterns need to come at the end of the main machine description. The list at the top of the MD file is purely for pipeline descriptions. Why do you think this is needed? This modification is needless right now since *iwmmxt_movsi_insn and *iwmmxt_arm_movdi have been corrected in the fourth part of the patch. Revert it. The new modified patch is attached. * config/arm/arm.c (arm_option_override): Enable use of iWMMXt with VFP. Disable use of iWMMXt with NEON. Disable use of iWMMXt under Thumb mode. (arm_expand_binop_builtin): Accept VOIDmode op. Thanks, Xinyu Other bits are ok. R. New changlog * config/arm/arm.c (FL_IWMMXT2): New define. (arm_arch_iwmmxt2): New variable. (arm_option_override): Enable use of iWMMXt with VFP. Disable use of iWMMXt with NEON. Disable use of iWMMXt under Thumb mode. Set arm_arch_iwmmxt2. (arm_expand_binop_builtin): Accept VOIDmode op. * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __IWMMXT2__. (TARGET_IWMMXT2): New define. (TARGET_REALLY_IWMMXT2): Likewise. (arm_arch_iwmmxt2): Declare. * config/arm/arm-cores.def (iwmmxt2): Add FL_IWMMXT2. * config/arm/arm-arches.def (iwmmxt2): Likewise. * config/arm/arm.md (arch): Add iwmmxt2. (arch_enabled): Handle iwmmxt2. Thanks, Xinyu
RE: PING: [PATCH, ARM, iWMMXt][2/5]: intrinsic head file change
PING At 2012-02-03 10:05:22,Xinyu Qi x...@marvell.com wrote: PING http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01788.html At 2011-12-29 14:22:50,Xinyu Qi x...@marvell.com wrote: * config/arm/mmintrin.h: Use __IWMMXT__ to enable iWMMXt intrinsics. Use __IWMMXT2__ to enable iWMMXt2 intrinsics. Use C name-mangling for intrinsics. (__v8qi): Redefine. (_mm_cvtsi32_si64, _mm_andnot_si64, _mm_sad_pu8): Revise. (_mm_sad_pu16, _mm_align_si64, _mm_setwcx, _mm_getwcx): Likewise. (_m_from_int): Likewise. (_mm_sada_pu8, _mm_sada_pu16): New intrinsic. (_mm_alignr0_si64, _mm_alignr1_si64, _mm_alignr2_si64): Likewise. (_mm_alignr3_si64, _mm_tandcb, _mm_tandch, _mm_tandcw): Likewise. (_mm_textrcb, _mm_textrch, _mm_textrcw, _mm_torcb): Likewise. (_mm_torch, _mm_torcw, _mm_tbcst_pi8, _mm_tbcst_pi16): Likewise. (_mm_tbcst_pi32): Likewise. (_mm_abs_pi8, _mm_abs_pi16, _mm_abs_pi32): New iWMMXt2 intrinsic. (_mm_addsubhx_pi16, _mm_absdiff_pu8, _mm_absdiff_pu16): Likewise. (_mm_absdiff_pu32, _mm_addc_pu16, _mm_addc_pu32): Likewise. (_mm_avg4_pu8, _mm_avg4r_pu8, _mm_maddx_pi16, _mm_maddx_pu16): Likewise. (_mm_msub_pi16, _mm_msub_pu16, _mm_mulhi_pi32): Likewise. (_mm_mulhi_pu32, _mm_mulhir_pi16, _mm_mulhir_pi32): Likewise. (_mm_mulhir_pu16, _mm_mulhir_pu32, _mm_mullo_pi32): Likewise. (_mm_qmulm_pi16, _mm_qmulm_pi32, _mm_qmulmr_pi16): Likewise. (_mm_qmulmr_pi32, _mm_subaddhx_pi16, _mm_addbhusl_pu8): Likewise. (_mm_addbhusm_pu8, _mm_qmiabb_pi32, _mm_qmiabbn_pi32): Likewise. (_mm_qmiabt_pi32, _mm_qmiabtn_pi32, _mm_qmiatb_pi32): Likewise. (_mm_qmiatbn_pi32, _mm_qmiatt_pi32, _mm_qmiattn_pi32): Likewise. (_mm_wmiabb_si64, _mm_wmiabbn_si64, _mm_wmiabt_si64): Likewise. (_mm_wmiabtn_si64, _mm_wmiatb_si64, _mm_wmiatbn_si64): Likewise. (_mm_wmiatt_si64, _mm_wmiattn_si64, _mm_wmiawbb_si64): Likewise. (_mm_wmiawbbn_si64, _mm_wmiawbt_si64, _mm_wmiawbtn_si64): Likewise. (_mm_wmiawtb_si64, _mm_wmiawtbn_si64, _mm_wmiawtt_si64): Likewise. (_mm_wmiawttn_si64, _mm_merge_si64): Likewise. (_mm_torvscb, _mm_torvsch, _mm_torvscw): Likewise. (_m_to_int): New define. Thanks, Xinyu
RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
PING At 2012-02-03 10:07:56,Xinyu Qi x...@marvell.com wrote: PING http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01789.html At 2011-12-29 14:25:23,Xinyu Qi x...@marvell.com wrote: At 2011-11-24 09:27:04,Xinyu Qi x...@marvell.com wrote: At 2011-11-19 07:08:22,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: On 20 October 2011 08:39, Xinyu Qi x...@marvell.com wrote: Ping http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html * config/arm/arm.c (enum arm_builtins): Revise built-in fcode. (builtin_description bdesc_2arg): Revise built in declaration. (builtin_description bdesc_1arg): Likewise. (arm_init_iwmmxt_builtins): Revise built in initialization. (arm_expand_builtin): Revise built in expansion. This currently doesn't apply - can you take a look ? Hi Ramana, I resolve the patch conflict with the newest trunk gcc. The resolved diff is attached. Thanks, Xinyu Update the built in expand. Remove some redundant code. New diff is attached. Thanks, Xinyu * config/arm/arm.c (enum arm_builtins): Revise built-in fcode. (IWMMXT2_BUILTIN): New define. (IWMMXT2_BUILTIN2): Likewise. (iwmmx2_mbuiltin): Likewise. (builtin_description bdesc_2arg): Revise built in declaration. (builtin_description bdesc_1arg): Likewise. (arm_init_iwmmxt_builtins): Revise built in initialization. (arm_expand_builtin): Revise built in expansion. Thanks, Xinyu
RE: PING: [PATCH, ARM, iWMMXt][4/5]: WMMX machine description
PING At 2012-02-03 10:09:55,Xinyu Qi x...@marvell.com wrote: PING http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01786.html At 2011-12-29 14:12:44,Xinyu Qi x...@marvell.com wrote: At 2011-12-22 17:53:45,Richard Earnshaw rearn...@arm.com wrote: On 22/12/11 06:38, Xinyu Qi wrote: At 2011-12-15 01:32:13,Richard Earnshaw rearn...@arm.com wrote: On 24/11/11 01:33, Xinyu Qi wrote: Hi Ramana, I solve the conflict, please try again. The new diff is attached. Thanks, Xinyu At 2011-11-19 07:36:15,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: Hi Xinyu, This doesn't apply cleanly currently on trunk and the reject appears to come from iwmmxt.md and I've not yet investigated why. Can you have a look ? This patch is NOT ok. You're adding features that were new in iWMMXt2 (ie not in the original implementation) but you've provided no means by which the compiler can detect which operations are only available on the new cores. Hi Richard, All of the WMMX chips support WMMX2 instructions. This may be true for Marvell's current range of processors, but I find it hard to reconcile with the assembler support in GAS, which clearly distinguishes between iWMMXT and iWMMXT2 instruction sets. Are you telling me that no cores were ever manufactured (even by Intel) that only supported iWMMXT? I'm concerned that this patch will break support for existing users who have older chips (for GCC we have to go through a deprecation cycle if we want to drop support for something we now believe is no-longer worth maintaining). What I do is to complement the WMMX2 intrinsic support in GCC. I understand that, and I'm not saying the patch can never go in; just that it needs to separate out the support for the different architecture variants. I don't think it is necessary for users to consider whether one WMMX insn is a WMMX2 insn or not. Users don't (unless they want their code to run on legacy processors that only support the original instruction set), but the compiler surely must know what it is targeting. Remember that the instruction patterns are not entirely black boxes, the compiler can do optimizations on intrinsics (it's one of the reasons why they are better than inline assembly). Unless the compiler knows exactly what instructions are legal, it could end up optimizing something that started as a WMMX insn into something that's a WMMX2 insn (for example, propagating a constant into a vector shift expression). R. Hi, Richard, You are right. There exist the chips that only support WMMX instructions in the history. I distinguish the iWMMXt and iWMMXt2 in the patch update this time. In current GCC, -march=iwmmxt and -march=iwmmxt2 (or -mcpu=iwmmxt and -mcpu=iwmmxt2) are almost no difference in the compiling stage. I take advantage of them to do the work, that is, make -march=iwmmxt (or -mcpu=iwmmxt) only support iWMMXt intrinsic iWMMXt built in and WMMX instructions, and make -march=iwmmxt2 (or -mcpu=iwmmxt2) support fully iWMMXt2. Define a new flag FL_IWMMXT2 to represent the chip support iWMMXt2 extension, which directly controls the iWMMXt2 built in initialization and the followed defines. Define __IWMMXT2__ in TARGET_CPU_CPP_BUILTINS to control the access of iWMMXt2 intrinsics. Define TARGET_REALLY_IWMMXT2 to control the access of WMMX2 instructions' machine description. In arm.md, define iwmmxt2 in arch attr to control the access of the alternative in shift patterns. The updated patch 4/5 is attached here. 1/5, 2/5 and 3/5 are updated accordingly. Attach them in related mails. Please take a look if such modification is proper. Changelog: * config/arm/arm.c (arm_output_iwmmxt_shift_immediate): New function. (arm_output_iwmmxt_tinsr): Likewise. * config/arm/arm-protos.h (arm_output_iwmmxt_shift_immediate): Declare. (arm_output_iwmmxt_tinsr): Likewise. * config/arm/iwmmxt.md (WCGR0, WCGR1, WCGR2, WCGR3): New constant. (iwmmxt_psadbw, iwmmxt_walign, iwmmxt_tmrc, iwmmxt_tmcr): Delete. (rorv4hi3, rorv2si3, rordi3): Likewise. (rorv4hi3_di, rorv2si3_di, rordi3_di): Likewise. (ashrv4hi3_di, ashrv2si3_di, ashrdi3_di): Likewise. (lshrv4hi3_di, lshrv2si3_di, lshrdi3_di): Likewise. (ashlv4hi3_di, ashlv2si3_di, ashldi3_di): Likewise. (iwmmxt_tbcstqi, iwmmxt_tbcsthi, iwmmxt_tbcstsi): Likewise (*iwmmxt_clrv8qi, *iwmmxt_clrv4hi, *iwmmxt_clrv2si): Likewise. (tbcstv8qi, tbcstv4hi, tbsctv2si): New pattern. (iwmmxt_clrv8qi, iwmmxt_clrv4hi, iwmmxt_clrv2si): Likewise. (*andmode3_iwmmxt, *iormode3_iwmmxt, *xormode3_iwmmxt): Likewise. (rormode3, rormode3_di): Likewise. (ashrmode3_di, lshrmode3_di, ashlmode3_di): Likewise
RE:PING: [PATCH, ARM, iWMMXt][1/5]: ARM code generic change
PING http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01787.html At 2011-12-29 14:20:20,Xinyu Qi x...@marvell.com wrote: At 2011-12-15 00:47:48,Richard Earnshaw rearn...@arm.com wrote: On 14/07/11 08:35, Xinyu Qi wrote: Hi, It is the first part of iWMMXt maintenance. *config/arm/arm.c (arm_option_override): Enable iWMMXt with VFP. iWMMXt and NEON are incompatible. iWMMXt unsupported under Thumb-2 mode. (arm_expand_binop_builtin): Accept immediate op (with mode VOID) *config/arm/arm.md: Resettle include location of iwmmxt.md so that *arm_movdi and *arm_movsi_insn could be used when iWMMXt is enabled. With the current work in trunk to handle enabled attributes and per-alternative predicable attributes (Thanks Bernd) we should be able to get rid of *cond_iwmmxt_movsi_insn in iwmmxt.md file. It's not a matter for this patch but for a follow-up patch. Actually we should probably do the same for the various insns that are dotted around all over the place with final conditions that prevent matching - atleast makes the backend description slightly smaller :). Add pipeline description file include. It is enough to say (filename): Include. in the changelog entry. The include for the pipeline description file should be with the patch that you add this in i.e. patch #5. Please add this to MD_INCLUDES in t-arm as well. Also as a general note, please provide a correct Changelog entry. This is not the format that we expect Changelog entries to be in. Please look at the coding standards on the website for this or at other patches submitted with respect to Changelog entries. Please fix this for each patch in the patch stack. cheers Ramana Thanks for reviewing. I have updated the patches and the Changelog. *config/arm/arm.c (arm_option_override): Enable iWMMXt with VFP. (arm_expand_binop_builtin): Accept VOIDmode op. *config/arm/arm.md (*arm_movdi, *arm_movsi_insn): Remove condition !TARGET_IWMMXT. (iwmmxt.md): Include location. Thanks, Xinyu= + VFP and iWMMXt however can coexist. */ if (TARGET_IWMMXT + TARGET_HARD_FLOAT !TARGET_VFP) +sorry (iWMMXt and non-VFP floating point unit); + + /* iWMMXt and NEON are incompatible. */ if (TARGET_IWMMXT + TARGET_NEON) +sorry (iWMMXt and NEON); - /* ??? iWMMXt insn patterns need auditing for Thumb-2. */ + /* iWMMXt unsupported under Thumb-2 mode. */ if (TARGET_THUMB2 TARGET_IWMMXT) sorry (Thumb-2 iWMMXt); Don't use sorry() when a feature is not supported by the hardware; sorry() is used when GCC is currently unable to support something that it should. Use error() in these cases. Secondly, iWMMXt is incompatible with the entire Thumb ISA, not just the Thumb-2 extensions to the Thumb ISA. Done. +;; Load the Intel Wireless Multimedia Extension patterns (include +iwmmxt.md) + No, the extension patterns need to come at the end of the main machine description. The list at the top of the MD file is purely for pipeline descriptions. Why do you think this is needed? This modification is needless right now since *iwmmxt_movsi_insn and *iwmmxt_arm_movdi have been corrected in the fourth part of the patch. Revert it. The new modified patch is attached. * config/arm/arm.c (arm_option_override): Enable use of iWMMXt with VFP. Disable use of iWMMXt with NEON. Disable use of iWMMXt under Thumb mode. (arm_expand_binop_builtin): Accept VOIDmode op. Thanks, Xinyu Other bits are ok. R. New changlog * config/arm/arm.c (FL_IWMMXT2): New define. (arm_arch_iwmmxt2): New variable. (arm_option_override): Enable use of iWMMXt with VFP. Disable use of iWMMXt with NEON. Disable use of iWMMXt under Thumb mode. Set arm_arch_iwmmxt2. (arm_expand_binop_builtin): Accept VOIDmode op. * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __IWMMXT2__. (TARGET_IWMMXT2): New define. (TARGET_REALLY_IWMMXT2): Likewise. (arm_arch_iwmmxt2): Declare. * config/arm/arm-cores.def (iwmmxt2): Add FL_IWMMXT2. * config/arm/arm-arches.def (iwmmxt2): Likewise. * config/arm/arm.md (arch): Add iwmmxt2. (arch_enabled): Handle iwmmxt2. Thanks, Xinyu
RE: PING: [PATCH, ARM, iWMMXt][2/5]: intrinsic head file change
PING http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01788.html At 2011-12-29 14:22:50,Xinyu Qi x...@marvell.com wrote: * config/arm/mmintrin.h: Use __IWMMXT__ to enable iWMMXt intrinsics. Use __IWMMXT2__ to enable iWMMXt2 intrinsics. Use C name-mangling for intrinsics. (__v8qi): Redefine. (_mm_cvtsi32_si64, _mm_andnot_si64, _mm_sad_pu8): Revise. (_mm_sad_pu16, _mm_align_si64, _mm_setwcx, _mm_getwcx): Likewise. (_m_from_int): Likewise. (_mm_sada_pu8, _mm_sada_pu16): New intrinsic. (_mm_alignr0_si64, _mm_alignr1_si64, _mm_alignr2_si64): Likewise. (_mm_alignr3_si64, _mm_tandcb, _mm_tandch, _mm_tandcw): Likewise. (_mm_textrcb, _mm_textrch, _mm_textrcw, _mm_torcb): Likewise. (_mm_torch, _mm_torcw, _mm_tbcst_pi8, _mm_tbcst_pi16): Likewise. (_mm_tbcst_pi32): Likewise. (_mm_abs_pi8, _mm_abs_pi16, _mm_abs_pi32): New iWMMXt2 intrinsic. (_mm_addsubhx_pi16, _mm_absdiff_pu8, _mm_absdiff_pu16): Likewise. (_mm_absdiff_pu32, _mm_addc_pu16, _mm_addc_pu32): Likewise. (_mm_avg4_pu8, _mm_avg4r_pu8, _mm_maddx_pi16, _mm_maddx_pu16): Likewise. (_mm_msub_pi16, _mm_msub_pu16, _mm_mulhi_pi32): Likewise. (_mm_mulhi_pu32, _mm_mulhir_pi16, _mm_mulhir_pi32): Likewise. (_mm_mulhir_pu16, _mm_mulhir_pu32, _mm_mullo_pi32): Likewise. (_mm_qmulm_pi16, _mm_qmulm_pi32, _mm_qmulmr_pi16): Likewise. (_mm_qmulmr_pi32, _mm_subaddhx_pi16, _mm_addbhusl_pu8): Likewise. (_mm_addbhusm_pu8, _mm_qmiabb_pi32, _mm_qmiabbn_pi32): Likewise. (_mm_qmiabt_pi32, _mm_qmiabtn_pi32, _mm_qmiatb_pi32): Likewise. (_mm_qmiatbn_pi32, _mm_qmiatt_pi32, _mm_qmiattn_pi32): Likewise. (_mm_wmiabb_si64, _mm_wmiabbn_si64, _mm_wmiabt_si64): Likewise. (_mm_wmiabtn_si64, _mm_wmiatb_si64, _mm_wmiatbn_si64): Likewise. (_mm_wmiatt_si64, _mm_wmiattn_si64, _mm_wmiawbb_si64): Likewise. (_mm_wmiawbbn_si64, _mm_wmiawbt_si64, _mm_wmiawbtn_si64): Likewise. (_mm_wmiawtb_si64, _mm_wmiawtbn_si64, _mm_wmiawtt_si64): Likewise. (_mm_wmiawttn_si64, _mm_merge_si64): Likewise. (_mm_torvscb, _mm_torvsch, _mm_torvscw): Likewise. (_m_to_int): New define. Thanks, Xinyu
RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
PING http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01789.html At 2011-12-29 14:25:23,Xinyu Qi x...@marvell.com wrote: At 2011-11-24 09:27:04,Xinyu Qi x...@marvell.com wrote: At 2011-11-19 07:08:22,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: On 20 October 2011 08:39, Xinyu Qi x...@marvell.com wrote: Ping http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html * config/arm/arm.c (enum arm_builtins): Revise built-in fcode. (builtin_description bdesc_2arg): Revise built in declaration. (builtin_description bdesc_1arg): Likewise. (arm_init_iwmmxt_builtins): Revise built in initialization. (arm_expand_builtin): Revise built in expansion. This currently doesn't apply - can you take a look ? Hi Ramana, I resolve the patch conflict with the newest trunk gcc. The resolved diff is attached. Thanks, Xinyu Update the built in expand. Remove some redundant code. New diff is attached. Thanks, Xinyu * config/arm/arm.c (enum arm_builtins): Revise built-in fcode. (IWMMXT2_BUILTIN): New define. (IWMMXT2_BUILTIN2): Likewise. (iwmmx2_mbuiltin): Likewise. (builtin_description bdesc_2arg): Revise built in declaration. (builtin_description bdesc_1arg): Likewise. (arm_init_iwmmxt_builtins): Revise built in initialization. (arm_expand_builtin): Revise built in expansion. Thanks, Xinyu
RE: PING: [PATCH, ARM, iWMMXt][4/5]: WMMX machine description
PING http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01786.html At 2011-12-29 14:12:44,Xinyu Qi x...@marvell.com wrote: At 2011-12-22 17:53:45,Richard Earnshaw rearn...@arm.com wrote: On 22/12/11 06:38, Xinyu Qi wrote: At 2011-12-15 01:32:13,Richard Earnshaw rearn...@arm.com wrote: On 24/11/11 01:33, Xinyu Qi wrote: Hi Ramana, I solve the conflict, please try again. The new diff is attached. Thanks, Xinyu At 2011-11-19 07:36:15,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: Hi Xinyu, This doesn't apply cleanly currently on trunk and the reject appears to come from iwmmxt.md and I've not yet investigated why. Can you have a look ? This patch is NOT ok. You're adding features that were new in iWMMXt2 (ie not in the original implementation) but you've provided no means by which the compiler can detect which operations are only available on the new cores. Hi Richard, All of the WMMX chips support WMMX2 instructions. This may be true for Marvell's current range of processors, but I find it hard to reconcile with the assembler support in GAS, which clearly distinguishes between iWMMXT and iWMMXT2 instruction sets. Are you telling me that no cores were ever manufactured (even by Intel) that only supported iWMMXT? I'm concerned that this patch will break support for existing users who have older chips (for GCC we have to go through a deprecation cycle if we want to drop support for something we now believe is no-longer worth maintaining). What I do is to complement the WMMX2 intrinsic support in GCC. I understand that, and I'm not saying the patch can never go in; just that it needs to separate out the support for the different architecture variants. I don't think it is necessary for users to consider whether one WMMX insn is a WMMX2 insn or not. Users don't (unless they want their code to run on legacy processors that only support the original instruction set), but the compiler surely must know what it is targeting. Remember that the instruction patterns are not entirely black boxes, the compiler can do optimizations on intrinsics (it's one of the reasons why they are better than inline assembly). Unless the compiler knows exactly what instructions are legal, it could end up optimizing something that started as a WMMX insn into something that's a WMMX2 insn (for example, propagating a constant into a vector shift expression). R. Hi, Richard, You are right. There exist the chips that only support WMMX instructions in the history. I distinguish the iWMMXt and iWMMXt2 in the patch update this time. In current GCC, -march=iwmmxt and -march=iwmmxt2 (or -mcpu=iwmmxt and -mcpu=iwmmxt2) are almost no difference in the compiling stage. I take advantage of them to do the work, that is, make -march=iwmmxt (or -mcpu=iwmmxt) only support iWMMXt intrinsic iWMMXt built in and WMMX instructions, and make -march=iwmmxt2 (or -mcpu=iwmmxt2) support fully iWMMXt2. Define a new flag FL_IWMMXT2 to represent the chip support iWMMXt2 extension, which directly controls the iWMMXt2 built in initialization and the followed defines. Define __IWMMXT2__ in TARGET_CPU_CPP_BUILTINS to control the access of iWMMXt2 intrinsics. Define TARGET_REALLY_IWMMXT2 to control the access of WMMX2 instructions' machine description. In arm.md, define iwmmxt2 in arch attr to control the access of the alternative in shift patterns. The updated patch 4/5 is attached here. 1/5, 2/5 and 3/5 are updated accordingly. Attach them in related mails. Please take a look if such modification is proper. Changelog: * config/arm/arm.c (arm_output_iwmmxt_shift_immediate): New function. (arm_output_iwmmxt_tinsr): Likewise. * config/arm/arm-protos.h (arm_output_iwmmxt_shift_immediate): Declare. (arm_output_iwmmxt_tinsr): Likewise. * config/arm/iwmmxt.md (WCGR0, WCGR1, WCGR2, WCGR3): New constant. (iwmmxt_psadbw, iwmmxt_walign, iwmmxt_tmrc, iwmmxt_tmcr): Delete. (rorv4hi3, rorv2si3, rordi3): Likewise. (rorv4hi3_di, rorv2si3_di, rordi3_di): Likewise. (ashrv4hi3_di, ashrv2si3_di, ashrdi3_di): Likewise. (lshrv4hi3_di, lshrv2si3_di, lshrdi3_di): Likewise. (ashlv4hi3_di, ashlv2si3_di, ashldi3_di): Likewise. (iwmmxt_tbcstqi, iwmmxt_tbcsthi, iwmmxt_tbcstsi): Likewise (*iwmmxt_clrv8qi, *iwmmxt_clrv4hi, *iwmmxt_clrv2si): Likewise. (tbcstv8qi, tbcstv4hi, tbsctv2si): New pattern. (iwmmxt_clrv8qi, iwmmxt_clrv4hi, iwmmxt_clrv2si): Likewise. (*andmode3_iwmmxt, *iormode3_iwmmxt, *xormode3_iwmmxt): Likewise. (rormode3, rormode3_di): Likewise. (ashrmode3_di, lshrmode3_di, ashlmode3_di): Likewise. (ashlimode3_iwmmxt, iwmmxt_waligni, iwmmxt_walignr): Likewise. (iwmmxt_walignr0, iwmmxt_walignr1): Likewise. (iwmmxt_walignr2
RE: Does neon_vset_lanemode expand wrong code when BYTES_BIG_ENDIAN?
From: Joseph Myers [mailto:jos...@codesourcery.com]
On Wed, 4 Jan 2012, Xinyu Qi wrote:
It seems these two parts of the code dealing with BYTE_BIG_ENDIAN will
cancel each other, and result in the original imm op unchanged.
Yes, that's correct. Lane numbers for NEON intrinsics are the same as
those used in assembly instructions, but for big-endian they are different
from those used in the target-independent semantics of the RTL
intermediate representation.
Is there something wrong with these code?
No, see http://gcc.gnu.org/ml/gcc-patches/2010-06/msg00409.html where I
explain this at greater length.
I see.
Would you mind to take a look at the test case neon-vset_lanes8.c under
gcc.target/arm/
If BYTE_BIG_ENDIAN, would the x be {1,2,3,4,16,6,7,8} after vset_lane_s8
(16,x,3) is called?
And if so, it is obviously not equal to y and test fails.
Does this case not suitable for BYTE_BIG_ENDIAN test?
Thanks,
Xinyu
Does neon_vset_lanemode expand wrong code when BYTES_BIG_ENDIAN?
Hi,
In neon.md, the define_expand neon_vset_lanemode has extra code to deal
with the imm operand when BYTE_BIG_ENDIAN,
unsigned int elt = INTVAL (operands[3]);
if (BYTES_BIG_ENDIAN)
{
unsigned int reg_nelts
= 64 / GET_MODE_BITSIZE (GET_MODE_INNER (MODEmode));
elt ^= reg_nelts - 1;
}
Then,
emit_insn (gen_vec_setmode_internal (operands[0], operands[1],
GEN_INT (1 elt), operands[2]));
While the define_insn vec_setmode_internal has the extra code as well,
int elt = ffs ((int) INTVAL (operands[2])) - 1;
if (BYTES_BIG_ENDIAN)
elt = GET_MODE_NUNITS (MODEmode) - 1 - elt;
operands[2] = GEN_INT (elt);
It seems these two parts of the code dealing with BYTE_BIG_ENDIAN will cancel
each other,
and result in the original imm op unchanged.
Is there something wrong with these code?
Thanks,
Xinyu
RE: PING: [PATCH, ARM, iWMMXt][4/5]: WMMX machine description
At 2011-12-22 17:53:45,Richard Earnshaw rearn...@arm.com wrote: On 22/12/11 06:38, Xinyu Qi wrote: At 2011-12-15 01:32:13,Richard Earnshaw rearn...@arm.com wrote: On 24/11/11 01:33, Xinyu Qi wrote: Hi Ramana, I solve the conflict, please try again. The new diff is attached. Thanks, Xinyu At 2011-11-19 07:36:15,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: Hi Xinyu, This doesn't apply cleanly currently on trunk and the reject appears to come from iwmmxt.md and I've not yet investigated why. Can you have a look ? This patch is NOT ok. You're adding features that were new in iWMMXt2 (ie not in the original implementation) but you've provided no means by which the compiler can detect which operations are only available on the new cores. Hi Richard, All of the WMMX chips support WMMX2 instructions. This may be true for Marvell's current range of processors, but I find it hard to reconcile with the assembler support in GAS, which clearly distinguishes between iWMMXT and iWMMXT2 instruction sets. Are you telling me that no cores were ever manufactured (even by Intel) that only supported iWMMXT? I'm concerned that this patch will break support for existing users who have older chips (for GCC we have to go through a deprecation cycle if we want to drop support for something we now believe is no-longer worth maintaining). What I do is to complement the WMMX2 intrinsic support in GCC. I understand that, and I'm not saying the patch can never go in; just that it needs to separate out the support for the different architecture variants. I don't think it is necessary for users to consider whether one WMMX insn is a WMMX2 insn or not. Users don't (unless they want their code to run on legacy processors that only support the original instruction set), but the compiler surely must know what it is targeting. Remember that the instruction patterns are not entirely black boxes, the compiler can do optimizations on intrinsics (it's one of the reasons why they are better than inline assembly). Unless the compiler knows exactly what instructions are legal, it could end up optimizing something that started as a WMMX insn into something that's a WMMX2 insn (for example, propagating a constant into a vector shift expression). R. Hi, Richard, You are right. There exist the chips that only support WMMX instructions in the history. I distinguish the iWMMXt and iWMMXt2 in the patch update this time. In current GCC, -march=iwmmxt and -march=iwmmxt2 (or -mcpu=iwmmxt and -mcpu=iwmmxt2) are almost no difference in the compiling stage. I take advantage of them to do the work, that is, make -march=iwmmxt (or -mcpu=iwmmxt) only support iWMMXt intrinsic iWMMXt built in and WMMX instructions, and make -march=iwmmxt2 (or -mcpu=iwmmxt2) support fully iWMMXt2. Define a new flag FL_IWMMXT2 to represent the chip support iWMMXt2 extension, which directly controls the iWMMXt2 built in initialization and the followed defines. Define __IWMMXT2__ in TARGET_CPU_CPP_BUILTINS to control the access of iWMMXt2 intrinsics. Define TARGET_REALLY_IWMMXT2 to control the access of WMMX2 instructions' machine description. In arm.md, define iwmmxt2 in arch attr to control the access of the alternative in shift patterns. The updated patch 4/5 is attached here. 1/5, 2/5 and 3/5 are updated accordingly. Attach them in related mails. Please take a look if such modification is proper. Changelog: * config/arm/arm.c (arm_output_iwmmxt_shift_immediate): New function. (arm_output_iwmmxt_tinsr): Likewise. * config/arm/arm-protos.h (arm_output_iwmmxt_shift_immediate): Declare. (arm_output_iwmmxt_tinsr): Likewise. * config/arm/iwmmxt.md (WCGR0, WCGR1, WCGR2, WCGR3): New constant. (iwmmxt_psadbw, iwmmxt_walign, iwmmxt_tmrc, iwmmxt_tmcr): Delete. (rorv4hi3, rorv2si3, rordi3): Likewise. (rorv4hi3_di, rorv2si3_di, rordi3_di): Likewise. (ashrv4hi3_di, ashrv2si3_di, ashrdi3_di): Likewise. (lshrv4hi3_di, lshrv2si3_di, lshrdi3_di): Likewise. (ashlv4hi3_di, ashlv2si3_di, ashldi3_di): Likewise. (iwmmxt_tbcstqi, iwmmxt_tbcsthi, iwmmxt_tbcstsi): Likewise (*iwmmxt_clrv8qi, *iwmmxt_clrv4hi, *iwmmxt_clrv2si): Likewise. (tbcstv8qi, tbcstv4hi, tbsctv2si): New pattern. (iwmmxt_clrv8qi, iwmmxt_clrv4hi, iwmmxt_clrv2si): Likewise. (*andmode3_iwmmxt, *iormode3_iwmmxt, *xormode3_iwmmxt): Likewise. (rormode3, rormode3_di): Likewise. (ashrmode3_di, lshrmode3_di, ashlmode3_di): Likewise. (ashlimode3_iwmmxt, iwmmxt_waligni, iwmmxt_walignr): Likewise. (iwmmxt_walignr0, iwmmxt_walignr1): Likewise. (iwmmxt_walignr2, iwmmxt_walignr3): Likewise. (iwmmxt_setwcgr0, iwmmxt_setwcgr1): Likewise. (iwmmxt_setwcgr2, iwmmxt_setwcgr3): Likewise. (iwmmxt_getwcgr0, iwmmxt_getwcgr1): Likewise
RE: [PATCH, ARM, iWMMXt][1/5]: ARM code generic change
At 2011-12-15 00:47:48,Richard Earnshaw rearn...@arm.com wrote: On 14/07/11 08:35, Xinyu Qi wrote: Hi, It is the first part of iWMMXt maintenance. *config/arm/arm.c (arm_option_override): Enable iWMMXt with VFP. iWMMXt and NEON are incompatible. iWMMXt unsupported under Thumb-2 mode. (arm_expand_binop_builtin): Accept immediate op (with mode VOID) *config/arm/arm.md: Resettle include location of iwmmxt.md so that *arm_movdi and *arm_movsi_insn could be used when iWMMXt is enabled. With the current work in trunk to handle enabled attributes and per-alternative predicable attributes (Thanks Bernd) we should be able to get rid of *cond_iwmmxt_movsi_insn in iwmmxt.md file. It's not a matter for this patch but for a follow-up patch. Actually we should probably do the same for the various insns that are dotted around all over the place with final conditions that prevent matching - atleast makes the backend description slightly smaller :). Add pipeline description file include. It is enough to say (filename): Include. in the changelog entry. The include for the pipeline description file should be with the patch that you add this in i.e. patch #5. Please add this to MD_INCLUDES in t-arm as well. Also as a general note, please provide a correct Changelog entry. This is not the format that we expect Changelog entries to be in. Please look at the coding standards on the website for this or at other patches submitted with respect to Changelog entries. Please fix this for each patch in the patch stack. cheers Ramana Thanks for reviewing. I have updated the patches and the Changelog. *config/arm/arm.c (arm_option_override): Enable iWMMXt with VFP. (arm_expand_binop_builtin): Accept VOIDmode op. *config/arm/arm.md (*arm_movdi, *arm_movsi_insn): Remove condition !TARGET_IWMMXT. (iwmmxt.md): Include location. Thanks, Xinyu= + VFP and iWMMXt however can coexist. */ if (TARGET_IWMMXT + TARGET_HARD_FLOAT !TARGET_VFP) +sorry (iWMMXt and non-VFP floating point unit); + + /* iWMMXt and NEON are incompatible. */ if (TARGET_IWMMXT + TARGET_NEON) +sorry (iWMMXt and NEON); - /* ??? iWMMXt insn patterns need auditing for Thumb-2. */ + /* iWMMXt unsupported under Thumb-2 mode. */ if (TARGET_THUMB2 TARGET_IWMMXT) sorry (Thumb-2 iWMMXt); Don't use sorry() when a feature is not supported by the hardware; sorry() is used when GCC is currently unable to support something that it should. Use error() in these cases. Secondly, iWMMXt is incompatible with the entire Thumb ISA, not just the Thumb-2 extensions to the Thumb ISA. Done. +;; Load the Intel Wireless Multimedia Extension patterns (include +iwmmxt.md) + No, the extension patterns need to come at the end of the main machine description. The list at the top of the MD file is purely for pipeline descriptions. Why do you think this is needed? This modification is needless right now since *iwmmxt_movsi_insn and *iwmmxt_arm_movdi have been corrected in the fourth part of the patch. Revert it. The new modified patch is attached. * config/arm/arm.c (arm_option_override): Enable use of iWMMXt with VFP. Disable use of iWMMXt with NEON. Disable use of iWMMXt under Thumb mode. (arm_expand_binop_builtin): Accept VOIDmode op. Thanks, Xinyu Other bits are ok. R. New changlog * config/arm/arm.c (FL_IWMMXT2): New define. (arm_arch_iwmmxt2): New variable. (arm_option_override): Enable use of iWMMXt with VFP. Disable use of iWMMXt with NEON. Disable use of iWMMXt under Thumb mode. Set arm_arch_iwmmxt2. (arm_expand_binop_builtin): Accept VOIDmode op. * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __IWMMXT2__. (TARGET_IWMMXT2): New define. (TARGET_REALLY_IWMMXT2): Likewise. (arm_arch_iwmmxt2): Declare. * config/arm/arm-cores.def (iwmmxt2): Add FL_IWMMXT2. * config/arm/arm-arches.def (iwmmxt2): Likewise. * config/arm/arm.md (arch): Add iwmmxt2. (arch_enabled): Handle iwmmxt2. Thanks, Xinyu 1_generic.diff Description: 1_generic.diff
RE: PING: [PATCH, ARM, iWMMXt][2/5]: intrinsic head file change
* config/arm/mmintrin.h: Use __IWMMXT__ to enable iWMMXt intrinsics. Use __IWMMXT2__ to enable iWMMXt2 intrinsics. Use C name-mangling for intrinsics. (__v8qi): Redefine. (_mm_cvtsi32_si64, _mm_andnot_si64, _mm_sad_pu8): Revise. (_mm_sad_pu16, _mm_align_si64, _mm_setwcx, _mm_getwcx): Likewise. (_m_from_int): Likewise. (_mm_sada_pu8, _mm_sada_pu16): New intrinsic. (_mm_alignr0_si64, _mm_alignr1_si64, _mm_alignr2_si64): Likewise. (_mm_alignr3_si64, _mm_tandcb, _mm_tandch, _mm_tandcw): Likewise. (_mm_textrcb, _mm_textrch, _mm_textrcw, _mm_torcb): Likewise. (_mm_torch, _mm_torcw, _mm_tbcst_pi8, _mm_tbcst_pi16): Likewise. (_mm_tbcst_pi32): Likewise. (_mm_abs_pi8, _mm_abs_pi16, _mm_abs_pi32): New iWMMXt2 intrinsic. (_mm_addsubhx_pi16, _mm_absdiff_pu8, _mm_absdiff_pu16): Likewise. (_mm_absdiff_pu32, _mm_addc_pu16, _mm_addc_pu32): Likewise. (_mm_avg4_pu8, _mm_avg4r_pu8, _mm_maddx_pi16, _mm_maddx_pu16): Likewise. (_mm_msub_pi16, _mm_msub_pu16, _mm_mulhi_pi32): Likewise. (_mm_mulhi_pu32, _mm_mulhir_pi16, _mm_mulhir_pi32): Likewise. (_mm_mulhir_pu16, _mm_mulhir_pu32, _mm_mullo_pi32): Likewise. (_mm_qmulm_pi16, _mm_qmulm_pi32, _mm_qmulmr_pi16): Likewise. (_mm_qmulmr_pi32, _mm_subaddhx_pi16, _mm_addbhusl_pu8): Likewise. (_mm_addbhusm_pu8, _mm_qmiabb_pi32, _mm_qmiabbn_pi32): Likewise. (_mm_qmiabt_pi32, _mm_qmiabtn_pi32, _mm_qmiatb_pi32): Likewise. (_mm_qmiatbn_pi32, _mm_qmiatt_pi32, _mm_qmiattn_pi32): Likewise. (_mm_wmiabb_si64, _mm_wmiabbn_si64, _mm_wmiabt_si64): Likewise. (_mm_wmiabtn_si64, _mm_wmiatb_si64, _mm_wmiatbn_si64): Likewise. (_mm_wmiatt_si64, _mm_wmiattn_si64, _mm_wmiawbb_si64): Likewise. (_mm_wmiawbbn_si64, _mm_wmiawbt_si64, _mm_wmiawbtn_si64): Likewise. (_mm_wmiawtb_si64, _mm_wmiawtbn_si64, _mm_wmiawtt_si64): Likewise. (_mm_wmiawttn_si64, _mm_merge_si64): Likewise. (_mm_torvscb, _mm_torvsch, _mm_torvscw): Likewise. (_m_to_int): New define. Thanks, Xinyu 2_mmintrin.diff Description: 2_mmintrin.diff
RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
At 2011-11-24 09:27:04,Xinyu Qi x...@marvell.com wrote: At 2011-11-19 07:08:22,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: On 20 October 2011 08:39, Xinyu Qi x...@marvell.com wrote: Ping http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html * config/arm/arm.c (enum arm_builtins): Revise built-in fcode. (builtin_description bdesc_2arg): Revise built in declaration. (builtin_description bdesc_1arg): Likewise. (arm_init_iwmmxt_builtins): Revise built in initialization. (arm_expand_builtin): Revise built in expansion. This currently doesn't apply - can you take a look ? Hi Ramana, I resolve the patch conflict with the newest trunk gcc. The resolved diff is attached. Thanks, Xinyu Update the built in expand. Remove some redundant code. New diff is attached. Thanks, Xinyu * config/arm/arm.c (enum arm_builtins): Revise built-in fcode. (IWMMXT2_BUILTIN): New define. (IWMMXT2_BUILTIN2): Likewise. (iwmmx2_mbuiltin): Likewise. (builtin_description bdesc_2arg): Revise built in declaration. (builtin_description bdesc_1arg): Likewise. (arm_init_iwmmxt_builtins): Revise built in initialization. (arm_expand_builtin): Revise built in expansion. Thanks, Xinyu 3_arm_c.diff Description: 3_arm_c.diff
RE: [PATCH, ARM, iWMMXt][1/5]: ARM code generic change
At 2011-12-15 00:47:48,Richard Earnshaw rearn...@arm.com wrote: On 14/07/11 08:35, Xinyu Qi wrote: Hi, It is the first part of iWMMXt maintenance. *config/arm/arm.c (arm_option_override): Enable iWMMXt with VFP. iWMMXt and NEON are incompatible. iWMMXt unsupported under Thumb-2 mode. (arm_expand_binop_builtin): Accept immediate op (with mode VOID) *config/arm/arm.md: Resettle include location of iwmmxt.md so that *arm_movdi and *arm_movsi_insn could be used when iWMMXt is enabled. With the current work in trunk to handle enabled attributes and per-alternative predicable attributes (Thanks Bernd) we should be able to get rid of *cond_iwmmxt_movsi_insn in iwmmxt.md file. It's not a matter for this patch but for a follow-up patch. Actually we should probably do the same for the various insns that are dotted around all over the place with final conditions that prevent matching - atleast makes the backend description slightly smaller :). Add pipeline description file include. It is enough to say (filename): Include. in the changelog entry. The include for the pipeline description file should be with the patch that you add this in i.e. patch #5. Please add this to MD_INCLUDES in t-arm as well. Also as a general note, please provide a correct Changelog entry. This is not the format that we expect Changelog entries to be in. Please look at the coding standards on the website for this or at other patches submitted with respect to Changelog entries. Please fix this for each patch in the patch stack. cheers Ramana Thanks for reviewing. I have updated the patches and the Changelog. *config/arm/arm.c (arm_option_override): Enable iWMMXt with VFP. (arm_expand_binop_builtin): Accept VOIDmode op. *config/arm/arm.md (*arm_movdi, *arm_movsi_insn): Remove condition !TARGET_IWMMXT. (iwmmxt.md): Include location. Thanks, Xinyu= + VFP and iWMMXt however can coexist. */ + if (TARGET_IWMMXT TARGET_HARD_FLOAT !TARGET_VFP) +sorry (iWMMXt and non-VFP floating point unit); + + /* iWMMXt and NEON are incompatible. */ + if (TARGET_IWMMXT TARGET_NEON) +sorry (iWMMXt and NEON); - /* ??? iWMMXt insn patterns need auditing for Thumb-2. */ + /* iWMMXt unsupported under Thumb-2 mode. */ if (TARGET_THUMB2 TARGET_IWMMXT) sorry (Thumb-2 iWMMXt); Don't use sorry() when a feature is not supported by the hardware; sorry() is used when GCC is currently unable to support something that it should. Use error() in these cases. Secondly, iWMMXt is incompatible with the entire Thumb ISA, not just the Thumb-2 extensions to the Thumb ISA. Done. +;; Load the Intel Wireless Multimedia Extension patterns +(include iwmmxt.md) + No, the extension patterns need to come at the end of the main machine description. The list at the top of the MD file is purely for pipeline descriptions. Why do you think this is needed? This modification is needless right now since *iwmmxt_movsi_insn and *iwmmxt_arm_movdi have been corrected in the fourth part of the patch. Revert it. The new modified patch is attached. * config/arm/arm.c (arm_option_override): Enable use of iWMMXt with VFP. Disable use of iWMMXt with NEON. Disable use of iWMMXt under Thumb mode. (arm_expand_binop_builtin): Accept VOIDmode op. Thanks, Xinyu Other bits are ok. R. 1_generic.diff Description: 1_generic.diff
RE: PING: [PATCH, ARM, iWMMXt][4/5]: WMMX machine description
At 2011-12-15 01:32:13,Richard Earnshaw rearn...@arm.com wrote: On 24/11/11 01:33, Xinyu Qi wrote: Hi Ramana, I solve the conflict, please try again. The new diff is attached. Thanks, Xinyu At 2011-11-19 07:36:15,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: Hi Xinyu, This doesn't apply cleanly currently on trunk and the reject appears to come from iwmmxt.md and I've not yet investigated why. Can you have a look ? This patch is NOT ok. You're adding features that were new in iWMMXt2 (ie not in the original implementation) but you've provided no means by which the compiler can detect which operations are only available on the new cores. Hi Richard, All of the WMMX chips support WMMX2 instructions. What I do is to complement the WMMX2 intrinsic support in GCC. I don't think it is necessary for users to consider whether one WMMX insn is a WMMX2 insn or not. Further, I don't like the way you have separate patterns for the rotates with immediate. Please investigate using the alternative enable feature to reduce these down to single patterns. Once you've done all this, some of your tricky builtin expand code in patch 3/5 should then simplify significantly as you won't need separate expand codes for those alternatives. Done. Combine immediate and register alternative into one pattern for all shift patterns. Also update the part three. Send it in another mail. The new diff is attached. The new Changlog: * config/arm/arm.c (arm_output_iwmmxt_shift_immediate): New function. (arm_output_iwmmxt_tinsr): Likewise. * config/arm/arm-protos.h (arm_output_iwmmxt_shift_immediate): Declare. (arm_output_iwmmxt_tinsr): Likewise. * config/arm/iwmmxt.md (WCGR0, WCGR1, WCGR2, WCGR3): New constant. (iwmmxt_psadbw, iwmmxt_walign, iwmmxt_tmrc, iwmmxt_tmcr): Delete. (rorv4hi3, rorv2si3, rordi3): Likewise. (rorv4hi3_di, rorv2si3_di, rordi3_di): Likewise. (ashrv4hi3_di, ashrv2si3_di, ashrdi3_di): Likewise. (lshrv4hi3_di, lshrv2si3_di, lshrdi3_di): Likewise. (ashlv4hi3_di, ashlv2si3_di, ashldi3_di): Likewise. (iwmmxt_tbcstqi, iwmmxt_tbcsthi, iwmmxt_tbcstsi): Likewise (*iwmmxt_clrv8qi, *iwmmxt_clrv4hi, *iwmmxt_clrv2si): Likewise. (tbcstv8qi, tbcstv4hi, tbsctv2si): New pattern. (iwmmxt_clrv8qi, iwmmxt_clrv4hi, iwmmxt_clrv2si): Likewise. (*andmode3_iwmmxt, *iormode3_iwmmxt, *xormode3_iwmmxt): Likewise. (rormode3, rormode3_di): Likewise. (ashrmode3_di, lshrmode3_di, ashlmode3_di): Likewise. (ashlimode3_iwmmxt, iwmmxt_waligni, iwmmxt_walignr): Likewise. (iwmmxt_walignr0, iwmmxt_walignr1): Likewise. (iwmmxt_walignr2, iwmmxt_walignr3): Likewise. (iwmmxt_setwcgr0, iwmmxt_setwcgr1): Likewise. (iwmmxt_setwcgr2, iwmmxt_setwcgr3): Likewise. (iwmmxt_getwcgr0, iwmmxt_getwcgr1): Likewise. (iwmmxt_getwcgr2, iwmmxt_getwcgr3): Likewise. (All instruction patterns): Add wtype attribute. (*iwmmxt_arm_movdi, *iwmmxt_movsi_insn): iWMMXt coexist with vfp. (iwmmxt_uavgrndv8qi3, iwmmxt_uavgrndv4hi3): Revise the pattern. (iwmmxt_uavgv8qi3, iwmmxt_uavgv4hi3): Likewise. (ashrmode3_iwmmxt, ashlmode3_iwmmxt, lshrmode3_iwmmxt): Likewise. (iwmmxt_tinsrb, iwmmxt_tinsrh, iwmmxt_tinsrw):Likewise. (eqv8qi3, eqv4hi3, eqv2si3, gtuv8qi3): Likewise. (gtuv4hi3, gtuv2si3, gtv8qi3, gtv4hi3, gtv2si3): Likewise. (iwmmxt_wunpckihh, iwmmxt_wunpckihw, iwmmxt_wunpckilh): Likewise. (iwmmxt_wunpckilw, iwmmxt_wunpckehub, iwmmxt_wunpckehuh): Likewise. (iwmmxt_wunpckehuw, iwmmxt_wunpckehsb, iwmmxt_wunpckehsh): Likewise. (iwmmxt_wunpckehsw, iwmmxt_wunpckelub, iwmmxt_wunpckeluh): Likewise. (iwmmxt_wunpckeluw, iwmmxt_wunpckelsb, iwmmxt_wunpckelsh): Likewise. (iwmmxt_wunpckelsw, iwmmxt_wmadds, iwmmxt_wmaddu): Likewise. (iwmmxt_wsadb, iwmmxt_wsadh, iwmmxt_wsadbz, iwmmxt_wsadhz): Likewise. (iwmmxt2.md): Include. * config/arm/iwmmxt2.md: New file. * config/arm/iterators.md (VMMX2): New mode_iterator. * config/arm/arm.md (wtype): New attribute. (UNSPEC_WMADDS, UNSPEC_WMADDU): Delete. (UNSPEC_WALIGNI): New unspec. * config/arm/t-arm (MD_INCLUDES): Add iwmmxt2.md. * config/arm/predicates.md (imm_or_reg_operand): New predicate. Thanks, Xinyu R. cheers Ramana On 26 September 2011 04:22, Xinyu Qi x...@marvell.com wrote: Ping. http://gcc.gnu.org/ml/gcc-patches/2011-09/msg00279.html * config/arm/arm.c (arm_output_iwmmxt_shift_immediate): New function. (arm_output_iwmmxt_tinsr): Likewise. * config/arm/arm-protos.h (arm_output_iwmmxt_shift_immediate): Declare. (arm_output_iwmmxt_tinsr): Likewise. * config/arm/iwmmxt.md (WCGR0, WCGR1, WCGR2, WCGR3): New constant. (iwmmxt_psadbw
RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
At 2011-11-24 09:27:04,Xinyu Qi x...@marvell.com wrote: At 2011-11-19 07:08:22,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: On 20 October 2011 08:39, Xinyu Qi x...@marvell.com wrote: Ping http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html * config/arm/arm.c (enum arm_builtins): Revise built-in fcode. (builtin_description bdesc_2arg): Revise built in declaration. (builtin_description bdesc_1arg): Likewise. (arm_init_iwmmxt_builtins): Revise built in initialization. (arm_expand_builtin): Revise built in expansion. This currently doesn't apply - can you take a look ? Hi Ramana, I resolve the patch conflict with the newest trunk gcc. The resolved diff is attached. Thanks, Xinyu Update the built in expand. Remove some redundant code. New diff is attached. Thanks, Xinyu 3_arm_c.diff Description: 3_arm_c.diff
RE: PING: [PATCH, ARM, iWMMXt][5/5]: pipeline description
At 2011-10-20 20:36:53,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: On 20 October 2011 08:42, Xinyu Qi x...@marvell.com wrote: Ping http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01106.html Index: gcc/config/arm/marvell-f-iwmmxt.md === --- gcc/config/arm/marvell-f-iwmmxt.md (revision 0) +++ gcc/config/arm/marvell-f-iwmmxt.md (revision 0) @@ -0,0 +1,179 @@ + +;; instructions classes s/instructions/Instruction. Otherwise OK. Ramana Fix the typo. New diff is attached. * config/arm/t-arm (MD_INCLUDES): Add marvell-f-iwmmxt.md. * config/arm/marvell-f-iwmmxt.md: New file. * config/arm/arm.md (marvell-f-iwmmxt.md): Include. Thanks, Xinyu 5_pipeline.diff Description: 5_pipeline.diff
RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
At 2011-11-19 07:08:22,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: On 20 October 2011 08:39, Xinyu Qi x...@marvell.com wrote: Ping http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html * config/arm/arm.c (enum arm_builtins): Revise built-in fcode. (builtin_description bdesc_2arg): Revise built in declaration. (builtin_description bdesc_1arg): Likewise. (arm_init_iwmmxt_builtins): Revise built in initialization. (arm_expand_builtin): Revise built in expansion. This currently doesn't apply - can you take a look ? Hi Ramana, I resolve the patch conflict with the newest trunk gcc. The resolved diff is attached. Thanks, Xinyu 3_arm_c.diff Description: 3_arm_c.diff
RE: PING: [PATCH, ARM, iWMMXt][4/5]: WMMX machine description
Hi Ramana, I solve the conflict, please try again. The new diff is attached. Thanks, Xinyu At 2011-11-19 07:36:15,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: Hi Xinyu, This doesn't apply cleanly currently on trunk and the reject appears to come from iwmmxt.md and I've not yet investigated why. Can you have a look ? cheers Ramana On 26 September 2011 04:22, Xinyu Qi x...@marvell.com wrote: Ping. http://gcc.gnu.org/ml/gcc-patches/2011-09/msg00279.html * config/arm/arm.c (arm_output_iwmmxt_shift_immediate): New function. (arm_output_iwmmxt_tinsr): Likewise. * config/arm/arm-protos.h (arm_output_iwmmxt_shift_immediate): Declare. (arm_output_iwmmxt_tinsr): Likewise. * config/arm/iwmmxt.md (WCGR0, WCGR1, WCGR2, WCGR3): New constant. (iwmmxt_psadbw, iwmmxt_walign, iwmmxt_tmrc, iwmmxt_tmcr): Delete. (iwmmxt_tbcstqi, iwmmxt_tbcsthi, iwmmxt_tbcstsi): Likewise (*iwmmxt_clrv8qi, *iwmmxt_clrv4hi, *iwmmxt_clrv2si): Likewise. (tbcstv8qi, tbcstv4hi, tbsctv2si): New pattern. (iwmmxt_clrv8qi, iwmmxt_clrv4hi, iwmmxt_clrv2si): Likewise. (*andmode3_iwmmxt, *iormode3_iwmmxt, *xormode3_iwmmxt): Likewise. (rorimode3, ashrimode3_iwmmxt, lshrimode3_iwmmxt): Likewise. (ashlimode3_iwmmxt, iwmmxt_waligni, iwmmxt_walignr): Likewise. (iwmmxt_walignr0, iwmmxt_walignr1): Likewise. (iwmmxt_walignr2, iwmmxt_walignr3): Likewise. (iwmmxt_setwcgr0, iwmmxt_setwcgr1): Likewise. (iwmmxt_setwcgr2, iwmmxt_setwcgr3): Likewise. (iwmmxt_getwcgr0, iwmmxt_getwcgr1): Likewise. (iwmmxt_getwcgr2, iwmmxt_getwcgr3): Likewise. (All instruction patterns): Add wtype attribute. (*iwmmxt_arm_movdi, *iwmmxt_movsi_insn): iWMMXt coexist with vfp. (iwmmxt_uavgrndv8qi3, iwmmxt_uavgrndv4hi3): Revise the pattern. (iwmmxt_uavgv8qi3, iwmmxt_uavgv4hi3): Likewise. (iwmmxt_tinsrb, iwmmxt_tinsrh, iwmmxt_tinsrw):Likewise. (eqv8qi3, eqv4hi3, eqv2si3, gtuv8qi3): Likewise. (gtuv4hi3, gtuv2si3, gtv8qi3, gtv4hi3, gtv2si3): Likewise. (iwmmxt_wunpckihh, iwmmxt_wunpckihw, iwmmxt_wunpckilh): Likewise. (iwmmxt_wunpckilw, iwmmxt_wunpckehub, iwmmxt_wunpckehuh): Likewise. (iwmmxt_wunpckehuw, iwmmxt_wunpckehsb, iwmmxt_wunpckehsh): Likewise. (iwmmxt_wunpckehsw, iwmmxt_wunpckelub, iwmmxt_wunpckeluh): Likewise. (iwmmxt_wunpckeluw, iwmmxt_wunpckelsb, iwmmxt_wunpckelsh): Likewise. (iwmmxt_wunpckelsw, iwmmxt_wmadds, iwmmxt_wmaddu): Likewise. (iwmmxt_wsadb, iwmmxt_wsadh, iwmmxt_wsadbz, iwmmxt_wsadhz): Likewise. (iwmmxt2.md): Include. * config/arm/iwmmxt2.md: New file. * config/arm/iterators.md (VMMX2): New mode_iterator. * config/arm/arm.md (wtype): New attribute. (UNSPEC_WMADDS, UNSPEC_WMADDU): Delete. (UNSPEC_WALIGNI): New unspec. * config/arm/t-arm (MD_INCLUDES): Add iwmmxt2.md. At 2011-09-05 17:55:34,Xinyu Qi x...@marvell.com wrote: At 2011-08-18 10:21:01,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: On 14 July 2011 08:45, Xinyu Qi x...@marvell.com wrote: Hi, It is the fourth part of iWMMXt maintenance. Can this be broken down further. ? I'll have to do this again but there are some initial comments below for some discussion. (*iwmmxt_arm_movdi, *iwmmxt_movsi_insn, iwmmxt_uavgrndv8qi3, iwmmxt_uavgrndv4hi3, iwmmxt_uavgv8qi3, iwmmxt_uavgv4hi3, iwmmxt_tinsrb, iwmmxt_tinsrh, iwmmxt_tinsrw, eqv8qi3, eqv4hi3, eqv2si3, gtuv8qi3, gtuv4hi3, gtuv2si3, gtv8qi3, gtv4hi3, gtv2si3, iwmmxt_wunpckihb, iwmmxt_wunpckihh, iwmmxt_wunpckihw, iwmmxt_wunpckilb, iwmmxt_wunpckilh, iwmmxt_wunpckilw, iwmmxt_wunpckehub, iwmmxt_wunpckehuh, iwmmxt_wunpckehuw, iwmmxt_wunpckehsb, iwmmxt_wunpckehsh, iwmmxt_wunpckehsw, iwmmxt_wunpckelub, iwmmxt_wunpckeluh, iwmmxt_wunpckeluw, iwmmxt_wunpckelsb, iwmmxt_wunpckelsh, iwmmxt_wunpckelsw, iwmmxt_wmadds, iwmmxt_wmaddu, iwmmxt_wsadb, iwmmxt_wsadh, iwmmxt_wsadbz, iwmmxt_wsadhz): Revise. Revise to do what ? Sorry for late response. Some of them have incorrect RTL templates. For example, see iwmmxt_uavgv8qi3 Its old RTL template is: [(set (match_operand:V8QI 0 register_operand =y) (ashiftrt:V8QI (plus:V8QI (match_operand:V8QI 1 register_operand y) (match_operand:V8QI 2 register_operand y)) (const_int 1)))] According to the assembly behavior of wavg2b, the correct one should be: [(set (match_operand:V8QI 0 register_operand =y) (truncate:V8QI (lshiftrt:V8HI (plus:V8HI (zero_extend:V8HI (match_operand:V8QI 1 register_operand y)) (zero_extend:V8HI (match_operand:V8QI 2
RE: [RFA/ARM][Patch 01/02]: Thumb2 epilogue in RTL
At 2011-11-22 18:37:16,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: Though I don't fully understand this patch, I think it is unnecessary to consider turn on Thumb2 for iwmmxt, because there is no chip that supports WMMX instructions with thumb2 mode. Xinyu: I seem to have mis-remembered that one of your patches was turning on Thumb2 for wMMX. Hi Ramana, I remember I just enable iwmmxt with vfp in the first part of my patch. Ramana, in that case, should I add the change you suggested in ARM RTL epilogue patch only? The comment in Thumb2 epilogues should remain and yes - it should be added to the ARM RTL epilogue patch only. I'm also ok with that being in with a #if 0 around it but given it's in the epilogue whoever tries turning on Thumb2 for iwMMX will surely notice that in the first testrun :) I'll try and find some time later today to apply both the patches and see where I get to. cheers Ramana --
RE: [RFA/ARM][Patch 01/02]: Thumb2 epilogue in RTL
At 2011-11-19 07:11:17,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: On 10 November 2011 18:07, Sameera Deshpande sameera.deshpa...@arm.com wrote: Please find attached the reworked patch. OK but for a very small bit . I'll note that we need to add support for the iwMMXt registers but the attached patch (untested) should be what is needed to support the iwMMxt registers and this should be something that should be incorporated into your ARM RTL epilogues patch as well. My understanding is that this is all you should need to do as there is a wldrd as a part of *iwmmx*_movdi instruction and therefore this should just work in this form. Xinyu can you help in testing this patch once this is applied along with your other patches to turn on Thumb2 for iwmmxt ? cheers Ramana Hi, Ramana, Though I don't fully understand this patch, I think it is unnecessary to consider turn on Thumb2 for iwmmxt, because there is no chip that supports WMMX instructions with thumb2 mode. Thanks, Xinyu
RE: PING: [PATCH, ARM, iWMMXt][1/5]: ARM code generic change
Ping http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01100.html * config/arm/arm.c (arm_option_override): Enable use of iWMMXt with VFP. Disable use of iwMMXt and Neon. (arm_expand_binop_builtin): Accept VOIDmode op. * config/arm/arm.md (*arm_movdi): Remove check for TARGET_IWMMXT. (*arm_movsi_insn): Likewise. (iwmmxt.md): Include earlier.
RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
Ping http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html * config/arm/arm.c (enum arm_builtins): Revise built-in fcode. (builtin_description bdesc_2arg): Revise built in declaration. (builtin_description bdesc_1arg): Likewise. (arm_init_iwmmxt_builtins): Revise built in initialization. (arm_expand_builtin): Revise built in expansion.
RE: PING: [PATCH, ARM, iWMMXt][4/5]: WMMX machine description
Ping http://gcc.gnu.org/ml/gcc-patches/2011-09/msg00279.html * config/arm/arm.c (arm_output_iwmmxt_shift_immediate): New function. (arm_output_iwmmxt_tinsr): Likewise. * config/arm/arm-protos.h (arm_output_iwmmxt_shift_immediate): Declare. (arm_output_iwmmxt_tinsr): Likewise. * config/arm/iwmmxt.md (WCGR0, WCGR1, WCGR2, WCGR3): New constant. (iwmmxt_psadbw, iwmmxt_walign, iwmmxt_tmrc, iwmmxt_tmcr): Delete. (iwmmxt_tbcstqi, iwmmxt_tbcsthi, iwmmxt_tbcstsi): Likewise (*iwmmxt_clrv8qi, *iwmmxt_clrv4hi, *iwmmxt_clrv2si): Likewise. (tbcstv8qi, tbcstv4hi, tbsctv2si): New pattern. (iwmmxt_clrv8qi, iwmmxt_clrv4hi, iwmmxt_clrv2si): Likewise. (*andmode3_iwmmxt, *iormode3_iwmmxt, *xormode3_iwmmxt): Likewise. (rorimode3, ashrimode3_iwmmxt, lshrimode3_iwmmxt): Likewise. (ashlimode3_iwmmxt, iwmmxt_waligni, iwmmxt_walignr): Likewise. (iwmmxt_walignr0, iwmmxt_walignr1): Likewise. (iwmmxt_walignr2, iwmmxt_walignr3): Likewise. (iwmmxt_setwcgr0, iwmmxt_setwcgr1): Likewise. (iwmmxt_setwcgr2, iwmmxt_setwcgr3): Likewise. (iwmmxt_getwcgr0, iwmmxt_getwcgr1): Likewise. (iwmmxt_getwcgr2, iwmmxt_getwcgr3): Likewise. (All instruction patterns): Add wtype attribute. (*iwmmxt_arm_movdi, *iwmmxt_movsi_insn): iWMMXt coexist with vfp. (iwmmxt_uavgrndv8qi3, iwmmxt_uavgrndv4hi3): Revise the pattern. (iwmmxt_uavgv8qi3, iwmmxt_uavgv4hi3): Likewise. (iwmmxt_tinsrb, iwmmxt_tinsrh, iwmmxt_tinsrw):Likewise. (eqv8qi3, eqv4hi3, eqv2si3, gtuv8qi3): Likewise. (gtuv4hi3, gtuv2si3, gtv8qi3, gtv4hi3, gtv2si3): Likewise. (iwmmxt_wunpckihh, iwmmxt_wunpckihw, iwmmxt_wunpckilh): Likewise. (iwmmxt_wunpckilw, iwmmxt_wunpckehub, iwmmxt_wunpckehuh): Likewise. (iwmmxt_wunpckehuw, iwmmxt_wunpckehsb, iwmmxt_wunpckehsh): Likewise. (iwmmxt_wunpckehsw, iwmmxt_wunpckelub, iwmmxt_wunpckeluh): Likewise. (iwmmxt_wunpckeluw, iwmmxt_wunpckelsb, iwmmxt_wunpckelsh): Likewise. (iwmmxt_wunpckelsw, iwmmxt_wmadds, iwmmxt_wmaddu): Likewise. (iwmmxt_wsadb, iwmmxt_wsadh, iwmmxt_wsadbz, iwmmxt_wsadhz): Likewise. (iwmmxt2.md): Include. * config/arm/iwmmxt2.md: New file. * config/arm/iterators.md (VMMX2): New mode_iterator. * config/arm/arm.md (wtype): New attribute. (UNSPEC_WMADDS, UNSPEC_WMADDU): Delete. (UNSPEC_WALIGNI): New unspec. * config/arm/t-arm (MD_INCLUDES): Add iwmmxt2.md.
RE: PING: [PATCH, ARM, iWMMXt][5/5]: pipeline description
Ping http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01106.html * config/arm/t-arm (MD_INCLUDES): Add marvell-f-iwmmxt.md. * config/arm/marvell-f-iwmmxt.md: New file. * config/arm/arm.md (marvell-f-iwmmxt.md): Include.
RE: PING: [PATCH, ARM, iWMMXt][1/5]: ARM code generic change
Ping http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01100.html * config/arm/arm.c (arm_option_override): Enable use of iWMMXt with VFP. Disable use of iwMMXt and Neon. (arm_expand_binop_builtin): Accept VOIDmode op. * config/arm/arm.md (*arm_movdi): Remove check for TARGET_IWMMXT. (*arm_movsi_insn): Likewise. (iwmmxt.md): Include earlier. At 2011-07-29 10:57:39,Xinyu Qi x...@marvell.com wrote: Ping. http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01100.html
RE: PING: [PATCH, ARM, iWMMXt][2/5]: intrinsic head file change
Ping
http://gcc.gnu.org/ml/gcc-patches/2011-08/msg01963.html
* config/arm/mmintrin.h: Revise.
At 2011-08-24 16:14:30,Xinyu Qi x...@marvell.com wrote:
At 2011-08-18 09:33:27,Ramana Radhakrishnan
ramana.radhakrish...@linaro.org wrote:
On 6 July 2011 11:11, Xinyu Qi x...@marvell.com wrote:
Hi,
It is the second part of iWMMXt maintenance.
*config/arm/mmintrin.h:
Revise the iWMMXt intrinsics head file. Fix some intrinsics and add some
new intrinsics
Is there a document somewhere that lists these intrinsics and what
each of these are supposed to be doing ? Missing details again . We
seem to be changing quite a few things.
Hi,
The intrinsic_doc.txt is attached. It is the piece of iWMMXt intrinsic details
doc picked out from Intel Wireless MMX Technology Intrinsic Support with
some
modification.
+
+/* We will treat __int64 as a long long type
+and __m64 as an unsigned long long type to conform to VSC++. */Is
+typedef unsigned long long __m64;
+typedef long long __int64;
Interesting this sort of a change with these cases where you are
changing the type to conform to VSC++ ? This just means old code that
uses this is pretty much broken. Not that I have much hope of that
happening by default - -flax-conversions appears to be needed even
with a trunk compiler.
I couldn't find any material to show why __int64 needs to be redefined. And
all the tests are passed without this change. So decide to discard this
change.
@@ -54,7 +63,7 @@ _mm_cvtsi64_si32 (__int64 __i)
static __inline __int64
_mm_cvtsi32_si64 (int __i)
{
- return __i;
+ return (__i 0x);
}
Eh ? why the 0x before promotion rules. Is this set of
intrinsics documented some place ? What is missing and could be the
subject of a follow-up patch is a set of tests for the wMMX intrinsics
See the intrinsics doc. It says the description of _mm_cvtsi32_si64 is The
integer value is zero-extended to 64 bits.
If r = _mm_cvtsi32_si64(i), then the action is
r [0:31] = i;
r[32:63] = 0;
What's the behaviour of wandn supposed to be ? Does wandn x, y, z
imply x = y ~z or x = ~y z ? If the former then your intrinsic
expansion is wrong unless the meaning of this has changed ? Whats the
behaviour of the intrinsic __mm_and_not_si64 . ?
The description of _mm_andnot_si64 is Performs a logical NOT on the 64-bit
value in m1 and use the result in a bitwise AND with the 64-bit value in m2.
And, wandn wRd, wRn, wRm means wRd = wRn ~wRm
I think __builtin_arm_wandn had better directly match the behavior of wandn.
Therefore, match _mm_andnot_si64 (m1, m2) to __builtin_arm_wandn (m2, m1).
@@ -985,44 +1004,83 @@ _mm_setzero_si64 (void)
static __inline void
_mm_setwcx (const int __value, const int __regno)
{
+ /*Since gcc has the imformation of all wcgr regs
+in arm backend, use builtin to access them instead
+of throw asm directly. Thus, gcc could do some
+optimization on them. */
+
Also this comment is contradictory to what follows in the patch .
You've prima-facie replaced them with bits of inline assembler. I'm
not sure this comment makes a lot of sense on its own.
Sorry. This comment should be removed.
The modified diff is attached.
Thanks,
Xinyu
RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
Ping. http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html * config/arm/arm.c (enum arm_builtins): Revise built-in fcode. (builtin_description bdesc_2arg): Revise built in declaration. (builtin_description bdesc_1arg): Likewise. (arm_init_iwmmxt_builtins): Revise built in initialization. (arm_expand_builtin): Revise built in expansion. At 2011-07-29 11:03:17,Xinyu Qi x...@marvell.com wrote: Ping. http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html At 2011-07-14 15:38:47,Xinyu Qi x...@marvell.com wrote: Hi, It is the third part of iWMMXt maintenance. *config/arm/arm.c (enum arm_builtins): Built-in fcode. (builtin_description bdesc_2arg): Built in declare. (builtin_description bdesc_1arg): Ditto. (arm_init_iwmmxt_builtins): Built in initialize. (arm_expand_builtin): Built in expand. Thanks, Xinyu
RE: PING: [PATCH, ARM, iWMMXt][4/5]: WMMX machine description
Ping. http://gcc.gnu.org/ml/gcc-patches/2011-09/msg00279.html * config/arm/arm.c (arm_output_iwmmxt_shift_immediate): New function. (arm_output_iwmmxt_tinsr): Likewise. * config/arm/arm-protos.h (arm_output_iwmmxt_shift_immediate): Declare. (arm_output_iwmmxt_tinsr): Likewise. * config/arm/iwmmxt.md (WCGR0, WCGR1, WCGR2, WCGR3): New constant. (iwmmxt_psadbw, iwmmxt_walign, iwmmxt_tmrc, iwmmxt_tmcr): Delete. (iwmmxt_tbcstqi, iwmmxt_tbcsthi, iwmmxt_tbcstsi): Likewise (*iwmmxt_clrv8qi, *iwmmxt_clrv4hi, *iwmmxt_clrv2si): Likewise. (tbcstv8qi, tbcstv4hi, tbsctv2si): New pattern. (iwmmxt_clrv8qi, iwmmxt_clrv4hi, iwmmxt_clrv2si): Likewise. (*andmode3_iwmmxt, *iormode3_iwmmxt, *xormode3_iwmmxt): Likewise. (rorimode3, ashrimode3_iwmmxt, lshrimode3_iwmmxt): Likewise. (ashlimode3_iwmmxt, iwmmxt_waligni, iwmmxt_walignr): Likewise. (iwmmxt_walignr0, iwmmxt_walignr1): Likewise. (iwmmxt_walignr2, iwmmxt_walignr3): Likewise. (iwmmxt_setwcgr0, iwmmxt_setwcgr1): Likewise. (iwmmxt_setwcgr2, iwmmxt_setwcgr3): Likewise. (iwmmxt_getwcgr0, iwmmxt_getwcgr1): Likewise. (iwmmxt_getwcgr2, iwmmxt_getwcgr3): Likewise. (All instruction patterns): Add wtype attribute. (*iwmmxt_arm_movdi, *iwmmxt_movsi_insn): iWMMXt coexist with vfp. (iwmmxt_uavgrndv8qi3, iwmmxt_uavgrndv4hi3): Revise the pattern. (iwmmxt_uavgv8qi3, iwmmxt_uavgv4hi3): Likewise. (iwmmxt_tinsrb, iwmmxt_tinsrh, iwmmxt_tinsrw):Likewise. (eqv8qi3, eqv4hi3, eqv2si3, gtuv8qi3): Likewise. (gtuv4hi3, gtuv2si3, gtv8qi3, gtv4hi3, gtv2si3): Likewise. (iwmmxt_wunpckihh, iwmmxt_wunpckihw, iwmmxt_wunpckilh): Likewise. (iwmmxt_wunpckilw, iwmmxt_wunpckehub, iwmmxt_wunpckehuh): Likewise. (iwmmxt_wunpckehuw, iwmmxt_wunpckehsb, iwmmxt_wunpckehsh): Likewise. (iwmmxt_wunpckehsw, iwmmxt_wunpckelub, iwmmxt_wunpckeluh): Likewise. (iwmmxt_wunpckeluw, iwmmxt_wunpckelsb, iwmmxt_wunpckelsh): Likewise. (iwmmxt_wunpckelsw, iwmmxt_wmadds, iwmmxt_wmaddu): Likewise. (iwmmxt_wsadb, iwmmxt_wsadh, iwmmxt_wsadbz, iwmmxt_wsadhz): Likewise. (iwmmxt2.md): Include. * config/arm/iwmmxt2.md: New file. * config/arm/iterators.md (VMMX2): New mode_iterator. * config/arm/arm.md (wtype): New attribute. (UNSPEC_WMADDS, UNSPEC_WMADDU): Delete. (UNSPEC_WALIGNI): New unspec. * config/arm/t-arm (MD_INCLUDES): Add iwmmxt2.md. At 2011-09-05 17:55:34,Xinyu Qi x...@marvell.com wrote: At 2011-08-18 10:21:01,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: On 14 July 2011 08:45, Xinyu Qi x...@marvell.com wrote: Hi, It is the fourth part of iWMMXt maintenance. Can this be broken down further. ? I'll have to do this again but there are some initial comments below for some discussion. (*iwmmxt_arm_movdi, *iwmmxt_movsi_insn, iwmmxt_uavgrndv8qi3, iwmmxt_uavgrndv4hi3, iwmmxt_uavgv8qi3, iwmmxt_uavgv4hi3, iwmmxt_tinsrb, iwmmxt_tinsrh, iwmmxt_tinsrw, eqv8qi3, eqv4hi3, eqv2si3, gtuv8qi3, gtuv4hi3, gtuv2si3, gtv8qi3, gtv4hi3, gtv2si3, iwmmxt_wunpckihb, iwmmxt_wunpckihh, iwmmxt_wunpckihw, iwmmxt_wunpckilb, iwmmxt_wunpckilh, iwmmxt_wunpckilw, iwmmxt_wunpckehub, iwmmxt_wunpckehuh, iwmmxt_wunpckehuw, iwmmxt_wunpckehsb, iwmmxt_wunpckehsh, iwmmxt_wunpckehsw, iwmmxt_wunpckelub, iwmmxt_wunpckeluh, iwmmxt_wunpckeluw, iwmmxt_wunpckelsb, iwmmxt_wunpckelsh, iwmmxt_wunpckelsw, iwmmxt_wmadds, iwmmxt_wmaddu, iwmmxt_wsadb, iwmmxt_wsadh, iwmmxt_wsadbz, iwmmxt_wsadhz): Revise. Revise to do what ? Sorry for late response. Some of them have incorrect RTL templates. For example, see iwmmxt_uavgv8qi3 Its old RTL template is: [(set (match_operand:V8QI 0 register_operand =y) (ashiftrt:V8QI (plus:V8QI (match_operand:V8QI 1 register_operand y) (match_operand:V8QI 2 register_operand y)) (const_int 1)))] According to the assembly behavior of wavg2b, the correct one should be: [(set (match_operand:V8QI 0 register_operand =y) (truncate:V8QI (lshiftrt:V8HI (plus:V8HI (zero_extend:V8HI (match_operand:V8QI 1 register_operand y)) (zero_extend:V8HI (match_operand:V8QI 2 register_operand y))) (const_int 1] Consider the case: The Operation on element 0x01 and 0xff: gcc with old RTL template would optimize to the result 0x00.That is: 0x01 + 0xff = 0x00. 0x00 1 = 0x00 While the correct result should be 0x80. 0x01 = 0x0001, 0xff = 0x00ff. 0x0001 + 0x00ff = 0x0100. 0x0100 1 = 0x0080, 0x0080 = 0x80 iwmmxt_wmadds and iwmmxt_wmaddu are modified to use detailed RTL template instead of unspec. For some of the wunpck patterns, change the order of zero_extend
RE: PING: [PATCH, ARM, iWMMXt][5/5]: pipeline description
Ping. http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01106.html * config/arm/t-arm (MD_INCLUDES): Add marvell-f-iwmmxt.md. * config/arm/marvell-f-iwmmxt.md: New file. * config/arm/arm.md (marvell-f-iwmmxt.md): Include. At 2011-07-29 11:09:37,Xinyu Qi x...@marvell.com wrote: Ping. http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01106.html At 2011-07-14 15:50:55,Xinyu Qi x...@marvell.com wrote: Hi, It is the fifth part of iWMMXt maintenance. *config/arm/t-arm (MD_INCLUDES): Add marvell-f-iwmmxt.md. *config/arm/marvell-f-iwmmxt.md: New file. *config/arm/arm.md (marvell-f-iwmmxt.md): Include. Thanks, Xinyu
RE: [PATCH, ARM, iWMMXt][4/5]: WMMX machine description
At 2011-08-18 10:21:01,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: On 14 July 2011 08:45, Xinyu Qi x...@marvell.com wrote: Hi, It is the fourth part of iWMMXt maintenance. Can this be broken down further. ? I'll have to do this again but there are some initial comments below for some discussion. (*iwmmxt_arm_movdi, *iwmmxt_movsi_insn, iwmmxt_uavgrndv8qi3, iwmmxt_uavgrndv4hi3, iwmmxt_uavgv8qi3, iwmmxt_uavgv4hi3, iwmmxt_tinsrb, iwmmxt_tinsrh, iwmmxt_tinsrw, eqv8qi3, eqv4hi3, eqv2si3, gtuv8qi3, gtuv4hi3, gtuv2si3, gtv8qi3, gtv4hi3, gtv2si3, iwmmxt_wunpckihb, iwmmxt_wunpckihh, iwmmxt_wunpckihw, iwmmxt_wunpckilb, iwmmxt_wunpckilh, iwmmxt_wunpckilw, iwmmxt_wunpckehub, iwmmxt_wunpckehuh, iwmmxt_wunpckehuw, iwmmxt_wunpckehsb, iwmmxt_wunpckehsh, iwmmxt_wunpckehsw, iwmmxt_wunpckelub, iwmmxt_wunpckeluh, iwmmxt_wunpckeluw, iwmmxt_wunpckelsb, iwmmxt_wunpckelsh, iwmmxt_wunpckelsw, iwmmxt_wmadds, iwmmxt_wmaddu, iwmmxt_wsadb, iwmmxt_wsadh, iwmmxt_wsadbz, iwmmxt_wsadhz): Revise. Revise to do what ? Sorry for late response. Some of them have incorrect RTL templates. For example, see iwmmxt_uavgv8qi3 Its old RTL template is: [(set (match_operand:V8QI 0 register_operand =y) (ashiftrt:V8QI (plus:V8QI (match_operand:V8QI 1 register_operand y) (match_operand:V8QI 2 register_operand y)) (const_int 1)))] According to the assembly behavior of wavg2b, the correct one should be: [(set (match_operand:V8QI 0 register_operand =y) (truncate:V8QI (lshiftrt:V8HI (plus:V8HI (zero_extend:V8HI (match_operand:V8QI 1 register_operand y)) (zero_extend:V8HI (match_operand:V8QI 2 register_operand y))) (const_int 1] Consider the case: The Operation on element 0x01 and 0xff: gcc with old RTL template would optimize to the result 0x00.That is: 0x01 + 0xff = 0x00. 0x00 1 = 0x00 While the correct result should be 0x80. 0x01 = 0x0001, 0xff = 0x00ff. 0x0001 + 0x00ff = 0x0100. 0x0100 1 = 0x0080, 0x0080 = 0x80 iwmmxt_wmadds and iwmmxt_wmaddu are modified to use detailed RTL template instead of unspec. For some of the wunpck patterns, change the order of zero_extend and vec_select in order to avoid a vec_select optimization internal error in old version gcc. Maybe this internal bug has been fixed, but such modification is harmless. Rests of them are only revised for their format. (define_insn *iwmmxt_movsi_insn - [(set (match_operand:SI 0 nonimmediate_operand =rk,r,r,rk, m,z,r,?z,Uy,z) -(match_operand:SI 1 general_operand rk, I,K,mi,rk,r,z,Uy,z, z))] + [(set (match_operand:SI 0 nonimmediate_operand =rk,r,r,r,rk, m,z,r,?z,?Uy,?z,t,r,?t,?z,t) +(match_operand:SI 1 general_operand rk,I,K,N,mi,rk,r,z,Uy, z, z,r,t, z, t,t))] TARGET_REALLY_IWMMXT -( register_operand (operands[0], SImode) - || register_operand (operands[1], SImode)) - * - switch (which_alternative) +((register_operand (operands[0], SImode) + (!reload_completed +|| REGNO_REG_CLASS (REGNO (operands[0])) == IWMMXT_GR_REGS)) + || (register_operand (operands[1], SImode) +(!reload_completed + || REGNO_REG_CLASS (REGNO (operands[1])) == IWMMXT_GR_REGS))) I don't like this at all - what you are doing is assuming that after reg-alloc you are going to be able to rely on whether something has a particular register class and then turn on and off it's matching. So this matches before reload and doesn't do so after reload for the cases where *iwmmxt_movsi_insn is really in a core register. I don't think you can do it this way. If you really want to do this properly - have an arch field for iwmmxt as well in the arch attribute and then add these alternatives to existing patterns. If I understand what you are trying to do here - you are trying to use *arm_movsi_insn and other patterns in the rest of the backend and let things like predicable kick in right after reload for all cases other than the ones you enumerate. In which case get rid of all the other constaints in this pattern other than the constraints that are valid for registers of class IWMMXT_REGS This piece of code is added to make iwmmxt coexist with vfp when iwmmxt and vfp are enabled together. Agree, I don't think it is a good fix. Add adequate constrains to *iwmmxt_movsi_insn and *iwmmxt_arm_movdi so that don't need to change their conditions. Also the definition of output_move_double has changed now and hence this needs some rework. Done. Should there be a distinction between iwmmxt and iwmmxt2 ? Is it a user visible option ? I don't think users need to know the distinction between iwmmxt and iwmmxt2 though there are two options -mcpu=iwmmxt and -mcpu=iwmmxt2. It seems if -mcpu=iwmmxt is specified in gcc, the assembler cannot recognize
RE: [PATCH] Wire-up missing ARM iwmmxt intrinsics (bugs 35294, 36798, 36966)
At 2011-08-19 12:18:10,Matt Turner matts...@gmail.com wrote: Subject: Re: On Fri, Aug 19, 2011 at 12:13 AM, Matt Turner matts...@gmail.com wrote: Hi, Attached is a patch based on gcc-4.6.1 that wires-up missing ARM iwmmxt intrinsics. Without it, gcc is completely useless when it comes to using a large portion of the intrinsics documented on this page: http://gcc.gnu.org/onlinedocs/gcc/ARM-iWMMXt-Built_002din-Functions.html The patch is based on the work of ser...@yandex.ru in bug 35294. I do not know why the check_opsmode hack is necessary. Hi, I think check_opsmode in this patch is used to solve something that could be solved by - gcc_assert (GET_MODE (op0) == mode0 GET_MODE (op1) == mode1); + gcc_assert ((GET_MODE (op0) == mode0 || GET_MODE (op0) == VOIDmode) + (GET_MODE (op1) == mode1 || GET_MODE (op1) == VOIDmode)); in my patch. For example, in the shift intrinsics, the shift count could be either a variable, or a CONST_INT which has VOIDmode. I also do not know if this wires up all the missing intrinsics. I'm afraid not. Trunk misses all iWMMXt2 intrinsics and the bugs could be found everywhere since it is lack of maintenance for a long time. I have seen much more extensive patches from Xinyu Qi, but I do not suppose that they will be available in gcc 4.6. The patches I submitted have some conflict with 4.6 code base. Thanks, Xinyu Thanks, Matt Turner Sent to correct @marvell address
RE: [PATCH, ARM, iWMMXt][1/5]: ARM code generic change
-Original Message- From: Ramana Radhakrishnan [mailto:ramana.radhakrish...@linaro.org] At 2011-08-18 09:29:34,Ramana Radhakrishnan ramana.radhakrish...@linaro.org wrote: Hi , Sorry about the delayed review - It's taken me a while to get back to this . On 14 July 2011 08:35, Xinyu Qi x...@marvell.com wrote: Hi, It is the first part of iWMMXt maintenance. *config/arm/arm.c (arm_option_override): Enable iWMMXt with VFP. iWMMXt and NEON are incompatible. iWMMXt unsupported under Thumb-2 mode. (arm_expand_binop_builtin): Accept immediate op (with mode VOID) *config/arm/arm.md: Resettle include location of iwmmxt.md so that *arm_movdi and *arm_movsi_insn could be used when iWMMXt is enabled. This is OK modulo the Changelog entry. Please write this as : TAB* config/arm/arm.c (arm_option_override): Enable use of iwMMXt with VFP. Disable use of iwMMXt and Neon. TAB* config/arm/arm.md (iwmmxt.md): Include earlier. (*arm_movsi_insn): Remove check for TARGET_IWMMXT. (*arm_movdi_insn): Likewise. cheers Ramana Thanks for reviewing! I remember updating the patch stack according to your previous comment several weeks ago. http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01100.html http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01101.html http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01105.html http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01106.html The new ChangLog for this part: *config/arm/arm.c (arm_option_override): Enable use of iWMMXt with VFP. Disable use of iwMMXt and Neon. (arm_expand_binop_builtin): Accept VOIDmode op. *config/arm/arm.md (*arm_movdi, *arm_movsi_insn): Remove check for TARGET_IWMMXT. (iwmmxt.md): Include earlier. Thanks, Xinyu
RE: PING: [PATCH, ARM, iWMMXt][1/5]: ARM code generic change
Ping. http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01100.html At 2011-07-14 15:35:52,Xinyu Qi x...@marvell.com wrote: Hi, It is the first part of iWMMXt maintenance. *config/arm/arm.c (arm_option_override): Enable iWMMXt with VFP. iWMMXt and NEON are incompatible. iWMMXt unsupported under Thumb-2 mode. (arm_expand_binop_builtin): Accept immediate op (with mode VOID) *config/arm/arm.md: Resettle include location of iwmmxt.md so that *arm_movdi and *arm_movsi_insn could be used when iWMMXt is enabled. With the current work in trunk to handle enabled attributes and per-alternative predicable attributes (Thanks Bernd) we should be able to get rid of *cond_iwmmxt_movsi_insn in iwmmxt.md file. It's not a matter for this patch but for a follow-up patch. Actually we should probably do the same for the various insns that are dotted around all over the place with final conditions that prevent matching - atleast makes the backend description slightly smaller :). Add pipeline description file include. It is enough to say (filename): Include. in the changelog entry. The include for the pipeline description file should be with the patch that you add this in i.e. patch #5. Please add this to MD_INCLUDES in t-arm as well. Also as a general note, please provide a correct Changelog entry. This is not the format that we expect Changelog entries to be in. Please look at the coding standards on the website for this or at other patches submitted with respect to Changelog entries. Please fix this for each patch in the patch stack. cheers Ramana Thanks for reviewing. I have updated the patches and the Changelog. *config/arm/arm.c (arm_option_override): Enable iWMMXt with VFP. (arm_expand_binop_builtin): Accept VOIDmode op. *config/arm/arm.md (*arm_movdi, *arm_movsi_insn): Remove condition !TARGET_IWMMXT. (iwmmxt.md): Include location. Thanks, Xinyu
RE: PING: [PATCH, ARM, iWMMXt][2/5]: intrinsic head file change
Ping. http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01101.html At 2011-07-14 15:38:04,Xinyu Qi x...@marvell.com wrote: Hi, It is the second part of iWMMXt maintenance. *config/arm/mmintrin.h: Revise. Thanks, Xinyu
RE: PING: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
Ping. http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01103.html At 2011-07-14 15:38:47,Xinyu Qi x...@marvell.com wrote: Hi, It is the third part of iWMMXt maintenance. *config/arm/arm.c (enum arm_builtins): Built-in fcode. (builtin_description bdesc_2arg): Built in declare. (builtin_description bdesc_1arg): Ditto. (arm_init_iwmmxt_builtins): Built in initialize. (arm_expand_builtin): Built in expand. Thanks, Xinyu
RE: PING: [PATCH, ARM, iWMMXt][4/5]: WMMX machine description
Ping. http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01105.html At 2011-07-14 15:45:09,Xinyu Qi x...@marvell.com wrote: Hi, It is the fourth part of iWMMXt maintenance. Since *cond_iwmmxt_movsi_insn would be got rid of soon, I keep it unchanged. *config/arm/arm.c (arm_output_iwmmxt_shift_immediate): New function. (arm_output_iwmmxt_tinsr): Ditto. *config/arm/arm-protos.h (arm_output_iwmmxt_shift_immediate): New prototype. (arm_output_iwmmxt_tinsr): Ditto. *config/arm/iwmmxt.md (WCGR0, WCGR1, WCGR2, WCGR3): New constant. (iwmmxt_psadbw, iwmmxt_walign, iwmmxt_tmrc, iwmmxt_tmcr): Delete. (iwmmxt_tbcstqi, iwmmxt_tbcsthi, iwmmxt_tbcstsi, *iwmmxt_clrv8qi, *iwmmxt_clrv4hi, *iwmmxt_clrv2si): Rename... (tbcstv8qi, tbcstv4hi, tbsctv2si, iwmmxt_clrv8qi, iwmmxt_clrv4hi, iwmmxt_clrv2si): ...New pattern. (*andmode3_iwmmxt, *iormode3_iwmmxt, *xormode3_iwmmxt, rorimode3, ashrimode3_iwmmxt, lshrimode3_iwmmxt, ashlimode3_iwmmxt, iwmmxt_waligni, iwmmxt_walignr, iwmmxt_walignr0, iwmmxt_walignr1, iwmmxt_walignr2, iwmmxt_walignr3, iwmmxt_setwcgr0, iwmmxt_setwcgr1, iwmmxt_setwcgr2, iwmmxt_setwcgr3, iwmmxt_getwcgr0, iwmmxt_getwcgr1, iwmmxt_getwcgr2, iwmmxt_getwcgr3): New pattern. (All instruction patterns): Add wtype attribute. (*iwmmxt_arm_movdi, *iwmmxt_movsi_insn, iwmmxt_uavgrndv8qi3, iwmmxt_uavgrndv4hi3, iwmmxt_uavgv8qi3, iwmmxt_uavgv4hi3, iwmmxt_tinsrb, iwmmxt_tinsrh, iwmmxt_tinsrw, eqv8qi3, eqv4hi3, eqv2si3, gtuv8qi3, gtuv4hi3, gtuv2si3, gtv8qi3, gtv4hi3, gtv2si3, iwmmxt_wunpckihb, iwmmxt_wunpckihh, iwmmxt_wunpckihw, iwmmxt_wunpckilb, iwmmxt_wunpckilh, iwmmxt_wunpckilw, iwmmxt_wunpckehub, iwmmxt_wunpckehuh, iwmmxt_wunpckehuw, iwmmxt_wunpckehsb, iwmmxt_wunpckehsh, iwmmxt_wunpckehsw, iwmmxt_wunpckelub, iwmmxt_wunpckeluh, iwmmxt_wunpckeluw, iwmmxt_wunpckelsb, iwmmxt_wunpckelsh, iwmmxt_wunpckelsw, iwmmxt_wmadds, iwmmxt_wmaddu, iwmmxt_wsadb, iwmmxt_wsadh, iwmmxt_wsadbz, iwmmxt_wsadhz): Revise. (iwmmxt2.md): Include. *config/arm/iwmmxt2.md: New file. *config/arm/iterators.md (VMMX2): New mode_iterator. *config/arm/arm.md (wtype): New attribute. *config/arm/t-arm (MD_INCLUDES): Add iwmmxt2.md. Thanks, Xinyu
RE: PING: [PATCH, ARM, iWMMXt][5/5]: pipeline description
Ping. http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01106.html At 2011-07-14 15:50:55,Xinyu Qi x...@marvell.com wrote: Hi, It is the fifth part of iWMMXt maintenance. *config/arm/t-arm (MD_INCLUDES): Add marvell-f-iwmmxt.md. *config/arm/marvell-f-iwmmxt.md: New file. *config/arm/arm.md (marvell-f-iwmmxt.md): Include. Thanks, Xinyu
RE: [PATCH, ARM, iWMMXt][1/5]: ARM code generic change
Hi, It is the first part of iWMMXt maintenance. *config/arm/arm.c (arm_option_override): Enable iWMMXt with VFP. iWMMXt and NEON are incompatible. iWMMXt unsupported under Thumb-2 mode. (arm_expand_binop_builtin): Accept immediate op (with mode VOID) *config/arm/arm.md: Resettle include location of iwmmxt.md so that *arm_movdi and *arm_movsi_insn could be used when iWMMXt is enabled. With the current work in trunk to handle enabled attributes and per-alternative predicable attributes (Thanks Bernd) we should be able to get rid of *cond_iwmmxt_movsi_insn in iwmmxt.md file. It's not a matter for this patch but for a follow-up patch. Actually we should probably do the same for the various insns that are dotted around all over the place with final conditions that prevent matching - atleast makes the backend description slightly smaller :). Add pipeline description file include. It is enough to say (filename): Include. in the changelog entry. The include for the pipeline description file should be with the patch that you add this in i.e. patch #5. Please add this to MD_INCLUDES in t-arm as well. Also as a general note, please provide a correct Changelog entry. This is not the format that we expect Changelog entries to be in. Please look at the coding standards on the website for this or at other patches submitted with respect to Changelog entries. Please fix this for each patch in the patch stack. cheers Ramana Thanks for reviewing. I have updated the patches and the Changelog. *config/arm/arm.c (arm_option_override): Enable iWMMXt with VFP. (arm_expand_binop_builtin): Accept VOIDmode op. *config/arm/arm.md (*arm_movdi, *arm_movsi_insn): Remove condition !TARGET_IWMMXT. (iwmmxt.md): Include location. Thanks, Xinyu 1_generic.diff Description: 1_generic.diff
RE: [PATCH, ARM, iWMMXt][2/5]: intrinsic head file change
Hi, It is the second part of iWMMXt maintenance. *config/arm/mmintrin.h: Revise. Thanks, Xinyu 2_mmintrin.diff Description: 2_mmintrin.diff
RE: [PATCH, ARM, iWMMXt][3/5]: built in define and expand
Hi, It is the third part of iWMMXt maintenance. *config/arm/arm.c (enum arm_builtins): Built-in fcode. (builtin_description bdesc_2arg): Built in declare. (builtin_description bdesc_1arg): Ditto. (arm_init_iwmmxt_builtins): Built in initialize. (arm_expand_builtin): Built in expand. Thanks, Xinyu 3_arm_c.diff Description: 3_arm_c.diff
RE: [PATCH, ARM, iWMMXt][4/5]: WMMX machine description
Hi, It is the fourth part of iWMMXt maintenance. Since *cond_iwmmxt_movsi_insn would be got rid of soon, I keep it unchanged. *config/arm/arm.c (arm_output_iwmmxt_shift_immediate): New function. (arm_output_iwmmxt_tinsr): Ditto. *config/arm/arm-protos.h (arm_output_iwmmxt_shift_immediate): New prototype. (arm_output_iwmmxt_tinsr): Ditto. *config/arm/iwmmxt.md (WCGR0, WCGR1, WCGR2, WCGR3): New constant. (iwmmxt_psadbw, iwmmxt_walign, iwmmxt_tmrc, iwmmxt_tmcr): Delete. (iwmmxt_tbcstqi, iwmmxt_tbcsthi, iwmmxt_tbcstsi, *iwmmxt_clrv8qi, *iwmmxt_clrv4hi, *iwmmxt_clrv2si): Rename... (tbcstv8qi, tbcstv4hi, tbsctv2si, iwmmxt_clrv8qi, iwmmxt_clrv4hi, iwmmxt_clrv2si): ...New pattern. (*andmode3_iwmmxt, *iormode3_iwmmxt, *xormode3_iwmmxt, rorimode3, ashrimode3_iwmmxt, lshrimode3_iwmmxt, ashlimode3_iwmmxt, iwmmxt_waligni, iwmmxt_walignr, iwmmxt_walignr0, iwmmxt_walignr1, iwmmxt_walignr2, iwmmxt_walignr3, iwmmxt_setwcgr0, iwmmxt_setwcgr1, iwmmxt_setwcgr2, iwmmxt_setwcgr3, iwmmxt_getwcgr0, iwmmxt_getwcgr1, iwmmxt_getwcgr2, iwmmxt_getwcgr3): New pattern. (All instruction patterns): Add wtype attribute. (*iwmmxt_arm_movdi, *iwmmxt_movsi_insn, iwmmxt_uavgrndv8qi3, iwmmxt_uavgrndv4hi3, iwmmxt_uavgv8qi3, iwmmxt_uavgv4hi3, iwmmxt_tinsrb, iwmmxt_tinsrh, iwmmxt_tinsrw, eqv8qi3, eqv4hi3, eqv2si3, gtuv8qi3, gtuv4hi3, gtuv2si3, gtv8qi3, gtv4hi3, gtv2si3, iwmmxt_wunpckihb, iwmmxt_wunpckihh, iwmmxt_wunpckihw, iwmmxt_wunpckilb, iwmmxt_wunpckilh, iwmmxt_wunpckilw, iwmmxt_wunpckehub, iwmmxt_wunpckehuh, iwmmxt_wunpckehuw, iwmmxt_wunpckehsb, iwmmxt_wunpckehsh, iwmmxt_wunpckehsw, iwmmxt_wunpckelub, iwmmxt_wunpckeluh, iwmmxt_wunpckeluw, iwmmxt_wunpckelsb, iwmmxt_wunpckelsh, iwmmxt_wunpckelsw, iwmmxt_wmadds, iwmmxt_wmaddu, iwmmxt_wsadb, iwmmxt_wsadh, iwmmxt_wsadbz, iwmmxt_wsadhz): Revise. (iwmmxt2.md): Include. *config/arm/iwmmxt2.md: New file. *config/arm/iterators.md (VMMX2): New mode_iterator. *config/arm/arm.md (wtype): New attribute. *config/arm/t-arm (MD_INCLUDES): Add iwmmxt2.md. Thanks, Xinyu 4_wmmx_md.diff.gz Description: 4_wmmx_md.diff.gz
RE: [PATCH, ARM, iWMMXt][5/5]: pipeline description
Hi, It is the fifth part of iWMMXt maintenance. *config/arm/t-arm (MD_INCLUDES): Add marvell-f-iwmmxt.md. *config/arm/marvell-f-iwmmxt.md: New file. *config/arm/arm.md (marvell-f-iwmmxt.md): Include. Thanks, Xinyu 5_pipeline.diff Description: 5_pipeline.diff
[PATCH, ARM, iWMMXt][2/5]: intrinsic head file change
Hi, It is the second part of iWMMXt maintenance. *config/arm/mmintrin.h: Revise the iWMMXt intrinsics head file. Fix some intrinsics and add some new intrinsics. Thanks, Xinyu 2_mmintrin.diff Description: 2_mmintrin.diff
[PATCH, ARM, iWMMXt][0/5]: iWMMXt intrinsics maintenance and pipeline description
Hi, Since the patch of iWMMXt intrinsics maintenance and pipeline description is too big to review, I subdivide it into five parts. 1 ARM generic code change 2 iWMMXt intrinsic head file change. 3 iWMMXt built in define and expand 4 WMMX machine description 5 WMMX pipeline description These five parts may not work separately. Thanks, Xinyu
[PATCH, ARM, iWMMXt][1/5]: ARM code generic change
Hi, It is the first part of iWMMXt maintenance. *config/arm/arm.c (arm_option_override): Enable iWMMXt with VFP. iWMMXt and NEON are incompatible. iWMMXt unsupported under Thumb-2 mode. (arm_expand_binop_builtin): Accept immediate op (with mode VOID) *config/arm/arm.md: Resettle include location of iwmmxt.md so that *arm_movdi and *arm_movsi_insn could be used when iWMMXt is enabled. Add pipeline description file include. Thanks, Xinyu 1_generic.diff Description: 1_generic.diff
[PATCH, ARM] [1/3] iWMMXt intrinsics maintenance and pipeline description
Hi, This patch maintains iWMMXt intrinsics code, and adds WMMX pipeline description. *config/arm/arm.c (arm_option_override): Enable iWMMt with VFP (enum arm_builtins): Add/fix iWMMXT/iWMMXT2 intrinsics. (builtin_description bdesc_2arg): Same. (builtin_description bdesc_1arg): Same. (arm_init_iwmmxt_builtins): Same. (arm_expand_binop_builtin): Same. (arm_expand_builtin): Same. (arm_output_iwmmxt_shift_immediate): New function. Same. (arm_output_iwmmxt_tinsr): New function. Same. *config/arm/iterators.md: Same. *config/arm/mmintrin.h: Same. *config/arm/arm.md: Same. Add wtype. *config/arm/iwmmxt.md: Same. *config/arm/iwmmxt2.md: New file. Same. *config/arm/arm-protos.h: Add new functions protos. *config/arm/marvell-f-iwmmxt.md: New file. Add Marvell WMMX pipeline description. Thanks, Xinyu iwmmxt_intrinsic_pipeline.patch.gz Description: iwmmxt_intrinsic_pipeline.patch.gz
[PATCH, ARM] [2/3] iWMMXt intrinsics testsuite
Hi, This patch adds some simple iWMMXt intrinsic test cases. gcc.target/arm/iwmmxt/i_shift_error.c: New. gcc.target/arm/iwmmxt/iwmmxt.exp: New. gcc.target/arm/iwmmxt/i_wshufh_error.c: New. gcc.target/arm/iwmmxt/i_merge_si64_error.c: New. gcc.target/arm/iwmmxt/i_waligni_error.c: New. gcc.target/arm/iwmmxt/i_extract_error.c: New. Thanks, Xinyu iwmmxt_testsuite.patch Description: iwmmxt_testsuite.patch
[PATCH, ARM] [3/3] iWMMXt intrinsics documentation
Hi, This patch adds iWMMXt intrinsics documentation into gcc doc. doc/extend.texi: Update iwmmxt intrinsics doc. doc/arm-iwmmxt-intrinsics.texi: New. Thanks, Xinyu iwmmxt_doc.patch Description: iwmmxt_doc.patch
[PATCH, ARM] iWMMXT maintenance
Hi, This patch maintains iWMMXT intrinsics code, adds WMMX pipeline description and supports iWMMXT auto-vectorization. Ran Arm testsuite on arm-linux-gnueabi. *gcc/config/arm/elf.h: Add option -mwmmxt. *gcc/config/arm/arm.opt: Same. *gcc/config/arm/arm.c (arm_option_override): Same. (arm_coproc_mem_operand2): Add/fix iWMMXT/iWMMXT2 intrinsic. (enum arm_builtins): Same. (builtin_description bdesc_2arg): Same. (builtin_description bdesc_1arg): Same. (arm_init_iwmmxt_builtins): Same. (arm_expand_binop_builtin): Same. (arm_expand_builtin): Same. (arm_output_load_gr): Same. (arm_output_iwmmxt_shift_immediate): New function. Same. (arm_output_iwmmxt_tinsr): New function. Same. (iwmmxt_expand_vector_init): New function. Serving for iWMMXT auto-vectorization. (iwmmxt_expand_vector_mov): New function. Same. *gcc/config/arm/mmintrin.h: Add/fix iWMMXT/iWMMXT2 intrinsic. *gcc/config/arm/constraints.md: Same. *gcc/config/arm/predicates.md: Same. *gcc/config/arm/iterators.md: Same. *gcc/config/arm/iwmmxt.md: Same. *gcc/config/arm/iwmmxt2.md: New file. Same. *gcc/config/arm/arm-protos.h: Add new functions protos. *gcc/config/arm/marvell-f-iwmmxt.md: New file. Add Marvell WMMX pipeline description. *gcc/config/arm/arm.md: Fix iWMMXT/iWMMXT2 intrinsic. Add wtype for Marvell WMMX pipeline description. *gcc/config/arm/iwmmxt-autovec.md: New file. Support iWMMXT auto-vectorization. *gcc/config/arm/vec-common.md: Make iWMMXT and NEON co-exist. *gcc/config/arm/neon.md: Same. iWMMXT_maintenance.patch.gz Description: iWMMXT_maintenance.patch.gz
