[Bug target/109932] ICE in in extract_insn, at recog.cc:2791 on ppc64le with -mno-vsx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109932 Kewen Lin changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|--- |FIXED --- Comment #10 from Kewen Lin --- Should be fixed everywhere.
[Bug target/109932] ICE in in extract_insn, at recog.cc:2791 on ppc64le with -mno-vsx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109932
--- Comment #9 from CVS Commits ---
The releases/gcc-10 branch has been updated by Kewen Lin :
https://gcc.gnu.org/g:98763feef24b58573fa9e6c6eedaccc1e932bb46
commit r10-11455-g98763feef24b58573fa9e6c6eedaccc1e932bb46
Author: Kewen Lin
Date: Tue Jun 20 01:40:52 2023 -0500
rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932]
As PR109932 shows, builtins __builtin_{un,}pack_vector_int128
should be guarded under vsx rather than power7, as their
corresponding bif patterns have the conditions TARGET_VSX
and VECTOR_MEM_ALTIVEC_OR_VSX_P (V1TImode). This patch is to
ensure __builtin_{un,}pack_vector_int128 only available under
vsx.
PR target/109932
gcc/ChangeLog:
* config/rs6000/rs6000-builtin.def (BU_VSX_MISC_2): New macro.
({un,}pack_vector_int128): Use BU_VSX_MISC_2 instead of
BU_P7_MISC_2.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr109932-1.c: New test.
* gcc.target/powerpc/pr109932-2.c: New test.
(cherry picked from commit db291447877aae67979ce3655fcc6fc877f57c6a)
[Bug target/109932] ICE in in extract_insn, at recog.cc:2791 on ppc64le with -mno-vsx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109932
--- Comment #8 from CVS Commits ---
The releases/gcc-11 branch has been updated by Kewen Lin :
https://gcc.gnu.org/g:db291447877aae67979ce3655fcc6fc877f57c6a
commit r11-10866-gdb291447877aae67979ce3655fcc6fc877f57c6a
Author: Kewen Lin
Date: Tue Jun 20 01:40:52 2023 -0500
rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932]
As PR109932 shows, builtins __builtin_{un,}pack_vector_int128
should be guarded under vsx rather than power7, as their
corresponding bif patterns have the conditions TARGET_VSX
and VECTOR_MEM_ALTIVEC_OR_VSX_P (V1TImode). This patch is to
ensure __builtin_{un,}pack_vector_int128 only available under
vsx.
PR target/109932
gcc/ChangeLog:
* config/rs6000/rs6000-builtin.def (BU_VSX_MISC_2): New macro.
({un,}pack_vector_int128): Use BU_VSX_MISC_2 instead of
BU_P7_MISC_2.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr109932-1.c: New test.
* gcc.target/powerpc/pr109932-2.c: New test.
[Bug target/109932] ICE in in extract_insn, at recog.cc:2791 on ppc64le with -mno-vsx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109932
--- Comment #7 from CVS Commits ---
The releases/gcc-13 branch has been updated by Kewen Lin :
https://gcc.gnu.org/g:4b4a21c93406aef276fbff00d3e9491285d7b4a9
commit r13-7458-g4b4a21c93406aef276fbff00d3e9491285d7b4a9
Author: Kewen Lin
Date: Tue Jun 13 03:04:54 2023 -0500
testsuite: Check int128 effective target for pr109932-{1,2}.c [PR110230]
This patch is to make newly added test cases pr109932-{1,2}.c
check int128 effective target to avoid unsupported type error
on 32-bit. I did hit this failure during testing and fixed
it, but made a stupid mistake not updating the local formatted
patch which was actually out of date.
PR testsuite/110230
PR target/109932
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr109932-1.c: Adjust with int128 effective
target.
* gcc.target/powerpc/pr109932-2.c: Ditto.
(cherry picked from commit 16eb9d69079d769b2aa2c07ce54aca20f5547c14)
[Bug target/109932] ICE in in extract_insn, at recog.cc:2791 on ppc64le with -mno-vsx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109932
--- Comment #6 from CVS Commits ---
The releases/gcc-13 branch has been updated by Kewen Lin :
https://gcc.gnu.org/g:4e67d73ee5100c12993c79852e4ede13d2606cad
commit r13-7457-g4e67d73ee5100c12993c79852e4ede13d2606cad
Author: Kewen Lin
Date: Mon Jun 12 01:08:22 2023 -0500
rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932]
As PR109932 shows, builtins __builtin_{un,}pack_vector_int128
should be guarded under vsx rather than power7, as their
corresponding bif patterns have the conditions TARGET_VSX
and VECTOR_MEM_ALTIVEC_OR_VSX_P (V1TImode). This patch is to
move __builtin_{un,}pack_vector_int128 to stanza vsx to ensure
their supports.
PR target/109932
gcc/ChangeLog:
* config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
__builtin_unpack_vector_int128): Move from stanza power7 to vsx.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr109932-1.c: New test.
* gcc.target/powerpc/pr109932-2.c: New test.
(cherry picked from commit ff83d1b47aadcdaf80a4fda84b0dc00bb2cd3641)
[Bug target/109932] ICE in in extract_insn, at recog.cc:2791 on ppc64le with -mno-vsx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109932
--- Comment #5 from CVS Commits ---
The releases/gcc-12 branch has been updated by Kewen Lin :
https://gcc.gnu.org/g:4591c2c8a6b15ca99ba049d84e0e694f12db4f60
commit r12-9714-g4591c2c8a6b15ca99ba049d84e0e694f12db4f60
Author: Kewen Lin
Date: Tue Jun 13 03:04:54 2023 -0500
testsuite: Check int128 effective target for pr109932-{1,2}.c [PR110230]
This patch is to make newly added test cases pr109932-{1,2}.c
check int128 effective target to avoid unsupported type error
on 32-bit. I did hit this failure during testing and fixed
it, but made a stupid mistake not updating the local formatted
patch which was actually out of date.
PR testsuite/110230
PR target/109932
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr109932-1.c: Adjust with int128 effective
target.
* gcc.target/powerpc/pr109932-2.c: Ditto.
(cherry picked from commit 16eb9d69079d769b2aa2c07ce54aca20f5547c14)
[Bug target/109932] ICE in in extract_insn, at recog.cc:2791 on ppc64le with -mno-vsx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109932
--- Comment #4 from CVS Commits ---
The releases/gcc-12 branch has been updated by Kewen Lin :
https://gcc.gnu.org/g:31d88c795a0eb05df5a0684c34ec74116cce133f
commit r12-9713-g31d88c795a0eb05df5a0684c34ec74116cce133f
Author: Kewen Lin
Date: Mon Jun 12 01:08:22 2023 -0500
rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932]
As PR109932 shows, builtins __builtin_{un,}pack_vector_int128
should be guarded under vsx rather than power7, as their
corresponding bif patterns have the conditions TARGET_VSX
and VECTOR_MEM_ALTIVEC_OR_VSX_P (V1TImode). This patch is to
move __builtin_{un,}pack_vector_int128 to stanza vsx to ensure
their supports.
PR target/109932
gcc/ChangeLog:
* config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
__builtin_unpack_vector_int128): Move from stanza power7 to vsx.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr109932-1.c: New test.
* gcc.target/powerpc/pr109932-2.c: New test.
(cherry picked from commit ff83d1b47aadcdaf80a4fda84b0dc00bb2cd3641)
[Bug target/109932] ICE in in extract_insn, at recog.cc:2791 on ppc64le with -mno-vsx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109932
--- Comment #3 from CVS Commits ---
The master branch has been updated by Kewen Lin :
https://gcc.gnu.org/g:16eb9d69079d769b2aa2c07ce54aca20f5547c14
commit r14-1776-g16eb9d69079d769b2aa2c07ce54aca20f5547c14
Author: Kewen Lin
Date: Tue Jun 13 03:04:54 2023 -0500
testsuite: Check int128 effective target for pr109932-{1,2}.c [PR110230]
This patch is to make newly added test cases pr109932-{1,2}.c
check int128 effective target to avoid unsupported type error
on 32-bit. I did hit this failure during testing and fixed
it, but made a stupid mistake not updating the local formatted
patch which was actually out of date.
PR testsuite/110230
PR target/109932
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr109932-1.c: Adjust with int128 effective
target.
* gcc.target/powerpc/pr109932-2.c: Ditto.
[Bug target/109932] ICE in in extract_insn, at recog.cc:2791 on ppc64le with -mno-vsx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109932
--- Comment #2 from CVS Commits ---
The master branch has been updated by Kewen Lin :
https://gcc.gnu.org/g:ff83d1b47aadcdaf80a4fda84b0dc00bb2cd3641
commit r14-1704-gff83d1b47aadcdaf80a4fda84b0dc00bb2cd3641
Author: Kewen Lin
Date: Mon Jun 12 01:08:22 2023 -0500
rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932]
As PR109932 shows, builtins __builtin_{un,}pack_vector_int128
should be guarded under vsx rather than power7, as their
corresponding bif patterns have the conditions TARGET_VSX
and VECTOR_MEM_ALTIVEC_OR_VSX_P (V1TImode). This patch is to
move __builtin_{un,}pack_vector_int128 to stanza vsx to ensure
their supports.
PR target/109932
gcc/ChangeLog:
* config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
__builtin_unpack_vector_int128): Move from stanza power7 to vsx.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr109932-1.c: New test.
* gcc.target/powerpc/pr109932-2.c: New test.
[Bug target/109932] ICE in in extract_insn, at recog.cc:2791 on ppc64le with -mno-vsx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109932
Kewen Lin changed:
What|Removed |Added
Last reconfirmed||2023-05-24
Status|UNCONFIRMED |ASSIGNED
Ever confirmed|0 |1
CC||linkw at gcc dot gnu.org
Assignee|unassigned at gcc dot gnu.org |linkw at gcc dot gnu.org
Keywords||ice-on-invalid-code
--- Comment #1 from Kewen Lin ---
Confirmed, thanks for reporting.
Both bif __builtin_pack_vector_int128 and __builtin_unpack_vector_int128 are
put in stanza power7 instead of vsx, so they miss to check vsx available or
not.
const vsq __builtin_pack_vector_int128 (unsigned long long, \
unsigned long long);
PACK_V1TI packv1ti {}
void __builtin_ppc_speculation_barrier ();
SPECBARR speculation_barrier {}
const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>);
UNPACK_V1TI unpackv1ti {}
But the underlying insn patterns do need VSX support, see:
(define_insn "pack"
[(set (match_operand:FMOVE128_VSX 0 "register_operand" "=wa")
(unspec:FMOVE128_VSX
[(match_operand:DI 1 "register_operand" "wa")
(match_operand:DI 2 "register_operand" "wa")]
UNSPEC_PACK_128BIT))]
"TARGET_VSX" // here
"xxpermdi %x0,%x1,%x2,0"
[(set_attr "type" "vecperm")])
(define_insn "unpack"
[(set (match_operand:DI 0 "register_operand" "=wa,wa")
(unspec:DI [(match_operand:FMOVE128_VSX 1 "register_operand" "0,wa")
(match_operand:QI 2 "const_0_to_1_operand" "O,i")]
UNSPEC_UNPACK_128BIT))]
"VECTOR_MEM_ALTIVEC_OR_VSX_P (mode)" // here
{
if (REGNO (operands[0]) == REGNO (operands[1]) && INTVAL (operands[2]) == 0)
return ASM_COMMENT_START " xxpermdi to same register";
operands[3] = GEN_INT (INTVAL (operands[2]) == 0 ? 0 : 3);
return "xxpermdi %x0,%x1,%x1,%3";
}
[(set_attr "type" "vecperm")])
; Iterator for 128-bit VSX types for pack/unpack
(define_mode_iterator FMOVE128_VSX [V1TI KF])
both vector_mem for V1TI and KF are VSX.
So the fix would be to move these two bifs to be under stanza vsx.
