[Bug target/55147] [4.8 Regression] x86: wrong code for 64-bit load

2012-11-07 Thread jakub at gcc dot gnu.org 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55147



Jakub Jelinek jakub at gcc dot gnu.org changed:



   What|Removed |Added



 Status|NEW |RESOLVED

 Resolution||FIXED



--- Comment #8 from Jakub Jelinek jakub at gcc dot gnu.org 2012-11-07 
10:15:41 UTC ---

Fixed.

[Bug target/55147] [4.8 Regression] x86: wrong code for 64-bit load

2012-11-02 Thread jakub at gcc dot gnu.org 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55147



--- Comment #7 from Jakub Jelinek jakub at gcc dot gnu.org 2012-11-02 
08:03:05 UTC ---

Author: jakub

Date: Fri Nov  2 08:03:02 2012

New Revision: 193090



URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=193090

Log:

PR target/55147

* config/i386/i386.md (bswapdi2): Limit to TARGET_64BIT.

(*bswapdi2_doubleword): Removed.



* gcc.target/i386/pr55147.c: New test.



Added:

trunk/gcc/testsuite/gcc.target/i386/pr55147.c

Modified:

trunk/gcc/ChangeLog

trunk/gcc/config/i386/i386.md

trunk/gcc/testsuite/ChangeLog

[Bug target/55147] [4.8 Regression] x86: wrong code for 64-bit load

2012-11-01 Thread ubizjak at gmail dot com 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55147



Uros Bizjak ubizjak at gmail dot com changed:



   What|Removed |Added



   Target Milestone|--- |4.8.0

Summary|x86: wrong code for 64-bit  |[4.8 Regression] x86: wrong

   |load|code for 64-bit load



--- Comment #4 from Uros Bizjak ubizjak at gmail dot com 2012-11-01 09:27:21 
UTC ---

(In reply to comment #3)



 it creates the same number of insns/same quality (just slightly different RA

 decisions/scheduling) for f1-f3, but for f4 without bswapdi2 it creates

 slightly worse code (with bswapdi2 f4 needs just one call saved register,

 without it two, supposedly because both bswap insns are scheduled together.



We can live with that.



I have also checked that removing the pattern doesn't degrade TARGET_MOVBE, the

reason for their existence is PR53227.



Also, a regression from 4.7.

[Bug target/55147] [4.8 Regression] x86: wrong code for 64-bit load

2012-11-01 Thread jakub at gcc dot gnu.org 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55147



--- Comment #5 from Jakub Jelinek jakub at gcc dot gnu.org 2012-11-01 
09:44:22 UTC ---

Created attachment 28589

  -- http://gcc.gnu.org/bugzilla/attachment.cgi?id=28589

gcc48-pr55147.patch



So like this?  Or do you want to merge the bswap{si,di}2 expanders using SWI48

iterator too?  That would make i386.md tiny bit shorter, but would make

gen_bswapdi2 longer (as the compiler can't figure out that for DImode (thus

TARGET_64BIT) TARGET_BSWAP is always true).  Perhaps I could do

  else if (MODEmode == DImode || TARGET_BSWAP)

so that at least optimized gcc builds would optimize it away.

[Bug target/55147] [4.8 Regression] x86: wrong code for 64-bit load

2012-11-01 Thread ubizjak at gmail dot com 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55147



--- Comment #6 from Uros Bizjak ubizjak at gmail dot com 2012-11-01 09:48:50 
UTC ---

(In reply to comment #5)

 Created attachment 28589 [details]

 gcc48-pr55147.patch

 

 So like this?  Or do you want to merge the bswap{si,di}2 expanders using SWI48

 iterator too?  That would make i386.md tiny bit shorter, but would make

 gen_bswapdi2 longer (as the compiler can't figure out that for DImode (thus

 TARGET_64BIT) TARGET_BSWAP is always true).  Perhaps I could do

   else if (MODEmode == DImode || TARGET_BSWAP)

 so that at least optimized gcc builds would optimize it away.



No, your proposed patch is OK and pre-approved for mainline SVN.