Re: [Patch, Fortran] PR44646 - Add parser support for DO CONCURRENT
Mikael Morin wrote:
Patch is basically OK. One comment below.
diff --git a/gcc/fortran/resolve.c b/gcc/fortran/resolve.c
index 436c160..3877711 100644
--- a/gcc/fortran/resolve.c
+++ b/gcc/fortran/resolve.c
@@ -3125,11 +3126,17 @@ resolve_function (gfc_expr *expr)
{
if (forall_flag)
- gfc_error (reference to non-PURE function '%s' at %L inside a
+ gfc_error (Reference to non-PURE function '%s' at %L inside a
FORALL %s, name,expr-where,
forall_flag == 2 ? mask : block);
+ else if (do_concurrent_flag)
+ gfc_error (Reference to non-PURE function '%s' at %L inside a
+DO CONCURRENT block, name,expr-where);
You could distinguish between mask and block here, like it is done for forall
just above
I have changed it to be in the line with FORALL.
I have also added EXEC_DO_CONCURRENT after EXEC_FORALL in
frontend-optimization.c as suggested by Thomas.
Committed as Rev. 178677.
Thanks for the thorough review!
Tobias
Re: ARM: Emit conditions in push_multi
New patch below. Tested on arm-eabi sim with a few multilibs. OK. Ramana
Re: [PATCH][1/n] Fix parts of PR19831
On Wed, 7 Sep 2011, Andrew Pinski wrote: On Wed, Sep 7, 2011 at 7:31 AM, Richard Guenther rguent...@suse.de wrote: In practice the patch will do something about alloca at most, unless, of course, you have a memleak that you don't use ;) I think we have alloca (0); being required still and aligning the stack. I don't see this being documented anywhere though, and to _what_ should it align for alloca (0)? alloca (0) will be folded to auto-with-size-zero now which will get an alignment of 1 byte. Richard.
[PATCH, SMS] Minor misc. fixes
Hello,
The attached patch contains minor fixes.
Currently testing and bootstrap on ppc64-redhat-linux enabling SMS on
loops with SC 1.
OK for mainline once testing completes?
Thanks,
Revital
Changelog
* modulo-sched.c (optimize_sc): Call remove_node_from_ps outside
of gcc_assert.
(sms_schedule): Add print info.
Index: modulo-sched.c
===
--- modulo-sched.c (revision 178632)
+++ modulo-sched.c (working copy)
@@ -773,7 +773,7 @@ optimize_sc (partial_schedule_ptr ps, dd
if (get_sched_window (ps, g-closing_branch, sched_nodes, ii, start,
step, end) == 0)
{
- bool success;
+ bool success, remove_branch_p;
ps_insn_ptr next_ps_i;
int branch_cycle = SCHED_TIME (g-closing_branch);
int row = SMODULO (branch_cycle, ps-ii);
@@ -835,7 +835,8 @@ optimize_sc (partial_schedule_ptr ps, dd
break;
gcc_assert (next_ps_i);
- gcc_assert (remove_node_from_ps (ps, next_ps_i));
+ remove_branch_p = remove_node_from_ps (ps, next_ps_i);
+ gcc_assert (remove_branch_p);
success =
try_scheduling_node_in_cycle (ps, g-closing_branch,
g-closing_branch-cuid, c,
@@ -1485,8 +1486,8 @@ sms_schedule (void)
if (dump_file)
{
fprintf (dump_file,
- SMS succeeded %d %d (with ii, sc)\n, ps-ii,
- stage_count);
+ %s:%d SMS succeeded %d %d (with ii, sc)\n,
+ insn_file (tail), insn_line (tail), ps-ii, stage_count);
print_partial_schedule (ps, dump_file);
}
[Patch, testsuite] fix target/PR49614
gcc.dg/vmx/gcc-bug-i.c is failing for powerpc*-*-*
with:
Excess errors: /opt/gcc/work/gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c:
16:22: warning: always_inline function might not be inlinable [-
Wattributes]
this is because the function in question is declared:
static DO_INLINE int inline_me(vector signed short data) ;
where:
#define DO_INLINE __attribute__ ((always_inline))
so, unless __attribute__ ((always_inline)) is intended to imply
inline, the fix below is proposed,
OK for trunk?
Iain
gcc/testsuite:
PR target/49614
* gcc.dg/vmx/gcc-bug-i.c (inline_me): Declare 'inline'.
Index: gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c
===
--- gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c(revision 177459)
+++ gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c(working copy)
@@ -13,7 +13,7 @@
#define DO_INLINE __attribute__ ((always_inline))
#define DONT_INLINE __attribute__ ((noinline))
-static DO_INLINE int inline_me(vector signed short data)
+static inline DO_INLINE int inline_me(vector signed short data)
{
union {vector signed short v; signed short s[8];} u;
u.v = data;
Re: [PATCH, PR 50287] Do not create SSA names for unused non-register parameters in IPA-split
On Wed, Sep 7, 2011 at 7:18 PM, Martin Jambor mjam...@suse.cz wrote:
Hi,
the patch below should fix PR 50287 (and its many duplicates) by
simply never attempting to create new default-defs for unused
non-register parameters and using their DECL when calling the split
function. Note that all of this is relevant only in the case when
there is some other reason why we cannot change the function's
signature (typically because there are function attributes).
Otherwise, parameters that are not used or referenced in any way are
not passed on to the split function.
This is correct because it does not really matter what actual value we
pass to the split function for any non-register parameter because all
statements that are going to end up in the split function are checked
by mark_nonssa_use which makes sure it does not use, store or take
address of any such PARM_DECL.
The patch passes bootstrap and testing on x86_64-linux, it has
successfully LTO-built Firefox and I'm LTO-building a few SPEC 2006
benchmarks with it right now. Of course it fixes the ICE when
compiling the testcase (and I have verified that the 4.6 version also
fixes the ICE when compiling the reduced testcase of PR 50295). OK for
trunk (and then for the 4.6 branch)?
Ok.
Thanks,
Richard.
Thanks,
Martin
2011-09-06 Martin Jambor mjam...@suse.cz
PR tree-optimization/50287
* ipa-split.c (split_function): Do not create SSA names for
non-gimple-registers.
* testsuite/gcc.dg/torture/pr50287.c: New test.
Index: src/gcc/testsuite/gcc.dg/torture/pr50287.c
===
--- /dev/null
+++ src/gcc/testsuite/gcc.dg/torture/pr50287.c
@@ -0,0 +1,109 @@
+/* { dg-do compile } */
+
+struct PMC {
+ unsigned flags;
+};
+
+struct PVC {
+ unsigned flags, other_stuff;
+};
+
+
+typedef struct Pcc_cell
+{
+ struct PMC *p;
+ long bla;
+ long type;
+} Pcc_cell;
+
+int gi;
+int cond;
+
+struct PVC g_pvc;
+
+extern void abort ();
+extern void never_ever(int interp, struct PMC *pmc)
+ __attribute__((noinline,noclone));
+
+void never_ever (int interp, struct PMC *pmc)
+{
+ abort ();
+}
+
+static void mark_cell(int * interp, Pcc_cell *c, struct PVC pvc)
+ __attribute__((__nonnull__(1)));
+
+static void
+mark_cell(int * interp, Pcc_cell *c, struct PVC pvc)
+{
+ if (!cond)
+ return;
+
+ if (c c-type == 4 c-p
+ !(c-p-flags (18)))
+ never_ever(gi + 1, c-p);
+ if (c c-type == 4 c-p
+ !(c-p-flags (17)))
+ never_ever(gi + 2, c-p);
+ if (c c-type == 4 c-p
+ !(c-p-flags (16)))
+ never_ever(gi + 3, c-p);
+ if (c c-type == 4 c-p
+ !(c-p-flags (15)))
+ never_ever(gi + 4, c-p);
+ if (c c-type == 4 c-p
+ !(c-p-flags (14)))
+ never_ever(gi + 5, c-p);
+ if (c c-type == 4 c-p
+ !(c-p-flags (13)))
+ never_ever(gi + 6, c-p);
+ if (c c-type == 4 c-p
+ !(c-p-flags (12)))
+ never_ever(gi + 7, c-p);
+ if (c c-type == 4 c-p
+ !(c-p-flags (11)))
+ never_ever(gi + 8, c-p);
+ if (c c-type == 4 c-p
+ !(c-p-flags (19)))
+ never_ever(gi + 9, c-p);
+}
+
+static void
+foo(int * interp, Pcc_cell *c)
+{
+ mark_cell(interp, c, g_pvc);
+}
+
+static struct Pcc_cell *
+__attribute__((noinline,noclone))
+getnull(void)
+{
+ return (struct Pcc_cell *) 0;
+}
+
+
+int main()
+{
+ int i;
+
+ cond = 1;
+ for (i = 0; i 100; i++)
+ foo (gi, getnull ());
+ return 0;
+}
+
+
+void
+bar_1 (int * interp, Pcc_cell *c)
+{
+ c-bla += 1;
+ mark_cell(interp, c, g_pvc);
+}
+
+void
+bar_2 (int * interp, Pcc_cell *c, struct PVC pvc)
+{
+ c-bla += 2;
+ mark_cell(interp, c, pvc);
+}
+
Index: src/gcc/ipa-split.c
===
--- src.orig/gcc/ipa-split.c
+++ src/gcc/ipa-split.c
@@ -985,15 +985,20 @@ split_function (struct split_point *spli
bitmap_set_bit (args_to_skip, num);
else
{
- arg = gimple_default_def (cfun, parm);
- if (!arg)
+ /* This parm might not have been used up to now, but is going to be
+ used, hence register it. */
+ add_referenced_var (parm);
+ if (is_gimple_reg (parm))
{
- /* This parm wasn't used up to now, but is going to be used,
- hence register it. */
- add_referenced_var (parm);
- arg = make_ssa_name (parm, gimple_build_nop ());
- set_default_def (parm, arg);
+ arg = gimple_default_def (cfun, parm);
+ if (!arg)
+ {
+ arg = make_ssa_name (parm, gimple_build_nop ());
+ set_default_def (parm, arg);
+ }
}
+ else
+ arg = parm;
if (TYPE_MAIN_VARIANT (DECL_ARG_TYPE (parm))
!= TYPE_MAIN_VARIANT (TREE_TYPE (arg)))
[C++ Patch] PR 50324
Hi,
seems just one of these straightforward cases where we don't propagate
the complain argument thoroughly enough. Tested x86_64-linux.
Ok for mainline?
Thanks,
Paolo.
/
/cp
2011-09-08 Paolo Carlini paolo.carl...@oracle.com
PR c++/50324
* typeck2.c (digest_init_r): Call complete_type_or_maybe_complain
instead of complete_type_or_else.
/testsuite
2011-09-08 Paolo Carlini paolo.carl...@oracle.com
PR c++/50324
* g++.dg/cpp0x/sfinae28.C: New.
Index: testsuite/g++.dg/cpp0x/sfinae28.C
===
--- testsuite/g++.dg/cpp0x/sfinae28.C (revision 0)
+++ testsuite/g++.dg/cpp0x/sfinae28.C (revision 0)
@@ -0,0 +1,16 @@
+// PR c++/50324
+// { dg-options -std=c++0x }
+
+struct complete { };
+struct incomplete;
+
+templateclass T auto f(T *) - decltype(T{}) *;
+templateclass T char f(T);
+
+int main()
+{
+ complete *p = 0;
+ static_assert(sizeof(f(p)) == sizeof(void*), );
+ incomplete *q = 0;
+ static_assert(sizeof(f(q)) == 1u, );
+}
Index: cp/typeck2.c
===
--- cp/typeck2.c(revision 178685)
+++ cp/typeck2.c(working copy)
@@ -1,7 +1,7 @@
/* Report error messages, build initializers, and perform
some front-end optimizations for C++ compiler.
Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+ 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
Free Software Foundation, Inc.
Hacked by Michael Tiemann (tiem...@cygnus.com)
@@ -812,8 +812,9 @@ digest_init_r (tree type, tree init, bool nested,
/* We must strip the outermost array type when completing the type,
because the its bounds might be incomplete at the moment. */
- if (!complete_type_or_else (TREE_CODE (type) == ARRAY_TYPE
- ? TREE_TYPE (type) : type, NULL_TREE))
+ if (!complete_type_or_maybe_complain (TREE_CODE (type) == ARRAY_TYPE
+ ? TREE_TYPE (type) : type, NULL_TREE,
+ complain))
return error_mark_node;
/* Strip NON_LVALUE_EXPRs since we aren't using as an lvalue
[PATCH] Fix PR19831, remove malloc/free pairs
This implements removal of malloc/free pairs when allowed for a
subset of all possible cases. The idea is to identify possible
candidates (we free the return value of an allocation call) and
for them do not make the allocation function necessary because
of the free. If nothing else made the allocation necessary,
go ahead and make the free call not necessary as well after
propagation.
Integrating this with control-dependence is much harder but
would then handle also if (p) free (p). The testcases contain
some tricky cases that break when you do it too simple-minded.
Bootstrapped on x86_64-unknown-linux-gnu, testing in progress.
Richard.
2011-09-08 Richard Guenther rguent...@suse.de
PR tree-optimization/19831
* tree-ssa-dce.c (mark_all_reaching_defs_necessary_1): Also
skip builtins with vdefs that do not really store something.
(propagate_necessity): For calls to free that we can associate
with an allocation function do not mark the freed pointer
definition necessary.
(eliminate_unnecessary_stmts): Remove a call to free if
the associated call to an allocation function is not necessary.
* gcc.dg/tree-ssa/pr19831-1.c: New testcase.
* gcc.dg/tree-ssa/pr19831-2.c: Likewise.
* gcc.dg/tree-ssa/pr19831-3.c: Likewise.
Index: gcc/tree-ssa-dce.c
===
*** gcc/tree-ssa-dce.c (revision 178684)
--- gcc/tree-ssa-dce.c (working copy)
*** mark_stmt_if_obviously_necessary (gimple
*** 309,314
--- 309,316
case BUILT_IN_CALLOC:
case BUILT_IN_ALLOCA:
return;
+
+ default:;
}
/* Most, but not all function calls are required. Function calls that
produce no result and have no side effects (i.e. const pure
*** mark_all_reaching_defs_necessary_1 (ao_r
*** 625,630
--- 627,651
return false;
}
+ /* We want to skip statments that do not constitute stores but have
+ a virtual definition. */
+ if (is_gimple_call (def_stmt))
+ {
+ tree callee = gimple_call_fndecl (def_stmt);
+ if (callee != NULL_TREE
+ DECL_BUILT_IN_CLASS (callee) == BUILT_IN_NORMAL)
+ switch (DECL_FUNCTION_CODE (callee))
+ {
+ case BUILT_IN_MALLOC:
+ case BUILT_IN_CALLOC:
+ case BUILT_IN_ALLOCA:
+ case BUILT_IN_FREE:
+ return false;
+
+ default:;
+ }
+ }
+
mark_operand_necessary (vdef);
return false;
*** propagate_necessity (struct edge_list *e
*** 805,810
--- 826,850
ssa_op_iter iter;
tree use;
+ /* If this is a call to free which is directly fed by an
+allocation function do not mark that necessary through
+processing the argument. */
+ if (gimple_call_builtin_p (stmt, BUILT_IN_FREE))
+ {
+ tree ptr = gimple_call_arg (stmt, 0);
+ gimple def_stmt;
+ tree def_callee;
+ /* If the pointer we free is defined by an allocation
+function do not add the call to the worklist. */
+ if (TREE_CODE (ptr) == SSA_NAME
+ is_gimple_call (def_stmt = SSA_NAME_DEF_STMT (ptr))
+ (def_callee = gimple_call_fndecl (def_stmt))
+ DECL_BUILT_IN_CLASS (def_callee) == BUILT_IN_NORMAL
+ (DECL_FUNCTION_CODE (def_callee) == BUILT_IN_MALLOC
+ || DECL_FUNCTION_CODE (def_callee) == BUILT_IN_CALLOC))
+ continue;
+ }
+
FOR_EACH_SSA_TREE_OPERAND (use, stmt, iter, SSA_OP_USE)
mark_operand_necessary (use);
*** eliminate_unnecessary_stmts (void)
*** 1218,1223
--- 1258,1286
stats.total++;
+ /* We can mark a call to free as not necessary if the
+defining statement of its argument is an allocation
+function and that is not necessary itself. */
+ if (gimple_call_builtin_p (stmt, BUILT_IN_FREE))
+ {
+ tree ptr = gimple_call_arg (stmt, 0);
+ tree callee2;
+ gimple def_stmt;
+ if (TREE_CODE (ptr) != SSA_NAME)
+ continue;
+ def_stmt = SSA_NAME_DEF_STMT (ptr);
+ if (!is_gimple_call (def_stmt)
+ || gimple_plf (def_stmt, STMT_NECESSARY))
+ continue;
+ callee2 = gimple_call_fndecl (def_stmt);
+ if (callee2 == NULL_TREE
+ || DECL_BUILT_IN_CLASS (callee2) != BUILT_IN_NORMAL
+ || (DECL_FUNCTION_CODE (callee2) != BUILT_IN_MALLOC
+ DECL_FUNCTION_CODE (callee2) != BUILT_IN_CALLOC))
+ continue;
+ gimple_set_plf (stmt, STMT_NECESSARY, false);
+ }
+
/* If GSI is not necessary then
Re: Vector Comparison patch
On Wed, Sep 7, 2011 at 3:15 PM, Artem Shinkarov
artyom.shinkar...@gmail.com wrote:
On Tue, Sep 6, 2011 at 3:56 PM, Richard Guenther
richard.guent...@gmail.com wrote:
On Tue, Sep 6, 2011 at 4:50 PM, Artem Shinkarov
artyom.shinkar...@gmail.com wrote:
Here is a new version of the patch which considers the changes from
2011-09-02 Richard Guenther
ChangeLog
20011-09-06 Artjoms Sinkarovs artyom.shinkar...@gmail.com
gcc/
* fold-const.c (constant_boolean_node): Adjust the meaning
of boolean for vector types: true = {-1,..}, false = {0,..}.
(fold_unary_loc): Avoid conversion of vector comparison to
boolean type.
Both changes have already been done.
I missed the way you applied constant_boolean node, sorry for that.
But fold_unary_loc seems confusing to me. We have the following code:
else if (!INTEGRAL_TYPE_P (type))
return build3_loc (loc, COND_EXPR, type, op0,
constant_boolean_node (true, type),
constant_boolean_node (false, type));
But this is wrong for the vector types, because it should construct
VEC_COND_EXPR, not COND_EXPR. That is why I had a special case for
vectors.
Ah, yeah. I'll fix that.
The patch looks ok to me from a middle-end point of view. Thus, if
Joseph is fine with it and Uros is, with the i386 piece the patch is ok.
Thanks,
Richard.
* expr.c (expand_expr_real_2): Expand vector comparison by
building an appropriate VEC_COND_EXPR.
I prefer
Index: gcc/expr.c
===
*** gcc/expr.c.orig 2011-08-29 11:48:23.0 +0200
--- gcc/expr.c 2011-08-29 12:58:59.0 +0200
*** do_store_flag (sepops ops, rtx target, e
*** 10309,10314
--- 10309,10325
STRIP_NOPS (arg0);
STRIP_NOPS (arg1);
+ /* For vector typed comparisons emit code to generate the desired
+ all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
+ expander for this. */
+ if (TREE_CODE (ops-type) == VECTOR_TYPE)
+ {
+ tree ifexp = build2 (ops-code, ops-type, arg0, arg1);
+ tree if_true = constant_boolean_node (true, ops-type);
+ tree if_false = constant_boolean_node (false, ops-type);
+ return expand_vec_cond_expr (ops-type, ifexp, if_true,
if_false, target);
+ }
+
/* Get the rtx comparison code to use. We know that EXP is a comparison
as I said multiple times.
* c-typeck.c (build_binary_op): Typecheck vector comparisons.
(c_objc_common_truthvalue_conversion): Adjust.
* tree-vect-generic.c (do_compare): Helper function.
(expand_vector_comparison): Check if hardware supports
vector comparison of the given type or expand vector
piecewise.
(expand_vector_operation): Treat comparison as binary
operation of vector type.
(expand_vector_operations_1): Adjust.
* tree-cfg.c (verify_gimple_comparison): Adjust.
The tree-cfg.c change has already been done.
Richard.
gcc/config/i386
* i386.c (ix86_expand_sse_movcc): Consider a case when
vcond operators are {-1,..} and {0,..}.
gcc/doc
* extend.texi: Adjust.
gcc/testsuite
* gcc.c-torture/execute/vector-compare-1.c: New test.
* gcc.c-torture/execute/vector-compare-2.c: New test.
* gcc.dg/vector-compare-1.c: New test.
* gcc.dg/vector-compare-2.c: New test.
bootstrapped and tested on x86_64-unknown-linux-gnu.
Thanks,
Artem.
All the rest is adjusted in the new version of the patch you can find
in the attachment.
ChangLog
20011-09-06 Artjoms Sinkarovs artyom.shinkar...@gmail.com
gcc/
* expr.c (do_store_flag): Expand vector comparison by
building an appropriate VEC_COND_EXPR.
* c-typeck.c (build_binary_op): Typecheck vector comparisons.
(c_objc_common_truthvalue_conversion): Adjust.
* tree-vect-generic.c (do_compare): Helper function.
(expand_vector_comparison): Check if hardware supports
vector comparison of the given type or expand vector
piecewise.
(expand_vector_operation): Treat comparison as binary
operation of vector type.
(expand_vector_operations_1): Adjust.
gcc/config/i386
* i386.c (ix86_expand_sse_movcc): Consider a case when
vcond operators are {-1,..} and {0,..}.
gcc/doc
* extend.texi: Adjust.
gcc/testsuite
* gcc.c-torture/execute/vector-compare-1.c: New test.
* gcc.c-torture/execute/vector-compare-2.c: New test.
* gcc.dg/vector-compare-1.c: New test.
* gcc.dg/vector-compare-2.c: New test.
bootstrapped and tested on x86_64-unknown-linux-gnu.
PR middle-end/48660: Assigning to BLKmode RESULT_DECL
PR 48660 is about an ICE on code like:
templateint N struct val { char a[N]; };
class Base
{
public:
virtual val2 get2() const = 0;
};
class Derived : public virtual Base
{
public:
virtual val2 get2() const { return foo-get2(); }
Base *foo;
};
Base* make() { return new Derived; }
The thunk for Derived::get2() ends with an assignment to the
val2 RESULT_DECL, followed by a return. The problem is that
val2 has mode BLKmode, but the RESULT_DECL is a HImode register
(small structures are returned in registers on ARM). We then ICE
while copying a BLKmode rhs into a HImode lhs.
At first I thought this was a bug in the thunk expansion; I haven't been
able to trigger it elsewhere. But Richard said on irc that this was valid
gimple and should work. So this patch instead fixes the implicit FIXME in:
The compiler currently can't handle
copying a BLKmode value into registers. We could put this code in a
more general area (for use by everyone instead of just function
call/return), but until this feature is generally usable it is kept here
(and in expand_call). */
I think the expand_call part is already out-of-date: I assume it's
referring to copy_blkmode_from_reg, which handles moves in the opposite
direction -- return register to BLKmode value -- and which is already
a separate function.
At the moment, copies into RESULT_DECL are handled by the:
/* If the rhs is a function call and its value is not an aggregate,
call the function before we start to compute the lhs.
This is needed for correct code for cases such as
val = setjmp (buf) on machines where reference to val
requires loading up part of an address in a separate insn.
Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
since it might be a promoted variable where the zero- or sign- extension
needs to be done. Handling this in the normal way is safe because no
computation is done before the call. The same is true for SSA names. */
if (TREE_CODE (from) == CALL_EXPR ! aggregate_value_p (from, from)
COMPLETE_TYPE_P (TREE_TYPE (from))
TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
! (((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
REG_P (DECL_RTL (to)))
|| TREE_CODE (to) == SSA_NAME))
{
rtx value;
push_temp_slots ();
value = expand_normal (from);
if (to_rtx == 0)
to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
block of expand_assignment, but I think the REG_P exclusion that applies
to VAR_DECLs and PARM_DECLs also applies to RESULT_DECLs.
Tested on x86_64-linux-gnu and arm-linux-gnu. OK for trunk?
What about release branches? This is a regression from 4.4 (which had
the old thunk code). A conservative alternative for the branches might
be to leave out the stmt.c part.
Richard
gcc/
* expr.h (copy_blkmode_to_reg): Declare.
* expr.c (copy_blkmode_to_reg): New function.
(expand_assignment): Don't expand register RESULT_DECLs before
the lhs. Use copy_blkmode_to_reg to copy BLKmode values into a
RESULT_DECL register.
* stmt.c (expand_return): Move BLKmode-to-register code into
copy_blkmode_to_reg.
Index: gcc/expr.h
===
--- gcc/expr.h 2011-09-08 11:06:35.314378369 +0100
+++ gcc/expr.h 2011-09-08 13:23:37.976613715 +0100
@@ -321,6 +321,8 @@ extern void emit_group_store (rtx, rtx,
/* Copy BLKmode object from a set of registers. */
extern rtx copy_blkmode_from_reg (rtx, rtx, tree);
+extern rtx copy_blkmode_to_reg (enum machine_mode, tree);
+
/* Mark REG as holding a parameter for the next CALL_INSN. */
extern void use_reg (rtx *, rtx);
Index: gcc/expr.c
===
--- gcc/expr.c 2011-09-08 11:06:35.314378369 +0100
+++ gcc/expr.c 2011-09-08 13:38:24.871096387 +0100
@@ -2180,6 +2180,112 @@ copy_blkmode_from_reg (rtx tgtblk, rtx s
return tgtblk;
}
+/* Copy BLKmode value SRC into a register of mode MODE. Return the
+ register if it contains any data, otherwise return null.
+
+ This is used on targets that return BLKmode values in registers. */
+
+rtx
+copy_blkmode_to_reg (enum machine_mode mode, tree src)
+{
+ int i, n_regs;
+ unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
+ unsigned int bitsize;
+ rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
+ enum machine_mode dst_mode;
+
+ gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
+
+ x = expand_normal (src);
+
+ bytes = int_size_in_bytes (TREE_TYPE (src));
+ if (bytes == 0)
+return NULL_RTX;
+
+ /* If the structure doesn't take up a whole number of words, see
+ whether the register value should be padded on the left or on
+ the right. Set PADDING_CORRECTION to the
Re: Vector Comparison patch
On Thu, Sep 8, 2011 at 2:41 PM, Richard Guenther
richard.guent...@gmail.com wrote:
On Wed, Sep 7, 2011 at 3:15 PM, Artem Shinkarov
artyom.shinkar...@gmail.com wrote:
On Tue, Sep 6, 2011 at 3:56 PM, Richard Guenther
richard.guent...@gmail.com wrote:
On Tue, Sep 6, 2011 at 4:50 PM, Artem Shinkarov
artyom.shinkar...@gmail.com wrote:
Here is a new version of the patch which considers the changes from
2011-09-02 Richard Guenther
ChangeLog
20011-09-06 Artjoms Sinkarovs artyom.shinkar...@gmail.com
gcc/
* fold-const.c (constant_boolean_node): Adjust the meaning
of boolean for vector types: true = {-1,..}, false = {0,..}.
(fold_unary_loc): Avoid conversion of vector comparison to
boolean type.
Both changes have already been done.
I missed the way you applied constant_boolean node, sorry for that.
But fold_unary_loc seems confusing to me. We have the following code:
else if (!INTEGRAL_TYPE_P (type))
return build3_loc (loc, COND_EXPR, type, op0,
constant_boolean_node (true, type),
constant_boolean_node (false, type));
But this is wrong for the vector types, because it should construct
VEC_COND_EXPR, not COND_EXPR. That is why I had a special case for
vectors.
Ah, yeah. I'll fix that.
OTOH, we require that vectors are converted with VIEW_CONVERT_EXPRs,
so the code shouldn't trigger anyway.
Richard.
The patch looks ok to me from a middle-end point of view. Thus, if
Joseph is fine with it and Uros is, with the i386 piece the patch is ok.
Thanks,
Richard.
Re: [PATCH] Fix PR19831, remove malloc/free pairs
On Thu, 8 Sep 2011, Richard Guenther wrote:
This implements removal of malloc/free pairs when allowed for a
subset of all possible cases. The idea is to identify possible
candidates (we free the return value of an allocation call) and
for them do not make the allocation function necessary because
of the free. If nothing else made the allocation necessary,
go ahead and make the free call not necessary as well after
propagation.
Integrating this with control-dependence is much harder but
would then handle also if (p) free (p). The testcases contain
some tricky cases that break when you do it too simple-minded.
Bootstrapped on x86_64-unknown-linux-gnu, testing in progress.
And we hit gcc.dg/errno-1.c, adjusted as follows
Index: gcc/testsuite/gcc.dg/errno-1.c
===
--- gcc/testsuite/gcc.dg/errno-1.c (revision 178684)
+++ gcc/testsuite/gcc.dg/errno-1.c (working copy)
@@ -6,7 +6,7 @@
int main()
{
- void *p;
+ void * volatile p;
errno = 0;
p = malloc (-1);
if (errno != 0)
which keeps the malloc live. The testcase wants to verify
that we don't CSE errno across malloc.
Committed.
Richard.
Re: [PATCH, Atom] Improve AGU stalls avoidance optimization
On Tue, Sep 6, 2011 at 10:54 AM, Ilya Enkovich enkovich@gmail.com wrote: 2011/9/6 Uros Bizjak ubiz...@gmail.com: Please merge your new splitters with corresponding LEA patterns. OK with this change. Thanks, Uros. Fixed. Could please someone check it in if it's OK now? Thanks, Ilya --- gcc/ 2011-09-06 Enkovich Ilya ilya.enkov...@intel.com * config/i386/i386-protos.h (ix86_lea_outperforms): New. (ix86_avoid_lea_for_add): Likewise. (ix86_avoid_lea_for_addr): Likewise. (ix86_split_lea_for_addr): Likewise. * config/i386/i386.c (LEA_MAX_STALL): New. (increase_distance): Likewise. (insn_defines_reg): Likewise. (insn_uses_reg_mem): Likewise. (distance_non_agu_define_in_bb): Likewise. (distance_agu_use_in_bb): Likewise. (ix86_lea_outperforms): Likewise. (ix86_ok_to_clobber_flags): Likewise. (ix86_avoid_lea_for_add): Likewise. (ix86_avoid_lea_for_addr): Likewise. (ix86_split_lea_for_addr): Likewise. (distance_non_agu_define): Search in pred BBs added. (distance_agu_use): Search in succ BBs added. (IX86_LEA_PRIORITY): Value changed from 2 to 0. (LEA_SEARCH_THRESHOLD): Now depends on LEA_MAX_STALL. (ix86_lea_for_add_ok): Use ix86_lea_outperforms to make decision. * config/i386/i386.md: Split added to transform non destructive add into move and add. (lea_1): transformed into insn_and_split to avoid AGU stalls. (leamode_2): Likewise. I checked it into trunk for you. Thanks. -- H.J.
Re: [PATCH][Cilkplus] Local Label inside Cilk_for fix
On Wed, Sep 7, 2011 at 8:30 PM, Iyer, Balaji V balaji.v.i...@intel.com wrote: Hello Everyone, Local label inside a _Cilk_for was giving an error in the C++ Compiler of Cilk Plus GCC branch. This patch should fix that. Thanks, I checked it in for you. -- H.J.
Re: [PATCH][Cilkplus] _Cilk_spawn inside contructor and destructor
On Wed, Sep 7, 2011 at 9:28 PM, Iyer, Balaji V balaji.v.i...@intel.com wrote: Hello Everyone, This patch is for the Cilk Plus C++ compiler. It will allow users to use _Cilk_spawn inside constructors and destructors. Thanks, I checked it in for you. -- H.J.
Re: Add unwind information to mips epilogues
Bernd Schmidt ber...@codesourcery.com writes:
Testing with the shrink-wrapping patch added reveals a problem with the
mips16 save insn: sometimes we store registers that shouldn't be
considered saved registers; we have to clear RTX_FRAME_RELATED_P for
these. Testing in progress with mips-elf, ips16/arch=mips32r2/abi=32
and some other multilibs. Ok?
Bernd
* config/mips/mips.c (mips16e_build_save_restore): Clear
RTX_FRAME_RELATED_P for argument stores stolen from the first
block.
Index: gcc/config/mips/mips.c
===
--- gcc/config/mips/mips.c(revision 178135)
+++ gcc/config/mips/mips.c(working copy)
@@ -8448,6 +8456,7 @@ mips16e_build_save_restore (bool restore
offset = top_offset + i * UNITS_PER_WORD;
set = mips16e_save_restore_reg (restore_p, offset, GP_ARG_FIRST + i);
XVECEXP (pattern, 0, n++) = set;
+ RTX_FRAME_RELATED_P (set) = 0;
}
/* Then fill in the other register moves. */
Sorry to be a pain, but I'd prefer the attached, which feels a bit
more direct. (It's also completely untested, but I'll try to give
it a spin this weekend.)
Richard
gcc/
* config/mips/mips.c (mips16e_save_restore_reg): Add a reg_parm_p
argument.
(mips16e_build_save_restore): Update accordingly.
Index: gcc/config/mips/mips.c
===
--- gcc/config/mips/mips.c 2011-09-06 12:01:22.0 +0100
+++ gcc/config/mips/mips.c 2011-09-08 14:53:22.885218099 +0100
@@ -8365,20 +8365,22 @@ mips16e_collect_argument_saves (void)
}
/* Return a move between register REGNO and memory location SP + OFFSET.
- Make the move a load if RESTORE_P, otherwise make it a frame-related
- store. */
+ REG_PARM_P is true if SP + OFFSET belongs to REG_PARM_STACK_SPACE.
+ Make the move a load if RESTORE_P, otherwise make it a store. */
static rtx
-mips16e_save_restore_reg (bool restore_p, HOST_WIDE_INT offset,
- unsigned int regno)
+mips16e_save_restore_reg (bool restore_p, bool reg_parm_p,
+ HOST_WIDE_INT offset, unsigned int regno)
{
rtx reg, mem;
mem = gen_frame_mem (SImode, plus_constant (stack_pointer_rtx, offset));
reg = gen_rtx_REG (SImode, regno);
- return (restore_p
- ? gen_rtx_SET (VOIDmode, reg, mem)
- : mips_frame_set (mem, reg));
+ if (restore_p)
+return gen_rtx_SET (VOIDmode, reg, mem);
+ if (reg_parm_p)
+return gen_rtx_SET (VOIDmode, mem, reg);
+ return mips_frame_set (mem, reg);
}
/* Return RTL for a MIPS16e SAVE or RESTORE instruction; RESTORE_P says which.
@@ -8440,7 +8442,8 @@ mips16e_build_save_restore (bool restore
for (i = 0; i nargs; i++)
{
offset = top_offset + i * UNITS_PER_WORD;
- set = mips16e_save_restore_reg (restore_p, offset, GP_ARG_FIRST + i);
+ set = mips16e_save_restore_reg (restore_p, true, offset,
+ GP_ARG_FIRST + i);
XVECEXP (pattern, 0, n++) = set;
}
@@ -8452,7 +8455,7 @@ mips16e_build_save_restore (bool restore
if (BITSET_P (*mask_ptr, regno))
{
offset -= UNITS_PER_WORD;
- set = mips16e_save_restore_reg (restore_p, offset, regno);
+ set = mips16e_save_restore_reg (restore_p, false, offset, regno);
XVECEXP (pattern, 0, n++) = set;
*mask_ptr = ~(1 regno);
}
Re: Add unwind information to mips epilogues
Bernd Schmidt ber...@codesourcery.com writes:
@@ -10227,17 +10236,30 @@ mips_expand_prologue (void)
emit_insn (gen_blockage ());
}
-/* Emit instructions to restore register REG from slot MEM. */
+/* Emit instructions to restore register REG from slot MEM. Also update
+ the cfa_restores list. */
static void
mips_restore_reg (rtx reg, rtx mem)
{
+ rtx orig_reg = reg;
+ rtx last;
+
/* There's no MIPS16 instruction to load $31 directly. Load into
$7 instead and adjust the return insn appropriately. */
if (TARGET_MIPS16 REGNO (reg) == RETURN_ADDR_REGNUM)
reg = gen_rtx_REG (GET_MODE (reg), GP_REG_FIRST + 7);
mips_emit_save_slot_move (reg, mem, MIPS_EPILOGUE_TEMP (GET_MODE (reg)));
+ if (reg == orig_reg)
+cfa_restores = alloc_reg_note (REG_CFA_RESTORE, reg, cfa_restores);
+
+ if (!frame_pointer_needed || REGNO (reg) != HARD_FRAME_POINTER_REGNUM)
+return;
+ last = get_last_insn ();
+ add_reg_note (last, REG_CFA_DEF_CFA, plus_constant (stack_pointer_rtx,
+ cfa_sp_offset));
+ RTX_FRAME_RELATED_P (last) = 1;
I suppose I still don't get why this is OK but this:
@@ -10324,12 +10350,26 @@ mips_expand_epilogue (bool sibcall_p)
if (!TARGET_MIPS16)
target = stack_pointer_rtx;
- emit_insn (gen_add3_insn (target, base, adjust));
+ insn = emit_insn (gen_add3_insn (target, base, adjust));
+ if (!frame_pointer_needed target == stack_pointer_rtx)
+ {
+ RTX_FRAME_RELATED_P (insn) = 1;
+ add_reg_note (insn, REG_CFA_DEF_CFA,
+ plus_constant (stack_pointer_rtx, step2));
+ }
triggered ICEs without the !frame_pointer_required. I think I need
to play around with it a bit before I understand enough to review.
I'll try to find time this weekend.
Also, this:
@@ -10442,7 +10495,7 @@ mips_expand_epilogue (bool sibcall_p)
}
else
{
- unsigned int regno;
+ rtx pat;
/* When generating MIPS16 code, the normal
mips_for_each_saved_gpr_and_fpr path will restore the return
@@ -10450,11 +10503,16 @@ mips_expand_epilogue (bool sibcall_p)
if (TARGET_MIPS16
!GENERATE_MIPS16E_SAVE_RESTORE
BITSET_P (frame-mask, RETURN_ADDR_REGNUM))
- regno = GP_REG_FIRST + 7;
+ {
+ rtx reg = gen_rtx_REG (Pmode, GP_REG_FIRST + 7);
+ pat = gen_return_internal (reg);
+ }
else
- regno = RETURN_ADDR_REGNUM;
- emit_jump_insn (gen_simple_return_internal (gen_rtx_REG (Pmode,
- regno)));
+ {
+ rtx reg = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM);
+ pat = gen_simple_return_internal (reg);
+ }
+ emit_jump_insn (pat);
}
}
looks like a logically separate change. I'm not sure I understand
why it's needed: both returns are simple returns in the rtx sense.
Sorry for being awkward here :-(
Richard
Ping^2: PR 50113/50061: Fix ABI breakage from emit_library_call_value_1 patch
Ping for this patch to emit_library_call_value_1: http://gcc.gnu.org/ml/gcc-patches/2011-08/msg00735.html which fixes a bootstrap failure on MIPS since: http://gcc.gnu.org/ml/gcc-patches/2011-06/msg02341.html Tested on mips64-linux-gnu, mips-sgi-irix6.5 (by Rainer) and on both big and little-endian ARM (by Julian). Richard
Re: [C++ Patch] PR 50324
OK. Jason
Re: Add unwind information to mips epilogues
On 09/08/11 16:08, Richard Sandiford wrote:
Also, this:
@@ -10442,7 +10495,7 @@ mips_expand_epilogue (bool sibcall_p)
}
else
{
- unsigned int regno;
+ rtx pat;
/* When generating MIPS16 code, the normal
mips_for_each_saved_gpr_and_fpr path will restore the return
@@ -10450,11 +10503,16 @@ mips_expand_epilogue (bool sibcall_p)
if (TARGET_MIPS16
!GENERATE_MIPS16E_SAVE_RESTORE
BITSET_P (frame-mask, RETURN_ADDR_REGNUM))
- regno = GP_REG_FIRST + 7;
+ {
+ rtx reg = gen_rtx_REG (Pmode, GP_REG_FIRST + 7);
+ pat = gen_return_internal (reg);
+ }
else
- regno = RETURN_ADDR_REGNUM;
- emit_jump_insn (gen_simple_return_internal (gen_rtx_REG (Pmode,
-regno)));
+ {
+ rtx reg = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM);
+ pat = gen_simple_return_internal (reg);
+ }
+ emit_jump_insn (pat);
}
}
looks like a logically separate change. I'm not sure I understand
why it's needed: both returns are simple returns in the rtx sense.
Should have explained that bit - it's needed only with shrink-wrapping.
If we find that the epilogue ends in a simple_return, and we need
conditional simple_returns elsewhere and don't have a pattern for them,
we try to reuse the epilogue's simple_return by placing a label in
front of it and redirecting these conditional simple_returns there. This
doesn't work if we need to use different return registers, and a simple
way to prevent it is to make the last insn look like a normal return
instead.
Bernd
Re: Add unwind information to mips epilogues
Bernd Schmidt ber...@codesourcery.com writes:
On 09/08/11 16:08, Richard Sandiford wrote:
Also, this:
@@ -10442,7 +10495,7 @@ mips_expand_epilogue (bool sibcall_p)
}
else
{
- unsigned int regno;
+ rtx pat;
/* When generating MIPS16 code, the normal
mips_for_each_saved_gpr_and_fpr path will restore the return
@@ -10450,11 +10503,16 @@ mips_expand_epilogue (bool sibcall_p)
if (TARGET_MIPS16
!GENERATE_MIPS16E_SAVE_RESTORE
BITSET_P (frame-mask, RETURN_ADDR_REGNUM))
-regno = GP_REG_FIRST + 7;
+{
+ rtx reg = gen_rtx_REG (Pmode, GP_REG_FIRST + 7);
+ pat = gen_return_internal (reg);
+}
else
-regno = RETURN_ADDR_REGNUM;
- emit_jump_insn (gen_simple_return_internal (gen_rtx_REG (Pmode,
- regno)));
+{
+ rtx reg = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM);
+ pat = gen_simple_return_internal (reg);
+}
+ emit_jump_insn (pat);
}
}
looks like a logically separate change. I'm not sure I understand
why it's needed: both returns are simple returns in the rtx sense.
Should have explained that bit - it's needed only with shrink-wrapping.
If we find that the epilogue ends in a simple_return, and we need
conditional simple_returns elsewhere and don't have a pattern for them,
we try to reuse the epilogue's simple_return by placing a label in
front of it and redirecting these conditional simple_returns there. This
doesn't work if we need to use different return registers, and a simple
way to prevent it is to make the last insn look like a normal return
instead.
Ah! Yeah. So this part is OK on its own with a comment like:
/* simple_returns cannot rely on values that are only available
on paths through the epilogue (because return paths that do
not pass through the epilogue may nevertheless reuse a
simple_return that occurs at the end of the epilogue).
Use a normal return here instead. */
rtx reg = gen_rtx_REG (Pmode, GP_REG_FIRST + 7);
pat = gen_return_internal (reg);
Thanks,
Richard
Re: PR middle-end/48660: Assigning to BLKmode RESULT_DECL
Hi,
On Thu, 8 Sep 2011, Richard Sandiford wrote:
if (TREE_CODE (from) == CALL_EXPR ! aggregate_value_p (from, from)
COMPLETE_TYPE_P (TREE_TYPE (from))
TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
! (((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
REG_P (DECL_RTL (to)))
|| TREE_CODE (to) == SSA_NAME))
{
rtx value;
push_temp_slots ();
value = expand_normal (from);
if (to_rtx == 0)
to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
block of expand_assignment, but I think the REG_P exclusion that applies
to VAR_DECLs and PARM_DECLs also applies to RESULT_DECLs.
Right, when I saw your conversation on IRC that was also my first
reaction. My second was similar to this hunk ...
@@ -8950,10 +9061,15 @@ expand_expr_real_1 (tree exp, rtx target
return temp;
}
- /* If the mode of DECL_RTL does not match that of the decl, it
- must be a promoted value. We return a SUBREG of the wanted mode,
- but mark it so that we know that it was already extended. */
- if (REG_P (decl_rtl) GET_MODE (decl_rtl) != DECL_MODE (exp))
+ /* If the mode of DECL_RTL does not match that of the decl,
+ there are two cases: we are dealing with a BLKmode value
+ that is returned in a register, or we are dealing with
+ a promoted value. In the latter case, return a SUBREG
+ of the wanted mode, but mark it so that we know that it
+ was already extended. */
+ if (REG_P (decl_rtl)
+!(code == RESULT_DECL DECL_MODE (exp) == BLKmode)
+GET_MODE (decl_rtl) != DECL_MODE (exp))
... though I don't see the need for a RESULT_DECL check. If GET_MODE(exp)
is BLKmode, then the code inside the if never will do anything sane
(promote_function_mode and promote_decl_mode will return BLKmode). And
you miss a ChangeLog entry for this hunk.
After these two changes I would have had to split out the expand_return
code to make progress, and stopped poking at it :) So, I think your
approach makes sense.
Ciao,
Michael.
Re: [PATCH][ARM] Generic tuning
On 27/08/11 13:48, Andrew Stubbs wrote: On 26/08/11 17:18, Joseph S. Myers wrote: Again, arm-tables.opt is generated - so the log entry should just be * config/arm/arm-tables.opt: Regenerate. and the file should be what you get from regeneration. Changelog entry updated. The file was already correct. OK? OK. R. Andrew tune-generic.patch 2011-08-27 Andrew Stubbs a...@codesourcery.com gcc/ * config/arm/arm-cores.def (generic-armv7-a): New architecture. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm-tune.md: Regenerate. * config/arm/arm.c (arm_file_start): Output .arch directive when user passes -mcpu=generic-*. (arm_issue_rate): Add genericv7a support. * config/arm/arm.h (EXTRA_SPECS): Add asm_cpu_spec. (ASM_CPU_SPEC): New define. * config/arm/elf.h (ASM_SPEC): Use %(asm_cpu_spec). * config/arm/semi.h (ASM_SPEC): Likewise. * doc/invoke.texi (ARM Options): Document -mcpu=generic-* and -mtune=generic-*.
Re: Add unwind information to mips epilogues
On 09/08/2011 03:08 PM, Richard Sandiford wrote:
Bernd Schmidt ber...@codesourcery.com writes:
@@ -10227,17 +10236,30 @@ mips_expand_prologue (void)
emit_insn (gen_blockage ());
}
-/* Emit instructions to restore register REG from slot MEM. */
+/* Emit instructions to restore register REG from slot MEM. Also update
+ the cfa_restores list. */
static void
mips_restore_reg (rtx reg, rtx mem)
{
+ rtx orig_reg = reg;
+ rtx last;
+
/* There's no MIPS16 instruction to load $31 directly. Load into
$7 instead and adjust the return insn appropriately. */
if (TARGET_MIPS16 REGNO (reg) == RETURN_ADDR_REGNUM)
reg = gen_rtx_REG (GET_MODE (reg), GP_REG_FIRST + 7);
mips_emit_save_slot_move (reg, mem, MIPS_EPILOGUE_TEMP (GET_MODE (reg)));
+ if (reg == orig_reg)
+cfa_restores = alloc_reg_note (REG_CFA_RESTORE, reg, cfa_restores);
+
+ if (!frame_pointer_needed || REGNO (reg) != HARD_FRAME_POINTER_REGNUM)
+return;
+ last = get_last_insn ();
+ add_reg_note (last, REG_CFA_DEF_CFA, plus_constant (stack_pointer_rtx,
+ cfa_sp_offset));
+ RTX_FRAME_RELATED_P (last) = 1;
I suppose I still don't get why this is OK but this:
@@ -10324,12 +10350,26 @@ mips_expand_epilogue (bool sibcall_p)
if (!TARGET_MIPS16)
target = stack_pointer_rtx;
- emit_insn (gen_add3_insn (target, base, adjust));
+ insn = emit_insn (gen_add3_insn (target, base, adjust));
+ if (!frame_pointer_needed target == stack_pointer_rtx)
+{
+ RTX_FRAME_RELATED_P (insn) = 1;
+ add_reg_note (insn, REG_CFA_DEF_CFA,
+plus_constant (stack_pointer_rtx, step2));
+}
triggered ICEs without the !frame_pointer_required. I think I need
to play around with it a bit before I understand enough to review.
I'll try to find time this weekend.
I'd be curious to understand in what situation the second hunk causes
failures without frame_pointer_required. But as I'm supposed to be on
holiday atm I can't spend any real time on it til I get back. ;-)
That said, the first hunk causes the CFA to get swapped back to the
stack pointer on the very insn that restores the frame pointer.
Which to me looks to do the right thing in all situations. Is there
a different window you are worried about?
r~
Re: [Patch, fortran] [0/4] gfc_ss structs initialization small refactoring
On Tuesday 06 September 2011 09:23:11 Tobias Burnus wrote: http://gcc.gnu.org/ml/fortran/2011-08/threads.html#00264 Mikael Morin wrote: the 4 follow-up patches try to refactor some common code initializing gfc_ss structs. Regression-tested (the 4 patches together only) on x86_64-freebsd8.2. OK for trunk? The patch set is OK. I think it is a nice clean up and might prevent future bugs due to incomplete initialization. Sorry for the slow review. Tobias Committed. 1/4: revision 178695 2/4: revision 178696 3/4: revision 178697 4/4: revision 178698 Thanks for the review! Mikael.
Re: [PATCH] PR c++/33255 - Support -Wunused-local-typedefs warning
On Wed, Sep 7, 2011 at 12:57 PM, Dodji Seketeli do...@redhat.com wrote: Jason Merrill ja...@redhat.com writes: On 09/07/2011 02:01 PM, Dodji Seketeli wrote: + /* Process declarations and variables for C compiler. Blank line at the top of the file? Oops, I noticed it and changed it in the aggregated patch I sent, but forgot to update the diff against the previous. Sorry for that. Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 @@ -8328,7 +8329,8 @@ finish_function (void) if (!decl_function_context (fndecl)) undef_nested_function = false; - cfun-language = NULL; + if (cfun-language != NULL) + ggc_free (cfun-language); You'll still want to set it to NULL after freeing it. Fixed. OK with those changes. Thanks. Here is the patch I will commit in a short while. gcc/ * c-decl.c (lookup_name): Use the new maybe_record_typedef_use. (pushdecl): Use the new record_locally_defined_typedef. (store_parm_decls): Allocate cfun-language. (finish_function): Use the new maybe_warn_unused_local_typedefs, and free cfun-language. (c_push_function_context): Allocate cfun-language here only if needed. (c_pop_function_context): Likewise, mark cfun-language for collection only when it should be done. * c-common.c (handle_used_attribute): Don't ignore TYPE_DECL nodes. * c-typeck.c (c_expr_sizeof_type, c_cast_expr): Use the new maybe_record_local_typedef_use. gcc/c-family * c-common.h (struct c_language_function::local_typedefs): New field. (record_locally_defined_typedef, maybe_record_typedef_use) (maybe_warn_unused_local_typedefs): Declare new functions. * c-common.c (record_locally_defined_typedef) (maybe_record_typedef_use) (maybe_warn_unused_local_typedefs): Define new functions. * c.opt: Declare new -Wunused-local-typedefs flag. gcc/cp * name-lookup.c (pushdecl_maybe_friend_1): Use the new record_locally_defined_typedef. * decl.c (finish_function): Use the new maybe_warn_unused_local_typedefs. (grokfield): Use the new record_locally_defined_typedef. * parser.c (lookup_name): Use the new maybe_record_typedef_use. gcc/doc/ * invoke.texi: Update documentation for -Wunused-local-typedefs. gcc/testsuite/ * g++.dg/warn/Wunused-local-typedefs.C: New test file. * c-c++-common/Wunused-local-typedefs.c: Likewise. libstdc++-v3/ * include/ext/bitmap_allocator.h (__detail::__mini_vector::__lower_bound): Remove unused typedef. * src/istream.cc (std::operator(basic_istreamchar __in, basic_stringchar __str)): Likewise. (std::getline): Likewise. * src/valarray.cc (__valarray_product): Likewise. This may have caused: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50332 -- H.J.
Re: [PATCH, ARM] Unaligned accesses for packed structures [1/2]
On 26/08/11 17:39, Julian Brown wrote: On Thu, 25 Aug 2011 18:31:21 +0100 Julian Brown jul...@codesourcery.com wrote: On Thu, 25 Aug 2011 16:46:50 +0100 Julian Brown jul...@codesourcery.com wrote: So, OK to apply this version, assuming testing comes out OK? (And the followup patch [2/2], which remains unchanged?) FWIW, all tests pass, apart from gcc.target/arm/volatile-bitfields-3.c, which regresses. The output contains: ldrhr0, [r3, #2]@ unaligned I believe that, to conform to the ARM EABI, that GCC must use an (aligned) ldr in this case. Is that correct? If so, it looks like the middle-end bitfield code does not take the setting of -fstrict-volatile-bitfields into account. This version fixes the last issue, by adding additional checks for volatile accesses/-fstrict-volatile-bitfields. Tests now show no regressions. OK to apply? + /* On big-endian machines, we count bits from the most significant. +If the bit field insn does not, we must invert. */ It sounds to me like this comment is somewhat out of date now that we have BITS_BIG_ENDIAN; it would be better re-worded to reflect the code as it stands now. Other than that, OK. R. Thanks, Julian ChangeLog gcc/ * config/arm/arm.c (arm_override_options): Add unaligned_access support. (arm_file_start): Emit attribute for unaligned access as appropriate. * config/arm/arm.md (UNSPEC_UNALIGNED_LOAD) (UNSPEC_UNALIGNED_STORE): Add constants for unspecs. (insv, extzv): Add unaligned-access support. (extv): Change to expander. Likewise. (extzv_t1, extv_regsi): Add helpers. (unaligned_loadsi, unaligned_loadhis, unaligned_loadhiu) (unaligned_storesi, unaligned_storehi): New. (*extv_reg): New (previous extv implementation). * config/arm/arm.opt (munaligned_access): Add option. * config/arm/constraints.md (Uw): New constraint. * expmed.c (store_bit_field_1): Adjust bitfield numbering according to size of access, not size of unit, when BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. Don't use bitfield accesses for volatile accesses when -fstrict-volatile-bitfields is in effect. (extract_bit_field_1): Likewise.
Re: PR middle-end/48660: Assigning to BLKmode RESULT_DECL
Michael Matz m...@suse.de writes:
if (TREE_CODE (from) == CALL_EXPR ! aggregate_value_p (from, from)
COMPLETE_TYPE_P (TREE_TYPE (from))
TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
! (((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
REG_P (DECL_RTL (to)))
|| TREE_CODE (to) == SSA_NAME))
{
rtx value;
push_temp_slots ();
value = expand_normal (from);
if (to_rtx == 0)
to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
block of expand_assignment, but I think the REG_P exclusion that applies
to VAR_DECLs and PARM_DECLs also applies to RESULT_DECLs.
Right, when I saw your conversation on IRC that was also my first
reaction. My second was similar to this hunk ...
@@ -8950,10 +9061,15 @@ expand_expr_real_1 (tree exp, rtx target
return temp;
}
- /* If the mode of DECL_RTL does not match that of the decl, it
- must be a promoted value. We return a SUBREG of the wanted mode,
- but mark it so that we know that it was already extended. */
- if (REG_P (decl_rtl) GET_MODE (decl_rtl) != DECL_MODE (exp))
+ /* If the mode of DECL_RTL does not match that of the decl,
+ there are two cases: we are dealing with a BLKmode value
+ that is returned in a register, or we are dealing with
+ a promoted value. In the latter case, return a SUBREG
+ of the wanted mode, but mark it so that we know that it
+ was already extended. */
+ if (REG_P (decl_rtl)
+ !(code == RESULT_DECL DECL_MODE (exp) == BLKmode)
+ GET_MODE (decl_rtl) != DECL_MODE (exp))
... though I don't see the need for a RESULT_DECL check. If GET_MODE(exp)
is BLKmode, then the code inside the if never will do anything sane
(promote_function_mode and promote_decl_mode will return BLKmode).
Yeah, it was just a way of making sure that we continue to ICE when we
have this mismatch outside a RESULT_DECL (which should never happen).
I'm happy to take the code check out if that seems better though.
And you miss a ChangeLog entry for this hunk.
Oops, yes.
After these two changes I would have had to split out the expand_return
code to make progress, and stopped poking at it :) So, I think your
approach makes sense.
Thanks.
Richard
Re: Add unwind information to mips epilogues
Richard Henderson r...@redhat.com writes:
On 09/08/2011 03:08 PM, Richard Sandiford wrote:
Bernd Schmidt ber...@codesourcery.com writes:
@@ -10227,17 +10236,30 @@ mips_expand_prologue (void)
emit_insn (gen_blockage ());
}
-/* Emit instructions to restore register REG from slot MEM. */
+/* Emit instructions to restore register REG from slot MEM. Also update
+ the cfa_restores list. */
static void
mips_restore_reg (rtx reg, rtx mem)
{
+ rtx orig_reg = reg;
+ rtx last;
+
/* There's no MIPS16 instruction to load $31 directly. Load into
$7 instead and adjust the return insn appropriately. */
if (TARGET_MIPS16 REGNO (reg) == RETURN_ADDR_REGNUM)
reg = gen_rtx_REG (GET_MODE (reg), GP_REG_FIRST + 7);
mips_emit_save_slot_move (reg, mem, MIPS_EPILOGUE_TEMP (GET_MODE (reg)));
+ if (reg == orig_reg)
+cfa_restores = alloc_reg_note (REG_CFA_RESTORE, reg, cfa_restores);
+
+ if (!frame_pointer_needed || REGNO (reg) != HARD_FRAME_POINTER_REGNUM)
+return;
+ last = get_last_insn ();
+ add_reg_note (last, REG_CFA_DEF_CFA, plus_constant (stack_pointer_rtx,
+ cfa_sp_offset));
+ RTX_FRAME_RELATED_P (last) = 1;
I suppose I still don't get why this is OK but this:
@@ -10324,12 +10350,26 @@ mips_expand_epilogue (bool sibcall_p)
if (!TARGET_MIPS16)
target = stack_pointer_rtx;
- emit_insn (gen_add3_insn (target, base, adjust));
+ insn = emit_insn (gen_add3_insn (target, base, adjust));
+ if (!frame_pointer_needed target == stack_pointer_rtx)
+ {
+ RTX_FRAME_RELATED_P (insn) = 1;
+ add_reg_note (insn, REG_CFA_DEF_CFA,
+ plus_constant (stack_pointer_rtx, step2));
+ }
triggered ICEs without the !frame_pointer_required. I think I need
to play around with it a bit before I understand enough to review.
I'll try to find time this weekend.
I'd be curious to understand in what situation the second hunk causes
failures without frame_pointer_required. But as I'm supposed to be on
holiday atm I can't spend any real time on it til I get back. ;-)
That said, the first hunk causes the CFA to get swapped back to the
stack pointer on the very insn that restores the frame pointer.
Which to me looks to do the right thing in all situations. Is there
a different window you are worried about?
Nah, nothing like that. I agree the new patch is setting the CFA at the
right time. It's just that if those !frame_pointer_needed tests are
needed to avoid ICEs, then it feels like there's still some magic that
I don't understand.
(I'm not saying the checks should be removed from the new patch --
at best it would achieve nothing, and at worst it would bloat the
dwarf2 output. I'm just curious.)
Richard
Re: Vector Comparison patch
On Thu, Sep 8, 2011 at 2:41 PM, Richard Guenther
richard.guent...@gmail.com wrote:
All the rest is adjusted in the new version of the patch you can find
in the attachment.
ChangLog
20011-09-06 Artjoms Sinkarovs artyom.shinkar...@gmail.com
gcc/
* expr.c (do_store_flag): Expand vector comparison by
building an appropriate VEC_COND_EXPR.
* c-typeck.c (build_binary_op): Typecheck vector comparisons.
(c_objc_common_truthvalue_conversion): Adjust.
* tree-vect-generic.c (do_compare): Helper function.
(expand_vector_comparison): Check if hardware supports
vector comparison of the given type or expand vector
piecewise.
(expand_vector_operation): Treat comparison as binary
operation of vector type.
(expand_vector_operations_1): Adjust.
gcc/config/i386
* i386.c (ix86_expand_sse_movcc): Consider a case when
vcond operators are {-1,..} and {0,..}.
gcc/doc
* extend.texi: Adjust.
gcc/testsuite
* gcc.c-torture/execute/vector-compare-1.c: New test.
* gcc.c-torture/execute/vector-compare-2.c: New test.
* gcc.dg/vector-compare-1.c: New test.
* gcc.dg/vector-compare-2.c: New test.
bootstrapped and tested on x86_64-unknown-linux-gnu.
The x86 part is OK.
Thanks,
Uros.
Re: RFA: MN10300: Fix splitting AND insns
This is fine after adding a function comment for
mn10300_split_and_operand_count; it appears rth forgot it and documenting how
the sign of the return value is used would make this easier to understand.
- Original Message -
From: Nick Clifton ni...@redhat.com
To: l...@redhat.com, aol...@redhat.com
Cc: gcc-patches@gcc.gnu.org
Sent: Wednesday, September 7, 2011 10:08:48 AM
Subject: RFA: MN10300: Fix splitting AND insns
Hi Jeff, Hi Alex,
I have finally tracked down a bug in the MN10300 backend which has
been causing all kinds of weird behaviour in generated code. The
problem was that the pattern to split an AND insn into two shift insns
was using a left shift followed by a right shift to clear bits at the
*bottom* of a word...
It turns out that this was because of the mn10300_split_and_operand_count
function which was returning a negative value for both clears at the
top of the word and at the bottom. Once I had found this the fix was
easy, and with the patch below applied I now have 28 fewer GCC
testsuite failures, 7 fewer G++ testsuite failures and no
regressions.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2011-09-07 Nick Clifton ni...@redhat.com
* config/mn10300/mn10300.c (mn10300_split_and_operand_count):
Return a positive value to indicate that the bits at the
bottom of the register should be cleared.
Index: gcc/config/mn10300/mn10300.c
===
--- gcc/config/mn10300/mn10300.c(revision 178626)
+++ gcc/config/mn10300/mn10300.c(working copy)
@@ -2894,7 +2894,7 @@
would be replacing 1 6-byte insn with 2 3-byte insns. */
if (count (optimize_insn_for_speed_p () ? 2 : 4))
return 0;
- return -count;
+ return count;
}
else
{
Re: [Patch, testsuite] fix target/PR49614
On Sep 8, 2011, at 1:19 AM, Iain Sandoe wrote: gcc.dg/vmx/gcc-bug-i.c is failing for powerpc*-*-* with: Excess errors: /opt/gcc/work/gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c:16:22: warning: always_inline function might not be inlinable [-Wattributes] this is because the function in question is declared: static DO_INLINE int inline_me(vector signed short data) ; where: #define DO_INLINE __attribute__ ((always_inline)) so, unless __attribute__ ((always_inline)) is intended to imply inline, the fix below is proposed, OK for trunk? I'd like an inline person to comment on this.
[Patch,AVR]: Fix PR 43746
This patch adds support for named progmem sections.
The problem with the current implementation is that all progmem stuff is put
into .progmem.data and thus no -gc-sections will have effect or constant
merging cannot merge constants/strings in progmem.
This patch avoids the hard coded .progmem.data section attribute in
avr_insert_attributes. Instead, it uses avr_asm_named_section and
avr_asm_select_section to choose the right section resp. to add the correct
section prefix for progmem data.
Tested without regressions.
Initially I intended to add a -fprogmem-sections command line option that works
similar but independent to -fdata-section. That way data sections could be
used and strings in progmem merged. However, I did not find a straight forward
way without cluttering avr BE with lots of code from varasm.c. Thus, for now,
there is no -fprogmem-sections, i.e. progmem-sections are in sync with
data-sections.
Ok to install?
gcc/
PR target/43746
* config/avr/avr.c (AVR_SECTION_PROGMEM): New Define.
(progmem_section): New Variable.
(avr_asm_init_sections): Initialize it.
(TARGET_ASM_SELECT_SECTION): Define to...
(avr_asm_select_section): ... this new Function.
(avr_replace_prefix): New Function.
(avr_asm_function_rodata_section): Use it.
(avr_insert_attributes): Don't add section attribute for PROGMEM.
(avr_section_type_flags): Use avr_progmem_p instead of section
name to detect if object is in PROGMEM.
(avr_asm_named_section): Set section name prefix for objects in
PROGMEM.
testsuite/
* testsuite/gcc.target/avr/torture/avr-torture.exp
(AVR_TORTURE_OPTIONS): Add test cases -O2 -fdata-sections and
-O2 -fmerge-all-constants.
Index: config/avr/avr.c
===
--- config/avr/avr.c (revision 178528)
+++ config/avr/avr.c (working copy)
@@ -54,6 +54,8 @@
/* Return true if STR starts with PREFIX and false, otherwise. */
#define STR_PREFIX_P(STR,PREFIX) (0 == strncmp (STR, PREFIX, strlen (PREFIX)))
+#define AVR_SECTION_PROGMEM (SECTION_MACH_DEP 0)
+
static void avr_option_override (void);
static int avr_naked_function_p (tree);
static int interrupt_function_p (tree);
@@ -114,6 +116,7 @@ static bool avr_function_ok_for_sibcall
static void avr_asm_named_section (const char *name, unsigned int flags, tree decl);
static void avr_encode_section_info (tree, rtx, int);
static section* avr_asm_function_rodata_section (tree);
+static section* avr_asm_select_section (tree, int, unsigned HOST_WIDE_INT);
/* Allocate registers from r25 to r8 for parameters for function calls. */
#define FIRST_CUM_REG 26
@@ -139,6 +142,9 @@ const struct mcu_type_s *avr_current_dev
/* Section to put switch tables in. */
static GTY(()) section *progmem_swtable_section;
+/* Unnamed section associated to __attribute__((progmem)) aka. PROGMEM. */
+static GTY(()) section *progmem_section;
+
/* To track if code will use .bss and/or .data. */
bool avr_need_clear_bss_p = false;
bool avr_need_copy_data_p = false;
@@ -206,6 +212,8 @@ static const struct attribute_spec avr_a
#define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections
#undef TARGET_ENCODE_SECTION_INFO
#define TARGET_ENCODE_SECTION_INFO avr_encode_section_info
+#undef TARGET_ASM_SELECT_SECTION
+#define TARGET_ASM_SELECT_SECTION avr_asm_select_section
#undef TARGET_REGISTER_MOVE_COST
#define TARGET_REGISTER_MOVE_COST avr_register_move_cost
@@ -270,6 +278,31 @@ static const struct attribute_spec avr_a
struct gcc_target targetm = TARGET_INITIALIZER;
+
+/* Custom function to replace string prefix.
+
+ Return a ggc-allocated string with strlen (OLD_PREFIX) characters removed
+ from the start of OLD_STR and then prepended with NEW_PREFIX. */
+
+static inline const char*
+avr_replace_prefix (const char *old_str,
+const char *old_prefix, const char *new_prefix)
+{
+ char *new_str;
+ size_t len = strlen (old_str) + strlen (new_prefix) - strlen (old_prefix);
+
+ gcc_assert (strlen (old_prefix) = strlen (old_str));
+
+ /* Unfortunately, ggc_alloc_string returns a const char* and thus cannot be
+ used here. */
+
+ new_str = (char*) ggc_alloc_atomic (1 + len);
+
+ strcat (stpcpy (new_str, new_prefix), old_str + strlen (old_prefix));
+
+ return (const char*) new_str;
+}
+
static void
avr_option_override (void)
{
@@ -5034,15 +5067,7 @@ avr_insert_attributes (tree node, tree *
if (error_mark_node == node0)
return;
- if (TYPE_READONLY (node0))
-{
- static const char dsec[] = .progmem.data;
-
- *attributes = tree_cons (get_identifier (section),
- build_tree_list (NULL, build_string (strlen (dsec), dsec)),
- *attributes);
-}
- else
+ if (!TYPE_READONLY (node0))
{
error (variable
Re: [v3] constexpr tuple
On 8 Sep 2011, at 18:34, Paolo Carlini wrote:
On 09/07/2011 07:44 AM, Daniel Krügler wrote:
Is tuple_cat now considered conforming?
No, see:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50159
By the way, Daniel, I was considering giving that issue a try, if you have
tips (or even more ;) about the implementation of the C++11 conforming
tuple_cat, I'm all ears…
This might be totally insane, but I believe that:
tuple_cat(tuple_cat(A,B), C) always equivalent to tuple_cat(A,B,C);
Therefore, how close would something like (warning, not even compiled)
templateclass _Tuple1, class _Tuple2, class… _Tuples
auto
tuple_cat(_Tuple1 __t1, _Tuple2 __t2, _Tuples… __tuples)
- tuple_cat(tuple_cat(std::forward_Tuple1(__t1),
std::forward_Tuple2(__t2)),
std::forward_Tuples(__tuples)…)
{ tuple_cat(tuple_cat(std::forward_Tuple1(__t1),
std::forward_Tuple2(__t2)),
std::forward_Tuples(__tuples)…); }
I imagine that first return type unfortunately isn't valid, but it shouldn't be
hard to glue together the list of template arguments.
Chris
[PATCH, i386]: Implement AVX2 all-ones load using vpcmpeqd insn
Hello!
2011-09-08 Uros Bizjak ubiz...@gmail.com
* config/i386/i386.c (standard_sse_constant_p): Handle AVX2 modes.
(standard_sse_constant_opcode) case 2: Change vpcmpeqd template.
testsuite/ChangeLog:
2011-09-08 Uros Bizjak ubiz...@gmail.com
* gcc.target/i386/all_one_m256i.c: New test.
Tested on x86_64-pc-linux-gnu {,-m32}, committed to mainline SVN.
Uros.
Index: config/i386/i386.c
===
--- config/i386/i386.c (revision 178695)
+++ config/i386/i386.c (working copy)
@@ -8176,7 +8176,7 @@ standard_80387_constant_rtx (int idx)
}
/* Return 1 if X is all 0s and 2 if x is all 1s
- in supported SSE vector mode. */
+ in supported SSE/AVX vector mode. */
int
standard_sse_constant_p (rtx x)
@@ -8194,6 +8194,12 @@ standard_sse_constant_p (rtx x)
case V2DImode:
if (TARGET_SSE2)
return 2;
+ case V32QImode:
+ case V16HImode:
+ case V8SImode:
+ case V4DImode:
+ if (TARGET_AVX2)
+ return 2;
default:
break;
}
@@ -8235,7 +8241,8 @@ standard_sse_constant_opcode (rtx insn, rtx x)
}
case 2:
- return %vpcmpeqd\t%0, %d0;
+ return %vpcmpeqd\t%0, %0, %0;
+
default:
break;
}
Index: testsuite/gcc.target/i386/all_one_m256i.c
===
--- testsuite/gcc.target/i386/all_one_m256i.c (revision 0)
+++ testsuite/gcc.target/i386/all_one_m256i.c (revision 0)
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options -O2 -mavx2 } */
+
+typedef long long __m256i __attribute__ ((__vector_size__ (32)));
+typedef int __v8si __attribute__ ((__vector_size__ (32)));
+
+__m256i foo ()
+{
+ __m256i minus_1 = (__m256i) (__v8si) { -1, -1, -1, -1, -1, -1, -1, -1 };
+
+ return minus_1;
+}
+
+/* { dg-final { scan-assembler vpcmpeqd } } */
Re: [PATCH, i386]: Implement AVX2 all-ones load using vpcmpeqd insn
On Thu, Sep 8, 2011 at 8:26 PM, Uros Bizjak ubiz...@gmail.com wrote:
Hello!
2011-09-08 Uros Bizjak ubiz...@gmail.com
* config/i386/i386.c (standard_sse_constant_p): Handle AVX2 modes.
(standard_sse_constant_opcode) case 2: Change vpcmpeqd template.
testsuite/ChangeLog:
2011-09-08 Uros Bizjak ubiz...@gmail.com
* gcc.target/i386/all_one_m256i.c: New test.
Tested on x86_64-pc-linux-gnu {,-m32}, committed to mainline SVN.
The sse_constant_opcode_p part of the patch should in fact read:
case 2:
if (TARGET_AVX)
return vpcmpeqd\t%0, %0, %0;
else
return pcmpeqd\t%0
Uros.
[pph] Fix token dumping within a window (issue4991046)
When dumping a range of tokens, I was not properly counting the tokens
to be dumped, which resulted in empty output when dumping a range
of tokens in the middle of a large array.
I also reduced the size of the window to print. It was too large to
be useful.
Tested on x86_64. Committed to branch.
Diego.
* parser.c (cp_lexer_dump_tokens): Properly count number of printed
tokens to know when to stop.
(cp_debug_parser): Reduce token window size to 20.
diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c
index 700ca64..a46edba 100644
--- a/gcc/cp/parser.c
+++ b/gcc/cp/parser.c
@@ -259,7 +259,7 @@ cp_lexer_dump_tokens (FILE *file, VEC(cp_token,gc) *buffer,
cp_token *start_token, unsigned num,
cp_token *curr_token)
{
- unsigned i;
+ unsigned i, nprinted;
cp_token *token;
bool do_print;
@@ -281,7 +281,8 @@ cp_lexer_dump_tokens (FILE *file, VEC(cp_token,gc) *buffer,
}
do_print = false;
- for (i = 0; VEC_iterate (cp_token, buffer, i, token) i num; i++)
+ nprinted = 0;
+ for (i = 0; VEC_iterate (cp_token, buffer, i, token) nprinted num; i++)
{
if (token == start_token)
do_print = true;
@@ -289,6 +290,7 @@ cp_lexer_dump_tokens (FILE *file, VEC(cp_token,gc) *buffer,
if (!do_print)
continue;
+ nprinted++;
if (token == curr_token)
fprintf (file, [[);
@@ -462,7 +464,7 @@ cp_debug_parser_tokens (FILE *file, cp_parser *parser, int
window_size)
void
cp_debug_parser (FILE *file, cp_parser *parser)
{
- const size_t window_size = 200;
+ const size_t window_size = 20;
if (file == NULL)
file = stderr;
--
This patch is available for review at http://codereview.appspot.com/4991046
Re: [PATCH] check_cfg assert fix
On 09/06/11 23:56, Maxim Kuvyrkov wrote: I agree. I would rather remove the entirety of haifa-sched.c: check_cfg(); scheduler is not the right place for checking consistency of CFG. Check_cfg() was useful for debugging scheduler patches, but now it is more of maintainance overhead. Do I have a second vote for removal of check_cfg()? I'd be OK with that. Saves me some time adapting it to some scheduler patches I'll be submitting soon... Bernd
Re: [v3] constexpr tuple
On Thu, 8 Sep 2011, Christopher Jefferson wrote: This might be totally insane, but I believe that: tuple_cat(tuple_cat(A,B), C) always equivalent to tuple_cat(A,B,C); That's a fine way to find the return type, but for code, doesn't it generate many copies? I think I'd forward_as_tuple and use some magic indices to extract everything at once. -- Marc Glisse
[commit] Fix PR50318 - ICE optimizing widening multiply-and-accumulate
This patch fixes PR50318 in which the compiler fails with a bad gimple
expression.
The problem was caused by a cut-and-paste error. I don't understand why
it wasn't caught in testing, but it's fixed now.
Committed as obvious.
Andrew
2011-09-08 Andrew Stubbs a...@codesourcery.com
PR tree-optimization/50318
gcc/
* tree-ssa-math-opts.c (convert_plusminus_to_widen): Correct
typo in use of mult_rhs1 and mult_rhs2.
gcc/testsuite/
* gcc.target/arm/pr50318-1.c: New file.
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr50318-1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options -O2 } */
+/* { dg-require-effective-target arm_dsp } */
+
+long long test (unsigned int sec, unsigned long long nsecs)
+{
+ return (long long)(long)sec * 10L + (long long)(unsigned
+ long)nsecs;
+}
+
+/* { dg-final { scan-assembler umlal } } */
--- a/gcc/tree-ssa-math-opts.c
+++ b/gcc/tree-ssa-math-opts.c
@@ -2386,9 +2386,9 @@ convert_plusminus_to_widen (gimple_stmt_iterator *gsi, gimple stmt,
/* Handle constants. */
if (TREE_CODE (mult_rhs1) == INTEGER_CST)
-rhs1 = fold_convert (type1, mult_rhs1);
+mult_rhs1 = fold_convert (type1, mult_rhs1);
if (TREE_CODE (mult_rhs2) == INTEGER_CST)
-rhs2 = fold_convert (type2, mult_rhs2);
+mult_rhs2 = fold_convert (type2, mult_rhs2);
gimple_assign_set_rhs_with_ops_1 (gsi, wmult_code, mult_rhs1, mult_rhs2,
add_rhs);
[cxx-mem-model] merge from trunk @ 178608
Nothing to report. I fixed the minor hiccups in previous patches. Bootstrapped and regtested.
[PATCH] Fix PR c/50332 (FAIL: gcc.dg/attr-invalid.c)
Hello,
To support -Wunused-local-typedefs we mark used typedef decls as being
used. Logically, __attribute__((used)) is no more ignored on typedef
decls. I forgot to adjust the relevant test of the test suite. My
testing should have caught that, but it somehow felt below my radar.
Sorry for that.
Tested against trunk on x86_64-unknown-linux-gnu.
From: Dodji Seketeli do...@redhat.com
Date: Thu, 8 Sep 2011 21:52:16 +0200
Subject: [PATCH] Fix PR c/50332
gcc/testsuite/
* gcc.dg/attr-invalid.c: Adjust as __attribute__((used) is no more
ignored on typedefs.
---
gcc/testsuite/gcc.dg/attr-invalid.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/attr-invalid.c
b/gcc/testsuite/gcc.dg/attr-invalid.c
index 6568c1a..cca82aa 100644
--- a/gcc/testsuite/gcc.dg/attr-invalid.c
+++ b/gcc/testsuite/gcc.dg/attr-invalid.c
@@ -35,9 +35,11 @@ int ATSYM(fn_vars) (void) {
#undef AT
#define AT used
-typedef int ATSYM(type) ATTR; /* { dg-warning attribute ignored } */
+typedef int ATSYM(type) ATTR; /* used attribute is no more
+ignored. */
-typedef int (*ATSYM(fntype))(void) ATTR; /* { dg-warning attribute ignored
} */
+typedef int (*ATSYM(fntype))(void) ATTR; /* used attribute is no more
+ ignored. */
struct ATSYM(struct) {
char dummy ATTR; /* { dg-warning attribute ignored } */
--
Dodji
Re: [PATCH] PR c++/33255 - Support -Wunused-local-typedefs warning
Jason Merrill ja...@redhat.com writes:
I think -Wunused and -Wall should imply -Wunused-local-typedefs unless
the user specifies -Wno-unused-local-typedefs.
Dodji Seketeli do...@redhat.com writes:
I actually first tried this (actually adding it to -Wall -extra and
-Wunused) and found out the following issue.
A typedef can be defined in a macro in a system header, be expanded in
a function and not be used by the function. In this case we shouldn't
warn, but PR preprocessor/7263 makes us warn nonetheless. There are
many spots of that kind in the libstdc++ test suite.
Jason Merrill ja...@redhat.com writes:
Does your set of linemap patches fix the issue? In that case, we can
add it when those go in. Speaking of which, sorry I haven't found the
time to review them yet.
So, in prevision of when the patch for PR preprocessor/7263 goes in, I
am proposing this patchlet that turns on -Wunused-local-typedefs
whenever -Wunused (and so -Wall) is turned on.
I have tested it on a synthetic tree made of my current patch series for
PR preprocessor/7263, and trunk that contains -Wunused-local-typedefs
support.
Is this be OK for trunk when PR preprocessor/7263 gets in, assuming it
passes bootstrap and tests on trunk at that moment?
Thanks.
Enable -Wunused-local-typedefs when -Wall or -Wunused
gcc/
* opts.c (finish_options): Activate -Wunused-local-typedefs if
-Wunused is activated.
* doc/invoke.texi: Update blurb of -Wunused-local-typedefs.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 3aa9611..5f4afe3 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -3505,6 +3505,7 @@ To suppress this warning use the @samp{unused} attribute
@item -Wunused-local-typedefs @r{(C, Objective-C, C++ and Objective-C++ only)}
@opindex Wunused-local-typedefs
Warn when a typedef locally defined in a function is not used.
+This warning is enabled by @option{-Wall}.
@item -Wunused-parameter
@opindex Wunused-parameter
diff --git a/gcc/opts.c b/gcc/opts.c
index 5d5bcb9..ebb99d0 100644
--- a/gcc/opts.c
+++ b/gcc/opts.c
@@ -830,6 +830,10 @@ finish_options (struct gcc_options *opts, struct
gcc_options *opts_set,
if (opts-x_warn_unused_value == -1)
opts-x_warn_unused_value = opts-x_warn_unused;
+ /* Wunused-local-typedefs is enabled by -Wunused or -Wall. */
+ if (opts-x_warn_unused_local_typedefs == -1)
+opts-x_warn_unused_local_typedefs = opts-x_warn_unused;
+
/* This replaces set_Wextra. */
if (opts-x_warn_uninitialized == -1)
opts-x_warn_uninitialized = opts-x_extra_warnings;
--
Dodji
Re: [PATCH] PR c++/33255 - Support -Wunused-local-typedefs warning
On 09/08/2011 04:50 PM, Dodji Seketeli wrote:
Is this be OK for trunk when PR preprocessor/7263 gets in, assuming it
passes bootstrap and tests on trunk at that moment?
Yes, except...
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -3505,6 +3505,7 @@ To suppress this warning use the @samp{unused} attribute
@item -Wunused-local-typedefs @r{(C, Objective-C, C++ and Objective-C++ only)}
@opindex Wunused-local-typedefs
Warn when a typedef locally defined in a function is not used.
+This warning is enabled by @option{-Wall}.
Don't you want to say This warning is also enabled by
@option{-Wunused}, which is enabled by @option{-Wall}.?
Jason
Re: [PATCH] Fix PR c/50332 (FAIL: gcc.dg/attr-invalid.c)
On 09/08/2011 04:38 PM, Dodji Seketeli wrote: +typedef int ATSYM(type) ATTR; /* used attribute is no more no longer OK with that change. Jason
[Ada] Fix ACATS failures on PowerPC/Linux
This fixes the 6 ACATS failures present at -O2 on PowerPC/Linux:
FAIL: cd1009a
FAIL: cd1009i
FAIL: cd1c03a
FAIL: cd2a21c
FAIL: cd2a24a
FAIL: cd2a32a
The problem is a very aggressive SCCVN pass looking through a special view
conversion we build in gigi. The optimization relies exclusively on types of
bitfields in lieu of their sizes and this doesn't play nice with this view
conversion. The patch adjusts the types so as to make the pass happy.
Tested on x86-64/Linux and PowerPC/Linux, applied on the mainline.
2011-09-08 Eric Botcazou ebotca...@adacore.com
* gcc-interface/utils.c (unchecked_convert): Use a field of the right
precision when converting to or from an integral type whose precision
is not equal to its size.
--
Eric Botcazou
Index: gcc-interface/utils.c
===
--- gcc-interface/utils.c (revision 178601)
+++ gcc-interface/utils.c (working copy)
@@ -4403,39 +4403,60 @@ unchecked_convert (tree type, tree expr,
}
/* If we are converting to an integral type whose precision is not equal
- to its size, first unchecked convert to a record that contains an
- object of the output type. Then extract the field. */
+ to its size, first unchecked convert to a record type that contains an
+ field of the given precision. Then extract the field. */
else if (INTEGRAL_TYPE_P (type)
TYPE_RM_SIZE (type)
0 != compare_tree_int (TYPE_RM_SIZE (type),
GET_MODE_BITSIZE (TYPE_MODE (type
{
tree rec_type = make_node (RECORD_TYPE);
- tree field = create_field_decl (get_identifier (OBJ), type, rec_type,
- NULL_TREE, NULL_TREE, 1, 0);
+ unsigned HOST_WIDE_INT prec = TREE_INT_CST_LOW (TYPE_RM_SIZE (type));
+ tree field_type, field;
+
+ if (TYPE_UNSIGNED (type))
+ field_type = make_unsigned_type (prec);
+ else
+ field_type = make_signed_type (prec);
+ SET_TYPE_RM_SIZE (field_type, TYPE_RM_SIZE (type));
+
+ field = create_field_decl (get_identifier (OBJ), field_type, rec_type,
+ NULL_TREE, NULL_TREE, 1, 0);
TYPE_FIELDS (rec_type) = field;
layout_type (rec_type);
expr = unchecked_convert (rec_type, expr, notrunc_p);
expr = build_component_ref (expr, NULL_TREE, field, false);
+ expr = fold_build1 (NOP_EXPR, type, expr);
}
- /* Similarly if we are converting from an integral type whose precision
- is not equal to its size. */
+ /* Similarly if we are converting from an integral type whose precision is
+ not equal to its size, first copy into a field of the given precision
+ and unchecked convert the record type. */
else if (INTEGRAL_TYPE_P (etype)
TYPE_RM_SIZE (etype)
0 != compare_tree_int (TYPE_RM_SIZE (etype),
GET_MODE_BITSIZE (TYPE_MODE (etype
{
tree rec_type = make_node (RECORD_TYPE);
- tree field = create_field_decl (get_identifier (OBJ), etype, rec_type,
- NULL_TREE, NULL_TREE, 1, 0);
+ unsigned HOST_WIDE_INT prec = TREE_INT_CST_LOW (TYPE_RM_SIZE (etype));
VEC(constructor_elt,gc) *v = VEC_alloc (constructor_elt, gc, 1);
+ tree field_type, field;
+
+ if (TYPE_UNSIGNED (etype))
+ field_type = make_unsigned_type (prec);
+ else
+ field_type = make_signed_type (prec);
+ SET_TYPE_RM_SIZE (field_type, TYPE_RM_SIZE (etype));
+
+ field = create_field_decl (get_identifier (OBJ), field_type, rec_type,
+ NULL_TREE, NULL_TREE, 1, 0);
TYPE_FIELDS (rec_type) = field;
layout_type (rec_type);
+ expr = fold_build1 (NOP_EXPR, field_type, expr);
CONSTRUCTOR_APPEND_ELT (v, field, expr);
expr = gnat_build_constructor (rec_type, v);
expr = unchecked_convert (type, expr, notrunc_p);
Re: [PATCH] Fix PR c/50332 (FAIL: gcc.dg/attr-invalid.c)
Jason Merrill ja...@redhat.com writes:
On 09/08/2011 04:38 PM, Dodji Seketeli wrote:
+typedef int ATSYM(type) ATTR; /* used attribute is no more
no longer
OK with that change.
Thanks, I am about to commit this:
commit 8c9ae9337b04d05ae89aeea0723d41119e713b41
Author: Dodji Seketeli do...@redhat.com
Date: Thu Sep 8 21:52:16 2011 +0200
Fix PR c/50332
gcc/testsuite/
* gcc.dg/attr-invalid.c: Adjust as __attribute__((used) is no
longer ignored on typedefs.
diff --git a/gcc/testsuite/gcc.dg/attr-invalid.c
b/gcc/testsuite/gcc.dg/attr-invalid.c
index 6568c1a..f2a5887 100644
--- a/gcc/testsuite/gcc.dg/attr-invalid.c
+++ b/gcc/testsuite/gcc.dg/attr-invalid.c
@@ -35,9 +35,11 @@ int ATSYM(fn_vars) (void) {
#undef AT
#define AT used
-typedef int ATSYM(type) ATTR; /* { dg-warning attribute ignored } */
+typedef int ATSYM(type) ATTR; /* used attribute is no longer
+ignored. */
-typedef int (*ATSYM(fntype))(void) ATTR; /* { dg-warning attribute ignored
} */
+typedef int (*ATSYM(fntype))(void) ATTR; /* used attribute is no
+ longer ignored. */
struct ATSYM(struct) {
char dummy ATTR; /* { dg-warning attribute ignored } */
--
Dodji
Re: [cxx-mem-model] merge from trunk @ 178608
On 09/08/2011 04:01 PM, Aldy Hernandez wrote: Nothing to report. I fixed the minor hiccups in previous patches. Bootstrapped and regtested. Sweet. Thanx. Andrew
Re: [PATCH] PR c++/33255 - Support -Wunused-local-typedefs warning
Jason Merrill ja...@redhat.com writes:
On 09/08/2011 04:50 PM, Dodji Seketeli wrote:
Is this be OK for trunk when PR preprocessor/7263 gets in, assuming it
passes bootstrap and tests on trunk at that moment?
Yes, except...
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -3505,6 +3505,7 @@ To suppress this warning use the @samp{unused}
attribute
@item -Wunused-local-typedefs @r{(C, Objective-C, C++ and Objective-C++
only)}
@opindex Wunused-local-typedefs
Warn when a typedef locally defined in a function is not used.
+This warning is enabled by @option{-Wall}.
Don't you want to say This warning is also enabled by
@option{-Wunused}, which is enabled by @option{-Wall}.?
For the sake of consistency, I followed the pattern used for the other
-Wunused-* options in that same file.
I thought I didn't have to mention that -Wunused triggers
-Wunused-local-typedefs because a bit below this, the text for -Wunused
reads:
All the above @option{-Wunused} options combined.
And before that, each relevant -Wunused-* option is said to be triggered
by -Wall, as I did.
I would also find your phrasing more logical, if it wasn't for the
consistency constraint.
--
Dodji
Re: [libiberty patch] Add demangler support for cloned function symbols (PR 40831)
Ping? http://gcc.gnu.org/ml/gcc-patches/2011-08/msg01626.html -cary include/ChangeLog: PR 40831 * demangle.h (enum demangle_component_type): Add DEMANGLE_COMPONENT_CLONE. libiberty/ChangeLog: PR 40831 * cp-demangle.c (d_make_comp): Add new component type. (cplus_demangle_mangled_name): Check for clone suffixes. (d_parmlist): Don't error out if we see '.'. (d_clone_suffix): New function. (d_print_comp): Print info for clone suffixes. * testsuite/demangle-expected: Add new testcases.
[v3] libstdc++/50336
Hi,
tested x86_64-linux, committed to mainline.
Thanks,
Paolo.
/
2011-09-09 Paolo Carlini paolo.carl...@oracle.com
PR libstdc++/50336
* include/bits/streambuf_iterator.h (class istreambuf_iterator):
Implement LWG 445 in C++0x mode.
* testsuite/24_iterators/istreambuf_iterator/requirements/dr445.cc:
New.
Index: include/bits/streambuf_iterator.h
===
--- include/bits/streambuf_iterator.h (revision 178712)
+++ include/bits/streambuf_iterator.h (working copy)
@@ -51,7 +51,13 @@
templatetypename _CharT, typename _Traits
class istreambuf_iterator
: public iteratorinput_iterator_tag, _CharT, typename _Traits::off_type,
- _CharT*, _CharT
+ _CharT*,
+#ifdef __GXX_EXPERIMENTAL_CXX0X__
+// LWG 445.
+ _CharT
+#else
+ _CharT
+#endif
{
public:
// Types:
Index: testsuite/24_iterators/istreambuf_iterator/requirements/dr445.cc
===
--- testsuite/24_iterators/istreambuf_iterator/requirements/dr445.cc
(revision 0)
+++ testsuite/24_iterators/istreambuf_iterator/requirements/dr445.cc
(revision 0)
@@ -0,0 +1,27 @@
+// { dg-options -std=gnu++0x }
+// { dg-do compile }
+
+// Copyright (C) 2011 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3. If not see
+// http://www.gnu.org/licenses/.
+
+#include type_traits
+#include iterator
+
+using namespace std;
+
+// DR 445
+static_assert(is_sameistreambuf_iteratorchar::reference, char::value, );
RE: [PATCH, testsuite] Avoid architecture options conflict for case pr42894.c
Hello,
Is it ok to commit?
BR,
Terry
-Original Message-
From: Terry Guo [mailto:terry@arm.com]
Sent: Monday, August 29, 2011 9:40 AM
To: 'gcc-patches@gcc.gnu.org'
Subject: RE: [PATCH, testsuite] Avoid architecture options conflict for
case pr42894.c
Ping.
BR,
Terry
-Original Message-
From: Terry Guo [mailto:terry@arm.com]
Sent: Thursday, August 25, 2011 7:46 PM
To: 'gcc-patches@gcc.gnu.org'
Subject: [PATCH, testsuite] Avoid architecture options conflict for
case pr42894.c
Hello,
I think it is useful to run this case for newer arm targets. So the
patch intends to skip the warning of architecture conflicts. Is it ok
to commit to trunk?
BR,
Terry
gcc/testsuite/ChangeLog:
2011-08-25 Terry Guo terry@arm.com
* gcc.dg/tls/pr42894.c: Add dg-prune-output to skip
architecture conflict.
diff --git a/gcc/testsuite/gcc.dg/tls/pr42894.c
b/gcc/testsuite/gcc.dg/tls/pr42894.c
index c3bd76c..cda6719 100644
--- a/gcc/testsuite/gcc.dg/tls/pr42894.c
+++ b/gcc/testsuite/gcc.dg/tls/pr42894.c
@@ -2,6 +2,7 @@
/* { dg-do compile } */
/* { dg-options -march=armv5te -mthumb { target arm*-*-* } } */
/* { dg-require-effective-target tls } */
+/* { dg-prune-output switch .* conflicts with } */
extern __thread int t;
[PATCH][Cilkplus] Patch to fix Template type inside cilk_for
Hello Everyone, This patch is for the Cilk Plus branch GCC C++ compiler. It will fix the following cases of cilk_for (where 'T' is a template type) _Cilk_for ( T ii = INITIAL VALUE ; ii RELATIONAL_OPERATOR END_VALUE ; ii +/-= INCREMENT/DECREMENT VALUE) statement Thanks, Balaji V. Iyer. template_cilk_for_patch Description: template_cilk_for_patch
[Patch][Master] Finish function using absolute value not #define value
Hello Everyone, In several places, I found that finish_function was using an absolute integer as input parameter instead of these #defines #define SF_DEFAULT 0 /* No flags. */ #define SF_PRE_PARSED1 /* The function declaration has already been parsed. */ #define SF_INCLASS_INLINE2 /* The function is an inline, defined in the class body. */ I have attached a patch that should fix this (for example, use SF_DEFAULT instead of '0'). It should fix the bug #47791 (http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47791) Thanks, Balaji V. Iyer. finish_function_patch Description: finish_function_patch
Re: [PATCH] PR c++/33255 - Support -Wunused-local-typedefs warning
On 09/08/2011 05:54 PM, Dodji Seketeli wrote:
Jason Merrillja...@redhat.com writes:
Don't you want to say This warning is also enabled by
@option{-Wunused}, which is enabled by @option{-Wall}.?
For the sake of consistency, I followed the pattern used for the other
-Wunused-* options in that same file.
OK.
Jason
Re: [PATCH 1/7] Linemap infrastructure for virtual locations
On 09/08/2011 06:32 AM, Dodji Seketeli wrote: I have a question about this. It seems to me that adding the whitespace there improves the consistency of the code base, and I thought that it was allowed to make those changes if there are tangent to other meaningful changes done in that area. If even that is not allowed, then does that mean that such whitespace nits in the code base can never be fixed? I am not willing to argue over that change, I am just trying to understand. I usually only fix whitespace issues when I'm already changing something else on that line; I like to keep a patch specific to what it's actually fixing. For other whitespace issues I'd put them in a separate patch. But other people may feel differently about this question. Jason
Re: [PATCH 1/7] Linemap infrastructure for virtual locations
On 09/08/2011 06:32 AM, Dodji Seketeli wrote: Below is the updated patch. OK. Jason
