Re: Do not use TYPE_CANONICAL in useless_type_conversion

[Jan Hubicka]

> There must be a reason why I allowed modes to differ there btw ;)

Thinking about it, I guess reason is that incomplete types do not have
resonable modes set, so requiring modes to match will prevent complete
and incomplete types to match.

Here is updated patch which uses the earlier mode check and adjust it
to skip modes only for incomplete types.

Bootstrapped/regtested ppc64-linux, OK?

* gimple-expr.c (useless_type_conversion_p): Do not use TYPE_CANONICAL
for defining useless conversions; make structure compatible if size
and mode are.
Index: gimple-expr.c
===
--- gimple-expr.c   (revision 228267)
+++ gimple-expr.c   (working copy)
@@ -87,15 +87,11 @@ useless_type_conversion_p (tree outer_ty
   if (inner_type == outer_type)
 return true;
 
-  /* If we know the canonical types, compare them.  */
-  if (TYPE_CANONICAL (inner_type)
-  && TYPE_CANONICAL (inner_type) == TYPE_CANONICAL (outer_type))
-return true;
-
   /* Changes in machine mode are never useless conversions unless we
  deal with aggregate types in which case we defer to later checks.  */
   if (TYPE_MODE (inner_type) != TYPE_MODE (outer_type)
-  && !AGGREGATE_TYPE_P (inner_type))
+  && (!AGGREGATE_TYPE_P (inner_type)
+ || COMPLETE_TYPE_P (outer_type)))
 return false;
 
   /* If both the inner and outer types are integral types, then the
@@ -270,12 +266,23 @@ useless_type_conversion_p (tree outer_ty
   return true;
 }
 
-  /* For aggregates we rely on TYPE_CANONICAL exclusively and require
- explicit conversions for types involving to be structurally
- compared types.  */
+  /* For aggregates compare only the size and mode.  Accesses to fields do have
+ a type information by themselves and thus we only care if we can i.e.
+ use the types in move operations.  */
   else if (AGGREGATE_TYPE_P (inner_type)
   && TREE_CODE (inner_type) == TREE_CODE (outer_type))
-return false;
+return (!TYPE_SIZE (outer_type)
+   || (TYPE_SIZE (inner_type)
+   && operand_equal_p (TYPE_SIZE (inner_type),
+   TYPE_SIZE (outer_type), 0)));
+
+  else if (TREE_CODE (inner_type) == OFFSET_TYPE
+  && TREE_CODE (inner_type) == TREE_CODE (outer_type))
+return useless_type_conversion_p (TREE_TYPE (outer_type),
+ TREE_TYPE (inner_type))
+  && useless_type_conversion_p
+   (TYPE_OFFSET_BASETYPE (outer_type),
+TYPE_OFFSET_BASETYPE (inner_type));
 
   return false;
 }

Re: [patch] libstdc++/67747 Allocate space for dirent::d_name

[Jonathan Wakely]

On 02/10/15 14:16 +0200, Florian Weimer wrote:

On 09/29/2015 01:37 PM, Jonathan Wakely wrote:

POSIX says that dirent::d_name has an unspecified length, so calls to
readdir_r must pass a buffer with enough trailing space for
{NAME_MAX}+1 characters. I wasn't doing that, which works OK on
GNU/Linux and BSD where d_name is a large array, but fails on Solaris
32-bit.

This uses pathconf to get NAME_MAX and allocates a buffer.


This still has a buffer overflow on certain file systems.

You must not use readdir_r, it is deprecated and always insecure.  We
should probably mark it as such in the glibc headers.


OK, I'll just use readdir() then. The directory stream is private to
the library type, so the only way to call readdir() concurrently on a
single directory stream is to increment iterators concurrently, which
is undefined anyway.

So that will work as long as readdir() doesn't use a global static
buffer shared between streams, i.e. it meets the POSIX requirement
that "They shall not be affected by a call to readdir() on a different
directory stream." I don't know if mingw meets that, but there is lots
of work needed to make this stuff work in mingw.


Have we already released code which uses readdir_r?


No, it's only on trunk and the gcc-5-branch, not in any release.

Re: [patch] libstdc++/67747 Allocate space for dirent::d_name

[Sebastian Huber]

On 02/10/15 14:16, Florian Weimer wrote:

On 09/29/2015 01:37 PM, Jonathan Wakely wrote:

>POSIX says that dirent::d_name has an unspecified length, so calls to
>readdir_r must pass a buffer with enough trailing space for
>{NAME_MAX}+1 characters. I wasn't doing that, which works OK on
>GNU/Linux and BSD where d_name is a large array, but fails on Solaris
>32-bit.
>
>This uses pathconf to get NAME_MAX and allocates a buffer.

This still has a buffer overflow on certain file systems.

You must not use readdir_r, it is deprecated and always insecure.  We
should probably mark it as such in the glibc headers.


The READDIR(3) man page should be updated as well, since it doesn't 
mention that readdir_r() is deprecated and always insecure.


--
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail  : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.

Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.

Re: [GCC, ARM] armv8 linux toolchain asan testcase fail due to stl missing conditional code

[Kyrill Tkachov]

On 01/10/15 21:21, Christophe Lyon wrote:

On 1 October 2015 at 11:10, Kyrill Tkachov  wrote:

On 30/09/15 17:39, Kyrill Tkachov wrote:

On 09/06/15 09:17, Kyrill Tkachov wrote:

On 05/06/15 14:14, Kyrill Tkachov wrote:

On 05/06/15 14:11, Richard Earnshaw wrote:

On 05/06/15 14:08, Kyrill Tkachov wrote:

Hi Shiva,

On 05/06/15 10:42, Shiva Chen wrote:

Hi, Kyrill

I add the testcase as stl-cond.c.

Could you help to check the testcase ?

If it's OK, Could you help me to apply the patch ?


This looks ok to me.
One nit on the testcase:

diff --git a/gcc/testsuite/gcc.target/arm/stl-cond.c
b/gcc/testsuite/gcc.target/arm/stl-cond.c
new file mode 100755
index 000..44c6249
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/stl-cond.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_ok } */
+/* { dg-options "-O2" } */

This should also have -marm as the problem exhibited itself in arm
state.
I'll commit this patch with this change in 24 hours on your behalf if
no
one
objects.


Explicit use of -marm will break multi-lib testing.  I've forgotten the
correct hook, but there's most-likely something that will give you the
right behaviour, even if it means that thumb-only multi-lib testing
skips this test.

So I think what we want is:

dg-require-effective-target arm_arm_ok

The comment in target-supports.exp is:
# Return 1 if this is an ARM target where -marm causes ARM to be
# used (not Thumb)


I've committed the attached patch to trunk on Shiva's behalf with
r224269.
It gates the test on arm_arm_ok and adds -marm, like other similar tests.
The ChangeLog I used is below:

I'd like to backport this to GCC 5 and 4.9
The patch applies and tests cleanly on GCC 5.
On 4.9 it needs some minor changes, which I'm attaching here.
I've bootstrapped and tested this patch on 4.9 and the Shiva's
original patch on GCC 5.

2015-09-30  Kyrylo Tkachov  

   Backport from mainline
   2015-06-09  Shiva Chen  

   * sync.md (atomic_load): Add conditional code for lda/ldr
   (atomic_store): Likewise.

2015-09-30  Kyrylo Tkachov  

   Backport from mainline
   2015-06-09  Shiva Chen  

   * gcc.target/arm/stl-cond.c: New test.


I'll commit them tomorrow.


I've now backported the patch to GCC 5 with r228322
and 4.9 with r228323.


Hi Kyrill,


Hi Christophe,



The backport in 4.9 causes build failures in libatomic when GCC is
configured as:
--with-cpu=cortex-a57
--with-fpu=crypto-neon-fp-armv8
--with-mode=arm
--target=arm-none-linux-gnueabihf

For instance when building store_1_.lo:
/tmp/6529147_22.tmpdir/cceUjViw.s:36: Error: bad instruction `stlneb r1,[r0]'

when building load_1_.lo:
/tmp/6529147_22.tmpdir/cchhKmHw.s:37: Error: bad instruction `ldaneb r0,[r0]'


Huh, sorry for that.
I did bootstrap 4.9 configured --with-arch=armv8-a, don't know why the failure 
didn't flare up.

I did reproduce the bad code with a custom testcase.
This patch fixes it and brings the code in line with GCC 5 and trunk.

Bootstrapped and tested on the 4.9 branch.
Committed under the fixes-the-build rule to the 4.9 branch with r228389.

Thanks,
Kyrill

2015-10-02  Kyrylo Tkachov  

* sync.md (atomic_load): Fix output modifier for lda.
(atomic_store): Likewise for stl.


Christophe.


Kyrill



Thanks,
Kyrill




2015-06-09  Shiva Chen  

* sync.md (atomic_load): Add conditional code for lda/ldr
(atomic_store): Likewise.

2015-06-09  Shiva Chen  

* gcc.target/arm/stl-cond.c: New test.


Thanks,
Kyrill


Kyrill



R.


Ramana, Richard, we need to backport it to GCC 5 as well, right?

Thanks,
Kyrill



Thanks,

Shiva

2015-06-05 16:34 GMT+08:00 Kyrill Tkachov
:

Hi Shiva,

On 05/06/15 09:29, Shiva Chen wrote:

Hi, Kyrill

I update the patch as Richard's suggestion.

-  return \"str\t%1, %0\";
+  return \"str%(%)\t%1, %0\";
   else
-  return \"stl\t%1, %0\";
+  return \"stl%?\t%1, %0\";
 }
-)
+  [(set_attr "predicable" "yes")
+   (set_attr "predicable_short_it" "no")])
+  [(set_attr "predicable" "yes")
+   (set_attr "predicable_short_it" "no")])


Let me sum up.

We add predicable attribute to allow gcc do if-conversion in
ce1/ce2/ce3 not only in final phase by final_prescan_insn finite
state
machine.

We set predicalble_short_it to "no" to restrict conditional code
generation on armv8 with thumb mode.

However, we could use the flags -mno-restrict-it to force
generating
conditional code on thumb mode.

Therefore, we have to consider the assembly output format for strb
with condition code on arm/thumb mode.

Because arm/thumb mode use different syntax for strb,
we output the assembly as str%(%)
which will put the condition code in the right place according to
TARGET_UNIFIED_ASM.

Is there still missing something ?

That's 

[SH][committed]

[Oleg Endo]

Hi,

The attached SH patch converts sequences such as:
movtr2
movtr13
into:
movtr2
mov r2,r13

This shortens the live range of the T bit register and is better for
parallel execution.  It doesn't happen often, but it's easy to avoid it.

Unfortunately I had to do this manually because cprop_hardreg gets in
the way here.  If done as a peephole2, cprop_hardreg then
unconditionally just converts it back, because it thinks that all reg
copies are equal in some way.

Tested on sh-elf with
make -k check RUNTESTFLAGS="--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"

Committed as r228386.

Cheers,
Oleg

gcc/ChangeLog:
* config/sh/sh.md: Add new unnamed split pattern to handle
movt-movt sequences.

Index: gcc/config/sh/sh.md
===
--- gcc/config/sh/sh.md	(revision 228331)
+++ gcc/config/sh/sh.md	(working copy)
@@ -14860,6 +14860,46 @@
 			  gen_rtx_REG (SImode, (REGNO (operands[1]);
 })
 
+;; This is not a peephole, but it's here because it's actually supposed
+;; to be one.  It tries to convert a sequence such as
+;;	movt	r2	->	movt	r2
+;;	movt	r13		mov	r2,r13
+;; This gives the schduler a bit more freedom to hoist a following
+;; comparison insn.  Moreover, it the reg-reg mov insn is MT group which has
+;; better chances for parallel execution.
+;; We can do this with a peephole2 pattern, but then the cprop_hardreg
+;; pass will revert the change.  See also PR 64331.
+;; Thus do it manually in one of the split passes after register allocation.
+;; Sometimes the cprop_hardreg pass might also eliminate the reg-reg copy.
+(define_split
+  [(set (match_operand:SI 0 "arith_reg_dest")
+	(match_operand:SI 1 "t_reg_operand"))]
+  "TARGET_SH1 && reload_completed"
+  [(set (match_dup 0) (match_dup 1))]
+{
+  rtx t_reg = get_t_reg_rtx ();
+
+  for (rtx_insn* i = prev_nonnote_insn_bb (curr_insn); i != NULL;
+   i = prev_nonnote_insn_bb (i))
+{
+  if (!INSN_P (i) || DEBUG_INSN_P (i))
+	continue;
+
+  if (modified_in_p (t_reg, i) || BARRIER_P (i))
+	FAIL;
+
+  if (sh_is_movt_insn (i))
+	{
+	  rtx r = sh_movt_set_dest (i);
+	  if (!modified_between_p (r, i, curr_insn))
+	{
+	  operands[1] = r;
+	  break;
+	   }
+	}
+}
+})
+
 (define_peephole
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(plus:SI (match_dup 0) (match_operand:SI 1 "register_operand" "r")))

Re: Cache reals for 1/4, 1/6 and 1/9

[Richard Biener]

On Thu, Oct 1, 2015 at 3:59 PM, Bernd Schmidt  wrote:
> On 10/01/2015 03:51 PM, Richard Sandiford wrote:
>>
>> We have a global 1/2 and a cached 1/3, but recalculate 1/4, 1/6 and 1/9
>> each time we need them.  That seems a bit arbitrary and makes the folding
>> code more noisy (especially once it's moved to match.pd).
>>
>> This patch caches the other three constants too.  Bootstrapped &
>> regression-tested on x86_64-linux-gnu.  OK to install?
>
>
> Looks reasonable enough.

Given

/* Returns the special REAL_VALUE_TYPE corresponding to 1/3.  */

const REAL_VALUE_TYPE *
dconst_third_ptr (void)
{
  static REAL_VALUE_TYPE value;

  /* Initialize mathematical constants for constant folding builtins.
 These constants need to be given to at least 160 bits precision.  */
  if (value.cl == rvc_zero)
{
  real_arithmetic (, RDIV_EXPR, , real_digit (3));
}
  return 
}

I wonder if it makes sense to have

template
const REAL_VALUE_TYPE &
dconst (void)
{
  static REAL_VALUE_TYPE value;
  if (value.cl == rvc_zero)
real_arithmetic (, RDIV_EXPR, real_digit (a), real_digit (b));
  return value;
}

instead which allows us to use

  dconst<1,2>()

in place of dconst_half () and allows arbitrary extra cached constants to be
added (well, double-check that, but I think the function static should be
a .comdat).

Richard.


>
> Bernd

[Ada] Use more FOR_EACH_VEC_* macros

[Eric Botcazou]

Tested on x86_64-suse-linux, applied on the mainline.


2015-10-02  Eric Botcazou  

* gcc-interface/trans.c (find_loop_for): Use FOR_EACH_VEC_ELT_REVERSE.
(Loop_Statement_to_gnu): Use FOR_EACH_VEC_ELT.
(finalize_nrv): Use FOR_EACH_VEC_SAFE_ELT and initialize field.
(build_stmt_group): Add blank lines.


-- 
Eric BotcazouIndex: gcc-interface/trans.c
===
--- gcc-interface/trans.c	(revision 228315)
+++ gcc-interface/trans.c	(working copy)
@@ -2644,9 +2644,7 @@ find_loop_for (tree var)
 
   gcc_assert (vec_safe_length (gnu_loop_stack) > 0);
 
-  for (i = vec_safe_length (gnu_loop_stack) - 1;
-   vec_safe_iterate (gnu_loop_stack, i, );
-   i--)
+  FOR_EACH_VEC_ELT_REVERSE (*gnu_loop_stack, i, iter)
 if (var == iter->loop_var)
   break;
 
@@ -3014,9 +3012,7 @@ Loop_Statement_to_gnu (Node_Id gnat_node
 	   - the front-end quickly generates useless or redundant checks
 		 that can be entirely optimized away in the end.  */
   if (1 <= n_checks && n_checks <= 4)
-	for (i = 0;
-	 vec_safe_iterate (gnu_loop_info->checks, i, );
-	 i++)
+	FOR_EACH_VEC_ELT (*gnu_loop_info->checks, i, rci)
 	  {
 	tree low_ok
 	  = rci->low_bound
@@ -3426,8 +3422,9 @@ finalize_nrv (tree fndecl, bitmap nrv, v
   /* Prune the candidates that are referenced by other return values.  */
   data.nrv = nrv;
   data.result = NULL_TREE;
+  data.gnat_ret = Empty;
   data.visited = NULL;
-  for (i = 0; vec_safe_iterate (other, i, ); i++)
+  FOR_EACH_VEC_SAFE_ELT (other, i, iter)
 walk_tree_without_duplicates (, prune_nrv_r, );
   if (bitmap_empty_p (nrv))
 return;
@@ -7905,10 +7902,12 @@ static tree
 build_stmt_group (List_Id gnat_list, bool binding_p)
 {
   start_stmt_group ();
+
   if (binding_p)
 gnat_pushlevel ();
 
   add_stmt_list (gnat_list);
+
   if (binding_p)
 gnat_poplevel ();
 

Re: [PATCH] rs6000: Add "cannot_copy" attribute, use it (PR67788, PR67789)

[Richard Biener]

On Fri, Oct 2, 2015 at 3:14 AM, Segher Boessenkool
 wrote:
> On Fri, Oct 02, 2015 at 10:24:07AM +0930, Alan Modra wrote:
>> On Thu, Oct 01, 2015 at 12:18:08PM -0500, Segher Boessenkool wrote:
>> > On Thu, Oct 01, 2015 at 12:14:44PM +0200, Richard Biener wrote:
>> > > So even if not "easy", can you try?
>> >
>> > I did, and after half a day had a big mess and lots of things failing,
>> > no idea where this was headed, and in the meantime bootstrap still fails
>> > (on affected targets).
>>
>> I had a look too, and while you can revise the load_toc_v4_PIC
>> patterns to use labels emitted the usual way (eg. as in
>> i386.c:ix86_init_large_pic_reg) they tend to wander away from the
>> insn.
>
> Yes, and only "bcl 20,31,$+4" avoids the link stack on recent CPUs
> (bcl 20,31,$+8, which we also use, doesn't).
>
>> I think that could be solved, but these labels which aren't
>> referred to by jump insns get converted to NOTE_INSN_DELETED_LABEL
>> somewhere, and that leads to further pain.
>
> Yes.  You need to make the bcl a jump_insn to the label.  And then
> there is yet more pain.

Sounds like supporting this with a special instruction in the assembler
would be easier then? ...

As for the compile-time hit, yes, calling the hook at all and having an
extra loop over all stmts in cfg_layout_can_duplicate_bb_p.  There are
not many other uses of the hook, so I wonder if it is called everywhere
it has to be called.

Richard.

>
> Segher

Re: [Patch match.pd] Add a simplify rule for x * copysign (1.0, y);

[Jakub Jelinek]

On Fri, Oct 02, 2015 at 11:10:58AM +0200, Richard Biener wrote:
> > BTW, it seems wrf also in many places uses MAX 
> > or MIN  (always in pairs), would that be also
> > something to optimize?
> 
> Hmm, we'll already CSE copysign so the question is how to optimize
> tem1 = MAX ; tem2= MIN ;  Turn them back into control-flow?
> What would we like to end up with in assembly?

This wasn't a well thought thing.  Just that perhaps depending on how
copysign is expanded we might merge that with the min/max somehow.

> > Also, the x * copysign (1.0, y) in wrf is actually x * (1/12.) * copysign 
> > (1.0, y)
> > (or similar - other constants), wouldn't it make more sense to optimize that
> > as x * copysign (1/12., y) first (at least if we can reassociate)?
> 
> Yeah, I think CST * copysign (CST, ...) should constant fold to
> copysign (CST', ...)
> if that's always valid.  I don't think association comes into play
> here but as always
> you read the fine prints of the standard for FP optimziations...

The reason talking about reassoc is that we might not necessarily see
CST * copysign (CST, ...) in the IL, but something different:
  _2051 = __builtin_copysignf (1.0e+0, vel_2000);
...
  _2059 = _2051 * _2058;
  _2060 = _2059 * 1.66753590106964111328125e-2;
is before reassoc1 and
  _2051 = __builtin_copysignf (1.0e+0, vel_2000);
...
  _2047 = _2051 * 1.66753590106964111328125e-2;
  _2060 = _2047 * _2058;
is after reassoc1, so in this case reassoc1 worked fine, but in another spot
I see
  _2968 = __builtin_copysignf (1.0e+0, vel_2943);
...
  _2973 = _2968 * _2972;
  _2974 = _2973 * 8.335816860198974609375e-2;
before reassoc1 and
  _2968 = __builtin_copysignf (1.0e+0, vel_2943);
...
  _3008 = _2972 * 8.335816860198974609375e-2;
  _2974 = _3008 * _2968;
after reassoc1, so clearly reassoc puts those two together only randomly.
So, either we'd teach reassoc to prefer putting constant and copysign of
constant together, or even perform this optimization, or the match.pd
(or elsewhere) change would need additional smarts.

Note, I won't have time to work on this in the near future (OpenMP work
still on the plate), so if James (or anyone else?) has time for that, it
would be greatly appreciated.

Jakub

Re: [PATCH] fortran/67758 -- Prevent ICE caused by misplaced COMMON

[Mikael Morin]

Le 01/10/2015 18:30, Steve Kargl a écrit :

I'm fine with your patch, although I find the error message
to be somewhat confusing as no procedure appears in COMMON.


Well, XX is implicitly a procedure.


The call-stmt in the code is the start of an execution-construct.
A common-stmt is not allowed in an execution-construct.  At
least, that's how I intepret the BNF in 2.1 of F2008.

The error message appears too soon, before we finish parsing the common 
statement.  If it's delayed, as with the following additional patch, the 
common statements is properly rejected:


common_24.f:10:72:

   COMMON /FMCOM / XX(80 000 000) ! { dg-error "conflicts with 
COMMON" }

1
Error: Unexpected COMMON statement at (1)
common_24.f:8:72:

Error: PROCEDURE attribute conflicts with COMMON attribute in ‘xx’ at (1)

This needs a little more polishing (location missing in the second error 
message), then let's see how the testsuite likes it.


Mikael


Index: match.c
===
--- match.c (révision 228170)
+++ match.c (copie de travail)
@@ -4376,9 +4376,6 @@ gfc_match_common (void)
goto cleanup;
}

- if (!gfc_add_in_common (>attr, sym->name, NULL))
-   goto cleanup;
-
  if (tail != NULL)
tail->common_next = sym;
  else
Index: resolve.c
===
--- resolve.c   (révision 228170)
+++ resolve.c   (copie de travail)
@@ -918,6 +918,9 @@ resolve_common_vars (gfc_symbol *sym, bool named_c

   for (; csym; csym = csym->common_next)
 {
+  if (!gfc_add_in_common (>attr, csym->name, NULL))
+   continue;
+
   if (csym->value || csym->attr.data)
{
  if (!csym->ns->is_block_data)

Re: [Patch match.pd] Add a simplify rule for x * copysign (1.0, y);

[Marek Polacek]

On Fri, Oct 02, 2015 at 11:58:42AM +0200, Jakub Jelinek wrote:
> On Fri, Oct 02, 2015 at 11:45:08AM +0200, Richard Biener wrote:
> > > Note, I won't have time to work on this in the near future (OpenMP work
> > > still on the plate), so if James (or anyone else?) has time for that, it
> > > would be greatly appreciated.
> > 
> > So maybe just open an enhancement bug for now, citing the WRF use.
> 
> PR67815.

James, are you interested in this one, or would you prefer if I take it?

Marek

Re: [patch] libstdc++/67747 Allocate space for dirent::d_name

[Florian Weimer]

On 10/02/2015 02:37 PM, Sebastian Huber wrote:
> 
> 
> On 02/10/15 14:16, Florian Weimer wrote:
>> On 09/29/2015 01:37 PM, Jonathan Wakely wrote:
>>> >POSIX says that dirent::d_name has an unspecified length, so calls to
>>> >readdir_r must pass a buffer with enough trailing space for
>>> >{NAME_MAX}+1 characters. I wasn't doing that, which works OK on
>>> >GNU/Linux and BSD where d_name is a large array, but fails on Solaris
>>> >32-bit.
>>> >
>>> >This uses pathconf to get NAME_MAX and allocates a buffer.
>> This still has a buffer overflow on certain file systems.
>>
>> You must not use readdir_r, it is deprecated and always insecure.  We
>> should probably mark it as such in the glibc headers.
> 
> The READDIR(3) man page should be updated as well, since it doesn't
> mention that readdir_r() is deprecated and always insecure.

Right, and I filed: https://bugzilla.kernel.org/show_bug.cgi?id=105391

Florian

Re: [AArch64/testsuite] Add more TLS local executable testcases

[Jiong Wang]

Jiong Wang writes:

> Marcus Shawcroft writes:
>
>> On 26 August 2015 at 14:58, Jiong Wang  wrote:
>>>
>>> This patch cover tlsle tiny model tests, tls size truncation for tiny &
>>> small model included also.
>>>
>>> All testcases pass native test.
>>>
>>> OK for trunk?
>>>
>>> 2015-08-26  Jiong Wang  
>>>
>>> gcc/testsuite/
>>>   * gcc.target/aarch64/tlsle12_tiny_1.c: New testcase for tiny model.
>>>   * gcc.target/aarch64/tlsle24_tiny_1.c: Likewise.
>>>   * gcc.target/aarch64/tlsle_sizeadj_tiny_1.c: TLS size truncation test
>>>   for tiny model.
>>>   * gcc.target/aarch64/tlsle_sizeadj_small_1.c: TLS size truncation test
>>>   for small model.
>>
>> Hi Jiong
>> These tests are fragile if the test suite is run with an explicit
>> -mcmodel=* option.  I think they need appropriate dg-skip-if
>> directives to ensure they only run with the expected model.
>> /Marcus
>
> OK, how about the new one?
>
> 2015-09-22  Jiong Wang  
>
> gcc/testsuite/
>* gcc.target/aarch64/tlsle12_tiny_1.c: New testcase for tiny model.
>* gcc.target/aarch64/tlsle24_tiny_1.c: Likewise.
>* gcc.target/aarch64/tlsle_sizeadj_tiny_1.c: TLS size truncation test
>for tiny model.
>* gcc.target/aarch64/tlsle_sizeadj_small_1.c: TLS size truncation test
>for small model.
>

Ping.

-- 
Regards,
Jiong

Re: [PATCH, i386, AVX-512, doc] Mention all AVX-512 switches in invoke.texi.

[Kirill Yukhin]

On 01 Oct 17:51, Kirill Yukhin wrote:
> `make pdf` looks ok.
> Is it ok for trunk and gcc-5-branch (a week after check in to trunk)?
> 
> gcc/
>   * doc/invoke.texi: Mention -mavx512vl, -mavx512bw, -mavx512dq,
>   -mavx521vbmi, -mavx512ifma. Add missing opindex-es.
Checked into main trunk. I'll check it in gcc-5-branch next ww.

--
Thanks, K

Re: [Patch AArch64] Use default_elf_asm_named_section instead of special cased hook

[Marcus Shawcroft]

On 2 October 2015 at 11:08, Ramana Radhakrishnan
 wrote:

> * config/aarch64/aarch64-elf.h (TARGET_ASM_NAMED_SECTION): Use
> default_elf_asm_named_section.
> * config/aarch64/aarch64.c (aarch64_elf_asm_named_section): Delete.
> ---
>  gcc/config/aarch64/aarch64-elf.h |  2 +-
>  gcc/config/aarch64/aarch64.c | 74 
> 
>  2 files changed, 1 insertion(+), 75 deletions(-)
>
> diff --git a/gcc/config/aarch64/aarch64-elf.h 
> b/gcc/config/aarch64/aarch64-elf.h
> index 1ce6343..70aa845 100644
> --- a/gcc/config/aarch64/aarch64-elf.h
> +++ b/gcc/config/aarch64/aarch64-elf.h
> @@ -154,7 +154,7 @@ ASM_MABI_SPEC
>  #define TYPE_OPERAND_FMT   "%%%s"
>
>  #undef TARGET_ASM_NAMED_SECTION
> -#define TARGET_ASM_NAMED_SECTION  aarch64_elf_asm_named_section
> +#define TARGET_ASM_NAMED_SECTION  default_elf_asm_named_section

Isn't it sufficient to simply remove the #define completely and rely
on the default from elfos.h?
/M

Re: [PATCH] New attribute to create target clones

[Evgeny Stupachenko]

PING.

On Fri, Sep 25, 2015 at 1:28 AM, Evgeny Stupachenko  wrote:
> I've fixed ICE and review issues.
> x86 make check and bootstrap passed.
>
> Thanks,
> Evgeny
>
> ChangeLog
>
> 2015-09-25  Evgeny Stupachenko  
>
> gcc/
> * Makefile.in (OBJS): Add multiple_target.o.
> * multiple_target.c (make_attribute): New.
> (create_dispatcher_calls): Ditto.
> (expand_target_clones): Ditto.
> (ipa_target_clone): Ditto.
> * passes.def (pass_target_clone): New ipa pass.
> * tree-pass.h (make_pass_target_clone): Ditto.
>
> gcc/c-family
> * c-common.c (handle_target_clones_attribute): New.
> * (c_common_attribute_table): Add handle_target_clones_attribute.
> * (handle_always_inline_attribute): Add check on target_clones
> attribute.
> * (handle_target_attribute): Ditto.
>
> gcc/testsuite
> * gcc.dg/mvc1.c: New test for multiple targets cloning.
> * gcc.dg/mvc2.c: Ditto.
> * gcc.dg/mvc3.c: Ditto.
> * gcc.dg/mvc4.c: Ditto.
> * gcc.dg/mvc5.c: Ditto.
> * gcc.dg/mvc6.c: Ditto.
> * gcc.dg/mvc7.c: Ditto.
> * g++.dg/ext/mvc1.C: Ditto.
> * g++.dg/ext/mvc2.C: Ditto.
> * g++.dg/ext/mvc3.C: Ditto.
>
> gcc/doc
> * doc/extend.texi (target_clones): New attribute description.
>
>
> On Wed, Sep 23, 2015 at 1:49 AM, Evgeny Stupachenko  
> wrote:
>> Thank you for the review.
>> The patch still works with gcc 5, but the fail reproduced on trunk
>> (looks like it appeared while patch was at review). I'll debug it and
>> fix.
>> As a workaround to test the feature...
>> Removing
>> "gimple_call_set_fndecl (call, idecl);" from multiple_target.c
>> should resolve the ICE
>>
>> I'll fix the patch for trunk and send an update.
>>
>> Thanks,
>> Evgeny
>>
>>
>> On Wed, Sep 23, 2015 at 12:09 AM, Bernd Schmidt  wrote:
>>> On 09/22/2015 09:41 PM, Jeff Law wrote:

 Essentially it allows us to more easily support
 per-microarchitecture-optimized versions of functions.   You list just
 have to list the microarchitectures and the compiler handles the rest.
 Very simple, very easy.  I'd think it'd be particularly helpful for
 vectorization.

 You could emulate this with compiling the same source multiple times
 with different flags/defines and wire up on ifunc by hand.  But Evgeny's
 approach is vastly simpler.
>>>
>>>
>>> As far as I can tell the ifunc is generated automatically (and the
>>> functionality is documented as such), so the new target_clone doesn't buy
>>> much. But one thing I didn't was that the existing support is only available
>>> in C++, while Evgeny's patch works for C. That is probably an argument that
>>> could be made for its inclusion.
>>>
>>> Or at least, it's supposed to work. As I said, I get verify_ssa failures on
>>> the included testcases, and for a simpler one I just tried I get the clones
>>> of the function, but not the resolver that ought to be generated.
>>>
>>>
>>> Bernd

Re: [PATCH, i386, AVX-512] Update extract_even_odd w/ AVX-512BW insns.

[Kirill Yukhin]

On 01 Oct 14:11, Kirill Yukhin wrote:
> Bootstrapped. New tests pass (fail w/o the change). Regtesting is in progress.
> 
> Is it ok for trunk?
> 
> gcc/
>   * config/i386/i386.c (expand_vec_perm_even_odd_trunc): New.
>   (expand_vec_perm_even_odd_1): Handle V64QImode.
>   (ix86_expand_vec_perm_const_1): Try expansion with
>   expand_vec_perm_even_odd_trunc as well.
>   * config/i386/sse.md (VI124_AVX512F): Rename to ...
>   (define_mode_iterator VI124_AVX2_24_AVX512F_1_AVX512BW): This. Extend
>   to V54QI.
>   (define_mode_iterator VI248_AVX2_8_AVX512F): Rename to ...
>   (define_mode_iterator VI248_AVX2_8_AVX512F_24_AVX512BW): This. Extend
>   to V32HI and V16SI.
>   (define_insn "avx512bw_v32hiv32qi2"): Unhide pattern name.
>   (define_expand "vec_pack_trunc_"): Update iterator name.
>   (define_expand "vec_unpacks_lo_"): Ditto.
>   (define_expand "vec_unpacks_hi_"): Ditto.
>   (define_expand "vec_unpacku_lo_"): Ditto.
>   (define_expand "vec_unpacku_hi_"): Ditto.
> 
> gcc/testsuite/
>   * gcc.target/i386/vect-pack-trunc-1.c: New test.
>   * gcc.target/i386/vect-pack-trunc-2.c: Ditto.
>   * gcc.target/i386/vect-perm-even-1.c: Ditto.
>   * gcc.target/i386/vect-perm-odd-1.c: Ditto.
>   * gcc.target/i386/vect-unpack-1.c: Ditto.
>   * gcc.target/i386/vect-unpack-2.c: Ditto.
Checked into main trunk. I'll also check it into gcc-5-branch 
if no objections from RMs next ww.

--
Thanks, K

Re: [Patch AArch64] Use default_elf_asm_named_section instead of special cased hook

[Ramana Radhakrishnan]

On 02/10/15 13:46, Marcus Shawcroft wrote:
> On 2 October 2015 at 11:08, Ramana Radhakrishnan
>  wrote:
> 
>> * config/aarch64/aarch64-elf.h (TARGET_ASM_NAMED_SECTION): Use
>> default_elf_asm_named_section.
>> * config/aarch64/aarch64.c (aarch64_elf_asm_named_section): Delete.
>> ---
>>  gcc/config/aarch64/aarch64-elf.h |  2 +-
>>  gcc/config/aarch64/aarch64.c | 74 
>> 
>>  2 files changed, 1 insertion(+), 75 deletions(-)
>>
>> diff --git a/gcc/config/aarch64/aarch64-elf.h 
>> b/gcc/config/aarch64/aarch64-elf.h
>> index 1ce6343..70aa845 100644
>> --- a/gcc/config/aarch64/aarch64-elf.h
>> +++ b/gcc/config/aarch64/aarch64-elf.h
>> @@ -154,7 +154,7 @@ ASM_MABI_SPEC
>>  #define TYPE_OPERAND_FMT   "%%%s"
>>
>>  #undef TARGET_ASM_NAMED_SECTION
>> -#define TARGET_ASM_NAMED_SECTION  aarch64_elf_asm_named_section
>> +#define TARGET_ASM_NAMED_SECTION  default_elf_asm_named_section
> 
> Isn't it sufficient to simply remove the #define completely and rely
> on the default from elfos.h?

Doh ! you're right - Yeah should be coming in from config/elfos.h given that we 
don't support anything other than elf in the aarch64 port.

Ok to commit without that hunk ?

regards
Ramana

Re: [PATCH] SH FDPIC backend support

[Oleg Endo]

On Thu, 2015-10-01 at 21:30 -0400, Rich Felker wrote:

> If you have any other general comments on the patch in the mean time
> I'd be happy to hear them.

Below are some comments.  Might be a bit unstructured, I was hopping
through the patch file.  Sorry about that.

> +function_symbol (rtx target, const char *name, enum sh_function_kind kind, 
> rtx *lab)
 ^

Please do not add unnecessary 'enum', 'struct', 'typedef' etc.  In this
case it was already here, but since this is is touching the line, please
remove it.

I'd rather make the function 'function_symbol' returning a
std::pair or something like

struct function_symbol_result
{
  function_symbol_result (void) : symbol (NULL), label (NULL) { }
  function_symbol_result (rtx s, rtx l) : symbol (s), label (l) { }

  rtx symbol;
  rtx label;
};

instead of doing return values by pointer-args.  On the caller sites,
you can then do something like

rtx lab = function_symbol (func_addr_rtx, "...", SFUNC_STATIC).label;

This will make the the patch also a few hunks shorter.

> +extern bool sh_legitimate_constant_p (rtx);

There is already a target hook/callback function:

static bool
sh_legitimate_constant_p (machine_mode mode, rtx x)

You newly added function is an overload it and I'm not sure who invokes it.


> +extern rtx sh_our_fdpic_reg (void);

Please rename this to 'sh_get_fdpic_reg_initial_val'.  There's a similar
function 'sh_get_pr_initial_val' which also uses
'get_hard_reg_initial_val'.

> +/* An rtx holding the initial value of the FDPIC register (the FDPIC
> +   pointer passed in from the caller).  */
> +#define OUR_FDPIC_REGsh_our_fdpic_reg ()
> +

Please remove this macro and add 'sh_get_fdpic_reg_initial_val' to
sh-protos.h and use that function instead.

>  void
>  prepare_move_operands (rtx operands[], machine_mode mode)
>  {
> +  rtx tmp, base, offset;
> +

Please declare variables where they are used.


> +  if (TARGET_FDPIC)
> +{
> +  rtx pic_reg = gen_rtx_REG (Pmode, PIC_REG);
> +  emit_move_insn (pic_reg, OUR_FDPIC_REG);
> +}
> +

Make this a one-liner

  emit_move_insn (gen_rtx_REG (Pmode, PIC_REG),
  sh_get_fdpic_reg_initial_val ());



> +(define_insn "sibcalli_fdpic"
> +  [(call (mem:SI (match_operand:SI 0 "register_operand" "k"))
> +  (match_operand 1 "" ""))
> +   (use (reg:SI FPSCR_MODES_REG))
> +   (use (reg:SI PIC_REG))
> +   (return)]
> +  "TARGET_SH1 && TARGET_FDPIC"
>^^^

This is maybe slightly impossible, because of ..

> +  if (TARGET_FDPIC
> +  && (TARGET_SHMEDIA || TARGET_SHCOMPACT || !TARGET_SH2))
> +sorry ("non-SH2 FDPIC");
> +


> +  [(match_operand 0 "" "") (match_operand 1 "" "")]
> 

Please don't add empty predicate/constraint strings if not necessary.  In this 
case
[(match_operand 0) (match_operand 1)]

will suffice.


>   if (TARGET_FDPIC)
> +picreg = OUR_FDPIC_REG;
> +  else
> +picreg = gen_rtx_REG (Pmode, PIC_REG);
> +

rtx picreg = TARGET_FDPIC ? ...
  : ... ;

Maybe it could be useful to replace all "gen_rtx_REG (Pmode, PIC_REG)"
in the patch with something like 'get_t_reg_rtx'.  Depends on how many
times this gen_rtx_REG is invoked.


> +// FIXME: what happens if someone tries fdpic on SH5?
> 

Nothing.  See also
https://gcc.gnu.org/ml/gcc/2015-08/msg00101.html

Please omit all SH5/SHMEDIA checks and related code.


> +#ifdef __FDPIC__
> +#define udiv_qrnnd(q, r, n1, n0, d) \
> +  do {   
> \
> +extern UWtype __udiv_qrnnd_16 (UWtype, UWtype)   \

It's really difficult to spot the subtle difference of the FDPIC version
and the non-FDPIC version.  At least there should be a comment.

Cheers,
Oleg

[Boolean Vector, patch 2/5] Change vector comparison IL requirement

[Ilya Enkovich]

Hi,

This patch change vector comparison to require boolean vector resulting type.

Thanks,
Ilya
--
gcc/

2015-10-02  Ilya Enkovich  

* tree-cfg.c (verify_gimple_comparison) Require boolean
vector type for vector comparison.
(verify_gimple_assign_ternary): Likewise.


diff --git a/gcc/tree-cfg.c b/gcc/tree-cfg.c
index 807d96f..c3dcced 100644
--- a/gcc/tree-cfg.c
+++ b/gcc/tree-cfg.c
@@ -3464,10 +3464,10 @@ verify_gimple_comparison (tree type, tree op0, tree op1)
   return true;
 }
 }
-  /* Or an integer vector type with the same size and element count
+  /* Or a boolean vector type with the same element count
  as the comparison operand types.  */
   else if (TREE_CODE (type) == VECTOR_TYPE
-  && TREE_CODE (TREE_TYPE (type)) == INTEGER_TYPE)
+  && TREE_CODE (TREE_TYPE (type)) == BOOLEAN_TYPE)
 {
   if (TREE_CODE (op0_type) != VECTOR_TYPE
  || TREE_CODE (op1_type) != VECTOR_TYPE)
@@ -3478,12 +3478,7 @@ verify_gimple_comparison (tree type, tree op0, tree op1)
   return true;
 }
 
-  if (TYPE_VECTOR_SUBPARTS (type) != TYPE_VECTOR_SUBPARTS (op0_type)
- || (GET_MODE_SIZE (TYPE_MODE (TREE_TYPE (type)))
- != GET_MODE_SIZE (TYPE_MODE (TREE_TYPE (op0_type
- /* The result of a vector comparison is of signed
-integral type.  */
- || TYPE_UNSIGNED (TREE_TYPE (type)))
+  if (TYPE_VECTOR_SUBPARTS (type) != TYPE_VECTOR_SUBPARTS (op0_type))
 {
   error ("invalid vector comparison resulting type");
   debug_generic_expr (type);
@@ -3970,15 +3965,13 @@ verify_gimple_assign_ternary (gassign *stmt)
   break;
 
 case VEC_COND_EXPR:
-  if (!VECTOR_INTEGER_TYPE_P (rhs1_type)
- || TYPE_SIGN (rhs1_type) != SIGNED
- || TYPE_SIZE (rhs1_type) != TYPE_SIZE (lhs_type)
+  if (!VECTOR_BOOLEAN_TYPE_P (rhs1_type)
  || TYPE_VECTOR_SUBPARTS (rhs1_type)
 != TYPE_VECTOR_SUBPARTS (lhs_type))
{
- error ("the first argument of a VEC_COND_EXPR must be of a signed "
-"integral vector type of the same size and number of "
-"elements as the result");
+ error ("the first argument of a VEC_COND_EXPR must be of a "
+"boolean vector type of the same number of elements "
+"as the result");
  debug_generic_expr (lhs_type);
  debug_generic_expr (rhs1_type);
  return true;

[Boolean Vector, patch 4/5] Use boolean vectors in VEC_COND_EXPR

[Ilya Enkovich]

Hi,

This patch forces boolean vector usage in VEC_COND_EXPR generated by 
vectorizer.  VEC_COND_EXPR expand is fixed appropriately.

Thanks,
Ilya
--
gcc/

2015-10-02  Ilya Enkovich  

* optabs.c (expand_vec_cond_expr): Accept boolean vector as
condition operand.
* tree-vect-stmts.c (vectorizable_condition): Use boolean
vector type for vector comparison.


diff --git a/gcc/optabs.c b/gcc/optabs.c
index c49d66b..8d9d742 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -5365,16 +5365,17 @@ expand_vec_cond_expr (tree vec_cond_type, tree op0, 
tree op1, tree op2,
   op0a = TREE_OPERAND (op0, 0);
   op0b = TREE_OPERAND (op0, 1);
   tcode = TREE_CODE (op0);
+  unsignedp = TYPE_UNSIGNED (TREE_TYPE (op0a));
 }
   else
 {
   /* Fake op0 < 0.  */
-  gcc_assert (!TYPE_UNSIGNED (TREE_TYPE (op0)));
+  gcc_assert (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (op0)));
   op0a = op0;
   op0b = build_zero_cst (TREE_TYPE (op0));
   tcode = LT_EXPR;
+  unsignedp = false;
 }
-  unsignedp = TYPE_UNSIGNED (TREE_TYPE (op0a));
   cmp_op_mode = TYPE_MODE (TREE_TYPE (op0a));
 
 
diff --git a/gcc/tree-vect-stmts.c b/gcc/tree-vect-stmts.c
index 2ff2827..e93f5ef 100644
--- a/gcc/tree-vect-stmts.c
+++ b/gcc/tree-vect-stmts.c
@@ -7384,10 +7384,7 @@ vectorizable_condition (gimple *stmt, 
gimple_stmt_iterator *gsi,
   && TREE_CODE (else_clause) != FIXED_CST)
 return false;
 
-  unsigned int prec = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (vectype)));
-  /* The result of a vector comparison should be signed type.  */
-  tree cmp_type = build_nonstandard_integer_type (prec, 0);
-  vec_cmp_type = get_same_sized_vectype (cmp_type, vectype);
+  vec_cmp_type = build_same_sized_truth_vector_type (comp_vectype);
   if (vec_cmp_type == NULL_TREE)
 return false;
 

Re: [patch] libstdc++/67747 Allocate space for dirent::d_name

[Florian Weimer]

On 10/02/2015 02:34 PM, Jonathan Wakely wrote:
> On 02/10/15 14:16 +0200, Florian Weimer wrote:
>> On 09/29/2015 01:37 PM, Jonathan Wakely wrote:
>>> POSIX says that dirent::d_name has an unspecified length, so calls to
>>> readdir_r must pass a buffer with enough trailing space for
>>> {NAME_MAX}+1 characters. I wasn't doing that, which works OK on
>>> GNU/Linux and BSD where d_name is a large array, but fails on Solaris
>>> 32-bit.
>>>
>>> This uses pathconf to get NAME_MAX and allocates a buffer.
>>
>> This still has a buffer overflow on certain file systems.
>>
>> You must not use readdir_r, it is deprecated and always insecure.  We
>> should probably mark it as such in the glibc headers.
> 
> OK, I'll just use readdir() then. The directory stream is private to
> the library type, so the only way to call readdir() concurrently on a
> single directory stream is to increment iterators concurrently, which
> is undefined anyway.

Right, that's the only case where readdir_r could be theoretically
useful.  But it's not a global structure, the callers have to coordinate
anyway, and so you could well use an external lock.

> So that will work as long as readdir() doesn't use a global static
> buffer shared between streams, i.e. it meets the POSIX requirement
> that "They shall not be affected by a call to readdir() on a different
> directory stream." I don't know if mingw meets that, but there is lots
> of work needed to make this stuff work in mingw.

If mingw has this flaw, it is worth fixing on its own, and mingw is
sufficiently alive that sticking workarounds into libstdc++ for its bugs
doesn't make sense (IMHO).

>> Have we already released code which uses readdir_r?
> 
> No, it's only on trunk and the gcc-5-branch, not in any release.

Good, no need to treat this as a security vulnerability. :)

Re: [PATCH] x86 interrupt attribute

[Yulia Koval]

Hi,
Here is a new patch. Added HJ's changes and review changes.

Implement x86 interrupt attribute

The interrupt and exception handlers are called by x86 processors.  X86
hardware pushes information onto stack and calls the handler.  The
requirements are

1. Both interrupt and exception handlers must use the 'IRET' instruction,
instead of the 'RET' instruction, to return from the handlers.
2. All registers are callee-saved in interrupt and exception handlers.
3. The difference between interrupt and exception handlers is the
exception handler must pop 'ERROR_CODE' off the stack before the 'IRET'
instruction.

The design goals of interrupt and exception handlers for x86 processors
are:

1. Support both 32-bit and 64-bit modes.
2. Flexible for compilers to optimize.
3. Easy to use by programmers.

To implement interrupt and exception handlers for x86 processors, a
compiler should support:

'interrupt' attribute

Use this attribute to indicate that the specified function with
mandatory arguments is an interrupt or exception handler.  The compiler
generates function entry and exit sequences suitable for use in an
interrupt handler when this attribute is present.  The 'IRET' instruction,
instead of the 'RET' instruction, is used to return from interrupt or
exception handlers.  All registers, except for the EFLAGS register which
is restored by the 'IRET' instruction, are preserved by the compiler.

Any interruptible-without-stack-switch code must be compiled with
-mno-red-zone since interrupt handlers can and will, because of the
hardware design, touch the red zone.

1. interrupt handler must be declared with a mandatory pointer argument:

struct interrupt_frame;

__attribute__ ((interrupt))
void
f (struct interrupt_frame *frame)
{
...
}

and user must properly define the structure the pointer pointing to.

2. exception handler:

The exception handler is very similar to the interrupt handler with
a different mandatory function signature:

typedef unsigned long long int uword_t;
typedef unsigned int uword_t;

struct interrupt_frame;

__attribute__ ((interrupt))
void
f (struct interrupt_frame *frame, uword_t error_code)
{
...
}

and compiler pops the error code off stack before the 'IRET' instruction.

The exception handler should only be used for exceptions which push an
error code and all other exceptions must use the interrupt handler.
The system will crash if the wrong handler is used.

To be feature complete, compiler may implement the optional
'no_caller_saved_registers' attribute:

Use this attribute to indicate that the specified function has no
caller-saved registers.  That is, all registers are callee-saved.
The compiler generates proper function entry and exit sequences to
save and restore any modified registers.

The user can call functions specified with 'no_caller_saved_registers'
attribute from an interrupt handler without saving and restoring all
call clobbered registers.

PR target/66960
PR target/67630
PR target/67634
* config/i386/i386-protos.h (ix86_epilogue_uses): New prototype.
* config/i386/i386.c (ix86_frame): Add nbndregs and nmaskregs.
(ix86_conditional_register_usage): Preserve all registers if
there are no caller-saved registers.
(ix86_set_current_function): Set no_caller_saved_registers and
func_type.  Mark arguments in interrupt handler as used.
(ix86_function_ok_for_sibcall): Return false if there are no
caller-saved registers.
(ix86_maybe_switch_abi): Call reinit_regs if AX register usage
isn't consistent.
(type_natural_mode): Don't warn ABI change for MMX in interrupt
handler.
(ix86_function_arg_advance): Skip for callee in interrupt
handler.
(ix86_function_arg): Handle arguments for callee in interrupt
handler.
(ix86_can_use_return_insn_p): Don't use `ret' instruction in
interrupt handler.
(ix86_hard_regno_scratch_ok): New function.
(ix86_epilogue_uses): Likewise.
(ix86_reg_ever_defined_p): Likewise.
(ix86_nsaved_bndregs): Likewise.
(ix86_nsaved_maskregs): Likewise.
(ix86_reg_save_area_size): Likewise.
(ix86_handle_no_caller_saved_registers_attribute): Likewise.
(ix86_handle_interrupt_attribute): Likewise.
(ix86_save_reg): Preserve all registers if there are no
caller-saved registers after reload.
(ix86_nsaved_sseregs): Don't return 0 if there are no
caller-saved registers.
(ix86_compute_frame_layout): Set nbndregs and nmaskregs.  Set
save_regs_using_mov to true to save bound and mask registers.
Call ix86_reg_save_area_size to get register save area size.
Allocate space to save full vector registers if there are
no caller-saved registers.
(ix86_emit_save_reg_using_mov): Set alignment to word_mode
alignment when saving full vector registers if there are no
caller-saved registers.
(ix86_emit_save_regs_using_mov): Use regno_reg_rtx to get
register size.
(ix86_emit_restore_regs_using_mov): Likewise.
(ix86_emit_save_sse_regs_using_mov): Save full vector registers
if there are no caller-saved registers.
(ix86_emit_restore_sse_regs_using_mov): Restore full vector
registers if there are 

[wwwdocs] Mention -Wduplicated-cond

[Marek Polacek]

Applied.

Index: changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-6/changes.html,v
retrieving revision 1.32
diff -u -r1.32 changes.html
--- changes.html28 Sep 2015 00:43:48 -  1.32
+++ changes.html2 Oct 2015 13:23:47 -
@@ -84,6 +84,9 @@
   -fdelete-null-pointer-checks is active, which is enabled
   by optimizations in most targets. The precision of the warnings
   depends on the optimization options used.
+-Wduplicated-cond warns about duplicated conditions
+ in an if-else-if chain.  This warning is enabled by
+ -Wall.
   
 
   

Marek

[Boolean Vector, patch 1/5] Introduce boolean vector to be used as a vector comparison type

[Ilya Enkovich]

Hi,

This patch starts the first series to introduce vec as a vector 
comparison type.  This series introduces the new vec type and force its 
usage for all vector comparisons.  This series doesn't intoroduce any new 
vectorization features.  I split it into five small patches but will commit in 
a single chunk.  Patch series was bootstrapped and tested on 
x86_64-unknown-linux-gnu.

The first patch introduces a target hook and functions to produce new vector 
type.

Thanks,
Ilya
--
2015-10-02  Ilya Enkovich  

* doc/tm.texi: Regenerated.
* doc/tm.texi.in (TARGET_VECTORIZE_GET_MASK_MODE): New.
* stor-layout.c (layout_type): Use mode to get vector mask size.
* target.def (get_mask_mode): New.
* targhooks.c (default_get_mask_mode): New.
* targhooks.h (default_get_mask_mode): New.
* gcc/tree-vect-stmts.c (get_same_sized_vectype): Add special case
for boolean vector.
* tree.c (MAX_BOOL_CACHED_PREC): New.
(nonstandard_boolean_type_cache): New.
(build_nonstandard_boolean_type): New.
(make_vector_type): Vector mask has no canonical type.
(build_truth_vector_type): New.
(build_same_sized_truth_vector_type): New.
(truth_type_for): Support vector masks.
* tree.h (VECTOR_BOOLEAN_TYPE_P): New.
(build_truth_vector_type): New.
(build_same_sized_truth_vector_type): New.
(build_nonstandard_boolean_type): New.


diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index eb495a8..098213e 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -5688,6 +5688,11 @@ mode returned by 
@code{TARGET_VECTORIZE_PREFERRED_SIMD_MODE}.
 The default is zero which means to not iterate over other vector sizes.
 @end deftypefn
 
+@deftypefn {Target Hook} machine_mode TARGET_VECTORIZE_GET_MASK_MODE (unsigned 
@var{nunits}, unsigned @var{length})
+This hook returns mode to be used for a mask to be used for a vector
+of specified @var{length} with @var{nunits} elements.
+@end deftypefn
+
 @deftypefn {Target Hook} {void *} TARGET_VECTORIZE_INIT_COST (struct loop 
*@var{loop_info})
 This hook should initialize target-specific data structures in preparation for 
modeling the costs of vectorizing a loop or basic block.  The default allocates 
three unsigned integers for accumulating costs for the prologue, body, and 
epilogue of the loop or basic block.  If @var{loop_info} is non-NULL, it 
identifies the loop being vectorized; otherwise a single block is being 
vectorized.
 @end deftypefn
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 92835c1..92cfa1d 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -4225,6 +4225,8 @@ address;  but often a machine-dependent strategy can 
generate better code.
 
 @hook TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES
 
+@hook TARGET_VECTORIZE_GET_MASK_MODE
+
 @hook TARGET_VECTORIZE_INIT_COST
 
 @hook TARGET_VECTORIZE_ADD_STMT_COST
diff --git a/gcc/stor-layout.c b/gcc/stor-layout.c
index 938e54b..58ecd7b 100644
--- a/gcc/stor-layout.c
+++ b/gcc/stor-layout.c
@@ -2184,10 +2184,16 @@ layout_type (tree type)
 
TYPE_SATURATING (type) = TYPE_SATURATING (TREE_TYPE (type));
 TYPE_UNSIGNED (type) = TYPE_UNSIGNED (TREE_TYPE (type));
-   TYPE_SIZE_UNIT (type) = int_const_binop (MULT_EXPR,
-TYPE_SIZE_UNIT (innertype),
-size_int (nunits));
-   TYPE_SIZE (type) = int_const_binop (MULT_EXPR, TYPE_SIZE (innertype),
+   /* Several boolean vector elements may fit in a single unit.  */
+   if (VECTOR_BOOLEAN_TYPE_P (type))
+ TYPE_SIZE_UNIT (type)
+   = size_int (GET_MODE_SIZE (type->type_common.mode));
+   else
+ TYPE_SIZE_UNIT (type) = int_const_binop (MULT_EXPR,
+  TYPE_SIZE_UNIT (innertype),
+  size_int (nunits));
+   TYPE_SIZE (type) = int_const_binop (MULT_EXPR,
+   TYPE_SIZE (innertype),
bitsize_int (nunits));
 
/* For vector types, we do not default to the mode's alignment.
diff --git a/gcc/target.def b/gcc/target.def
index f330709..b96fd51 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -1789,6 +1789,15 @@ The default is zero which means to not iterate over 
other vector sizes.",
  (void),
  default_autovectorize_vector_sizes)
 
+/* Function to get a target mode for a vector mask.  */
+DEFHOOK
+(get_mask_mode,
+ "This hook returns mode to be used for a mask to be used for a vector\n\
+of specified @var{length} with @var{nunits} elements.",
+ machine_mode,
+ (unsigned nunits, unsigned length),
+ default_get_mask_mode)
+
 /* Target builtin that implements vector gather operation.  */
 DEFHOOK
 (builtin_gather,
diff --git a/gcc/targhooks.c b/gcc/targhooks.c
index 7238c8f..ac01d57 100644
--- 

Re: [AArch64/testsuite] Add more TLS local executable testcases

[Marcus Shawcroft]

On 22 September 2015 at 17:49, Jiong Wang  wrote:

> 2015-09-22  Jiong Wang  
>
> gcc/testsuite/
>* gcc.target/aarch64/tlsle12_tiny_1.c: New testcase for tiny model.
>* gcc.target/aarch64/tlsle24_tiny_1.c: Likewise.
>* gcc.target/aarch64/tlsle_sizeadj_tiny_1.c: TLS size truncation test
>for tiny model.
>* gcc.target/aarch64/tlsle_sizeadj_small_1.c: TLS size truncation test
>for small model.
>

OK /Marcus

Re: [Patch AArch64] Use default_elf_asm_named_section instead of special cased hook

[Marcus Shawcroft]

On 2 October 2015 at 14:01, Ramana Radhakrishnan
 wrote:

>>>  #undef TARGET_ASM_NAMED_SECTION
>>> -#define TARGET_ASM_NAMED_SECTION  aarch64_elf_asm_named_section
>>> +#define TARGET_ASM_NAMED_SECTION  default_elf_asm_named_section
>>
>> Isn't it sufficient to simply remove the #define completely and rely
>> on the default from elfos.h?
>
> Doh ! you're right - Yeah should be coming in from config/elfos.h given that 
> we don't support anything other than elf in the aarch64 port.
>
> Ok to commit without that hunk ?

Yes. /Marcus

[PATCH] Stop including in gcc/system.h

[Jonathan Wakely]

 is deprecated on some systems and we gets hundreds of
warnings due to including it on (at least) dragonfly and openbsd.

We already do this earlier in system.h:

#ifdef HAVE_STDLIB_H
# include 
#endif

/* When compiling C++ we need to include  as well as  so
  that it is processed before we poison "malloc"; otherwise, if a source
  file uses a standard library header that includes , we will get
  an error about 'using std::malloc'.  */
#ifdef __cplusplus
#include 
#endif

So if that doesn't already declare malloc/calloc/realloc then the
system is from the dark ages and including  is not likely to
be all that's needed to build a current GCC!

Bootstrapped on linux-gnu, openbsd5.0, dragonfly4.2, and aix7.1.2.0,
pre-approved by Richi on IRC, committed to trunk.


commit 5c1eeabb69319ed6fe6ab57621b6dd9a4ff0193b
Author: Jonathan Wakely 
Date:   Fri Oct 2 12:25:07 2015 +0100

	* system.h (malloc.h): Don't include obsolete header.

diff --git a/gcc/system.h b/gcc/system.h
index 71867c4..85a66a5 100644
--- a/gcc/system.h
+++ b/gcc/system.h
@@ -481,18 +481,6 @@ extern char *stpcpy (char *, const char *);
 int unsetenv(const char *);
 #endif
 
-#ifdef __cplusplus
-}
-#endif
-
-#ifdef HAVE_MALLOC_H
-#include 
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 #if defined (HAVE_DECL_MALLOC) && !HAVE_DECL_MALLOC
 extern void *malloc (size_t);
 #endif

[Boolean Vector, patch 3/5] Use boolean vector in C/C++ FE

[Ilya Enkovich]

Hi,

This patch makes C/C++ FE to use boolean vector as a resulting type for vector 
comparison.  As a result vector comparison in source code now parsed into 
VEC_COND_EXPR, it required a testcase fix-up.

Thanks,
Ilya
--
gcc/c

2015-10-02  Ilya Enkovich  

* c-typeck.c (build_conditional_expr): Use boolean vector
type for vector comparison.
(build_vec_cmp): New.
(build_binary_op): Use build_vec_cmp for comparison.

gcc/cp

2015-10-02  Ilya Enkovich  

* call.c (build_conditional_expr_1): Use boolean vector
type for vector comparison.
* typeck.c (build_vec_cmp): New.
(cp_build_binary_op): Use build_vec_cmp for comparison.

gcc/testsuite/

2015-10-02  Ilya Enkovich  

* g++.dg/ext/vector22.C: Allow VEC_COND_EXPR.


diff --git a/gcc/c/c-typeck.c b/gcc/c/c-typeck.c
index 3b26231..3f64d76 100644
--- a/gcc/c/c-typeck.c
+++ b/gcc/c/c-typeck.c
@@ -4771,6 +4771,18 @@ build_conditional_expr (location_t colon_loc, tree 
ifexp, bool ifexp_bcp,
   && TREE_CODE (orig_op2) == INTEGER_CST
   && !TREE_OVERFLOW (orig_op2)));
 }
+
+  /* Need to convert condition operand into a vector mask.  */
+  if (VECTOR_TYPE_P (TREE_TYPE (ifexp)))
+{
+  tree vectype = TREE_TYPE (ifexp);
+  tree elem_type = TREE_TYPE (vectype);
+  tree zero = build_int_cst (elem_type, 0);
+  tree zero_vec = build_vector_from_val (vectype, zero);
+  tree cmp_type = build_same_sized_truth_vector_type (vectype);
+  ifexp = build2 (NE_EXPR, cmp_type, ifexp, zero_vec);
+}
+
   if (int_const || (ifexp_bcp && TREE_CODE (ifexp) == INTEGER_CST))
 ret = fold_build3_loc (colon_loc, COND_EXPR, result_type, ifexp, op1, op2);
   else
@@ -10220,6 +10232,19 @@ push_cleanup (tree decl, tree cleanup, bool eh_only)
   STATEMENT_LIST_STMT_EXPR (list) = stmt_expr;
 }
 
+/* Build a vector comparison using VEC_COND_EXPR.  */
+
+static tree
+build_vec_cmp (tree_code code, tree type,
+  tree arg0, tree arg1)
+{
+  tree zero_vec = build_zero_cst (type);
+  tree minus_one_vec = build_minus_one_cst (type);
+  tree cmp_type = build_same_sized_truth_vector_type (type);
+  tree cmp = build2 (code, cmp_type, arg0, arg1);
+  return build3 (VEC_COND_EXPR, type, cmp, minus_one_vec, zero_vec);
+}
+
 /* Build a binary-operation expression without default conversions.
CODE is the kind of expression to build.
LOCATION is the operator's location.
@@ -10786,7 +10811,8 @@ build_binary_op (location_t location, enum tree_code 
code,
   result_type = build_opaque_vector_type (intt,
  TYPE_VECTOR_SUBPARTS (type0));
   converted = 1;
-  break;
+ ret = build_vec_cmp (resultcode, result_type, op0, op1);
+  goto return_build_binary_op;
 }
   if (FLOAT_TYPE_P (type0) || FLOAT_TYPE_P (type1))
warning_at (location,
@@ -10938,7 +10964,8 @@ build_binary_op (location_t location, enum tree_code 
code,
   result_type = build_opaque_vector_type (intt,
  TYPE_VECTOR_SUBPARTS (type0));
   converted = 1;
-  break;
+ ret = build_vec_cmp (resultcode, result_type, op0, op1);
+  goto return_build_binary_op;
 }
   build_type = integer_type_node;
   if ((code0 == INTEGER_TYPE || code0 == REAL_TYPE
diff --git a/gcc/cp/call.c b/gcc/cp/call.c
index 367d42b..0488b82 100644
--- a/gcc/cp/call.c
+++ b/gcc/cp/call.c
@@ -4615,6 +4615,15 @@ build_conditional_expr_1 (location_t loc, tree arg1, 
tree arg2, tree arg3,
 
   if (VECTOR_INTEGER_TYPE_P (TREE_TYPE (arg1)))
 {
+  /* If arg1 is another cond_expr choosing between -1 and 0,
+then we can use its comparison.  It may help to avoid
+additional comparison, produce more accurate diagnostics
+and enables folding.  */
+  if (TREE_CODE (arg1) == VEC_COND_EXPR
+ && integer_minus_onep (TREE_OPERAND (arg1, 1))
+ && integer_zerop (TREE_OPERAND (arg1, 2)))
+   arg1 = TREE_OPERAND (arg1, 0);
+
   arg1 = force_rvalue (arg1, complain);
   arg2 = force_rvalue (arg2, complain);
   arg3 = force_rvalue (arg3, complain);
@@ -4727,8 +4736,10 @@ build_conditional_expr_1 (location_t loc, tree arg1, 
tree arg2, tree arg3,
}
 
   if (!COMPARISON_CLASS_P (arg1))
-   arg1 = cp_build_binary_op (loc, NE_EXPR, arg1,
-  build_zero_cst (arg1_type), complain);
+   {
+ tree cmp_type = build_same_sized_truth_vector_type (arg1_type);
+ arg1 = build2 (NE_EXPR, cmp_type, arg1, build_zero_cst (arg1_type));
+   }
   return fold_build3 (VEC_COND_EXPR, arg2_type, arg1, arg2, arg3);
 }
 
diff --git a/gcc/cp/typeck.c b/gcc/cp/typeck.c
index 482e42c..96b1683 100644
--- a/gcc/cp/typeck.c
+++ b/gcc/cp/typeck.c
@@ -3900,6 

[[Boolean Vector, patch 5/5] Support boolean vectors in vector lowering

[Ilya Enkovich]

Hi,

This patch supports boolean vectors in vector lowering.  Main change is to 
lower vector comparison into comparisons, not cond_exprs.

Thanks,
Ilya
--
2015-10-02  Ilya Enkovich  

* tree-vect-generic.c (elem_op_func): Add new operand to hold
vector type.
(do_unop): Adjust to modified function type.
(do_binop): Likewise.
(do_plus_minus): Likewise.
(do_negate); Likewise.
(expand_vector_piecewise): Likewise.
(do_cond): Likewise.
(do_compare): Use comparison instead of condition.
(expand_vector_divmod): Use boolean vector type for comparison.
(expand_vector_operations_1): Skip scalar mask operations.


diff --git a/gcc/tree-vect-generic.c b/gcc/tree-vect-generic.c
index dad38a2..a20b9af 100644
--- a/gcc/tree-vect-generic.c
+++ b/gcc/tree-vect-generic.c
@@ -105,14 +105,27 @@ build_word_mode_vector_type (int nunits)
 }
 
 typedef tree (*elem_op_func) (gimple_stmt_iterator *,
- tree, tree, tree, tree, tree, enum tree_code);
+ tree, tree, tree, tree, tree, enum tree_code,
+ tree);
 
 static inline tree
 tree_vec_extract (gimple_stmt_iterator *gsi, tree type,
  tree t, tree bitsize, tree bitpos)
 {
   if (bitpos)
-return gimplify_build3 (gsi, BIT_FIELD_REF, type, t, bitsize, bitpos);
+{
+  if (TREE_CODE (type) == BOOLEAN_TYPE)
+   {
+ tree itype
+   = build_nonstandard_integer_type (tree_to_uhwi (bitsize), 0);
+ tree field = gimplify_build3 (gsi, BIT_FIELD_REF, itype, t,
+   bitsize, bitpos);
+ return gimplify_build2 (gsi, NE_EXPR, type, field,
+ build_zero_cst (itype));
+   }
+  else
+   return gimplify_build3 (gsi, BIT_FIELD_REF, type, t, bitsize, bitpos);
+}
   else
 return gimplify_build1 (gsi, VIEW_CONVERT_EXPR, type, t);
 }
@@ -120,7 +133,7 @@ tree_vec_extract (gimple_stmt_iterator *gsi, tree type,
 static tree
 do_unop (gimple_stmt_iterator *gsi, tree inner_type, tree a,
 tree b ATTRIBUTE_UNUSED, tree bitpos, tree bitsize,
-enum tree_code code)
+enum tree_code code, tree type ATTRIBUTE_UNUSED)
 {
   a = tree_vec_extract (gsi, inner_type, a, bitsize, bitpos);
   return gimplify_build1 (gsi, code, inner_type, a);
@@ -128,7 +141,8 @@ do_unop (gimple_stmt_iterator *gsi, tree inner_type, tree a,
 
 static tree
 do_binop (gimple_stmt_iterator *gsi, tree inner_type, tree a, tree b,
- tree bitpos, tree bitsize, enum tree_code code)
+ tree bitpos, tree bitsize, enum tree_code code,
+ tree type ATTRIBUTE_UNUSED)
 {
   if (TREE_CODE (TREE_TYPE (a)) == VECTOR_TYPE)
 a = tree_vec_extract (gsi, inner_type, a, bitsize, bitpos);
@@ -145,20 +159,12 @@ do_binop (gimple_stmt_iterator *gsi, tree inner_type, 
tree a, tree b,
size equal to the size of INNER_TYPE.  */
 static tree
 do_compare (gimple_stmt_iterator *gsi, tree inner_type, tree a, tree b,
- tree bitpos, tree bitsize, enum tree_code code)
+   tree bitpos, tree bitsize, enum tree_code code, tree type)
 {
-  tree comp_type;
-
   a = tree_vec_extract (gsi, inner_type, a, bitsize, bitpos);
   b = tree_vec_extract (gsi, inner_type, b, bitsize, bitpos);
 
-  comp_type = build_nonstandard_integer_type
- (GET_MODE_BITSIZE (TYPE_MODE (inner_type)), 0);
-
-  return gimplify_build3 (gsi, COND_EXPR, comp_type,
- fold_build2 (code, boolean_type_node, a, b),
- build_int_cst (comp_type, -1),
- build_int_cst (comp_type, 0));
+  return gimplify_build2 (gsi, code, TREE_TYPE (type), a, b);
 }
 
 /* Expand vector addition to scalars.  This does bit twiddling
@@ -177,7 +183,7 @@ do_compare (gimple_stmt_iterator *gsi, tree inner_type, 
tree a, tree b,
 static tree
 do_plus_minus (gimple_stmt_iterator *gsi, tree word_type, tree a, tree b,
   tree bitpos ATTRIBUTE_UNUSED, tree bitsize ATTRIBUTE_UNUSED,
-  enum tree_code code)
+  enum tree_code code, tree type ATTRIBUTE_UNUSED)
 {
   tree inner_type = TREE_TYPE (TREE_TYPE (a));
   unsigned HOST_WIDE_INT max;
@@ -209,7 +215,8 @@ static tree
 do_negate (gimple_stmt_iterator *gsi, tree word_type, tree b,
   tree unused ATTRIBUTE_UNUSED, tree bitpos ATTRIBUTE_UNUSED,
   tree bitsize ATTRIBUTE_UNUSED,
-  enum tree_code code ATTRIBUTE_UNUSED)
+  enum tree_code code ATTRIBUTE_UNUSED,
+  tree type ATTRIBUTE_UNUSED)
 {
   tree inner_type = TREE_TYPE (TREE_TYPE (b));
   HOST_WIDE_INT max;
@@ -255,7 +262,7 @@ expand_vector_piecewise (gimple_stmt_iterator *gsi, 
elem_op_func f,
   for (i = 0; i < nunits;
i += delta, index = int_const_binop (PLUS_EXPR, index, part_width))
 {
-  tree result = f (gsi, inner_type, a, b, index, part_width, code);
+  tree 

Re: [C/C++ PATCH] RFC: Implement -Wduplicated-cond (PR c/64249) (version 2)

[Marek Polacek]

On Wed, Sep 30, 2015 at 12:45:35PM -0600, Jeff Law wrote:
> On 09/30/2015 09:47 AM, Joseph Myers wrote:
> >The C front-end changes are OK.
> The rest are OK as well.

Thanks Jeff & Joseph.

I'm going to apply the patch soon; should it draw the ire of users, I'll
move the option to -Wextra.

Marek

Re: Do not describe -std=c11 etc. as experimental in c.opt help text

[Matthias Klose]

On 01.10.2015 19:01, Joseph Myers wrote:

I noticed that c.opt still described -std=c11 and related options as
experimental in the --help text.  This patch fixes this.


this seems to be true for the gcc-5 branch as well. Could you fix it there as 
well?

  Matthias

Re: [Patch match.pd] Add a simplify rule for x * copysign (1.0, y);

[Jakub Jelinek]

On Fri, Oct 02, 2015 at 10:18:01AM +0200, Richard Biener wrote:
> On Thu, Oct 1, 2015 at 8:36 PM, Jakub Jelinek  wrote:
> > On Thu, Oct 01, 2015 at 02:57:15PM +0100, James Greenhalgh wrote:
> >> 2015-10-01  James Greenhalgh  
> >>
> >>   * match.pd (mult (COPYSIGN:s real_onep @0) @1): New simplifier.
> >
> > Also, please note that
> > +  wide_int m = wi::min_value (TYPE_PRECISION (type), SIGNED);
> > +  tree tt
> > + = build_nonstandard_integer_type (TYPE_PRECISION (type),
> > +   false);
> > +  tree mask = wide_int_to_tree (tt, m);
> > is really not a reliable way to determine which bit to change.
> > In some floating format it is not possible at all, in others it might not
> > be the topmost bit of the precision, or might depend on
> > FLOAT_WORDS_BIG_ENDIAN etc., see expand_copysign_bit and expand_copysign
> > for details (e.g. one has to look at fmt->signbit_rw etc.).
> > So, I probably agree with Andrew that it would be better optimized during
> > expansion.  One issue for that though is that TER stops at calls, we'd need
> > to special case this case.
> 
> I agreee with optimizing this in expansion only.  The copysign form is shorter
> and it captures the high-level part of the operation better.  Say we later
> constant-propagate a positive real into y then chances are high we optimize
> the copysign form but not the lowered one.  Also if we ever get VRP to
> handle real-type ranges it would need to decipher the sequence as well.

But hacking TER for this special case might not be nice either, perhaps
we want an internal function that would represent this 
- CHANGESIGN (x, y) -- (x * copysign (1.0, y)) (or some better name) and
fold this say during fab pass or so, and then let expansion decide how exactly 
to
expand it (custom optab, or the generic tweaking of the bit, something else?).

BTW, it seems wrf also in many places uses MAX 
or MIN  (always in pairs), would that be also
something to optimize?

Also, the x * copysign (1.0, y) in wrf is actually x * (1/12.) * copysign (1.0, 
y)
(or similar - other constants), wouldn't it make more sense to optimize that
as x * copysign (1/12., y) first (at least if we can reassociate)?

Jakub

[Fortran, committed] Fix ICE in string array constructor (pr 62242 & pr 52332)

[Louis Krupp]

Revision 228368...

Louis

Re: [Patch match.pd] Add a simplify rule for x * copysign (1.0, y);

[James Greenhalgh]

On Fri, Oct 02, 2015 at 11:06:53AM +0100, Marek Polacek wrote:
> On Fri, Oct 02, 2015 at 11:58:42AM +0200, Jakub Jelinek wrote:
> > On Fri, Oct 02, 2015 at 11:45:08AM +0200, Richard Biener wrote:
> > > > Note, I won't have time to work on this in the near future (OpenMP work
> > > > still on the plate), so if James (or anyone else?) has time for that, it
> > > > would be greatly appreciated.
> > > 
> > > So maybe just open an enhancement bug for now, citing the WRF use.
> > 
> > PR67815.
> 
> James, are you interested in this one, or would you prefer if I take it?

I'm happy either way.

I haven't looked at reassoc before, so I don't know my way wround it, and
I'm out of office for a wedding in the next couple of weeks (+ other
ongoing stuff), so I'm not sure I'd be able to get a prototype out before
Stage 1 closes.

If you have the free cycles for it, I'd be happy for you to take it, if
not I'll try to get to it late this month.

Thanks,
James

Re: Add a build_real_truncate helper function

[Richard Biener]

On Thu, Oct 1, 2015 at 3:52 PM, Bernd Schmidt  wrote:
> On 10/01/2015 03:48 PM, Richard Sandiford wrote:
>>
>> ...which simplifies the match.pd patterns I'm about to add.
>>
>> Bootstrapped & regression-tested on x86_64-linux-gnu.  OK to install?
>
>
> Ok.

I wonder if it's worth a separate function - why not truncate
unconditionally in build_real?
In fact it looks like we might have non-canonical REAL_CSTs with
excess precision?

Richard.

>
> Bernd
>

Re: [Patch match.pd] Add a simplify rule for x * copysign (1.0, y);

[Richard Biener]

On Fri, Oct 2, 2015 at 11:03 AM, Jakub Jelinek  wrote:
> On Fri, Oct 02, 2015 at 10:18:01AM +0200, Richard Biener wrote:
>> On Thu, Oct 1, 2015 at 8:36 PM, Jakub Jelinek  wrote:
>> > On Thu, Oct 01, 2015 at 02:57:15PM +0100, James Greenhalgh wrote:
>> >> 2015-10-01  James Greenhalgh  
>> >>
>> >>   * match.pd (mult (COPYSIGN:s real_onep @0) @1): New simplifier.
>> >
>> > Also, please note that
>> > +  wide_int m = wi::min_value (TYPE_PRECISION (type), SIGNED);
>> > +  tree tt
>> > + = build_nonstandard_integer_type (TYPE_PRECISION (type),
>> > +   false);
>> > +  tree mask = wide_int_to_tree (tt, m);
>> > is really not a reliable way to determine which bit to change.
>> > In some floating format it is not possible at all, in others it might not
>> > be the topmost bit of the precision, or might depend on
>> > FLOAT_WORDS_BIG_ENDIAN etc., see expand_copysign_bit and expand_copysign
>> > for details (e.g. one has to look at fmt->signbit_rw etc.).
>> > So, I probably agree with Andrew that it would be better optimized during
>> > expansion.  One issue for that though is that TER stops at calls, we'd need
>> > to special case this case.
>>
>> I agreee with optimizing this in expansion only.  The copysign form is 
>> shorter
>> and it captures the high-level part of the operation better.  Say we later
>> constant-propagate a positive real into y then chances are high we optimize
>> the copysign form but not the lowered one.  Also if we ever get VRP to
>> handle real-type ranges it would need to decipher the sequence as well.
>
> But hacking TER for this special case might not be nice either, perhaps
> we want an internal function that would represent this
> - CHANGESIGN (x, y) -- (x * copysign (1.0, y)) (or some better name) and
> fold this say during fab pass or so, and then let expansion decide how 
> exactly to
> expand it (custom optab, or the generic tweaking of the bit, something else?).

In the long run I wanted to make special expansions not require TER by doing
those on the GIMPLE level in a separate pass right before expansion.

> BTW, it seems wrf also in many places uses MAX 
> or MIN  (always in pairs), would that be also
> something to optimize?

Hmm, we'll already CSE copysign so the question is how to optimize
tem1 = MAX ; tem2= MIN ;  Turn them back into control-flow?
What would we like to end up with in assembly?

> Also, the x * copysign (1.0, y) in wrf is actually x * (1/12.) * copysign 
> (1.0, y)
> (or similar - other constants), wouldn't it make more sense to optimize that
> as x * copysign (1/12., y) first (at least if we can reassociate)?

Yeah, I think CST * copysign (CST, ...) should constant fold to
copysign (CST', ...)
if that's always valid.  I don't think association comes into play
here but as always
you read the fine prints of the standard for FP optimziations...

Richard.

>
> Jakub

[Ada] Implement restricted aliasing for parameters

[Eric Botcazou]

In Ada, parameters can be passed by reference or by copy and, for some types, 
the mechanism is specified by the language whereas, for other types, it's up 
to the implementation.  In the former case, if the mechanism is by reference, 
full aliasing is allowed between parameters but, in the latter case, if the 
mechanism is by reference, only a limited form of aliasing is allowed (it's 
equivalent to what the language would allow if the mechanism was by copy).

So it's a weaker than 'restrict', in particular WAR (aka anti-) dependence 
must be honored between parameters, but it nevertheless makes it possible to 
vectorize certain classes of loops by making the iterations independent.
The patch implements minimal support for this by means of pragma ivdep.

Tested on x86_64-suse-linux, applied on the mainline.


2015-10-02  Eric Botcazou  

* gcc-interface/ada-tree.h (DECL_RESTRICTED_ALIASING_P): New flag.
* gcc-interface/decl.c (gnat_to_gnu_param): For parameters passed by
reference but whose type isn't by-ref and whose mechanism hasn't been
forced to by-ref, set the DECL_RESTRICTED_ALIASING_P flag directly on
them instead of changing their type.
* gcc-interface/trans.c (scan_rhs_r): New helper function.
(independent_iterations_p): New predicate.
(Loop_Statement_to_gnu): For a loop with an iteration scheme, set an
ivdep pragma if the iterations are independent.


2015-10-02  Eric Botcazou  

* gnat.dg/vect15.ad[sb]: New test.
* gnat.dg/vect16.ad[sb]: Likewise.
* gnat.dg/vect17.ad[sb]: Likewise.
* gnat.dg/vect18.ad[sb]: Likewise.


-- 
Eric BotcazouIndex: gcc-interface/decl.c
===
--- gcc-interface/decl.c	(revision 228315)
+++ gcc-interface/decl.c	(working copy)
@@ -5585,6 +5585,7 @@ gnat_to_gnu_param (Entity_Id gnat_param,
   bool ro_param = in_param && !Address_Taken (gnat_param);
   bool by_return = false, by_component_ptr = false;
   bool by_ref = false;
+  bool restricted_aliasing_p = false;
   tree gnu_param;
 
   /* Copy-return is used only for the first parameter of a valued procedure.
@@ -5675,15 +5676,12 @@ gnat_to_gnu_param (Entity_Id gnat_param,
 		   || (!foreign
 		   && default_pass_by_ref (gnu_param_type)
 {
+  gnu_param_type = build_reference_type (gnu_param_type);
   /* We take advantage of 6.2(12) by considering that references built for
 	 parameters whose type isn't by-ref and for which the mechanism hasn't
-	 been forced to by-ref are restrict-qualified in the C sense.  */
-  bool restrict_p
+	 been forced to by-ref allow only a restricted form of aliasing.  */
+  restricted_aliasing_p
 	= !TYPE_IS_BY_REFERENCE_P (gnu_param_type) && mech != By_Reference;
-  gnu_param_type = build_reference_type (gnu_param_type);
-  if (restrict_p)
-	gnu_param_type
-	  = change_qualified_type (gnu_param_type, TYPE_QUAL_RESTRICT);
   by_ref = true;
 }
 
@@ -5731,6 +5729,7 @@ gnat_to_gnu_param (Entity_Id gnat_param,
   DECL_POINTS_TO_READONLY_P (gnu_param)
 = (ro_param && (by_ref || by_component_ptr));
   DECL_CAN_NEVER_BE_NULL_P (gnu_param) = Can_Never_Be_Null (gnat_param);
+  DECL_RESTRICTED_ALIASING_P (gnu_param) = restricted_aliasing_p;
 
   /* If no Mechanism was specified, indicate what we're using, then
  back-annotate it.  */
Index: gcc-interface/trans.c
===
--- gcc-interface/trans.c	(revision 228373)
+++ gcc-interface/trans.c	(working copy)
@@ -2714,6 +2714,89 @@ can_be_lower_p (tree val1, tree val2)
   return tree_int_cst_lt (val1, val2);
 }
 
+/* Helper function for walk_tree, used by independent_iterations_p below.  */
+
+static tree
+scan_rhs_r (tree *tp, int *walk_subtrees, void *data)
+{
+  bitmap *params = (bitmap *)data;
+  tree t = *tp;
+
+  /* No need to walk into types or decls.  */
+  if (IS_TYPE_OR_DECL_P (t))
+*walk_subtrees = 0;
+
+  if (TREE_CODE (t) == PARM_DECL && bitmap_bit_p (*params, DECL_UID (t)))
+return t;
+
+  return NULL_TREE;
+}
+
+/* Return true if STMT_LIST generates independent iterations in a loop.  */
+
+static bool
+independent_iterations_p (tree stmt_list)
+{
+  tree_stmt_iterator tsi;
+  bitmap params = BITMAP_GGC_ALLOC();
+  auto_vec rhs;
+  tree iter;
+  int i;
+
+  if (TREE_CODE (stmt_list) == BIND_EXPR)
+stmt_list = BIND_EXPR_BODY (stmt_list);
+
+  /* Scan the list and return false on anything that is not either a check
+ or an assignment to a parameter with restricted aliasing.  */
+  for (tsi = tsi_start (stmt_list); !tsi_end_p (tsi); tsi_next ())
+{
+  tree stmt = tsi_stmt (tsi);
+
+  switch (TREE_CODE (stmt))
+	{
+	case COND_EXPR:
+	  {
+	if (COND_EXPR_ELSE (stmt))
+	  return false;
+	if (TREE_CODE (COND_EXPR_THEN (stmt)) != CALL_EXPR)
+	  return false;
+	tree func = get_callee_fndecl 

[Ada] Remove linear search in Pragma_to_gnu

[Eric Botcazou]

This shamelessly mimics what Manual implemented recently for the C family of 
compilers under PR c/49654 and PR c/49655.

Tested on x86_64-suse-linux, applied on the mainline.


2015-10-02  Eric Botcazou  

* gcc-interface/trans.c (Pragma_to_gnu) : Replace
linear search with call to find_opt and issue warnings if the -W
switch is not appropriate.


2015-10-02  Eric Botcazou  

* gnat.dg/warn13.adb: New test.


-- 
Eric BotcazouIndex: gcc-interface/trans.c
===
--- gcc-interface/trans.c	(revision 228377)
+++ gcc-interface/trans.c	(working copy)
@@ -1442,21 +1442,28 @@ Pragma_to_gnu (Node_Id gnat_node)
 	  gcc_unreachable ();
 
 	/* This is the same implementation as in the C family of compilers.  */
+	const unsigned int lang_mask = CL_Ada | CL_COMMON;
 	if (Present (gnat_expr))
 	  {
 	tree gnu_expr = gnat_to_gnu (gnat_expr);
-	const char *opt_string = TREE_STRING_POINTER (gnu_expr);
+	const char *option_string = TREE_STRING_POINTER (gnu_expr);
 	const int len = TREE_STRING_LENGTH (gnu_expr);
-	if (len < 3 || opt_string[0] != '-' || opt_string[1] != 'W')
+	if (len < 3 || option_string[0] != '-' || option_string[1] != 'W')
 	  break;
-	for (option_index = 0;
-		 option_index < cl_options_count;
-		 option_index++)
-	  if (strcmp (cl_options[option_index].opt_text, opt_string) == 0)
+	option_index = find_opt (option_string + 1, lang_mask);
+	if (option_index == OPT_SPECIAL_unknown)
+	  {
+		post_error ("?unknown -W switch", gnat_node);
 		break;
-	if (option_index == cl_options_count)
+	  }
+	else if (!(cl_options[option_index].flags & CL_WARNING))
+	  {
+		post_error ("?-W switch does not control warning", gnat_node);
+		break;
+	  }
+	else if (!(cl_options[option_index].flags & lang_mask))
 	  {
-		post_error ("unknown -W switch", gnat_node);
+		post_error ("?-W switch not valid for Ada", gnat_node);
 		break;
 	  }
 	  }
@@ -1465,7 +1472,7 @@ Pragma_to_gnu (Node_Id gnat_node)
 
 	set_default_handlers ();
 	control_warning_option (option_index, (int) kind, imply, location,
-CL_Ada, , _options,
+lang_mask, , _options,
 _options_set, global_dc);
   }
   break;
-- { dg-compile }

procedure Warn13 is

  pragma Warnings ("-Wbogus");  -- { dg-warning "unknown" }
  pragma Warnings ("-Werror");  -- { dg-warning "does not control warning" }
  pragma Warnings ("-Wformat"); -- { dg-warning "switch not valid for Ada" }

begin
  null;
end;

Re: Do not use TYPE_CANONICAL in useless_type_conversion

[Eric Botcazou]

> I believe TYPE_ALIGN_OK should be "lowered" so that if you have a
> handled-component chain with some intermediate TYPE_ALIGN_OK you
> lower it to taking the address of that component and dereferencing
> it (which is where the middle-end always trusts the alignment of
> the type of the dereference).  I don't think we honor TYPE_ALIGN_OK
> "ok" everywhere ("ok" in the optimistic sense).

In the original design, TYPE_ALIGN_OK need not be honored or acted upon, it 
just needs to be preserved.  It's only set on VIEW_CONVERT_EXPRs so that the 
RTL expander doesn't create temporaries on strict-alignment considerations,
so it's essentially a flag on VIEW_CONVERT_EXPR but set on the target type 
which can be ignored entirely at the GIMPLE level as long as it's preserved.

-- 
Eric Botcazou

[PR66776][PATCH][AARCH64] Add cmovdi_insn_uxtw pattern.

[Renlin Li]

Hi all,

This is a simple patch to add a new cmovdi_insn_uxtw rtx pattern to 
aarch64 backend.


For the following simple test case:

unsigned long long
foo (unsigned int a, unsigned int b, unsigned int c)
{
  return a ? b : c;
}

With this new pattern, the new code-generation will be:

cmpw0, wzr
cselw0, w1, w2, ne
ret

Without the path, the old code-generation is like this:
uxtwx2, w2
uxtwx1, w1
cmp w0, wzr
cselx0, x2, x1, eq
ret


aarch64-none-elf regression test Okay. Okay to commit?

Regards,
Renlin Li

gcc/ChangeLog:

2015-10-02  Renlin Li  

PR target/66776
* config/aarch64/aarch64.md (cmovdi_insn_uxtw): New pattern.

gcc/testsuite/ChangeLog:

2015-10-02  Renlin Li  

PR target/66776
* gcc.target/aarch64/pr66776.c: New.

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index c3cd58d..20681cd 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -3010,6 +3010,18 @@
   [(set_attr "type" "csel")]
 )
 
+(define_insn "*cmovdi_insn_uxtw"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+	(if_then_else:DI
+	 (match_operator 1 "aarch64_comparison_operator"
+	  [(match_operand 2 "cc_register" "") (const_int 0)])
+	 (zero_extend:DI (match_operand:SI 3 "register_operand" "r"))
+	 (zero_extend:DI (match_operand:SI 4 "register_operand" "r"]
+  ""
+  "csel\\t%w0, %w3, %w4, %m1"
+  [(set_attr "type" "csel")]
+)
+
 (define_insn "*cmov_insn"
   [(set (match_operand:GPF 0 "register_operand" "=w")
 	(if_then_else:GPF
diff --git a/gcc/testsuite/gcc.target/aarch64/pr66776.c b/gcc/testsuite/gcc.target/aarch64/pr66776.c
new file mode 100644
index 000..a5c83b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr66776.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 --save-temps" } */
+
+unsigned long long
+foo (unsigned int a, unsigned int b, unsigned int c)
+{
+  return a ? b : c;
+}
+
+/* { dg-final { scan-assembler-not "uxtw" } } */

Re: [Patch match.pd] Add a simplify rule for x * copysign (1.0, y);

[Richard Biener]

On Fri, Oct 2, 2015 at 12:24 PM, James Greenhalgh
 wrote:
> On Fri, Oct 02, 2015 at 11:06:53AM +0100, Marek Polacek wrote:
>> On Fri, Oct 02, 2015 at 11:58:42AM +0200, Jakub Jelinek wrote:
>> > On Fri, Oct 02, 2015 at 11:45:08AM +0200, Richard Biener wrote:
>> > > > Note, I won't have time to work on this in the near future (OpenMP work
>> > > > still on the plate), so if James (or anyone else?) has time for that, 
>> > > > it
>> > > > would be greatly appreciated.
>> > >
>> > > So maybe just open an enhancement bug for now, citing the WRF use.
>> >
>> > PR67815.
>>
>> James, are you interested in this one, or would you prefer if I take it?
>
> I'm happy either way.
>
> I haven't looked at reassoc before, so I don't know my way wround it, and
> I'm out of office for a wedding in the next couple of weeks (+ other
> ongoing stuff), so I'm not sure I'd be able to get a prototype out before
> Stage 1 closes.

Well, now that it has a  bug it will be a bugfix and thus qualify for
stage 3 

Richard.

> If you have the free cycles for it, I'd be happy for you to take it, if
> not I'll try to get to it late this month.
>
> Thanks,
> James
>

Re: [PATCH] Improve DOM's optimization of control statements

[Renlin Li]

Hi Jeff,

Your patch causes an ICE regression.
The test case is " gcc.c-torture/compile/pr27087.c", I observed it on 
aarch64-none-elf target when compiling the test case with '-Os' flag.


A quick check shows, the cfg has been changed, but the loop information 
is not updated. Thus the information about the number of basic block in 
a loop is not reliable.


Could you please have a look?

Regards,
Renlin

On 30/09/15 21:28, Jeff Law wrote:

Until now DOM has had to be very conservative with handling control
statements with known conditions.  This as been an unfortunate side
effect of the interaction between removing edges and recycling names via
the SSA_NAME manager.

Essentially DOM would have to leave control statements alone.  So you'd
see stuff like

if (0 == 0)

left around by DOM.  The jump threader would thankfully come along and
optimize that as a jump thread.  But that's terribly inefficient, not to
mention it creates unnecessary churn in the CFG and SSA_NAMEs.

By optimizing that directly in DOM, including removing whatever edges
are not executable, we no longer have to rely on jump threading to
handle that case.  Less churn in the CFG & SSA_NAMEs.   There's also
some chance for secondary optimizations with fewer edges left in the CFG
for DOM to consider.

Unfortunately, the churn caused by jump threading made it excessively
difficult to analyze before/after dumps.  Sadly, you can have the same
code, but if the SSA_NAMEs have changed, that impacts coalescing as we
leave SSA.  Churn in the CFG changes labels/jumps, often without
changing the actual structure, etc.

I did some tests with valgrind to evaluate branching behaviour
before/after effects on the resulting code and those effects were tiny,
in the I doubt you could measure them range.  That was expected since
what we're really doing here is just capturing the optimization earlier.

I had a couple more tests, but they were lost in a bit of idiocy.  The
test included is the one I had a second copy of lying around.

Bootstrapped and regression tested on x86_64-linux-gnu.  Installed on
the trunk.

Jeff

Re: [patch] libstdc++/67747 Allocate space for dirent::d_name

[Florian Weimer]

On 09/29/2015 01:37 PM, Jonathan Wakely wrote:
> POSIX says that dirent::d_name has an unspecified length, so calls to
> readdir_r must pass a buffer with enough trailing space for
> {NAME_MAX}+1 characters. I wasn't doing that, which works OK on
> GNU/Linux and BSD where d_name is a large array, but fails on Solaris
> 32-bit.
> 
> This uses pathconf to get NAME_MAX and allocates a buffer.

This still has a buffer overflow on certain file systems.

You must not use readdir_r, it is deprecated and always insecure.  We
should probably mark it as such in the glibc headers.

Have we already released code which uses readdir_r?

Florian

[Patch AArch64] Improve SIMD concatenation with zeroes

[James Greenhalgh]

Hi,

In AArch64, SIMD instructions which only touch the bottom 64-bits of a
vector register write zeroes to the upper 64-bits. In other words, we have
a cheap way to implement a "zero extend" of a SIMD operation, and can
generate efficient code for:

  [(set (match_operand 0)
(vec_concat:128-bit mode
   (other vector operations in a 64-bit mode)
   (match_operand 2 [zeroes])))]

And for the big-endian equivalent of this.

This small patch catches two important cases of this, namely loading a
64-bit vector and moving a 64-bit vector from general purpose registers to
vector registers.

Bootstrapped on aarch64-none-linux-gnu with no issues, and aarch64.exp run
for aarch64_be-none-elf.

Ok for trunk?

Thanks,
James
---
gcc/

2015-10-01  James Greenhalgh  

* config/aarch64/aarch64-simd.md (*aarch64_combinez): Add
alternatives for reads from memory and moves from general-purpose
registers.
(*aarch64_combinez_be): Likewise.

2015-10-01  James Greenhalgh  

* gcc.target/aarch64/vect_combine_zeroes_1.c: New.

diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index 541faf9..6a2ab61 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -2530,23 +2530,33 @@
 ;; dest vector.
 
 (define_insn "*aarch64_combinez"
-  [(set (match_operand: 0 "register_operand" "=")
+  [(set (match_operand: 0 "register_operand" "=w,w,w")
 (vec_concat:
-	   (match_operand:VD_BHSI 1 "register_operand" "w")
-	   (match_operand:VD_BHSI 2 "aarch64_simd_imm_zero" "Dz")))]
+	   (match_operand:VD_BHSI 1 "general_operand" "w,r,m")
+	   (match_operand:VD_BHSI 2 "aarch64_simd_imm_zero" "Dz,Dz,Dz")))]
   "TARGET_SIMD && !BYTES_BIG_ENDIAN"
-  "mov\\t%0.8b, %1.8b"
-  [(set_attr "type" "neon_move")]
+  "@
+   mov\\t%0.8b, %1.8b
+   fmov\t%d0, %1
+   ldr\\t%d0, %1"
+  [(set_attr "type" "neon_move, neon_from_gp, neon_load1_1reg")
+   (set_attr "simd" "yes,*,yes")
+   (set_attr "fp" "*,yes,*")]
 )
 
 (define_insn "*aarch64_combinez_be"
-  [(set (match_operand: 0 "register_operand" "=")
+  [(set (match_operand: 0 "register_operand" "=w,w,w")
 (vec_concat:
-	   (match_operand:VD_BHSI 2 "aarch64_simd_imm_zero" "Dz")
-	   (match_operand:VD_BHSI 1 "register_operand" "w")))]
+	   (match_operand:VD_BHSI 2 "aarch64_simd_imm_zero" "Dz,Dz,Dz")
+	   (match_operand:VD_BHSI 1 "general_operand" "w,r,m")))]
   "TARGET_SIMD && BYTES_BIG_ENDIAN"
-  "mov\\t%0.8b, %1.8b"
-  [(set_attr "type" "neon_move")]
+  "@
+   mov\\t%0.8b, %1.8b
+   fmov\t%d0, %1
+   ldr\\t%d0, %1"
+  [(set_attr "type" "neon_move, neon_from_gp, neon_load1_1reg")
+   (set_attr "simd" "yes,*,yes")
+   (set_attr "fp" "*,yes,*")]
 )
 
 (define_expand "aarch64_combine"
diff --git a/gcc/testsuite/gcc.target/aarch64/vect_combine_zeroes_1.c b/gcc/testsuite/gcc.target/aarch64/vect_combine_zeroes_1.c
new file mode 100644
index 000..6257fa9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vect_combine_zeroes_1.c
@@ -0,0 +1,24 @@
+/* { dg-options "-O2 --save-temps" } */
+
+#include "arm_neon.h"
+
+int32x4_t
+foo (int32x2_t *x)
+{
+  int32x2_t i = *x;
+  int32x2_t zeroes = vcreate_s32 (0l);
+  int32x4_t ret = vcombine_s32 (i, zeroes);
+  return ret;
+}
+
+int32x4_t
+bar (int64_t x)
+{
+  int32x2_t i = vcreate_s32 (x);
+  int32x2_t zeroes = vcreate_s32 (0l);
+  int32x4_t ret = vcombine_s32 (i, zeroes);
+  return ret;
+}
+
+/* { dg-final { scan-assembler-not "mov\tv\[0-9\]+.8b, v\[0-9\]+.8b" } } */
+

Re: [Patch AArch64] Improve SIMD concatenation with zeroes

[Marcus Shawcroft]

On 02/10/15 09:12, James Greenhalgh wrote:


2015-10-01  James Greenhalgh  

* config/aarch64/aarch64-simd.md (*aarch64_combinez): Add
alternatives for reads from memory and moves from general-purpose
registers.
(*aarch64_combinez_be): Likewise.

2015-10-01  James Greenhalgh  

* gcc.target/aarch64/vect_combine_zeroes_1.c: New.



OK /Marcus

[PATCH COMMITTED] MAINTAINERS (Write After Approval): Add myself.

[Louis Krupp]

I have just added myself.

Index: ChangeLog
===
--- ChangeLog   (revision 228379)
+++ ChangeLog   (working copy)
@@ -1,3 +1,7 @@
+2015-10-02  Louis Krupp 
+
+   * MAINTAINERS  (Write After Approval): Add myself.
+
 2015-09-20  Kai Tietz  
 
 * MAINTAINERS: Update email.
Index: MAINTAINERS
===
--- MAINTAINERS (revision 228379)
+++ MAINTAINERS (working copy)
@@ -455,6 +455,7 @@ Jeff Knaggs 

 Michael Koch   
 Matt Kraai 
 Jan Kratochvil 
+Louis Krupp
 Prathamesh Kulkarni
 Venkataramanan Kumar   
 Maxim Kuvyrkov 

Re: [Patch match.pd] Add a simplify rule for x * copysign (1.0, y);

[Richard Biener]

On Fri, Oct 2, 2015 at 11:27 AM, Jakub Jelinek  wrote:
> On Fri, Oct 02, 2015 at 11:10:58AM +0200, Richard Biener wrote:
>> > BTW, it seems wrf also in many places uses MAX 
>> > or MIN  (always in pairs), would that be also
>> > something to optimize?
>>
>> Hmm, we'll already CSE copysign so the question is how to optimize
>> tem1 = MAX ; tem2= MIN ;  Turn them back into control-flow?
>> What would we like to end up with in assembly?
>
> This wasn't a well thought thing.  Just that perhaps depending on how
> copysign is expanded we might merge that with the min/max somehow.
>
>> > Also, the x * copysign (1.0, y) in wrf is actually x * (1/12.) * copysign 
>> > (1.0, y)
>> > (or similar - other constants), wouldn't it make more sense to optimize 
>> > that
>> > as x * copysign (1/12., y) first (at least if we can reassociate)?
>>
>> Yeah, I think CST * copysign (CST, ...) should constant fold to
>> copysign (CST', ...)
>> if that's always valid.  I don't think association comes into play
>> here but as always
>> you read the fine prints of the standard for FP optimziations...
>
> The reason talking about reassoc is that we might not necessarily see
> CST * copysign (CST, ...) in the IL, but something different:
>   _2051 = __builtin_copysignf (1.0e+0, vel_2000);
> ...
>   _2059 = _2051 * _2058;
>   _2060 = _2059 * 1.66753590106964111328125e-2;
> is before reassoc1 and
>   _2051 = __builtin_copysignf (1.0e+0, vel_2000);
> ...
>   _2047 = _2051 * 1.66753590106964111328125e-2;
>   _2060 = _2047 * _2058;
> is after reassoc1, so in this case reassoc1 worked fine, but in another spot
> I see
>   _2968 = __builtin_copysignf (1.0e+0, vel_2943);
> ...
>   _2973 = _2968 * _2972;
>   _2974 = _2973 * 8.335816860198974609375e-2;
> before reassoc1 and
>   _2968 = __builtin_copysignf (1.0e+0, vel_2943);
> ...
>   _3008 = _2972 * 8.335816860198974609375e-2;
>   _2974 = _3008 * _2968;
> after reassoc1, so clearly reassoc puts those two together only randomly.
> So, either we'd teach reassoc to prefer putting constant and copysign of
> constant together, or even perform this optimization, or the match.pd
> (or elsewhere) change would need additional smarts.

I think for this case reassoc would need to assign the proper 'rank' to
the DEF with the copysign (based on the rank of its first argument).

But yes, this kind of association dependent patterns need to be handled
in reassoc itself.

> Note, I won't have time to work on this in the near future (OpenMP work
> still on the plate), so if James (or anyone else?) has time for that, it
> would be greatly appreciated.

So maybe just open an enhancement bug for now, citing the WRF use.

Richard.

> Jakub

[Patch AArch64] Use default_elf_asm_named_section instead of special cased hook

[Ramana Radhakrishnan]

Hi,

The hook for TARGET_ASM_NAMED_SECTION was defined separately in
the backend around the time frame for GCC 4.7 under the assumption
that '@' would be used as a comment character in the binutils port.

This was indeed true in versions of the AArch64 port that never made it
into the FSF tree. However this practice was killed
before the binutils port made it upstream. Doing archaeology into
various revisions including the first commit of upstream binutils, 
talking to Marcus about the history of this and actually testing the
first commit of binutils, I can confidently say that the upstream binutils
port never had any use of '@' as a comment character for AArch64
However we never got rid of the special cased handling in
GCC and the duplication of code in the AArch64 backend.

This was found when I was playing with Virtual Table verification
on ARM and AArch64 and discovered ICEs which were similar but manifested
in different places begging the obvious question.

Tested on aarch64-none-elf with no regressions.

Ok to apply ?

Ramana

* config/aarch64/aarch64-elf.h (TARGET_ASM_NAMED_SECTION): Use
default_elf_asm_named_section.
* config/aarch64/aarch64.c (aarch64_elf_asm_named_section): Delete.
---
 gcc/config/aarch64/aarch64-elf.h |  2 +-
 gcc/config/aarch64/aarch64.c | 74 
 2 files changed, 1 insertion(+), 75 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-elf.h b/gcc/config/aarch64/aarch64-elf.h
index 1ce6343..70aa845 100644
--- a/gcc/config/aarch64/aarch64-elf.h
+++ b/gcc/config/aarch64/aarch64-elf.h
@@ -154,7 +154,7 @@ ASM_MABI_SPEC
 #define TYPE_OPERAND_FMT   "%%%s"
 
 #undef TARGET_ASM_NAMED_SECTION
-#define TARGET_ASM_NAMED_SECTION  aarch64_elf_asm_named_section
+#define TARGET_ASM_NAMED_SECTION  default_elf_asm_named_section
 
 /* Stabs debug not required.  */
 #undef DBX_DEBUGGING_INFO
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 4d2126b..0ead7c0 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -10784,80 +10784,6 @@ aarch64_shift_truncation_mask (machine_mode mode)
  || aarch64_vect_struct_mode_p (mode)) ? 0 : (GET_MODE_BITSIZE (mode) - 1);
 }
 
-#ifndef TLS_SECTION_ASM_FLAG
-#define TLS_SECTION_ASM_FLAG 'T'
-#endif
-
-void
-aarch64_elf_asm_named_section (const char *name, unsigned int flags,
-  tree decl ATTRIBUTE_UNUSED)
-{
-  char flagchars[10], *f = flagchars;
-
-  /* If we have already declared this section, we can use an
- abbreviated form to switch back to it -- unless this section is
- part of a COMDAT groups, in which case GAS requires the full
- declaration every time.  */
-  if (!(HAVE_COMDAT_GROUP && (flags & SECTION_LINKONCE))
-  && (flags & SECTION_DECLARED))
-{
-  fprintf (asm_out_file, "\t.section\t%s\n", name);
-  return;
-}
-
-  if (!(flags & SECTION_DEBUG))
-*f++ = 'a';
-  if (flags & SECTION_WRITE)
-*f++ = 'w';
-  if (flags & SECTION_CODE)
-*f++ = 'x';
-  if (flags & SECTION_SMALL)
-*f++ = 's';
-  if (flags & SECTION_MERGE)
-*f++ = 'M';
-  if (flags & SECTION_STRINGS)
-*f++ = 'S';
-  if (flags & SECTION_TLS)
-*f++ = TLS_SECTION_ASM_FLAG;
-  if (HAVE_COMDAT_GROUP && (flags & SECTION_LINKONCE))
-*f++ = 'G';
-  *f = '\0';
-
-  fprintf (asm_out_file, "\t.section\t%s,\"%s\"", name, flagchars);
-
-  if (!(flags & SECTION_NOTYPE))
-{
-  const char *type;
-  const char *format;
-
-  if (flags & SECTION_BSS)
-   type = "nobits";
-  else
-   type = "progbits";
-
-#ifdef TYPE_OPERAND_FMT
-  format = "," TYPE_OPERAND_FMT;
-#else
-  format = ",@%s";
-#endif
-
-  fprintf (asm_out_file, format, type);
-
-  if (flags & SECTION_ENTSIZE)
-   fprintf (asm_out_file, ",%d", flags & SECTION_ENTSIZE);
-  if (HAVE_COMDAT_GROUP && (flags & SECTION_LINKONCE))
-   {
- if (TREE_CODE (decl) == IDENTIFIER_NODE)
-   fprintf (asm_out_file, ",%s,comdat", IDENTIFIER_POINTER (decl));
- else
-   fprintf (asm_out_file, ",%s,comdat",
-IDENTIFIER_POINTER (DECL_COMDAT_GROUP (decl)));
-   }
-}
-
-  putc ('\n', asm_out_file);
-}
-
 /* Select a format to encode pointers in exception handling data.  */
 int
 aarch64_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, int global)
-- 
1.9.1

[gomp4] Merge trunk r228315 (2015-10-01) into gomp-4_0-branch

[Thomas Schwinge]

Hi!

Committed to gomp-4_0-branch in r228382:

commit 519d8cb612e9d641d133e4f65b4a48c3ef963f43
Merge: 5094830 b5409c8
Author: tschwinge 
Date:   Fri Oct 2 10:01:27 2015 +

svn merge -r 228054:228315 svn+ssh://gcc.gnu.org/svn/gcc/trunk


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gomp-4_0-branch@228382 
138bc75d-0d04-0410-961f-82ee72b054a4


Grüße,
 Thomas


signature.asc
Description: PGP signature

[PATCH COMMITTED] Update MAINTAINERS

[Florian Weimer]

Just an email address update.
Index: ChangeLog
===
--- ChangeLog	(revision 228382)
+++ ChangeLog	(working copy)
@@ -1,3 +1,7 @@
+2015-10-02  Florian Weimer  
+
+	* MAINTAINERS: Update email address.
+
 2015-10-02  Louis Krupp 
 
 	* MAINTAINERS  (Write After Approval): Add myself.
Index: MAINTAINERS
===
--- MAINTAINERS	(revision 228382)
+++ MAINTAINERS	(working copy)
@@ -606,7 +606,7 @@
 Jiong Wang	
 Stephen M. Webb	
 John Wehle	
-Florian Weimer	
+Florian Weimer	
 Zack Weinberg	
 Mark Wielaard	
 Edmar Wienskoski

Re: [Patch match.pd] Add a simplify rule for x * copysign (1.0, y);

[Richard Biener]

On Thu, Oct 1, 2015 at 8:36 PM, Jakub Jelinek  wrote:
> On Thu, Oct 01, 2015 at 02:57:15PM +0100, James Greenhalgh wrote:
>> 2015-10-01  James Greenhalgh  
>>
>>   * match.pd (mult (COPYSIGN:s real_onep @0) @1): New simplifier.
>
> Also, please note that
> +  wide_int m = wi::min_value (TYPE_PRECISION (type), SIGNED);
> +  tree tt
> + = build_nonstandard_integer_type (TYPE_PRECISION (type),
> +   false);
> +  tree mask = wide_int_to_tree (tt, m);
> is really not a reliable way to determine which bit to change.
> In some floating format it is not possible at all, in others it might not
> be the topmost bit of the precision, or might depend on
> FLOAT_WORDS_BIG_ENDIAN etc., see expand_copysign_bit and expand_copysign
> for details (e.g. one has to look at fmt->signbit_rw etc.).
> So, I probably agree with Andrew that it would be better optimized during
> expansion.  One issue for that though is that TER stops at calls, we'd need
> to special case this case.

I agreee with optimizing this in expansion only.  The copysign form is shorter
and it captures the high-level part of the operation better.  Say we later
constant-propagate a positive real into y then chances are high we optimize
the copysign form but not the lowered one.  Also if we ever get VRP to
handle real-type ranges it would need to decipher the sequence as well.

Richard.

> Jakub

[PATCH][AARCH64]Add csneg3_uxtw_insn pattern

[Renlin Li]

Hi all,

This is a simple patch to add csneg3_uxtw_insn into aarch64 backend. It 
will save one uxtw instruction as a write to the 32-bit w-register 
implicitly

zero-extends the value up to the full 64 bits of an x-register.

aarch64-none-elf regression test Okay without any issues. Okay to commit?

Regards,
Renlin Li


gcc/ChangeLog:

2015-10-02  Renlin Li 

* config/aarch64/aarch64.md (csneg3_uxtw_insn): New pattern.

gcc/testsuite/ChangeLog:

2015-10-02  Renlin Li 

* gcc.target/aarch64/csneg-1.c: Update test.
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index c3cd58d..373f2d5 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -3132,6 +3132,18 @@
   [(set_attr "type" "csel")]
 )
 
+(define_insn "csneg3_uxtw_insn"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+	(zero_extend:DI
+	  (if_then_else:SI
+	(match_operand 1 "aarch64_comparison_operation" "")
+	(neg:SI (match_operand:SI 2 "register_operand" "r"))
+	(match_operand:SI 3 "aarch64_reg_or_zero" "rZ"]
+  ""
+  "csneg\\t%w0, %w3, %w2, %M1"
+  [(set_attr "type" "csel")]
+)
+
 (define_insn "csneg3_insn"
   [(set (match_operand:GPI 0 "register_operand" "=r")
 (if_then_else:GPI
diff --git a/gcc/testsuite/gcc.target/aarch64/csneg-1.c b/gcc/testsuite/gcc.target/aarch64/csneg-1.c
index 29d4e4e..4860d64 100644
--- a/gcc/testsuite/gcc.target/aarch64/csneg-1.c
+++ b/gcc/testsuite/gcc.target/aarch64/csneg-1.c
@@ -56,3 +56,15 @@ int test_csneg_cmp(int x)
 x = -x;
   return x;
 }
+
+unsigned long long
+test_csneg_uxtw (unsigned int a,
+		 unsigned int b,
+		 unsigned int c)
+{
+  /* { dg-final { scan-assembler "csneg\tw\[0-9\]*.*ne" } } */
+  /* { dg-final { scan-assembler-not "uxtw\tw\[0-9\]*.*" } } */
+  unsigned int val;
+  val = a ? b: -c;
+  return val;
+}

Re: [Patch match.pd] Add a simplify rule for x * copysign (1.0, y);

[Jakub Jelinek]

On Fri, Oct 02, 2015 at 11:45:08AM +0200, Richard Biener wrote:
> > Note, I won't have time to work on this in the near future (OpenMP work
> > still on the plate), so if James (or anyone else?) has time for that, it
> > would be greatly appreciated.
> 
> So maybe just open an enhancement bug for now, citing the WRF use.

PR67815.

Jakub

Re: [Patch match.pd] Add a simplify rule for x * copysign (1.0, y);

[Marek Polacek]

On Fri, Oct 02, 2015 at 11:24:32AM +0100, James Greenhalgh wrote:
> > > PR67815.
> > 
> > James, are you interested in this one, or would you prefer if I take it?
> 
> I'm happy either way.
> 
> I haven't looked at reassoc before, so I don't know my way wround it, and
> I'm out of office for a wedding in the next couple of weeks (+ other
> ongoing stuff), so I'm not sure I'd be able to get a prototype out before
> Stage 1 closes.

Congrats (if it's your wedding) ;).
 
> If you have the free cycles for it, I'd be happy for you to take it, if
> not I'll try to get to it late this month.

All right, I'll have a look at it next week; maybe I'll be able to come up
with something (I cringe when I see floating-point stuff).

Marek

Re: [PATCH][AARCH64]Add csneg3_uxtw_insn pattern

[James Greenhalgh]

On Fri, Oct 02, 2015 at 10:21:48AM +0100, Renlin Li wrote:
> Hi all,
> 
> This is a simple patch to add csneg3_uxtw_insn into aarch64 backend. It 
> will save one uxtw instruction as a write to the 32-bit w-register 
> implicitly
> zero-extends the value up to the full 64 bits of an x-register.
> 
> aarch64-none-elf regression test Okay without any issues. Okay to commit?

OK.

Thanks,
James

> gcc/ChangeLog:
> 
> 2015-10-02  Renlin Li 
> 
>  * config/aarch64/aarch64.md (csneg3_uxtw_insn): New pattern.
> 
> gcc/testsuite/ChangeLog:
> 
> 2015-10-02  Renlin Li 
> 
>  * gcc.target/aarch64/csneg-1.c: Update test.

> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
> index c3cd58d..373f2d5 100644
> --- a/gcc/config/aarch64/aarch64.md
> +++ b/gcc/config/aarch64/aarch64.md
> @@ -3132,6 +3132,18 @@
>[(set_attr "type" "csel")]
>  )
>  
> +(define_insn "csneg3_uxtw_insn"
> +  [(set (match_operand:DI 0 "register_operand" "=r")
> + (zero_extend:DI
> +   (if_then_else:SI
> + (match_operand 1 "aarch64_comparison_operation" "")
> + (neg:SI (match_operand:SI 2 "register_operand" "r"))
> + (match_operand:SI 3 "aarch64_reg_or_zero" "rZ"]
> +  ""
> +  "csneg\\t%w0, %w3, %w2, %M1"
> +  [(set_attr "type" "csel")]
> +)
> +
>  (define_insn "csneg3_insn"
>[(set (match_operand:GPI 0 "register_operand" "=r")
>  (if_then_else:GPI
> diff --git a/gcc/testsuite/gcc.target/aarch64/csneg-1.c 
> b/gcc/testsuite/gcc.target/aarch64/csneg-1.c
> index 29d4e4e..4860d64 100644
> --- a/gcc/testsuite/gcc.target/aarch64/csneg-1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/csneg-1.c
> @@ -56,3 +56,15 @@ int test_csneg_cmp(int x)
>  x = -x;
>return x;
>  }
> +
> +unsigned long long
> +test_csneg_uxtw (unsigned int a,
> +  unsigned int b,
> +  unsigned int c)
> +{
> +  /* { dg-final { scan-assembler "csneg\tw\[0-9\]*.*ne" } } */
> +  /* { dg-final { scan-assembler-not "uxtw\tw\[0-9\]*.*" } } */
> +  unsigned int val;
> +  val = a ? b: -c;
> +  return val;
> +}
> 

Re: [PR66776][PATCH][AARCH64] Add cmovdi_insn_uxtw pattern.

[James Greenhalgh]

On Fri, Oct 02, 2015 at 10:17:11AM +0100, Renlin Li wrote:
> Hi all,
> 
> This is a simple patch to add a new cmovdi_insn_uxtw rtx pattern to 
> aarch64 backend.
> 
> For the following simple test case:
> 
> unsigned long long
> foo (unsigned int a, unsigned int b, unsigned int c)
> {
>return a ? b : c;
> }
> 
> With this new pattern, the new code-generation will be:
> 
>  cmpw0, wzr
>  cselw0, w1, w2, ne
>  ret
> 
> Without the path, the old code-generation is like this:
>  uxtwx2, w2
>  uxtwx1, w1
>  cmp w0, wzr
>  cselx0, x2, x1, eq
>  ret
> 
> 
> aarch64-none-elf regression test Okay. Okay to commit?

OK.

Thanks,
James

> gcc/ChangeLog:
> 
> 2015-10-02  Renlin Li  
> 
>  PR target/66776
>  * config/aarch64/aarch64.md (cmovdi_insn_uxtw): New pattern.
> 
> gcc/testsuite/ChangeLog:
> 
> 2015-10-02  Renlin Li  
> 
>  PR target/66776
>  * gcc.target/aarch64/pr66776.c: New.
> 

Re: [wwwdocs] Buildstat update for 5.x

[Gerald Pfeifer]

On Sun, 13 Sep 2015, Tom G. Christensen wrote:
> Testresults for 5.2.0:
>   i686-unknown-linux-gnu
>   powerpc-unknown-linux-gnu
>   sparc-sun-solaris2.10
>   sparc64-sun-solaris2.10
>   x86_64-unknown-linux-gnu (4)
>   x86_64-w64-mingw32
> 
> Testresults for 5.1.0:
>   hppa64-hp-hpux11.00

Thanks, applied!

Gerald

[gomp4.1] Unsigned long long doacross implementation

[Jakub Jelinek]

Hi!

The default set of routines use long as the iterator type, if some loops
need either unsigned long, or long long/unsigned long long, they need to use
another implementation (__int128 iterators are not supported).
This patch adds those entry points and fixes some issues on the compiler
side.

2015-10-02  Jakub Jelinek  

* omp-low.c (expand_omp_ordered_source): Use GOMP_doacross_ull_post
instead of GOMP_doacross_post if iter_type is unsigned long long.
(expand_omp_ordered_sink): Use GOMP_doacross_ull_wait
instead of GOMP_doacross_wait if iter_type is unsigned long long.
(expand_omp_for_generic): Fix up expansion if zero_iter1_bb is
NULL, but zero_iter2_bb is non-NULL.  Never pass the up bool argument
to GOMP_loop_ull_doacross_*_start entrypoints.
* omp-builtins.def (BUILT_IN_GOMP_LOOP_ULL_DOACROSS_STATIC_START,
BUILT_IN_GOMP_LOOP_ULL_DOACROSS_DYNAMIC_START,
BUILT_IN_GOMP_LOOP_ULL_DOACROSS_GUIDED_START,
BUILT_IN_GOMP_LOOP_ULL_DOACROSS_RUNTIME_START,
BUILT_IN_GOMP_DOACROSS_ULL_POST, BUILT_IN_GOMP_DOACROSS_ULL_WAIT): New
built-ins.
* builtin-types.def (BT_FN_BOOL_UINT_ULLPTR_ULLPTR_ULLPTR,
BT_FN_BOOL_UINT_ULLPTR_ULL_ULLPTR_ULLPTR, BT_FN_VOID_ULL_VAR): New.
gcc/fortran/
* types.def (BT_FN_BOOL_UINT_ULLPTR_ULLPTR_ULLPTR,
BT_FN_BOOL_UINT_ULLPTR_ULL_ULLPTR_ULLPTR, BT_FN_VOID_ULL_VAR): New.
libgomp/
* loop_ull.c (gomp_loop_ull_doacross_static_start,
gomp_loop_ull_doacross_dynamic_start,
gomp_loop_ull_doacross_guided_start,
GOMP_loop_ull_doacross_runtime_start,
GOMP_loop_ull_doacross_static_start,
GOMP_loop_ull_doacross_dynamic_start,
GOMP_loop_ull_doacross_guided_start): New functions.
* ordered.c (gomp_doacross_init): Don't initialize boundary
if not static scheduling.
(gomp_doacross_ull_init, GOMP_doacross_ull_post,
GOMP_doacross_ull_wait): New functions.
* libgomp.map (GOMP_4.1): Export GOMP_loop_ull_doacross_dynamic_start,
GOMP_loop_ull_doacross_guided_start,
GOMP_loop_ull_doacross_runtime_start,
GOMP_loop_ull_doacross_static_start,
GOMP_doacross_ull_post and GOMP_doacross_ull_wait.
* libgomp_g.h (GOMP_loop_ull_doacross_guided_start,
GOMP_loop_ull_doacross_runtime_start,
GOMP_loop_ull_doacross_static_start,
GOMP_doacross_ull_post, GOMP_doacross_ull_wait): New prototypes.
* libgomp.h (struct gomp_doacross_work_share): Add
chunk_size_ull, q_ull and boundary_ull fields.
(gomp_doacross_ull_init): New prototype.
* testsuite/libgomp.c/doacross-2.c: New test.

--- gcc/omp-low.c.jj2015-10-01 13:20:13.0 +0200
+++ gcc/omp-low.c   2015-10-02 11:38:40.140982433 +0200
@@ -7071,7 +7071,9 @@ static void
 expand_omp_ordered_source (gimple_stmt_iterator *gsi, struct omp_for_data *fd,
   tree *counts, location_t loc)
 {
-  enum built_in_function source_ix = BUILT_IN_GOMP_DOACROSS_POST;
+  enum built_in_function source_ix
+= fd->iter_type == long_integer_type_node
+  ? BUILT_IN_GOMP_DOACROSS_POST : BUILT_IN_GOMP_DOACROSS_ULL_POST;
   gimple g
 = gimple_build_call (builtin_decl_explicit (source_ix), 1,
 build_fold_addr_expr (counts[fd->ordered]));
@@ -7086,7 +7088,9 @@ expand_omp_ordered_sink (gimple_stmt_ite
 tree *counts, tree c, location_t loc)
 {
   auto_vec args;
-  enum built_in_function sink_ix = BUILT_IN_GOMP_DOACROSS_WAIT;
+  enum built_in_function sink_ix
+= fd->iter_type == long_integer_type_node
+  ? BUILT_IN_GOMP_DOACROSS_WAIT : BUILT_IN_GOMP_DOACROSS_ULL_WAIT;
   tree t, off, coff = NULL_TREE, deps = OMP_CLAUSE_DECL (c), cond = NULL_TREE;
   int i;
   gimple_stmt_iterator gsi2 = *gsi;
@@ -7625,11 +7629,11 @@ expand_omp_for_generic (struct omp_regio
  gsi_prev ();
  e = split_block (entry_bb, gsi_stmt (gsi));
  entry_bb = e->dest;
- make_edge (zero_iter1_bb, entry_bb, EDGE_FALLTHRU);
+ make_edge (zero_iter2_bb, entry_bb, EDGE_FALLTHRU);
  gsi = gsi_last_bb (entry_bb);
  set_immediate_dominator (CDI_DOMINATORS, entry_bb,
   get_immediate_dominator
-(CDI_DOMINATORS, zero_iter1_bb));
+(CDI_DOMINATORS, zero_iter2_bb));
}
}
   if (fd->collapse == 1)
@@ -7762,7 +7766,7 @@ expand_omp_for_generic (struct omp_regio
  t0 = fold_build2 (PLUS_EXPR, fd->iter_type, t0, bias);
}
}
-  if (fd->iter_type == long_integer_type_node)
+  if (fd->iter_type == long_integer_type_node || fd->ordered)
{
  if (fd->chunk_size)
{
@@ -7801,14 +7805,8 @@ expand_omp_for_generic (struct omp_regio

Re: Add a build_real_truncate helper function

[Richard Sandiford]

Richard Biener  writes:
> On Thu, Oct 1, 2015 at 3:52 PM, Bernd Schmidt  wrote:
>> On 10/01/2015 03:48 PM, Richard Sandiford wrote:
>>>
>>> ...which simplifies the match.pd patterns I'm about to add.
>>>
>>> Bootstrapped & regression-tested on x86_64-linux-gnu.  OK to install?
>>
>>
>> Ok.
>
> I wonder if it's worth a separate function - why not truncate
> unconditionally in build_real?

I suppose build_real would then be doing implicit rounding, whereas it
sounds like it should just be converting between representations.
The new function makes it explicit that the value is being changed
in the process.

> In fact it looks like we might have non-canonical REAL_CSTs with
> excess precision?

Maybe there should be an assert in build_real to catch that?
Although I don't really have time to offer to do that.
If you think we have a bug here then I can file a PR.

Thanks,
Richard

Re: Do not use TYPE_CANONICAL in useless_type_conversion

[Bernd Edlinger]

Hi,

actually I do not quite understand why we need a TYPE_ALIGN_OK flag that is 
only used in Ada.
Somehow other languages seem to have no problem of that kind.

You remember, when I removed the TYPE_ALIGN_OK handing (initially it wasn't 
clear to me that
it's entire use is only to make Ada happy), all Ada tests continued to pass, 
even on ARM.
BTW: You promised me last year to give me an example where that makes a 
difference.


Thanks,
Bernd.
  

Re: [Patch, fortran] PR67721 deep copy missing when assigning derived type constructor to an array

[H.J. Lu]

On Sat, Sep 26, 2015 at 6:10 AM, Mikael Morin  wrote:
> Hello,
>
> I've just submitted this PR, and the patch as well, which passes the
> testsuite.
>
> The problem is a missing deep copy when the rhs is a (scalar) derived type
> constructor (with allocatable components) and the lhs an array.
> The patch removes the nonconstantness condition, so that the deep_copy flag
> passed to gfc_trans_scalar_assign is set to true.
>
> Regression-tested on x86_64-unknown-linux-gnu. OK for trunk?
> Mikael
>

This caused:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67818

on GCC 5 branch.

-- 
H.J.

Re: Do not describe -std=c11 etc. as experimental in c.opt help text

[Marek Polacek]

On Thu, Oct 01, 2015 at 05:01:26PM +, Joseph Myers wrote:
> I noticed that c.opt still described -std=c11 and related options as
> experimental in the --help text.  This patch fixes this.
> 
> Jason, note that -std=gnu++11 and -std=gnu++14 still have that text,
> contrary to the descriptions of -std=c++11 and -std=c++14.

Thus, ok to commit this one (to trunk + 5)?

2015-10-02  Marek Polacek  

* c.opt (std=gnu++11): Do not describe as experimental.
(std=gnu++14: Likewise.

diff --git gcc/c-family/c.opt gcc/c-family/c.opt
index a79b9f1..bfa09ee 100644
--- gcc/c-family/c.opt
+++ gcc/c-family/c.opt
@@ -1694,7 +1694,7 @@ corrigendum with GNU extensions
 
 std=gnu++11
 C++ ObjC++
-Conform to the ISO 2011 C++ standard with GNU extensions (experimental and 
incomplete support)
+Conform to the ISO 2011 C++ standard with GNU extensions
 
 std=gnu++0x
 C++ ObjC++ Alias(std=gnu++11) Undocumented
@@ -1706,7 +1706,7 @@ Deprecated in favor of -std=gnu++14
 
 std=gnu++14
 C++ ObjC++
-Conform to the ISO 2014 C++ standard with GNU extensions (experimental and 
incomplete support)
+Conform to the ISO 2014 C++ standard with GNU extensions
 
 std=gnu++1z
 C++ ObjC++

Marek

Re: [C/C++ PATCH] RFC: Implement -Wduplicated-cond (PR c/64249) (version 2)

[H.J. Lu]

On Fri, Oct 2, 2015 at 3:23 AM, Marek Polacek  wrote:
> On Wed, Sep 30, 2015 at 12:45:35PM -0600, Jeff Law wrote:
>> On 09/30/2015 09:47 AM, Joseph Myers wrote:
>> >The C front-end changes are OK.
>> The rest are OK as well.
>
> Thanks Jeff & Joseph.
>
> I'm going to apply the patch soon; should it draw the ire of users, I'll
> move the option to -Wextra.

It breaks bootstrap:

https://gcc.gnu.org/ml/gcc-regression/2015-10/msg00031.html


../../src-trunk/gcc/fortran/trans-intrinsic.c: In function âvoid
gfc_conv_intrinsic_leadz(gfc_se*, gfc_expr*)â:
../../src-trunk/gcc/fortran/trans-intrinsic.c:4886:8: error:
duplicated âifâ condition [-Werror=duplicated-cond]
   else if (argsize <= LONG_TYPE_SIZE)
^
../../src-trunk/gcc/fortran/trans-intrinsic.c:4881:3: note: previously used here
   if (argsize <= INT_TYPE_SIZE)
   ^
../../src-trunk/gcc/fortran/trans-intrinsic.c: In function âvoid
gfc_conv_intrinsic_trailz(gfc_se*, gfc_expr*)â:
../../src-trunk/gcc/fortran/trans-intrinsic.c:5003:8: error:
duplicated âifâ condition [-Werror=duplicated-cond]
   else if (argsize <= LONG_TYPE_SIZE)
^
../../src-trunk/gcc/fortran/trans-intrinsic.c:4998:3: note: previously used here
   if (argsize <= INT_TYPE_SIZE)
   ^
../../src-trunk/gcc/fortran/trans-intrinsic.c: In function âvoid
gfc_conv_intrinsic_popcnt_poppar(gfc_se*, gfc_expr*, int)â:
../../src-trunk/gcc/fortran/trans-intrinsic.c:5109:8: error:
duplicated âifâ condition [-Werror=duplicated-cond]
   else if (argsize <= LONG_TYPE_SIZE)
^
../../src-trunk/gcc/fortran/trans-intrinsic.c:5102:3: note: previously used here
   if (argsize <= INT_TYPE_SIZE)
   ^

since int may have the same size as long and long may have the
same size as long long.

-- 
H.J.

Re: [PATCH] Cleanup of IPA-CP alignment lattices

[Jan Hubicka]

> Hi,
> 
> I have already proposed this patch many months ago but it got
> forgotten, for a number of reasons.  It does not change functionality,
> it only cleans up the alignment lattices, which are currently a bit
> clumsy.
> 
> I have refreshed the patch and made sure it still bootstraps and tests
> fine on an x86_64-linux.  OK for trunk?
> 
> Thanks,
> 
> Martin
> 
> 
> 2015-02-25  Martin Jambor  
>   Jan Hubicka  
> 
>   * ipa-cp.c (ipcp_alignment_lattice): New type.
>   (ipcp_param_lattices): Use the above to represent alignment.
>   (ipcp_alignment_lattice::print): New function.
>   (print_all_lattices): Use it to print alignment information.
>   (ipcp_alignment_lattice::top_p): New function.
>   (ipcp_alignment_lattice::bottom_p): Likewise.
>   (ipcp_alignment_lattice::set_to_bottom): Likewise.
>   (ipcp_alignment_lattice::meet_with_1): Likewise.
>   (ipcp_alignment_lattice::meet_with): Two new overloaded functions.
>   (set_all_contains_variable): Use set_to_bottom of alignment lattice.
>   (initialize_node_lattices): Likewise.
>   (propagate_alignment_accross_jump_function): Work with the new class
>   for alignment lattices.
>   (propagate_constants_accross_call): Pass only the alignment lattice to
>   propagate_alignment_accross_jump_function.
>   (ipcp_store_alignment_results): Work with the new class for alignment
>   lattices.
> 
> testsuite/
>   * gcc.dg/ipa/propalign-4.c: New test.
>   * gcc.dg/ipa/propalign-5.c: Likewise.

OK,
Honza

[PATCH] Reject loops early where ivs cannot be represented.

[Aditya Kumar]

During scop detection we can figure out if loop IVs cannot be represeted in the
polyhedral model. We now bail out early instead of waiting until
graphite-sese-to-poly.c

Passes regtest and bootstrap with BOOT_CFLAGS=="-g -O2 -fgraphite-identity 
-floop-nest-optimize"
with ISL-0.15.

gcc/ChangeLog:

2015-10-02  Aditya Kumar  

* graphite-scop-detection.c (loop_ivs_can_be_represented): New. Return
  true when a loop iv can be represented by a signed int.
(loop_body_is_valid_scop): Call loop_ivs_can_be_represented.
* graphite-sese-to-poly.c (remove_gbbs_in_scop):
(new_gimple_poly_bb): Renamed from new_gimple_bb.
(free_gimple_poly_bb): Renamed from free_gimple_bb.
(try_generate_gimple_bb): Hoist loop invariant code.
(analyze_drs_in_stmts): Same.
(build_scop_drs): Call renamed functions.
(new_pbb_from_pbb): Same.
(scop_ivs_can_be_represented): Delete as functionality now moved to
graphite-scop-detection.c
(build_poly_scop): Remove call to scop_ivs_can_be_represented.


---
 gcc/graphite-scop-detection.c | 28 
 gcc/graphite-sese-to-poly.c   | 74 +--
 2 files changed, 43 insertions(+), 59 deletions(-)

diff --git a/gcc/graphite-scop-detection.c b/gcc/graphite-scop-detection.c
index a498ddc..d3f5a41 100644
--- a/gcc/graphite-scop-detection.c
+++ b/gcc/graphite-scop-detection.c
@@ -783,12 +783,40 @@ dot_scop (scop_p scop)
 #endif
 }
 
+/* Can all ivs be represented by a signed integer?
+   As ISL might generate negative values in its expressions, signed loop ivs
+   are required in the backend.  */
+
+static bool
+loop_ivs_can_be_represented (loop_p loop)
+{
+  for (gphi_iterator psi = gsi_start_phis (loop->header);
+   !gsi_end_p (psi); gsi_next ())
+{
+  gphi *phi = psi.phi ();
+  tree res = PHI_RESULT (phi);
+  tree type = TREE_TYPE (res);
+
+  if (TYPE_UNSIGNED (type)
+ && TYPE_PRECISION (type) >= TYPE_PRECISION 
(long_long_integer_type_node))
+return false;
+}
+  return true;
+}
+
 /* Return true when the body of LOOP has statements that can be represented as 
a
valid scop.  */
 
 static bool
 loop_body_is_valid_scop (loop_p loop, sese_l scop)
 {
+  if (!loop_ivs_can_be_represented (loop))
+{
+  DEBUG_PRINT (dp << "[scop-detection-fail] loop_"
+ << loop->num << "IV cannot be represented.\n");
+  return false;
+}
+
   if (!loop_nest_has_data_refs (loop))
 {
   DEBUG_PRINT (dp << "[scop-detection-fail] loop_"
diff --git a/gcc/graphite-sese-to-poly.c b/gcc/graphite-sese-to-poly.c
index 26f75e9..a219919 100644
--- a/gcc/graphite-sese-to-poly.c
+++ b/gcc/graphite-sese-to-poly.c
@@ -199,7 +199,7 @@ reduction_phi_p (sese region, gphi_iterator *psi)
 /* Store the GRAPHITE representation of BB.  */
 
 static gimple_bb_p
-new_gimple_bb (basic_block bb, vec drs)
+new_gimple_poly_bb (basic_block bb, vec drs)
 {
   struct gimple_bb *gbb;
 
@@ -233,7 +233,7 @@ free_data_refs_aux (vec datarefs)
 /* Frees GBB.  */
 
 static void
-free_gimple_bb (struct gimple_bb *gbb)
+free_gimple_poly_bb (struct gimple_bb *gbb)
 {
   free_data_refs_aux (GBB_DATA_REFS (gbb));
   free_data_refs (GBB_DATA_REFS (gbb));
@@ -253,7 +253,7 @@ remove_gbbs_in_scop (scop_p scop)
   poly_bb_p pbb;
 
   FOR_EACH_VEC_ELT (SCOP_BBS (scop), i, pbb)
-free_gimple_bb (PBB_BLACK_BOX (pbb));
+free_gimple_poly_bb (PBB_BLACK_BOX (pbb));
 }
 
 /* Deletes all scops in SCOPS.  */
@@ -310,24 +310,21 @@ try_generate_gimple_bb (scop_p scop, basic_block bb)
   drs.create (5);
   sese region = SCOP_REGION (scop);
   loop_p nest = outermost_loop_in_sese_1 (region, bb);
-  gimple_stmt_iterator gsi;
+  loop_p loop = bb->loop_father;
+  if (!loop_in_sese_p (loop, region))
+loop = nest;
 
+  gimple_stmt_iterator gsi;
   for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next ())
 {
   gimple *stmt = gsi_stmt (gsi);
-  loop_p loop;
-
   if (is_gimple_debug (stmt))
continue;
 
-  loop = loop_containing_stmt (stmt);
-  if (!loop_in_sese_p (loop, region))
-   loop = nest;
-
   graphite_find_data_references_in_stmt (nest, loop, stmt, );
 }
 
-  return new_gimple_bb (bb, drs);
+  return new_gimple_poly_bb (bb, drs);
 }
 
 /* Returns true if all predecessors of BB, that are not dominated by BB, are
@@ -1887,7 +1884,7 @@ build_scop_drs (scop_p scop)
   for (i = 0; SCOP_BBS (scop).iterate (i, ); i++)
 if (GBB_DATA_REFS (PBB_BLACK_BOX (pbb)).is_empty ())
   {
-   free_gimple_bb (PBB_BLACK_BOX (pbb));
+   free_gimple_poly_bb (PBB_BLACK_BOX (pbb));
free_poly_bb (pbb);
SCOP_BBS (scop).ordered_remove (i);
i--;
@@ -1935,19 +1932,18 @@ analyze_drs_in_stmts (scop_p scop, basic_block bb, 
vec stmts)
 return;
 
   nest = outermost_loop_in_sese_1 (region, bb);
+
+  loop_p loop = bb->loop_father;
+  if (!loop_in_sese_p (loop, 

Re: Do not use TYPE_CANONICAL in useless_type_conversion

[Jan Hubicka]

> On Fri, 2 Oct 2015, Jan Hubicka wrote:
> 
> > > There must be a reason why I allowed modes to differ there btw ;)
> > 
> > Thinking about it, I guess reason is that incomplete types do not have
> > resonable modes set, so requiring modes to match will prevent complete
> > and incomplete types to match.
> 
> Hmm.  I still think that the mode shouldn't be relevant.  Isn't this
> only about the cases where the aggregate ends up not having its address
> taken and thus we don't allocate a stack slot for it but end up
> using a register with mode?  ISTR expansion has special cases dealing
> with some of the mismatch cases and a fallback spilling to the stack.
> 
> I think we should fix that rather than disallowing aggregate assignments
> (which are memory ops to GIMPLE) based on the mode of the aggregate.

THe ICE we get is:
+===GNAT BUG DETECTED==+^M
| 6.0.0 20150929 (experimental) (powerpc64-unknown-linux-gnu) GCC error:   |^M
| in convert_move, at expr.c:282   |^M
| Error detected around 
/home/jh/trunk/gcc/testsuite/gnat.dg/overriding_ops.ads:7:4|^M
| Please submit a bug report; see http://gcc.gnu.org/bugs.html.|^M
| Use a subject line meaningful to you and us to track the bug.|^M
| Include the entire contents of this bug box in the report.   |^M
| Include the exact command that you entered.  |^M
| Also include sources listed below.   |^M
+==+^M

which is:
void
convert_move (rtx to, rtx from, int unsignedp)
{
  machine_mode to_mode = GET_MODE (to);
  machine_mode from_mode = GET_MODE (from);
  int to_real = SCALAR_FLOAT_MODE_P (to_mode);
  int from_real = SCALAR_FLOAT_MODE_P (from_mode);
  enum insn_code code;
  rtx libcall;

  /* rtx code for making an equivalent value.  */
  enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
  : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));


  gcc_assert (to_real == from_real);
  gcc_assert (to_mode != BLKmode);
  gcc_assert (from_mode != BLKmode);

so specifically we do not allow any RTL conversion from and to BLKmode and if
one of them is, we die. I guess it is because convert_move does not know size
of argument and does not expect it to be equivalent.  We can fix this earlier
upstream when expanding assignment by adding appropriate subreg I think, but I
would rather do things step by step - first get with removal of TYPE_CANONICAL
and doing this second. I think one needs to fix expand_move and also probably an
expansion of calls/memory statemetns that also take loads/stores as parameters.

With TYPE_CANONICAL I think only case we get TYPE_CANONICAL equivalent for
aggregates of different mode would LTO and then we would ICE the same way here;
I guess no one tried to mix these Ada aggregates hard enough to trigger it.

Honza

[PATCH] Disable -Wduplicated-cond for the time being

[Marek Polacek]

Given that the new warning currently breaks bootstrap [*] and I see
no simple way how to resolve PR67819 derived out of the bootstrap
failure, I'm moving -Wduplicated-cond out of -Wall and skipping one
of the tests for the time being.  I'm also reverting the hack in
genemit.c.

Oh well.

[*] https://gcc.gnu.org/ml/gcc-patches/2015-10/msg00236.html

Bootstrapped/regtested on x86_64-linux, applying to trunk.

2015-10-02  Marek Polacek  

* genemit.c (gen_exp): Remove -Wduplicated-cond hack.

* c.opt (Wduplicated-cond): Don't enable by -Wall anymore.

* c-c++-common/Wduplicated-cond-2.c: Skip until PR67819 is resolved.

diff --git gcc/c-family/c.opt gcc/c-family/c.opt
index a79b9f1..c62eefb 100644
--- gcc/c-family/c.opt
+++ gcc/c-family/c.opt
@@ -407,7 +407,7 @@ C ObjC C++ ObjC++ Var(warn_div_by_zero) Init(1) Warning
 Warn about compile-time integer division by zero
 
 Wduplicated-cond
-C ObjC C++ ObjC++ Var(warn_duplicated_cond) Warning LangEnabledBy(C ObjC C++ 
ObjC++,Wall)
+C ObjC C++ ObjC++ Var(warn_duplicated_cond) Init(0) Warning
 Warn about duplicated conditions in an if-else-if chain
 
 Weffc++
diff --git gcc/genemit.c gcc/genemit.c
index 13f9119..e92f757 100644
--- gcc/genemit.c
+++ gcc/genemit.c
@@ -182,7 +182,7 @@ gen_exp (rtx x, enum rtx_code subroutine_type, char *used)
   && INTVAL (x) <= MAX_SAVED_CONST_INT)
printf ("const_int_rtx[MAX_SAVED_CONST_INT + (%d)]",
(int) INTVAL (x));
-  else if (STORE_FLAG_VALUE > 1 && INTVAL (x) == STORE_FLAG_VALUE)
+  else if (INTVAL (x) == STORE_FLAG_VALUE)
printf ("const_true_rtx");
   else
{
diff --git gcc/testsuite/c-c++-common/Wduplicated-cond-2.c 
gcc/testsuite/c-c++-common/Wduplicated-cond-2.c
index 90a8663..c424e76 100644
--- gcc/testsuite/c-c++-common/Wduplicated-cond-2.c
+++ gcc/testsuite/c-c++-common/Wduplicated-cond-2.c
@@ -1,6 +1,7 @@
 /* PR c/64249 */
 /* { dg-do compile } */
 /* { dg-options "-Wall" } */
+/* { dg-skip-if "PR67819" { *-*-* } } */
 
 #ifndef __cplusplus
 # define bool _Bool

Marek

[C PATCH] Another fix for missing diagnostics (PR c/67730)

[Marek Polacek]

This patch continues fixing up this PR, where we were failing to give
diagnostics for attached testcases, because of NULL being defined in
a system header.  Probably the best we can do at this time is just to
use expansion_point_location_if_in_system_header.  That also means we
will warn for "RETURN" macro in the test below -- not sure if that's
wanted, but I currently do not see any way around it.

Bootstrapped/regtested on x86_64-linux, ok for trunk and 5?

2015-10-01  Marek Polacek  

PR c/67730
* c-typeck.c (convert_for_assignment): Use the expansion point
location throughout.

* gcc.dg/pr67730-1.c: New test.
* gcc.dg/pr67730-2.c: New test.
* gcc.dg/pr67730.h: New test.

diff --git gcc/c/c-typeck.c gcc/c/c-typeck.c
index a11ccb2..035f480 100644
--- gcc/c/c-typeck.c
+++ gcc/c/c-typeck.c
@@ -5708,6 +5718,10 @@ convert_for_assignment (location_t location, location_t 
expr_loc, tree type,
   tree rname = NULL_TREE;
   bool objc_ok = false;
 
+  /* Use the expansion point location to handle cases such as user's
+ function returning a wrong-type macro defined in a system header.  */
+  location = expansion_point_location_if_in_system_header (location);
+
   if (errtype == ic_argpass)
 {
   tree selector;
diff --git gcc/testsuite/gcc.dg/pr67730-1.c gcc/testsuite/gcc.dg/pr67730-1.c
index e69de29..bb82f6d 100644
--- gcc/testsuite/gcc.dg/pr67730-1.c
+++ gcc/testsuite/gcc.dg/pr67730-1.c
@@ -0,0 +1,16 @@
+/* PR c/67730 */
+/* { dg-do compile } */
+/* { dg-options "-Wc++-compat" } */
+
+#include "pr67730.h"
+
+extern void bar (unsigned char *);
+
+unsigned char *
+f (void *p)
+{
+   unsigned char *uc = ONEP; /* { dg-warning "request for implicit conversion" 
} */
+   uc = ONEP; /* { dg-warning "request for implicit conversion" } */
+   bar (ONEP); /* { dg-warning "request for implicit conversion" } */
+   return ONEP; /* { dg-warning "request for implicit conversion" } */
+}
diff --git gcc/testsuite/gcc.dg/pr67730-2.c gcc/testsuite/gcc.dg/pr67730-2.c
index e69de29..29d7267 100644
--- gcc/testsuite/gcc.dg/pr67730-2.c
+++ gcc/testsuite/gcc.dg/pr67730-2.c
@@ -0,0 +1,22 @@
+/* PR c/67730 */
+/* { dg-do compile } */
+/* { dg-options "" } */
+
+#include "pr67730.h"
+
+extern void bar (int);
+
+int
+fn1 (void)
+{
+  int a = NULL; /* { dg-warning "initialization makes integer from pointer" } 
*/
+  a = NULL; /* { dg-warning "assignment makes integer from pointer" } */
+  bar (NULL); /* { dg-warning "passing argument 1" } */
+  return NULL; /* { dg-warning "return makes integer from pointer" } */
+}
+
+int
+fn2 (void)
+{
+  RETURN; /* { dg-warning "return makes integer from pointer" } */
+}
diff --git gcc/testsuite/gcc.dg/pr67730.h gcc/testsuite/gcc.dg/pr67730.h
index e69de29..9a9afc9 100644
--- gcc/testsuite/gcc.dg/pr67730.h
+++ gcc/testsuite/gcc.dg/pr67730.h
@@ -0,0 +1,32 @@
+#pragma GCC system_header
+#define NULL (void *) 0
+#define ONEP (void *) 1
+#define RETURN return NULL
+
+extern void sysbar (unsigned char *);
+
+unsigned char *
+sysfn1 (void *p)
+{
+   unsigned char *uc = ONEP;
+   uc = ONEP;
+   sysbar (ONEP);
+   return ONEP;
+}
+
+extern void sysbar2 (int);
+
+int
+sysfn2 (void)
+{
+  int a = NULL;
+  a = NULL;
+  sysbar2 (NULL);
+  return NULL;
+}
+
+int
+sysfn3 (void)
+{
+  RETURN;
+}

Marek

Re: Do not describe -std=c11 etc. as experimental in c.opt help text

[Joseph Myers]

On Fri, 2 Oct 2015, Matthias Klose wrote:

> On 01.10.2015 19:01, Joseph Myers wrote:
> > I noticed that c.opt still described -std=c11 and related options as
> > experimental in the --help text.  This patch fixes this.
> 
> this seems to be true for the gcc-5 branch as well. Could you fix it there as
> well?

Done.

-- 
Joseph S. Myers
jos...@codesourcery.com

Re: [PATCH] SH FDPIC backend support

[Rich Felker]

On Fri, Oct 02, 2015 at 10:51:03PM +0900, Oleg Endo wrote:
> On Thu, 2015-10-01 at 21:30 -0400, Rich Felker wrote:
> 
> > If you have any other general comments on the patch in the mean time
> > I'd be happy to hear them.
> 
> Below are some comments.  Might be a bit unstructured, I was hopping
> through the patch file.  Sorry about that.

Thanks! This is very helpful. gcc style has changed a lot since the
old patch was submitted so I think it makes sense to update it to
match current practices rather than just making it work. I'll try to
focus on any functional problems first though so as to keep a working
patch against 5.2 as well and ease backporting to earlier versions (if
anyone wants to do that on their own; certainly I don't expect it to
happen in upstream gcc).

> > +function_symbol (rtx target, const char *name, enum sh_function_kind kind, 
> > rtx *lab)
>  ^
> 
> Please do not add unnecessary 'enum', 'struct', 'typedef' etc.  In this
> case it was already here, but since this is is touching the line, please
> remove it.

OK.

> I'd rather make the function 'function_symbol' returning a
> std::pair or something like
> 
> struct function_symbol_result
> {
>   function_symbol_result (void) : symbol (NULL), label (NULL) { }
>   function_symbol_result (rtx s, rtx l) : symbol (s), label (l) { }
> 
>   rtx symbol;
>   rtx label;
> };
> 
> instead of doing return values by pointer-args.  On the caller sites,
> you can then do something like
> 
> rtx lab = function_symbol (func_addr_rtx, "...", SFUNC_STATIC).label;
> 
> This will make the the patch also a few hunks shorter.

There are a few call sites where the symbol returned is actually used.
Would you want me to just do something like:

struct function_symbol_result funcsym = function_symbol(...);

then use funcsym.symbol and funcsym.label?

Would you object to shorter member names .sym and .lab?

> > +extern bool sh_legitimate_constant_p (rtx);
> 
> There is already a target hook/callback function:
> 
> static bool
> sh_legitimate_constant_p (machine_mode mode, rtx x)
> 
> You newly added function is an overload it and I'm not sure who invokes it.

Uhg, not sure how I missed that. (Well, yes I am -- it's C++'s
fault;-) I'll try to figure out what's going on.

> > +extern rtx sh_our_fdpic_reg (void);
> 
> Please rename this to 'sh_get_fdpic_reg_initial_val'.  There's a similar
> function 'sh_get_pr_initial_val' which also uses
> 'get_hard_reg_initial_val'.

OK.

> > +/* An rtx holding the initial value of the FDPIC register (the FDPIC
> > +   pointer passed in from the caller).  */
> > +#define OUR_FDPIC_REG  sh_our_fdpic_reg ()
> > +
> 
> Please remove this macro and add 'sh_get_fdpic_reg_initial_val' to
> sh-protos.h and use that function instead.

OK.

> >  void
> >  prepare_move_operands (rtx operands[], machine_mode mode)
> >  {
> > +  rtx tmp, base, offset;
> > +
> 
> Please declare variables where they are used.

OK.

> > +  if (TARGET_FDPIC)
> > +{
> > +  rtx pic_reg = gen_rtx_REG (Pmode, PIC_REG);
> > +  emit_move_insn (pic_reg, OUR_FDPIC_REG);
> > +}
> > +
> 
> Make this a one-liner
> 
>   emit_move_insn (gen_rtx_REG (Pmode, PIC_REG),
> sh_get_fdpic_reg_initial_val ());

OK.

> > +(define_insn "sibcalli_fdpic"
> > +  [(call (mem:SI (match_operand:SI 0 "register_operand" "k"))
> > +(match_operand 1 "" ""))
> > +   (use (reg:SI FPSCR_MODES_REG))
> > +   (use (reg:SI PIC_REG))
> > +   (return)]
> > +  "TARGET_SH1 && TARGET_FDPIC"
> >^^^
> 
> This is maybe slightly impossible, because of ..

Because SH5 is deprecated?

> > +  if (TARGET_FDPIC
> > +  && (TARGET_SHMEDIA || TARGET_SHCOMPACT || !TARGET_SH2))
> > +sorry ("non-SH2 FDPIC");
> > +
> 
> 
> > +  [(match_operand 0 "" "") (match_operand 1 "" "")]
> > 
> 
> Please don't add empty predicate/constraint strings if not necessary.  In 
> this case
>   [(match_operand 0) (match_operand 1)]
> 
> will suffice.

OK, but I'm not really familiar with this part of the code; I just
adapted the patch by pattern. There are a lot of places with
(match_operand N "" ""); should the empty strings be dropped for all
of them?

> >   if (TARGET_FDPIC)
> > +picreg = OUR_FDPIC_REG;
> > +  else
> > +picreg = gen_rtx_REG (Pmode, PIC_REG);
> > +
> 
> rtx picreg = TARGET_FDPIC ? ...
> : ... ;

OK.

> Maybe it could be useful to replace all "gen_rtx_REG (Pmode, PIC_REG)"
> in the patch with something like 'get_t_reg_rtx'.  Depends on how many
> times this gen_rtx_REG is invoked.

I'm fairly indifferent to this. Neither is significantly shorter or
more readable.

> > +// FIXME: what happens if someone tries fdpic on SH5?
> > 
> 
> Nothing.  See also
> https://gcc.gnu.org/ml/gcc/2015-08/msg00101.html
> 
> Please omit all SH5/SHMEDIA checks and related code.

I'm a bit confused by the fact that basically ALL of the traffic on
the linux-sh list is "shmedia" 

Re: [PATCH] Improve DOM's optimization of control statements

[Jeff Law]

On 10/02/2015 05:15 AM, Renlin Li wrote:

Hi Jeff,

Your patch causes an ICE regression.
The test case is " gcc.c-torture/compile/pr27087.c", I observed it on
aarch64-none-elf target when compiling the test case with '-Os' flag.

A quick check shows, the cfg has been changed, but the loop information
is not updated. Thus the information about the number of basic block in
a loop is not reliable.

Could you please have a look?

Yup.  Will do.   Thanks for letting me know.

jeff

Re: [PATCH] Add verifier for leaked SSA names

[Jeff Law]

On 10/02/2015 01:37 AM, Richard Biener wrote:


The following patch doesn't pass bootstrap & regtest.  It did at some
point though and its comment hints that fixing leaks after inlining
was too interesting a problem to solve ;)

Thus patch is FYI.

Richard.

Index: tree-ssa.c
===
--- tree-ssa.c  (revision 228320)
+++ tree-ssa.c  (working copy)
@@ -693,6 +693,16 @@ verify_def (basic_block bb, basic_block
goto err;
  }

+  if (bb == NULL
+  /* ???  Too many latent cases in the main opt pipeline.  But it's
+ worth to fix all cases before inlining as that reduces the
+amount of garbage kept live.  */
+  && !cfun->after_inlining)
+{
+  error ("removed STMT failed to release SSA name");
+  goto err;
+}
+
I was building the verification step into the ssa name manager. 
Essentially at the point where we flush from the pending to the free 
list, we should have a consistent state.


Thus we ought to be able to walk the IL marking everything we can see, 
combine that with the contents of the freelist and the result ought to 
be every SSA_NAME ever created.


Reality is somewhat different, of course.

Yours takes a slightly different approach.  Ultimately if we get the 
leaks plugged, we might even consider using both.


jeff

Re: [C PATCH] Another fix for missing diagnostics (PR c/67730)

[Joseph Myers]

On Fri, 2 Oct 2015, Marek Polacek wrote:

> This patch continues fixing up this PR, where we were failing to give
> diagnostics for attached testcases, because of NULL being defined in
> a system header.  Probably the best we can do at this time is just to
> use expansion_point_location_if_in_system_header.  That also means we
> will warn for "RETURN" macro in the test below -- not sure if that's
> wanted, but I currently do not see any way around it.
> 
> Bootstrapped/regtested on x86_64-linux, ok for trunk and 5?

OK.  I think warning for RETURN is correct - the user chose to call RETURN 
from a non-system-header function that was inappropriate for the macro, so 
the issue is in the user's code.

-- 
Joseph S. Myers
jos...@codesourcery.com

[PATCH] Cleanup of IPA-CP alignment lattices

[Martin Jambor]

Hi,

I have already proposed this patch many months ago but it got
forgotten, for a number of reasons.  It does not change functionality,
it only cleans up the alignment lattices, which are currently a bit
clumsy.

I have refreshed the patch and made sure it still bootstraps and tests
fine on an x86_64-linux.  OK for trunk?

Thanks,

Martin


2015-02-25  Martin Jambor  
Jan Hubicka  

* ipa-cp.c (ipcp_alignment_lattice): New type.
(ipcp_param_lattices): Use the above to represent alignment.
(ipcp_alignment_lattice::print): New function.
(print_all_lattices): Use it to print alignment information.
(ipcp_alignment_lattice::top_p): New function.
(ipcp_alignment_lattice::bottom_p): Likewise.
(ipcp_alignment_lattice::set_to_bottom): Likewise.
(ipcp_alignment_lattice::meet_with_1): Likewise.
(ipcp_alignment_lattice::meet_with): Two new overloaded functions.
(set_all_contains_variable): Use set_to_bottom of alignment lattice.
(initialize_node_lattices): Likewise.
(propagate_alignment_accross_jump_function): Work with the new class
for alignment lattices.
(propagate_constants_accross_call): Pass only the alignment lattice to
propagate_alignment_accross_jump_function.
(ipcp_store_alignment_results): Work with the new class for alignment
lattices.

testsuite/
* gcc.dg/ipa/propalign-4.c: New test.
* gcc.dg/ipa/propalign-5.c: Likewise.

diff --git a/gcc/ipa-cp.c b/gcc/ipa-cp.c
index 69a181d..0d9fdee 100644
--- a/gcc/ipa-cp.c
+++ b/gcc/ipa-cp.c
@@ -241,6 +241,36 @@ public:
   struct ipcp_agg_lattice *next;
 };
 
+/* Lattice of pointer alignment.  Unlike the previous types of lattices, this
+   one is only capable of holding one value.  */
+
+class ipcp_alignment_lattice
+{
+public:
+  /* If bottom and top are both false, these two fields hold values as given by
+ ptr_info_def and get_pointer_alignment_1.  */
+  unsigned align;
+  unsigned misalign;
+
+  inline bool bottom_p () const;
+  inline bool top_p () const;
+  inline bool set_to_bottom ();
+  bool meet_with (unsigned new_align, unsigned new_misalign);
+  bool meet_with (const ipcp_alignment_lattice , HOST_WIDE_INT offset);
+  void print (FILE * f);
+private:
+  /* If set, this lattice is bottom and all other fields should be
+ disregarded.  */
+  bool bottom;
+  /* If bottom and not_top are false, the lattice is TOP.  If not_top is true,
+ the known alignment is stored in the fields align and misalign.  The field
+ is negated so that memset to zero initializes the lattice to TOP
+ state.  */
+  bool not_top;
+
+  bool meet_with_1 (unsigned new_align, unsigned new_misalign);
+};
+
 /* Structure containing lattices for a parameter itself and for pieces of
aggregates that are passed in the parameter or by a reference in a parameter
plus some other useful flags.  */
@@ -254,9 +284,8 @@ public:
   ipcp_lattice ctxlat;
   /* Lattices describing aggregate parts.  */
   ipcp_agg_lattice *aggs;
-  /* Alignment information.  Very basic one value lattice where !known means
- TOP and zero alignment bottom.  */
-  ipa_alignment alignment;
+  /* Lattice describing known alignment.  */
+  ipcp_alignment_lattice alignment;
   /* Number of aggregate lattices */
   int aggs_count;
   /* True if aggregate data were passed by reference (as opposed to by
@@ -421,6 +450,19 @@ ipcp_lattice::print (FILE * f, bool dump_sources, 
bool dump_benefits)
 fprintf (f, "\n");
 }
 
+/* Print alignment lattice to F.  */
+
+void
+ipcp_alignment_lattice::print (FILE * f)
+{
+  if (top_p ())
+fprintf (f, " Alignment unknown (TOP)\n");
+  else if (bottom_p ())
+fprintf (f, " Alignment unusable (BOTTOM)\n");
+  else
+fprintf (f, " Alignment %u, misalignment %u\n", align, misalign);
+}
+
 /* Print all ipcp_lattices of all functions to F.  */
 
 static void
@@ -446,13 +488,7 @@ print_all_lattices (FILE * f, bool dump_sources, bool 
dump_benefits)
  plats->itself.print (f, dump_sources, dump_benefits);
  fprintf (f, " ctxs: ");
  plats->ctxlat.print (f, dump_sources, dump_benefits);
- if (plats->alignment.known && plats->alignment.align > 0)
-   fprintf (f, " Alignment %u, misalignment %u\n",
-plats->alignment.align, plats->alignment.misalign);
- else if (plats->alignment.known)
-   fprintf (f, " Alignment unusable\n");
- else
-   fprintf (f, " Alignment unknown\n");
+ plats->alignment.print (f);
  if (plats->virt_call)
fprintf (f, "virt_call flag set\n");
 
@@ -767,27 +803,111 @@ set_agg_lats_contain_variable (struct 
ipcp_param_lattices *plats)
   return ret;
 }
 
-/* Return true if alignment information in PLATS is known to be unusable.  */
+/* Return true if alignment 

Re: [PATCH, i386] Introduce switch for Skylake Server CPU.

[Kirill Yukhin]

Hello,

Patch in the bottom introduces cpuid detection
for Skylake CPU supporting AVX-512.

Bootstrapped. Changed test pass. Is it ok for trunk?

libgcc/
* libgcc/config/i386/cpuinfo.c (get_intel_cpu): Detect "skylake-avx512".

gcc/testsuite/
* gcc.target/i386/builtin_target.c: Add check for "skylake-avx512".

--
Thanks, K

commit 230beb0d31a9463c8339975580142298138442f6
Author: Kirill Yukhin 
Date:   Fri Oct 2 19:03:21 2015 +0300

AVX-512. Add family/model to cpuinfo.c.

diff --git a/gcc/testsuite/gcc.target/i386/builtin_target.c 
b/gcc/testsuite/gcc.target/i386/builtin_target.c
index a9a8753..82357a7 100644
--- a/gcc/testsuite/gcc.target/i386/builtin_target.c
+++ b/gcc/testsuite/gcc.target/i386/builtin_target.c
@@ -91,6 +91,11 @@ check_intel_cpu_model (unsigned int family, unsigned int 
model,
  assert (__builtin_cpu_is ("corei7"));
  assert (__builtin_cpu_is ("skylake"));
  break;
+   case 0x55:
+ /* Skylake with AVX-512 support.  */
+ assert (__builtin_cpu_is ("corei7"));
+ assert (__builtin_cpu_is ("skylake-avx512"));
+ break;
case 0x17:
case 0x1d:
  /* Penryn.  */
diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c
index 40ed84c..0cbbc85 100644
--- a/libgcc/config/i386/cpuinfo.c
+++ b/libgcc/config/i386/cpuinfo.c
@@ -78,6 +78,7 @@ enum processor_subtypes
   INTEL_COREI7_HASWELL,
   INTEL_COREI7_BROADWELL,
   INTEL_COREI7_SKYLAKE,
+  INTEL_COREI7_SKYLAKE_AVX512,
   CPU_SUBTYPE_MAX
 };
 
@@ -260,6 +261,11 @@ get_intel_cpu (unsigned int family, unsigned int model, 
unsigned int brand_id)
  __cpu_model.__cpu_type = INTEL_COREI7;
  __cpu_model.__cpu_subtype = INTEL_COREI7_SKYLAKE;
  break;
+   case 0x55:
+ /* Skylake with AVX-512 support.  */
+ __cpu_model.__cpu_type = INTEL_COREI7;
+ __cpu_model.__cpu_subtype = INTEL_COREI7_SKYLAKE_AVX512;
+ break;
case 0x17:
case 0x1d:
  /* Penryn.  */

patch to fix PR657756

[Vladimir Makarov]

  The following patch fixes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67756

  The patch was bootstrapped and tested on x86-64.

Committed as rev. 228396.

Index: ChangeLog
===
--- ChangeLog	(revision 228395)
+++ ChangeLog	(working copy)
@@ -1,3 +1,10 @@
+2015-10-02  Vladimir Makarov  
+
+	PR rtl-optimization/67756
+	* lra-constraints.c (match_reload): Add a new parameter.  Use it
+	for creating a pseudo with the same value.
+	(curr_insn_transform): Pass a new argument to match_reload.
+
 2015-10-02  Kirill Yukhin  
 
 	* config/i386/i386.c (expand_vec_perm_even_odd_trunc): New.
Index: lra-constraints.c
===
--- lra-constraints.c	(revision 228347)
+++ lra-constraints.c	(working copy)
@@ -855,10 +855,11 @@ narrow_reload_pseudo_class (rtx reg, enu
numbers with end marker -1) with reg class GOAL_CLASS.  Add input
and output reloads correspondingly to the lists *BEFORE and *AFTER.
OUT might be negative.  In this case we generate input reloads for
-   matched input operands INS.  */
+   matched input operands INS.  EARLY_CLOBBER_P is a flag that the
+   output operand is early clobbered for chosen alternative.  */
 static void
 match_reload (signed char out, signed char *ins, enum reg_class goal_class,
-	  rtx_insn **before, rtx_insn **after)
+	  rtx_insn **before, rtx_insn **after, bool early_clobber_p)
 {
   int i, in;
   rtx new_in_reg, new_out_reg, reg;
@@ -939,17 +940,19 @@ match_reload (signed char out, signed ch
 	 have a situation like "a <- a op b", where the constraints
 	 force the second input operand ("b") to match the output
 	 operand ("a").  "b" must then be copied into a new register
-	 so that it doesn't clobber the current value of "a".  */
+	 so that it doesn't clobber the current value of "a".
+
+	 We can not use the same value if the output pseudo is
+	 early clobbered or the input pseudo is mentioned in the
+	 output, e.g. as an address part in memory, because
+	 output reload will actually extend the pseudo liveness.
+	 We don't care about eliminable hard regs here as we are
+	 interesting only in pseudos.  */
 
   new_in_reg = new_out_reg
-	= (ins[1] < 0 && REG_P (in_rtx)
+	= (! early_clobber_p && ins[1] < 0 && REG_P (in_rtx)
 	   && (int) REGNO (in_rtx) < lra_new_regno_start
 	   && find_regno_note (curr_insn, REG_DEAD, REGNO (in_rtx))
-	   /* We can not use the same value if the pseudo is mentioned
-	  in the output, e.g. as an address part in memory,
-	  becuase output reload will actually extend the pseudo
-	  liveness.  We don't care about eliminable hard regs here
-	  as we are interesting only in pseudos.  */
 	   && (out < 0 || regno_use_in (REGNO (in_rtx), out_rtx) == NULL_RTX)
 	   ? lra_create_new_reg (inmode, in_rtx, goal_class, "")
 	   : lra_create_new_reg_with_unique_value (outmode, out_rtx,
@@ -3867,13 +3870,18 @@ curr_insn_transform (bool check_only_p)
 	  match_inputs[0] = i;
 	  match_inputs[1] = -1;
 	  match_reload (goal_alt_matched[i][0], match_inputs,
-			goal_alt[i], , );
+			goal_alt[i], , ,
+			curr_static_id->operand_alternative
+			[goal_alt_number * n_operands + goal_alt_matched[i][0]]
+			.earlyclobber);
 	}
   else if (curr_static_id->operand[i].type == OP_OUT
 	   && (curr_static_id->operand[goal_alt_matched[i][0]].type
 		   == OP_IN))
 	/* Generate reloads for output and matched inputs.  */
-	match_reload (i, goal_alt_matched[i], goal_alt[i], , );
+	match_reload (i, goal_alt_matched[i], goal_alt[i], , ,
+		  curr_static_id->operand_alternative
+		  [goal_alt_number * n_operands + i].earlyclobber);
   else if (curr_static_id->operand[i].type == OP_IN
 	   && (curr_static_id->operand[goal_alt_matched[i][0]].type
 		   == OP_IN))
@@ -3883,7 +3891,7 @@ curr_insn_transform (bool check_only_p)
 	  for (j = 0; (k = goal_alt_matched[i][j]) >= 0; j++)
 	match_inputs[j + 1] = k;
 	  match_inputs[j + 1] = -1;
-	  match_reload (-1, match_inputs, goal_alt[i], , );
+	  match_reload (-1, match_inputs, goal_alt[i], , , false);
 	}
   else
 	/* We must generate code in any case when function
Index: testsuite/ChangeLog
===
--- testsuite/ChangeLog	(revision 228395)
+++ testsuite/ChangeLog	(working copy)
@@ -1,3 +1,8 @@
+2015-10-02  Vladimir Makarov  
+
+	PR rtl-optimization/67756
+	* gcc.target/arm/pr67756.c: New.
+
 2015-10-02  Jiong Wang  
 
 	* gcc.target/aarch64/tlsle12_tiny_1.c: New testcase for tiny model.
Index: testsuite/gcc.target/arm/pr67756.c
===
--- testsuite/gcc.target/arm/pr67756.c	(revision 0)
+++ testsuite/gcc.target/arm/pr67756.c	(working copy)
@@ -0,0 +1,62 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_hard_vfp_ok } */
+/* 

[PATCH, obvious, AVX-512] Add missing AVX-512 features detection.

[Kirill Yukhin]

Hello,
Patch in the bottom adds missing AVX-512VBMI,IFMA
features to libgcc/config/i386/cpuinfo.c and, built-in expansion
and test.

Comitted to main trunk as obvious.

gcc/
* config/i386/i386.c (processor_features): Add F_AVX512VBMI,
F_AVX512IFMA.
(isa_names_table): Handle F_AVX512VBMI and F_AVX512IFMA.
libgcc/
* config/i386/cpuinfo.c (processor_features): Add
FEATURE_AVX512VBMI and FEATURE_AVX512VBMI.
testsuite/
* gcc.target/i386/builtin_target.c: Handle "avx512ifma"
and "avx512vbmi".

--
Thanks, K

commit 39d9d882ed654e8b40095a24cb05baf661b81f3f
Author: Kirill Yukhin 
Date:   Fri Oct 2 18:08:33 2015 +0300

AVX-512. Add missing features to cpuinfo.c

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 1ccc33e..1719175 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -36591,6 +36591,8 @@ fold_builtin_cpu (tree fndecl, tree *args)
 F_AVX512CD,
 F_AVX512ER,
 F_AVX512PF,
+F_AVX512VBMI,
+F_AVX512IFMA,
 F_MAX
   };
 
@@ -36699,6 +36701,8 @@ fold_builtin_cpu (tree fndecl, tree *args)
   {"avx512cd",F_AVX512CD},
   {"avx512er",F_AVX512ER},
   {"avx512pf",F_AVX512PF},
+  {"avx512vbmi",F_AVX512VBMI},
+  {"avx512ifma",F_AVX512IFMA},
 };
 
   tree __processor_model_type = build_processor_model_struct ();
diff --git a/gcc/testsuite/gcc.target/i386/builtin_target.c 
b/gcc/testsuite/gcc.target/i386/builtin_target.c
index aff4559..a9a8753 100644
--- a/gcc/testsuite/gcc.target/i386/builtin_target.c
+++ b/gcc/testsuite/gcc.target/i386/builtin_target.c
@@ -200,6 +200,10 @@ check_features (unsigned int ecx, unsigned int edx,
assert (__builtin_cpu_supports ("avx512bw"));
   if (ebx & bit_AVX512DQ)
assert (__builtin_cpu_supports ("avx512dq"));
+  if (ebx & bit_AVX512IFMA)
+   assert (__builtin_cpu_supports ("avx512ifma"));
+  if (ebx & bit_AVX512VBMI)
+   assert (__builtin_cpu_supports ("avx512vbmi"));
 }
 }
 
diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c
index ddb49e3..40ed84c 100644
--- a/libgcc/config/i386/cpuinfo.c
+++ b/libgcc/config/i386/cpuinfo.c
@@ -110,7 +110,9 @@ enum processor_features
   FEATURE_AVX512DQ,
   FEATURE_AVX512CD,
   FEATURE_AVX512ER,
-  FEATURE_AVX512PF
+  FEATURE_AVX512PF,
+  FEATURE_AVX512VBMI,
+  FEATURE_AVX512IFMA
 };
 
 struct __processor_model
@@ -336,6 +338,10 @@ get_available_features (unsigned int ecx, unsigned int edx,
features |= (1 << FEATURE_AVX512PF);
   if (ebx & bit_AVX512ER)
features |= (1 << FEATURE_AVX512ER);
+  if (ebx & bit_AVX512IFMA)
+   features |= (1 << FEATURE_AVX512IFMA);
+  if (ecx & bit_AVX512VBMI)
+   features |= (1 << FEATURE_AVX512VBMI);
 }
 
   unsigned int ext_level;

Re: Do not describe -std=c11 etc. as experimental in c.opt help text

[Marek Polacek]

On Fri, Oct 02, 2015 at 05:35:39PM +0200, Marek Polacek wrote:
> On Thu, Oct 01, 2015 at 05:01:26PM +, Joseph Myers wrote:
> > I noticed that c.opt still described -std=c11 and related options as
> > experimental in the --help text.  This patch fixes this.
> > 
> > Jason, note that -std=gnu++11 and -std=gnu++14 still have that text,
> > contrary to the descriptions of -std=c++11 and -std=c++14.
> 
> Thus, ok to commit this one (to trunk + 5)?
> 
> 2015-10-02  Marek Polacek  
> 
>   * c.opt (std=gnu++11): Do not describe as experimental.
>   (std=gnu++14: Likewise.

And consider the missing ) fixed ;).

Marek

Re: Do not describe -std=c11 etc. as experimental in c.opt help text

[Jakub Jelinek]

On Fri, Oct 02, 2015 at 05:35:39PM +0200, Marek Polacek wrote:
> On Thu, Oct 01, 2015 at 05:01:26PM +, Joseph Myers wrote:
> > I noticed that c.opt still described -std=c11 and related options as
> > experimental in the --help text.  This patch fixes this.
> > 
> > Jason, note that -std=gnu++11 and -std=gnu++14 still have that text,
> > contrary to the descriptions of -std=c++11 and -std=c++14.
> 
> Thus, ok to commit this one (to trunk + 5)?
> 
> 2015-10-02  Marek Polacek  
> 
>   * c.opt (std=gnu++11): Do not describe as experimental.
>   (std=gnu++14: Likewise.

Missing ) before :.

Jakub

Re: [PATCH] SH FDPIC backend support

[Oleg Endo]

On Fri, 2015-10-02 at 11:18 -0400, Rich Felker wrote:

> Thanks! This is very helpful. gcc style has changed a lot since the
> old patch was submitted so I think it makes sense to update it to
> match current practices rather than just making it work. I'll try to
> focus on any functional problems first though so as to keep a working
> patch against 5.2 as well and ease backporting to earlier versions (if
> anyone wants to do that on their own; certainly I don't expect it to
> happen in upstream gcc).

Let's see what the final patch will look like.

> There are a few call sites where the symbol returned is actually used.
> Would you want me to just do something like:
> 
> struct function_symbol_result funcsym = function_symbol(...);
> 
> then use funcsym.symbol and funcsym.label?

If you need both return values, then yes.  But without the "struct".  If
"function_symbol_result" is too long feel free to come up with a shorter
name.

> 
> Would you object to shorter member names .sym and .lab?

No, that's OK, too.

> Uhg, not sure how I missed that. (Well, yes I am -- it's C++'s
> fault;-) I'll try to figure out what's going on.

I think the overloaded function from your patch is simply not invoked by
anything.  You'd probably have to merge it into the already existing
one.

> > > +(define_insn "sibcalli_fdpic"
> > > +  [(call (mem:SI (match_operand:SI 0 "register_operand" "k"))
> > > +  (match_operand 1 "" ""))
> > > +   (use (reg:SI FPSCR_MODES_REG))
> > > +   (use (reg:SI PIC_REG))
> > > +   (return)]
> > > +  "TARGET_SH1 && TARGET_FDPIC"
> > >^^^
> > 
> > This is maybe slightly impossible, because of ..
> 
> Because SH5 is deprecated?

No, because ...

> > > +  if (TARGET_FDPIC
> > > +  && (TARGET_SHMEDIA || TARGET_SHCOMPACT || !TARGET_SH2))
> > > +sorry ("non-SH2 FDPIC");
> > > +

... this refuses operation if FDPIC is used with anything "less than"
SH2, i.e. SH1.  I think the condition above should be "TARGET_SH2 &&
TARGET_FDPIC".


> OK, but I'm not really familiar with this part of the code; I just
> adapted the patch by pattern. There are a lot of places with
> (match_operand N "" ""); should the empty strings be dropped for all
> of them?

Yes, there are several places with empty predicate/constraint strings.
They could be removed with a big patch, but for the moment, just don't
add new ones.

> > Maybe it could be useful to replace all "gen_rtx_REG (Pmode, PIC_REG)"
> > in the patch with something like 'get_t_reg_rtx'.  Depends on how many
> > times this gen_rtx_REG is invoked.
> 
> I'm fairly indifferent to this. Neither is significantly shorter or
> more readable.

It's about the amount of rtx objects generated.  But that can be checked
out later.

> I'm a bit confused by the fact that basically ALL of the traffic on
> the linux-sh list is "shmedia" stuff. Is that unrelated to the actual
> SH5/SHMEDIA and just a brand name that got co-opted for an ARM-based
> SoC?

Yes, looks like.

>  If so, is there anything that can be done to get it off the
> linux-sh list so that it doesn't bury mail about the actual SH
> ISA/platform?

Ask there.  It doesn't show up here :)

Cheers,
Oleg

Re: [C/C++ PATCH] RFC: Implement -Wduplicated-cond (PR c/64249) (version 2)

[Marek Polacek]

On Fri, Oct 02, 2015 at 08:43:30AM -0700, H.J. Lu wrote:
> On Fri, Oct 2, 2015 at 3:23 AM, Marek Polacek  wrote:
> > On Wed, Sep 30, 2015 at 12:45:35PM -0600, Jeff Law wrote:
> >> On 09/30/2015 09:47 AM, Joseph Myers wrote:
> >> >The C front-end changes are OK.
> >> The rest are OK as well.
> >
> > Thanks Jeff & Joseph.
> >
> > I'm going to apply the patch soon; should it draw the ire of users, I'll
> > move the option to -Wextra.
> 
> It breaks bootstrap:
> 
> https://gcc.gnu.org/ml/gcc-regression/2015-10/msg00031.html
> 
> 
> ../../src-trunk/gcc/fortran/trans-intrinsic.c: In function âvoid
> gfc_conv_intrinsic_leadz(gfc_se*, gfc_expr*)â:
> ../../src-trunk/gcc/fortran/trans-intrinsic.c:4886:8: error:
> duplicated âifâ condition [-Werror=duplicated-cond]
>else if (argsize <= LONG_TYPE_SIZE)
> ^
> ../../src-trunk/gcc/fortran/trans-intrinsic.c:4881:3: note: previously used 
> here
>if (argsize <= INT_TYPE_SIZE)
>^
> ../../src-trunk/gcc/fortran/trans-intrinsic.c: In function âvoid
> gfc_conv_intrinsic_trailz(gfc_se*, gfc_expr*)â:
> ../../src-trunk/gcc/fortran/trans-intrinsic.c:5003:8: error:
> duplicated âifâ condition [-Werror=duplicated-cond]
>else if (argsize <= LONG_TYPE_SIZE)
> ^
> ../../src-trunk/gcc/fortran/trans-intrinsic.c:4998:3: note: previously used 
> here
>if (argsize <= INT_TYPE_SIZE)
>^
> ../../src-trunk/gcc/fortran/trans-intrinsic.c: In function âvoid
> gfc_conv_intrinsic_popcnt_poppar(gfc_se*, gfc_expr*, int)â:
> ../../src-trunk/gcc/fortran/trans-intrinsic.c:5109:8: error:
> duplicated âifâ condition [-Werror=duplicated-cond]
>else if (argsize <= LONG_TYPE_SIZE)
> ^
> ../../src-trunk/gcc/fortran/trans-intrinsic.c:5102:3: note: previously used 
> here
>if (argsize <= INT_TYPE_SIZE)
>^
> 
> since int may have the same size as long and long may have the
> same size as long long.

Oh well, sorry about that.  I don't think this easily fixable at present :(.

I opened PR67819 for this problem.  Until that is resolved, I will have to
move -Wduplicated-cond out of -Wall and -Wextra.

Marek

Re: [PATCH] x86 interrupt attribute

[Uros Bizjak]

On Fri, Oct 2, 2015 at 2:51 PM, Yulia Koval  wrote:
> Hi,
> Here is a new patch. Added HJ's changes and review changes.
>
> Implement x86 interrupt attribute

+  incoming_stack_boundary
+ = (crtl->parm_stack_boundary > ix86_incoming_stack_boundary
+   ? crtl->parm_stack_boundary : ix86_incoming_stack_boundary);

MAX (crtl->parm_stack_boundary, ix86_incoming_stack_boundary);

+bool
+ix86_epilogue_uses (int regno)
+{
+  /* If there are no caller-saved registers, we preserve all registers,
+ except for MMX and x87 registers which aren't supported when saving
+ and restoring registers.  Don't explicitly save SP register since
+ it is always preserved.  */
+  return (cfun->machine->no_caller_saved_registers
+  && reg_names[regno][0]
+  && !fixed_regs[regno]
+  && !STACK_REGNO_P (regno)
+  && !MMX_REGNO_P (regno));

There is still a redundant check for reg_names with !fixed_regs. When
member of fixed_regs is 0, we are sure that corresponding reg_names is
non-null. As can be seen in ix86_conditional_register_usage, register
names are squashed depending on target for non-existent registers in
order to prevent their usage in "asm" statements.

+  /* If there are no caller-saved registers, add all registers
+ that are clobbered by the call.  */
+  for (int i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+ if (reg_names[i][0]
+&& !fixed_regs[i]
+&& (ix86_call_used_regs[i] == 1
+ || (ix86_call_used_regs[i] & c_mask))
+&& !STACK_REGNO_P (i)
+&& !MMX_REGNO_P (i))

And here.

Uros.

Re: [PATCH] Improve DOM's optimization of control statements

[Jeff Law]

On 10/02/2015 05:15 AM, Renlin Li wrote:

Hi Jeff,

Your patch causes an ICE regression.
The test case is " gcc.c-torture/compile/pr27087.c", I observed it on
aarch64-none-elf target when compiling the test case with '-Os' flag.

A quick check shows, the cfg has been changed, but the loop information
is not updated. Thus the information about the number of basic block in
a loop is not reliable.

Could you please have a look?
Appears to be pretty simple.  If we collapse a conditional inside a 
loop, then we need to set the loop state as needing fixups.


In this specific case we have a conditional where one path eventually 
leads back to the loop latch block, the other path exits the loop.  We 
statically determine the conditional will always take us to the loop exit.


That has the side effect of making the block with the collapsed 
conditional no longer part of the loop, it's actually part of the exit 
path.  That changes the number of nodes in the loop, what edge(s) are 
the exit path(s) and possibly other stuff.


I'm running a fix through testing now.

Thanks,
jeff

Re: [patch] libstdc++/67747 Allocate space for dirent::d_name

[Jonathan Wakely]

On 02/10/15 14:41 +0200, Florian Weimer wrote:

On 10/02/2015 02:34 PM, Jonathan Wakely wrote:

On 02/10/15 14:16 +0200, Florian Weimer wrote:

On 09/29/2015 01:37 PM, Jonathan Wakely wrote:

POSIX says that dirent::d_name has an unspecified length, so calls to
readdir_r must pass a buffer with enough trailing space for
{NAME_MAX}+1 characters. I wasn't doing that, which works OK on
GNU/Linux and BSD where d_name is a large array, but fails on Solaris
32-bit.

This uses pathconf to get NAME_MAX and allocates a buffer.


This still has a buffer overflow on certain file systems.

You must not use readdir_r, it is deprecated and always insecure.  We
should probably mark it as such in the glibc headers.


OK, I'll just use readdir() then. The directory stream is private to
the library type, so the only way to call readdir() concurrently on a
single directory stream is to increment iterators concurrently, which
is undefined anyway.


Right, that's the only case where readdir_r could be theoretically
useful.  But it's not a global structure, the callers have to coordinate
anyway, and so you could well use an external lock.


Here's a much simpler patch that just uses readdir, so not need for
pathconf, NAME_MAX and all that jazz.

Tested on GNU/Linux, DragonFly, AIX, committed to trunk.


So that will work as long as readdir() doesn't use a global static
buffer shared between streams, i.e. it meets the POSIX requirement
that "They shall not be affected by a call to readdir() on a different
directory stream." I don't know if mingw meets that, but there is lots
of work needed to make this stuff work in mingw.


If mingw has this flaw, it is worth fixing on its own, and mingw is
sufficiently alive that sticking workarounds into libstdc++ for its bugs
doesn't make sense (IMHO).


FWIW I checked and the readdir in mingw-w64 is OK.


commit 9cef7454bf1a18f21a7a561eef9165149a3330c9
Author: Jonathan Wakely 
Date:   Fri Oct 2 15:53:09 2015 +0100

PR libstdc++/67747 use readdir instead of readdir_r

	PR libstdc++/67747
	* src/filesystem/dir.cc (native_readdir): Remove.
	(_Dir::advance): Use readdir instead of native_readdir.
	(recursive_directory_iterator(const path&, directory_options,
	error_code*)): Use swap instead of reset.

diff --git a/libstdc++-v3/src/filesystem/dir.cc b/libstdc++-v3/src/filesystem/dir.cc
index bce751c..33280ec 100644
--- a/libstdc++-v3/src/filesystem/dir.cc
+++ b/libstdc++-v3/src/filesystem/dir.cc
@@ -69,15 +69,17 @@ struct fs::_Dir
 namespace
 {
   template
-inline bool is_set(Bitmask obj, Bitmask bits)
+inline bool
+is_set(Bitmask obj, Bitmask bits)
 {
   return (obj & bits) != Bitmask::none;
 }
 
   // Returns {dirp, p} on success, {nullptr, p} on error.
   // If an ignored EACCES error occurs returns {}.
-  fs::_Dir
-  open_dir(const fs::path& p, fs::directory_options options, std::error_code* ec)
+  inline fs::_Dir
+  open_dir(const fs::path& p, fs::directory_options options,
+	   std::error_code* ec)
   {
 if (ec)
   ec->clear();
@@ -100,7 +102,7 @@ namespace
   }
 
   inline fs::file_type
-  get_file_type(const dirent& d __attribute__((__unused__)))
+  get_file_type(const ::dirent& d __attribute__((__unused__)))
   {
 #ifdef _GLIBCXX_HAVE_STRUCT_DIRENT_D_TYPE
 switch (d.d_type)
@@ -128,20 +130,9 @@ namespace
 return fs::file_type::none;
 #endif
   }
-
-  int
-  native_readdir(DIR* dirp, ::dirent*& entryp)
-  {
-#ifdef _GLIBCXX_FILESYSTEM_IS_WINDOWS
-if ((entryp = ::readdir(dirp)))
-  return 0;
-return errno;
-#else
-return ::readdir_r(dirp, entryp, );
-#endif
-  }
 }
 
+
 // Returns false when the end of the directory entries is reached.
 // Reports errors by setting ec or throwing.
 bool
@@ -150,9 +141,20 @@ fs::_Dir::advance(error_code* ec, directory_options options)
   if (ec)
 ec->clear();
 
-  ::dirent ent;
-  ::dirent* result = 
-  if (int err = native_readdir(dirp, result))
+  int err = std::exchange(errno, 0);
+  const auto entp = readdir(dirp);
+  std::swap(errno, err);
+
+  if (entp)
+{
+  // skip past dot and dot-dot
+  if (!strcmp(entp->d_name, ".") || !strcmp(entp->d_name, ".."))
+	return advance(ec, options);
+  entry = fs::directory_entry{path / entp->d_name};
+  type = get_file_type(*entp);
+  return true;
+}
+  else if (err)
 {
   if (err == EACCES
 && is_set(options, directory_options::skip_permission_denied))
@@ -165,15 +167,6 @@ fs::_Dir::advance(error_code* ec, directory_options options)
   ec->assign(err, std::generic_category());
   return true;
 }
-  else if (result != nullptr)
-{
-  // skip past dot and dot-dot
-  if (!strcmp(ent.d_name, ".") || !strcmp(ent.d_name, ".."))
-	return advance(ec, options);
-  entry = fs::directory_entry{path / ent.d_name};
-  type = get_file_type(ent);
-  return true;
-}
   else
 {
   // reached the end
@@ -251,10 +244,10 @@ 

Re: [PATCH] Disable -Wduplicated-cond for the time being

[Marek Polacek]

On Fri, Oct 02, 2015 at 06:27:37PM +0200, Marek Polacek wrote:
> Given that the new warning currently breaks bootstrap [*] and I see
> no simple way how to resolve PR67819 derived out of the bootstrap
> failure, I'm moving -Wduplicated-cond out of -Wall and skipping one
> of the tests for the time being.  I'm also reverting the hack in
> genemit.c.

Thus also

Index: changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-6/changes.html,v
retrieving revision 1.33
diff -u -r1.33 changes.html
--- changes.html2 Oct 2015 13:24:51 -   1.33
+++ changes.html2 Oct 2015 16:36:27 -
@@ -85,8 +85,7 @@
   by optimizations in most targets. The precision of the warnings
   depends on the optimization options used.
 -Wduplicated-cond warns about duplicated conditions
- in an if-else-if chain.  This warning is enabled by
- -Wall.
+ in an if-else-if chain.
   
 
   

Marek

Re: [PATCH] Convert SPARC to LRA

[Jeff Law]

On 09/30/2015 10:15 AM, Segher Boessenkool wrote:

On Wed, Sep 30, 2015 at 09:15:17AM -0600, Jeff Law wrote:

I guess the support of cc0 can be implemented for reasonable amount of
time.  It is just a priority issue.  I still have a lot PRs for the
targets already using LRA.

I wouldn't suggest making cc0 support a significant priority.   I'd be
more likely to push for deprecating cc0 targets first.


It looks like most cc0 targets would be pretty easy to convert, if anyone
can do testing anyway ;-)
v850, h8300 and m68k are all testable.  The first two via traditional 
simulators, the latter via aranym.  I just haven't seen the benefit for 
converting them outweighing the time, so I haven't tried.


If you wanted to take a stab (and I'm sure the v850 would be easiest), 
I'll sign up for the regression testing & debugging.



Jeff

Re: [PATCH] x86 interrupt attribute

[Yulia Koval]

Fixed it. Thanks.

On Fri, Oct 2, 2015 at 6:45 PM, Uros Bizjak  wrote:
> On Fri, Oct 2, 2015 at 2:51 PM, Yulia Koval  wrote:
>> Hi,
>> Here is a new patch. Added HJ's changes and review changes.
>>
>> Implement x86 interrupt attribute
>
> +  incoming_stack_boundary
> + = (crtl->parm_stack_boundary > ix86_incoming_stack_boundary
> +   ? crtl->parm_stack_boundary : ix86_incoming_stack_boundary);
>
> MAX (crtl->parm_stack_boundary, ix86_incoming_stack_boundary);
>
> +bool
> +ix86_epilogue_uses (int regno)
> +{
> +  /* If there are no caller-saved registers, we preserve all registers,
> + except for MMX and x87 registers which aren't supported when saving
> + and restoring registers.  Don't explicitly save SP register since
> + it is always preserved.  */
> +  return (cfun->machine->no_caller_saved_registers
> +  && reg_names[regno][0]
> +  && !fixed_regs[regno]
> +  && !STACK_REGNO_P (regno)
> +  && !MMX_REGNO_P (regno));
>
> There is still a redundant check for reg_names with !fixed_regs. When
> member of fixed_regs is 0, we are sure that corresponding reg_names is
> non-null. As can be seen in ix86_conditional_register_usage, register
> names are squashed depending on target for non-existent registers in
> order to prevent their usage in "asm" statements.
>
> +  /* If there are no caller-saved registers, add all registers
> + that are clobbered by the call.  */
> +  for (int i = 0; i < FIRST_PSEUDO_REGISTER; i++)
> + if (reg_names[i][0]
> +&& !fixed_regs[i]
> +&& (ix86_call_used_regs[i] == 1
> + || (ix86_call_used_regs[i] & c_mask))
> +&& !STACK_REGNO_P (i)
> +&& !MMX_REGNO_P (i))
>
> And here.
>
> Uros.


patch_fixed
Description: Binary data

Re: [patch] libstdc++/67747 Allocate space for dirent::d_name

[Florian Weimer]

On 10/02/2015 07:37 PM, Martin Sebor wrote:

> I'm not sure what you are basing this assertion on. In the man
> pages I have looked at, memcpy is documented as MT-Safe. readdir
> is documented as MT-Unsafe. The Unsafe definition is clear:
> contains global and static data that is not protected.

I think the Solaris thread-safety attributes are a bit too simplistic to
capture the whole scope of thread safety issues for functions operating
on mutable data.

> For example, Solaris 11.2:
> http://docs.oracle.com/cd/E36784_01/html/E36874/readdir-3c.html

“It is safe to use readdir() in a threaded application, so long as only
one thread reads from the directory stream at any given time. The
readdir() function is generally preferred over the readdir_r() function.”

Florian

Re: [Patch, fortran] PR67721 deep copy missing when assigning derived type constructor to an array

[Steve Kargl]

On Fri, Oct 02, 2015 at 09:33:33AM -0700, H.J. Lu wrote:
> On Sat, Sep 26, 2015 at 6:10 AM, Mikael Morin  wrote:
> > Hello,
> >
> > I've just submitted this PR, and the patch as well, which passes the
> > testsuite.
> >
> > The problem is a missing deep copy when the rhs is a (scalar) derived type
> > constructor (with allocatable components) and the lhs an array.
> > The patch removes the nonconstantness condition, so that the deep_copy flag
> > passed to gfc_trans_scalar_assign is set to true.
> >
> > Regression-tested on x86_64-unknown-linux-gnu. OK for trunk?
> > Mikael
> >
> 
> This caused:
> 
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67818
> 
> on GCC 5 branch.
> 

Fairly, uninformative bug report.  

-- 
Steve

Re: [Patch AArch64] Use default_elf_asm_named_section instead of special cased hook

[Christophe Lyon]

On 2 October 2015 at 15:05, Marcus Shawcroft  wrote:
> On 2 October 2015 at 14:01, Ramana Radhakrishnan
>  wrote:
>
  #undef TARGET_ASM_NAMED_SECTION
 -#define TARGET_ASM_NAMED_SECTION  aarch64_elf_asm_named_section
 +#define TARGET_ASM_NAMED_SECTION  default_elf_asm_named_section
>>>
>>> Isn't it sufficient to simply remove the #define completely and rely
>>> on the default from elfos.h?
>>
>> Doh ! you're right - Yeah should be coming in from config/elfos.h given that 
>> we don't support anything other than elf in the aarch64 port.
>>
>> Ok to commit without that hunk ?
>
> Yes. /Marcus

Hi Ramana,

Since this commit, I am seeing build failures when creating lto1:
libbackend.a(aarch64.o):(.data+0x118): undefined reference to
`aarch64_elf_asm_named_section(char const*, unsigned int, tree_node*)'
(targets aarch64_none-linux-gnu and aarch64-none-elf).

I guess I'm missing something obvious?

Christophe.

Re: [PATCH] Introduce ROUND_UP and ROUND_DOWN macros

[Bernd Schmidt]

On 10/02/2015 06:42 PM, Uros Bizjak wrote:

Attached patch introduces ROUND_UP and ROUND_DOWN global macros.
These come handy to round and align various values, as shown by the
usage in config/i386/ files.

 * system.h (ROUND_UP): New macro definition.
 (ROUND_DOWN): Ditto.
 * ggc-page.c (ROUND_UP): Remove local macro definition.
 (PAGE_ALIGN): Implement using ROUND_UP macro.

 * config/i386/i386.h (PUSH_ROUNDING): Implement using ROUND_UP macro.
 * config/i386/i386.c (function_arg_advance_64): Use ROUND_UP macro
 to align values.
 (ix86_compute_frame_layout): Ditto.
 (ix86_expand_prologue): Ditto.
 (ix86_adjust_stack_and_probe): Use ROUND_DOWN macro to round
 down values.
 (expand_set_or_movmem_via_rep): Ditto.


Ok. I double checked there are no other uses of ROUND_UP in the compiler 
(there are some in the libraries).


There are some macros like AARCH64_ROUND_UP which should probably go 
away as well. Preapproved as a followup.



Bernd

Re: [patch] libstdc++/67747 Allocate space for dirent::d_name

[Florian Weimer]

On 10/02/2015 07:53 PM, Martin Sebor wrote:

> Here's the older page:
> http://docs.oracle.com/cd/E19683-01/816-0213/6m6ne3895/index.html
> 
> With that, I agree that using readdir is thread-safe on Solaris 11.2.
> It is not safe on Solaris 9, and it would not be safe on other systems
> that don't document it as such.

I'm pretty sure the Solaris implementation did not change, only the
documentation.

Florian

RFC: PATCH for front end parts of C++ transactional memory TS

[Jason Merrill]

This patch implements the front end bits of the transactional memory 
technical specification: apart from parsing, that means treating 
transaction_safe as part of the type and dealing with conversions, 
mangling and such.


Since the transaction_safe attribute now affects type identity, I needed 
to change the C front end to allow declarations of built-ins to change 
whether the function is declared transaction_safe.  Joseph, is that hunk 
(copied at the bottom) OK?


After this patch the compiler sorrys out on atomic_cancel because 
cancel-and-throw hasn't been implemented yet.  RTH, will you be able to 
poke at that any time soon?


The patch also doesn't attempt to do anything about the library.  The 
second patch sets transaction_safe on various built-ins, but without the 
library support this just means references to undefined symbols.  The 
third patch is a beginning of libstdc++ support, which may or may not be 
useful to Jonathan or Torvald in completing that support.


I'm thinking to check in the first patch as is soon, and leave the rest 
for other people to take care of later.


Any thoughts?


diff --git a/gcc/c/c-decl.c b/gcc/c/c-decl.c
index a110226..ce8406a 100644
--- a/gcc/c/c-decl.c
+++ b/gcc/c/c-decl.c
@@ -1659,7 +1659,19 @@ match_builtin_function_types (tree newtype, tree oldtype)
 }

   trytype = build_function_type (newrettype, tryargs);
-  return build_type_attribute_variant (trytype, TYPE_ATTRIBUTES (oldtype));
+
+  /* Allow declaration to change transaction_safe attribute.  */
+  tree oldattrs = TYPE_ATTRIBUTES (oldtype);
+  tree oldtsafe = lookup_attribute ("transaction_safe", oldattrs);
+  tree newattrs = TYPE_ATTRIBUTES (newtype);
+  tree newtsafe = lookup_attribute ("transaction_safe", newattrs);
+  if (oldtsafe && !newtsafe)
+oldattrs = remove_attribute ("transaction_safe", oldattrs);
+  else if (newtsafe && !oldtsafe)
+oldattrs = tree_cons (get_identifier ("transaction_safe"),
+ NULL_TREE, oldattrs);
+
+  return build_type_attribute_variant (trytype, oldattrs);
 }

 /* Subroutine of diagnose_mismatched_decls.  Check for function type


tm.patch.gz
Description: application/gzip


tm-builtins.patch.gz
Description: application/gzip


tm-libstc++.patch.gz
Description: application/gzip

[PATCH] Introduce ROUND_UP and ROUND_DOWN macros

[Uros Bizjak]

Hello!

Attached patch introduces ROUND_UP and ROUND_DOWN global macros.
These come handy to round and align various values, as shown by the
usage in config/i386/ files.

In addition to target independent code, many targets could benefit
from these universal macros (e.g. arm and aarch64 can immediately
replace their equivalent local definitions), so I propose to put these
definitions to be available globally throughout the source. From a
quick look, there are a number of places these macro can be used.

And, as witnessed in attached patch, it is s easy to forget those "-1"s:

-offset = (offset + stack_alignment_needed) & -stack_alignment_needed;
+offset = ROUND_UP (offset, stack_alignment_needed);

[...]

-offset = (offset + stack_alignment_needed - 1) & -stack_alignment_needed;
+offset = ROUND_UP (offset, stack_alignment_needed);

2015-10-02  Uros Bizjak  

* system.h (ROUND_UP): New macro definition.
(ROUND_DOWN): Ditto.
* ggc-page.c (ROUND_UP): Remove local macro definition.
(PAGE_ALIGN): Implement using ROUND_UP macro.

* config/i386/i386.h (PUSH_ROUNDING): Implement using ROUND_UP macro.
* config/i386/i386.c (function_arg_advance_64): Use ROUND_UP macro
to align values.
(ix86_compute_frame_layout): Ditto.
(ix86_expand_prologue): Ditto.
(ix86_adjust_stack_and_probe): Use ROUND_DOWN macro to round
down values.
(expand_set_or_movmem_via_rep): Ditto.

Patch was bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

OK for mainline?

Uros.
Index: ggc-page.c
===
--- ggc-page.c  (revision 228380)
+++ ggc-page.c  (working copy)
@@ -216,13 +216,9 @@ static const size_t extra_order_size_table[] = {
 
 #define ROUND_UP_VALUE(x, f) ((f) - 1 - ((f) - 1 + (x)) % (f))
 
-/* Compute the smallest multiple of F that is >= X.  */
-
-#define ROUND_UP(x, f) (CEIL (x, f) * (f))
-
 /* Round X to next multiple of the page size */
 
-#define PAGE_ALIGN(x) (((x) + G.pagesize - 1) & ~(G.pagesize - 1))
+#define PAGE_ALIGN(x) ROUND_UP ((x), G.pagesize)
 
 /* The Ith entry is the number of objects on a page or order I.  */
 
Index: system.h
===
--- system.h(revision 228380)
+++ system.h(working copy)
@@ -369,6 +369,12 @@ extern int errno;
 /* Returns the least number N such that N * Y >= X.  */
 #define CEIL(x,y) (((x) + (y) - 1) / (y))
 
+/* This macro rounds x up to the y boundary.  */
+#define ROUND_UP(x,y) (((x) + (y) - 1) & ~((y) - 1))
+
+/* This macro rounds x down to the y boundary.  */
+#define ROUND_DOWN(x,y) ((x) & ~((y) - 1))
+   
 #ifdef HAVE_SYS_WAIT_H
 #include 
 #endif
Index: config/i386/i386.h
===
--- config/i386/i386.h  (revision 228380)
+++ config/i386/i386.h  (working copy)
@@ -1596,8 +1596,7 @@ enum reg_class
and -8 for 64bit targets, we need to make sure all stack pointer adjustments
are in multiple of 4 for 32bit targets and 8 for 64bit targets.  */
 
-#define PUSH_ROUNDING(BYTES) \
-  (((BYTES) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD)
+#define PUSH_ROUNDING(BYTES) ROUND_UP (BYTES, UNITS_PER_WORD)
 
 /* If defined, the maximum amount of space required for outgoing arguments
will be computed and placed into the variable `crtl->outgoing_args_size'.
Index: config/i386/i386.c
===
--- config/i386/i386.c  (revision 228380)
+++ config/i386/i386.c  (working copy)
@@ -8651,7 +8651,7 @@ function_arg_advance_64 (CUMULATIVE_ARGS *cum, mac
   else
 {
   int align = ix86_function_arg_boundary (mode, type) / BITS_PER_WORD;
-  cum->words = (cum->words + align - 1) & ~(align - 1);
+  cum->words = ROUND_UP (cum->words, align);
   cum->words += words;
   return 0;
 }
@@ -11285,7 +11285,7 @@ ix86_compute_frame_layout (struct ix86_frame *fram
  16-byte aligned default stack, and thus we don't need to be
 within the re-aligned local stack frame to save them.  */
   gcc_assert (INCOMING_STACK_BOUNDARY >= 128);
-  offset = (offset + 16 - 1) & -16;
+  offset = ROUND_UP (offset, 16);
   offset += frame->nsseregs * 16;
 }
   frame->sse_reg_save_offset = offset;
@@ -11295,7 +11295,7 @@ ix86_compute_frame_layout (struct ix86_frame *fram
  sure that no value happens to be the same before and after, force
  the alignment computation below to add a non-zero value.  */
   if (stack_realign_fp)
-offset = (offset + stack_alignment_needed) & -stack_alignment_needed;
+offset = ROUND_UP (offset, stack_alignment_needed);
 
   /* Va-arg area */
   frame->va_arg_size = ix86_varargs_gpr_size + ix86_varargs_fpr_size;
@@ -11308,7 +11308,7 @@ ix86_compute_frame_layout (struct ix86_frame *fram
   || !crtl->is_leaf
   || cfun->calls_alloca
   || ix86_current_function_calls_tls_descriptor)
-

Re: [Patch AArch64] Use default_elf_asm_named_section instead of special cased hook

[Ramana Radhakrishnan]

On Fri, Oct 2, 2015 at 5:40 PM, Christophe Lyon
 wrote:
> On 2 October 2015 at 15:05, Marcus Shawcroft  
> wrote:
>> On 2 October 2015 at 14:01, Ramana Radhakrishnan
>>  wrote:
>>
>  #undef TARGET_ASM_NAMED_SECTION
> -#define TARGET_ASM_NAMED_SECTION  aarch64_elf_asm_named_section
> +#define TARGET_ASM_NAMED_SECTION  default_elf_asm_named_section

 Isn't it sufficient to simply remove the #define completely and rely
 on the default from elfos.h?
>>>
>>> Doh ! you're right - Yeah should be coming in from config/elfos.h given 
>>> that we don't support anything other than elf in the aarch64 port.
>>>
>>> Ok to commit without that hunk ?
>>
>> Yes. /Marcus
>
> Hi Ramana,
>
> Since this commit, I am seeing build failures when creating lto1:
> libbackend.a(aarch64.o):(.data+0x118): undefined reference to
> `aarch64_elf_asm_named_section(char const*, unsigned int, tree_node*)'
> (targets aarch64_none-linux-gnu and aarch64-none-elf).
>
> I guess I'm missing something obvious?

I missed a hunk which was fixed up in
https://gcc.gnu.org/ml/gcc-cvs/2015-10/msg00086.html. I don't know why
the email for that hasn't made it to the lists yet. Sorry about the
breakage.

regards
Ramana

>
> Christophe.

Re: C PATCH for c/65345 (file-scope _Atomic expansion with floats)

[Ramana Radhakrishnan]

On 01/10/15 17:18, Marek Polacek wrote:
> On Thu, Oct 01, 2015 at 11:02:09AM -0400, David Edelsohn wrote:
>> On Thu, Oct 1, 2015 at 10:49 AM, Marek Polacek  wrote:
>>> Joseph reminded me that I had forgotten about this patch.  As mentioned
>>> here , I'm
>>> removing the XFAILs in the tests so people are likely to see new FAILs.
>>>
>>> I think the following targets will need similar fix as the one below:
>>> * MIPS
>>> * rs6000
>>> * alpha
>>> * sparc
>>> * s390
>>> * arm
>>> * sh
>>> * aarch64
>>>
>>> I'm CCing the respective maintainers.  You might want to XFAIL those tests.

Thanks for the heads up. The use of the _Atomic feature
is not really target specific but more a language standards issue across all 
the architectures
that the GCC project supports, therefore XFAILing them is the wrong approach 
imho.


>>
>> Why aren't you testing the appropriate fix on all of the targets?
> 
> It's very improbable that I could fix and properly test all of them;
> I simply don't have the cycles and resources to fix e.g. sh/sparc/alpha/mips.

I don't think anyone expects you to be testing the patch on every single port 
.

Even though these changes sit in the target hooks into various backends, you 
may be best
placed to advise how target maintainers adjust their backends. If at that point 
this appears to be
mechanical, it's been good practice in the community for folks to send patches
that the maintainers can fully test even if the testing has been light for the
proposed patch.

However, I am not aware of a "policy" for these things other than that these
sort of changes are selectively enforced in the community. Maybe we should think
about it 


> 
> You want me to revert my fix, but I don't really see the point here; the
> patch doesn't introduce any regressions, it's just that the new tests are
> likely to FAIL.  It sounds preferable to me to fix 2 targets than to leave
> all of them broken (and I bet many maintainers were unaware of the issue).
> 


> Would XFAILing the new tests work for you, if you don't want to see any
> new FAILs?
> 
> If you still insist on reverting the patch, ok, but I think this PR is
> unlikely to be resolved any time soon then.
> 
>   Marek
> 


I've had a quick look on aarch64 - changing the interface to use 
create_tmp_var_raw
is rather mechanical. What I'm struggling with is figuring out whether
the change for TARGET_EXPR is applicable in the arm / aarch64 backends.

It took me a couple of minutes to trial the interface changes (attached) on 
aarch64
as I had a cross-compiler build tree lying around and could see that the 
compiler
did not ICE with the 2 testcases provided and pr65345-4.c appeared to pass on 
hardware.


regards
Ramana

diff --git a/gcc/config/aarch64/aarch64-builtins.c 
b/gcc/config/aarch64/aarch64-builtins.c
index 80916a9..716ed6e 100644
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -1462,8 +1462,8 @@ aarch64_atomic_assign_expand_fenv (tree *hold, tree 
*clear, tree *update)
__builtin_aarch64_set_cr (masked_cr);
__builtin_aarch64_set_sr (masked_sr);  */
 
-  fenv_cr = create_tmp_var (unsigned_type_node);
-  fenv_sr = create_tmp_var (unsigned_type_node);
+  fenv_cr = create_tmp_var_raw (unsigned_type_node);
+  fenv_sr = create_tmp_var_raw (unsigned_type_node);
 
   get_fpcr = aarch64_builtin_decls[AARCH64_BUILTIN_GET_FPCR];
   set_fpcr = aarch64_builtin_decls[AARCH64_BUILTIN_SET_FPCR];
@@ -1476,9 +1476,9 @@ aarch64_atomic_assign_expand_fenv (tree *hold, tree 
*clear, tree *update)
   ~(AARCH64_FE_ALL_EXCEPT));
 
   ld_fenv_cr = build2 (MODIFY_EXPR, unsigned_type_node,
-   fenv_cr, build_call_expr (get_fpcr, 0));
+  fenv_cr, build_call_expr (get_fpcr, 0));
   ld_fenv_sr = build2 (MODIFY_EXPR, unsigned_type_node,
-   fenv_sr, build_call_expr (get_fpsr, 0));
+  fenv_sr, build_call_expr (get_fpsr, 0));
 
   masked_fenv_cr = build2 (BIT_AND_EXPR, unsigned_type_node, fenv_cr, mask_cr);
   masked_fenv_sr = build2 (BIT_AND_EXPR, unsigned_type_node, fenv_sr, mask_sr);
@@ -1509,7 +1509,7 @@ aarch64_atomic_assign_expand_fenv (tree *hold, tree 
*clear, tree *update)
 
__atomic_feraiseexcept (new_fenv_var);  */
 
-  new_fenv_var = create_tmp_var (unsigned_type_node);
+  new_fenv_var = create_tmp_var_raw (unsigned_type_node);
   reload_fenv = build2 (MODIFY_EXPR, unsigned_type_node,
new_fenv_var, build_call_expr (get_fpsr, 0));
   restore_fnenv = build_call_expr (set_fpsr, 1, fenv_sr);

Re: [patch] libstdc++/67747 Allocate space for dirent::d_name

[Martin Sebor]

On 10/02/2015 11:09 AM, Florian Weimer wrote:

On 10/02/2015 06:57 PM, Martin Sebor wrote:


Readdir isn't required to be thread-safe (it may reference global
data) so calling it in multiple threads even with a different dirp
argument is undefined. A thread-unsafe implementation can meet the
POSIX requirement and still access global data but without locking.


A readdir implementation which is not thread-safe when used with
different directory streams is just buggy.  It may be conforming, but so
is an implementation that always fails with EOVERFLOW.


POSIX is clear: The readdir() function need not be thread-safe.
There's nothing wrong with relying on a function's thread safety
when it's documented to be thread safe by the implementation,
even if POSIX doesn't guarantee it. But doing so otherwise,
against both the standard and against the documentation, would
be risky to say the least.




The Solaris implementation, for example, is explicitly documented
as thread unsafe.


MT-safety is ambiguous for functions which operate on pointer arguments.
  It is not clear if it is permitted to call the function without
synchronization on overlapping objects.

memcpy has the same thread-safety level as readdir on Solaris


I'm not sure what you are basing this assertion on. In the man
pages I have looked at, memcpy is documented as MT-Safe. readdir
is documented as MT-Unsafe. The Unsafe definition is clear:
contains global and static data that is not protected.

For example, Solaris 11.2:
http://docs.oracle.com/cd/E36784_01/html/E36874/readdir-3c.html
http://docs.oracle.com/cd/E36784_01/html/E36874/memcpy-3c.html

Martin

Re: Do not use TYPE_CANONICAL in useless_type_conversion

[Jan Hubicka]

> > On Fri, 2 Oct 2015, Jan Hubicka wrote:
> > 
> > > > There must be a reason why I allowed modes to differ there btw ;)
> > > 
> > > Thinking about it, I guess reason is that incomplete types do not have
> > > resonable modes set, so requiring modes to match will prevent complete
> > > and incomplete types to match.
> > 
> > Hmm.  I still think that the mode shouldn't be relevant.  Isn't this
> > only about the cases where the aggregate ends up not having its address
> > taken and thus we don't allocate a stack slot for it but end up
> > using a register with mode?  ISTR expansion has special cases dealing
> > with some of the mismatch cases and a fallback spilling to the stack.
> > 
> > I think we should fix that rather than disallowing aggregate assignments
> > (which are memory ops to GIMPLE) based on the mode of the aggregate.
> 
> THe ICE we get is:
> +===GNAT BUG DETECTED==+^M
> | 6.0.0 20150929 (experimental) (powerpc64-unknown-linux-gnu) GCC error:   |^M
> | in convert_move, at expr.c:282   |^M
> | Error detected around 
> /home/jh/trunk/gcc/testsuite/gnat.dg/overriding_ops.ads:7:4|^M
> | Please submit a bug report; see http://gcc.gnu.org/bugs.html.|^M
> | Use a subject line meaningful to you and us to track the bug.|^M
> | Include the entire contents of this bug box in the report.   |^M
> | Include the exact command that you entered.  |^M
> | Also include sources listed below.   |^M
> +==+^M
> 
> which is:
> void
> convert_move (rtx to, rtx from, int unsignedp)
> {
>   machine_mode to_mode = GET_MODE (to);
>   machine_mode from_mode = GET_MODE (from);
>   int to_real = SCALAR_FLOAT_MODE_P (to_mode);
>   int from_real = SCALAR_FLOAT_MODE_P (from_mode);
>   enum insn_code code;
>   rtx libcall;
> 
>   /* rtx code for making an equivalent value.  */
>   enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
>   : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
> 
> 
>   gcc_assert (to_real == from_real);
>   gcc_assert (to_mode != BLKmode);
>   gcc_assert (from_mode != BLKmode);
> 
> so specifically we do not allow any RTL conversion from and to BLKmode and if
> one of them is, we die. I guess it is because convert_move does not know size
> of argument and does not expect it to be equivalent.  We can fix this earlier
> upstream when expanding assignment by adding appropriate subreg I think, but I
> would rather do things step by step - first get with removal of TYPE_CANONICAL
> and doing this second. I think one needs to fix expand_move and also probably 
> an
> expansion of calls/memory statemetns that also take loads/stores as 
> parameters.

Hi,
this is variant of patch I am testing. (it passed testing on ppc64-linux for Ada
that only trips the code, so I guess it will pass).  The convert_move is called
from store_expr_with_bounds which already knows how to handle stores to BLKmode.
It seems natural to extend it by stores from BLKmode that makes it possible to
not care about TYPE_MODE of aggregate when defining gimple types.

OK if testing passes?

Honza

* expr.c (store_expr_with_bounds): Handle aggregate moves from
BLKmode.
* gimple-expr.c (useless_type_conversion_p): Do not use TYPE_CANONICAL
to define gimple type system; compare aggregates only by size.
Index: expr.c
===
--- expr.c  (revision 228267)
+++ expr.c  (working copy)
@@ -5462,7 +5462,12 @@ store_expr_with_bounds (tree exp, rtx ta
 {
   if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode)
{
- if (GET_MODE (target) == BLKmode)
+ if (GET_MODE (temp) == BLKmode && GET_MODE (target) != BLKmode)
+   {
+ gcc_assert (AGGREGATE_TYPE_P (TREE_TYPE (exp)));
+ temp = simplify_gen_subreg (GET_MODE (target), temp, BLKmode, 0);
+   }
+ else if (GET_MODE (target) == BLKmode)
{
  /* Handle calls that return BLKmode values in registers.  */
  if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
Index: gimple-expr.c
===
--- gimple-expr.c   (revision 228267)
+++ gimple-expr.c   (working copy)
@@ -87,11 +87,6 @@ useless_type_conversion_p (tree outer_ty
   if (inner_type == outer_type)
 return true;
 
-  /* If we know the canonical types, compare them.  */
-  if (TYPE_CANONICAL (inner_type)
-  && TYPE_CANONICAL (inner_type) == TYPE_CANONICAL (outer_type))
-return true;
-
   /* Changes in machine mode are never useless conversions unless we
  deal with aggregate types in which case we defer to later checks.  */
   if (TYPE_MODE (inner_type) != TYPE_MODE 

Re: [patch] libstdc++/67747 Allocate space for dirent::d_name

[Florian Weimer]

On 10/02/2015 06:57 PM, Martin Sebor wrote:

> Readdir isn't required to be thread-safe (it may reference global
> data) so calling it in multiple threads even with a different dirp
> argument is undefined. A thread-unsafe implementation can meet the
> POSIX requirement and still access global data but without locking.

A readdir implementation which is not thread-safe when used with
different directory streams is just buggy.  It may be conforming, but so
is an implementation that always fails with EOVERFLOW.

> The Solaris implementation, for example, is explicitly documented
> as thread unsafe.

MT-safety is ambiguous for functions which operate on pointer arguments.
 It is not clear if it is permitted to call the function without
synchronization on overlapping objects.

memcpy has the same thread-safety level as readdir on Solaris
(operations on overlapping objects are not thread-safe, non-overlapping
objects are), and is documented to be MT-safe.

Florian