[PATCH, rs6000] Disable gimple fold for float or double vec_minmax when fast-math is not set

[HAO CHEN GUI via Gcc-patches]

Hi,

  This patch disables gimple folding for VSX_BUILTIN_XVMINDP, 
VSX_BUILTIN_XVMAXDP, ALTIVEC_BUILTIN_VMINFP and  ALTIVEC_BUILTIN_VMAXFP when 
fast-math is not set.  With the gimple folding is enabled, the four built-ins 
will be implemented by c-type instructions - xs[min|max]cdp on P9 and P10 if 
they can be converted to scalar comparisons.  While they are implemented by 
xv[min|max][s|d]p on P8 and P7 as P8 and P7 don't have corresponding scalar 
comparison instructions.  The patch binds these four built-ins to 
xv[min|max][s|d]p when fast-math is not set. The two new test cases illustrate 
it. 

  ALTIVEC_BUILTIN_VMINFP and  ALTIVEC_BUILTIN_VMAXFP are not implemented by 
vminfp or vmaxfp.

rs6000-builtin.def:BU_ALTIVEC_2 (VMAXFP,  "vmaxfp", CONST, 
smaxv4sf3)

rs6000-builtin.def:BU_ALTIVEC_2 (VMINFP,  "vminfp", CONST, 
sminv4sf3)

Bootstrapped and tested on powerpc64le-linux with no regressions. Is this okay 
for trunk? Any recommendations? Thanks a lot.


ChangeLog

2021-11-01 Haochen Gui 

gcc/
    * config/rs6000/rs6000-call.c (rs6000_gimple_fold_builtin): Disable
    gimple fold for VSX_BUILTIN_XVMINDP, ALTIVEC_BUILTIN_VMINFP,
    VSX_BUILTIN_XVMAXDP, ALTIVEC_BUILTIN_VMAXFP when fast-math is not
    set.

gcc/testsuite/
    * gcc.target/powerpc/vec-minmax-1.c: New test.
    * gcc.target/powerpc/vec-minmax-2.c: Likewise.


patch.diff

diff --git a/gcc/testsuite/gcc.target/powerpc/vec-minmax-1.c 
b/gcc/testsuite/gcc.target/powerpc/vec-minmax-1.c
new file mode 100644
index 000..e238659c9be
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-minmax-1.c
@@ -0,0 +1,52 @@
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-O2 -mdejagnu-cpu=power9" } */
+/* { dg-final { scan-assembler-times {\mxvmaxdp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmaxsp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmindp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvminsp\M} 1 } } */
+
+/* This test verifies that float or double vec_min/max are bound to
+   xv[min|max][d|s]p instructions when fast-math is not set.  */
+
+
+#include 
+
+#ifdef _BIG_ENDIAN
+   const int PREF_D = 0;
+#else
+   const int PREF_D = 1;
+#endif
+
+double vmaxd (double a, double b)
+{
+  vector double va = vec_promote (a, PREF_D);
+  vector double vb = vec_promote (b, PREF_D);
+  return vec_extract (vec_max (va, vb), PREF_D);
+}
+
+double vmind (double a, double b)
+{
+  vector double va = vec_promote (a, PREF_D);
+  vector double vb = vec_promote (b, PREF_D);
+  return vec_extract (vec_min (va, vb), PREF_D);
+}
+
+#ifdef _BIG_ENDIAN
+   const int PREF_F = 0;
+#else
+   const int PREF_F = 3;
+#endif
+
+float vmaxf (float a, float b)
+{
+  vector float va = vec_promote (a, PREF_F);
+  vector float vb = vec_promote (b, PREF_F);
+  return vec_extract (vec_max (va, vb), PREF_F);
+}
+
+float vminf (float a, float b)
+{
+  vector float va = vec_promote (a, PREF_F);
+  vector float vb = vec_promote (b, PREF_F);
+  return vec_extract (vec_min (va, vb), PREF_F);
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-minmax-2.c 
b/gcc/testsuite/gcc.target/powerpc/vec-minmax-2.c
new file mode 100644
index 000..149275d8709
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-minmax-2.c
@@ -0,0 +1,50 @@
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-O2 -mdejagnu-cpu=power9 -ffast-math" } */
+/* { dg-final { scan-assembler-times {\mxsmaxcdp\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mxsmincdp\M} 2 } } */
+
+/* This test verifies that float or double vec_min/max can be converted
+   to scalar comparison when fast-math is set.  */
+
+
+#include 
+
+#ifdef _BIG_ENDIAN
+   const int PREF_D = 0;
+#else
+   const int PREF_D = 1;
+#endif
+
+double vmaxd (double a, double b)
+{
+  vector double va = vec_promote (a, PREF_D);
+  vector double vb = vec_promote (b, PREF_D);
+  return vec_extract (vec_max (va, vb), PREF_D);
+}
+
+double vmind (double a, double b)
+{
+  vector double va = vec_promote (a, PREF_D);
+  vector double vb = vec_promote (b, PREF_D);
+  return vec_extract (vec_min (va, vb), PREF_D);
+}
+
+#ifdef _BIG_ENDIAN
+   const int PREF_F = 0;
+#else
+   const int PREF_F = 3;
+#endif
+
+float vmaxf (float a, float b)
+{
+  vector float va = vec_promote (a, PREF_F);
+  vector float vb = vec_promote (b, PREF_F);
+  return vec_extract (vec_max (va, vb), PREF_F);
+}
+
+float vminf (float a, float b)
+{
+  vector float va = vec_promote (a, PREF_F);
+  vector float vb = vec_promote (b, PREF_F);
+  return vec_extract (vec_min (va, vb), PREF_F);
+}
2021-11-01 Haochen Gui 

gcc/
* config/rs6000/rs6000-call.c (rs6000_gimple_fold_builtin): Disable
gimple fold for VSX_BUILTIN_XVMINDP, ALTIVEC_BUILTIN_VMINFP,
VSX_BUILTIN_XVMAXDP, ALTIVEC_BUILTIN_VMAXFP when fast-math is not
set.

gcc/testsuite/
* gcc.target/powerpc/vec-minmax-1.c: New test.
* gcc.t

Re: [PATCH v2 2/4] Refactor loop_version

[Xionghu Luo via Gcc-patches]

On 2021/10/29 19:52, Richard Biener wrote:
> On Wed, 27 Oct 2021, Xionghu Luo wrote:
> 
>> loop_version currently does lv_adjust_loop_entry_edge
>> before it loopifys the copy inserted on the header.  This patch moves
>> the condition generation later and thus we have four pieces to help
>> understanding of how the adjustment works:
>>  1) duplicating the loop on the entry edge.
>>  2) loopify the duplicated new loop.
>>  3) adjusting the CFG to insert a condition branching to either loop
>>  with lv_adjust_loop_entry_edge.
>>  4) From loopify extract the scale_loop_frequencies bits.
>>
>> Also removed some piece of code seems obviously useless which is not
>> completely sure:
>>  - redirect_all_edges since it is false and loopify only called once.
>>  - extract_cond_bb_edges and lv_flush_pending_stmts (false_edge) as the
>>  edge is not redirected actually.
> 
> This is OK (you can also commit this independently), thanks for the
> cleanup.

Thanks, committed this and [PATCH v2 4/4] to r12-4818 and r12-4819.

-- 
Thanks,
Xionghu

Re: [PATCH] Fortran: Diagnose all operands with constraint violations [PR101337]

[Sandra Loosemore]

On 10/31/21 1:50 PM, Bernhard Reutner-Fischer wrote:

From: Bernhard Reutner-Fischer 

PR fortran/101337

gcc/fortran/ChangeLog:

* resolve.c (resolve_operator): Continue resolving on op2 error.

---
The PR rightfully notes that we only diagnose the right operator
and do not check the left operator if the right one was faulty.

c407b-2 is one of the testcases with respective XFAILs.
Since that testcase is rather big (and full of errors) i'm listing an
abbreviated version here, including the output we'd generate with the
attached patch.

Note: I did not address the XFAILs! Sandra, please take over if you like
   the patch!

Bootstrapped and regtested without new regressions (XFAILs are
apparently ignored and not flagged if they are auto-fixed).
As said, Sandra please take over, i'm deleting this locally.


OK, I will take a look at the test results once I reach a good stopping 
point with the other thing I am hacking at present.


-Sandra

[PATCH] Check number of iterations for test cases pr101145

[Jiufu Guo via Gcc-patches]

PR101145 is supporting if the number of iterations can be calculated
for the 'until wrap' condition.  Current test cases are checking if
the loop can be vectorized, if a loop can be vectorized then the number
of interations is known.  While it would be better to check the loop's
number of iterations directly.  This patch updates the test cases
accordingly.

Bootstrap and regtest pass on ppc,ppc64le and x86_64.
Is this ok for trunk?

BR,
Jiufu

gcc/testsuite/ChangeLog:

* gcc.dg/vect/pr101145_1.c: Update case.
* gcc.dg/vect/pr101145_2.c: Update case.
* gcc.dg/vect/pr101145_3.c: Update case.

---
 gcc/testsuite/gcc.dg/vect/pr101145_1.c | 2 +-
 gcc/testsuite/gcc.dg/vect/pr101145_2.c | 2 +-
 gcc/testsuite/gcc.dg/vect/pr101145_3.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/vect/pr101145_1.c 
b/gcc/testsuite/gcc.dg/vect/pr101145_1.c
index 9332b2c4257..13a89fa6863 100644
--- a/gcc/testsuite/gcc.dg/vect/pr101145_1.c
+++ b/gcc/testsuite/gcc.dg/vect/pr101145_1.c
@@ -10,4 +10,4 @@
 
 #include "pr101145.inc"
 
-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" } } */
+/* { dg-final { scan-tree-dump-times "Symbolic number of iterations is" 2 
"vect" } } */
diff --git a/gcc/testsuite/gcc.dg/vect/pr101145_2.c 
b/gcc/testsuite/gcc.dg/vect/pr101145_2.c
index fa2c6be689a..5265491b98d 100644
--- a/gcc/testsuite/gcc.dg/vect/pr101145_2.c
+++ b/gcc/testsuite/gcc.dg/vect/pr101145_2.c
@@ -10,4 +10,4 @@
 
 #include "pr101145.inc"
 
-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" } } */
+/* { dg-final { scan-tree-dump-times "Symbolic number of iterations is" 2 
"vect" } } */
diff --git a/gcc/testsuite/gcc.dg/vect/pr101145_3.c 
b/gcc/testsuite/gcc.dg/vect/pr101145_3.c
index 9f43c82593f..ffda26cf0bc 100644
--- a/gcc/testsuite/gcc.dg/vect/pr101145_3.c
+++ b/gcc/testsuite/gcc.dg/vect/pr101145_3.c
@@ -10,4 +10,4 @@
 
 #include "pr101145.inc"
 
-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" } } */
+/* { dg-final { scan-tree-dump-times "Symbolic number of iterations is" 2 
"vect" } } */
-- 
2.17.1

[PATCH] Adjust testcase for O2 vect.

[liuhongt via Gcc-patches]

> (I'm assuming the difference is due to some architectural
> constraints as opposed to arbitrary limitations in the code
There're 2 difference:
1. target support unaligned store or not.
2. target support move by piece or not(which will enable block move in gimple 
level).

Updated patch.

Adjust code in check_vect_slp_store_usage to make it an exact
pattern match of the corresponding testcases.
These new target/xfail selectors are added as a temporary solution,
and should be removed after real issue is fixed for Wstringop-overflow.

gcc/ChangeLog:

* doc/sourcebuild.texi (vect_slp_v4qi_store_unalign,
vect_slp_v2hi_store_unalign, vect_slp_v4hi_store_unalign,
vect_slp_v4si_store_unalign): Document efficient target.
(vect_slp_v4qi_store_unalign_1, vect_slp_v8qi_store_unalign_1,
vect_slp_v16qi_store_unalign_1): Ditto.
(vect_slp_v2hi_store_align,vect_slp_v2qi_store_align,
vect_slp_v2si_store_align, vect_slp_v4qi_store_align): Ditto.
(struct_4char_block_move, struct_8char_block_move,
struct_16char_block_move): Ditto.

gcc/testsuite/ChangeLog:

PR testsuite/102944
* c-c++-common/Wstringop-overflow-2.c: Adjust target/xfail
selector.
* gcc.dg/Warray-bounds-48.c: Ditto.
* gcc.dg/Warray-bounds-51.c: Ditto.
* gcc.dg/Warray-parameter-3.c: Ditto.
* gcc.dg/Wstringop-overflow-14.c: Ditto.
* gcc.dg/Wstringop-overflow-21.c: Ditto.
* gcc.dg/Wstringop-overflow-68.c: Ditto
* gcc.dg/Wstringop-overflow-76.c: Ditto
* gcc.dg/Wzero-length-array-bounds-2.c: Ditto.
* lib/target-supports.exp (vect_slp_v4qi_store_unalign): New
efficient target.
(vect_slp_v4qi_store_unalign_1): Ditto.
(struct_4char_block_move): Ditto.
(struct_8char_block_move): Ditto.
(stryct_16char_block_move): Ditto.
(vect_slp_v2hi_store_align): Ditto.
(vect_slp_v2qi_store): Rename to ..
(vect_slp_v2qi_store_align): .. this.
(vect_slp_v4qi_store): Rename to ..
(vect_slp_v4qi_store_align): .. This.
(vect_slp_v8qi_store): Rename to ..
(vect_slp_v8qi_store_unalign_1): .. This.
(vect_slp_v16qi_store): Rename to ..
(vect_slp_v16qi_store_unalign_1): .. This.
(vect_slp_v2hi_store): Rename to ..
(vect_slp_v2hi_store_unalign): .. This.
(vect_slp_v4hi_store): Rename to ..
(vect_slp_v4hi_store_unalign): This.
(vect_slp_v2si_store): Rename to ..
(vect_slp_v2si_store_align): .. This.
(vect_slp_v4si_store): Rename to ..
(vect_slp_v4si_store_unalign): Ditto.
(check_vect_slp_aligned_store_usage): Rename to ..
(check_vect_slp_store_usage): .. this and adjust code to make
it an exact pattern match of corresponding testcase.
---
 gcc/doc/sourcebuild.texi  |  59 ++--
 .../c-c++-common/Wstringop-overflow-2.c   |  20 +-
 gcc/testsuite/gcc.dg/Warray-bounds-48.c   |   4 +-
 gcc/testsuite/gcc.dg/Warray-bounds-51.c   |   2 +-
 gcc/testsuite/gcc.dg/Warray-parameter-3.c |   2 +-
 gcc/testsuite/gcc.dg/Wstringop-overflow-14.c  |   4 +-
 gcc/testsuite/gcc.dg/Wstringop-overflow-21.c  |   8 +-
 gcc/testsuite/gcc.dg/Wstringop-overflow-68.c  |  10 +-
 gcc/testsuite/gcc.dg/Wstringop-overflow-76.c  |  16 +-
 .../gcc.dg/Wzero-length-array-bounds-2.c  |   2 +-
 gcc/testsuite/lib/target-supports.exp | 313 +-
 11 files changed, 302 insertions(+), 138 deletions(-)

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 6a165767630..de055d71654 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1846,37 +1846,58 @@ Target supports loop vectorization with partial vectors 
and
 Target supports loop vectorization with partial vectors and
 @code{vect-partial-vector-usage} is nonzero.
 
-@item vect_slp_v2qi_store
+@item vect_slp_v2qi_store_align
 Target supports vectorization of 2-byte char stores with 2-byte aligned
 address at plain @option{-O2}.
 
-@item vect_slp_v4qi_store
+@item vect_slp_v4qi_store_align
 Target supports vectorization of 4-byte char stores with 4-byte aligned
 address at plain @option{-O2}.
 
-@item vect_slp_v8qi_store
-Target supports vectorization of 8-byte char stores with 8-byte aligned
-address at plain @option{-O2}.
+@item vect_slp_v4qi_store_unalign
+Target supports vectorization of 4-byte char stores with unaligned address
+at plain @option{-O2}.
 
-@item vect_slp_v16qi_store
-Target supports vectorization of 16-byte char stores with 16-byte aligned
-address at plain @option{-O2}.
+@item struct_4char_block_move
+Target supports block move for 8-byte aligned 4-byte size struct 
initialization.
+
+@item vect_slp_v4qi_store_unalign_1
+Target supports vectorization of 4-byte char stores with unaligned address
+or store them with constant pool at plain @option{-O2}.
+
+@item struct_8char_block_move
+Target supports block move for

Re: [PATCH] x86-64: Remove HAVE_LD_PIE_COPYRELOC

[Fāng-ruì Sòng via Gcc-patches]

On Fri, Oct 8, 2021 at 10:57 AM Fāng-ruì Sòng  wrote:
>
> On Fri, Sep 24, 2021 at 11:29 AM H.J. Lu  wrote:
> >
> > On Fri, Sep 24, 2021 at 11:14 AM Fāng-ruì Sòng  wrote:
> > >
> > > On Fri, Sep 24, 2021 at 10:41 AM H.J. Lu  wrote:
> > > >
> > > > On Fri, Sep 24, 2021 at 10:29 AM Fāng-ruì Sòng  
> > > > wrote:
> > > > >
> > > > >  On Tue, Sep 21, 2021 at 7:08 PM Fāng-ruì Sòng  
> > > > > wrote:
> > > > > >
> > > > > > On Tue, Sep 21, 2021 at 6:57 PM H.J. Lu  wrote:
> > > > > > >
> > > > > > > On Tue, Sep 21, 2021 at 9:16 AM Uros Bizjak  
> > > > > > > wrote:
> > > > > > > >
> > > > > > > > On Mon, Sep 20, 2021 at 8:20 PM Fāng-ruì Sòng via Gcc-patches
> > > > > > > >  wrote:
> > > > > > > > >
> > > > > > > > > PING^5 
> > > > > > > > > https://gcc.gnu.org/pipermail/gcc-patches/2021-May/570139.html
> > > > > > > > >
> > > > > > > > > On Sat, Sep 4, 2021 at 12:11 PM Fāng-ruì Sòng 
> > > > > > > > >  wrote:
> > > > > > > > > >
> > > > > > > > > > PING^4 
> > > > > > > > > > https://gcc.gnu.org/pipermail/gcc-patches/2021-May/570139.html
> > > > > > > > > >
> > > > > > > > > > One major design goal of PIE was to avoid copy relocations.
> > > > > > > > > > The original patch for GCC 5 caused problems for many years.
> > > > > > > > > >
> > > > > > > > > > On Wed, Aug 18, 2021 at 11:54 PM Fāng-ruì Sòng 
> > > > > > > > > >  wrote:
> > > > > > > > > >>
> > > > > > > > > >> PING^3 
> > > > > > > > > >> https://gcc.gnu.org/pipermail/gcc-patches/2021-May/570139.html
> > > > > > > > > >>
> > > > > > > > > >> On Fri, Jun 4, 2021 at 3:04 PM Fāng-ruì Sòng 
> > > > > > > > > >>  wrote:
> > > > > > > > > >> >
> > > > > > > > > >> > PING^2 
> > > > > > > > > >> > https://gcc.gnu.org/pipermail/gcc-patches/2021-May/570139.html
> > > > > > > > > >> >
> > > > > > > > > >> > On Mon, May 24, 2021 at 9:43 AM Fāng-ruì Sòng 
> > > > > > > > > >> >  wrote:
> > > > > > > > > >> > >
> > > > > > > > > >> > > Ping 
> > > > > > > > > >> > > https://gcc.gnu.org/pipermail/gcc-patches/2021-May/570139.html
> > > > > > > > > >> > >
> > > > > > > > > >> > > On Tue, May 11, 2021 at 8:29 PM Fangrui Song 
> > > > > > > > > >> > >  wrote:
> > > > > > > > > >> > > >
> > > > > > > > > >> > > > This was introduced in 2014-12 to use local binding 
> > > > > > > > > >> > > > for external symbols
> > > > > > > > > >> > > > for -fPIE. Now that we have H.J. Lu's GOTPCRELX for 
> > > > > > > > > >> > > > years which mostly
> > > > > > > > > >> > > > nullify the benefit of HAVE_LD_PIE_COPYRELOC, 
> > > > > > > > > >> > > > HAVE_LD_PIE_COPYRELOC
> > > > > > > > > >> > > > should retire now.
> > > > > > > > > >> > > >
> > > > > > > > > >> > > > One design goal of -fPIE was to avoid copy 
> > > > > > > > > >> > > > relocations.
> > > > > > > > > >> > > > HAVE_LD_PIE_COPYRELOC has deviated from the goal.  
> > > > > > > > > >> > > > With this change, the
> > > > > > > > > >> > > > -fPIE behavior of x86-64 will be closer to x86-32 
> > > > > > > > > >> > > > and other targets.
> > > > > > > > > >> > > >
> > > > > > > > > >> > > > ---
> > > > > > > > > >> > > >
> > > > > > > > > >> > > > See 
> > > > > > > > > >> > > > https://gcc.gnu.org/legacy-ml/gcc/2019-05/msg00215.html
> > > > > > > > > >> > > >  for a list
> > > > > > > > > >> > > > of fixed and unfixed (e.g. gold incompatibility with 
> > > > > > > > > >> > > > protected
> > > > > > > > > >> > > > https://sourceware.org/bugzilla/show_bug.cgi?id=19823)
> > > > > > > > > >> > > >  issues.
> > > > > > > > > >> > > >
> > > > > > > > > >> > > > If you prefer a longer write-up, see
> > > > > > > > > >> > > > https://maskray.me/blog/2021-01-09-copy-relocations-canonical-plt-entries-and-protected
> > > > > > > > > >> > > > ---
> > > > > > > > > >> > > >  gcc/config.in |  6 
> > > > > > > > > >> > > > ---
> > > > > > > > > >> > > >  gcc/config/i386/i386.c| 11 
> > > > > > > > > >> > > > +---
> > > > > > > > > >> > > >  gcc/configure | 52 
> > > > > > > > > >> > > > ---
> > > > > > > > > >> > > >  gcc/configure.ac  | 48 
> > > > > > > > > >> > > > -
> > > > > > > > > >> > > >  gcc/doc/sourcebuild.texi  |  3 
> > > > > > > > > >> > > > --
> > > > > > > > > >> > > >  .../gcc.target/i386/pie-copyrelocs-1.c| 14 
> > > > > > > > > >> > > > -
> > > > > > > > > >> > > >  .../gcc.target/i386/pie-copyrelocs-2.c| 14 
> > > > > > > > > >> > > > -
> > > > > > > > > >> > > >  .../gcc.target/i386/pie-copyrelocs-3.c| 14 
> > > > > > > > > >> > > > -
> > > > > > > > > >> > > >  .../gcc.target/i386/pie-copyrelocs-4.c| 17 
> > > > > > > > > >> > > > --
> > > > > > > > > >> > > >  gcc/testsuite/lib/target-supports.exp | 47 
> > > > > > > > > >> > > > -
> > > > > > > > > >> > > >  10 files changed, 2 insertions(+), 224 deletions(-)
> > > > > > > > > >> > > >  delete mode 100644 
> > > > > > > > > >> > >

[PATCH] contrib: testsuite-management: Update to be python3 compatible

[Bernhard Reutner-Fischer via Gcc-patches]

From: Bernhard Reutner-Fischer 

contrib/ChangeLog:

* testsuite-management/validate_failures.py: 2to3

---
Tested with python-3.9.7 where it now works again.
---
 .../testsuite-management/validate_failures.py | 38 +--
 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/contrib/testsuite-management/validate_failures.py 
b/contrib/testsuite-management/validate_failures.py
index 2779050468d..e11a6e40634 100755
--- a/contrib/testsuite-management/validate_failures.py
+++ b/contrib/testsuite-management/validate_failures.py
@@ -82,7 +82,7 @@ _MANIFEST_PATH_PATTERN = '%s/%s/%s.xfail'
 _OPTIONS = None
 
 def Error(msg):
-  print >>sys.stderr, 'error: %s' % msg
+  print('error: %s' % msg, file=sys.stderr)
   sys.exit(1)
 
 
@@ -126,7 +126,7 @@ class TestResult(object):
  self.description) = re.match(r'([A-Z]+):\s*(\S+)\s*(.*)',
   summary_line).groups()
   except:
-print 'Failed to parse summary line: "%s"' % summary_line
+print('Failed to parse summary line: "%s"' % summary_line)
 raise
   self.ordinal = ordinal
 except ValueError:
@@ -180,7 +180,7 @@ class TestResult(object):
 
 def GetMakefileValue(makefile_name, value_name):
   if os.path.exists(makefile_name):
-makefile = open(makefile_name)
+makefile = open(makefile_name, encoding='latin-1', mode='r')
 for line in makefile:
   if line.startswith(value_name):
 (_, value) = line.split('=', 1)
@@ -246,8 +246,8 @@ def GetNegativeResult(line):
 def ParseManifestWorker(result_set, manifest_path):
   """Read manifest_path, adding the contents to result_set."""
   if _OPTIONS.verbosity >= 1:
-print 'Parsing manifest file %s.' % manifest_path
-  manifest_file = open(manifest_path)
+print('Parsing manifest file %s.' % manifest_path)
+  manifest_file = open(manifest_path, encoding='latin-1', mode='r')
   for line in manifest_file:
 line = line.strip()
 if line == "":
@@ -278,7 +278,7 @@ def ParseSummary(sum_fname):
   # ordinal is used when sorting the results so that tests within each
   # .exp file are kept sorted.
   ordinal=0
-  sum_file = open(sum_fname)
+  sum_file = open(sum_fname, encoding='latin-1', mode='r')
   for line in sum_file:
 if IsInterestingResult(line):
   result = TestResult(line, ordinal)
@@ -287,7 +287,7 @@ def ParseSummary(sum_fname):
 # Tests that have expired are not added to the set of expected
 # results. If they are still present in the set of actual results,
 # they will cause an error to be reported.
-print 'WARNING: Expected failure "%s" has expired.' % line.strip()
+print('WARNING: Expected failure "%s" has expired.' % line.strip())
 continue
   result_set.add(result)
   sum_file.close()
@@ -324,7 +324,7 @@ def GetResults(sum_files):
   """Collect all the test results from the given .sum files."""
   build_results = set()
   for sum_fname in sum_files:
-print '\t%s' % sum_fname
+print('\t%s' % sum_fname)
 build_results |= ParseSummary(sum_fname)
   return build_results
 
@@ -387,23 +387,23 @@ def GetBuildData():
   return None, None
   srcdir = GetMakefileValue('%s/Makefile' % _OPTIONS.build_dir, 'srcdir =')
   target = GetMakefileValue('%s/Makefile' % _OPTIONS.build_dir, 
'target_alias=')
-  print 'Source directory: %s' % srcdir
-  print 'Build target: %s' % target
+  print('Source directory: %s' % srcdir)
+  print('Build target: %s' % target)
   return srcdir, target
 
 
 def PrintSummary(msg, summary):
-  print '\n\n%s' % msg
+  print('\n\n%s' % msg)
   for result in sorted(summary):
-print result
+print(result)
 
 
 def GetSumFiles(results, build_dir):
   if not results:
-print 'Getting actual results from build directory %s' % build_dir
+print('Getting actual results from build directory %s' % build_dir)
 sum_files = CollectSumFiles(build_dir)
   else:
-print 'Getting actual results from user-provided results'
+print('Getting actual results from user-provided results')
 sum_files = results.split()
   return sum_files
 
@@ -425,7 +425,7 @@ def PerformComparison(expected, actual, 
ignore_missing_failures):
  expected_vs_actual)
 
   if tests_ok:
-print '\nSUCCESS: No unexpected failures.'
+print('\nSUCCESS: No unexpected failures.')
 
   return tests_ok
 
@@ -433,7 +433,7 @@ def PerformComparison(expected, actual, 
ignore_missing_failures):
 def CheckExpectedResults():
   srcdir, target = GetBuildData()
   manifest_path = GetManifestPath(srcdir, target, True)
-  print 'Manifest: %s' % manifest_path
+  print('Manifest: %s' % manifest_path)
   manifest = GetManifest(manifest_path)
   sum_files = GetSumFiles(_OPTIONS.results, _OPTIONS.build_dir)
   actual = GetResults(sum_files)
@@ -448,16 +448,16 @@ def CheckExpectedResults():
 def ProduceManifest():
   (srcdir, target) = GetBuildData()
   manifest_path = GetManifestPath(srcdir, 

Re: [PATCH,FORTRAN 28/29] Free type-bound procedure structs

[Bernhard Reutner-Fischer via Gcc-patches]

On Fri, 29 Oct 2021 22:09:07 +0200
Bernhard Reutner-Fischer  wrote:

> On Fri, 29 Oct 2021 21:36:26 +0200
> Harald Anlauf via Gcc-patches  wrote:
> 
> > Dear Bernhard, all,
> > 
> > Am 29.10.21 um 02:05 schrieb Bernhard Reutner-Fischer via Gcc-patches:
> >   
> > >> diff --git a/gcc/fortran/symbol.c b/gcc/fortran/symbol.c
> > >> index 53c760a6c38..cde34c67482 100644
> > >> --- a/gcc/fortran/symbol.c
> > >> +++ b/gcc/fortran/symbol.c
> >   
> > >> @@ -5052,7 +5052,7 @@ gfc_get_typebound_proc (gfc_typebound_proc *tb0)
> > >>   
> > >> result = XCNEW (gfc_typebound_proc);
> > >> if (tb0)
> > >> -*result = *tb0;
> > >> +memcpy (result, tb0, sizeof (gfc_typebound_proc));;
> > >> result->error = 1;
> > >>   
> > >> latest_undo_chgset->tbps.safe_push (result);
> > > 
> > > 
> > 
> > please forgive me, but frankly speaking, I don't like this change.
> > 
> > It seems to serve no obvious purpose other than obfuscating the code
> > and defeating the compiler's ability to detect type mismatches.  
> 
> mhm okay.
> > 
> > I would not have OKed that part of the patch.  

I reverted this hunk.
thanks,

[PATCH] PR fortran/102715 - [12 Regression] ICE in gfc_simplify_transpose, at fortran/simplify.c:8184

[Harald Anlauf via Gcc-patches]

Dear Fortranners,

the fix for initialization of DT arrays caused an apparent regression for
cases where inconsistent ranks were used in such an initialization.
This caused either an ICE in subsequent uses of these arrays, or showed
up in valgrind as invalid reads, all of which seemed to be related to this
rank mismatch.

The cleanest solution seems to be to strictly reject rank mismatch earlier
than we used to, which helps error recovery.  I had to adjust one testcase
accordingly.

The place I inserted the check does not distinguish between explicit shape
and implied shape.  The Intel compiler does give a slightly different
error message for the implied shape case.  If anyone feels strongly about
this, I'm open to suggestions for better choices of handling this.

Regtested on x86_64-pc-linux-gnu.  OK for mainline / affected branches?

Thanks,
Harald

commit b1b5e5da928accfe02a7289a331cbea815255a16
Author: Harald Anlauf 
Date:   Sun Oct 31 22:20:01 2021 +0100

Fortran: error recovery on rank mismatch of array and its initializer

gcc/fortran/ChangeLog:

PR fortran/102715
* decl.c (add_init_expr_to_sym): Reject rank mismatch between
array and its initializer.

gcc/testsuite/ChangeLog:

PR fortran/102715
* gfortran.dg/pr68019.f90: Adjust error message.
* gfortran.dg/pr102715.f90: New test.

diff --git a/gcc/fortran/decl.c b/gcc/fortran/decl.c
index 2788348d1be..141fdef8c61 100644
--- a/gcc/fortran/decl.c
+++ b/gcc/fortran/decl.c
@@ -2105,6 +2105,14 @@ add_init_expr_to_sym (const char *name, gfc_expr **initp, locus *var_locus)
 	}
 	}

+  if (sym->attr.flavor == FL_PARAMETER && sym->attr.dimension && sym->as
+	  && sym->as->rank && init->rank && init->rank != sym->as->rank)
+	{
+	  gfc_error ("Rank mismatch of array at %L and its initializer "
+		 "(%d/%d)", &sym->declared_at, sym->as->rank, init->rank);
+	  return false;
+	}
+
   /* If sym is implied-shape, set its upper bounds from init.  */
   if (sym->attr.flavor == FL_PARAMETER && sym->attr.dimension
 	  && sym->as->type == AS_IMPLIED_SHAPE)
diff --git a/gcc/testsuite/gfortran.dg/pr102715.f90 b/gcc/testsuite/gfortran.dg/pr102715.f90
new file mode 100644
index 000..7b29a1c05a6
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr102715.f90
@@ -0,0 +1,13 @@
+! { dg-do compile }
+! PR fortran/102715 - ICE in gfc_simplify_transpose
+
+program p
+  type t
+  end type
+  type(t), parameter :: a(4)   = t()
+  type(t), parameter :: b(2,2) = reshape(a, [2]) ! { dg-error "Rank mismatch" }
+  type(t), parameter :: c(2,2) = transpose(b)! { dg-error "must be of rank 2" }
+  type(t), parameter :: s2(*)  = b(2,:)  ! { dg-error "Syntax error" }
+  type(t), parameter :: x(*,*) = reshape(a, [2]) ! { dg-error "Rank mismatch" }
+  type(t), parameter :: s3(*)  = x(2,:)  ! { dg-error "Syntax error" }
+end
diff --git a/gcc/testsuite/gfortran.dg/pr68019.f90 b/gcc/testsuite/gfortran.dg/pr68019.f90
index 2e304c3a260..77fd55bd331 100644
--- a/gcc/testsuite/gfortran.dg/pr68019.f90
+++ b/gcc/testsuite/gfortran.dg/pr68019.f90
@@ -9,5 +9,5 @@ program p
   integer :: n
end type
type(t), parameter :: vec(*) = [(t(i), i = 1, 4)]
-   type(t), parameter :: arr(*) = reshape(vec, [2, 2])   ! { dg-error "ranks 1 and 2 in assignment" }
+   type(t), parameter :: arr(*) = reshape(vec, [2, 2])   ! { dg-error "Rank mismatch" }
 end

[PATCH] Fortran: Diagnose all operands with constraint violations [PR101337]

[Bernhard Reutner-Fischer via Gcc-patches]

From: Bernhard Reutner-Fischer 

PR fortran/101337

gcc/fortran/ChangeLog:

* resolve.c (resolve_operator): Continue resolving on op2 error.

---
The PR rightfully notes that we only diagnose the right operator
and do not check the left operator if the right one was faulty.

c407b-2 is one of the testcases with respective XFAILs.
Since that testcase is rather big (and full of errors) i'm listing an
abbreviated version here, including the output we'd generate with the
attached patch.

Note: I did not address the XFAILs! Sandra, please take over if you like
  the patch!

Bootstrapped and regtested without new regressions (XFAILs are
apparently ignored and not flagged if they are auto-fixed).
As said, Sandra please take over, i'm deleting this locally.

$ cat c407b-2-b.f90;echo EOF; gfortran -c c407b-2-b.f90
subroutine s2 (x, y)
  implicit none
  type(*) :: x, y
  integer :: i

  ! relational operations
  if (x & ! { dg-error "Assumed.type" "pr101337, failure to diagnose both 
operands" { xfail *-*-*} }
  .eq. y) then  ! { dg-error "Assumed.type" }
return
  end if
  if (.not. (x & ! { dg-error "Assumed.type" "pr101337, failure to diagnose 
both operands" { xfail *-*-*} }
 .ne. y)) then  ! { dg-error "Assumed.type" }
return
  end if
  i = (x & ! { dg-error "Assumed.type" "pr101337, failure to diagnose both 
operands" { xfail *-*-*} }
   + y)  ! { dg-error "Assumed.type" }

end subroutine
EOF
c407b-2-b.f90:8:10:

8 |   .eq. y) then  ! { dg-error "Assumed.type" }
  |  1
Error: Assumed-type variable y at (1) may only be used as actual argument
c407b-2-b.f90:7:6:

7 |   if (x & ! { dg-error "Assumed.type" "pr101337, failure to diagnose 
both operands" { xfail *-*-*} }
  |  1
Error: Assumed-type variable x at (1) may only be used as actual argument
c407b-2-b.f90:12:17:

   12 |  .ne. y)) then  ! { dg-error "Assumed.type" }
  | 1
Error: Assumed-type variable y at (1) may only be used as actual argument
c407b-2-b.f90:11:13:

   11 |   if (.not. (x & ! { dg-error "Assumed.type" "pr101337, failure to 
diagnose both operands" { xfail *-*-*} }
  | 1
Error: Assumed-type variable x at (1) may only be used as actual argument
c407b-2-b.f90:16:10:

   16 |+ y)  ! { dg-error "Assumed.type" }
  |  1
Error: Assumed-type variable y at (1) may only be used as actual argument
c407b-2-b.f90:15:7:

   15 |   i = (x & ! { dg-error "Assumed.type" "pr101337, failure to diagnose 
both operands" { xfail *-*-*} }
  |   1
Error: Assumed-type variable x at (1) may only be used as actual argument
---
 gcc/fortran/resolve.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/gcc/fortran/resolve.c b/gcc/fortran/resolve.c
index 1f4abd08720..705d2326a29 100644
--- a/gcc/fortran/resolve.c
+++ b/gcc/fortran/resolve.c
@@ -4064,7 +4064,7 @@ resolve_operator (gfc_expr *e)
 {
 default:
   if (!gfc_resolve_expr (e->value.op.op2))
-   return false;
+   t = false;
 
 /* Fall through.  */
 
@@ -4091,6 +4091,9 @@ resolve_operator (gfc_expr *e)
   op2 = e->value.op.op2;
   if (op1 == NULL && op2 == NULL)
 return false;
+  /* Error out if op2 did not resolve. We already diagnosed op1.  */
+  if (t == false)
+return false;
 
   dual_locus_error = false;
 
-- 
2.33.0

[committed] d: Fix regressing test failures on ix86-solaris2.11

[Iain Buclaw via Gcc-patches]

Hi,

This patch fixes a regression caused by r12-3986.  The _Unwind_Exception
struct had its alignment adjusted to 16-bytes in order to be compatible
with other languages, however malloc() on Solaris X86 is not guaranteed
to allocate memory aligned to 16-bytes as well.

Bootstrapped and regression tested on x86_64-linux-gnu/-m32/-mx32, as
well as x86_64-pc-solaris2.11/-m32.  Committed to mainline.

Regards,
Iain

---
PR d/102837

libphobos/ChangeLog:

* libdruntime/gcc/deh.d (ExceptionHeader.free): Use memset to reset
contents of internal EH storage.
---
 libphobos/libdruntime/gcc/deh.d | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libphobos/libdruntime/gcc/deh.d b/libphobos/libdruntime/gcc/deh.d
index ba57fed38dc..bbc351c7805 100644
--- a/libphobos/libdruntime/gcc/deh.d
+++ b/libphobos/libdruntime/gcc/deh.d
@@ -207,7 +207,7 @@ struct ExceptionHeader
  */
 static void free(ExceptionHeader* eh) @nogc
 {
-*eh = ExceptionHeader.init;
+__builtin_memset(eh, 0, ExceptionHeader.sizeof);
 if (eh != &ehstorage)
 __builtin_free(eh);
 }
-- 
2.30.2

[committed] d: Fix pr96435.d failing on SPARC and HPPA

[Iain Buclaw via Gcc-patches]

Hi,

This patch fixes test failures seen on SPARC and HPPA targets.  The
value used to initialize the integer field in the union didn't account
for BigEndian targets running this code.

Bootstrapped and regression tested on x86_64-linux-gnu/-m32/-mx32, as
well as sparc-sun-solaris2.11.  Committed to mainline.

Regards,
Iain

---
PR d/102959

gcc/testsuite/ChangeLog:

* gdc.dg/torture/pr96435.d: Adjust for BigEndian.
---
 gcc/testsuite/gdc.dg/torture/pr96435.d | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/testsuite/gdc.dg/torture/pr96435.d 
b/gcc/testsuite/gdc.dg/torture/pr96435.d
index c6d8785ec5b..896b25f7cb4 100644
--- a/gcc/testsuite/gdc.dg/torture/pr96435.d
+++ b/gcc/testsuite/gdc.dg/torture/pr96435.d
@@ -6,7 +6,7 @@
 int[2] array = [16, 678];
 union U { int i; bool b; }
 U u;
-u.i = 0xDEADBEEF;
+u.i = 0x81818181;
 assert(array[u.b] == 678);
 return u.b;
 }
-- 
2.30.2

Re: [PATCH] Fortran: Silence -Wmaybe-uninitialized warning

[Bernhard Reutner-Fischer via Gcc-patches]

On Sun, 31 Oct 2021 18:05:36 +0100
Thomas Koenig  wrote:

> Hi Bernhard,
> 
> > gcc/fortran/ChangeLog:
> > 
> > * resolve.c (resolve_fl_procedure): Initialize
> > allocatable_or_pointer.  
> 
> Looking at the code, it is clear that this is a false
> positive, or a false maybe, but the semantics of C/C++
> may well indicate that sym->result could change, although
> it clearly does not.

Agree wholeheartedly
> 
> So, OK.

pushed as r12-4811
> 
> Thanks for the patch!

I have to thank you for the quick review!
cheers,

[PATCH] Fortran: Missing error with IMPLICIT none (external) [PR100972]

[Bernhard Reutner-Fischer via Gcc-patches]

From: Bernhard Reutner-Fischer 

gcc/fortran/ChangeLog:

PR fortran/100972
* decl.c (gfc_match_implicit_none): Fix typo in warning.
* resolve.c (resolve_unknown_f): Reject external procedures
without explicit EXTERNAL attribute whe IMPLICIT none (external)
is in effect.

gcc/testsuite/ChangeLog:

PR fortran/100972
* gfortran.dg/implicit_14.f90: Adjust error.
* gfortran.dg/external_implicit_none_3.f08: New test.

---

As Gerhard Steinmetz noticed, gfc_match_implicit_none() had a notify_std
that mentioned IMPORT instead of IMPLICIT. Fix that typo.

IMPLICIT NONE (external) is supposed to require external procedures to
be explicitly declared with EXTERNAL.
We cannot do this when parsing in e.g.
gfc_match_rvalue->gfc_match_varspec because the procedure might live
way down in a CONTAINS like in bind-c-contiguous-3.f90.
Hence diagnose missing EXTERNAL declaraions when resolving.

Bootstrapped and regtested on x86_64-unknown-linux without regressions.
Ok for trunk?
---
 gcc/fortran/decl.c  |  2 +-
 gcc/fortran/resolve.c   | 13 +
 .../gfortran.dg/external_implicit_none_3.f08| 17 +
 gcc/testsuite/gfortran.dg/implicit_14.f90   |  2 +-
 4 files changed, 32 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gfortran.dg/external_implicit_none_3.f08

diff --git a/gcc/fortran/decl.c b/gcc/fortran/decl.c
index e9e23fe1acb..ab88ab5e9c1 100644
--- a/gcc/fortran/decl.c
+++ b/gcc/fortran/decl.c
@@ -4715,7 +4715,7 @@ gfc_match_implicit_none (void)
   if (c == '(')
 {
   (void) gfc_next_ascii_char ();
-  if (!gfc_notify_std (GFC_STD_F2018, "IMPORT NONE with spec list at %C"))
+  if (!gfc_notify_std (GFC_STD_F2018, "IMPLICIT NONE with spec list at 
%C"))
return MATCH_ERROR;
 
   gfc_gobble_whitespace ();
diff --git a/gcc/fortran/resolve.c b/gcc/fortran/resolve.c
index 21126cba262..1f4abd08720 100644
--- a/gcc/fortran/resolve.c
+++ b/gcc/fortran/resolve.c
@@ -2974,6 +2974,19 @@ resolve_unknown_f (gfc_expr *expr)
   return false;
 }
 
+  /* IMPLICIT NONE (external) procedures require an explicit EXTERNAL attr.  */
+  /* Intrinsics were handled above, only non-intrinsics left here.  */
+  if (sym->attr.flavor == FL_PROCEDURE
+  && sym->attr.implicit_type
+  && sym->ns
+  && sym->ns->has_implicit_none_export)
+{
+ gfc_error ("Missing explicit declaration with EXTERNAL attribute "
+ "for symbol %qs at %L", sym->name, &sym->declared_at);
+ sym->error = 1;
+ return false;
+}
+
   /* The reference is to an external name.  */
 
   sym->attr.proc = PROC_EXTERNAL;
diff --git a/gcc/testsuite/gfortran.dg/external_implicit_none_3.f08 
b/gcc/testsuite/gfortran.dg/external_implicit_none_3.f08
new file mode 100644
index 000..329deedc413
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/external_implicit_none_3.f08
@@ -0,0 +1,17 @@
+! { dg-do compile }
+! { dg-options "-std=f2018" }
+! Tests fix for PR100972 - Fails to warn about missing EXTERNAL attribute
+! Contributed by Gerhard Steinmetz
+
+program p
+   implicit none (external)
+   real, external :: f
+   real :: a
+   real :: b
+   integer :: i
+   character :: c
+   a = f() ! OK
+   b = g() ! { dg-error "Missing explicit declaration with EXTERNAL attribute" 
}
+   i = h() ! { dg-error "Missing explicit declaration with EXTERNAL attribute" 
}
+   c = j() ! { dg-error "Missing explicit declaration with EXTERNAL attribute" 
}
+end
diff --git a/gcc/testsuite/gfortran.dg/implicit_14.f90 
b/gcc/testsuite/gfortran.dg/implicit_14.f90
index 8282c1f1f86..422d913fd4f 100644
--- a/gcc/testsuite/gfortran.dg/implicit_14.f90
+++ b/gcc/testsuite/gfortran.dg/implicit_14.f90
@@ -4,5 +4,5 @@
 ! Support Fortran 2018's IMPLICIT NONE with spec list
 ! (currently implemented as vendor extension)
 
-implicit none (type) ! { dg-error "Fortran 2018: IMPORT NONE with spec list at 
\\(1\\)" }
+implicit none (type) ! { dg-error "Fortran 2018: IMPLICIT NONE with spec list 
at \\(1\\)" }
 end
-- 
2.33.0

Re: [PATCH] Fortran: Silence -Wmaybe-uninitialized warning

[Thomas Koenig via Gcc-patches]

Hi Bernhard,


gcc/fortran/ChangeLog:

* resolve.c (resolve_fl_procedure): Initialize
allocatable_or_pointer.




Looking at the code, it is clear that this is a false
positive, or a false maybe, but the semantics of C/C++
may well indicate that sym->result could change, although
it clearly does not.

So, OK.

Thanks for the patch!

Best regards

Thomas

[PATCH] Fortran: Silence -Wmaybe-uninitialized warning

[Bernhard Reutner-Fischer via Gcc-patches]

From: Bernhard Reutner-Fischer 

gcc/fortran/ChangeLog:

* resolve.c (resolve_fl_procedure): Initialize
allocatable_or_pointer.

---
fortran/resolve.c: In function 'bool resolve_fl_procedure(gfc_symbol*, int)':
fortran/resolve.c:13391:7: warning: 'allocatable_or_pointer' may be used 
uninitialized in this function [-Wmaybe-uninitialized]
13390 |   if (sym->attr.elemental && sym->result
  |   ~~
13391 |   && allocatable_or_pointer)
  |   ^
.../fortran/resolve.c:13197:8: note: 'allocatable_or_pointer' was declared here
13197 |   bool allocatable_or_pointer;
  |^~

Bootstrapped and regtested without regressions.
Ok for trunk?
---
 gcc/fortran/resolve.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/fortran/resolve.c b/gcc/fortran/resolve.c
index 8da396b32ec..21126cba262 100644
--- a/gcc/fortran/resolve.c
+++ b/gcc/fortran/resolve.c
@@ -13179,7 +13179,7 @@ static bool
 resolve_fl_procedure (gfc_symbol *sym, int mp_flag)
 {
   gfc_formal_arglist *arg;
-  bool allocatable_or_pointer;
+  bool allocatable_or_pointer = false;
 
   if (sym->attr.function
   && !resolve_fl_var_and_proc (sym, mp_flag))
-- 
2.33.0

Re: [PATCH v2] c-format: Add -Wformat-int-precision option [PR80060]

[Daniil Stas via Gcc-patches]

On Sun, 10 Oct 2021 23:10:20 +
Daniil Stas  wrote:

> This option is enabled by default when -Wformat option is enabled. A
> user can specify -Wno-format-int-precision to disable emitting
> warnings when passing an argument of an incompatible integer type to
> a 'd', 'i', 'o', 'u', 'x', or 'X' conversion specifier when it has
> the same precision as the expected type.
> 
> Signed-off-by: Daniil Stas 
> 
> gcc/c-family/ChangeLog:
> 
>   * c-format.c (check_format_types): Don't emit warnings when
>   passing an argument of an incompatible integer type to
>   a 'd', 'i', 'o', 'u', 'x', or 'X' conversion specifier when
> it has the same precision as the expected type if
>   -Wno-format-int-precision option is specified.
>   * c.opt: Add -Wformat-int-precision option.
> 
> gcc/ChangeLog:
> 
>   * doc/invoke.texi: Add -Wformat-int-precision option
> description.
> 
> gcc/testsuite/ChangeLog:
> 
>   * c-c++-common/Wformat-int-precision-1.c: New test.
>   * c-c++-common/Wformat-int-precision-2.c: New test.
> ---
> This is an update of patch "c-format: Add -Wformat-same-precision
> option [PR80060]". The changes comparing to the first patch version:
> 
> - changed the option name to -Wformat-int-precision
> - changed the option description as was suggested by Martin
> - changed Wformat-int-precision-2.c to used dg-bogus instead of
> previous invalid syntax
> 
> I also tried to combine the tests into one file with #pragma GCC
> diagnostic, but looks like it's not possible. I want to test that
> when passing just -Wformat option everything works as before my patch
> by default. And then in another test case to check that passing
> -Wno-format-int-precision disables the warning. But looks like in GCC
> you can't toggle the warnings such as -Wno-format-int-precision
> individually but only can disable the general -Wformat option that
> will disable all the formatting warnings together, which is not the
> proper test.

Hi,
Can anyone review this patch?
Thank you

--
Daniil

[committed] wwwdocs: gcc-11: Switch dwarfstd.org to https

[Gerald Pfeifer]

Business as usual...

Gerald

---
 htdocs/gcc-11/changes.html | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/htdocs/gcc-11/changes.html b/htdocs/gcc-11/changes.html
index 6dec8856..c81f0e82 100644
--- a/htdocs/gcc-11/changes.html
+++ b/htdocs/gcc-11/changes.html
@@ -142,7 +142,7 @@ You may also want to check out our
   
 
   For targets that produce DWARF debugging information GCC now
-  defaults to http://dwarfstd.org/doc/DWARF5.pdf";>DWARF
+  defaults to https://dwarfstd.org/doc/DWARF5.pdf";>DWARF
   version 5 (with the exception of VxWorks and Darwin/Mac OS X
   which default to version 2 and AIX which defaults to version 4).
   This can produce up to 25% more compact debug information
-- 
2.33.0

[PATCH] Fortran: Remove double spaces in open() warning [PR99884]

[Bernhard Reutner-Fischer via Gcc-patches]

From: Bernhard Reutner-Fischer 

gcc/fortran/ChangeLog:

PR fortran/99884
* io.c (check_open_constraints): Remove double spaces.
---
 gcc/fortran/io.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/fortran/io.c b/gcc/fortran/io.c
index fc97df79eca..9506f35008e 100644
--- a/gcc/fortran/io.c
+++ b/gcc/fortran/io.c
@@ -2513,7 +2513,7 @@ check_open_constraints (gfc_open *open, locus *where)
  spec = "";
}
 
-  warn_or_error (G_("%s specifier at %L not allowed in OPEN statement for "
+  warn_or_error (G_("%sspecifier at %L not allowed in OPEN statement for "
 "unformatted I/O"), spec, loc);
 }
 
-- 
2.33.0

[committed] wwwdocs: gcc-6: Update link to Intel's pcommit deprecation

[Gerald Pfeifer]

This complements the same change I made to the GCC 5 release notes a bit 
ago.

Gerald

---
 htdocs/gcc-6/changes.html | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/htdocs/gcc-6/changes.html b/htdocs/gcc-6/changes.html
index e95aabbe..6dd86d83 100644
--- a/htdocs/gcc-6/changes.html
+++ b/htdocs/gcc-6/changes.html
@@ -900,7 +900,7 @@ are not listed here).
 IA-32/x86-64
   
 Support for the https://software.intel.com/content/www/us/en/develop/blogs/deprecate-pcommit-instruction.html";>deprecated
+
href="https://www.intel.com/content/www/us/en/developer/articles/technical/deprecate-pcommit-instruction.html";>deprecated
 pcommit instruction has been removed.
   
 
-- 
2.33.0

[PATCH] Add -fopt-builtin optimization option

[Keith Packard via Gcc-patches]

This option (enabled by default) controls optimizations which convert
a sequence of operations into an equivalent sequence that includes
calls to builtin functions. Typical cases here are code which matches
memcpy, calloc, sincos.

The -ftree-loop-distribute-patterns flag only covers converting loops
into builtin calls, not numerous other places where knowledge of
builtin function semantics changes the generated code.

The goal is to allow built-in functions to be declared by the compiler
and used directly by the application, but to disable optimizations
which create new calls to them, and to allow this optimization
behavior to be changed for individual functions by decorating the
function definition like this:

void
attribute((optimize("no-opt-builtin")))
sincos(double x, double *s, double *c)
{
*s = sin(x);
*c = cos(x);
}

This also avoids converting loops into library calls like this:

void *
attribute((optimize("no-opt-builtin")))
memcpy(void *__restrict__ dst, const void *__restrict__ src, size_t n)
{
char *d = dst;
const char *s = src;

while (n--)
*d++ = *s++;
return dst;
}

As well as disabling analysis of memory lifetimes around free as in
this example:

void *
attribute((optimize("no-opt-builtin")))
erase_and_free(void *ptr)
{
memset(ptr, '\0', malloc_usable_size(ptr));
free(ptr);
}

Clang has a more sophisticated version of this mechanism which
can disable all builtins, or disable a specific builtin:

double
attribute((no_builtin("exp2")))
exp2(double x)
{
return pow (2.0, x);
}

Signed-off-by: Keith Packard 
---
 gcc/builtins.c   | 6 ++
 gcc/common.opt   | 4 
 gcc/gimple.c | 3 +++
 gcc/tree-loop-distribution.c | 2 ++
 4 files changed, 15 insertions(+)

diff --git a/gcc/builtins.c b/gcc/builtins.c
index 7d0f61fc98b..7aae57deab5 100644
--- a/gcc/builtins.c
+++ b/gcc/builtins.c
@@ -1922,6 +1922,9 @@ mathfn_built_in_2 (tree type, combined_fn fn)
   built_in_function fcodef64x = END_BUILTINS;
   built_in_function fcodef128x = END_BUILTINS;
 
+  if (flag_no_opt_builtin)
+return END_BUILTINS;
+
   switch (fn)
 {
 #define SEQ_OF_CASE_MATHFN \
@@ -2125,6 +2128,9 @@ mathfn_built_in_type (combined_fn fn)
   case CFN_BUILT_IN_##MATHFN##L_R: \
 return long_double_type_node;
 
+  if (flag_no_opt_builtin)
+return NULL_TREE;
+
   switch (fn)
 {
 SEQ_OF_CASE_MATHFN
diff --git a/gcc/common.opt b/gcc/common.opt
index eeba1a727f2..d6111cc776a 100644
--- a/gcc/common.opt
+++ b/gcc/common.opt
@@ -2142,6 +2142,10 @@ fomit-frame-pointer
 Common Var(flag_omit_frame_pointer) Optimization
 When possible do not generate stack frames.
 
+fopt-builtin
+Common Var(flag_no_opt_builtin, 0) Optimization
+Match code sequences equivalent to builtin functions
+
 fopt-info
 Common Var(flag_opt_info) Optimization
 Enable all optimization info dumps on stderr.
diff --git a/gcc/gimple.c b/gcc/gimple.c
index 22dd6417d19..5b82b9409c0 100644
--- a/gcc/gimple.c
+++ b/gcc/gimple.c
@@ -2790,6 +2790,9 @@ gimple_builtin_call_types_compatible_p (const gimple 
*stmt, tree fndecl)
 {
   gcc_checking_assert (DECL_BUILT_IN_CLASS (fndecl) != NOT_BUILT_IN);
 
+  if (flag_no_opt_builtin)
+return false;
+
   tree ret = gimple_call_lhs (stmt);
   if (ret
   && !useless_type_conversion_p (TREE_TYPE (ret),
diff --git a/gcc/tree-loop-distribution.c b/gcc/tree-loop-distribution.c
index 583c01a42d8..43f22a3c7ce 100644
--- a/gcc/tree-loop-distribution.c
+++ b/gcc/tree-loop-distribution.c
@@ -1859,6 +1859,7 @@ loop_distribution::classify_partition (loop_p loop,
 
   /* Perform general partition disqualification for builtins.  */
   if (volatiles_p
+  || flag_no_opt_builtin
   || !flag_tree_loop_distribute_patterns)
 return has_reduction;
 
@@ -3764,6 +3765,7 @@ loop_distribution::execute (function *fun)
   /* Don't distribute multiple exit edges loop, or cold loop when
  not doing pattern detection.  */
   if (!single_exit (loop)
+ || flag_no_opt_builtin
  || (!flag_tree_loop_distribute_patterns
  && !optimize_loop_for_speed_p (loop)))
continue;
-- 
2.33.0

[PATCH Take #2] x86_64: Expand ashrv1ti (and PR target/102986)

[Roger Sayle]

Very many thanks to Jakub for proof-reading my patch, catching my silly
GNU-style
mistakes and making excellent suggestions.  This revised patch incorporates
all of
his feedback, and has been tested on x86_64-pc-linux-gnu with make bootstrap
and
make -k check with no new failures.

2021-10-31  Roger Sayle  
Jakub Jelinek  

gcc/ChangeLog
PR target/102986
* config/i386/i386-expand.c (ix86_expand_v1ti_to_ti,
ix86_expand_ti_to_v1ti): New helper functions.
(ix86_expand_v1ti_shift): Check if the amount operand is an
integer constant, and expand as a TImode shift if it isn't.
(ix86_expand_v1ti_rotate): Check if the amount operand is an
integer constant, and expand as a TImode rotate if it isn't.
(ix86_expand_v1ti_ashiftrt): New function to expand arithmetic
right shifts of V1TImode quantities.
* config/i386/i386-protos.h (ix86_expand_v1ti_ashift): Prototype.
* config/i386/sse.md (ashlv1ti3, lshrv1ti3): Change constraints
to QImode general_operand, and let the helper functions lower
shifts by non-constant operands, as TImode shifts.  Make
conditional on TARGET_64BIT.
(ashrv1ti3): New expander calling ix86_expand_v1ti_ashiftrt.
(rotlv1ti3, rotrv1ti3): Change shift operand to QImode.
Make conditional on TARGET_64BIT.

gcc/testsuite/ChangeLog
PR target/102986
* gcc.target/i386/sse2-v1ti-ashiftrt-1.c: New test case.
* gcc.target/i386/sse2-v1ti-ashiftrt-2.c: New test case.
* gcc.target/i386/sse2-v1ti-ashiftrt-3.c: New test case.
* gcc.target/i386/sse2-v1ti-shift-2.c: New test case.
* gcc.target/i386/sse2-v1ti-shift-3.c: New test case.

Thanks.
Roger
--

-Original Message-
From: Jakub Jelinek  
Sent: 30 October 2021 11:30
To: Roger Sayle 
Cc: 'GCC Patches' ; 'Uros Bizjak'

Subject: Re: [PATCH] x86_64: Expand ashrv1ti (and PR target/102986)

On Sat, Oct 30, 2021 at 11:16:41AM +0100, Roger Sayle wrote:
> 2021-10-30  Roger Sayle  
> 
> gcc/ChangeLog
>   PR target/102986
>   * config/i386/i386-expand.c (ix86_expand_v1ti_to_ti,
>   ix86_expand_ti_to_v1ti): New helper functions.
>   (ix86_expand_v1ti_shift): Check if the amount operand is an
>   integer constant, and expand as a TImode shift if it isn't.
>   (ix86_expand_v1ti_rotate): Check if the amount operand is an
>   integer constant, and expand as a TImode rotate if it isn't.
>   (ix86_expand_v1ti_ashiftrt): New function to expand arithmetic
>   right shifts of V1TImode quantities.
>   * config/i386/i386-protos.h (ix86_expand_v1ti_ashift): Prototype.
>   * config/i386/sse.md (ashlv1ti3, lshrv1ti3): Change constraints
>   to QImode general_operand, and let the helper functions lower
>   shifts by non-constant operands, as TImode shifts.
>   (ashrv1ti3): New expander calling ix86_expand_v1ti_ashiftrt.
>   (rotlv1ti3, rotrv1ti3): Change shift operand to QImode.
> 
> gcc/testsuite/ChangeLog
>   PR target/102986
>   * gcc.target/i386/sse2-v1ti-ashiftrt-1.c: New test case.
>   * gcc.target/i386/sse2-v1ti-ashiftrt-2.c: New test case.
>   * gcc.target/i386/sse2-v1ti-ashiftrt-3.c: New test case.
>   * gcc.target/i386/sse2-v1ti-shift-2.c: New test case.
>   * gcc.target/i386/sse2-v1ti-shift-3.c: New test case.
> 
> Sorry again for the breakage in my last patch.   I wasn't testing things
> that shouldn't have been affected/changed.

Not a review, will defer that to Uros, but just nits:

> +/* Expand move of V1TI mode register X to a new TI mode register.  */ 
> +static rtx ix86_expand_v1ti_to_ti (rtx x)

ix86_expand_v1ti_to_ti should be at the start of next line, so static rtx
ix86_expand_v1ti_to_ti (rtx x)

Ditto for other functions and also in functions you've added by the previous
patch.
> +  emit_insn (code == ASHIFT ? gen_ashlti3(tmp2, tmp1, operands[2])
> + : gen_lshrti3(tmp2, tmp1, operands[2]));

Space before ( twice.

> +  emit_insn (code == ROTATE ? gen_rotlti3(tmp2, tmp1, operands[2])
> + : gen_rotrti3(tmp2, tmp1, operands[2]));

Likewise.

> +  emit_insn (gen_ashrti3(tmp2, tmp1, operands[2]));

Similarly.

Also, I wonder for all these patterns (previously and now added), shouldn't
they have && TARGET_64BIT in conditions?  I mean, we don't really support
scalar TImode for ia32, but VALID_SSE_REG_MODE includes V1TImode and while
the constant shifts can be done, I think the variable shifts can't, there
are no TImode shift patterns...

Jakub

diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c
index 4c3800e..db967e4 100644
--- a/gcc/config/i386/i386-expand.c
+++ b/gcc/config/i386/i386-expand.c
@@ -6157,12 +6157,52 @@ ix86_split_lshr (rtx *operands, rtx scratch, 
machine_mode mode)
 }
 }
 
+/* Expand move of V1TI mode register X to a new TI mode register.  */
+static rtx
+ix86_expand_v1ti

[PATCH 21/21] [crypto]: add testcases for Zbkx

[siyu]

From: SiYu Wu 

---
 gcc/testsuite/gcc.target/riscv/Zbkx.c | 17 +
 1 file changed, 17 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zbkx.c

diff --git a/gcc/testsuite/gcc.target/riscv/Zbkx.c 
b/gcc/testsuite/gcc.target/riscv/Zbkx.c
new file mode 100644
index 000..9bd0d6f0dea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/Zbkx.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_zbkx -mabi=lp64 -O2" } */
+
+long foo1(long rs1, long rs2)
+{
+return __builtin_riscv_xperm8(rs1, rs2);
+}
+
+long foo2(long rs1, long rs2)
+{
+return __builtin_riscv_xperm4(rs1, rs2);
+}
+
+
+
+/* { dg-final { scan-assembler-times "xperm8" 1 } } */
+/* { dg-final { scan-assembler-times "xperm4" 1 } } */
\ No newline at end of file
-- 
2.25.1

[PATCH 12/21] [crypto]: add machine description for Zksh

[siyu]

From: SiYu Wu 

---
 gcc/common/config/riscv/riscv-common.c |  2 ++
 gcc/config/riscv/crypto.md | 19 +++
 gcc/config/riscv/riscv-opts.h  |  2 ++
 3 files changed, 23 insertions(+)

diff --git a/gcc/common/config/riscv/riscv-common.c 
b/gcc/common/config/riscv/riscv-common.c
index d4d61bd765d..8f4f4472690 100644
--- a/gcc/common/config/riscv/riscv-common.c
+++ b/gcc/common/config/riscv/riscv-common.c
@@ -110,6 +110,7 @@ static const struct riscv_ext_version 
riscv_ext_version_table[] =
   {"zknd",  ISA_SPEC_CLASS_NONE, 1, 0},
   {"zknh",  ISA_SPEC_CLASS_NONE, 1, 0},
   {"zksed", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zksh",  ISA_SPEC_CLASS_NONE, 1, 0},
 
   /* Terminate the list.  */
   {NULL, ISA_SPEC_CLASS_NONE, 0, 0}
@@ -925,6 +926,7 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
   {"zkne",   &gcc_options::x_riscv_zk_subext, MASK_ZKNE},
   {"zknh",   &gcc_options::x_riscv_zk_subext, MASK_ZKNH},
   {"zksed",  &gcc_options::x_riscv_zk_subext, MASK_ZKSED},
+  {"zksh",   &gcc_options::x_riscv_zk_subext, MASK_ZKSH},
 
   {NULL, NULL, 0}
 };
diff --git a/gcc/config/riscv/crypto.md b/gcc/config/riscv/crypto.md
index ac0107f43c2..79ca2ec2696 100644
--- a/gcc/config/riscv/crypto.md
+++ b/gcc/config/riscv/crypto.md
@@ -38,6 +38,8 @@ (define_c_enum "unspec" [
   UNSPEC_SHA_512_SIG1_2
   UNSPEC_SHA_512_SUM0
   UNSPEC_SHA_512_SUM1
+  UNSPEC_SM3_P0
+  UNSPEC_SM3_P1
   UNSPEC_SM4_ED
   UNSPEC_SM4_KS
 ])
@@ -253,6 +255,23 @@ (define_insn "riscv_sha512sum1"
   "sha512sum1\t%0,%1")
 
 
+;; Zksh - SM3
+
+(define_insn "riscv_sm3p0_"
+  [(set (match_operand:X 0 "register_operand" "=r")
+(unspec:X [(match_operand:X 1 "register_operand" "r")]
+  UNSPEC_SM3_P0))]
+  "TARGET_ZKSH"
+  "sm3p0\t%0,%1")
+
+(define_insn "riscv_sm3p1_"
+  [(set (match_operand:X 0 "register_operand" "=r")
+(unspec:X [(match_operand:X 1 "register_operand" "r")]
+  UNSPEC_SM3_P1))]
+  "TARGET_ZKSH"
+  "sm3p1\t%0,%1")
+
+
 ;; Zksed - SM4
 
 (define_insn "riscv_sm4ed_"
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index 6ad89db42f5..dafcf1f591f 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -87,10 +87,12 @@ enum stack_protector_guard {
 #define MASK_ZKND (1 << 6)
 #define MASK_ZKNH (1 << 7)
 #define MASK_ZKSED(1 << 9)
+#define MASK_ZKSH (1 << 10)
 
 #define TARGET_ZKNE   ((riscv_zk_subext & MASK_ZKNE) != 0)
 #define TARGET_ZKND   ((riscv_zk_subext & MASK_ZKND) != 0)
 #define TARGET_ZKNH   ((riscv_zk_subext & MASK_ZKNH) != 0)
 #define TARGET_ZKSED  ((riscv_zk_subext & MASK_ZKSED) != 0)
+#define TARGET_ZKSH   ((riscv_zk_subext & MASK_ZKSH) != 0)
 
 #endif /* ! GCC_RISCV_OPTS_H */
-- 
2.25.1

[PATCH 09/21] [crypto]: add machine description for Zksed

[siyu]

From: SiYu Wu 

---
 gcc/common/config/riscv/riscv-common.c |  2 ++
 gcc/config/riscv/crypto.md | 21 +
 gcc/config/riscv/riscv-opts.h  |  2 ++
 3 files changed, 25 insertions(+)

diff --git a/gcc/common/config/riscv/riscv-common.c 
b/gcc/common/config/riscv/riscv-common.c
index c0432c93dd3..d4d61bd765d 100644
--- a/gcc/common/config/riscv/riscv-common.c
+++ b/gcc/common/config/riscv/riscv-common.c
@@ -109,6 +109,7 @@ static const struct riscv_ext_version 
riscv_ext_version_table[] =
   {"zkne",  ISA_SPEC_CLASS_NONE, 1, 0},
   {"zknd",  ISA_SPEC_CLASS_NONE, 1, 0},
   {"zknh",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zksed", ISA_SPEC_CLASS_NONE, 1, 0},
 
   /* Terminate the list.  */
   {NULL, ISA_SPEC_CLASS_NONE, 0, 0}
@@ -923,6 +924,7 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
   {"zknd",   &gcc_options::x_riscv_zk_subext, MASK_ZKND},
   {"zkne",   &gcc_options::x_riscv_zk_subext, MASK_ZKNE},
   {"zknh",   &gcc_options::x_riscv_zk_subext, MASK_ZKNH},
+  {"zksed",  &gcc_options::x_riscv_zk_subext, MASK_ZKSED},
 
   {NULL, NULL, 0}
 };
diff --git a/gcc/config/riscv/crypto.md b/gcc/config/riscv/crypto.md
index 243a77ef528..ac0107f43c2 100644
--- a/gcc/config/riscv/crypto.md
+++ b/gcc/config/riscv/crypto.md
@@ -38,6 +38,8 @@ (define_c_enum "unspec" [
   UNSPEC_SHA_512_SIG1_2
   UNSPEC_SHA_512_SUM0
   UNSPEC_SHA_512_SUM1
+  UNSPEC_SM4_ED
+  UNSPEC_SM4_KS
 ])
 
 
@@ -250,3 +252,22 @@ (define_insn "riscv_sha512sum1"
   "TARGET_ZKNH && TARGET_64BIT"
   "sha512sum1\t%0,%1")
 
+
+;; Zksed - SM4
+
+(define_insn "riscv_sm4ed_"
+  [(set (match_operand:X 0 "register_operand" "=r")
+(unspec:X [(match_operand:X 1 "register_operand" "r")
+  (match_operand:SI 2 "immediate_operand" "")]
+  UNSPEC_SM4_ED))]
+  "TARGET_ZKSED"
+  "sm4ed\t%0,%1,%2")
+
+(define_insn "riscv_sm4ks_"
+  [(set (match_operand:X 0 "register_operand" "=r")
+(unspec:X [(match_operand:X 1 "register_operand" "r")
+  (match_operand:SI 2 "immediate_operand" "")]
+  UNSPEC_SM4_KS))]
+  "TARGET_ZKSED"
+  "sm4ks\t%0,%1,%2")
+
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index 9d8e560c4ba..6ad89db42f5 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -86,9 +86,11 @@ enum stack_protector_guard {
 #define MASK_ZKNE (1 << 5)
 #define MASK_ZKND (1 << 6)
 #define MASK_ZKNH (1 << 7)
+#define MASK_ZKSED(1 << 9)
 
 #define TARGET_ZKNE   ((riscv_zk_subext & MASK_ZKNE) != 0)
 #define TARGET_ZKND   ((riscv_zk_subext & MASK_ZKND) != 0)
 #define TARGET_ZKNH   ((riscv_zk_subext & MASK_ZKNH) != 0)
+#define TARGET_ZKSED  ((riscv_zk_subext & MASK_ZKSED) != 0)
 
 #endif /* ! GCC_RISCV_OPTS_H */
-- 
2.25.1

[PATCH 13/21] [crypto]: add builtins for Zksh

[siyu]

From: SiYu Wu 

---
 gcc/config/riscv/riscv-builtins-crypto.def | 6 ++
 gcc/config/riscv/riscv-builtins.c  | 2 ++
 2 files changed, 8 insertions(+)

diff --git a/gcc/config/riscv/riscv-builtins-crypto.def 
b/gcc/config/riscv/riscv-builtins-crypto.def
index 47bfff80f2e..abef52057a0 100644
--- a/gcc/config/riscv/riscv-builtins-crypto.def
+++ b/gcc/config/riscv/riscv-builtins-crypto.def
@@ -57,6 +57,12 @@ DIRECT_BUILTIN (sha512sig1, RISCV_DI_FTYPE_DI, 
crypto_zknh64),
 DIRECT_BUILTIN (sha512sum0, RISCV_DI_FTYPE_DI, crypto_zknh64),
 DIRECT_BUILTIN (sha512sum1, RISCV_DI_FTYPE_DI, crypto_zknh64),
 
+// Zksh - SM3
+RISCV_BUILTIN (sm3p0_si, "sm3p0", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, 
crypto_zksh32),
+RISCV_BUILTIN (sm3p0_di, "sm3p0", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI, 
crypto_zksh64),
+RISCV_BUILTIN (sm3p1_si, "sm3p1", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, 
crypto_zksh32),
+RISCV_BUILTIN (sm3p1_di, "sm3p1", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI, 
crypto_zksh64),
+
 // Zksed - SM4
 RISCV_BUILTIN (sm4ed_si, "sm4ed", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI_SI, 
crypto_zksed32),
 RISCV_BUILTIN (sm4ed_di, "sm4ed", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI_SI, 
crypto_zksed64),
diff --git a/gcc/config/riscv/riscv-builtins.c 
b/gcc/config/riscv/riscv-builtins.c
index 1eed8d3fcb3..86701bb8ada 100644
--- a/gcc/config/riscv/riscv-builtins.c
+++ b/gcc/config/riscv/riscv-builtins.c
@@ -96,6 +96,8 @@ AVAIL (crypto_zkne64, TARGET_ZKNE && TARGET_64BIT)
 AVAIL (crypto_zknh32, TARGET_ZKNH && !TARGET_64BIT)
 AVAIL (crypto_zknh64, TARGET_ZKNH && TARGET_64BIT)
 
+AVAIL (crypto_zksh32, TARGET_ZKSH && !TARGET_64BIT)
+AVAIL (crypto_zksh64, TARGET_ZKSH && TARGET_64BIT)
 AVAIL (crypto_zksed32, TARGET_ZKSED && !TARGET_64BIT)
 AVAIL (crypto_zksed64, TARGET_ZKSED && TARGET_64BIT)
 
-- 
2.25.1

[PATCH 14/21] [crypto]: add testcases for Zksh

[siyu]

From: SiYu Wu 

Co-authored-by: Shihua Liao 
---
 gcc/testsuite/gcc.target/riscv/Zksh-sm3.c | 15 +++
 1 file changed, 15 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zksh-sm3.c

diff --git a/gcc/testsuite/gcc.target/riscv/Zksh-sm3.c 
b/gcc/testsuite/gcc.target/riscv/Zksh-sm3.c
new file mode 100644
index 000..88ef5a55816
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/Zksh-sm3.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zksh -mabi=lp64 -O2" } */
+
+long foo1(long rs1)
+{
+return __builtin_riscv_sm3p0(rs1);
+}
+
+long foo2(long rs1)
+{
+return __builtin_riscv_sm3p1(rs1);
+}
+
+/* { dg-final { scan-assembler-times "sm3p0" 1 } } */
+/* { dg-final { scan-assembler-times "sm3p1" 1 } } */
\ No newline at end of file
-- 
2.25.1

[PATCH 18/21] change z* subset assert to allow "zk"

[siyu]

From: SiYu Wu 

---
 gcc/common/config/riscv/riscv-common.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/common/config/riscv/riscv-common.c 
b/gcc/common/config/riscv/riscv-common.c
index 4ed2a1f662a..e801fa149a2 100644
--- a/gcc/common/config/riscv/riscv-common.c
+++ b/gcc/common/config/riscv/riscv-common.c
@@ -227,7 +227,7 @@ multi_letter_subset_rank (const std::string &subset)
   high_order = 1;
   break;
 case 'z':
-  gcc_assert (subset.length () > 2);
+  gcc_assert (subset.length () > 1);
   high_order = 2;
   break;
 case 'x':
-- 
2.25.1

[PATCH 20/21] [crypto]: add builtins for Zbkx

[siyu]

From: SiYu Wu 

---
 gcc/config/riscv/riscv-builtins-crypto.def | 6 ++
 gcc/config/riscv/riscv-builtins.c  | 3 +++
 2 files changed, 9 insertions(+)

diff --git a/gcc/config/riscv/riscv-builtins-crypto.def 
b/gcc/config/riscv/riscv-builtins-crypto.def
index abef52057a0..e8c36789fe5 100644
--- a/gcc/config/riscv/riscv-builtins-crypto.def
+++ b/gcc/config/riscv/riscv-builtins-crypto.def
@@ -68,3 +68,9 @@ RISCV_BUILTIN (sm4ed_si, "sm4ed", RISCV_BUILTIN_DIRECT, 
RISCV_SI_FTYPE_SI_SI, cr
 RISCV_BUILTIN (sm4ed_di, "sm4ed", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI_SI, 
crypto_zksed64),
 RISCV_BUILTIN (sm4ks_si, "sm4ks", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI_SI, 
crypto_zksed32),
 RISCV_BUILTIN (sm4ks_di, "sm4ks", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI_SI, 
crypto_zksed64),
+
+// Zbkx
+RISCV_BUILTIN (xperm4_si, "xperm4", RISCV_BUILTIN_DIRECT, 
RISCV_SI_FTYPE_SI_SI, crypto_zbkx32),
+RISCV_BUILTIN (xperm4_di, "xperm4", RISCV_BUILTIN_DIRECT, 
RISCV_DI_FTYPE_DI_DI, crypto_zbkx64),
+RISCV_BUILTIN (xperm8_si, "xperm8", RISCV_BUILTIN_DIRECT, 
RISCV_SI_FTYPE_SI_SI, crypto_zbkx32),
+RISCV_BUILTIN (xperm8_di, "xperm8", RISCV_BUILTIN_DIRECT, 
RISCV_DI_FTYPE_DI_DI, crypto_zbkx64),
diff --git a/gcc/config/riscv/riscv-builtins.c 
b/gcc/config/riscv/riscv-builtins.c
index 86701bb8ada..3a487abbc80 100644
--- a/gcc/config/riscv/riscv-builtins.c
+++ b/gcc/config/riscv/riscv-builtins.c
@@ -101,6 +101,9 @@ AVAIL (crypto_zksh64, TARGET_ZKSH && TARGET_64BIT)
 AVAIL (crypto_zksed32, TARGET_ZKSED && !TARGET_64BIT)
 AVAIL (crypto_zksed64, TARGET_ZKSED && TARGET_64BIT)
 
+AVAIL (crypto_zbkx32, TARGET_ZBKX && !TARGET_64BIT)
+AVAIL (crypto_zbkx64, TARGET_ZBKX && TARGET_64BIT)
+
 /* Construct a riscv_builtin_description from the given arguments.
 
INSN is the name of the associated instruction pattern, without the
-- 
2.25.1

[PATCH 17/21] [crypto]: add implied defines of Zk, Zkn and Zks

[siyu]

From: SiYu Wu 

---
 gcc/common/config/riscv/riscv-common.c | 16 +++-
 gcc/config/riscv/arch-canonicalize | 16 +++-
 2 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/gcc/common/config/riscv/riscv-common.c 
b/gcc/common/config/riscv/riscv-common.c
index 18c09591c42..4ed2a1f662a 100644
--- a/gcc/common/config/riscv/riscv-common.c
+++ b/gcc/common/config/riscv/riscv-common.c
@@ -50,6 +50,20 @@ static const riscv_implied_info_t riscv_implied_info[] =
   {"d", "f"},
   {"f", "zicsr"},
   {"d", "zicsr"},
+  {"zk", "zkn"},
+  {"zk", "zkr"},
+  {"zk", "zkt"},
+  {"zkn", "zbkb"},
+  {"zkn", "zbkc"},
+  {"zkn", "zbkx"},
+  {"zkn", "zkne"},
+  {"zkn", "zknd"},
+  {"zkn", "zknh"},
+  {"zks", "zbkb"},
+  {"zks", "zbkc"},
+  {"zks", "zbkx"},
+  {"zks", "zksed"},
+  {"zks", "zksh"},
   {NULL, NULL}
 };
 
@@ -503,7 +517,7 @@ riscv_subset_list::lookup (const char *subset, int 
major_version,
 static const char *
 riscv_supported_std_ext (void)
 {
-  return "mafdqlcbjtpvn";
+  return "mafdqlcbjktpvn";
 }
 
 /* Parsing subset version.
diff --git a/gcc/config/riscv/arch-canonicalize 
b/gcc/config/riscv/arch-canonicalize
index e2feb7e85cd..284a0dc0073 100755
--- a/gcc/config/riscv/arch-canonicalize
+++ b/gcc/config/riscv/arch-canonicalize
@@ -28,7 +28,7 @@ import itertools
 from functools import reduce
 
 
-CANONICAL_ORDER = "imafdgqlcbjtpvn"
+CANONICAL_ORDER = "imafdgqlcbjktpvn"
 LONG_EXT_PREFIXES = ['z', 's', 'h', 'x']
 
 #
@@ -38,6 +38,20 @@ IMPLIED_EXT = {
   "d" : ["f"],
   "f" : ["zicsr"],
   "f" : ["zifencei"],
+  "zk" : ["zkn"],
+  "zk" : ["zkr"],
+  "zk" : ["zkt"],
+  "zkn" : ["zbkb"],
+  "zkn" : ["zbkc"],
+  "zkn" : ["zbkx"],
+  "zkn" : ["zkne"],
+  "zkn" : ["zknd"],
+  "zkn" : ["zknh"],
+  "zks" : ["zbkb"],
+  "zks" : ["zbkc"],
+  "zks" : ["zbkx"],
+  "zks" : ["zksed"],
+  "zks" : ["zksh"],
 }
 
 def arch_canonicalize(arch):
-- 
2.25.1

[PATCH 16/21] [crypto]: add option defines for Zbkb, Zbkc and Zbkx

[siyu]

From: SiYu Wu 

---
 gcc/common/config/riscv/riscv-common.c | 6 ++
 gcc/config/riscv/riscv-opts.h  | 6 ++
 2 files changed, 12 insertions(+)

diff --git a/gcc/common/config/riscv/riscv-common.c 
b/gcc/common/config/riscv/riscv-common.c
index b2b85180ffe..18c09591c42 100644
--- a/gcc/common/config/riscv/riscv-common.c
+++ b/gcc/common/config/riscv/riscv-common.c
@@ -106,6 +106,9 @@ static const struct riscv_ext_version 
riscv_ext_version_table[] =
   {"zbc", ISA_SPEC_CLASS_NONE, 1, 0},
   {"zbs", ISA_SPEC_CLASS_NONE, 1, 0},
 
+  {"zbkb",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zbkc",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zbkx",  ISA_SPEC_CLASS_NONE, 1, 0},
   {"zkne",  ISA_SPEC_CLASS_NONE, 1, 0},
   {"zknd",  ISA_SPEC_CLASS_NONE, 1, 0},
   {"zknh",  ISA_SPEC_CLASS_NONE, 1, 0},
@@ -924,6 +927,9 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
   {"zbc",&gcc_options::x_riscv_zb_subext, MASK_ZBC},
   {"zbs",&gcc_options::x_riscv_zb_subext, MASK_ZBS},
 
+  {"zbkb",   &gcc_options::x_riscv_zk_subext, MASK_ZBKB},
+  {"zbkc",   &gcc_options::x_riscv_zk_subext, MASK_ZBKC},
+  {"zbkx",   &gcc_options::x_riscv_zk_subext, MASK_ZBKX},
   {"zknd",   &gcc_options::x_riscv_zk_subext, MASK_ZKND},
   {"zkne",   &gcc_options::x_riscv_zk_subext, MASK_ZKNE},
   {"zknh",   &gcc_options::x_riscv_zk_subext, MASK_ZKNH},
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index df254d1015e..dde426a7348 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -83,6 +83,9 @@ enum stack_protector_guard {
 #define TARGET_ZBC((riscv_zb_subext & MASK_ZBC) != 0)
 #define TARGET_ZBS((riscv_zb_subext & MASK_ZBS) != 0)
 
+#define MASK_ZBKB (1 << 2)
+#define MASK_ZBKC (1 << 3)
+#define MASK_ZBKX (1 << 4)
 #define MASK_ZKNE (1 << 5)
 #define MASK_ZKND (1 << 6)
 #define MASK_ZKNH (1 << 7)
@@ -91,6 +94,9 @@ enum stack_protector_guard {
 #define MASK_ZKSH (1 << 10)
 #define MASK_ZKT  (1 << 11)
 
+#define TARGET_ZBKB   ((riscv_zk_subext & MASK_ZBKB) != 0)
+#define TARGET_ZBKC   ((riscv_zk_subext & MASK_ZBKC) != 0)
+#define TARGET_ZBKX   ((riscv_zk_subext & MASK_ZBKX) != 0)
 #define TARGET_ZKNE   ((riscv_zk_subext & MASK_ZKNE) != 0)
 #define TARGET_ZKND   ((riscv_zk_subext & MASK_ZKND) != 0)
 #define TARGET_ZKNH   ((riscv_zk_subext & MASK_ZKNH) != 0)
-- 
2.25.1

[PATCH 11/21] [crypto]: add testcases for Zksed

[siyu]

From: SiYu Wu 

Co-authored-by: Shihua Liao 
---
 gcc/testsuite/gcc.target/riscv/Zksed-sm4.c | 17 +
 1 file changed, 17 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zksed-sm4.c

diff --git a/gcc/testsuite/gcc.target/riscv/Zksed-sm4.c 
b/gcc/testsuite/gcc.target/riscv/Zksed-sm4.c
new file mode 100644
index 000..f7bb3e8dc0b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/Zksed-sm4.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_zksed -mabi=lp64 -O2" } */
+
+long foo1(long rs1)
+{
+return __builtin_riscv_sm4ed(rs1, 1);
+}
+
+long foo2(long rs1)
+{
+return __builtin_riscv_sm4ks(rs1, 2);
+}
+
+
+
+/* { dg-final { scan-assembler-times "sm4ed" 1 } } */
+/* { dg-final { scan-assembler-times "sm4ks" 1 } } */
\ No newline at end of file
-- 
2.25.1

[PATCH 10/21] [crypto]: add builtins for Zksed

[siyu]

From: SiYu Wu 

---
 gcc/config/riscv/riscv-builtins-crypto.def | 6 ++
 gcc/config/riscv/riscv-builtins.c  | 3 +++
 2 files changed, 9 insertions(+)

diff --git a/gcc/config/riscv/riscv-builtins-crypto.def 
b/gcc/config/riscv/riscv-builtins-crypto.def
index ca008929927..47bfff80f2e 100644
--- a/gcc/config/riscv/riscv-builtins-crypto.def
+++ b/gcc/config/riscv/riscv-builtins-crypto.def
@@ -56,3 +56,9 @@ DIRECT_BUILTIN (sha512sig0, RISCV_DI_FTYPE_DI, crypto_zknh64),
 DIRECT_BUILTIN (sha512sig1, RISCV_DI_FTYPE_DI, crypto_zknh64),
 DIRECT_BUILTIN (sha512sum0, RISCV_DI_FTYPE_DI, crypto_zknh64),
 DIRECT_BUILTIN (sha512sum1, RISCV_DI_FTYPE_DI, crypto_zknh64),
+
+// Zksed - SM4
+RISCV_BUILTIN (sm4ed_si, "sm4ed", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI_SI, 
crypto_zksed32),
+RISCV_BUILTIN (sm4ed_di, "sm4ed", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI_SI, 
crypto_zksed64),
+RISCV_BUILTIN (sm4ks_si, "sm4ks", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI_SI, 
crypto_zksed32),
+RISCV_BUILTIN (sm4ks_di, "sm4ks", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI_SI, 
crypto_zksed64),
diff --git a/gcc/config/riscv/riscv-builtins.c 
b/gcc/config/riscv/riscv-builtins.c
index 597f8ed60cb..1eed8d3fcb3 100644
--- a/gcc/config/riscv/riscv-builtins.c
+++ b/gcc/config/riscv/riscv-builtins.c
@@ -96,6 +96,9 @@ AVAIL (crypto_zkne64, TARGET_ZKNE && TARGET_64BIT)
 AVAIL (crypto_zknh32, TARGET_ZKNH && !TARGET_64BIT)
 AVAIL (crypto_zknh64, TARGET_ZKNH && TARGET_64BIT)
 
+AVAIL (crypto_zksed32, TARGET_ZKSED && !TARGET_64BIT)
+AVAIL (crypto_zksed64, TARGET_ZKSED && TARGET_64BIT)
+
 /* Construct a riscv_builtin_description from the given arguments.
 
INSN is the name of the associated instruction pattern, without the
-- 
2.25.1

[PATCH 19/21] [crypto]: add machine description for Zbkx

[siyu]

From: SiYu Wu 

NOTE: The Zbkx should be implemented in bitmanip's Zbp, but since zbp is not
included in the bitmanip spec v1.0, and crypto's v1.0 release will earlier
than bitmanip's next release, so for now we implementing it here.
---
 gcc/config/riscv/crypto.md | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/gcc/config/riscv/crypto.md b/gcc/config/riscv/crypto.md
index 79ca2ec2696..8753f2f585c 100644
--- a/gcc/config/riscv/crypto.md
+++ b/gcc/config/riscv/crypto.md
@@ -42,6 +42,10 @@ (define_c_enum "unspec" [
   UNSPEC_SM3_P1
   UNSPEC_SM4_ED
   UNSPEC_SM4_KS
+
+  ;; Zbkx unspecs, see below
+  UNSPEC_XPERM8
+  UNSPEC_XPERM4
 ])
 
 
@@ -290,3 +294,26 @@ (define_insn "riscv_sm4ks_"
   "TARGET_ZKSED"
   "sm4ks\t%0,%1,%2")
 
+;; Zbkx
+
+;; The Zbkx should be implemented in bitmanip's Zbp, but since zbp is not
+;; included in the bitmanip spec v1.0, and crypto's v1.0 release will earlier
+;; than bitmanip's next release, so for now we implementing it here.
+;;   2021/10/24
+
+(define_insn "riscv_xperm8_"
+  [(set (match_operand:X 0 "register_operand" "=r")
+(unspec:X [(match_operand:X 1 "register_operand" "r")
+  (match_operand:X 2 "register_operand" "r")]
+  UNSPEC_XPERM8))]
+  "TARGET_ZBKX"
+  "xperm8\t%0,%1,%2")
+
+(define_insn "riscv_xperm4_"
+  [(set (match_operand:X 0 "register_operand" "=r")
+(unspec:X [(match_operand:X 1 "register_operand" "r")
+  (match_operand:X 2 "register_operand" "r")]
+  UNSPEC_XPERM4))]
+  "TARGET_ZBKX"
+  "xperm4\t%0,%1,%2")
+
-- 
2.25.1

[PATCH 03/21] [crypto]: add machine description for Zknd and Zkne

[siyu]

From: SiYu Wu 

---
 gcc/common/config/riscv/riscv-common.c |   6 ++
 gcc/config/riscv/crypto.md | 129 +
 gcc/config/riscv/riscv-opts.h  |   6 ++
 gcc/config/riscv/riscv.md  |   2 +
 gcc/config/riscv/riscv.opt |   3 +
 5 files changed, 146 insertions(+)
 create mode 100644 gcc/config/riscv/crypto.md

diff --git a/gcc/common/config/riscv/riscv-common.c 
b/gcc/common/config/riscv/riscv-common.c
index 37b6ea80086..1e81847ee5c 100644
--- a/gcc/common/config/riscv/riscv-common.c
+++ b/gcc/common/config/riscv/riscv-common.c
@@ -106,6 +106,9 @@ static const struct riscv_ext_version 
riscv_ext_version_table[] =
   {"zbc", ISA_SPEC_CLASS_NONE, 1, 0},
   {"zbs", ISA_SPEC_CLASS_NONE, 1, 0},
 
+  {"zkne",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zknd",  ISA_SPEC_CLASS_NONE, 1, 0},
+
   /* Terminate the list.  */
   {NULL, ISA_SPEC_CLASS_NONE, 0, 0}
 };
@@ -916,6 +919,9 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
   {"zbc",&gcc_options::x_riscv_zb_subext, MASK_ZBC},
   {"zbs",&gcc_options::x_riscv_zb_subext, MASK_ZBS},
 
+  {"zknd",   &gcc_options::x_riscv_zk_subext, MASK_ZKND},
+  {"zkne",   &gcc_options::x_riscv_zk_subext, MASK_ZKNE},
+
   {NULL, NULL, 0}
 };
 
diff --git a/gcc/config/riscv/crypto.md b/gcc/config/riscv/crypto.md
new file mode 100644
index 000..170be7ff56c
--- /dev/null
+++ b/gcc/config/riscv/crypto.md
@@ -0,0 +1,129 @@
+;; Machine description for K extension.
+;; Copyright (C) 2021 Free Software Foundation, Inc.
+;; Contributed by SiYu Wu (s...@isrc.iscas.ac.cn).
+
+;; This file is part of GCC.
+
+;; GCC is free software; you can redistribute it and/or modify
+;; it under the terms of the GNU General Public License as published by
+;; the Free Software Foundation; either version 3, or (at your option)
+;; any later version.
+
+;; GCC is distributed in the hope that it will be useful,
+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+;; GNU General Public License for more details.
+
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING3.  If not see
+;; .
+
+
+(define_c_enum "unspec" [
+  ;; Crypto extension unspecs.
+  UNSPEC_AES_DS
+  UNSPEC_AES_DSM
+  UNSPEC_AES_ES
+  UNSPEC_AES_ESM
+  UNSPEC_AES_IM
+  UNSPEC_AES_KS1
+  UNSPEC_AES_KS2
+])
+
+
+;; Zkne&Zknd - AES (RV32)
+
+(define_insn "riscv_aes32dsi"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+(unspec:SI [(match_operand:SI 1 "register_operand" "r")
+   (match_operand:SI 2 "register_operand" "r")
+   (match_operand:SI 3 "immediate_operand" "")]
+   UNSPEC_AES_DS))]
+  "TARGET_ZKND && !TARGET_64BIT"
+  "aes32dsi\t%0,%1,%2,%3")
+
+(define_insn "riscv_aes32dsmi"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+(unspec:SI [(match_operand:SI 1 "register_operand" "r")
+   (match_operand:SI 2 "register_operand" "r")
+   (match_operand:SI 3 "immediate_operand" "")]
+   UNSPEC_AES_DSM))]
+  "TARGET_ZKND && !TARGET_64BIT"
+  "aes32dsmi\t%0,%1,%2,%3")
+
+(define_insn "riscv_aes32esi"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+(unspec:SI [(match_operand:SI 1 "register_operand" "r")
+   (match_operand:SI 2 "register_operand" "")
+   (match_operand:SI 3 "immediate_operand" "")]
+   UNSPEC_AES_ES))]
+  "TARGET_ZKNE && !TARGET_64BIT"
+  "aes32esi\t%0,%1,%2,%3")
+
+(define_insn "riscv_aes32esmi"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+(unspec:SI [(match_operand:SI 1 "register_operand" "r")
+   (match_operand:SI 2 "register_operand" "r")
+   (match_operand:SI 3 "immediate_operand" "")]
+   UNSPEC_AES_ESM))]
+  "TARGET_ZKNE && !TARGET_64BIT"
+  "aes32esmi\t%0,%1,%2,%3")
+
+
+;; Zkne&Zknd - AES (RV64)
+
+(define_insn "riscv_aes64ds"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+(unspec:DI [(match_operand:DI 1 "register_operand" "r")
+   (match_operand:DI 2 "register_operand" "r")]
+   UNSPEC_AES_DS))]
+  "TARGET_ZKND && TARGET_64BIT"
+  "aes64ds\t%0,%1,%2")
+
+(define_insn "riscv_aes64dsm"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+(unspec:DI [(match_operand:DI 1 "register_operand" "r")
+   (match_operand:DI 2 "register_operand" "r")]
+   UNSPEC_AES_DSM))]
+  "TARGET_ZKND && TARGET_64BIT"
+  "aes64dsm\t%0,%1,%2")
+
+(define_insn "riscv_aes64es"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+(unspec:DI [(match_operand:DI 1 "register_operand" "r")
+   (match_operand:DI 2 "register_operand" "r")]
+   UNSPEC_AES_ES))]
+  "TARGET_ZKNE && TARGET_64BIT"
+  "aes64es\t%0,%1,%2")
+
+(define_insn "riscv_aes

[PATCH 15/21] [crypto]: add option defines for Zkr and Zkt

[siyu]

From: SiYu Wu 

---
 gcc/common/config/riscv/riscv-common.c | 3 +++
 gcc/config/riscv/riscv-opts.h  | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/gcc/common/config/riscv/riscv-common.c 
b/gcc/common/config/riscv/riscv-common.c
index 8f4f4472690..b2b85180ffe 100644
--- a/gcc/common/config/riscv/riscv-common.c
+++ b/gcc/common/config/riscv/riscv-common.c
@@ -109,8 +109,10 @@ static const struct riscv_ext_version 
riscv_ext_version_table[] =
   {"zkne",  ISA_SPEC_CLASS_NONE, 1, 0},
   {"zknd",  ISA_SPEC_CLASS_NONE, 1, 0},
   {"zknh",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zkr",   ISA_SPEC_CLASS_NONE, 1, 0},
   {"zksed", ISA_SPEC_CLASS_NONE, 1, 0},
   {"zksh",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zkt",   ISA_SPEC_CLASS_NONE, 1, 0},
 
   /* Terminate the list.  */
   {NULL, ISA_SPEC_CLASS_NONE, 0, 0}
@@ -927,6 +929,7 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
   {"zknh",   &gcc_options::x_riscv_zk_subext, MASK_ZKNH},
   {"zksed",  &gcc_options::x_riscv_zk_subext, MASK_ZKSED},
   {"zksh",   &gcc_options::x_riscv_zk_subext, MASK_ZKSH},
+  {"zkt",&gcc_options::x_riscv_zk_subext, MASK_ZKT},
 
   {NULL, NULL, 0}
 };
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index dafcf1f591f..df254d1015e 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -86,13 +86,16 @@ enum stack_protector_guard {
 #define MASK_ZKNE (1 << 5)
 #define MASK_ZKND (1 << 6)
 #define MASK_ZKNH (1 << 7)
+#define MASK_ZKR  (1 << 8)
 #define MASK_ZKSED(1 << 9)
 #define MASK_ZKSH (1 << 10)
+#define MASK_ZKT  (1 << 11)
 
 #define TARGET_ZKNE   ((riscv_zk_subext & MASK_ZKNE) != 0)
 #define TARGET_ZKND   ((riscv_zk_subext & MASK_ZKND) != 0)
 #define TARGET_ZKNH   ((riscv_zk_subext & MASK_ZKNH) != 0)
 #define TARGET_ZKSED  ((riscv_zk_subext & MASK_ZKSED) != 0)
 #define TARGET_ZKSH   ((riscv_zk_subext & MASK_ZKSH) != 0)
+#define TARGET_ZKT((riscv_zk_subext & MASK_ZKT) != 0)
 
 #endif /* ! GCC_RISCV_OPTS_H */
-- 
2.25.1

[PATCH 08/21] [crypto]: add testcases for Zknh

[siyu]

From: SiYu Wu 

Co-authored-by: Shihua Liao 
---
 gcc/testsuite/gcc.target/riscv/Zknh-sha256.c  | 27 +
 .../gcc.target/riscv/Zknh-sha512-01.c | 40 +++
 .../gcc.target/riscv/Zknh-sha512-02.c | 28 +
 3 files changed, 95 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zknh-sha256.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zknh-sha512-01.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zknh-sha512-02.c

diff --git a/gcc/testsuite/gcc.target/riscv/Zknh-sha256.c 
b/gcc/testsuite/gcc.target/riscv/Zknh-sha256.c
new file mode 100644
index 000..1c1cb7be5d0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/Zknh-sha256.c
@@ -0,0 +1,27 @@
+/* { dg-do compile { target { riscv64*-*-* } } } */
+/* { dg-options "-march=rv64gc_zknh -mabi=lp64 -O2" } */
+
+long foo1(long rs1)
+{
+return __builtin_riscv_sha256sig0(rs1);
+}
+
+long foo2(long rs1)
+{
+return __builtin_riscv_sha256sig1(rs1);
+}
+
+long foo3(long rs1)
+{
+return __builtin_riscv_sha256sum0(rs1);
+}
+
+long foo4(long rs1)
+{
+return __builtin_riscv_sha256sum1(rs1);
+}
+
+/* { dg-final { scan-assembler-times "sha256sig0" 1 } } */
+/* { dg-final { scan-assembler-times "sha256sig1" 1 } } */
+/* { dg-final { scan-assembler-times "sha256sum0" 1 } } */
+/* { dg-final { scan-assembler-times "sha256sum1" 1 } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/riscv/Zknh-sha512-01.c 
b/gcc/testsuite/gcc.target/riscv/Zknh-sha512-01.c
new file mode 100644
index 000..ef1f6dafe60
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/Zknh-sha512-01.c
@@ -0,0 +1,40 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zknh -mabi=ilp32 -O2" } */
+
+int foo1(int rs1, int rs2)
+{
+return __builtin_riscv_sha512sig0h(rs1, rs2);
+}
+
+int foo2(int rs1, int rs2)
+{
+return __builtin_riscv_sha512sig0l(rs1, rs2);
+}
+
+int foo3(int rs1, int rs2)
+{
+return __builtin_riscv_sha512sig1h(rs1, rs2);
+}
+
+int foo4(int rs1, int rs2)
+{
+return __builtin_riscv_sha512sig1l(rs1, rs2);
+}
+
+int foo5(int rs1, int rs2)
+{
+return __builtin_riscv_sha512sum0r(rs1, rs2);
+}
+
+int foo6(int rs1, int rs2)
+{
+return __builtin_riscv_sha512sum1r(rs1, rs2);
+}
+
+/* { dg-final { scan-assembler-times "sha512sig0h" 1 } } */
+/* { dg-final { scan-assembler-times "sha512sig0l" 1 } } */
+/* { dg-final { scan-assembler-times "sha512sig1h" 1 } } */
+/* { dg-final { scan-assembler-times "sha512sig1l" 1 } } */
+/* { dg-final { scan-assembler-times "sha512sum0r" 1 } } */
+/* { dg-final { scan-assembler-times "sha512sum1r" 1 } } */
+
diff --git a/gcc/testsuite/gcc.target/riscv/Zknh-sha512-02.c 
b/gcc/testsuite/gcc.target/riscv/Zknh-sha512-02.c
new file mode 100644
index 000..f25cbcfb75b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/Zknh-sha512-02.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_zknh -mabi=lp64 -O2" } */
+
+long foo1(long rs1)
+{
+return __builtin_riscv_sha512sig0(rs1);
+}
+
+long foo2(long rs1)
+{
+return __builtin_riscv_sha512sig1(rs1);
+}
+
+
+long foo3(long rs1)
+{
+return __builtin_riscv_sha512sum0(rs1);
+}
+
+long foo4(long rs1)
+{
+return __builtin_riscv_sha512sum1(rs1);
+}
+
+/* { dg-final { scan-assembler-times "sha512sig0" 1 } } */
+/* { dg-final { scan-assembler-times "sha512sig1" 1 } } */
+/* { dg-final { scan-assembler-times "sha512sum0" 1 } } */
+/* { dg-final { scan-assembler-times "sha512sum1" 1 } } */
\ No newline at end of file
-- 
2.25.1

[PATCH 02/21] Fix attribute bugs due to zicsr/zifencei

[siyu]

From: jiawei 

---
 gcc/config/riscv/arch-canonicalize | 2 ++
 gcc/config/riscv/riscv.md  | 2 +-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/gcc/config/riscv/arch-canonicalize 
b/gcc/config/riscv/arch-canonicalize
index c7df3c8a313..e2feb7e85cd 100755
--- a/gcc/config/riscv/arch-canonicalize
+++ b/gcc/config/riscv/arch-canonicalize
@@ -36,6 +36,8 @@ LONG_EXT_PREFIXES = ['z', 's', 'h', 'x']
 #
 IMPLIED_EXT = {
   "d" : ["f"],
+  "f" : ["zicsr"],
+  "f" : ["zifencei"],
 }
 
 def arch_canonicalize(arch):
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 225e5b259c1..1a786f31258 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -1812,7 +1812,7 @@ (define_expand "clear_cache"
 
 (define_insn "fence"
   [(unspec_volatile [(const_int 0)] UNSPECV_FENCE)]
-  ""
+  "TARGET_ZIFENCEI"
   "%|fence%-")
 
 (define_insn "fence_i"
-- 
2.25.1

[PATCH 00/21] RISC-V: add gcc support for Scalar Cryptography v1.0.0-rc5

[siyu]

From: SiYu Wu 

This patch add gcc backend support for RISC-V Scalar Cryptography 
Extension (k-ext), including machine description, builtins defines and 
testcases for each k-ext's subset.

A note about Zbkx: The Zbkx should be implemented in bitmanip's Zbp, but 
since zbp is not included in the bitmanip spec v1.0, and crypto's v1.0 
release will earlier than bitmanip's next release, so for now we 
implementing it here.

SiYu Wu (19):
  [crypto]: add machine description for Zknd and Zkne
  [crypto]: add builtins for Zknd and Zkne
  [crypto]: add testcases for Zknd and Zkne
  [crypto]: add machine description for Zknh
  [crypto]: add builtins for Zknh
  [crypto]: add testcases for Zknh
  [crypto]: add machine description for Zksed
  [crypto]: add builtins for Zksed
  [crypto]: add testcases for Zksed
  [crypto]: add machine description for Zksh
  [crypto]: add builtins for Zksh
  [crypto]: add testcases for Zksh
  [crypto]: add option defines for Zkr and Zkt
  [crypto]: add option defines for Zbkb, Zbkc and Zbkx
  [crypto]: add implied defines of Zk, Zkn and Zks
  change z* subset assert to allow "zk"
  [crypto]: add machine description for Zbkx
  [crypto]: add builtins for Zbkx
  [crypto]: add testcases for Zbkx

jiawei (1):
  Fix attribute bugs due to zicsr/zifencei

linsinan1995 (1):
  Fix riscv_expand_block_move

 gcc/common/config/riscv/riscv-common.c|  39 ++-
 gcc/config/riscv/arch-canonicalize|  18 +-
 gcc/config/riscv/crypto.md| 319 ++
 gcc/config/riscv/riscv-builtins-crypto.def|  76 +
 gcc/config/riscv/riscv-builtins.c |  25 ++
 gcc/config/riscv/riscv-ftypes.def |   6 +
 gcc/config/riscv/riscv-opts.h |  21 ++
 gcc/config/riscv/riscv.c  |   2 +-
 gcc/config/riscv/riscv.md |   4 +-
 gcc/config/riscv/riscv.opt|   3 +
 gcc/testsuite/gcc.target/riscv/Zbkx.c |  17 +
 gcc/testsuite/gcc.target/riscv/Zknd-aes-01.c  |  15 +
 gcc/testsuite/gcc.target/riscv/Zknd-aes-02.c  |  21 ++
 gcc/testsuite/gcc.target/riscv/Zkne-aes-01.c  |  15 +
 gcc/testsuite/gcc.target/riscv/Zkne-aes-02.c  |  27 ++
 gcc/testsuite/gcc.target/riscv/Zknh-sha256.c  |  27 ++
 .../gcc.target/riscv/Zknh-sha512-01.c |  40 +++
 .../gcc.target/riscv/Zknh-sha512-02.c |  28 ++
 gcc/testsuite/gcc.target/riscv/Zksed-sm4.c|  17 +
 gcc/testsuite/gcc.target/riscv/Zksh-sm3.c |  15 +
 20 files changed, 730 insertions(+), 5 deletions(-)
 create mode 100644 gcc/config/riscv/crypto.md
 create mode 100644 gcc/config/riscv/riscv-builtins-crypto.def
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zbkx.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zknd-aes-01.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zknd-aes-02.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zkne-aes-01.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zkne-aes-02.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zknh-sha256.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zknh-sha512-01.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zknh-sha512-02.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zksed-sm4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zksh-sm3.c

-- 
2.25.1

[PATCH 06/21] [crypto]: add machine description for Zknh

[siyu]

From: SiYu Wu 

---
 gcc/common/config/riscv/riscv-common.c |   2 +
 gcc/config/riscv/crypto.md | 123 +
 gcc/config/riscv/riscv-opts.h  |   2 +
 3 files changed, 127 insertions(+)

diff --git a/gcc/common/config/riscv/riscv-common.c 
b/gcc/common/config/riscv/riscv-common.c
index 1e81847ee5c..c0432c93dd3 100644
--- a/gcc/common/config/riscv/riscv-common.c
+++ b/gcc/common/config/riscv/riscv-common.c
@@ -108,6 +108,7 @@ static const struct riscv_ext_version 
riscv_ext_version_table[] =
 
   {"zkne",  ISA_SPEC_CLASS_NONE, 1, 0},
   {"zknd",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zknh",  ISA_SPEC_CLASS_NONE, 1, 0},
 
   /* Terminate the list.  */
   {NULL, ISA_SPEC_CLASS_NONE, 0, 0}
@@ -921,6 +922,7 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
 
   {"zknd",   &gcc_options::x_riscv_zk_subext, MASK_ZKND},
   {"zkne",   &gcc_options::x_riscv_zk_subext, MASK_ZKNE},
+  {"zknh",   &gcc_options::x_riscv_zk_subext, MASK_ZKNH},
 
   {NULL, NULL, 0}
 };
diff --git a/gcc/config/riscv/crypto.md b/gcc/config/riscv/crypto.md
index 170be7ff56c..243a77ef528 100644
--- a/gcc/config/riscv/crypto.md
+++ b/gcc/config/riscv/crypto.md
@@ -28,6 +28,16 @@ (define_c_enum "unspec" [
   UNSPEC_AES_IM
   UNSPEC_AES_KS1
   UNSPEC_AES_KS2
+  UNSPEC_SHA_256_SIG0
+  UNSPEC_SHA_256_SIG1
+  UNSPEC_SHA_256_SUM0
+  UNSPEC_SHA_256_SUM1
+  UNSPEC_SHA_512_SIG0
+  UNSPEC_SHA_512_SIG0_2
+  UNSPEC_SHA_512_SIG1
+  UNSPEC_SHA_512_SIG1_2
+  UNSPEC_SHA_512_SUM0
+  UNSPEC_SHA_512_SUM1
 ])
 
 
@@ -127,3 +137,116 @@ (define_insn "riscv_aes64ks2"
   "TARGET_ZKNE && TARGET_64BIT"
   "aes64ks2\t%0,%1,%2")
 
+
+;; Zknh - SHA256
+
+(define_insn "riscv_sha256sig0_"
+  [(set (match_operand:X 0 "register_operand" "=r")
+(unspec:X [(match_operand:X 1 "register_operand" "r")]
+  UNSPEC_SHA_256_SIG0))]
+  "TARGET_ZKNH"
+  "sha256sig0\t%0,%1")
+
+(define_insn "riscv_sha256sig1_"
+  [(set (match_operand:X 0 "register_operand" "=r")
+(unspec:X [(match_operand:X 1 "register_operand" "r")]
+  UNSPEC_SHA_256_SIG1))]
+  "TARGET_ZKNH"
+  "sha256sig1\t%0,%1")
+
+(define_insn "riscv_sha256sum0_"
+  [(set (match_operand:X 0 "register_operand" "=r")
+(unspec:X [(match_operand:X 1 "register_operand" "r")]
+  UNSPEC_SHA_256_SUM0))]
+  "TARGET_ZKNH"
+  "sha256sum0\t%0,%1")
+
+(define_insn "riscv_sha256sum1_"
+  [(set (match_operand:X 0 "register_operand" "=r")
+(unspec:X [(match_operand:X 1 "register_operand" "r")]
+  UNSPEC_SHA_256_SUM1))]
+  "TARGET_ZKNH"
+  "sha256sum1\t%0,%1")
+
+
+;; Zknh - SHA512 (RV32)
+
+(define_insn "riscv_sha512sig0h"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+(unspec:SI [(match_operand:SI 1 "register_operand" "r")
+   (match_operand:SI 2 "register_operand" "r")]
+   UNSPEC_SHA_512_SIG0))]
+  "TARGET_ZKNH && !TARGET_64BIT"
+  "sha512sig0h\t%0,%1,%2")
+
+(define_insn "riscv_sha512sig0l"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+(unspec:SI [(match_operand:SI 1 "register_operand" "r")
+   (match_operand:SI 2 "register_operand" "r")]
+   UNSPEC_SHA_512_SIG0_2))]
+  "TARGET_ZKNH && !TARGET_64BIT"
+  "sha512sig0l\t%0,%1,%2")
+
+(define_insn "riscv_sha512sig1h"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+(unspec:SI [(match_operand:SI 1 "register_operand" "r")
+   (match_operand:SI 2 "register_operand" "r")]
+   UNSPEC_SHA_512_SIG1))]
+  "TARGET_ZKNH && !TARGET_64BIT"
+  "sha512sig1h\t%0,%1,%2")
+
+(define_insn "riscv_sha512sig1l"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+(unspec:SI [(match_operand:SI 1 "register_operand" "r")
+   (match_operand:SI 2 "register_operand" "r")]
+   UNSPEC_SHA_512_SIG1_2))]
+  "TARGET_ZKNH && !TARGET_64BIT"
+  "sha512sig1l\t%0,%1,%2")
+
+(define_insn "riscv_sha512sum0r"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+(unspec:SI [(match_operand:SI 1 "register_operand" "r")
+   (match_operand:SI 2 "register_operand" "r")]
+   UNSPEC_SHA_512_SUM0))]
+  "TARGET_ZKNH && !TARGET_64BIT"
+  "sha512sum0r\t%0,%1,%2")
+
+(define_insn "riscv_sha512sum1r"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+(unspec:SI [(match_operand:SI 1 "register_operand" "r")
+   (match_operand:SI 2 "register_operand" "r")]
+   UNSPEC_SHA_512_SUM1))]
+  "TARGET_ZKNH && !TARGET_64BIT"
+  "sha512sum1r\t%0,%1,%2")
+
+
+;; Zknh - SHA512 (RV64)
+
+(define_insn "riscv_sha512sig0"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+(unspec:DI [(match_operand:DI 1 "register_operand" "r")]
+   UNSPEC_SHA_512_SIG0))]
+  "TARGET_ZKNH && TARGET_64BIT"
+  "sha512sig0\t%0,%1")
+
+(define_insn "riscv_sha512sig1"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+(unspec:DI [(match_operand:DI 1 

[PATCH 04/21] [crypto]: add builtins for Zknd and Zkne

[siyu]

From: SiYu Wu 

---
 gcc/config/riscv/riscv-builtins-crypto.def | 34 ++
 gcc/config/riscv/riscv-builtins.c  | 15 ++
 gcc/config/riscv/riscv-ftypes.def  |  3 ++
 3 files changed, 52 insertions(+)
 create mode 100644 gcc/config/riscv/riscv-builtins-crypto.def

diff --git a/gcc/config/riscv/riscv-builtins-crypto.def 
b/gcc/config/riscv/riscv-builtins-crypto.def
new file mode 100644
index 000..13a2efe2e2b
--- /dev/null
+++ b/gcc/config/riscv/riscv-builtins-crypto.def
@@ -0,0 +1,34 @@
+/* Builtin definitions for K extension
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   Contributed by SiYu Wu (s...@isrc.iscas.ac.cn).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.  */
+
+// Zkne&Zknd - AES (RV32)
+DIRECT_BUILTIN (aes32dsi, RISCV_SI_FTYPE_SI_SI_SI, crypto_zknd32),
+DIRECT_BUILTIN (aes32dsmi, RISCV_SI_FTYPE_SI_SI_SI, crypto_zknd32),
+DIRECT_BUILTIN (aes32esi, RISCV_SI_FTYPE_SI_SI_SI, crypto_zkne32),
+DIRECT_BUILTIN (aes32esmi, RISCV_SI_FTYPE_SI_SI_SI, crypto_zkne32),
+
+// Zkne&Zknd - AES (RV64)
+DIRECT_BUILTIN (aes64ds, RISCV_DI_FTYPE_DI_DI, crypto_zknd64),
+DIRECT_BUILTIN (aes64dsm, RISCV_DI_FTYPE_DI_DI, crypto_zknd64),
+DIRECT_BUILTIN (aes64es, RISCV_DI_FTYPE_DI_DI, crypto_zkne64),
+DIRECT_BUILTIN (aes64esm, RISCV_DI_FTYPE_DI_DI, crypto_zkne64),
+DIRECT_BUILTIN (aes64im, RISCV_DI_FTYPE_DI, crypto_zknd64),
+DIRECT_BUILTIN (aes64ks1i, RISCV_DI_FTYPE_DI_SI, crypto_zkne64),
+DIRECT_BUILTIN (aes64ks2, RISCV_DI_FTYPE_DI_DI, crypto_zkne64),
diff --git a/gcc/config/riscv/riscv-builtins.c 
b/gcc/config/riscv/riscv-builtins.c
index 97b1480a15e..937a80ac483 100644
--- a/gcc/config/riscv/riscv-builtins.c
+++ b/gcc/config/riscv/riscv-builtins.c
@@ -40,6 +40,8 @@ along with GCC; see the file COPYING3.  If not see
 /* Macros to create an enumeration identifier for a function prototype.  */
 #define RISCV_FTYPE_NAME0(A) RISCV_##A##_FTYPE
 #define RISCV_FTYPE_NAME1(A, B) RISCV_##A##_FTYPE_##B
+#define RISCV_FTYPE_NAME2(A, B, C) RISCV_##A##_FTYPE_##B##_##C
+#define RISCV_FTYPE_NAME3(A, B, C, D) RISCV_##A##_FTYPE_##B##_##C##_##D
 
 /* Classifies the prototype of a built-in function.  */
 enum riscv_function_type {
@@ -87,6 +89,11 @@ struct riscv_builtin_description {
 
 AVAIL (hard_float, TARGET_HARD_FLOAT)
 
+AVAIL (crypto_zknd32, TARGET_ZKND && !TARGET_64BIT)
+AVAIL (crypto_zknd64, TARGET_ZKND && TARGET_64BIT)
+AVAIL (crypto_zkne32, TARGET_ZKNE && !TARGET_64BIT)
+AVAIL (crypto_zkne64, TARGET_ZKNE && TARGET_64BIT)
+
 /* Construct a riscv_builtin_description from the given arguments.
 
INSN is the name of the associated instruction pattern, without the
@@ -119,6 +126,8 @@ AVAIL (hard_float, TARGET_HARD_FLOAT)
 /* Argument types.  */
 #define RISCV_ATYPE_VOID void_type_node
 #define RISCV_ATYPE_USI unsigned_intSI_type_node
+#define RISCV_ATYPE_SI intSI_type_node
+#define RISCV_ATYPE_DI intDI_type_node
 
 /* RISCV_FTYPE_ATYPESN takes N RISCV_FTYPES-like type codes and lists
their associated RISCV_ATYPEs.  */
@@ -126,8 +135,14 @@ AVAIL (hard_float, TARGET_HARD_FLOAT)
   RISCV_ATYPE_##A
 #define RISCV_FTYPE_ATYPES1(A, B) \
   RISCV_ATYPE_##A, RISCV_ATYPE_##B
+#define RISCV_FTYPE_ATYPES2(A, B, C) \
+  RISCV_ATYPE_##A, RISCV_ATYPE_##B, RISCV_ATYPE_##C
+#define RISCV_FTYPE_ATYPES3(A, B, C, D) \
+  RISCV_ATYPE_##A, RISCV_ATYPE_##B, RISCV_ATYPE_##C, RISCV_ATYPE_##D
 
 static const struct riscv_builtin_description riscv_builtins[] = {
+  #include "riscv-builtins-crypto.def"
+
   DIRECT_BUILTIN (frflags, RISCV_USI_FTYPE, hard_float),
   DIRECT_NO_TARGET_BUILTIN (fsflags, RISCV_VOID_FTYPE_USI, hard_float)
 };
diff --git a/gcc/config/riscv/riscv-ftypes.def 
b/gcc/config/riscv/riscv-ftypes.def
index b19b731bdf2..e5bc5ac28c9 100644
--- a/gcc/config/riscv/riscv-ftypes.def
+++ b/gcc/config/riscv/riscv-ftypes.def
@@ -28,3 +28,6 @@ along with GCC; see the file COPYING3.  If not see
 
 DEF_RISCV_FTYPE (0, (USI))
 DEF_RISCV_FTYPE (1, (VOID, USI))
+DEF_RISCV_FTYPE (2, (DI, DI, DI))
+DEF_RISCV_FTYPE (2, (DI, DI, SI))
+DEF_RISCV_FTYPE (3, (SI, SI, SI, SI))
-- 
2.25.1

[PATCH 07/21] [crypto]: add builtins for Zknh

[siyu]

From: SiYu Wu 

---
 gcc/config/riscv/riscv-builtins-crypto.def | 24 ++
 gcc/config/riscv/riscv-builtins.c  |  2 ++
 gcc/config/riscv/riscv-ftypes.def  |  3 +++
 3 files changed, 29 insertions(+)

diff --git a/gcc/config/riscv/riscv-builtins-crypto.def 
b/gcc/config/riscv/riscv-builtins-crypto.def
index 13a2efe2e2b..ca008929927 100644
--- a/gcc/config/riscv/riscv-builtins-crypto.def
+++ b/gcc/config/riscv/riscv-builtins-crypto.def
@@ -32,3 +32,27 @@ DIRECT_BUILTIN (aes64esm, RISCV_DI_FTYPE_DI_DI, 
crypto_zkne64),
 DIRECT_BUILTIN (aes64im, RISCV_DI_FTYPE_DI, crypto_zknd64),
 DIRECT_BUILTIN (aes64ks1i, RISCV_DI_FTYPE_DI_SI, crypto_zkne64),
 DIRECT_BUILTIN (aes64ks2, RISCV_DI_FTYPE_DI_DI, crypto_zkne64),
+
+// Zknh - SHA256
+RISCV_BUILTIN (sha256sig0_si, "sha256sig0", RISCV_BUILTIN_DIRECT, 
RISCV_SI_FTYPE_SI, crypto_zknh32),
+RISCV_BUILTIN (sha256sig0_di, "sha256sig0", RISCV_BUILTIN_DIRECT, 
RISCV_DI_FTYPE_DI, crypto_zknh64),
+RISCV_BUILTIN (sha256sig1_si, "sha256sig1", RISCV_BUILTIN_DIRECT, 
RISCV_SI_FTYPE_SI, crypto_zknh32),
+RISCV_BUILTIN (sha256sig1_di, "sha256sig1", RISCV_BUILTIN_DIRECT, 
RISCV_DI_FTYPE_DI, crypto_zknh64),
+RISCV_BUILTIN (sha256sum0_si, "sha256sum0", RISCV_BUILTIN_DIRECT, 
RISCV_SI_FTYPE_SI, crypto_zknh32),
+RISCV_BUILTIN (sha256sum0_di, "sha256sum0", RISCV_BUILTIN_DIRECT, 
RISCV_DI_FTYPE_DI, crypto_zknh64),
+RISCV_BUILTIN (sha256sum1_si, "sha256sum1", RISCV_BUILTIN_DIRECT, 
RISCV_SI_FTYPE_SI, crypto_zknh32),
+RISCV_BUILTIN (sha256sum1_di, "sha256sum1", RISCV_BUILTIN_DIRECT, 
RISCV_DI_FTYPE_DI, crypto_zknh64),
+
+// Zknh - SHA512 (RV32)
+DIRECT_BUILTIN (sha512sig0h, RISCV_SI_FTYPE_SI_SI, crypto_zknh32),
+DIRECT_BUILTIN (sha512sig0l, RISCV_SI_FTYPE_SI_SI, crypto_zknh32),
+DIRECT_BUILTIN (sha512sig1h, RISCV_SI_FTYPE_SI_SI, crypto_zknh32),
+DIRECT_BUILTIN (sha512sig1l, RISCV_SI_FTYPE_SI_SI, crypto_zknh32),
+DIRECT_BUILTIN (sha512sum0r, RISCV_SI_FTYPE_SI_SI, crypto_zknh32),
+DIRECT_BUILTIN (sha512sum1r, RISCV_SI_FTYPE_SI_SI, crypto_zknh32),
+
+// Zknh - SHA512 (RV64)
+DIRECT_BUILTIN (sha512sig0, RISCV_DI_FTYPE_DI, crypto_zknh64),
+DIRECT_BUILTIN (sha512sig1, RISCV_DI_FTYPE_DI, crypto_zknh64),
+DIRECT_BUILTIN (sha512sum0, RISCV_DI_FTYPE_DI, crypto_zknh64),
+DIRECT_BUILTIN (sha512sum1, RISCV_DI_FTYPE_DI, crypto_zknh64),
diff --git a/gcc/config/riscv/riscv-builtins.c 
b/gcc/config/riscv/riscv-builtins.c
index 937a80ac483..597f8ed60cb 100644
--- a/gcc/config/riscv/riscv-builtins.c
+++ b/gcc/config/riscv/riscv-builtins.c
@@ -93,6 +93,8 @@ AVAIL (crypto_zknd32, TARGET_ZKND && !TARGET_64BIT)
 AVAIL (crypto_zknd64, TARGET_ZKND && TARGET_64BIT)
 AVAIL (crypto_zkne32, TARGET_ZKNE && !TARGET_64BIT)
 AVAIL (crypto_zkne64, TARGET_ZKNE && TARGET_64BIT)
+AVAIL (crypto_zknh32, TARGET_ZKNH && !TARGET_64BIT)
+AVAIL (crypto_zknh64, TARGET_ZKNH && TARGET_64BIT)
 
 /* Construct a riscv_builtin_description from the given arguments.
 
diff --git a/gcc/config/riscv/riscv-ftypes.def 
b/gcc/config/riscv/riscv-ftypes.def
index e5bc5ac28c9..87b814135d5 100644
--- a/gcc/config/riscv/riscv-ftypes.def
+++ b/gcc/config/riscv/riscv-ftypes.def
@@ -28,6 +28,9 @@ along with GCC; see the file COPYING3.  If not see
 
 DEF_RISCV_FTYPE (0, (USI))
 DEF_RISCV_FTYPE (1, (VOID, USI))
+DEF_RISCV_FTYPE (1, (SI, SI))
+DEF_RISCV_FTYPE (1, (DI, DI))
+DEF_RISCV_FTYPE (2, (SI, SI, SI))
 DEF_RISCV_FTYPE (2, (DI, DI, DI))
 DEF_RISCV_FTYPE (2, (DI, DI, SI))
 DEF_RISCV_FTYPE (3, (SI, SI, SI, SI))
-- 
2.25.1

[PATCH 01/21] Fix riscv_expand_block_move

[siyu]

From: linsinan1995 <47880367+linsinan1...@users.noreply.github.com>

---
 gcc/config/riscv/riscv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index 6aef3d3a6cf..0529b6d60cd 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -3491,7 +3491,7 @@ riscv_block_move_loop (rtx dest, rtx src, unsigned 
HOST_WIDE_INT length,
 bool
 riscv_expand_block_move (rtx dest, rtx src, rtx length)
 {
-  if (CONST_INT_P (length))
+  if (CONST_INT_P (length) && INTVAL (length) >= 0)
 {
   unsigned HOST_WIDE_INT hwi_length = UINTVAL (length);
   unsigned HOST_WIDE_INT factor, align;
-- 
2.25.1

[PATCH 05/21] [crypto]: add testcases for Zknd and Zkne

[siyu]

From: SiYu Wu 

Co-authored-by: Shihua Liao 
---
 gcc/testsuite/gcc.target/riscv/Zknd-aes-01.c | 15 +++
 gcc/testsuite/gcc.target/riscv/Zknd-aes-02.c | 21 +++
 gcc/testsuite/gcc.target/riscv/Zkne-aes-01.c | 15 +++
 gcc/testsuite/gcc.target/riscv/Zkne-aes-02.c | 27 
 4 files changed, 78 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zknd-aes-01.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zknd-aes-02.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zkne-aes-01.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/Zkne-aes-02.c

diff --git a/gcc/testsuite/gcc.target/riscv/Zknd-aes-01.c 
b/gcc/testsuite/gcc.target/riscv/Zknd-aes-01.c
new file mode 100644
index 000..87d0b490476
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/Zknd-aes-01.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zknd -mabi=ilp32 -O2" } */
+
+int foo1(int rs1, int rs2)
+{
+return __builtin_riscv_aes32dsi(rs1, rs2, 1);
+}
+
+int foo2(int rs1, int rs2)
+{
+return __builtin_riscv_aes32dsmi(rs1, rs2, 0);
+}
+
+/* { dg-final { scan-assembler-times "aes32dsi" 1 } } */
+/* { dg-final { scan-assembler-times "aes32dsmi" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/Zknd-aes-02.c 
b/gcc/testsuite/gcc.target/riscv/Zknd-aes-02.c
new file mode 100644
index 000..3abe8342f9f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/Zknd-aes-02.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zknd -mabi=lp64 -O2" } */
+
+long foo1(long rs1, long rs2)
+{
+return __builtin_riscv_aes64ds(rs1, rs2);
+}
+
+long foo2(long rs1, long rs2)
+{
+return __builtin_riscv_aes64dsm(rs1, rs2);
+}
+
+long foo3(long rs1)
+{
+return __builtin_riscv_aes64im(rs1);
+}
+
+/* { dg-final { scan-assembler-times "aes64ds" 2 } } */
+/* { dg-final { scan-assembler-times "aes64dsm" 1 } } */
+/* { dg-final { scan-assembler-times "aes64im" 1 } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/riscv/Zkne-aes-01.c 
b/gcc/testsuite/gcc.target/riscv/Zkne-aes-01.c
new file mode 100644
index 000..06848166f07
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/Zkne-aes-01.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zkne -mabi=ilp32 -O2" } */
+
+int foo1(int rs1, int rs2)
+{
+return __builtin_riscv_aes32esi(rs1, rs2, 1);
+}
+
+int foo2(int rs1, int rs2)
+{
+return __builtin_riscv_aes32esmi(rs1, rs2, 1);
+}
+
+/* { dg-final { scan-assembler-times "aes32esi" 1 } } */
+/* { dg-final { scan-assembler-times "aes32esmi" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/Zkne-aes-02.c 
b/gcc/testsuite/gcc.target/riscv/Zkne-aes-02.c
new file mode 100644
index 000..8c8bf43b680
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/Zkne-aes-02.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zkne -mabi=lp64 -O2" } */
+
+long foo1(long rs1, long rs2)
+{
+return __builtin_riscv_aes64es(rs1, rs2);
+}
+
+long foo2(long rs1, long rs2)
+{
+return __builtin_riscv_aes64esm(rs1, rs2);
+}
+
+long foo3(long rs1)
+{
+return __builtin_riscv_aes64ks1i(rs1, 1);
+}
+
+long foo4(long rs1, long rs2)
+{
+return __builtin_riscv_aes64ks2(rs1, rs2);
+}
+
+/* { dg-final { scan-assembler-times "aes64es" 2 } } */
+/* { dg-final { scan-assembler-times "aes64esm" 1 } } */
+/* { dg-final { scan-assembler-times "aes64ks1i" 1 } } */
+/* { dg-final { scan-assembler-times "aes64ks2" 1 } } */
\ No newline at end of file
-- 
2.25.1

[PATCH v4] Fix ICE when mixing VLAs and statement expressions [PR91038]

[Uecker, Martin]

Hi Jason,

here is the fourth version of the patch.

I followed your suggestion and now make this
transformation sooner in pointer_int_sum.
I also added a check to only do this
transformation when the pointer is not a
VAR_DECL, which avoids it in the most
common cases where it is not necessary.

Looking for BIND_EXPR seems complicated
and I could not convince myself that it is
worth it.  I also see the risk that this
makes potential failure cases even more
subtle. What do you think?

Bootstrapped and regression tested
on x86-64 for all languages.



Martin




Fix ICE when mixing VLAs and statement expressions [PR91038]

When returning VM-types from statement expressions, this can
lead to an ICE when declarations from the statement expression
are referred to later. Most of these issues can be addressed by
gimplifying the base expression earlier in gimplify_compound_lval.
Another issue is fixed by wrapping the pointer expression in
pointer_int_sum. This fixes PR91038 and some of the test cases
from PR29970 (structs with VLA members need further work).


2021-10-30  Martin Uecker  

gcc/
PR c/91038
PR c/29970
* c-family/c-common.c (pointer_int_sum): Make sure
pointer expressions are evaluated first when the size
expression depends on for variably-modified types.
* gimplify.c (gimplify_var_or_parm_decl): Update comment.
(gimplify_compound_lval): Gimplify base expression first.
(gimplify_target_expr): Add comment.

gcc/testsuite/
PR c/91038
PR c/29970
* gcc.dg/vla-stexp-3.c: New test.
* gcc.dg/vla-stexp-4.c: New test.
* gcc.dg/vla-stexp-5.c: New test.
* gcc.dg/vla-stexp-6.c: New test.
* gcc.dg/vla-stexp-7.c: New test.
* gcc.dg/vla-stexp-8.c: New test.
* gcc.dg/vla-stexp-9.c: New test.
diff --git a/gcc/c-family/c-common.c b/gcc/c-family/c-common.c
index 32c7e3e8972..a10b374dbed 100644
--- a/gcc/c-family/c-common.c
+++ b/gcc/c-family/c-common.c
@@ -3301,7 +3301,20 @@ pointer_int_sum (location_t loc, enum tree_code 
resultcode,
 TREE_TYPE (result_type)))
 size_exp = integer_one_node;
   else
-size_exp = size_in_bytes_loc (loc, TREE_TYPE (result_type));
+{
+  size_exp = size_in_bytes_loc (loc, TREE_TYPE (result_type));
+  /* Wrap the pointer expression in a SAVE_EXPR to make sure it
+   * is evaluated first when the size expression may depend
+   * on it for VM types.
+   */
+  if (TREE_SIDE_EFFECTS (size_exp)
+ && variably_modified_type_p (TREE_TYPE (ptrop), NULL)
+ && (VAR_DECL != TREE_CODE (ptrop)))
+   {
+ ptrop = build1_loc (loc, SAVE_EXPR, TREE_TYPE (ptrop), ptrop);
+ size_exp = build2 (COMPOUND_EXPR, TREE_TYPE (intop), ptrop, size_exp);
+   }
+}
 
   /* We are manipulating pointer values, so we don't need to warn
  about relying on undefined signed overflow.  We disable the
diff --git a/gcc/gimplify.c b/gcc/gimplify.c
index 8bb54fd7481..7b6874a3142 100644
--- a/gcc/gimplify.c
+++ b/gcc/gimplify.c
@@ -2958,7 +2958,10 @@ gimplify_var_or_parm_decl (tree *expr_p)
  declaration, for which we've already issued an error.  It would
  be really nice if the front end wouldn't leak these at all.
  Currently the only known culprit is C++ destructors, as seen
- in g++.old-deja/g++.jason/binding.C.  */
+ in g++.old-deja/g++.jason/binding.C.
+ Another possible culpit are size expressions for variably modified
+ types which are lost in the FE or not gimplified correctly.
+  */
   if (VAR_P (decl)
   && !DECL_SEEN_IN_BIND_EXPR_P (decl)
   && !TREE_STATIC (decl) && !DECL_EXTERNAL (decl)
@@ -3103,16 +3106,22 @@ gimplify_compound_lval (tree *expr_p, gimple_seq 
*pre_p, gimple_seq *post_p,
  expression until we deal with any variable bounds, sizes, or
  positions in order to deal with PLACEHOLDER_EXPRs.
 
- So we do this in three steps.  First we deal with the annotations
- for any variables in the components, then we gimplify the base,
- then we gimplify any indices, from left to right.  */
+ The base expression may contain a statement expression that
+ has declarations used in size expressions, so has to be
+ gimplified before gimplifying the size expressions.
+
+ So we do this in three steps.  First we deal with variable
+ bounds, sizes, and positions, then we gimplify the base,
+ then we deal with the annotations for any variables in the
+ components and any indices, from left to right.  */
+
   for (i = expr_stack.length () - 1; i >= 0; i--)
 {
   tree t = expr_stack[i];
 
   if (TREE_CODE (t) == ARRAY_REF || TREE_CODE (t) == ARRAY_RANGE_REF)
{
- /* Gimplify the low bound and element type size and put them into
+ /* Deal with the low bound and element type size and put them into
 the ARRAY_REF.  If these values are set, t