Re: [PATCH] gcc.c-torture/execute/builtins/fputs.c: Define _GNU_SOURCE

[Eric Gallager]

On Sun, Oct 22, 2023 at 4:03 PM  wrote:
>
> On 22 October 2023 21:45:12 CEST, Jeff Law  wrote:
> >
> >
> >On 10/22/23 10:09, Andrew Pinski wrote:
> >> On Sun, Oct 22, 2023 at 12:47 AM Florian Weimer  wrote:
> >>>
> >>> Current glibc headers only declare fputs_unlocked for _GNU_SOURCE.
> >>> Defining the macro avoids an implicit function declaration.
> >>
> >> This does not help targets that don't use glibc though.
> >> Note for builtins testsuite there is a lib-fputs.c file which will
> >> define a fputs_unlock which is how it will link even if the libc does
> >> not define a fputs_unlock.
> >But isn't fputs_unlocked glibc specific to begin with?  ie, the test really 
> >doesn't make sense AFAICT on non-glibc targets.
>
> I think uClibc had it too, at least at one point in the past.
>

gnulib has these portability notes about fputs_unlocked:
https://www.gnu.org/software/gnulib/manual/html_node/fputs_005funlocked.html
Unfortunately, it only lists the platforms that *don't* have it, not
the ones that *do* have it, so I'm afraid its notes aren't actually
that helpful after all... oh well, never mind...

Re: [PATCH v4] libgfortran: Replace mutex with rwlock

[Thomas Koenig]

Hi Lipeng,


Sure, as your comments, in the patch V6, I added 3 test cases with
OpenMP to test different cases in concurrency respectively:
1. find and create unit very frequently to stress read lock and write lock.
2. only access the unit which exist in cache to stress read lock.
3. access the same unit in concurrency.
For the third test case, it also help to find a bug:  When unit can't
be found in cache nor unit list in read phase, then threads will try
to acquire write lock to insert the same unit, this will cause duplicate key

error.

To fix this bug, I get the unit from unit list once again before insert in write

lock.

More details you can refer the patch v6.



Could you help to review this update? I really appreciate your assistance.




Could you help to review this update?  Any concern will be appreciated.


Fortran parts are OK (I think I wrote that already), we need somebody
for the non-Fortran parts.

Jakub, could you maybe take a look?

Best regards

Thomas

[PATCH v1 1/1] gcc: config: microblaze: fix cpu version check

[Neal Frager]

There is a microblaze cpu version 10.0 included in versal. If the
minor version is only a single digit, then the version comparison
will fail as version 10.0 will appear as 100 compared to version
6.00 or 8.30 which will calculate to values 600 and 830.

The issue can be seen when using the '-mcpu=10.0' option.

With this fix, versions with a single digit minor number such as
10.0 will be calculated as greater than versions with a smaller
major version number, but with two minor version digits.

By applying this fix, several incorrect warning messages will no
longer be printed when building the versal plm application, such
as the warning message below:

warning: '-mxl-multiply-high' can be used only with '-mcpu=v6.00.a' or greater

Signed-off-by: Neal Frager 
---
 gcc/config/microblaze/microblaze.cc | 164 +---
 1 file changed, 76 insertions(+), 88 deletions(-)

diff --git a/gcc/config/microblaze/microblaze.cc 
b/gcc/config/microblaze/microblaze.cc
index c9f6c4198cf..6e1555f6eb3 100644
--- a/gcc/config/microblaze/microblaze.cc
+++ b/gcc/config/microblaze/microblaze.cc
@@ -56,8 +56,6 @@
 /* This file should be included last.  */
 #include "target-def.h"
 
-#define MICROBLAZE_VERSION_COMPARE(VA,VB) strcasecmp (VA, VB)
-
 /* Classifies an address.
 
 ADDRESS_INVALID
@@ -1297,12 +1295,73 @@ microblaze_expand_block_move (rtx dest, rtx src, rtx 
length, rtx align_rtx)
   return false;
 }
 
+/*  Convert a version number of the form "vX.YY.Z" to an integer encoding
+for easier range comparison.  */
+static int
+microblaze_version_to_int (const char *version)
+{
+  const char *p, *v;
+  const char *tmpl = "vXX.YY.Z";
+  int iver1 =0, iver2 =0, iver3 =0;
+
+  p = version;
+  v = tmpl;
+
+  while (*p)
+{
+  if (*v == 'X')
+   {   /* Looking for major  */
+ if (*p == '.')
+   *v++;
+ else
+   {
+ if (!(*p >= '0' && *p <= '9'))
+   return -1;
+ iver1 += (int) (*p - '0');
+ iver1 *= 1000;
+   }
+   }
+  else if (*v == 'Y')
+   {   /* Looking for minor  */
+ if (!(*p >= '0' && *p <= '9'))
+   return -1;
+ iver2 += (int) (*p - '0');
+ iver2 *= 10;
+   }
+  else if (*v == 'Z')
+   {   /* Looking for compat  */
+ if (!(*p >= 'a' && *p <= 'z'))
+   return -1;
+ iver3 = (int) (*p - 'a');
+   }
+  else
+   {
+ if (*p != *v)
+   return -1;
+   }
+
+  v++;
+  p++;
+}
+
+  if (*p)
+return -1;
+
+  return iver1 + iver2 + iver3;
+}
+
 static bool
 microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code 
ATTRIBUTE_UNUSED,
  int opno ATTRIBUTE_UNUSED, int *total,
  bool speed ATTRIBUTE_UNUSED)
 {
   int code = GET_CODE (x);
+  int ver, ver_int;
+
+  if (microblaze_select_cpu == NULL)
+microblaze_select_cpu = MICROBLAZE_DEFAULT_CPU;
+
+  ver_int = microblaze_version_to_int (microblaze_select_cpu);
 
   switch (code)
 {
@@ -1345,8 +1404,8 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int 
outer_code ATTRIBUTE_UNUSED,
   {
if (TARGET_BARREL_SHIFT)
  {
-   if (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v5.00.a")
-   >= 0)
+   ver = ver_int - microblaze_version_to_int("v5.00.a");
+   if (ver >= 0)
  *total = COSTS_N_INSNS (1);
else
  *total = COSTS_N_INSNS (2);
@@ -1407,8 +1466,8 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int 
outer_code ATTRIBUTE_UNUSED,
  }
else if (!TARGET_SOFT_MUL)
  {
-   if (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v5.00.a")
-   >= 0)
+   ver = ver_int - microblaze_version_to_int("v5.00.a");
+   if (ver >= 0)
  *total = COSTS_N_INSNS (1);
else
  *total = COSTS_N_INSNS (3);
@@ -1681,72 +1740,13 @@ function_arg_partial_bytes (cumulative_args_t cum_v,
   return 0;
 }
 
-/*  Convert a version number of the form "vX.YY.Z" to an integer encoding 
-for easier range comparison.  */
-static int
-microblaze_version_to_int (const char *version)
-{
-  const char *p, *v;
-  const char *tmpl = "vXX.YY.Z";
-  int iver = 0;
-
-  p = version;
-  v = tmpl;
-
-  while (*p)
-{
-  if (*v == 'X')
-   {   /* Looking for major  */
-  if (*p == '.')
-{
-  v++;
-}
-  else
-{
- if (!(*p >= '0' && *p <= '9'))
-   return -1;
- iver += (int) (*p - '0');
-  iver *= 10;
-}
-}
-  else if (*v == 'Y')
-   {   /* Looking for minor  */
- if (!(*p >= '0' && *p <= '9'))
-   return -1;
- iver += (int) (*p - '0');
- iver *= 10;
-   }
-  else if 

Re: [MAINTAINERS/KERNEL SUMMIT] Trust and maintenance of file systems

[Eric Gallager]

On Tue, Sep 12, 2023 at 5:53 AM Richard Biener via Gcc-patches
 wrote:
>
> On Thu, Sep 7, 2023 at 2:32 PM Segher Boessenkool
>  wrote:
> >
> > On Thu, Sep 07, 2023 at 02:23:00PM +0300, Dan Carpenter wrote:
> > > On Thu, Sep 07, 2023 at 06:04:09AM -0500, Segher Boessenkool wrote:
> > > > On Thu, Sep 07, 2023 at 12:48:25PM +0300, Dan Carpenter via Gcc-patches 
> > > > wrote:
> > > > > I started to hunt
> > > > > down all the Makefile which add a -Werror but there are a lot and
> > > > > eventually I got bored and gave up.
> > > >
> > > > I have a patch stack for that, since 2014 or so.  I build Linux with
> > > > unreleased GCC versions all the time, so pretty much any new warning is
> > > > fatal if you unwisely use -Werror.
> > > >
> > > > > Someone should patch GCC so there it checks an environment variable to
> > > > > ignore -Werror.  Somethine like this?
> > > >
> > > > No.  You should patch your program, instead.
> > >
> > > There are 2930 Makefiles in the kernel source.
> >
> > Yes.  And you need patches to about thirty.  Or a bit more, if you want
> > to do it more cleanly.  This isn't a guess.
> >
> > > > One easy way is to add a
> > > > -Wno-error at the end of your command lines.  Or even just -w if you
> > > > want or need a bigger hammer.
> > >
> > > I tried that.  Some of the Makefiles check an environemnt variable as
> > > well if you want to turn off -Werror.  It's not a complete solution at
> > > all.  I have no idea what a complete solution looks like because I gave
> > > up.
> >
> > A solution can not involve changing the compiler.  That is just saying
> > the kernel doesn't know how to fix its own problems, so let's give the
> > compiler some more unnecessary problems.
>
> You can change the compiler by replacing it with a script that appends
> -Wno-error
> for example.

I personally would find the original proposal of an IGNORE_WERROR
environment variable much simpler than any of the alternative proposed
solutions, especially for complicated build systems where I can't tell
where the "-Werror" is getting inserted from. Often times I'm not
actually the developer of the package I'm trying to compile, so saying
"fix your code" in such a case doesn't make sense, since it's not
actually my code to fix in the first place. It would be much easier
for end-users in such a situation to just set an environment variable,
rather than asking them to try to become developers themselves, which
is what some of these alternative proposals (such as "write your own
script!") seem to be asking.

>
> > > > Or nicer, put it all in Kconfig, like powerpc already has for example.
> > > > There is a CONFIG_WERROR as well, so maybe use that in all places?
> > >
> > > That's a good idea but I'm trying to compile old kernels and not the
> > > current kernel.
> >
> > You can patch older kernels, too, you know :-)
> >
> > If you need to not make any changes to your source code for some crazy
> > reason (political perhaps?), just use a shell script or shell function
> > instead of invoking the compiler driver directly?
> >
> >
> > Segher
> >
> > Segher

Re: [PATCH 0/2] RISC-V: Define not broken prefetch builtins

[Tsukasa OI]

On 2023/09/27 6:38, Jeff Law wrote:
> 
> 
> On 9/22/23 01:11, Tsukasa OI wrote:
>> Hello,
>>
>> As I explained earlier:
>> ,
>> the builtin function for RISC-V "__builtin_riscv_zicbop_cbo_prefetchi" is
>> completely broken.  Instead, this patch set (in PATCH 1/2) creates three
>> new, working builtin intrinsics.
>>
>> void __builtin_riscv_prefetch_i(void *addr, [intptr_t offset,] ...);
>> void __builtin_riscv_prefetch_r(void *addr, [intptr_t offset,] ...);
>> void __builtin_riscv_prefetch_w(void *addr, [intptr_t offset,] ...);
>>
>>
>> For consistency with "prefetch.i" and the reason I describe later (which
>> requires native instructions for "prefetch.r" and "prefetch.w"), I
>> decided
>> to make builtin functions for "prefetch.[rw]" as well.
>>
>> Optional second argument (named "offset" here) defaults to zero and
>> must be
>> a compile-time integral constant.  Also, it must be a valid offset for a
>> "prefetch.[irw]" HINT instruction (x % 32 == 0 && x >= -2048 && x <
>> 2048).
>>
>> They are defined if the 'Zicbop' extension is supported and expands to:
>>
>>> prefetch.i offset(addr_reg)  ; __builtin_riscv_prefetch_i
>>> prefetch.r offset(addr_reg)  ; __builtin_riscv_prefetch_r
>>> prefetch.w offset(addr_reg)  ; __builtin_riscv_prefetch_w
>>
>>
>> The hardest part of this patch set was to support builtin function with
>> variable argument (making "offset" optional).  It required:
>>
>> 1.  Support for variable argument function prototype for RISC-V builtins
>>  (corresponding "..." on C-based languages)
>> 2.  Support for (non-vector) RISC-V builtins with custom expansion
>>  (on RVV intrinsics, custom expansion is already implemented)
>>
>>
>> ... and PATCH 2/2 fixes an ICE while I'm investigating regular prefetch
>> builtin (__builtin_prefetch).  If the 'Zicbop' extension is enabled,
>> __builtin_prefetch with the first argument NULL or (not all but) some
>> fixed addresses (like ((void*)0x20)) can cause an ICE.  This is because
>> the "r" constraint is not checked and a constant can be a first argument
>> of target-specific "prefetch" RTL instruction.
>>
>> PATCH 2/2 fixes this issue by:
>>
>> 1.  Making "prefetch" not an instruction but instead an expansion
>>  (this is not rare; e.g. on i386) and
>> 2.  Coercing the address argument into a register in the expansion
>>
>> It requires separate instructions for "prefetch.[rw]" and I decided to
>> make
>> those prefetch instructions very similar to "prefetch.i".  That's one
>> of the
>> reasons I created builtins corresponding those.
> What I still don't understand is why we're dealing with a decomposed
> address in the builtin, define_expand and/or define_insn.

Sorry, I misunderstood your intent (quite badly) possibly because I was
not familiar with the concept of "predicates" in GCC.

On 2023/08/29 6:20, Jeff Law wrote:
> What I would suggest is making a new predicate that accepts either a 
> register or a register+offset where the offset fits in a signed 12 bit 
> immediate.  Use that for operand 0's predicate and I think this will 
> "just work" and cover all the cases supported by the prefetch.i instruction.

I misunderstood that as "just" adding the offset field to the
instructions and that's the reason I veered off the path so much.  So
instead, I'll answer your original question.

register+offset seems a problem for prefetch instructions because signed
12 bit immediate values need to be also a multiple of 32.  There's no
proper relocation type for this kind and I considered we have "very"
limited cases where making such predicate (as you suggested) will
*efficiently* work.

My opinion is, if we need very fine-grained control with prefetch
instructions, we'd better to use inline assembly.

I'll continue testing the possibilities of register+offset predicate
(including whether it works efficiently) and I'll temporarily withdraw
new built-in functions to focus on major issues before GCC 14:

1.  Remove completely broken __builtin_riscv_zicbop_prefetch_i and
2.  Fix an ICE when __builtin_prefetch is used with some constants.

I'll submit minimized patches only to fix those issues.  They will not
contain "register+offset" you suggested because of the difficulties
above but should be sufficient to fix imminent issues.

Thanks,
Tsukasa

> 
> Have the builtin accept an address, any address.  Then use force_reg to
> force the address into a register in the expander.  My understanding is
> register indirect is always valid.
> 
> Create an operand predicate that accepts reg and reg+d for the limited
> displacements allowed.  Use that for the address operand in the
> associated define_insn.
> 
> 
> It seems like you're making this more complex than it needs to be.  Or
> I'm missing something critically important.
> 
> jeff
> 

[PING][PATCH v4] [tree-optimization/110279] Consider FMA in get_reassociation_width

[Di Zhao OS]

Hello and Ping,

Thanks,
Di

> -Original Message-
> From: Di Zhao OS 
> Sent: Monday, October 9, 2023 12:40 AM
> To: Richard Biener 
> Cc: gcc-patches@gcc.gnu.org
> Subject: RE: [PATCH v4] [tree-optimization/110279] Consider FMA in
> get_reassociation_width
> 
> Attached is a new version of the patch.
> 
> > -Original Message-
> > From: Richard Biener 
> > Sent: Friday, October 6, 2023 5:33 PM
> > To: Di Zhao OS 
> > Cc: gcc-patches@gcc.gnu.org
> > Subject: Re: [PATCH v4] [tree-optimization/110279] Consider FMA in
> > get_reassociation_width
> >
> > On Thu, Sep 14, 2023 at 2:43 PM Di Zhao OS
> >  wrote:
> > >
> > > This is a new version of the patch on "nested FMA".
> > > Sorry for updating this after so long, I've been studying and
> > > writing micro cases to sort out the cause of the regression.
> >
> > Sorry for taking so long to reply.
> >
> > > First, following previous discussion:
> > > (https://gcc.gnu.org/pipermail/gcc-patches/2023-September/629080.html)
> > >
> > > 1. From testing more altered cases, I don't think the
> > > problem is that reassociation works locally. In that:
> > >
> > >   1) On the example with multiplications:
> > >
> > > tmp1 = a + c * c + d * d + x * y;
> > > tmp2 = x * tmp1;
> > > result += (a + c + d + tmp2);
> > >
> > >   Given "result" rewritten by width=2, the performance is
> > >   worse if we rewrite "tmp1" with width=2. In contrast, if we
> > >   remove the multiplications from the example (and make "tmp1"
> > >   not singe used), and still rewrite "result" by width=2, then
> > >   rewriting "tmp1" with width=2 is better. (Make sense because
> > >   the tree's depth at "result" is still smaller if we rewrite
> > >   "tmp1".)
> > >
> > >   2) I tried to modify the assembly code of the example without
> > >   FMA, so the width of "result" is 4. On Ampere1 there's no
> > >   obvious improvement. So although this is an interesting
> > >   problem, it doesn't seem like the cause of the regression.
> >
> > OK, I see.
> >
> > > 2. From assembly code of the case with FMA, one problem is
> > > that, rewriting "tmp1" to parallel didn't decrease the
> > > minimum CPU cycles (taking MULT_EXPRs into account), but
> > > increased code size, so the overhead is increased.
> > >
> > >a) When "tmp1" is not re-written to parallel:
> > > fmadd d31, d2, d2, d30
> > > fmadd d31, d3, d3, d31
> > > fmadd d31, d4, d5, d31  //"tmp1"
> > > fmadd d31, d31, d4, d3
> > >
> > >b) When "tmp1" is re-written to parallel:
> > > fmul  d31, d4, d5
> > > fmadd d27, d2, d2, d30
> > > fmadd d31, d3, d3, d31
> > > fadd  d31, d31, d27 //"tmp1"
> > > fmadd d31, d31, d4, d3
> > >
> > > For version a), there are 3 dependent FMAs to calculate "tmp1".
> > > For version b), there are also 3 dependent instructions in the
> > > longer path: the 1st, 3rd and 4th.
> >
> > Yes, it doesn't really change anything.  The patch has
> >
> > +  /* If there's code like "acc = a * b + c * d + acc" in a tight loop, some
> > + uarchs can execute results like:
> > +
> > +   _1 = a * b;
> > +   _2 = .FMA (c, d, _1);
> > +   acc_1 = acc_0 + _2;
> > +
> > + in parallel, while turning it into
> > +
> > +   _1 = .FMA(a, b, acc_0);
> > +   acc_1 = .FMA(c, d, _1);
> > +
> > + hinders that, because then the first FMA depends on the result
> > of preceding
> > + iteration.  */
> >
> > I can't see what can be run in parallel for the first case.  The .FMA
> > depends on the multiplication a * b.  Iff the uarch somehow decomposes
> > .FMA into multiply + add then the c * d multiply could run in parallel
> > with the a * b multiply which _might_ be able to hide some of the
> > latency of the full .FMA.  Like on x86 Zen FMA has a latency of 4
> > cycles but a multiply only 3.  But I never got confirmation from any
> > of the CPU designers that .FMAs are issued when the multiply
> > operands are ready and the add operand can be forwarded.
> >
> > I also wonder why the multiplications of the two-FMA sequence
> > then cannot be executed at the same time?  So I have some doubt
> > of the theory above.
> 
> The parallel execution for the code snippet above was the other
> issue (previously discussed here:
> https://gcc.gnu.org/pipermail/gcc-patches/2023-August/628960.html).
> Sorry it's a bit confusing to include that here, but these 2 fixes
> needs to be combined to avoid new regressions. Since considering
> FMA in get_reassociation_width produces more results of width=1,
> so there would be more loop depending FMA chains.
> 
> > Iff this really is the reason for the sequence to execute with lower
> > overall latency and we want to attack this on GIMPLE then I think
> > we need a target hook telling us this fact (I also wonder if such
> > behavior can be modeled in the scheduler pipeline description at all?)
> >
> > > So it seems to me the current get_reassociation_width algorithm
> > > 

[PATCH][WIP] libiberty: Support for relocation output

[Rishi Raj]

This patch teaches libiberty to output X86-64 Relocations.

>From d3b2d168369e76a6fac2b3b3cbd591ccf22ea8ea Mon Sep 17 00:00:00 2001
From: Rishi Raj 
Date: Mon, 23 Oct 2023 06:22:44 +0530
Subject: [PATCH 1/3] Extended libiberty to output X86_64 relocations

Signed-off-by: Rishi Raj 
---
 include/simple-object.h  |  11 +-
 libiberty/simple-object-common.h |  28 ++-
 libiberty/simple-object-elf.c| 317 ++-
 libiberty/simple-object.c|  95 +++--
 4 files changed, 387 insertions(+), 64 deletions(-)

diff --git a/include/simple-object.h b/include/simple-object.h
index 3a14184b12c..17ecd856636 100644
--- a/include/simple-object.h
+++ b/include/simple-object.h
@@ -186,6 +186,14 @@ simple_object_write_add_data (simple_object_write
*simple_object,
   simple_object_write_section *section,
   const void *buffer, size_t size,
   int copy, int *err);
+/* Add relocation to SECTION in SIMPLE_OBJECT */
+void
+simple_object_write_add_relocation (simple_object_write_section *section,
+  unsigned long offset, long addend, const char *name, unsigned long
rel_sec_idx);
+
+/* Modifies simple object section buffer at offset. */
+void simple_object_modify_buffer (simple_object_write_section *section,
+  unsigned long offset, unsigned char *buffer, int copy);

 /* Write the complete object file to DESCRIPTOR, an open file
descriptor.  This returns NULL on success.  On error this returns
@@ -199,7 +207,8 @@ simple_object_write_to_file (simple_object_write
*simple_object,
 object_write_to_file function*/
 extern void
 simple_object_write_add_symbol(simple_object_write *sobj, const char *name,
-size_t size, unsigned int align);
+   unsigned int value, size_t size, unsigned char bind,
+   unsigned char type, unsigned short int shndx, unsigned char
st_other);

 /* Release all resources associated with SIMPLE_OBJECT, including any
simple_object_write_section's that may have been created.  */
diff --git a/libiberty/simple-object-common.h
b/libiberty/simple-object-common.h
index df99c9d85ac..1dc06908eec 100644
--- a/libiberty/simple-object-common.h
+++ b/libiberty/simple-object-common.h
@@ -73,9 +73,17 @@ struct simple_object_symbol_struct
   /*The name of this symbol. */
   char *name;
   /* Symbol value */
-  unsigned int align;
+  unsigned int value;
   /* Symbol size */
   size_t size;
+  /*Symbol binding*/
+  unsigned char bind;
+  /*Symbol info*/
+  unsigned char type;
+  /*Symbol section index*/
+  unsigned short int shndx;
+  /* Symbol visibility */
+  unsigned char st_other;
 };

 /* A section in an object file being created.  */
@@ -93,6 +101,11 @@ struct simple_object_write_section_struct
   struct simple_object_write_section_buffer *buffers;
   /* The last data attached to this section.  */
   struct simple_object_write_section_buffer *last_buffer;
+  /*The first relocation attached to this section. */
+  struct simple_object_write_section_relocation *relocations;
+  /* The last relocation attache to this section. */
+  struct simple_object_write_section_relocation *last_relocation;
+
 };

 /* Data attached to a section.  */
@@ -108,6 +121,19 @@ struct simple_object_write_section_buffer
   /* A buffer to free, or NULL.  */
   void *free_buffer;
 };
+struct simple_object_write_section_relocation
+{
+  /* The next relocation for this section. */
+  struct simple_object_write_section_relocation *next;
+  /* The offset. */
+  unsigned long offset;
+  /* Addend */
+  long addend;
+  /* Relocation symbol */
+  const char *name;
+  /* Relocation symbol st_shndx wrt .debug_info index */
+  unsigned long rel_sec_idx;
+};

 /* The number of bytes we read from the start of the file to pass to
the match function.  */
diff --git a/libiberty/simple-object-elf.c b/libiberty/simple-object-elf.c
index 86b7a27dc74..0bbaf4b489f 100644
--- a/libiberty/simple-object-elf.c
+++ b/libiberty/simple-object-elf.c
@@ -238,6 +238,7 @@ typedef struct
 #define STT_NOTYPE 0 /* Symbol type is unspecified */
 #define STT_OBJECT 1 /* Symbol is a data object */
 #define STT_FUNC 2 /* Symbol is a code object */
+#define STT_SECTION 3 /* Symbol is associate with a section */
 #define STT_TLS 6 /* Thread local data object */
 #define STT_GNU_IFUNC 10 /* Symbol is an indirect code object */

@@ -248,6 +249,63 @@ typedef struct
 #define STV_DEFAULT 0 /* Visibility is specified by binding type */
 #define STV_HIDDEN 2 /* Can only be seen inside currect component */

+typedef struct
+{
+  unsigned char r_offset[4]; /* Address */
+  unsigned char r_info[4];  /* relocation type and symbol index */
+} Elf32_External_Rel;
+
+typedef struct
+{
+  unsigned char r_offset[8]; /* Address */
+  unsigned char r_info[8]; /* Relocation type and symbol index */
+} Elf64_External_Rel;
+typedef struct
+{
+  unsigned char r_offset[4]; /* Address */
+  unsigned char r_info[4];  /* Relocation type and symbol index */
+  char r_addend[4]; /* Addend */
+} 

Re: [PATCH v1] RISC-V: Remove unnecessary asm check for rounding autovec

[juzhe.zh...@rivai.ai]

LGTM. Thanks.



juzhe.zh...@rivai.ai
 
From: pan2.li
Date: 2023-10-23 10:39
To: gcc-patches
CC: juzhe.zhong; pan2.li; yanzhang.wang; kito.cheng
Subject: [PATCH v1] RISC-V: Remove unnecessary asm check for rounding autovec
From: Pan Li 
 
The vsetvl asm check is unnecessary for the rounding function autovec.
These rounding test cases should focus on the rounding insn sequence.
 
gcc/testsuite/ChangeLog:
 
* gcc.target/riscv/rvv/autovec/unop/bswap16-0.c: Remove the
vsetvl check.
* gcc.target/riscv/rvv/autovec/unop/math-ceil-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-ceil-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-ceil-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-ceil-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-floor-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-floor-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-floor-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-floor-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-iceil-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-ifloor-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-irint-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-iround-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lceil-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lceil-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lfloor-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lfloor-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-llceil-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-llfloor-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-llrint-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-llround-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lrint-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lrint-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lround-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lround-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-nearbyint-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-nearbyint-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-nearbyint-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-nearbyint-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-rint-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-rint-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-rint-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-rint-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-round-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-round-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-round-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-round-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-roundeven-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-roundeven-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-roundeven-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-roundeven-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-trunc-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-trunc-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-trunc-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-trunc-3.c: Ditto.
 
Signed-off-by: Pan Li 
---
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/bswap16-0.c  | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-ceil-0.c| 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-ceil-1.c| 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-ceil-2.c| 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-ceil-3.c| 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-floor-0.c   | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-floor-1.c   | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-floor-2.c   | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-floor-3.c   | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iceil-0.c   | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-ifloor-0.c  | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-irint-0.c   | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iround-0.c  | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lceil-0.c   | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lceil-1.c   | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lfloor-0.c  | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lfloor-1.c  | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llceil-0.c  | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llfloor-0.c | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-0.c  | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llround-0.c | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lrint-0.c   | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lrint-1.c   | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lround-0.c  | 1 -
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lround-1.c  | 1 -
.../gcc.target/riscv/rvv/autovec/unop/math-nearbyint-0.c | 1 -

[PATCH v1] RISC-V: Remove unnecessary asm check for rounding autovec

[pan2 . li]

From: Pan Li 

The vsetvl asm check is unnecessary for the rounding function autovec.
These rounding test cases should focus on the rounding insn sequence.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/unop/bswap16-0.c: Remove the
vsetvl check.
* gcc.target/riscv/rvv/autovec/unop/math-ceil-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-ceil-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-ceil-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-ceil-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-floor-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-floor-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-floor-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-floor-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-iceil-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-ifloor-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-irint-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-iround-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lceil-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lceil-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lfloor-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lfloor-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-llceil-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-llfloor-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-llrint-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-llround-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lrint-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lrint-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lround-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-lround-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-nearbyint-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-nearbyint-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-nearbyint-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-nearbyint-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-rint-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-rint-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-rint-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-rint-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-round-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-round-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-round-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-round-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-roundeven-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-roundeven-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-roundeven-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-roundeven-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-trunc-0.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-trunc-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-trunc-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/unop/math-trunc-3.c: Ditto.

Signed-off-by: Pan Li 
---
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/bswap16-0.c  | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-ceil-0.c| 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-ceil-1.c| 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-ceil-2.c| 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-ceil-3.c| 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-floor-0.c   | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-floor-1.c   | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-floor-2.c   | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-floor-3.c   | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iceil-0.c   | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-ifloor-0.c  | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-irint-0.c   | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-iround-0.c  | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lceil-0.c   | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lceil-1.c   | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lfloor-0.c  | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lfloor-1.c  | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llceil-0.c  | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llfloor-0.c | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llrint-0.c  | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-llround-0.c | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lrint-0.c   | 1 -
 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lrint-1.c   | 1 -
 

Re: Re: [PATCH] RISC-V: Fix AVL_TYPE attribute of tuple mode mov

[juzhe.zh...@rivai.ai]

Hi, Jeff.

(define_insn_and_split "*mov_"
  [(set (match_operand:VT 0 "reg_or_mem_operand" "=vr,vr, m")
(match_operand:VT 1 "reg_or_mem_operand" " vr, m,vr"))
   (clobber (match_scratch:P 2 "=X,,"))
   (clobber (match_scratch:P 3 "=X,,"))
   (clobber (match_scratch:P 4 "=X,,"))]
  "TARGET_VECTOR"
  "#"
  "&& reload_completed"
  [(const_int 0)]
  {
riscv_vector::expand_tuple_move (operands);
DONE;
  }
  [(set_attr "type" "vmov,vlde,vste")
   (set_attr "mode" "")
   (set (attr "avl_type") (const_int INVALID_ATTRIBUTE))])

We classify this pattern as vlde/vste/vmov, this pattern doesn't have AVL TYPE 
operands.

I realize that when I am adding new pre-RA optimization PASS it caused issue.




juzhe.zh...@rivai.ai
 
From: Jeff Law
Date: 2023-10-23 10:24
To: Juzhe-Zhong; gcc-patches
CC: kito.cheng; kito.cheng; rdapp.gcc
Subject: Re: [PATCH] RISC-V: Fix AVL_TYPE attribute of tuple mode mov
 
 
On 10/22/23 16:46, Juzhe-Zhong wrote:
> The tuple mode mov pattern doesn't have avl_type so it is invalid 
> attribute.
> 
> gcc/ChangeLog:
> 
> * config/riscv/vector.md: Fix avl_type attribute of tuple mov.
Presumably you got a fault or something similar trying to compute the 
avl_type attr when trying to access operands[7]? from this code:
 
> (eq_attr "type" 
> "vlde,vldff,vste,vimov,vimov,vimov,vfmov,vext,vimerge,\
>   
> vfsqrt,vfrecp,vfmerge,vfcvtitof,vfcvtftoi,vfwcvtitof,\
>   
> vfwcvtftoi,vfwcvtftof,vfncvtitof,vfncvtftoi,vfncvtftof,\
>   vfclass,vired,viwred,vfredu,vfredo,vfwredu,vfwredo,\
>   vimovxv,vfmovfv,vlsegde,vlsegdff")
>(symbol_ref "INTVAL (operands[7])")
>  (eq_attr "type" "vldm,vstm,vimov,vmalu,vmalu")
 
 
OK for the trunk.
 
Jeff
 

RE: [PATCH] RISC-V: Fix AVL_TYPE attribute of tuple mode mov

[Li, Pan2]

Committed, thanks Jeff.

Pan

-Original Message-
From: Jeff Law  
Sent: Monday, October 23, 2023 10:24 AM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; rdapp@gmail.com
Subject: Re: [PATCH] RISC-V: Fix AVL_TYPE attribute of tuple mode mov



On 10/22/23 16:46, Juzhe-Zhong wrote:
> The tuple mode mov pattern doesn't have avl_type so it is invalid 
> attribute.
> 
> gcc/ChangeLog:
> 
>   * config/riscv/vector.md: Fix avl_type attribute of tuple mov.
Presumably you got a fault or something similar trying to compute the 
avl_type attr when trying to access operands[7]? from this code:

> (eq_attr "type" 
> "vlde,vldff,vste,vimov,vimov,vimov,vfmov,vext,vimerge,\
>   
> vfsqrt,vfrecp,vfmerge,vfcvtitof,vfcvtftoi,vfwcvtitof,\
>   
> vfwcvtftoi,vfwcvtftof,vfncvtitof,vfncvtftoi,vfncvtftof,\
>   vfclass,vired,viwred,vfredu,vfredo,vfwredu,vfwredo,\
>   vimovxv,vfmovfv,vlsegde,vlsegdff")
>(symbol_ref "INTVAL (operands[7])")
>  (eq_attr "type" "vldm,vstm,vimov,vmalu,vmalu")


OK for the trunk.

Jeff

Re: [PATCH] RISC-V: Fix AVL_TYPE attribute of tuple mode mov

[Jeff Law]

On 10/22/23 16:46, Juzhe-Zhong wrote:

The tuple mode mov pattern doesn't have avl_type so it is invalid 
attribute.

gcc/ChangeLog:

* config/riscv/vector.md: Fix avl_type attribute of tuple mov.
Presumably you got a fault or something similar trying to compute the 
avl_type attr when trying to access operands[7]? from this code:



(eq_attr "type" "vlde,vldff,vste,vimov,vimov,vimov,vfmov,vext,vimerge,\
  vfsqrt,vfrecp,vfmerge,vfcvtitof,vfcvtftoi,vfwcvtitof,\
  
vfwcvtftoi,vfwcvtftof,vfncvtitof,vfncvtftoi,vfncvtftof,\
  vfclass,vired,viwred,vfredu,vfredo,vfwredu,vfwredo,\
  vimovxv,vfmovfv,vlsegde,vlsegdff")
   (symbol_ref "INTVAL (operands[7])")
 (eq_attr "type" "vldm,vstm,vimov,vmalu,vmalu")



OK for the trunk.

Jeff

[gccwwwdocs PATCH] gcc-13/14: Mention Intel new ISA and march support

[Haochen Jiang]

Hi all,

This patch mentions recent update for x86-64 backend, including ISAs enabled
update on previous introduced CPU and newly introduced options/ISAs/CPUs.

Ok for wwwdocs?

Thx,
Haochen

---
 htdocs/gcc-13/changes.html |  8 
 htdocs/gcc-14/changes.html | 19 +++
 2 files changed, 23 insertions(+), 4 deletions(-)

diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html
index 10c54689..8ef3d639 100644
--- a/htdocs/gcc-13/changes.html
+++ b/htdocs/gcc-13/changes.html
@@ -579,13 +579,13 @@ You may also want to check out our
   
   GCC now supports the Intel CPU named Sierra Forest through
 -march=sierraforest.
-The switch enables the AVX-IFMA, AVX-VNNI-INT8, AVX-NE-CONVERT and
-CMPccXADD ISA extensions.
+The switch enables the AVX-IFMA, AVX-VNNI-INT8, AVX-NE-CONVERT, CMPccXADD,
+ENQCMD and UINTR ISA extensions.
   
   GCC now supports the Intel CPU named Grand Ridge through
 -march=grandridge.
-The switch enables the AVX-IFMA, AVX-VNNI-INT8, AVX-NE-CONVERT, CMPccXADD
-and RAO-INT ISA extensions.
+The switch enables the AVX-IFMA, AVX-VNNI-INT8, AVX-NE-CONVERT, CMPccXADD,
+ENQCMD, UINTR and RAO-INT ISA extensions.
   
   GCC now supports the Intel CPU named Emerald Rapids through
 -march=emeraldrapids.
diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html
index c817dde4..4f71061f 100644
--- a/htdocs/gcc-14/changes.html
+++ b/htdocs/gcc-14/changes.html
@@ -186,6 +186,10 @@ a work-in-progress.
 
 IA-32/x86-64
 
+  New compiler option -m[no-]evex512 was added.
+  The compiler switch enables/disables 512 bit vector and 64 bit mask
+  register. It will be default on if AVX512F is enabled.
+  
   New ISA extension support for Intel AVX-VNNI-INT16 was added.
   AVX-VNNI-INT16 intrinsics are available via the 
-mavxvnniint16
   compiler switch.
@@ -202,6 +206,16 @@ a work-in-progress.
   SM4 intrinsics are available via the -msm4
   compiler switch.
   
+  New ISA extension support for Intel USER_MSR was added.
+  USER_MSR intrinsics are available via the -muser_msr
+  compiler switch.
+  
+  GCC now supports the Intel CPU named Clearwater Forest through
+-march=clearwaterforest.
+Based on Sierra Forest, the switch further enables the AVX-VNNI-INT16,
+SHA512, SM3, SM4, USER_MSR and PREFETCHI ISA extensions.
+extensions.
+  
   GCC now supports the Intel CPU named Arrow Lake through
 -march=arrowlake.
 Based on Alder Lake, the switch further enables the AVX-IFMA,
@@ -216,6 +230,11 @@ a work-in-progress.
 -march=lunarlake.
 Lunar Lake is based on Arrow Lake S.
   
+  GCC now supports the Intel CPU named Panther Lake through
+-march=pantherlake.
+Based on Arrow Lake S, the switch further enables the PREFETCHI ISA
+extensions.
+  
 
 
 
-- 
2.31.1

[PATCH v1] LoongArch: Fix vfrint-releated comments in lsxintrin.h and lasxintrin.h

[Chenghui Pan]

The comment of vfrint-related intrinsic functions does not match the return
value type in definition. This patch fixes these comments.

gcc/ChangeLog:

* config/loongarch/lasxintrin.h (__lasx_xvftintrnel_l_s): Fix comments.
(__lasx_xvfrintrne_s): Ditto.
(__lasx_xvfrintrne_d): Ditto.
(__lasx_xvfrintrz_s): Ditto.
(__lasx_xvfrintrz_d): Ditto.
(__lasx_xvfrintrp_s): Ditto.
(__lasx_xvfrintrp_d): Ditto.
(__lasx_xvfrintrm_s): Ditto.
(__lasx_xvfrintrm_d): Ditto.
* config/loongarch/lsxintrin.h (__lsx_vftintrneh_l_s): Ditto.
(__lsx_vfrintrne_s): Ditto.
(__lsx_vfrintrne_d): Ditto.
(__lsx_vfrintrz_s): Ditto.
(__lsx_vfrintrz_d): Ditto.
(__lsx_vfrintrp_s): Ditto.
(__lsx_vfrintrp_d): Ditto.
(__lsx_vfrintrm_s): Ditto.
(__lsx_vfrintrm_d): Ditto.
---
 gcc/config/loongarch/lasxintrin.h | 16 
 gcc/config/loongarch/lsxintrin.h  | 16 
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/gcc/config/loongarch/lasxintrin.h 
b/gcc/config/loongarch/lasxintrin.h
index d3937992746..7bce2c757f1 100644
--- a/gcc/config/loongarch/lasxintrin.h
+++ b/gcc/config/loongarch/lasxintrin.h
@@ -3368,7 +3368,7 @@ __m256i __lasx_xvftintrnel_l_s (__m256 _1)
 }
 
 /* Assembly instruction format:xd, xj.  */
-/* Data types in instruction templates:  V8SI, V8SF.  */
+/* Data types in instruction templates:  V8SF, V8SF.  */
 extern __inline __attribute__((__gnu_inline__, __always_inline__, 
__artificial__))
 __m256 __lasx_xvfrintrne_s (__m256 _1)
 {
@@ -3376,7 +3376,7 @@ __m256 __lasx_xvfrintrne_s (__m256 _1)
 }
 
 /* Assembly instruction format:xd, xj.  */
-/* Data types in instruction templates:  V4DI, V4DF.  */
+/* Data types in instruction templates:  V4DF, V4DF.  */
 extern __inline __attribute__((__gnu_inline__, __always_inline__, 
__artificial__))
 __m256d __lasx_xvfrintrne_d (__m256d _1)
 {
@@ -3384,7 +3384,7 @@ __m256d __lasx_xvfrintrne_d (__m256d _1)
 }
 
 /* Assembly instruction format:xd, xj.  */
-/* Data types in instruction templates:  V8SI, V8SF.  */
+/* Data types in instruction templates:  V8SF, V8SF.  */
 extern __inline __attribute__((__gnu_inline__, __always_inline__, 
__artificial__))
 __m256 __lasx_xvfrintrz_s (__m256 _1)
 {
@@ -3392,7 +3392,7 @@ __m256 __lasx_xvfrintrz_s (__m256 _1)
 }
 
 /* Assembly instruction format:xd, xj.  */
-/* Data types in instruction templates:  V4DI, V4DF.  */
+/* Data types in instruction templates:  V4DF, V4DF.  */
 extern __inline __attribute__((__gnu_inline__, __always_inline__, 
__artificial__))
 __m256d __lasx_xvfrintrz_d (__m256d _1)
 {
@@ -3400,7 +3400,7 @@ __m256d __lasx_xvfrintrz_d (__m256d _1)
 }
 
 /* Assembly instruction format:xd, xj.  */
-/* Data types in instruction templates:  V8SI, V8SF.  */
+/* Data types in instruction templates:  V8SF, V8SF.  */
 extern __inline __attribute__((__gnu_inline__, __always_inline__, 
__artificial__))
 __m256 __lasx_xvfrintrp_s (__m256 _1)
 {
@@ -3408,7 +3408,7 @@ __m256 __lasx_xvfrintrp_s (__m256 _1)
 }
 
 /* Assembly instruction format:xd, xj.  */
-/* Data types in instruction templates:  V4DI, V4DF.  */
+/* Data types in instruction templates:  V4DF, V4DF.  */
 extern __inline __attribute__((__gnu_inline__, __always_inline__, 
__artificial__))
 __m256d __lasx_xvfrintrp_d (__m256d _1)
 {
@@ -3416,7 +3416,7 @@ __m256d __lasx_xvfrintrp_d (__m256d _1)
 }
 
 /* Assembly instruction format:xd, xj.  */
-/* Data types in instruction templates:  V8SI, V8SF.  */
+/* Data types in instruction templates:  V8SF, V8SF.  */
 extern __inline __attribute__((__gnu_inline__, __always_inline__, 
__artificial__))
 __m256 __lasx_xvfrintrm_s (__m256 _1)
 {
@@ -3424,7 +3424,7 @@ __m256 __lasx_xvfrintrm_s (__m256 _1)
 }
 
 /* Assembly instruction format:xd, xj.  */
-/* Data types in instruction templates:  V4DI, V4DF.  */
+/* Data types in instruction templates:  V4DF, V4DF.  */
 extern __inline __attribute__((__gnu_inline__, __always_inline__, 
__artificial__))
 __m256d __lasx_xvfrintrm_d (__m256d _1)
 {
diff --git a/gcc/config/loongarch/lsxintrin.h b/gcc/config/loongarch/lsxintrin.h
index ec42069904d..29553c093fa 100644
--- a/gcc/config/loongarch/lsxintrin.h
+++ b/gcc/config/loongarch/lsxintrin.h
@@ -3412,7 +3412,7 @@ __m128i __lsx_vftintrneh_l_s (__m128 _1)
 }
 
 /* Assembly instruction format:vd, vj.  */
-/* Data types in instruction templates:  V4SI, V4SF.  */
+/* Data types in instruction templates:  V4SF, V4SF.  */
 extern __inline __attribute__((__gnu_inline__, __always_inline__, 
__artificial__))
 __m128 __lsx_vfrintrne_s (__m128 _1)
 {
@@ -3420,7 +3420,7 @@ __m128 __lsx_vfrintrne_s (__m128 _1)
 }
 
 /* Assembly instruction format:vd, vj.  */
-/* Data types in instruction templates:  V2DI, V2DF.  */
+/* Data types in instruction templates:  V2DF, V2DF.  */
 extern __inline __attribute__((__gnu_inline__, 

RE: RE: [PATCH v1] RISC-V: Bugfix for merging undefined tmp register in math

[Li, Pan2]

Committed, thanks Juzhe.

Pan

From: juzhe.zh...@rivai.ai 
Sent: Monday, October 23, 2023 9:44 AM
To: Li, Pan2 ; gcc-patches 
Cc: Wang, Yanzhang ; kito.cheng 
Subject: Re: RE: [PATCH v1] RISC-V: Bugfix for merging undefined tmp register 
in math

OK。 LGTM。


juzhe.zh...@rivai.ai

From: Li, Pan2
Date: 2023-10-23 09:42
To: juzhe.zh...@rivai.ai; 
gcc-patches
CC: Wang, Yanzhang; 
kito.cheng
Subject: RE: [PATCH v1] RISC-V: Bugfix for merging undefined tmp register in 
math
Yes, it is required by the second cvt. The unmasked elements keep the original 
values.

Pan

From: juzhe.zh...@rivai.ai 
mailto:juzhe.zh...@rivai.ai>>
Sent: Monday, October 23, 2023 9:35 AM
To: Li, Pan2 mailto:pan2...@intel.com>>; gcc-patches 
mailto:gcc-patches@gcc.gnu.org>>
Cc: Li, Pan2 mailto:pan2...@intel.com>>; Wang, Yanzhang 
mailto:yanzhang.w...@intel.com>>; kito.cheng 
mailto:kito.ch...@gmail.com>>
Subject: Re: [PATCH v1] RISC-V: Bugfix for merging undefined tmp register in 
math

UNARY_OP_TAMU_FRM_DYN = UNARY_OP_TAMU | FRM_DYN_P,
   UNARY_OP_TAMU_FRM_RUP = UNARY_OP_TAMU | FRM_RUP_P,
   UNARY_OP_TAMU_FRM_RDN = UNARY_OP_TAMU | FRM_RDN_P,

Are they still necessary ?

juzhe.zh...@rivai.ai

From: pan2.li
Date: 2023-10-23 09:26
To: gcc-patches
CC: juzhe.zhong; 
pan2.li; 
yanzhang.wang; 
kito.cheng
Subject: [PATCH v1] RISC-V: Bugfix for merging undefined tmp register in math
From: Pan Li mailto:pan2...@intel.com>>

For math function autovec, there will be one step like

rtx tmp = gen_reg_rtx (vec_int_mode);
emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);

The MU will leave the tmp (aka dest register) register unmasked elements
unchanged and it is undefined here. This patch would like to adjust the
MU to MA.

gcc/ChangeLog:

* config/riscv/riscv-protos.h (enum insn_type): Add new type
values.
* config/riscv/riscv-v.cc (emit_vec_cvt_x_f): Add undef merge
operand handling.
(expand_vec_ceil): Take MA instead of MU for tmp register.
(expand_vec_floor): Ditto.
(expand_vec_nearbyint): Ditto.
(expand_vec_rint): Ditto.
(expand_vec_round): Ditto.
(expand_vec_roundeven): Ditto.

Signed-off-by: Pan Li mailto:pan2...@intel.com>>
---
gcc/config/riscv/riscv-protos.h |  5 +
gcc/config/riscv/riscv-v.cc | 24 
2 files changed, 21 insertions(+), 8 deletions(-)

diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index f7a9a02f1f9..5dc97c2adc0 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -306,6 +306,11 @@ enum insn_type : unsigned int
   UNARY_OP_FRM_RMM = UNARY_OP | FRM_RMM_P,
   UNARY_OP_FRM_RUP = UNARY_OP | FRM_RUP_P,
   UNARY_OP_FRM_RDN = UNARY_OP | FRM_RDN_P,
+  UNARY_OP_TAMA_FRM_DYN = UNARY_OP_TAMA | FRM_DYN_P,
+  UNARY_OP_TAMA_FRM_RUP = UNARY_OP_TAMA | FRM_RUP_P,
+  UNARY_OP_TAMA_FRM_RDN = UNARY_OP_TAMA | FRM_RDN_P,
+  UNARY_OP_TAMA_FRM_RMM = UNARY_OP_TAMA | FRM_RMM_P,
+  UNARY_OP_TAMA_FRM_RNE = UNARY_OP_TAMA | FRM_RNE_P,
   UNARY_OP_TAMU_FRM_DYN = UNARY_OP_TAMU | FRM_DYN_P,
   UNARY_OP_TAMU_FRM_RUP = UNARY_OP_TAMU | FRM_RUP_P,
   UNARY_OP_TAMU_FRM_RDN = UNARY_OP_TAMU | FRM_RDN_P,
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index 383af55fe3a..91ad6a61fa8 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -4108,10 +4108,18 @@ static void
emit_vec_cvt_x_f (rtx op_dest, rtx op_src, rtx mask,
  insn_type type, machine_mode vec_mode)
{
-  rtx cvt_x_ops[] = {op_dest, mask, op_dest, op_src};
   insn_code icode = code_for_pred_fcvt_x_f (UNSPEC_VFCVT, vec_mode);
-  emit_vlmax_insn (icode, type, cvt_x_ops);
+  if (type & USE_VUNDEF_MERGE_P)
+{
+  rtx cvt_x_ops[] = {op_dest, mask, op_src};
+  emit_vlmax_insn (icode, type, cvt_x_ops);
+}
+  else
+{
+  rtx cvt_x_ops[] = {op_dest, mask, op_dest, op_src};
+  emit_vlmax_insn (icode, type, cvt_x_ops);
+}
}
static void
@@ -4157,7 +4165,7 @@ expand_vec_ceil (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
   /* Step-3: Convert to integer on mask, with rounding up (aka ceil).  */
   rtx tmp = gen_reg_rtx (vec_int_mode);
-  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_RUP, vec_fp_mode);
+  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMA_FRM_RUP, vec_fp_mode);
   /* Step-4: Convert to floating-point on mask for the final result.
  To avoid unnecessary frm register access, we use RUP here and it will
@@ -4182,7 +4190,7 @@ expand_vec_floor (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
   /* Step-3: Convert to integer on mask, with rounding 

Re: [PATCH] RISC-V: Prohibit combination of 'E' and 'H'

[Jeff Law]

On 10/21/23 19:33, Tsukasa OI wrote:



Hmm, I generally agree with your opinion and I made a board file for
DejaGnu (running qemu-riscv64) to run "make check-gcc
RUNTESTFLAGS='--target_board=riscv-sim riscv.exp'" because it already
contains many execute tests (and annoys me if I don't do that).

What I'm not sure is, what kind of regression tests we need?

(In my mind)
Level 1: Make nearly empty program with specific -march (and optionally
  -mabi?) and make sure that it works.
Level 2: Make a program with inline assembly and execute tests with
  specific configurations (with specific -march and -mabi)
  [I'm not sure how to write **and optionally execute tests**]

I would like to hear your thoughts.
So I don't think we need to do a large matrix of extensions or anything 
like that.  Whatever config you usually build should be sufficient.


What most folks do is a make -k check before/after their patch and 
compare the results.  That's the standard.


If you change a target independent file, then the standard would be to 
bootstrap and regression test on x86 or similar primary architecture.


Jeff

Go patch committed: Remove the traverse_assignments code

[Ian Lance Taylor]

This patch to the Go frontend removes the traverse_assignments
support.  The last caller was removed in https://go.dev/cl/18261 in
2016.  Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu.
Committed to mainline.

Ian
a6e74b0b3316f3f0b2096d6a175c31bed58ae4ed
diff --git a/gcc/go/gofrontend/MERGE b/gcc/go/gofrontend/MERGE
index d31fb336e41..398d2671b64 100644
--- a/gcc/go/gofrontend/MERGE
+++ b/gcc/go/gofrontend/MERGE
@@ -1,4 +1,4 @@
-75b08794cb1485c955d13784c53a89174764af55
+c201fa2a684ada551ca9a0825a3075a0a69498de
 
 The first line of this file holds the git revision number of the last
 merge done from the gofrontend repository.
diff --git a/gcc/go/gofrontend/statements.cc b/gcc/go/gofrontend/statements.cc
index b43f1393e33..91c7627a0e3 100644
--- a/gcc/go/gofrontend/statements.cc
+++ b/gcc/go/gofrontend/statements.cc
@@ -64,16 +64,6 @@ Statement::traverse_contents(Traverse* traverse)
   return this->do_traverse(traverse);
 }
 
-// Traverse assignments.
-
-bool
-Statement::traverse_assignments(Traverse_assignments* tassign)
-{
-  if (this->classification_ == STATEMENT_ERROR)
-return false;
-  return this->do_traverse_assignments(tassign);
-}
-
 // Traverse an expression in a statement.  This is a helper function
 // for child classes.
 
@@ -288,17 +278,6 @@ Variable_declaration_statement::do_traverse(Traverse*)
   return TRAVERSE_CONTINUE;
 }
 
-// Traverse the assignments in a variable declaration.  Note that this
-// traversal is different from the usual traversal.
-
-bool
-Variable_declaration_statement::do_traverse_assignments(
-Traverse_assignments* tassign)
-{
-  tassign->initialize_variable(this->var_);
-  return true;
-}
-
 // Lower the variable's initialization expression.
 
 Statement*
@@ -510,17 +489,6 @@ Temporary_statement::do_traverse(Traverse* traverse)
 return this->traverse_expression(traverse, >init_);
 }
 
-// Traverse assignments.
-
-bool
-Temporary_statement::do_traverse_assignments(Traverse_assignments* tassign)
-{
-  if (this->init_ == NULL)
-return false;
-  tassign->value(>init_, true, true);
-  return true;
-}
-
 // Determine types.
 
 void
@@ -889,13 +857,6 @@ Assignment_statement::do_traverse(Traverse* traverse)
   return this->traverse_expression(traverse, >rhs_);
 }
 
-bool
-Assignment_statement::do_traverse_assignments(Traverse_assignments* tassign)
-{
-  tassign->assignment(>lhs_, >rhs_);
-  return true;
-}
-
 // Lower an assignment to a map index expression to a runtime function
 // call.  Mark some slice assignments as not requiring a write barrier.
 
@@ -1212,10 +1173,6 @@ class Assignment_operation_statement : public Statement
   int
   do_traverse(Traverse*);
 
-  bool
-  do_traverse_assignments(Traverse_assignments*)
-  { go_unreachable(); }
-
   Statement*
   do_lower(Gogo*, Named_object*, Block*, Statement_inserter*);
 
@@ -1365,10 +1322,6 @@ class Tuple_assignment_statement : public Statement
   int
   do_traverse(Traverse* traverse);
 
-  bool
-  do_traverse_assignments(Traverse_assignments*)
-  { go_unreachable(); }
-
   Statement*
   do_lower(Gogo*, Named_object*, Block*, Statement_inserter*);
 
@@ -1511,10 +1464,6 @@ public:
   int
   do_traverse(Traverse* traverse);
 
-  bool
-  do_traverse_assignments(Traverse_assignments*)
-  { go_unreachable(); }
-
   Statement*
   do_lower(Gogo*, Named_object*, Block*, Statement_inserter*);
 
@@ -1719,10 +1668,6 @@ class Tuple_receive_assignment_statement : public 
Statement
   int
   do_traverse(Traverse* traverse);
 
-  bool
-  do_traverse_assignments(Traverse_assignments*)
-  { go_unreachable(); }
-
   Statement*
   do_lower(Gogo*, Named_object*, Block*, Statement_inserter*);
 
@@ -1862,10 +1807,6 @@ class Tuple_type_guard_assignment_statement : public 
Statement
   int
   do_traverse(Traverse*);
 
-  bool
-  do_traverse_assignments(Traverse_assignments*)
-  { go_unreachable(); }
-
   Statement*
   do_lower(Gogo*, Named_object*, Block*, Statement_inserter*);
 
@@ -2277,10 +2218,6 @@ class Inc_dec_statement : public Statement
   do_traverse(Traverse* traverse)
   { return this->traverse_expression(traverse, >expr_); }
 
-  bool
-  do_traverse_assignments(Traverse_assignments*)
-  { go_unreachable(); }
-
   Statement*
   do_lower(Gogo*, Named_object*, Block*, Statement_inserter*);
 
@@ -2412,18 +2349,6 @@ Thunk_statement::do_traverse(Traverse* traverse)
   return this->traverse_expression(traverse, >call_);
 }
 
-// We implement traverse_assignment for a thunk statement because it
-// effectively copies the function call.
-
-bool
-Thunk_statement::do_traverse_assignments(Traverse_assignments* tassign)
-{
-  Expression* fn = this->call_->call_expression()->fn();
-  Expression* fn2 = fn;
-  tassign->value(, true, false);
-  return true;
-}
-
 // Determine types in a thunk statement.
 
 void
@@ -3148,23 +3073,6 @@ Statement::make_defer_statement(Call_expression* call,
 
 // Class Return_statement.
 
-// Traverse assignments.  We treat each return value as a top level
-// RHS in an expression.
-
-bool

Go patch committed: Remove name_ field from Type_switch_statement

[Ian Lance Taylor]

This patch to the Go frontend removes the name_ field from the
Type_switch_statement class.  It's not used for anything.
Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu.  Committed
to mainline.

Ian
1a1fba1e25779247a4969789885ce80b7b4a2359
diff --git a/gcc/go/gofrontend/MERGE b/gcc/go/gofrontend/MERGE
index 28683d6852b..d31fb336e41 100644
--- a/gcc/go/gofrontend/MERGE
+++ b/gcc/go/gofrontend/MERGE
@@ -1,4 +1,4 @@
-06ada1f2ab9b05e54641438db28c557c6900b2a3
+75b08794cb1485c955d13784c53a89174764af55
 
 The first line of this file holds the git revision number of the last
 merge done from the gofrontend repository.
diff --git a/gcc/go/gofrontend/parse.cc b/gcc/go/gofrontend/parse.cc
index c93d82bba39..d7410588347 100644
--- a/gcc/go/gofrontend/parse.cc
+++ b/gcc/go/gofrontend/parse.cc
@@ -4932,7 +4932,7 @@ Parse::type_switch_body(Label* label, const Type_switch& 
type_switch,
 }
 
   Type_switch_statement* statement =
-  Statement::make_type_switch_statement(var_name, init, location);
+  Statement::make_type_switch_statement(init, location);
   this->push_break_statement(statement, label);
 
   Type_case_clauses* case_clauses = new Type_case_clauses();
diff --git a/gcc/go/gofrontend/statements.cc b/gcc/go/gofrontend/statements.cc
index 33b568e3eeb..b43f1393e33 100644
--- a/gcc/go/gofrontend/statements.cc
+++ b/gcc/go/gofrontend/statements.cc
@@ -5046,8 +5046,6 @@ 
Type_switch_statement::do_dump_statement(Ast_dump_context* ast_dump_context)
 {
   ast_dump_context->print_indent();
   ast_dump_context->ostream() << "switch ";
-  if (!this->name_.empty())
-ast_dump_context->ostream() << this->name_ << " = ";
   ast_dump_context->dump_expression(this->expr_);
   ast_dump_context->ostream() << " .(type)";
   if (ast_dump_context->dump_subblocks())
@@ -5062,10 +5060,9 @@ 
Type_switch_statement::do_dump_statement(Ast_dump_context* ast_dump_context)
 // Make a type switch statement.
 
 Type_switch_statement*
-Statement::make_type_switch_statement(const std::string& name, Expression* 
expr,
- Location location)
+Statement::make_type_switch_statement(Expression* expr, Location location)
 {
-  return new Type_switch_statement(name, expr, location);
+  return new Type_switch_statement(expr, location);
 }
 
 // Class Send_statement.
diff --git a/gcc/go/gofrontend/statements.h b/gcc/go/gofrontend/statements.h
index eb795c4b920..9ef63cb9a61 100644
--- a/gcc/go/gofrontend/statements.h
+++ b/gcc/go/gofrontend/statements.h
@@ -253,7 +253,7 @@ class Statement
 
   // Make a type switch statement.
   static Type_switch_statement*
-  make_type_switch_statement(const std::string&, Expression*, Location);
+  make_type_switch_statement(Expression*, Location);
 
   // Make a send statement.
   static Send_statement*
@@ -2191,10 +2191,9 @@ class Type_case_clauses
 class Type_switch_statement : public Statement
 {
  public:
-  Type_switch_statement(const std::string& name, Expression* expr,
-   Location location)
+  Type_switch_statement(Expression* expr, Location location)
 : Statement(STATEMENT_TYPE_SWITCH, location),
-  name_(name), expr_(expr), clauses_(NULL), break_label_(NULL)
+  expr_(expr), clauses_(NULL), break_label_(NULL)
   { }
 
   // Add the clauses.
@@ -2227,10 +2226,7 @@ class Type_switch_statement : public Statement
   do_may_fall_through() const;
 
  private:
-  // The name of the variable declared in the type switch guard.  Empty if 
there
-  // is no variable declared.
-  std::string name_;
-  // The expression we are switching on if there is no variable.
+  // The expression we are switching on.
   Expression* expr_;
   // The type case clauses.
   Type_case_clauses* clauses_;

Go patch committed: pass Gogo to more passes

[Ian Lance Taylor]

This patch to the G frontend passes a pointer to the Gogo IR to the
determine types pass and the type verification pass.  This is a
straight refactoring that does not change the compiler behavior.  This
is in preparation for future CLs that rearrange the pass ordering.

This introduces one new call to go_get_gogo, which will be removed in
a future CL.

Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu.  Committed
to mainline.

Ian
b513aa235d6e5d7e2a36ee789c60891fce873340
diff --git a/gcc/go/gofrontend/MERGE b/gcc/go/gofrontend/MERGE
index d24054e0d93..28683d6852b 100644
--- a/gcc/go/gofrontend/MERGE
+++ b/gcc/go/gofrontend/MERGE
@@ -1,4 +1,4 @@
-967a215d6419c3db58f8f59a0c252c458abce395
+06ada1f2ab9b05e54641438db28c557c6900b2a3
 
 The first line of this file holds the git revision number of the last
 merge done from the gofrontend repository.
diff --git a/gcc/go/gofrontend/expressions.cc b/gcc/go/gofrontend/expressions.cc
index d276bd811cc..273831fabf3 100644
--- a/gcc/go/gofrontend/expressions.cc
+++ b/gcc/go/gofrontend/expressions.cc
@@ -205,18 +205,18 @@ Expression::report_error(const char* msg)
 // child class.
 
 void
-Expression::determine_type(const Type_context* context)
+Expression::determine_type(Gogo* gogo, const Type_context* context)
 {
-  this->do_determine_type(context);
+  this->do_determine_type(gogo, context);
 }
 
 // Set types when there is no context.
 
 void
-Expression::determine_type_no_context()
+Expression::determine_type_no_context(Gogo* gogo)
 {
   Type_context context;
-  this->do_determine_type();
+  this->do_determine_type(gogo, );
 }
 
 // Return true if two expressions refer to the same variable or struct
@@ -842,7 +842,7 @@ class Error_expression : public Expression
   { return Type::make_error_type(); }
 
   void
-  do_determine_type(const Type_context*)
+  do_determine_type(Gogo*, const Type_context*)
   { }
 
   Expression*
@@ -897,7 +897,7 @@ Type_expression : public Expression
   { return this->type_; }
 
   void
-  do_determine_type(const Type_context*)
+  do_determine_type(Gogo*, const Type_context*)
   { }
 
   void
@@ -998,10 +998,10 @@ Var_expression::do_type()
 // Determine the type of a reference to a variable.
 
 void
-Var_expression::do_determine_type(const Type_context*)
+Var_expression::do_determine_type(Gogo* gogo, const Type_context*)
 {
   if (this->variable_->is_variable())
-this->variable_->var_value()->determine_type();
+this->variable_->var_value()->determine_type(gogo);
 }
 
 // Something takes the address of this variable.  This means that we
@@ -1303,9 +1303,10 @@ Set_and_use_temporary_expression::do_type()
 
 void
 Set_and_use_temporary_expression::do_determine_type(
+Gogo* gogo,
 const Type_context* context)
 {
-  this->expr_->determine_type(context);
+  this->expr_->determine_type(gogo, context);
 }
 
 // Take the address.
@@ -1378,7 +1379,7 @@ class Sink_expression : public Expression
   do_type();
 
   void
-  do_determine_type(const Type_context*);
+  do_determine_type(Gogo*, const Type_context*);
 
   Expression*
   do_copy()
@@ -1410,7 +1411,7 @@ Sink_expression::do_type()
 // Determine the type of a sink expression.
 
 void
-Sink_expression::do_determine_type(const Type_context* context)
+Sink_expression::do_determine_type(Gogo*, const Type_context* context)
 {
   if (context->type != NULL)
 this->type_ = context->type;
@@ -1805,7 +1806,7 @@ class Func_code_reference_expression : public Expression
   { return Type::make_pointer_type(Type::make_void_type()); }
 
   void
-  do_determine_type(const Type_context*)
+  do_determine_type(Gogo*, const Type_context*)
   { }
 
   Expression*
@@ -1983,7 +1984,7 @@ class Boolean_expression : public Expression
   do_type();
 
   void
-  do_determine_type(const Type_context*);
+  do_determine_type(Gogo*, const Type_context*);
 
   Expression*
   do_copy()
@@ -2035,7 +2036,7 @@ Boolean_expression::do_type()
 // Set the type from the context.
 
 void
-Boolean_expression::do_determine_type(const Type_context* context)
+Boolean_expression::do_determine_type(Gogo*, const Type_context* context)
 {
   if (this->type_ != NULL && !this->type_->is_abstract())
 ;
@@ -2108,7 +2109,7 @@ String_expression::do_type()
 // Set the type from the context.
 
 void
-String_expression::do_determine_type(const Type_context* context)
+String_expression::do_determine_type(Gogo*, const Type_context* context)
 {
   if (this->type_ != NULL && !this->type_->is_abstract())
 ;
@@ -2278,7 +2279,7 @@ class String_info_expression : public Expression
   do_type();
 
   void
-  do_determine_type(const Type_context*)
+  do_determine_type(Gogo*, const Type_context*)
   { go_unreachable(); }
 
   Expression*
@@ -2390,7 +2391,7 @@ class String_value_expression : public Expression
   { return Type::make_string_type(); }
 
   void
-  do_determine_type(const Type_context*)
+  do_determine_type(Gogo*, const Type_context*)
   { go_unreachable(); }
 
   Expression*
@@ -2499,7 +2500,7 @@ class Integer_expression : 

Re: RE: [PATCH v1] RISC-V: Bugfix for merging undefined tmp register in math

[juzhe.zh...@rivai.ai]

OK。 LGTM。



juzhe.zh...@rivai.ai
 
From: Li, Pan2
Date: 2023-10-23 09:42
To: juzhe.zh...@rivai.ai; gcc-patches
CC: Wang, Yanzhang; kito.cheng
Subject: RE: [PATCH v1] RISC-V: Bugfix for merging undefined tmp register in 
math
Yes, it is required by the second cvt. The unmasked elements keep the original 
values.
 
Pan
 
From: juzhe.zh...@rivai.ai  
Sent: Monday, October 23, 2023 9:35 AM
To: Li, Pan2 ; gcc-patches 
Cc: Li, Pan2 ; Wang, Yanzhang ; 
kito.cheng 
Subject: Re: [PATCH v1] RISC-V: Bugfix for merging undefined tmp register in 
math
 
UNARY_OP_TAMU_FRM_DYN = UNARY_OP_TAMU | FRM_DYN_P,
   UNARY_OP_TAMU_FRM_RUP = UNARY_OP_TAMU | FRM_RUP_P,
   UNARY_OP_TAMU_FRM_RDN = UNARY_OP_TAMU | FRM_RDN_P,
 
Are they still necessary ?


juzhe.zh...@rivai.ai
 
From: pan2.li
Date: 2023-10-23 09:26
To: gcc-patches
CC: juzhe.zhong; pan2.li; yanzhang.wang; kito.cheng
Subject: [PATCH v1] RISC-V: Bugfix for merging undefined tmp register in math
From: Pan Li 
 
For math function autovec, there will be one step like
 
rtx tmp = gen_reg_rtx (vec_int_mode);
emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);
 
The MU will leave the tmp (aka dest register) register unmasked elements
unchanged and it is undefined here. This patch would like to adjust the
MU to MA.
 
gcc/ChangeLog:
 
* config/riscv/riscv-protos.h (enum insn_type): Add new type
values.
* config/riscv/riscv-v.cc (emit_vec_cvt_x_f): Add undef merge
operand handling.
(expand_vec_ceil): Take MA instead of MU for tmp register.
(expand_vec_floor): Ditto.
(expand_vec_nearbyint): Ditto.
(expand_vec_rint): Ditto.
(expand_vec_round): Ditto.
(expand_vec_roundeven): Ditto.
 
Signed-off-by: Pan Li 
---
gcc/config/riscv/riscv-protos.h |  5 +
gcc/config/riscv/riscv-v.cc | 24 
2 files changed, 21 insertions(+), 8 deletions(-)
 
diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index f7a9a02f1f9..5dc97c2adc0 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -306,6 +306,11 @@ enum insn_type : unsigned int
   UNARY_OP_FRM_RMM = UNARY_OP | FRM_RMM_P,
   UNARY_OP_FRM_RUP = UNARY_OP | FRM_RUP_P,
   UNARY_OP_FRM_RDN = UNARY_OP | FRM_RDN_P,
+  UNARY_OP_TAMA_FRM_DYN = UNARY_OP_TAMA | FRM_DYN_P,
+  UNARY_OP_TAMA_FRM_RUP = UNARY_OP_TAMA | FRM_RUP_P,
+  UNARY_OP_TAMA_FRM_RDN = UNARY_OP_TAMA | FRM_RDN_P,
+  UNARY_OP_TAMA_FRM_RMM = UNARY_OP_TAMA | FRM_RMM_P,
+  UNARY_OP_TAMA_FRM_RNE = UNARY_OP_TAMA | FRM_RNE_P,
   UNARY_OP_TAMU_FRM_DYN = UNARY_OP_TAMU | FRM_DYN_P,
   UNARY_OP_TAMU_FRM_RUP = UNARY_OP_TAMU | FRM_RUP_P,
   UNARY_OP_TAMU_FRM_RDN = UNARY_OP_TAMU | FRM_RDN_P,
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index 383af55fe3a..91ad6a61fa8 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -4108,10 +4108,18 @@ static void
emit_vec_cvt_x_f (rtx op_dest, rtx op_src, rtx mask,
  insn_type type, machine_mode vec_mode)
{
-  rtx cvt_x_ops[] = {op_dest, mask, op_dest, op_src};
   insn_code icode = code_for_pred_fcvt_x_f (UNSPEC_VFCVT, vec_mode);
-  emit_vlmax_insn (icode, type, cvt_x_ops);
+  if (type & USE_VUNDEF_MERGE_P)
+{
+  rtx cvt_x_ops[] = {op_dest, mask, op_src};
+  emit_vlmax_insn (icode, type, cvt_x_ops);
+}
+  else
+{
+  rtx cvt_x_ops[] = {op_dest, mask, op_dest, op_src};
+  emit_vlmax_insn (icode, type, cvt_x_ops);
+}
}
static void
@@ -4157,7 +4165,7 @@ expand_vec_ceil (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
   /* Step-3: Convert to integer on mask, with rounding up (aka ceil).  */
   rtx tmp = gen_reg_rtx (vec_int_mode);
-  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_RUP, vec_fp_mode);
+  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMA_FRM_RUP, vec_fp_mode);
   /* Step-4: Convert to floating-point on mask for the final result.
  To avoid unnecessary frm register access, we use RUP here and it will
@@ -4182,7 +4190,7 @@ expand_vec_floor (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
   /* Step-3: Convert to integer on mask, with rounding down (aka floor).  */
   rtx tmp = gen_reg_rtx (vec_int_mode);
-  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_RDN, vec_fp_mode);
+  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMA_FRM_RDN, vec_fp_mode);
   /* Step-4: Convert to floating-point on mask for the floor result.  */
   emit_vec_cvt_f_x (op_0, tmp, mask, UNARY_OP_TAMU_FRM_RDN, vec_fp_mode);
@@ -4208,7 +4216,7 @@ expand_vec_nearbyint (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
   /* Step-4: Convert to integer on mask, with rounding down (aka nearbyint).  
*/
   rtx tmp = gen_reg_rtx (vec_int_mode);
-  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);
+  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMA_FRM_DYN, vec_fp_mode);
   /* Step-5: Convert to floating-point on mask for the nearbyint result.  */
   emit_vec_cvt_f_x (op_0, tmp, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);
@@ -4233,7 +4241,7 @@ expand_vec_rint (rtx op_0, rtx op_1, 

RE: [PATCH v1] RISC-V: Bugfix for merging undefined tmp register in math

[Li, Pan2]

Yes, it is required by the second cvt. The unmasked elements keep the original 
values.

Pan

From: juzhe.zh...@rivai.ai 
Sent: Monday, October 23, 2023 9:35 AM
To: Li, Pan2 ; gcc-patches 
Cc: Li, Pan2 ; Wang, Yanzhang ; 
kito.cheng 
Subject: Re: [PATCH v1] RISC-V: Bugfix for merging undefined tmp register in 
math

UNARY_OP_TAMU_FRM_DYN = UNARY_OP_TAMU | FRM_DYN_P,
   UNARY_OP_TAMU_FRM_RUP = UNARY_OP_TAMU | FRM_RUP_P,
   UNARY_OP_TAMU_FRM_RDN = UNARY_OP_TAMU | FRM_RDN_P,

Are they still necessary ?

juzhe.zh...@rivai.ai

From: pan2.li
Date: 2023-10-23 09:26
To: gcc-patches
CC: juzhe.zhong; 
pan2.li; 
yanzhang.wang; 
kito.cheng
Subject: [PATCH v1] RISC-V: Bugfix for merging undefined tmp register in math
From: Pan Li mailto:pan2...@intel.com>>

For math function autovec, there will be one step like

rtx tmp = gen_reg_rtx (vec_int_mode);
emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);

The MU will leave the tmp (aka dest register) register unmasked elements
unchanged and it is undefined here. This patch would like to adjust the
MU to MA.

gcc/ChangeLog:

* config/riscv/riscv-protos.h (enum insn_type): Add new type
values.
* config/riscv/riscv-v.cc (emit_vec_cvt_x_f): Add undef merge
operand handling.
(expand_vec_ceil): Take MA instead of MU for tmp register.
(expand_vec_floor): Ditto.
(expand_vec_nearbyint): Ditto.
(expand_vec_rint): Ditto.
(expand_vec_round): Ditto.
(expand_vec_roundeven): Ditto.

Signed-off-by: Pan Li mailto:pan2...@intel.com>>
---
gcc/config/riscv/riscv-protos.h |  5 +
gcc/config/riscv/riscv-v.cc | 24 
2 files changed, 21 insertions(+), 8 deletions(-)

diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index f7a9a02f1f9..5dc97c2adc0 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -306,6 +306,11 @@ enum insn_type : unsigned int
   UNARY_OP_FRM_RMM = UNARY_OP | FRM_RMM_P,
   UNARY_OP_FRM_RUP = UNARY_OP | FRM_RUP_P,
   UNARY_OP_FRM_RDN = UNARY_OP | FRM_RDN_P,
+  UNARY_OP_TAMA_FRM_DYN = UNARY_OP_TAMA | FRM_DYN_P,
+  UNARY_OP_TAMA_FRM_RUP = UNARY_OP_TAMA | FRM_RUP_P,
+  UNARY_OP_TAMA_FRM_RDN = UNARY_OP_TAMA | FRM_RDN_P,
+  UNARY_OP_TAMA_FRM_RMM = UNARY_OP_TAMA | FRM_RMM_P,
+  UNARY_OP_TAMA_FRM_RNE = UNARY_OP_TAMA | FRM_RNE_P,
   UNARY_OP_TAMU_FRM_DYN = UNARY_OP_TAMU | FRM_DYN_P,
   UNARY_OP_TAMU_FRM_RUP = UNARY_OP_TAMU | FRM_RUP_P,
   UNARY_OP_TAMU_FRM_RDN = UNARY_OP_TAMU | FRM_RDN_P,
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index 383af55fe3a..91ad6a61fa8 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -4108,10 +4108,18 @@ static void
emit_vec_cvt_x_f (rtx op_dest, rtx op_src, rtx mask,
  insn_type type, machine_mode vec_mode)
{
-  rtx cvt_x_ops[] = {op_dest, mask, op_dest, op_src};
   insn_code icode = code_for_pred_fcvt_x_f (UNSPEC_VFCVT, vec_mode);
-  emit_vlmax_insn (icode, type, cvt_x_ops);
+  if (type & USE_VUNDEF_MERGE_P)
+{
+  rtx cvt_x_ops[] = {op_dest, mask, op_src};
+  emit_vlmax_insn (icode, type, cvt_x_ops);
+}
+  else
+{
+  rtx cvt_x_ops[] = {op_dest, mask, op_dest, op_src};
+  emit_vlmax_insn (icode, type, cvt_x_ops);
+}
}
static void
@@ -4157,7 +4165,7 @@ expand_vec_ceil (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
   /* Step-3: Convert to integer on mask, with rounding up (aka ceil).  */
   rtx tmp = gen_reg_rtx (vec_int_mode);
-  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_RUP, vec_fp_mode);
+  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMA_FRM_RUP, vec_fp_mode);
   /* Step-4: Convert to floating-point on mask for the final result.
  To avoid unnecessary frm register access, we use RUP here and it will
@@ -4182,7 +4190,7 @@ expand_vec_floor (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
   /* Step-3: Convert to integer on mask, with rounding down (aka floor).  */
   rtx tmp = gen_reg_rtx (vec_int_mode);
-  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_RDN, vec_fp_mode);
+  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMA_FRM_RDN, vec_fp_mode);
   /* Step-4: Convert to floating-point on mask for the floor result.  */
   emit_vec_cvt_f_x (op_0, tmp, mask, UNARY_OP_TAMU_FRM_RDN, vec_fp_mode);
@@ -4208,7 +4216,7 @@ expand_vec_nearbyint (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
   /* Step-4: Convert to integer on mask, with rounding down (aka nearbyint).  
*/
   rtx tmp = gen_reg_rtx (vec_int_mode);
-  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);
+  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMA_FRM_DYN, vec_fp_mode);
   /* Step-5: Convert to floating-point on mask for the nearbyint result.  */
   emit_vec_cvt_f_x (op_0, tmp, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);
@@ -4233,7 

Re: [PATCH v1] RISC-V: Bugfix for merging undefined tmp register in math

[juzhe.zh...@rivai.ai]

UNARY_OP_TAMU_FRM_DYN = UNARY_OP_TAMU | FRM_DYN_P,
   UNARY_OP_TAMU_FRM_RUP = UNARY_OP_TAMU | FRM_RUP_P,
   UNARY_OP_TAMU_FRM_RDN = UNARY_OP_TAMU | FRM_RDN_P,

Are they still necessary ?


juzhe.zh...@rivai.ai
 
From: pan2.li
Date: 2023-10-23 09:26
To: gcc-patches
CC: juzhe.zhong; pan2.li; yanzhang.wang; kito.cheng
Subject: [PATCH v1] RISC-V: Bugfix for merging undefined tmp register in math
From: Pan Li 
 
For math function autovec, there will be one step like
 
rtx tmp = gen_reg_rtx (vec_int_mode);
emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);
 
The MU will leave the tmp (aka dest register) register unmasked elements
unchanged and it is undefined here. This patch would like to adjust the
MU to MA.
 
gcc/ChangeLog:
 
* config/riscv/riscv-protos.h (enum insn_type): Add new type
values.
* config/riscv/riscv-v.cc (emit_vec_cvt_x_f): Add undef merge
operand handling.
(expand_vec_ceil): Take MA instead of MU for tmp register.
(expand_vec_floor): Ditto.
(expand_vec_nearbyint): Ditto.
(expand_vec_rint): Ditto.
(expand_vec_round): Ditto.
(expand_vec_roundeven): Ditto.
 
Signed-off-by: Pan Li 
---
gcc/config/riscv/riscv-protos.h |  5 +
gcc/config/riscv/riscv-v.cc | 24 
2 files changed, 21 insertions(+), 8 deletions(-)
 
diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index f7a9a02f1f9..5dc97c2adc0 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -306,6 +306,11 @@ enum insn_type : unsigned int
   UNARY_OP_FRM_RMM = UNARY_OP | FRM_RMM_P,
   UNARY_OP_FRM_RUP = UNARY_OP | FRM_RUP_P,
   UNARY_OP_FRM_RDN = UNARY_OP | FRM_RDN_P,
+  UNARY_OP_TAMA_FRM_DYN = UNARY_OP_TAMA | FRM_DYN_P,
+  UNARY_OP_TAMA_FRM_RUP = UNARY_OP_TAMA | FRM_RUP_P,
+  UNARY_OP_TAMA_FRM_RDN = UNARY_OP_TAMA | FRM_RDN_P,
+  UNARY_OP_TAMA_FRM_RMM = UNARY_OP_TAMA | FRM_RMM_P,
+  UNARY_OP_TAMA_FRM_RNE = UNARY_OP_TAMA | FRM_RNE_P,
   UNARY_OP_TAMU_FRM_DYN = UNARY_OP_TAMU | FRM_DYN_P,
   UNARY_OP_TAMU_FRM_RUP = UNARY_OP_TAMU | FRM_RUP_P,
   UNARY_OP_TAMU_FRM_RDN = UNARY_OP_TAMU | FRM_RDN_P,
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index 383af55fe3a..91ad6a61fa8 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -4108,10 +4108,18 @@ static void
emit_vec_cvt_x_f (rtx op_dest, rtx op_src, rtx mask,
  insn_type type, machine_mode vec_mode)
{
-  rtx cvt_x_ops[] = {op_dest, mask, op_dest, op_src};
   insn_code icode = code_for_pred_fcvt_x_f (UNSPEC_VFCVT, vec_mode);
-  emit_vlmax_insn (icode, type, cvt_x_ops);
+  if (type & USE_VUNDEF_MERGE_P)
+{
+  rtx cvt_x_ops[] = {op_dest, mask, op_src};
+  emit_vlmax_insn (icode, type, cvt_x_ops);
+}
+  else
+{
+  rtx cvt_x_ops[] = {op_dest, mask, op_dest, op_src};
+  emit_vlmax_insn (icode, type, cvt_x_ops);
+}
}
static void
@@ -4157,7 +4165,7 @@ expand_vec_ceil (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
   /* Step-3: Convert to integer on mask, with rounding up (aka ceil).  */
   rtx tmp = gen_reg_rtx (vec_int_mode);
-  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_RUP, vec_fp_mode);
+  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMA_FRM_RUP, vec_fp_mode);
   /* Step-4: Convert to floating-point on mask for the final result.
  To avoid unnecessary frm register access, we use RUP here and it will
@@ -4182,7 +4190,7 @@ expand_vec_floor (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
   /* Step-3: Convert to integer on mask, with rounding down (aka floor).  */
   rtx tmp = gen_reg_rtx (vec_int_mode);
-  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_RDN, vec_fp_mode);
+  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMA_FRM_RDN, vec_fp_mode);
   /* Step-4: Convert to floating-point on mask for the floor result.  */
   emit_vec_cvt_f_x (op_0, tmp, mask, UNARY_OP_TAMU_FRM_RDN, vec_fp_mode);
@@ -4208,7 +4216,7 @@ expand_vec_nearbyint (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
   /* Step-4: Convert to integer on mask, with rounding down (aka nearbyint).  
*/
   rtx tmp = gen_reg_rtx (vec_int_mode);
-  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);
+  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMA_FRM_DYN, vec_fp_mode);
   /* Step-5: Convert to floating-point on mask for the nearbyint result.  */
   emit_vec_cvt_f_x (op_0, tmp, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);
@@ -4233,7 +4241,7 @@ expand_vec_rint (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
   /* Step-3: Convert to integer on mask, with dyn rounding (aka rint).  */
   rtx tmp = gen_reg_rtx (vec_int_mode);
-  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);
+  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMA_FRM_DYN, vec_fp_mode);
   /* Step-4: Convert to floating-point on mask for the rint result.  */
   emit_vec_cvt_f_x (op_0, tmp, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);
@@ -4255,7 +4263,7 @@ expand_vec_round (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
   /* Step-3: Convert 

Re: [PATCH-1v4, expand] Enable vector mode for compare_by_pieces [PR111449]

[HAO CHEN GUI]

Committed as r14-4835.

https://gcc.gnu.org/g:f08ca5903c7a02b450b93143467f70b9fd8e0085

Thanks
Gui Haochen

在 2023/10/20 16:49, Richard Sandiford 写道:
> HAO CHEN GUI  writes:
>> Hi,
>>   Vector mode instructions are efficient for compare on some targets.
>> This patch enables vector mode for compare_by_pieces. Two help
>> functions are added to check if vector mode is available for certain
>> by pieces operations and if if optabs exists for the mode and certain
>> by pieces operations. One member is added in class op_by_pieces_d to
>> record the type of operations.
>>
>>   The test case is in the second patch which is rs6000 specific.
>>
>>   Compared to last version, the main change is to add a target hook
>> check - scalar_mode_supported_p when retrieving the available scalar
>> modes. The mode which is not supported for a target should be skipped.
>> (e.g. TImode on ppc). Also some function names and comments are refined
>> according to reviewer's advice.
>>
>>   Bootstrapped and tested on x86 and powerpc64-linux BE and LE with no
>> regressions.
>>
>> Thanks
>> Gui Haochen
>>
>> ChangeLog
>> Expand: Enable vector mode for by pieces compares
>>
>> Vector mode compare instructions are efficient for equality compare on
>> rs6000. This patch refactors the codes of by pieces operation to enable
>> vector mode for compare.
>>
>> gcc/
>>  PR target/111449
>>  * expr.cc (can_use_qi_vectors): New function to return true if
>>  we know how to implement OP using vectors of bytes.
>>  (qi_vector_mode_supported_p): New function to check if optabs
>>  exists for the mode and certain by pieces operations.
>>  (widest_fixed_size_mode_for_size): Replace the second argument
>>  with the type of by pieces operations.  Call can_use_qi_vectors
>>  and qi_vector_mode_supported_p to do the check.  Call
>>  scalar_mode_supported_p to check if the scalar mode is supported.
>>  (by_pieces_ninsns): Pass the type of by pieces operation to
>>  widest_fixed_size_mode_for_size.
>>  (class op_by_pieces_d): Remove m_qi_vector_mode.  Add m_op to
>>  record the type of by pieces operations.
>>  (op_by_pieces_d::op_by_pieces_d): Change last argument to the
>>  type of by pieces operations, initialize m_op with it.  Pass
>>  m_op to function widest_fixed_size_mode_for_size.
>>  (op_by_pieces_d::get_usable_mode): Pass m_op to function
>>  widest_fixed_size_mode_for_size.
>>  (op_by_pieces_d::smallest_fixed_size_mode_for_size): Call
>>  can_use_qi_vectors and qi_vector_mode_supported_p to do the
>>  check.
>>  (op_by_pieces_d::run): Pass m_op to function
>>  widest_fixed_size_mode_for_size.
>>  (move_by_pieces_d::move_by_pieces_d): Set m_op to MOVE_BY_PIECES.
>>  (store_by_pieces_d::store_by_pieces_d): Set m_op with the op.
>>  (can_store_by_pieces): Pass the type of by pieces operations to
>>  widest_fixed_size_mode_for_size.
>>  (clear_by_pieces): Initialize class store_by_pieces_d with
>>  CLEAR_BY_PIECES.
>>  (compare_by_pieces_d::compare_by_pieces_d): Set m_op to
>>  COMPARE_BY_PIECES.
> 
> OK, thanks.  And thanks for your patience.
> 
> Richard
> 
>> patch.diff
>> diff --git a/gcc/expr.cc b/gcc/expr.cc
>> index 2c9930ec674..ad5f9dd8ec2 100644
>> --- a/gcc/expr.cc
>> +++ b/gcc/expr.cc
>> @@ -988,18 +988,44 @@ alignment_for_piecewise_move (unsigned int max_pieces, 
>> unsigned int align)
>>return align;
>>  }
>>
>> -/* Return the widest QI vector, if QI_MODE is true, or integer mode
>> -   that is narrower than SIZE bytes.  */
>> +/* Return true if we know how to implement OP using vectors of bytes.  */
>> +static bool
>> +can_use_qi_vectors (by_pieces_operation op)
>> +{
>> +  return (op == COMPARE_BY_PIECES
>> +  || op == SET_BY_PIECES
>> +  || op == CLEAR_BY_PIECES);
>> +}
>> +
>> +/* Return true if optabs exists for the mode and certain by pieces
>> +   operations.  */
>> +static bool
>> +qi_vector_mode_supported_p (fixed_size_mode mode, by_pieces_operation op)
>> +{
>> +  if ((op == SET_BY_PIECES || op == CLEAR_BY_PIECES)
>> +  && optab_handler (vec_duplicate_optab, mode) != CODE_FOR_nothing)
>> +return true;
>> +
>> +  if (op == COMPARE_BY_PIECES
>> +  && optab_handler (mov_optab, mode) != CODE_FOR_nothing
>> +  && can_compare_p (EQ, mode, ccp_jump))
>> +return true;
>>
>> +  return false;
>> +}
>> +
>> +/* Return the widest mode that can be used to perform part of an
>> +   operation OP on SIZE bytes.  Try to use QI vector modes where
>> +   possible.  */
>>  static fixed_size_mode
>> -widest_fixed_size_mode_for_size (unsigned int size, bool qi_vector)
>> +widest_fixed_size_mode_for_size (unsigned int size, by_pieces_operation op)
>>  {
>>fixed_size_mode result = NARROWEST_INT_MODE;
>>
>>gcc_checking_assert (size > 1);
>>
>>/* Use QI vector only if size is wider than a WORD.  */
>> -  if (qi_vector && size > UNITS_PER_WORD)
>> +  if (can_use_qi_vectors (op) && size 

Re:[pushed] [PATCH] LoongArch: Define macro CLEAR_INSN_CACHE.

[chenglulu]

Pushed to r14-4836.

在 2023/10/20 下午3:15, Lulu Cheng 写道:

LoongArch's microstructure ensures cache consistency by hardware.
Due to out-of-order execution, ibar is required to ensure the visibility of the
store (invalidated icache) executed by this CPU before ibar (to the instance).
ibar will not invalidate the icache, so the start and end parameters are not 
Affect
ibar performance.

gcc/ChangeLog:

* config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition.
---
  gcc/config/loongarch/loongarch.h | 3 +++
  1 file changed, 3 insertions(+)

diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h
index 22912018a0d..0c15c79bc4c 100644
--- a/gcc/config/loongarch/loongarch.h
+++ b/gcc/config/loongarch/loongarch.h
@@ -1239,3 +1239,6 @@ struct GTY (()) machine_function
  
  #define TARGET_EXPLICIT_RELOCS \

(la_opt_explicit_relocs == EXPLICIT_RELOCS_ALWAYS)
+
+#undef  CLEAR_INSN_CACHE
+#define CLEAR_INSN_CACHE(beg, end) __builtin_loongarch_ibar (0)

[PATCH v1] RISC-V: Bugfix for merging undefined tmp register in math

[pan2 . li]

From: Pan Li 

For math function autovec, there will be one step like

rtx tmp = gen_reg_rtx (vec_int_mode);
emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);

The MU will leave the tmp (aka dest register) register unmasked elements
unchanged and it is undefined here. This patch would like to adjust the
MU to MA.

gcc/ChangeLog:

* config/riscv/riscv-protos.h (enum insn_type): Add new type
values.
* config/riscv/riscv-v.cc (emit_vec_cvt_x_f): Add undef merge
operand handling.
(expand_vec_ceil): Take MA instead of MU for tmp register.
(expand_vec_floor): Ditto.
(expand_vec_nearbyint): Ditto.
(expand_vec_rint): Ditto.
(expand_vec_round): Ditto.
(expand_vec_roundeven): Ditto.

Signed-off-by: Pan Li 
---
 gcc/config/riscv/riscv-protos.h |  5 +
 gcc/config/riscv/riscv-v.cc | 24 
 2 files changed, 21 insertions(+), 8 deletions(-)

diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index f7a9a02f1f9..5dc97c2adc0 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -306,6 +306,11 @@ enum insn_type : unsigned int
   UNARY_OP_FRM_RMM = UNARY_OP | FRM_RMM_P,
   UNARY_OP_FRM_RUP = UNARY_OP | FRM_RUP_P,
   UNARY_OP_FRM_RDN = UNARY_OP | FRM_RDN_P,
+  UNARY_OP_TAMA_FRM_DYN = UNARY_OP_TAMA | FRM_DYN_P,
+  UNARY_OP_TAMA_FRM_RUP = UNARY_OP_TAMA | FRM_RUP_P,
+  UNARY_OP_TAMA_FRM_RDN = UNARY_OP_TAMA | FRM_RDN_P,
+  UNARY_OP_TAMA_FRM_RMM = UNARY_OP_TAMA | FRM_RMM_P,
+  UNARY_OP_TAMA_FRM_RNE = UNARY_OP_TAMA | FRM_RNE_P,
   UNARY_OP_TAMU_FRM_DYN = UNARY_OP_TAMU | FRM_DYN_P,
   UNARY_OP_TAMU_FRM_RUP = UNARY_OP_TAMU | FRM_RUP_P,
   UNARY_OP_TAMU_FRM_RDN = UNARY_OP_TAMU | FRM_RDN_P,
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index 383af55fe3a..91ad6a61fa8 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -4108,10 +4108,18 @@ static void
 emit_vec_cvt_x_f (rtx op_dest, rtx op_src, rtx mask,
  insn_type type, machine_mode vec_mode)
 {
-  rtx cvt_x_ops[] = {op_dest, mask, op_dest, op_src};
   insn_code icode = code_for_pred_fcvt_x_f (UNSPEC_VFCVT, vec_mode);
 
-  emit_vlmax_insn (icode, type, cvt_x_ops);
+  if (type & USE_VUNDEF_MERGE_P)
+{
+  rtx cvt_x_ops[] = {op_dest, mask, op_src};
+  emit_vlmax_insn (icode, type, cvt_x_ops);
+}
+  else
+{
+  rtx cvt_x_ops[] = {op_dest, mask, op_dest, op_src};
+  emit_vlmax_insn (icode, type, cvt_x_ops);
+}
 }
 
 static void
@@ -4157,7 +4165,7 @@ expand_vec_ceil (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
 
   /* Step-3: Convert to integer on mask, with rounding up (aka ceil).  */
   rtx tmp = gen_reg_rtx (vec_int_mode);
-  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_RUP, vec_fp_mode);
+  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMA_FRM_RUP, vec_fp_mode);
 
   /* Step-4: Convert to floating-point on mask for the final result.
  To avoid unnecessary frm register access, we use RUP here and it will
@@ -4182,7 +4190,7 @@ expand_vec_floor (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
 
   /* Step-3: Convert to integer on mask, with rounding down (aka floor).  */
   rtx tmp = gen_reg_rtx (vec_int_mode);
-  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_RDN, vec_fp_mode);
+  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMA_FRM_RDN, vec_fp_mode);
 
   /* Step-4: Convert to floating-point on mask for the floor result.  */
   emit_vec_cvt_f_x (op_0, tmp, mask, UNARY_OP_TAMU_FRM_RDN, vec_fp_mode);
@@ -4208,7 +4216,7 @@ expand_vec_nearbyint (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
 
   /* Step-4: Convert to integer on mask, with rounding down (aka nearbyint).  
*/
   rtx tmp = gen_reg_rtx (vec_int_mode);
-  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);
+  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMA_FRM_DYN, vec_fp_mode);
 
   /* Step-5: Convert to floating-point on mask for the nearbyint result.  */
   emit_vec_cvt_f_x (op_0, tmp, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);
@@ -4233,7 +4241,7 @@ expand_vec_rint (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
 
   /* Step-3: Convert to integer on mask, with dyn rounding (aka rint).  */
   rtx tmp = gen_reg_rtx (vec_int_mode);
-  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);
+  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMA_FRM_DYN, vec_fp_mode);
 
   /* Step-4: Convert to floating-point on mask for the rint result.  */
   emit_vec_cvt_f_x (op_0, tmp, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode);
@@ -4255,7 +4263,7 @@ expand_vec_round (rtx op_0, rtx op_1, machine_mode 
vec_fp_mode,
 
   /* Step-3: Convert to integer on mask, rounding to nearest (aka round).  */
   rtx tmp = gen_reg_rtx (vec_int_mode);
-  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_RMM, vec_fp_mode);
+  emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMA_FRM_RMM, vec_fp_mode);
 
   /* Step-4: Convert to 

RE: [PATCH v4] libgfortran: Replace mutex with rwlock

[Zhu, Lipeng]

> 
> > Hi Thomas,
> >
> > >
> > > Hi Lipeng,
> > >
> > > > May I know any comment or concern on this patch, thanks for your
> > > > time
> > > > 
> > >
> > > Thanks for your patience in getting this reviewed.
> > >
> > > A few remarks / questions.
> > >
> > > Which strategy is used in this implementation, read-preferring or
> > > write- preferring?  And if read-preferring is used, is there a
> > > danger of deadlock if people do unreasonable things?
> > > Maybe you could explain that, also in a comment in the code.
> > >
> >
> > Yes, the implementation use the read-preferring strategy, and comments
> > in code.
> > When adding the test cases, I didn’t meet the situation which may
> > cause the deadlock.
> > Maybe you can give more guidance about that.
> >
> > > Can you add some sort of torture test case(s) which does a lot of
> > > opening/closing/reading/writing, possibly with asynchronous I/O
> > > and/or pthreads, to catch possible problems?  If there is a system
> > > dependency or some race condition, chances are that regression testers
> will catch this.
> > >
> >
> > Sure, as your comments, in the patch V6, I added 3 test cases with
> > OpenMP to test different cases in concurrency respectively:
> > 1. find and create unit very frequently to stress read lock and write lock.
> > 2. only access the unit which exist in cache to stress read lock.
> > 3. access the same unit in concurrency.
> > For the third test case, it also help to find a bug:  When unit can't
> > be found in cache nor unit list in read phase, then threads will try
> > to acquire write lock to insert the same unit, this will cause duplicate key
> error.
> > To fix this bug, I get the unit from unit list once again before insert in 
> > write
> lock.
> > More details you can refer the patch v6.
> >
> 
> Could you help to review this update? I really appreciate your assistance.
> 

Hi Thomas, Bernhard,

Could you help to review this update?  Any concern will be appreciated.

Regards,
Lipeng Zhu
> > > With this, the libgfortran parts are OK, unless somebody else has
> > > more comments, so give this a couple of days.  I cannot approve the
> > > libgcc parts, that would be somebody else (Jakub?)
> > >
> > > Best regards
> > >
> > >   Thomas
> > >
> >
> > Best Regards,
> > Lipeng Zhu
> 
> Best Regards,
> Lipeng Zhu

Re: [PATCH 2/5] LoongArch: Use explicit relocs for GOT access when -mexplicit-relocs=auto and LTO during a final link with linker plugin

[chenglulu]

在 2023/10/21 下午4:42, Xi Ruoyao 写道:

On Sat, 2023-10-21 at 15:32 +0800, chenglulu wrote:

+  /* If we are performing LTO for a final link, and we have the linker
+ plugin so we know the resolution of the symbols, then all GOT
+ references are binding to external symbols or preemptable symbols.
+ So the linker cannot relax them.  */
+  return (in_lto_p
+     && !flag_incremental_link

I don’t quite understand this condition "!flag_incremental_link". Can
you explain it? Others LGTM.

Thanks.

If we have two (or several) .o files containing LTO bytecode, GCC
supports "LTO incremental linking" with:

gcc a.o b.o -o ab.o -O2 -flto -flinker-output=nolto-rel

The resulted ab.o will include data and code in a.o and b.o, but it
contains machine code instead of LTO bytecode.  Now if ab.o refers to an
external symbol c, the linker may relax "la.global c" to "la.local c"
(if ab.o is linked together with another file c.o which contains the
definition of c) or not.  As we cannot exclude the possibility of a
relaxation on la.global for incremental linking, just emit la.global and
let the linker to do the correct thing.


I have no problem, thank you!

[PATCH 2/5] Support for CodeView debugging format

[Mark Harmstone]

This patch and the following add initial support for Microsoft's
CodeView debugging format, as used by MSVC, to mingw targets.

Note that you will need a recent version of binutils for this to be
useful. The best way to view the output is to run Microsoft's
cvdump.exe, found in their microsoft-pdb repo on GitHub, against the
object files.
---
 gcc/Makefile.in   |  2 +
 gcc/config/i386/cygming.h |  2 +
 gcc/dwarf2codeview.cc | 50 +++
 gcc/dwarf2codeview.h  | 30 +++
 gcc/dwarf2out.cc  |  4 ++
 gcc/flag-types.h  |  3 ++
 gcc/flags.h   |  4 ++
 gcc/opts.cc   | 23 +++--
 .../gcc.dg/debug/codeview/codeview-1.c|  6 +++
 .../gcc.dg/debug/codeview/codeview.exp| 48 ++
 gcc/toplev.cc |  4 ++
 11 files changed, 171 insertions(+), 5 deletions(-)
 create mode 100644 gcc/dwarf2codeview.cc
 create mode 100644 gcc/dwarf2codeview.h
 create mode 100644 gcc/testsuite/gcc.dg/debug/codeview/codeview-1.c
 create mode 100644 gcc/testsuite/gcc.dg/debug/codeview/codeview.exp

diff --git a/gcc/Makefile.in b/gcc/Makefile.in
index a25a1e32fbc..d011946379d 100644
--- a/gcc/Makefile.in
+++ b/gcc/Makefile.in
@@ -1428,6 +1428,7 @@ OBJS = \
dumpfile.o \
dwarf2asm.o \
dwarf2cfi.o \
+   dwarf2codeview.o \
dwarf2ctf.o \
dwarf2out.o \
early-remat.o \
@@ -2794,6 +2795,7 @@ GTFILES = $(CPPLIB_H) $(srcdir)/input.h 
$(srcdir)/coretypes.h \
   $(srcdir)/dwarf2out.h \
   $(srcdir)/dwarf2asm.cc \
   $(srcdir)/dwarf2cfi.cc \
+  $(srcdir)/dwarf2codeview.cc \
   $(srcdir)/dwarf2ctf.cc \
   $(srcdir)/dwarf2out.cc \
   $(srcdir)/ctfc.h \
diff --git a/gcc/config/i386/cygming.h b/gcc/config/i386/cygming.h
index d539f8d0699..a141462133b 100644
--- a/gcc/config/i386/cygming.h
+++ b/gcc/config/i386/cygming.h
@@ -20,6 +20,8 @@ along with GCC; see the file COPYING3.  If not see
 
 #define DWARF2_DEBUGGING_INFO 1
 
+#define CODEVIEW_DEBUGGING_INFO 1
+
 #undef PREFERRED_DEBUGGING_TYPE
 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
 
diff --git a/gcc/dwarf2codeview.cc b/gcc/dwarf2codeview.cc
new file mode 100644
index 000..e2bfdf8efeb
--- /dev/null
+++ b/gcc/dwarf2codeview.cc
@@ -0,0 +1,50 @@
+/* Generate CodeView debugging info from the GCC DWARF.
+   Copyright (C) 2023 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.  */
+
+/* See gas/codeview.h in binutils for more about the constants and structs
+   listed below.  References to Microsoft files refer to Microsoft's PDB
+   repository: https://github.com/microsoft/microsoft-pdb.  */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "target.h"
+#include "output.h"
+#include "errors.h"
+#include "md5.h"
+#include "function.h"
+#include "version.h"
+#include "tree.h"
+#include "langhooks.h"
+#include "dwarf2out.h"
+#include "dwarf2codeview.h"
+
+#define CV_SIGNATURE_C13   4
+
+/* Finish CodeView debug info emission.  */
+
+void
+codeview_debug_finish (void)
+{
+  targetm.asm_out.named_section (".debug$S", SECTION_DEBUG, NULL);
+
+  fputs (integer_asm_op (4, false), asm_out_file);
+  fprint_whex (asm_out_file, CV_SIGNATURE_C13);
+  putc ('\n', asm_out_file);
+}
diff --git a/gcc/dwarf2codeview.h b/gcc/dwarf2codeview.h
new file mode 100644
index 000..efda148eb49
--- /dev/null
+++ b/gcc/dwarf2codeview.h
@@ -0,0 +1,30 @@
+/* dwarf2codeview.h - DWARF interface for CodeView generation.
+   Copyright (C) 2023 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.  */
+
+#ifndef GCC_DWARF2CODEVIEW_H
+#define 

[PATCH 4/5] Output line numbers in CodeView section

[Mark Harmstone]

Outputs the DEBUG_S_LINES block in the CodeView .debug$S section, which
maps between line numbers and addresses.

You'll need a fairly recent version of GAS for the .secidx directive to
be recognized.
---
 gcc/dwarf2codeview.cc | 303 ++
 gcc/dwarf2codeview.h  |   3 +
 gcc/dwarf2out.cc  |   9 ++
 gcc/opts.cc   |   2 +-
 4 files changed, 316 insertions(+), 1 deletion(-)

diff --git a/gcc/dwarf2codeview.cc b/gcc/dwarf2codeview.cc
index d93ba1ed668..4dfc0300177 100644
--- a/gcc/dwarf2codeview.cc
+++ b/gcc/dwarf2codeview.cc
@@ -37,11 +37,15 @@ along with GCC; see the file COPYING3.  If not see
 
 #define CV_SIGNATURE_C13   4
 
+#define DEBUG_S_LINES  0xf2
 #define DEBUG_S_STRINGTABLE 0xf3
 #define DEBUG_S_FILECHKSMS  0xf4
 
 #define CHKSUM_TYPE_MD51
 
+#define LINE_LABEL "Lcvline"
+#define END_FUNC_LABEL "Lcvendfunc"
+
 #define HASH_SIZE 16
 
 struct codeview_string
@@ -89,11 +93,128 @@ struct codeview_source_file
   uint8_t hash[HASH_SIZE];
 };
 
+struct codeview_line
+{
+  codeview_line *next;
+  unsigned int line_no;
+  unsigned int label_num;
+};
+
+struct codeview_line_block
+{
+  codeview_line_block *next;
+  uint32_t file_id;
+  unsigned int num_lines;
+  codeview_line *lines, *last_line;
+};
+
+struct codeview_function
+{
+  codeview_function *next;
+  function *func;
+  unsigned int end_label;
+  codeview_line_block *blocks, *last_block;
+};
+
+static unsigned int line_label_num;
+static unsigned int func_label_num;
 static codeview_source_file *files, *last_file;
 static unsigned int num_files;
 static uint32_t string_offset = 1;
 static hash_table *strings_htab;
 static codeview_string *strings, *last_string;
+static codeview_function *funcs, *last_func;
+static const char* last_filename;
+static uint32_t last_file_id;
+
+/* Record new line number against the current function.  */
+
+void
+codeview_source_line (unsigned int line_no, const char *filename)
+{
+  codeview_line *l;
+  uint32_t file_id = last_file_id;
+  unsigned int label_num = ++line_label_num;
+
+  targetm.asm_out.internal_label (asm_out_file, LINE_LABEL, label_num);
+
+  if (!last_func || last_func->func != cfun)
+{
+  codeview_function *f = (codeview_function *)
+   xmalloc (sizeof (codeview_function));
+
+  f->next = NULL;
+  f->func = cfun;
+  f->end_label = 0;
+  f->blocks = f->last_block = NULL;
+
+  if (!funcs)
+   funcs = f;
+  else
+   last_func->next = f;
+
+  last_func = f;
+}
+
+  if (filename != last_filename)
+{
+  codeview_source_file *sf = files;
+
+  while (sf)
+   {
+ if (!strcmp (sf->filename, filename))
+   {
+ /* 0x18 is the size of the checksum entry for each file.
+0x6 bytes for the header, plus 0x10 bytes for the hash,
+then padded to a multiple of 4.  */
+
+ file_id = sf->file_num * 0x18;
+ last_filename = filename;
+ last_file_id = file_id;
+ break;
+   }
+
+ sf = sf->next;
+   }
+}
+
+  if (!last_func->last_block || last_func->last_block->file_id != file_id)
+{
+  codeview_line_block *b;
+
+  b = (codeview_line_block *) xmalloc (sizeof (codeview_line_block));
+
+  b->next = NULL;
+  b->file_id = file_id;
+  b->num_lines = 0;
+  b->lines = b->last_line = NULL;
+
+  if (!last_func->blocks)
+   last_func->blocks = b;
+  else
+   last_func->last_block->next = b;
+
+  last_func->last_block = b;
+}
+
+  if (last_func->last_block->last_line
+&& last_func->last_block->last_line->line_no == line_no)
+return;
+
+  l = (codeview_line *) xmalloc (sizeof (codeview_line));
+
+  l->next = NULL;
+  l->line_no = line_no;
+  l->label_num = label_num;
+
+  if (!last_func->last_block->lines)
+last_func->last_block->lines = l;
+  else
+last_func->last_block->last_line->next = l;
+
+  last_func->last_block->last_line = l;
+  last_func->last_block->num_lines++;
+}
 
 /* Adds string to the string table, returning its offset.  If already present,
this returns the offset of the existing string.  */
@@ -288,6 +409,187 @@ write_source_files (void)
   asm_fprintf (asm_out_file, "%LLcv_filechksms_end:\n");
 }
 
+/* Write out the line number information for each function into the
+   .debug$S section.  */
+
+static void
+write_line_numbers (void)
+{
+  unsigned int func_num = 0;
+
+  while (funcs)
+{
+  codeview_function *next = funcs->next;
+  unsigned int first_label_num;
+
+  fputs (integer_asm_op (4, false), asm_out_file);
+  fprint_whex (asm_out_file, DEBUG_S_LINES);
+  putc ('\n', asm_out_file);
+
+  fputs (integer_asm_op (4, false), asm_out_file);
+  asm_fprintf (asm_out_file, "%LLcv_lines%u_end - %LLcv_lines%u_start\n",
+  func_num, func_num);
+
+  asm_fprintf (asm_out_file, 

[PATCH 3/5] Output file checksums in CodeView section

[Mark Harmstone]

Outputs the file name and MD5 hash of the main source file into the
CodeView .debug$S section, along with that of any #include'd files.
---
 gcc/dwarf2codeview.cc | 254 ++
 gcc/dwarf2codeview.h  |   1 +
 gcc/dwarf2out.cc  |   3 +
 3 files changed, 258 insertions(+)

diff --git a/gcc/dwarf2codeview.cc b/gcc/dwarf2codeview.cc
index e2bfdf8efeb..d93ba1ed668 100644
--- a/gcc/dwarf2codeview.cc
+++ b/gcc/dwarf2codeview.cc
@@ -37,6 +37,257 @@ along with GCC; see the file COPYING3.  If not see
 
 #define CV_SIGNATURE_C13   4
 
+#define DEBUG_S_STRINGTABLE 0xf3
+#define DEBUG_S_FILECHKSMS  0xf4
+
+#define CHKSUM_TYPE_MD51
+
+#define HASH_SIZE 16
+
+struct codeview_string
+{
+  codeview_string *next;
+  uint32_t offset;
+  char *string;
+};
+
+struct string_hasher : free_ptr_hash 
+{
+  typedef const char *compare_type;
+
+  static hashval_t hash (const codeview_string *x)
+  {
+return htab_hash_string (x->string);
+  }
+
+  static bool equal (const codeview_string *x, const char *y)
+  {
+return !strcmp (x->string, y);
+  }
+
+  static void mark_empty (codeview_string *x)
+  {
+if (x->string)
+  {
+   free (x->string);
+   x->string = NULL;
+  }
+  }
+
+  static void remove (codeview_string *)
+  {
+free (x->string);
+  }
+};
+
+struct codeview_source_file
+{
+  codeview_source_file *next;
+  unsigned int file_num;
+  uint32_t string_offset;
+  char *filename;
+  uint8_t hash[HASH_SIZE];
+};
+
+static codeview_source_file *files, *last_file;
+static unsigned int num_files;
+static uint32_t string_offset = 1;
+static hash_table *strings_htab;
+static codeview_string *strings, *last_string;
+
+/* Adds string to the string table, returning its offset.  If already present,
+   this returns the offset of the existing string.  */
+
+static uint32_t
+add_string (const char *string)
+{
+  codeview_string **slot;
+  codeview_string *s;
+  size_t len;
+
+  if (!strings_htab)
+strings_htab = new hash_table (10);
+
+  slot = strings_htab->find_slot_with_hash (string, htab_hash_string (string),
+   INSERT);
+
+  if (*slot)
+return (*slot)->offset;
+
+  s = (codeview_string *) xmalloc (sizeof (codeview_string));
+  len = strlen (string);
+
+  s->next = NULL;
+
+  s->offset = string_offset;
+  string_offset += len + 1;
+
+  s->string = xstrdup (string);
+
+  if (last_string)
+last_string->next = s;
+  else
+strings = s;
+
+  last_string = s;
+
+  *slot = s;
+
+  return s->offset;
+}
+
+/* A new source file has been encountered - record the details and calculate
+   its hash.  */
+
+void
+codeview_start_source_file (const char *filename)
+{
+  codeview_source_file *sf;
+  char *path;
+  uint32_t string_offset;
+  FILE *f;
+
+  path = lrealpath (filename);
+  string_offset = add_string (path);
+  free (path);
+
+  sf = files;
+  while (sf)
+{
+  if (sf->string_offset == string_offset)
+   return;
+
+  sf = sf->next;
+}
+
+  sf = (codeview_source_file *) xmalloc (sizeof (codeview_source_file));
+  sf->next = NULL;
+  sf->file_num = num_files;
+  sf->string_offset = string_offset;
+  sf->filename = xstrdup (filename);
+
+  f = fopen (filename, "r");
+  if (!f)
+internal_error ("could not open %s for reading", filename);
+
+  if (md5_stream (f, sf->hash))
+{
+  fclose (f);
+  internal_error ("md5_stream failed");
+}
+
+  fclose (f);
+
+  if (last_file)
+last_file->next = sf;
+  else
+files = sf;
+
+  last_file = sf;
+  num_files++;
+}
+
+/* Write out the strings table into the .debug$S section.  The linker will
+   parse this, and handle the deduplication and hashing for all the object
+   files.  */
+
+static void
+write_strings_table (void)
+{
+  codeview_string *string;
+
+  fputs (integer_asm_op (4, false), asm_out_file);
+  fprint_whex (asm_out_file, DEBUG_S_STRINGTABLE);
+  putc ('\n', asm_out_file);
+
+  fputs (integer_asm_op (4, false), asm_out_file);
+  asm_fprintf (asm_out_file, "%LLcv_strings_end - %LLcv_strings_start\n");
+
+  asm_fprintf (asm_out_file, "%LLcv_strings_start:\n");
+
+  /* The first entry is always an empty string.  */
+  fputs (integer_asm_op (1, false), asm_out_file);
+  fprint_whex (asm_out_file, 0);
+  putc ('\n', asm_out_file);
+
+  string = strings;
+  while (string)
+{
+  ASM_OUTPUT_ASCII (asm_out_file, string->string,
+   strlen (string->string) + 1);
+
+  string = string->next;
+}
+
+  delete strings_htab;
+
+  asm_fprintf (asm_out_file, "%LLcv_strings_end:\n");
+
+  ASM_OUTPUT_ALIGN (asm_out_file, 2);
+}
+
+/* Write out the file checksums data into the .debug$S section.  */
+
+static void
+write_source_files (void)
+{
+  fputs (integer_asm_op (4, false), asm_out_file);
+  fprint_whex (asm_out_file, DEBUG_S_FILECHKSMS);
+  putc ('\n', asm_out_file);
+
+  fputs (integer_asm_op (4, false), asm_out_file);
+  asm_fprintf (asm_out_file,
+  

[PATCH 5/5] Output S_COMPILE3 symbol in CodeView debug section

[Mark Harmstone]

Outputs the S_COMPILE3 symbol in the CodeView .debug$S debug section.
The DEBUG_S_SYMBOLS block added here makes up pretty much everything
that isn't data structures or line numbers; we add the S_COMPILE3 symbol
here to start it off.

This is a descriptive bit, the most interesting part of which is the
version of the compiler used.
---
 gcc/dwarf2codeview.cc | 126 ++
 1 file changed, 126 insertions(+)

diff --git a/gcc/dwarf2codeview.cc b/gcc/dwarf2codeview.cc
index 4dfc0300177..a33be036951 100644
--- a/gcc/dwarf2codeview.cc
+++ b/gcc/dwarf2codeview.cc
@@ -37,14 +37,25 @@ along with GCC; see the file COPYING3.  If not see
 
 #define CV_SIGNATURE_C13   4
 
+#define DEBUG_S_SYMBOLS0xf1
 #define DEBUG_S_LINES  0xf2
 #define DEBUG_S_STRINGTABLE 0xf3
 #define DEBUG_S_FILECHKSMS  0xf4
 
 #define CHKSUM_TYPE_MD51
 
+#define S_COMPILE3 0x113c
+
+#define CV_CFL_80386   0x03
+#define CV_CFL_X64 0xD0
+
+#define CV_CFL_C   0x00
+#define CV_CFL_CXX 0x01
+
 #define LINE_LABEL "Lcvline"
 #define END_FUNC_LABEL "Lcvendfunc"
+#define SYMBOL_START_LABEL "Lcvsymstart"
+#define SYMBOL_END_LABEL   "Lcvsymend"
 
 #define HASH_SIZE 16
 
@@ -118,6 +129,7 @@ struct codeview_function
 
 static unsigned int line_label_num;
 static unsigned int func_label_num;
+static unsigned int sym_label_num;
 static codeview_source_file *files, *last_file;
 static unsigned int num_files;
 static uint32_t string_offset = 1;
@@ -590,6 +602,119 @@ codeview_end_epilogue (void)
 }
 }
 
+/* Return the CodeView constant for the selected architecture.  */
+
+static uint16_t
+target_processor (void)
+{
+  if (TARGET_64BIT)
+return CV_CFL_X64;
+  else
+return CV_CFL_80386;
+}
+
+/* Return the CodeView constant for the language being used.  */
+
+static uint32_t
+language_constant (void)
+{
+  const char *language_string = lang_hooks.name;
+
+  if (startswith (language_string, "GNU C++"))
+return CV_CFL_CXX;
+  else if (startswith (language_string, "GNU C"))
+return CV_CFL_C;
+
+  return 0;
+}
+
+/* Write a S_COMPILE3 symbol, which records the details of the compiler
+   being used.  */
+
+static void
+write_compile3_symbol (void)
+{
+  unsigned int label_num = ++sym_label_num;
+
+  static const char compiler_name[] = "GCC ";
+
+  /* This is struct COMPILESYM3 in binutils and Microsoft's cvinfo.h:
+
+ struct COMPILESYM3
+ {
+   uint16_t length;
+   uint16_t type;
+   uint32_t flags;
+   uint16_t machine;
+   uint16_t frontend_major;
+   uint16_t frontend_minor;
+   uint16_t frontend_build;
+   uint16_t frontend_qfe;
+   uint16_t backend_major;
+   uint16_t backend_minor;
+   uint16_t backend_build;
+   uint16_t backend_qfe;
+ } ATTRIBUTE_PACKED;
+  */
+
+  fputs (integer_asm_op (2, false), asm_out_file);
+  asm_fprintf (asm_out_file,
+  "%L" SYMBOL_END_LABEL "%u - %L" SYMBOL_START_LABEL "%u\n",
+  label_num, label_num);
+
+  targetm.asm_out.internal_label (asm_out_file, SYMBOL_START_LABEL, label_num);
+
+  fputs (integer_asm_op (2, false), asm_out_file);
+  fprint_whex (asm_out_file, S_COMPILE3);
+  putc ('\n', asm_out_file);
+
+  /* Microsoft has the flags as a bitfield, with the bottom 8 bits being the
+ language constant, and the reset being MSVC-specific stuff.  */
+  fputs (integer_asm_op (4, false), asm_out_file);
+  fprint_whex (asm_out_file, language_constant ());
+  putc ('\n', asm_out_file);
+
+  fputs (integer_asm_op (2, false), asm_out_file);
+  fprint_whex (asm_out_file, target_processor ());
+  putc ('\n', asm_out_file);
+
+  /* Write 8 uint16_ts for the frontend and backend versions.  As with GAS, we
+ zero these, as it's easier to record the version in the compiler
+ string.  */
+  for (unsigned int i = 0; i < 8; i++)
+{
+  fputs (integer_asm_op (2, false), asm_out_file);
+  fprint_whex (asm_out_file, 0);
+  putc ('\n', asm_out_file);
+}
+
+  ASM_OUTPUT_ASCII (asm_out_file, compiler_name, sizeof (compiler_name) - 1);
+  ASM_OUTPUT_ASCII (asm_out_file, version_string, strlen (version_string) + 1);
+
+  ASM_OUTPUT_ALIGN (asm_out_file, 2);
+
+  targetm.asm_out.internal_label (asm_out_file, SYMBOL_END_LABEL, label_num);
+}
+
+/* Write the CodeView symbols into the .debug$S section.  */
+
+static void
+write_codeview_symbols (void)
+{
+  fputs (integer_asm_op (4, false), asm_out_file);
+  fprint_whex (asm_out_file, DEBUG_S_SYMBOLS);
+  putc ('\n', asm_out_file);
+
+  fputs (integer_asm_op (4, false), asm_out_file);
+  asm_fprintf (asm_out_file, "%LLcv_syms_end - %LLcv_syms_start\n");
+
+  asm_fprintf (asm_out_file, "%LLcv_syms_start:\n");
+
+  write_compile3_symbol ();
+
+  asm_fprintf (asm_out_file, "%LLcv_syms_end:\n");
+}
+
 /* Finish CodeView debug info emission.  */
 
 void
@@ -604,4 +729,5 @@ codeview_debug_finish (void)
   write_strings_table ();
  

[PATCH 1/5] Remove obsolete debugging formats from names list

[Mark Harmstone]

STABS and xcoff have been removed, but are still in debug_type_names,
which ought to match debug_type_masks. This results in the following
minor bug with GCC 13:

$ x86_64-pc-linux-gnu-gcc -gvms -c tmp.c
cc1: error: target system does not support the ‘dwarf-2’ debug format
---
 gcc/opts.cc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/opts.cc b/gcc/opts.cc
index 573dcf8e497..8015cb7556a 100644
--- a/gcc/opts.cc
+++ b/gcc/opts.cc
@@ -50,7 +50,7 @@ static void set_Wstrict_aliasing (struct gcc_options *opts, 
int onoff);
 
 const char *const debug_type_names[] =
 {
-  "none", "stabs", "dwarf-2", "xcoff", "vms", "ctf", "btf"
+  "none", "dwarf-2", "vms", "ctf", "btf"
 };
 
 /* Bitmasks of fundamental debug info formats indexed by enum
@@ -65,7 +65,7 @@ static uint32_t debug_type_masks[] =
 /* Names of the set of debug formats requested by user.  Updated and accessed
via debug_set_names.  */
 
-static char df_set_names[sizeof "none stabs dwarf-2 xcoff vms ctf btf"];
+static char df_set_names[sizeof "none dwarf-2 vms ctf btf"];
 
 /* Get enum debug_info_type of the specified debug format, for error messages.
Can be used only for individual debug format types.  */
-- 
2.41.0

[PATCH] RISC-V: Fix AVL_TYPE attribute of tuple mode mov

[Juzhe-Zhong]

The tuple mode mov pattern doesn't have avl_type so it is invalid 
attribute.

gcc/ChangeLog:

* config/riscv/vector.md: Fix avl_type attribute of tuple mov.

---
 gcc/config/riscv/vector.md | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 32955fb8cf0..ef91950178f 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -1208,7 +1208,8 @@
 DONE;
   }
   [(set_attr "type" "vmov,vlde,vste")
-   (set_attr "mode" "")])
+   (set_attr "mode" "")
+   (set (attr "avl_type") (const_int INVALID_ATTRIBUTE))])
 
 ;; -
 ;;  VLS Moves Operations
-- 
2.36.3

[Committedv2] aarch64: [PR110986] Emit csinv again for `a ? ~b : b`

[Andrew Pinski]

After r14-3110-g7fb65f10285, the canonical form for
`a ? ~b : b` changed to be `-(a) ^ b` that means
for aarch64 we need to add a few new insn patterns
to be able to catch this and change it to be
what is the canonical form for the aarch64 backend.
A secondary pattern was needed to support a zero_extended
form too; this adds a testcase for all 3 cases.

Bootstrapped and tested on aarch64-linux-gnu with no regressions.

Committed as approved.

PR target/110986

gcc/ChangeLog:

* config/aarch64/aarch64.md (*cmov_insn_insv): New pattern.
(*cmov_uxtw_insn_insv): Likewise.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/cond_op-1.c: New test.
---
 gcc/config/aarch64/aarch64.md| 47 
 gcc/testsuite/gcc.target/aarch64/cond_op-1.c | 20 +
 2 files changed, 67 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/cond_op-1.c

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index e6af09c2e8b..5bb8c772be8 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -4413,6 +4413,53 @@ (define_insn "*csinv3_uxtw_insn3"
   [(set_attr "type" "csel")]
 )
 
+;; There are two canonical forms for `cmp ? ~a : a`.
+;; This is the second form and is here to help combine.
+;; Support `-(cmp) ^ a` into `cmp ? ~a : a`
+;; The second pattern is to support the zero extend'ed version.
+
+(define_insn_and_split "*cmov_insn_insv"
+  [(set (match_operand:GPI 0 "register_operand" "=r")
+(xor:GPI
+(neg:GPI
+ (match_operator:GPI 1 "aarch64_comparison_operator"
+  [(match_operand 2 "cc_register" "") (const_int 0)]))
+(match_operand:GPI 3 "general_operand" "r")))]
+  ""
+  "#"
+  "&& true"
+  [(set (match_dup 0)
+   (if_then_else:GPI (match_dup 1)
+ (not:GPI (match_dup 3))
+ (match_dup 3)))]
+  {
+/* After reload this will be a nop due to the constraint.  */
+operands[3] = force_reg (mode, operands[3]);
+  }
+  [(set_attr "type" "csel")]
+)
+
+(define_insn_and_split "*cmov_uxtw_insn_insv"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+(zero_extend:DI
+(xor:SI
+ (neg:SI
+  (match_operator:SI 1 "aarch64_comparison_operator"
+   [(match_operand 2 "cc_register" "") (const_int 0)]))
+ (match_operand:SI 3 "general_operand" "r"]
+  "can_create_pseudo_p ()"
+  "#"
+  "&& true"
+  [(set (match_dup 0)
+   (if_then_else:DI (match_dup 1)
+ (zero_extend:DI (not:SI (match_dup 3)))
+ (zero_extend:DI (match_dup 3]
+  {
+operands[3] = force_reg (SImode, operands[3]);
+  }
+  [(set_attr "type" "csel")]
+)
+
 ;; If X can be loaded by a single CNT[BHWD] instruction,
 ;;
 ;;A = UMAX (B, X)
diff --git a/gcc/testsuite/gcc.target/aarch64/cond_op-1.c 
b/gcc/testsuite/gcc.target/aarch64/cond_op-1.c
new file mode 100644
index 000..e6c7821127e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cond_op-1.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* PR target/110986 */
+
+
+long long full(unsigned a, unsigned b)
+{
+  return a ? ~b : b;
+}
+unsigned fuu(unsigned a, unsigned b)
+{
+  return a ? ~b : b;
+}
+long long f(unsigned long long a, unsigned long long b)
+{
+  return a ? ~b : b;
+}
+
+/* { dg-final { scan-assembler-times "csinv\tw\[0-9\]*" 2 } } */
+/* { dg-final { scan-assembler-times "csinv\tx\[0-9\]*" 1 } } */
-- 
2.39.3

[PATCH] Use error_mark_node after error in convert

[Andrew Pinski]

While working on PR c/111903, I Noticed that
convert will convert integer_zero_node to that
type after an error instead of returning error_mark_node.
>From what I can tell this was the old way of not having
error recovery since other places in this file does return
error_mark_node and the places I am replacing date from
when the file was imported into the repro (either via a gcc2 merge
or earlier).

I also had to update the objc front-end to allow for the error_mark_node
change, I suspect you could hit the ICE without this change though.

Bootstrapped and tested on x86_64-linux-gnu with no regressions.

gcc/ChangeLog:

* convert.cc (convert_to_pointer_1): Return error_mark_node
after an error.
(convert_to_real_1): Likewise.
(convert_to_integer_1): Likewise.
(convert_to_complex_1): Likewise.

gcc/objc/ChangeLog:

* objc-gnu-runtime-abi-01.cc (build_objc_method_call): Allow
for error_operand after call to build_c_cast.
* objc-next-runtime-abi-01.cc (build_objc_method_call): Likewise.
* objc-next-runtime-abi-02.cc (build_v2_build_objc_method_call): 
Likewise.
---
 gcc/convert.cc   | 12 ++--
 gcc/objc/objc-gnu-runtime-abi-01.cc  |  3 +++
 gcc/objc/objc-next-runtime-abi-01.cc |  3 +++
 gcc/objc/objc-next-runtime-abi-02.cc |  3 +++
 4 files changed, 15 insertions(+), 6 deletions(-)

diff --git a/gcc/convert.cc b/gcc/convert.cc
index 5357609d8f0..ac6af7026a7 100644
--- a/gcc/convert.cc
+++ b/gcc/convert.cc
@@ -96,7 +96,7 @@ convert_to_pointer_1 (tree type, tree expr, bool fold_p)
 
 default:
   error ("cannot convert to a pointer type");
-  return convert_to_pointer_1 (type, integer_zero_node, fold_p);
+  return error_mark_node;
 }
 }
 
@@ -332,11 +332,11 @@ convert_to_real_1 (tree type, tree expr, bool fold_p)
 case POINTER_TYPE:
 case REFERENCE_TYPE:
   error ("pointer value used where a floating-point was expected");
-  return convert_to_real_1 (type, integer_zero_node, fold_p);
+  return error_mark_node;
 
 default:
   error ("aggregate value used where a floating-point was expected");
-  return convert_to_real_1 (type, integer_zero_node, fold_p);
+  return error_mark_node;
 }
 }
 
@@ -959,7 +959,7 @@ convert_to_integer_1 (tree type, tree expr, bool dofold)
 
 default:
   error ("aggregate value used where an integer was expected");
-  return convert (type, integer_zero_node);
+  return error_mark_node;
 }
 }
 
@@ -1053,11 +1053,11 @@ convert_to_complex_1 (tree type, tree expr, bool fold_p)
 case POINTER_TYPE:
 case REFERENCE_TYPE:
   error ("pointer value used where a complex was expected");
-  return convert_to_complex_1 (type, integer_zero_node, fold_p);
+  return error_mark_node;
 
 default:
   error ("aggregate value used where a complex was expected");
-  return convert_to_complex_1 (type, integer_zero_node, fold_p);
+  return error_mark_node;
 }
 }
 
diff --git a/gcc/objc/objc-gnu-runtime-abi-01.cc 
b/gcc/objc/objc-gnu-runtime-abi-01.cc
index fbf8307297a..6f45283b307 100644
--- a/gcc/objc/objc-gnu-runtime-abi-01.cc
+++ b/gcc/objc/objc-gnu-runtime-abi-01.cc
@@ -700,6 +700,9 @@ build_objc_method_call (location_t loc, int super_flag, 
tree method_prototype,
 
   lookup_object = build_c_cast (loc, rcv_p, lookup_object);
 
+  if (error_operand_p (lookup_object))
+return error_mark_node;
+
   /* Use SAVE_EXPR to avoid evaluating the receiver twice.  */
   lookup_object = save_expr (lookup_object);
 
diff --git a/gcc/objc/objc-next-runtime-abi-01.cc 
b/gcc/objc/objc-next-runtime-abi-01.cc
index 70ab5262e17..9e28976043e 100644
--- a/gcc/objc/objc-next-runtime-abi-01.cc
+++ b/gcc/objc/objc-next-runtime-abi-01.cc
@@ -846,6 +846,9 @@ build_objc_method_call (location_t loc, int super_flag, 
tree method_prototype,
 
   lookup_object = build_c_cast (loc, rcv_p, lookup_object);
 
+  if (error_operand_p (lookup_object))
+return error_mark_node;
+
   /* Use SAVE_EXPR to avoid evaluating the receiver twice.  */
   lookup_object = save_expr (lookup_object);
 
diff --git a/gcc/objc/objc-next-runtime-abi-02.cc 
b/gcc/objc/objc-next-runtime-abi-02.cc
index 6548c0078e0..723b47c9cf6 100644
--- a/gcc/objc/objc-next-runtime-abi-02.cc
+++ b/gcc/objc/objc-next-runtime-abi-02.cc
@@ -1729,6 +1729,9 @@ build_v2_build_objc_method_call (int super, tree 
method_prototype,
 
   lookup_object = build_c_cast (loc, rcv_p, lookup_object);
 
+  if (error_operand_p (lookup_object))
+return error_mark_node;
+
   /* Use SAVE_EXPR to avoid evaluating the receiver twice.  */
   lookup_object = save_expr (lookup_object);
 
-- 
2.39.3

Re: Darwin: Replace environment runpath with embedded [PR88590]

[FX Coudert]

Thanks a lot Alexandre for the review!

FX

[committed] d: Merge upstream dmd f4be7f6f7b.

[Iain Buclaw]

Hi,

This patch merges the D front-end with upstream dmd f4be7f6f7b.

Synchronizing with the upstream development branch as of 2023-10-22.

D front-end changes:

- Fix bootstrap failure with i686-darwin9.
  ```
  Undefined symbols for architecture i386:
  "gendocfile", referenced from:
  __ZL20d_generate_ddoc_fileP6ModuleR9OutBuffer in d-lang.o
  ld: symbol(s) not found for architecture i386
  ```

Bootstrapped and regression tested on x86_64-linux-gnu/-m32, committed
to mainline.

Regards,
Iain.

---
gcc/d/ChangeLog:

* dmd/MERGE: Merge upstream dmd f4be7f6f7b.
* Make-lang.in (D_FRONTEND_OBJS): Rename d/root-rootobject.o to
d/rootobject.o.
---
 gcc/d/Make-lang.in|   2 +-
 gcc/d/dmd/MERGE   |   2 +-
 gcc/d/dmd/README.md   |   1 +
 gcc/d/dmd/arraytypes.d|   2 +-
 gcc/d/dmd/ast_node.d  |   2 +-
 gcc/d/dmd/blockexit.d |  20 +-
 gcc/d/dmd/cond.d  |   2 +-
 gcc/d/dmd/cppmangle.d |   2 +-
 gcc/d/dmd/declaration.d   |   2 +-
 gcc/d/dmd/dinterpret.d|  18 +-
 gcc/d/dmd/dmodule.d   |   2 +-
 gcc/d/dmd/doc.h   |   4 +-
 gcc/d/dmd/dscope.d|   6 -
 gcc/d/dmd/dsymbol.d   |   2 +-
 gcc/d/dmd/dsymbolsem.d|   8 +-
 gcc/d/dmd/dtemplate.d |   2 +-
 gcc/d/dmd/dtoh.d  |   2 +-
 gcc/d/dmd/escape.d|   2 +-
 gcc/d/dmd/expression.d| 284 +
 gcc/d/dmd/expression.h|   1 -
 gcc/d/dmd/expressionsem.d | 300 --
 gcc/d/dmd/foreachvar.d|   2 +-
 gcc/d/dmd/func.d  |  12 +-
 gcc/d/dmd/hdrgen.d|   2 +-
 gcc/d/dmd/identifier.d|   2 +-
 gcc/d/dmd/init.d  |   2 +-
 gcc/d/dmd/json.d  |   2 +-
 gcc/d/dmd/mtype.d |   2 +-
 gcc/d/dmd/mustuse.d   |  23 +-
 gcc/d/dmd/nogc.d  |   2 +-
 gcc/d/dmd/ob.d|   2 +-
 gcc/d/dmd/parse.d |   2 +-
 gcc/d/dmd/{root => }/rootobject.d |   8 +-
 gcc/d/dmd/semantic2.d |   2 +-
 gcc/d/dmd/semantic3.d |   2 +-
 gcc/d/dmd/sideeffect.d|  35 --
 gcc/d/dmd/statement.d |   2 +-
 gcc/d/dmd/statement.h |   3 -
 gcc/d/dmd/templateparamsem.d  |   2 +-
 gcc/d/dmd/traits.d|   2 +-
 gcc/d/dmd/transitivevisitor.d |   2 +-
 gcc/d/dmd/typesem.d   |   2 +-
 gcc/d/dmd/visitor.d   |   2 +-
 .../gdc.test/fail_compilation/fail3882.d  |  31 +-
 gcc/testsuite/gdc.test/runnable/issue24168.d  |  31 ++
 45 files changed, 375 insertions(+), 468 deletions(-)
 rename gcc/d/dmd/{root => }/rootobject.d (88%)
 create mode 100644 gcc/testsuite/gdc.test/runnable/issue24168.d

diff --git a/gcc/d/Make-lang.in b/gcc/d/Make-lang.in
index 264ae03a89e..b3007a96bd0 100644
--- a/gcc/d/Make-lang.in
+++ b/gcc/d/Make-lang.in
@@ -174,11 +174,11 @@ D_FRONTEND_OBJS = \
d/root-port.o \
d/root-region.o \
d/root-rmem.o \
-   d/root-rootobject.o \
d/root-speller.o \
d/root-string.o \
d/root-stringtable.o \
d/root-utf.o \
+   d/rootobject.o \
d/safe.o \
d/sapply.o \
d/semantic2.o \
diff --git a/gcc/d/dmd/MERGE b/gcc/d/dmd/MERGE
index 794600274a3..bfadeaa0c68 100644
--- a/gcc/d/dmd/MERGE
+++ b/gcc/d/dmd/MERGE
@@ -1,4 +1,4 @@
-4c18eed9674e04c1ca89fbc8bd5c4e483eb5477c
+f4be7f6f7bae75f1613b862940cdd533b5ae99b2
 
 The first line of this file holds the git revision number of the last
 merge done from the dlang/dmd repository.
diff --git a/gcc/d/dmd/README.md b/gcc/d/dmd/README.md
index d0c75a5b14a..f8ac00117eb 100644
--- a/gcc/d/dmd/README.md
+++ b/gcc/d/dmd/README.md
@@ -84,6 +84,7 @@
 | 
[astcodegen.d](https://github.com/dlang/dmd/blob/master/compiler/src/dmd/astcodegen.d)
 | Namespace of AST nodes of a AST ready for code generation   |
 | 
[astenums.d](https://github.com/dlang/dmd/blob/master/compiler/src/dmd/astenums.d)
 | Enums common to DMD and AST |
 | 
[expression.d](https://github.com/dlang/dmd/blob/master/compiler/src/dmd/expression.d)
 | Define expression AST nodes |
+| 
[rootobject.d](https://github.com/dlang/dmd/blob/master/compiler/src/dmd/rootobject.d)
 | 

[pushed] objc++: type/expr tsubst conflation [PR111920]

[Patrick Palka]

Bootstrapped and regtested on x86_64-pc-linux-gnu, pushed to
trunk as obvious.

-- >8 --

After r14-4796-g3e3d73ed5e85e7, tsubst_copy_and_build (now named
tsubst_expr) no longer dispatches to tsubst for type trees, and
callers have to do it themselves if appropriate.  This patch makes
some overlooked adjustments to Objective-C++-specific code paths.

PR objc++/111920

gcc/cp/ChangeLog:

* pt.cc (tsubst_expr) : Use tsubst instead
of tsubst_expr.

gcc/objcp/ChangeLog:

* objcp-lang.cc (objcp_tsubst_expr) :
Use tsubst instead of tsubst_expr for type operands.
---
 gcc/cp/pt.cc|  2 +-
 gcc/objcp/objcp-lang.cc | 10 --
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/gcc/cp/pt.cc b/gcc/cp/pt.cc
index 210c6cb9e4d..1c1c9313118 100644
--- a/gcc/cp/pt.cc
+++ b/gcc/cp/pt.cc
@@ -20261,7 +20261,7 @@ tsubst_expr (tree t, tree args, tsubst_flags_t 
complain, tree in_decl)
op1 = TREE_OPERAND (t, 0);
++cp_unevaluated_operand;
++c_inhibit_evaluation_warnings;
-   op1 = tsubst_expr (op1, args, complain, in_decl);
+   op1 = tsubst (op1, args, complain, in_decl);
--cp_unevaluated_operand;
--c_inhibit_evaluation_warnings;
RETURN (objc_build_encode_expr (op1));
diff --git a/gcc/objcp/objcp-lang.cc b/gcc/objcp/objcp-lang.cc
index 5b04cd66290..ee39aece848 100644
--- a/gcc/objcp/objcp-lang.cc
+++ b/gcc/objcp/objcp-lang.cc
@@ -66,8 +66,14 @@ objcp_tsubst_expr (tree t, tree args, tsubst_flags_t 
complain, tree in_decl)
 RECURSE (TREE_OPERAND (t, 2)), NULL);
 
 case CLASS_REFERENCE_EXPR:
-  return objc_get_class_reference
-   (RECURSE (TREE_OPERAND (t, 0)));
+  {
+   tree ident = TREE_OPERAND (t, 0);
+   if (TYPE_P (ident))
+ ident = tsubst (ident, args, complain, in_decl);
+   else
+ ident = RECURSE (ident);
+   return objc_get_class_reference (ident);
+  }
 
 default:
   break;
-- 
2.42.0.424.gceadf0f3cf

Re: [PATCH] libstdc++ Add cstdarg to freestanding

[Arsen Arsenović]

"Paul M. Bendixen"  writes:

> Updated patch, added the requested files, hopefully wrote the commit better.

LGTM.  Jonathan?
-- 
Arsen Arsenović


signature.asc
Description: PGP signature

Re: [PATCH] gcc.c-torture/execute/builtins/fputs.c: Define _GNU_SOURCE

[rep . dot . nop]

On 22 October 2023 21:45:12 CEST, Jeff Law  wrote:
>
>
>On 10/22/23 10:09, Andrew Pinski wrote:
>> On Sun, Oct 22, 2023 at 12:47 AM Florian Weimer  wrote:
>>> 
>>> Current glibc headers only declare fputs_unlocked for _GNU_SOURCE.
>>> Defining the macro avoids an implicit function declaration.
>> 
>> This does not help targets that don't use glibc though.
>> Note for builtins testsuite there is a lib-fputs.c file which will
>> define a fputs_unlock which is how it will link even if the libc does
>> not define a fputs_unlock.
>But isn't fputs_unlocked glibc specific to begin with?  ie, the test really 
>doesn't make sense AFAICT on non-glibc targets.

I think uClibc had it too, at least at one point in the past.

Re: [PATCH] gcc.c-torture/execute/builtins/fputs.c: Define _GNU_SOURCE

[Jeff Law]

On 10/22/23 10:09, Andrew Pinski wrote:

On Sun, Oct 22, 2023 at 12:47 AM Florian Weimer  wrote:


Current glibc headers only declare fputs_unlocked for _GNU_SOURCE.
Defining the macro avoids an implicit function declaration.


This does not help targets that don't use glibc though.
Note for builtins testsuite there is a lib-fputs.c file which will
define a fputs_unlock which is how it will link even if the libc does
not define a fputs_unlock.
But isn't fputs_unlocked glibc specific to begin with?  ie, the test 
really doesn't make sense AFAICT on non-glibc targets.


Jeff

Re: [PATCH] gcc.c-torture/execute/builtins/fputs.c: Define _GNU_SOURCE

[Andrew Pinski]

On Sun, Oct 22, 2023 at 12:47 AM Florian Weimer  wrote:
>
> Current glibc headers only declare fputs_unlocked for _GNU_SOURCE.
> Defining the macro avoids an implicit function declaration.

This does not help targets that don't use glibc though.
Note for builtins testsuite there is a lib-fputs.c file which will
define a fputs_unlock which is how it will link even if the libc does
not define a fputs_unlock.

Thanks,
Andrew Pinski

>
> gcc/testsuite/
>
> * gcc.c-torture/execute/builtins/fputs.c (_GNU_SOURCE):
> Define.
>
> ---
>  gcc/testsuite/gcc.c-torture/execute/builtins/fputs.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/fputs.c 
> b/gcc/testsuite/gcc.c-torture/execute/builtins/fputs.c
> index 93fa9736449..13e30724355 100644
> --- a/gcc/testsuite/gcc.c-torture/execute/builtins/fputs.c
> +++ b/gcc/testsuite/gcc.c-torture/execute/builtins/fputs.c
> @@ -5,6 +5,7 @@
>
> Written by Kaveh R. Ghazi, 10/30/2000.  */
>
> +#define _GNU_SOURCE /* For fputs_unlocked.  */
>  #include 
>  extern void abort(void);
>
>

Re: [PATCH] gcc.c-torture/execute/builtins/fputs.c: Define _GNU_SOURCE

[Jeff Law]

On 10/22/23 01:47, Florian Weimer wrote:

Current glibc headers only declare fputs_unlocked for _GNU_SOURCE.
Defining the macro avoids an implicit function declaration.

gcc/testsuite/

* gcc.c-torture/execute/builtins/fputs.c (_GNU_SOURCE):
Define.

OK
jeff

Re: [PATCH] gcc.c-torture/execute/builtins/pr93262-chk.c: Remove return statement

[Jeff Law]

On 10/22/23 01:46, Florian Weimer wrote:

The main_test function returns void, so return with an expression
is a constraint violation.  The test case still fails with this
change applied before the fix for PR 93262 in r14-4813.

gcc/testsuite/

* gcc.c-torture/execute/builtins/pr93262-chk.c (main_test):
Remove unnecessary return statement.

OK
jeff

Re: [PATCH] wwwdocs: gcc-14: mark amdgcn fiji deprecated

[Gerald Pfeifer]

Hi Andrew,

On Fri, 20 Oct 2023, Andrew Stubbs wrote:
>>  Additionally, I wonder whether "Fiji" should be changed to "Fiji
>> (gfx803)" in the first line and whether the  "," should be removed in
>> "The ... configuration ... , and no longer includes".
> Fair enough, how's this version? (I like the comma, even if it is optional.)

it's definitely fine. I do have a recommendation and a question, though 
feel free to go about them as you prefer.

+  The default device architecture is now gfx900 (Vega).

How about starting with this as the first sub-item, as a "positive", 
then follow with the deprecation?

+
+  
+The Fiji (gfx803) device support is now deprecated and will be removed from

Could this be "Fiji (gfx803) device support" without the article?

Gerald

Re: [PATCH v23 31/33] libstdc++: Optimize std::is_pointer compilation performance

[Ken Matsui]

Hi Patrick,

There is an issue with the code in
libstdc++-v3/include/bits/cpp_type_traits.h. Specifically, Clang 16
does not accept the code, while Clang 17 does. Given that we aim to
support the last two versions of Clang, we need to ensure that Clang
16 accepts this code. Can you please advise on the best course of
action regarding this matter?

https://godbolt.org/z/PbxhYcb7q

Sincerely,
Ken Matsui

On Fri, Oct 20, 2023 at 7:12 AM Ken Matsui  wrote:
>
> This patch optimizes the compilation performance of std::is_pointer
> by dispatching to the new __is_pointer built-in trait.
>
> libstdc++-v3/ChangeLog:
>
> * include/bits/cpp_type_traits.h (__is_pointer): Use __is_pointer
> built-in trait.
> * include/std/type_traits (is_pointer): Likewise. Optimize its
> implementation.
> (is_pointer_v): Likewise.
>
> Co-authored-by: Jonathan Wakely 
> Signed-off-by: Ken Matsui 
> ---
>  libstdc++-v3/include/bits/cpp_type_traits.h |  8 
>  libstdc++-v3/include/std/type_traits| 44 +
>  2 files changed, 44 insertions(+), 8 deletions(-)
>
> diff --git a/libstdc++-v3/include/bits/cpp_type_traits.h 
> b/libstdc++-v3/include/bits/cpp_type_traits.h
> index 4312f32a4e0..246f2cc0b17 100644
> --- a/libstdc++-v3/include/bits/cpp_type_traits.h
> +++ b/libstdc++-v3/include/bits/cpp_type_traits.h
> @@ -363,6 +363,13 @@ __INT_N(__GLIBCXX_TYPE_INT_N_3)
>//
>// Pointer types
>//
> +#if _GLIBCXX_USE_BUILTIN_TRAIT(__is_pointer)
> +  template
> +struct __is_pointer : __truth_type<__is_pointer(_Tp)>
> +{
> +  enum { __value = __is_pointer(_Tp) };
> +};
> +#else
>template
>  struct __is_pointer
>  {
> @@ -376,6 +383,7 @@ __INT_N(__GLIBCXX_TYPE_INT_N_3)
>enum { __value = 1 };
>typedef __true_type __type;
>  };
> +#endif
>
>//
>// An arithmetic type is an integer type or a floating point type
> diff --git a/libstdc++-v3/include/std/type_traits 
> b/libstdc++-v3/include/std/type_traits
> index 0641ecfdf2b..75a94cb8d7e 100644
> --- a/libstdc++-v3/include/std/type_traits
> +++ b/libstdc++-v3/include/std/type_traits
> @@ -542,19 +542,33 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
>  : public true_type { };
>  #endif
>
> -  template
> -struct __is_pointer_helper
> +  /// is_pointer
> +#if _GLIBCXX_USE_BUILTIN_TRAIT(__is_pointer)
> +  template
> +struct is_pointer
> +: public __bool_constant<__is_pointer(_Tp)>
> +{ };
> +#else
> +  template
> +struct is_pointer
>  : public false_type { };
>
>template
> -struct __is_pointer_helper<_Tp*>
> +struct is_pointer<_Tp*>
>  : public true_type { };
>
> -  /// is_pointer
>template
> -struct is_pointer
> -: public __is_pointer_helper<__remove_cv_t<_Tp>>::type
> -{ };
> +struct is_pointer<_Tp* const>
> +: public true_type { };
> +
> +  template
> +struct is_pointer<_Tp* volatile>
> +: public true_type { };
> +
> +  template
> +struct is_pointer<_Tp* const volatile>
> +: public true_type { };
> +#endif
>
>/// is_lvalue_reference
>template
> @@ -3252,8 +3266,22 @@ template 
>inline constexpr bool is_array_v<_Tp[_Num]> = true;
>  #endif
>
> +#if _GLIBCXX_USE_BUILTIN_TRAIT(__is_pointer)
> +template 
> +  inline constexpr bool is_pointer_v = __is_pointer(_Tp);
> +#else
>  template 
> -  inline constexpr bool is_pointer_v = is_pointer<_Tp>::value;
> +  inline constexpr bool is_pointer_v = false;
> +template 
> +  inline constexpr bool is_pointer_v<_Tp*> = true;
> +template 
> +  inline constexpr bool is_pointer_v<_Tp* const> = true;
> +template 
> +  inline constexpr bool is_pointer_v<_Tp* volatile> = true;
> +template 
> +  inline constexpr bool is_pointer_v<_Tp* const volatile> = true;
> +#endif
> +
>  template 
>inline constexpr bool is_lvalue_reference_v = false;
>  template 
> --
> 2.42.0
>

[PATCH] gcc.c-torture/execute/builtins/fputs.c: Define _GNU_SOURCE

[Florian Weimer]

Current glibc headers only declare fputs_unlocked for _GNU_SOURCE.
Defining the macro avoids an implicit function declaration.

gcc/testsuite/

* gcc.c-torture/execute/builtins/fputs.c (_GNU_SOURCE):
Define.

---
 gcc/testsuite/gcc.c-torture/execute/builtins/fputs.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/fputs.c 
b/gcc/testsuite/gcc.c-torture/execute/builtins/fputs.c
index 93fa9736449..13e30724355 100644
--- a/gcc/testsuite/gcc.c-torture/execute/builtins/fputs.c
+++ b/gcc/testsuite/gcc.c-torture/execute/builtins/fputs.c
@@ -5,6 +5,7 @@
 
Written by Kaveh R. Ghazi, 10/30/2000.  */
 
+#define _GNU_SOURCE /* For fputs_unlocked.  */
 #include 
 extern void abort(void);
 

[PATCH] gcc.c-torture/execute/builtins/pr93262-chk.c: Remove return statement

[Florian Weimer]

The main_test function returns void, so return with an expression
is a constraint violation.  The test case still fails with this
change applied before the fix for PR 93262 in r14-4813.

gcc/testsuite/

* gcc.c-torture/execute/builtins/pr93262-chk.c (main_test):
Remove unnecessary return statement.

---
 gcc/testsuite/gcc.c-torture/execute/builtins/pr93262-chk.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/pr93262-chk.c 
b/gcc/testsuite/gcc.c-torture/execute/builtins/pr93262-chk.c
index 66d86b44b58..e55868623e9 100644
--- a/gcc/testsuite/gcc.c-torture/execute/builtins/pr93262-chk.c
+++ b/gcc/testsuite/gcc.c-torture/execute/builtins/pr93262-chk.c
@@ -51,5 +51,4 @@ main_test (void)
 }
   if (chk_calls != 2)
 abort ();
-  return 0;
 }