Re: [PATCH] Adjust predicates and constraints of scalar insns

2019-10-25 Thread Uros Bizjak
On Fri, Oct 25, 2019 at 9:20 PM Hongtao Liu  wrote:
>
> > Looking into sse.md, there is a lot of inconsistencies in existing *vm
> > patterns w.r.t. operand constraints. Unfortunately, these were copied
> > into proposed patterns. One example is existing
> >
> > (define_insn "_vmsqrt2"
> >   [(set (match_operand:VF_128 0 "register_operand" "=x,v")
> > (vec_merge:VF_128
> >   (sqrt:VF_128
> > (match_operand:VF_128 1 "vector_operand"
> > "xBm,"))
> >   (match_operand:VF_128 2 "register_operand" "0,v")
> >   (const_int 1)))]
> >   "TARGET_SSE"
> >   "@
> >sqrt\t{%1, %0|%0, %1}
> >
> > Due to combine benefits, *vm operands to be merged is described in
> > vector mode. Since the insn operates in scalar mode, there is no need
> > for "vector_operand" and Bm constraint that impose more strict
> > alignment requirements. However, iptr modifier is needed here to
> > override VF_128 vector mode (e.g. V4SFmode) to generate scalar
> > (SFmode, DWORD PTR) memory access prefix.
> >
> > Someone should fix these existing inconsistencies in a follow-up patch.
>
> https://gcc.gnu.org/ml/gcc-patches/2019-10/msg01867.html
> This patch is to fix these.
>
> Bootstrap and regression test on i386/x86-64 is ok.
>
> Ok for trunk?
>
> Changelog
>
> cc/
> * config/i386/sse.md
> (_vm3,
> 
> _vm3,
> _vmsqrt2,
> _vm3,
> _vmmaskcmp3):
> Change predicates from vector_operand to nonimmediate_operand,
> constraints xBm to xm, since scalar operations don't need
> memory address alignment.
> (avx512f_vmcmp3,
> avx512f_vmcmp3_mask): Replace
> round_saeonly_nimm_predicate with
> round_saeonly_nimm_scalar_predicate.
> (fmai_vmfmadd_, fmai_vmfmsub_,
> fmai_vmfnmadd_,fmai_vmfnmsub_,
> *fmai_fmadd_, *fmai_fmsub_,
> *fmai_fnmadd_, *fmai_fnmsub_,
> avx512f_vmfmadd__mask3,
> avx512f_vmfmadd__maskz_1,
> *avx512f_vmfmsub__mask,
> avx512f_vmfmsub__mask3,
> *avx512f_vmfmsub__maskz_1,
> *avx512f_vmfnmadd__mask,
> *avx512f_vmfnmadd__mask3,
> *avx512f_vmfnmadd__maskz_1,
> *avx512f_vmfnmsub__mask,
> *avx512f_vmfnmsub__mask3,
> *avx512f_vmfnmsub__maskz_1,
> cvtusi232,
> cvtusi264, ): Replace
> round_nimm_predicate instead of round_nimm_scalr_predicate.
> (avx512f_sfixupimm,
> avx512f_sfixupimm_mask,
> avx512er_vmrcp28,
> avx512er_vmrsqrt28,
> ): Replace round_saeonly_nimm_predicate with
> round_saeonly_nimm_scalar_predicate.
> (avx512dq_vmfpclass, ): Replace
> vector_operand with nonimmediate_operand.
> * config/i386/subst.md (round_scalar_nimm_predicate,
> round_saeonly_scalar_nimm_predicate): Replace
> vector_operand with nonimmediate_operand.

LGTM, although this patch is very hard to review.

BTW: Please also note that there is no need to use  or operand
mode override in scalar insn templates for intel asm dialect when
operand already has a scalar mode.

Thanks,
Uros.


[PATCH] Adjust predicates and constraints of scalar insns

2019-10-25 Thread Hongtao Liu
> Looking into sse.md, there is a lot of inconsistencies in existing *vm
> patterns w.r.t. operand constraints. Unfortunately, these were copied
> into proposed patterns. One example is existing
>
> (define_insn "_vmsqrt2"
>   [(set (match_operand:VF_128 0 "register_operand" "=x,v")
> (vec_merge:VF_128
>   (sqrt:VF_128
> (match_operand:VF_128 1 "vector_operand"
> "xBm,"))
>   (match_operand:VF_128 2 "register_operand" "0,v")
>   (const_int 1)))]
>   "TARGET_SSE"
>   "@
>sqrt\t{%1, %0|%0, %1}
>
> Due to combine benefits, *vm operands to be merged is described in
> vector mode. Since the insn operates in scalar mode, there is no need
> for "vector_operand" and Bm constraint that impose more strict
> alignment requirements. However, iptr modifier is needed here to
> override VF_128 vector mode (e.g. V4SFmode) to generate scalar
> (SFmode, DWORD PTR) memory access prefix.
>
> Someone should fix these existing inconsistencies in a follow-up patch.

https://gcc.gnu.org/ml/gcc-patches/2019-10/msg01867.html
This patch is to fix these.

Bootstrap and regression test on i386/x86-64 is ok.

Ok for trunk?

Changelog

cc/
* config/i386/sse.md
(_vm3,
_vm3,
_vmsqrt2,
_vm3,
_vmmaskcmp3):
Change predicates from vector_operand to nonimmediate_operand,
constraints xBm to xm, since scalar operations don't need
memory address alignment.
(avx512f_vmcmp3,
avx512f_vmcmp3_mask): Replace
round_saeonly_nimm_predicate with
round_saeonly_nimm_scalar_predicate.
(fmai_vmfmadd_, fmai_vmfmsub_,
fmai_vmfnmadd_,fmai_vmfnmsub_,
*fmai_fmadd_, *fmai_fmsub_,
*fmai_fnmadd_, *fmai_fnmsub_,
avx512f_vmfmadd__mask3,
avx512f_vmfmadd__maskz_1,
*avx512f_vmfmsub__mask,
avx512f_vmfmsub__mask3,
*avx512f_vmfmsub__maskz_1,
*avx512f_vmfnmadd__mask,
*avx512f_vmfnmadd__mask3,
*avx512f_vmfnmadd__maskz_1,
*avx512f_vmfnmsub__mask,
*avx512f_vmfnmsub__mask3,
*avx512f_vmfnmsub__maskz_1,
cvtusi232,
cvtusi264, ): Replace
round_nimm_predicate instead of round_nimm_scalr_predicate.
(avx512f_sfixupimm,
avx512f_sfixupimm_mask,
avx512er_vmrcp28,
avx512er_vmrsqrt28,
): Replace round_saeonly_nimm_predicate with
round_saeonly_nimm_scalar_predicate.
(avx512dq_vmfpclass, ): Replace
vector_operand with nonimmediate_operand.
* config/i386/subst.md (round_scalar_nimm_predicate,
round_saeonly_scalar_nimm_predicate): Replace
vector_operand with nonimmediate_operand.

-- 
BR,
Hongtao


0001-Adjust-predicates-and-constraints-of-scalar-insns.patch
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