Re: RFA: PR target/53120, constraint modifier + on operand tied by matching-constraint, 0.
OK to apply ? Ok. Thanks!
Re: RFA: PR target/53120, constraint modifier + on operand tied by matching-constraint, 0.
Hi DJ, Make sure a match_dup will still match the generated pattern later, I've had problems with match_dup not matching two rtx that rtx_equals() says are the same but not physically the same. I have tried, but failed, to find a way to trigger the use of the bset_qi pattern. :-( I tried rebuilding the toolchain and running the GCC testsuite, but neither of these worked. Do you have a test case that triggers it ? Cheers Nick
Re: RFA: PR target/53120, constraint modifier + on operand tied by matching-constraint, 0.
#define q ((char *)0x1234)
foo(int x)
{
*q |= (1 (char)x);
}
$ m32c-elf-gcc -S -O3 nick.c
.global _foo
_foo:
mov.w r1,a0; 20
movhi_op/3
bset4660[a0] ; 11 bset_qi
rts ; 23
epilogue_rts
Re: RFA: PR target/53120, constraint modifier + on operand tied by matching-constraint, 0.
Make sure a match_dup will still match the generated pattern later, I've had problems with match_dup not matching two rtx that rtx_equals() says are the same but not physically the same.
RFA: PR target/53120, constraint modifier + on operand tied by matching-constraint, 0.
Hi DJ, As pointed out by Hans-Peter in his patch for PR 53120 for the cris backend, the m32c/bitops.md file contains a pattern that uses both the + modifier and the 0 constraint. The patch below is a straightforward fix for this, replacing the 0 constraint with a match_dup. Tested with no regressions on an m32c-elf toolchain. OK to apply ? Cheers Nick gcc/ChangeLog 2012-05-02 Nick Clifton ni...@redhat.com PR target/53120 * config/m32c/bitops.md (bset_qi): Change operand 2 from having a 0 constraint to being a (match_dup 0). Index: gcc/config/m32c/bitops.md === --- gcc/config/m32c/bitops.md (revision 187036) +++ gcc/config/m32c/bitops.md (working copy) @@ -43,7 +43,7 @@ [(set (match_operand:QI 0 memsym_operand +Si) (ior:QI (subreg:QI (ashift:HI (const_int 1) (subreg:QI (match_operand:HI 1 a_qi_operand Raa) 0)) 0) - (match_operand:QI 2 memsym_operand 0)))] + (match_dup 0)))] TARGET_A16 bset\t%0[%1] [(set_attr flags n)]
