Re: gEDA-user: [pcb] drill helper

2007-05-15 Thread Tomaz Solc
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Hi

 Good idea, what would be the much smaller drill hole? If it's too small,
 it can disappear with toner transfer, if it's too big it doesn't center
 the drill. I would suggest ~0.4 mm.

I suggest using a formula like this:

When using the drill helper, make drills holes 1/3 or 1/4 of their size,
but no smaller than 30mil.

I can easily drill 30mil holes without any special helpers and 30mil is
large enough for any etching technique. On the other hand I do have
problems centering drills for larger mounting holes. A 30mil hole in the
copper is too small to have any mechanical effect on a large drill bit,
so it would need to be proportionally larger for larger holes.

Best regards
Tomaz
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Re: gEDA-user: [pcb] drill helper

2007-05-15 Thread Wojciech Kazubski
Nice! I also proposed this some time ago. There should be three options for PS 
output:
1) full size drills to see how the board will look like
2) reduced holes as template for manual drilling
3) no holes at all for automatic drilling (usable if there are problems with 
gerber output, there may some problem with exact scaling but may be the only 
way if no gerber - postscript converter is available).

The best size for 2 should be about 15 mils, but can be made configurable (just 
as default line width or via size).

Current dril helpers are not good since they are dots and will push a drill off 
the proper place.

Wojciech Kazubski

 
 Having made a number of boards at home now, I'm thinking the drill
 helper could be better.  My local copy does this instead: If you check
 drill helper, all pins are drawn with a much smaller drill hole.
 I.e.  it doesn't draw the normal-sized hole at all, so if the drill is
 off-center, you won't have a gap between the hole and the copper.
 Instead, it only etches a small amount of copper at the center, to
 help you center the drill.
 
 Comments?
 
 
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Re: gEDA-user: [pcb] drill helper

2007-05-15 Thread Svenn Are Bjerkem

On 5/15/07, DJ Delorie [EMAIL PROTECTED] wrote:


Having made a number of boards at home now, I'm thinking the drill
helper could be better.  My local copy does this instead: If you check
drill helper, all pins are drawn with a much smaller drill hole.
I.e.  it doesn't draw the normal-sized hole at all, so if the drill is
off-center, you won't have a gap between the hole and the copper.
Instead, it only etches a small amount of copper at the center, to
help you center the drill.


Following is my experience from many PCBs:
With a Proxxon mini-bench drill and standard 0.8 mm drill, guiding
holes are a must as the drill is so soft that it bends. The guiding
hole should be smaller than the drill to work as a funnel for the
drill. I use 0.5 mm holes. With a Proxxon you can litteraly see how
the drill bends to enter the guide, and you can feel how the PCB is
moved by the tension for the drill to straighten out. (We are talking
about very small measures of movement and tension here)

For a LABO drill or a CNC no guiding holes should be used as these
drills are so hard that they will break if they hit the edge of the
hole. They normally don't need guides anyway.

With some experience, drilling with a Proxxon mini-bench is faster
than using a specialized LABO for holes around 0.8 mm as a normal
drill is more forgiving than the LABO one. And you also don't need to
hit the hole straight as the drill pulls the board in. You can also
re-drill a hole which is impossible with a LABO.

--
Svenn


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Re: gEDA-user: trace length?

2007-05-15 Thread ldoolitt
Ryan -

On Tue, May 15, 2007 at 09:22:51AM -0400, Ryan Seal wrote:
 Is there a method in PCB that allows one to measure the trace length so 
 that signals can be phase matched if needed? If not, this would be a 
 nice feature.

No, but I would be interested to help out, either coding or
testing.  I haven't yet gotten around to it by myself.

- Larry


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Re: gEDA-user: [pcb] drill helper

2007-05-15 Thread John Griessen

DJ Delorie wrote:
My local copy does this instead: If you check

drill helper, all pins are drawn with a much smaller drill hole.

Comments?


Yes.  Great idea.

I've been effectively doing that by my hole specs for prototypes
not matching actual desired finished sizes.

When you make such unreal entries,
the data is less useful for simulations though -- you could not make an accurate
model of pads and vias for analyzing capacitance or transmission lines.

Having this optional and selectable without changing the correct design data
will be a benefit.

After my hand drilling experience, I feel guide holes of 1/4 the drill diameter
are beneficial down to .4mm (.016 inch).  1/4 is better than 1/3 dia since the 
shape of
a sharpened drill has the flat tip that is maybe 1/6 the diameter on the
high speed steel twist drills I have seen.

We have some suggestions that one ratio to drill diameter may not satisfy all, 
so I
would like to specify everything about a certain hole size in my design as a 
line
in the resource (Pcb) file for defaults,
and as a similar overriding line at the top of the .pcb output
file so PCB's output is as general as possible -- useful for manufacturing and 
simulating.
This entry would give corresponding drill size and drill helper size for 
desired finished size,
and override any default or formulaic sizes.


Wouldn't it be nice if one of the output drawings showed standard holes and 
vias in
a view that is just lines of vias/holes connected by traces.   Right when you 
start a design
before laying out any thing you could set your process etch undercut amount, 
then output
the standard holes and vias drawing to gerber, view it with gerbv to check 
that all your desired
standard holes were enough to get the design done with particular connectors 
and mechanical
details.

John Griessen



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Re: gEDA-user: OT Transformer shop

2007-05-15 Thread phil
 Anybody know of a transformer shop in NA?

Richard Sumner

sumr.com

He does production and custom transformers, coils and chokes.  Reputed to
be a good person to deal with.

Phil Taylor



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gEDA-user: CVS ebuilds for gentoo

2007-05-15 Thread Stefan Dröge
Hi, I want to switch to the cvs version(s) of gschem, gattrib and pcb. Has
anybody here got ready to use ebuilds for the named tools (or for the whole
suite)?

Greetings, Stefan



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Re: gEDA-user: [pcb] drill helper

2007-05-15 Thread DJ Delorie

 Good idea, what would be the much smaller drill hole?

Currently, I use twice the minimum drill size (i.e. 8 mil diameter)
unless that's bigger than the actual drill.

 If it's too small, it can disappear with toner transfer,

8 mil is about 5 dots wide on a 600dpi laser printer, and you don't
need a perfect etch - just enough hole to get something etched.  Thus,
8 mil is plenty for toner transfer.


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Re: gEDA-user: trace length?

2007-05-15 Thread DJ Delorie

 Is there a method in PCB that allows one to measure the trace length so 
 that signals can be phase matched if needed? If not, this would be a 
 nice feature.

Put the cursor over the trace and type :Report(NetLength)

It tells you which net it is and the length in the message log.

Note that if the trace is not just a single path (i.e. it branches),
you get the sum of all segments on all branches.  Also, polygons
aren't supported.

It's not bound to any hotkeys, but of course you can bind it to
something with the lesstif hid's pcb-menu.res.


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gEDA-user: et - symbol translate not working?

2007-05-15 Thread Cory Cross
On a very recent (May 7th*) CVS version of gschem, doing et 0 results in 
most of the symbol going off the navigable workspace (negative 
coordinates?). Does anyone else have this problem?


Thanks,
Cory Cross


*about. How do I find out what my current checked-out version is?


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Re: gEDA-user: et - symbol translate not working?

2007-05-15 Thread DJ Delorie

 Does anyone else have this problem?

I've seen it too.


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Re: gEDA-user: et - symbol translate not working?

2007-05-15 Thread Peter Clifton
On Tue, 2007-05-15 at 13:58 -0400, DJ Delorie wrote:
  Does anyone else have this problem?
 
 I've seen it too.

I'm about to commit a fix (one liner).

Peter




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gEDA-user: howto : strap use in pcb

2007-05-15 Thread Ludovic SMADJA
Hello,

I would know how to put straps on my pcb in order to reduce vias.

Is it possible and how ?

-- 
Ludovic SMADJA

Le hasard, c'est Dieu qui se promène incognito - Albert Einstein


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Re: gEDA-user: howto : strap use in pcb

2007-05-15 Thread John Luciani

On 5/15/07, Ludovic SMADJA [EMAIL PROTECTED] wrote:

Hello,

I would know how to put straps on my pcb in order to reduce vias.

Is it possible and how ?


If by a strap you mean a busbar then you could make a footprint that
matches the mechanical specifications.

(* jcl *)

--
http://www.luciani.org


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Re: gEDA-user: howto : strap use in pcb

2007-05-15 Thread Mike Jarabek
Hi,

It has been suggested before that you can designate one copper layer for this 
purpose, and just use vias instead of a footprint. 

Wherever you want a strap, just draw a copper line.  Print the layer seperately 
and you have a reference for your wires. 

Doing it this way will allow the DRC to pass and the rats nest will work too. 


--
  Mike Jarabek
 FPGA/ASIC Designer, DSP Firmware Designer
http://www.sentex.ca/~mjarabek
--  

-Original Message-
From: Ludovic SMADJA [EMAIL PROTECTED]
Date: Tue, 15 May 2007 21:25:46 
To:gEDA user mailing list geda-user@moria.seul.org
Subject: gEDA-user: howto : strap use in pcb

Hello,

I would know how to put straps on my pcb in order to reduce vias.

Is it possible and how ?

-- 
Ludovic SMADJA

Le hasard, c'est Dieu qui se prom�ne incognito - Albert Einstein


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Re: gEDA-user: howto : strap use in pcb

2007-05-15 Thread Ludovic SMADJA
Thanks for your answer.

It's for me the good solution.

regards,

Ludovic

Mike Jarabek a écrit :
 Hi,
 
 It has been suggested before that you can designate one copper layer for this 
 purpose, and just use vias instead of a footprint. 
 
 Wherever you want a strap, just draw a copper line.  Print the layer 
 seperately and you have a reference for your wires. 
 
 Doing it this way will allow the DRC to pass and the rats nest will work too. 
 
 
 --
   Mike Jarabek
  FPGA/ASIC Designer, DSP Firmware Designer
 http://www.sentex.ca/~mjarabek
 --  
 
 -Original Message-
 From: Ludovic SMADJA [EMAIL PROTECTED]
 Date: Tue, 15 May 2007 21:25:46 
 To:gEDA user mailing list geda-user@moria.seul.org
 Subject: gEDA-user: howto : strap use in pcb
 
 Hello,
 
 I would know how to put straps on my pcb in order to reduce vias.
 
 Is it possible and how ?
 
 
 
 
 
 
 
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-- 
Ludovic SMADJA

Le hasard, c'est Dieu qui se promène incognito - Albert Einstein


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gEDA-user: Icarus bug?

2007-05-15 Thread Benjamin Ylvisaker
I believe I found a bug in the Icarus VPI implementation, but I wanted
to check before filing a bug report.

I have code that works with ModelSim under Linux, but I want to
develop on my primary computer, which is a PowerBook, so I'm trying to
get it working with Icarus under OS X.  Here's the troublesome bit:

void register() {
  s_cb_data init;
  vpiHandle cbHandle;

  init.reason = cbStartOfSimulation;
  init.cb_rtn = initializeSim;
  init.obj = NULL;
  init.time = NULL;
  init.value = NULL;
  init.user_data = NULL;

  cbHandle = vpi_register_cb(init);
/*  vpi_free_object(cbHandle);*/
}

void (*vlog_startup_routines[ ] ) () = {
   register,
   0
};

When I run it this way, it seems to work okay, but when I uncomment
the call to vpi_free_object, it causes Icarus to crash with a Bus
Error.  The Verilog PLI Handbook says that it's good style to free
the callback handle, unless you need to use it somewhere else.

Does this look like a bug to anyone else?

Benjamin


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gEDA-user: Help

2007-05-15 Thread Vincent Onelli
I start using gschem part of geda 20050313 version on Xandros os. It constantly 
when you list expect close the gschem leaving me with the unsaved portion to be 
reentered again, I know that this is an older version, but this version is the 
only version available from Xandros network.
Is there any body that successfully installed and run a newer version on 
Xandros professional ver 4? And if yes can you supply me with the direction on 
how to install?
I try to install the latest iso file but it went thru several error that I 
eventually stop it all the errors were basically the same 
The message were: ERROR WHILE INSTALLING with the choice of abort the 
installation or continue the log file was pointing out which program was 
installing at the time first was make utils_install, second make 
gsymcheck_install, third make gschem_install at this point I abort the 
installation.
I also try to install the debian version the one marked stable using the help 
of xandros network it did not install.
Thank you in advanced
[EMAIL PROTECTED]


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Re: gEDA-user: Help

2007-05-15 Thread Peter Clifton
On Tue, 2007-05-15 at 21:09 -0400, Vincent Onelli wrote:
 I start using gschem part of geda 20050313 version on Xandros os. It
 constantly when you list expect close the gschem leaving me with the
 unsaved portion to be reentered again, I know that this is an older
 version, but this version is the only version available from Xandros
 network.

There have been many bugs fixed since this version.

I can't advise about Xandros, or installing a newer version, but you
might like to try starting gschem from a terminal with:

G_SLICE=always-malloc gschem

This is known to work around an incompatibility between old versions of
gschem and newer versions of glib (One of the program libraries gschem
needs).

If at all possible, try and get a newer version of gEDA, as a few other
crashing bugs have since been fixed which won't be fixed by the above
command line.

[snip]

 I also try to install the debian version the one marked stable using
 the help of xandros network it did not install. Thank you in advanced 

As Wikipedia tells me Xandros is Debian based, it might be possible to
use pre-build .debs from Debian. (I don't know). It will probably depend
on which version of Debian Xandros is based on, and how far it deviated
from Debian.

What were the error messages when it failed to install, that might be of
use to anyone who might assist you.

Regards,

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)



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Re: gEDA-user: Icarus bug?

2007-05-15 Thread Benjamin Ylvisaker
On Tue, 15 May 2007 21:01:40 -0400
Mike Jarabek [EMAIL PROTECTED] wrote:

 Hi,
 
 On Tue, 2007-05-15 at 15:47 -0700, Benjamin Ylvisaker wrote:
  I believe I found a bug in the Icarus VPI implementation, but I wanted
  to check before filing a bug report.
  
  I have code that works with ModelSim under Linux, but I want to
  develop on my primary computer, which is a PowerBook, so I'm trying to
  get it working with Icarus under OS X.  Here's the troublesome bit:
  
  void register() {
s_cb_data init;
vpiHandle cbHandle;
  
init.reason = cbStartOfSimulation;
init.cb_rtn = initializeSim;
init.obj = NULL;
init.time = NULL;
init.value = NULL;
init.user_data = NULL;
  
cbHandle = vpi_register_cb(init);
  /*  vpi_free_object(cbHandle);*/
  }
  
  void (*vlog_startup_routines[ ] ) () = {
 register,
 0
  };
  
 
 Be careful here, you are passing a pointer to an auto variable into the
 vpi_register() function.  The lifetime of the variable may need to be
 longer than the end of your function.  The Verilog standard itself is
 pretty loosy-goosy on the subject of who allocates and frees these
 things.
 
 I'd recommend declaring the 'init' as:
 
 static s_cb_data init;
 
 instead.  Also, anything that the structure refers to should also be
 declared static, or malloc()'ed.  In fact, all of the examples in the
 Verilog standard follow this 'static' convention.

This sounds like good advice in general, though my very limited
testing suggests that it works either way (static or stack allocated).

  When I run it this way, it seems to work okay, but when I uncomment
  the call to vpi_free_object, it causes Icarus to crash with a Bus
  Error.  The Verilog PLI Handbook says that it's good style to free
  the callback handle, unless you need to use it somewhere else.
 
 It might not be a good idea to free the callback object yet, since the
 callback has not happened. The example in the Verilog standard does not
 free the object either.
 
 Normally you use the vpi_free*() functions to free things that are
 returned to you from the simulator kernel.

Section 6.5 of the 2nd edition of the Verilog PLI Handbook states in
no uncertain terms that the callback handle should be freed after
registering a callback to avoid space leaks.  However(!), I downloaded
the PLI Book code from the website and found that all the free calls
after callback registrations were removed.  It seems that the
confusion is about whether the free call should free the callback data
structure itself or just the handle to it.  I'm not worried about
leaking one or two handles in the whole application, so I'll err on
the safe but possibly leaky side for now.

  Does this look like a bug to anyone else?
 
 In some ways, yes.  But it looks like a classic auto variable that gets
 a pointer dereference that leads to a bus error, or worse, random stack
 trampling.  Those bugs are the most fun to find.

The new PLI Book code still doesn't use static allocation for the
callback struct, and it seems to work in both ModelSim and Icarus.  I
don't want to get into too much of a habit of declaring things static
when they don't need to be.  Does anyone know if Icarus and/or any
other simulators make a copy of the callback data structure, so that
it doesn't need to hang around after the registration call?

Benjamin


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