Re: gEDA-user: Results of CustomPCB build of FLEX board
> Any idea of which process your vender uses DJ? Nope. I just read their specs. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Results of CustomPCB build of FLEX board
For photo imagable solder mask, I think, the minimum is 5 mills wide. 0.5 mm is 19 mills and so should be easy. For silk screened solder mask, I imagine, the bridge must be a lot wider. Any idea of which process your vender uses DJ? Steve Meier DJ Delorie wrote: > Cool. > > About solder masks: I usually set those to the closest to the pad that > the vendor allows, which usually means 1.5 mil or so away. Worst > case, have the mask edge halfway between the pin and the plane. > > I never trust the library's mask or clearance, I always bulk-update > them once they're on the board. Yeah, it's something we need in the > vendor and drc functions, as what I update them to depends on where > I'm sending it to be made. > > For fine-pitch parts, I usually don't bother with mask between pads. > However, 4pcb can do mask between 0.5mm pitch pads (seemingly > perfectly, too, although I didn't spec them as tight as they > produced!) > > Some of the "round" copper bits look jaggie. Is that the scanner, the > design, or the board? > > > ___ > geda-user mailing list > geda-user@moria.seul.org > http://www.seul.org/cgi-bin/mailman/listinfo/geda-user > > ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Results of CustomPCB build of FLEX board
> > I never trust the library's mask or clearance, I always bulk-update > > them once they're on the board. > > Do you have a tool for that? :MinMaskGap 0.075 mm If the mask is showing, ChangeClearSize works on the mask: :ChangeClearSize selectedpads =3 mil If you change the mask to 1 (0.01 mil), minmaskgap sets them all. > It's on the board. You can see some other etching issues as well. Hmm. I didn't get that from either 4pcb or pcb-pool. Even my home etches come out better sometimes. Compare: http://www.delorie.com/pcb/liquidtin/board-before.jpg (er, not the smt inductor ones, they're made from lots of lines, and the gouge near the bottom middle was from a dremel tool) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Results of CustomPCB build of FLEX board
On Thu, Jul 19, 2007 at 10:29:15PM -0400, DJ Delorie wrote: > > I never trust the library's mask or clearance, I always bulk-update > them once they're on the board. Do you have a tool for that? > Some of the "round" copper bits look jaggie. Is that the scanner, the > design, or the board? It's on the board. You can see some other etching issues as well. It was all electrically fine, though. The only short I ran into came from connecting a pad to some plane exposed by the mask. -- Ben Jackson AD7GD <[EMAIL PROTECTED]> http://www.ben.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Results of CustomPCB build of FLEX board
Cool. About solder masks: I usually set those to the closest to the pad that the vendor allows, which usually means 1.5 mil or so away. Worst case, have the mask edge halfway between the pin and the plane. I never trust the library's mask or clearance, I always bulk-update them once they're on the board. Yeah, it's something we need in the vendor and drc functions, as what I update them to depends on where I'm sending it to be made. For fine-pitch parts, I usually don't bother with mask between pads. However, 4pcb can do mask between 0.5mm pitch pads (seemingly perfectly, too, although I didn't spec them as tight as they produced!) Some of the "round" copper bits look jaggie. Is that the scanner, the design, or the board? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Results of CustomPCB build of FLEX board
I had my Altera FLEX (obsolete FPGA I got a handful of for free) board built by CustomPCB last week. This was a trial run of using PCB for professional manufacture, since I plan to do more complex 4 layer board soon. Overall I'm fairly pleased. Gary Cho at CustomPCB answered my questions promptly (if at odd hours, even for Malaysia). When I accidentally asked for a single-sided quote but included 2 sides with mask, I didn't get a warning (beware, restarting firefox doesn't quite preserve forms!). The email confirmation of my order came very late Tue, Jul 10 with a promise that the boards would ship by the following Monday. FedEx actually made their first delivery attempt that Monday (required a signature), so the turnaround was faster than I expected. Together, gschem, PCB and I combined to make a board that worked right without any blue wires, so I'm also pleased with that. Here's an image of one assembled board: http://ad7gd.net/flex/flex-build4.jpg I did learn some important things: (reference image: http://ad7gd.net/flex/custompcb-detail.jpg ) 1) Since I flooded GND on top and 3.3V on the bottom, every pad on the board was within 'clearance' of some plane. Since the many footprints (including the 0603, 0805 and SOT-23 I used) footprints have the same soldermask and clearance, any misalignment of the opening for the pad exposed some adjacent plane, which is not good. The long term solution would be to fix all footprints to include some shrink for the soldermask. Also, it would be good if PCB included a mask alignment tolerance in the DRC parameters so it could both warn of potential problems and/or force all masks to be at least 'mask tolerance' less than 'clearance'. 2) Work with your PCB vendor on tricky footprints like QFP208. After I got the boards and found that the thin fingers of mask between the QFP pads had been filtered out, Gary said they recommend a 8mil pad with a 6mil mask (leaving about a 3mil gap around the pads). The QFP208_28 that I used has 11mil pads and <3mil of mask. Also, only now do I see looking at the text of the footprint that all of its coordinates are on a 1mil grid, even though it's in a .01mil format and a metric part! (I had no trouble soldering the QFP208 without a mask, in fact it looks nicer than some of the 1206 stuff) 3) The board was built with 8/8 rules (mostly done with 8/10) but "slivers" in the polygon of 6 mil all survived. 3mil didn't. This might be worth considering when I get around to removing the slivers in the polygon code (currently PCB assumes arbitrarily thin slivers will keep the plane connected). -- Ben Jackson AD7GD <[EMAIL PROTECTED]> http://www.ben.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: design problem question
On Thursday 19 July 2007 12:59, Jonathan Starr wrote: > Each "battery box" is going to consist of four 12V packs wired in > parallel. One complication is that there needs to be a microcontroller > and circuitry to perform battery monitoring and protection. Take a look at the AVRMega406. http://www.atmel.com/dyn/products/product_card.asp?part_id=3587 Absolutely stay away from Application Note *AVR450* that you may run across for use with anything but Lithium batteries. The 406 examples had a few problems of its own as well. > Additionally, another complication is that the packs need to be charged > in series at 48V. I've had the miss fortune of having to do something similar. It can be done with a few diodes and a few FETs to switch between parallel and series. Look up the TI UC3906, and UC3909, and related application notes at http://www.ti.com for background on charging lead acid batteries. > Basically, the problem is that I lack a background in power electronics. Be careful, there is far more energy in batteries that most people realize, treat them with a lot of respect. Stating clearly your requirements always makes a project go smother. > I apologize if this is an inappropriate place to ask this question, but > finding help is part of my difficulty. :) Thank you in advance for your > help! We are all happy to help, we are however reluctant to do a students homework assignment. -- http://www.wearablesmartsensors.com/ http://www.softwaresafety.net/ http://www.designer-iii.com/ http://www.unusualresearch.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Specifying vdd connection in gschem?
On 7/19/07, devrin talen <[EMAIL PROTECTED]> wrote:
> Hi all,
>
> I'm designing a rather simple circuit in gschem. Included in it are two
> 74126 tri-state buffers that I specify to be part of one 14 pin dip package.
> I used the tutorial as a reference and edited the slot attribute, gave them
> the same refdes and footprint, and everything looks good.
>
> My problem is when I'm in pcb. I'll try to connect one of my power traces to
> the vdd pin on the footprint. pcb won't let me unless I create an explicit
> net line between the power trace and the vdd pin on the chip. It'll also
> complain to me about the traces being shorted. Is there a way to specify the
> vdd connection in gschem so that pcb is aware of the connection that I'm
> trying to make?
Check your netlist to see if the power pins are connected. If you are using the
74126 symbol that comes with gschem the power net is probably called Vcc.
I use a separate power symbol for logic ICs. Below is a quick example.
(* jcl *)
--
http://www.luciani.org
-- cut here -
v 20070216 1
C 21600 39200 1 0 0 EMBEDDED74126-1_np.sym
[
P 21600 39800 21900 39800 1 0 0
{
T 21800 39850 5 8 1 1 0 6 1
pinnumber=2
T 21800 39750 5 8 0 1 0 8 1
pinseq=1
T 21950 39800 9 8 1 1 0 0 1
pinlabel=A
T 21950 39800 5 8 0 1 0 2 1
pintype=in
}
P 23600 39800 23300 39800 1 0 0
{
T 23400 39850 5 8 1 1 0 0 1
pinnumber=3
T 23400 39750 5 8 0 1 0 2 1
pinseq=2
T 23250 39800 9 8 1 1 0 6 1
pinlabel=Y
T 23250 39800 5 8 0 1 0 8 1
pintype=tri
}
P 21600 39400 21900 39400 1 0 0
{
T 21800 39450 5 8 1 1 0 6 1
pinnumber=1
T 21800 39350 5 8 0 1 0 8 1
pinseq=3
T 21950 39400 9 8 1 1 0 0 1
pinlabel=EN
T 21950 39400 5 8 0 1 0 2 1
pintype=in
}
B 21900 39200 1400 900 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 23700 40740 5 10 0 0 0 0 1
device=74126
T 23700 40540 5 10 0 0 0 0 1
footprint=DIP14
T 23700 40340 5 10 0 0 0 0 1
numslots=4
T 23700 40140 5 10 0 0 0 0 1
slotdef=1:2,3,1
T 23700 39940 5 10 0 0 0 0 1
slotdef=2:5,6,4
T 23700 39740 5 10 0 0 0 0 1
slotdef=3:9,8,10
T 23700 39540 5 10 0 0 0 0 1
slotdef=4:12,11,13
T 23700 40950 5 10 0 0 0 0 1
description=4 busline drivers
T 21900 40140 9 10 1 0 0 0 1
74126
T 23700 41550 5 10 0 0 0 0 1
documentation=http://www-s.ti.com/sc/ds/sn74hc126.pdf
]
{
T 23300 40200 5 10 1 1 0 6 1
refdes=U1
}
C 20200 39200 1 0 0 EMBEDDED74126-1_pwr.sym
[
P 20300 39800 20300 39700 5 0 0
{
T 20300 39675 5 6 1 1 0 5 1
pinlabel=Vcc
T 20325 39725 5 6 1 1 0 0 1
pinnumber=14
}
P 20300 39300 20300 39400 5 0 0
{
T 20300 39425 5 6 1 1 0 3 1
pinlabel=GND
T 20325 39375 5 6 1 1 0 2 1
pinnumber=7
}
]
{
T 20275 39725 5 6 1 1 0 6 1
refdes=U1
}
C 20500 39400 1 0 0 cap_sm.sym
{
T 20700 39600 5 10 1 1 0 0 1
refdes=C1
T 20700 39500 5 10 1 1 0 2 1
value=0.1uF
}
C 20100 4 1 0 0 +5V.sym
C 20200 38900 1 0 0 gnd.sym
N 20300 39300 20300 39100 4
N 20600 39400 20600 39200 4
N 20600 39200 20300 39200 4
N 20600 39700 20600 39900 4
N 20600 39900 20300 39900 4
N 20300 39800 20300 4 4
___
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gEDA-user: Specifying vdd connection in gschem?
Hi all, I'm designing a rather simple circuit in gschem. Included in it are two 74126 tri-state buffers that I specify to be part of one 14 pin dip package. I used the tutorial as a reference and edited the slot attribute, gave them the same refdes and footprint, and everything looks good. My problem is when I'm in pcb. I'll try to connect one of my power traces to the vdd pin on the footprint. pcb won't let me unless I create an explicit net line between the power trace and the vdd pin on the chip. It'll also complain to me about the traces being shorted. Is there a way to specify the vdd connection in gschem so that pcb is aware of the connection that I'm trying to make? Thanks, devrin ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Running fedora core 7, want to install gSpiceUI
On 7/19/07, Rob <[EMAIL PROTECTED]> wrote: > I have package manager running and everything is installed except > ngspice and wxGTK. ngspice is listed along with ngspice-doc (I'm sure > I'm suposed to install this too). Also wxGTK is listed along with > wxGTK-devel and wxGTK-gl. Should I install these additional packeges? In the package manager: "ngspice" is the main package "ngspice-doc" contains the documentations You can install ngspice only if you like. Same applies for wxGTK. Chitlesh -- http://clunixchit.blogspot.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: design problem question
Jonathan Starr wrote: > I have a question regarding electronic design; basically, I am working > on a student project, and I am assigned the task of designing a 12V > "battery box." > > Each "battery box" is going to consist of four 12V packs wired in > parallel. One complication is that there needs to be a microcontroller > and circuitry to perform battery monitoring and protection. There are ASICs for this that need no micro... > Additionally, another complication is that the packs need to be charged > in series at 48V. > This series charging seems an odd spec, since any variation in battery condition will cause uneven charging and low capacity when just one cell is aged and resistive. Is your project for education or practical lab needs? Your stated specs saddle you with big disadvantages... are there really higher goals for the project that could be stated in terms like: minimize voltage transformer losses while keeping parts count low? How much power flow is needed out of these batteries? 2000 Amps at 9.5 volts? Are you talking car batteries or AA cells? John Griessen PS This isn't a bad venue to ask for opinions on circuit design. Google and alldatasheet.com should help you get plenty of IC specs to read. (For instance battery monitoring and protection) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Running fedora core 7, want to install gSpiceUI
I have package manager running and everything is installed except ngspice and wxGTK. ngspice is listed along with ngspice-doc (I'm sure I'm suposed to install this too). Also wxGTK is listed along with wxGTK-devel and wxGTK-gl. Should I install these additional packeges? On Thu, 2007-07-19 at 11:22 +0200, Chitlesh GOORAH wrote: > On 7/19/07, Robert Butts wrote: > > I am a new Linux user using Fedora core 7 and I would like to install > > gSpiceUI. > > You are running Fedora 7. Fedora "Core" 7 doesn't exist :) > > > If someone knows how to install gspiceui or where I can get directions I > > would appreciate it greatly. > > Hello, > > You will have gspiceui [1] into fedora soon, that is, you can install > gspiceui via yum. However the problem is that gspiceui requires gwave > and the latter requires some very old packages that are either: > * currently unmaintained or > * no longer available in fedora. > > I've a copy of the current gspiceui rpm: > F-7: http://chitlesh.fedorapeople.org/RPMS/F-7/gspiceui-0.8.90-3.fc7.i386.rpm > FC-6: > http://chitlesh.fedorapeople.org/RPMS/FC-6/gspiceui-0.8.90-3.fc6.i386.rpm > > You will need to install the following before install gspiceui > yum install geda-gnetlist geda-gschem geda-symbols libstdc++ wxGTK ngspice > > Then install gspiceui : > rpm -ivh gspiceui-0.8.90-3.fc6.i386.rpm > or > rpm -ivh gspiceui-0.8.90-3.fc7.i386.rpm > > Please note that it currently doesn't support gwave (we are working on it). > Is there any another alternative you might advise instead of gwave ? > > cheers, > Chitlesh > > [1] https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=247402 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: design problem question
I have a question regarding electronic design; basically, I am working on a student project, and I am assigned the task of designing a 12V "battery box." Each "battery box" is going to consist of four 12V packs wired in parallel. One complication is that there needs to be a microcontroller and circuitry to perform battery monitoring and protection. Additionally, another complication is that the packs need to be charged in series at 48V. Basically, the problem is that I lack a background in power electronics. I am not entirely sure what resources there are available to me to create this design, and I feel as though I am creating something that must have already been done before. My question then is this: Where can I go to find resources applicable to this design problem? I apologize if this is an inappropriate place to ask this question, but finding help is part of my difficulty. :) Thank you in advance for your help! Kindest regards, -- Jonathan Starr ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Running fedora core 7, want to install gSp iceUI
You have to instal wxGTK package (available from Extras: ftp://download.fedora.redhat.com/pub/fedora/linux/releases/7/i386/os/Fedora/wxGTK-2.8.3-2.fc7.i386.rpm or (if yoour F7 is 64-bit): ftp://download.fedora.redhat.com/pub/fedora/linux/releases/7/x86_64/os/Fedora/wxGTK-2.8.3-2.fc7.i386.rpm and apropriate wxGTK-devel package if you want to build gSpiceUI yourself. Or install my package from http://www.sp5pbe.waw.pl/~sp5smk/spice.html Wojciech Kazubski > I am a new Linux user using Fedora core 7 and I would like toinstall gSpiceUI. > I have downloaded gspiceui-v0.8.90 from sourceForge.com and triedto follow > the instructions but it referenced directories not on mysystem. I have only > been able to find links about problemswith an installer in fc4 and gspiceui > faults. > If someone knows how to install gspiceui or where I can getdirections I would > appreciate it greatly. > Thanks! ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: schematic hierarchy netlist problem
Found the answer to my own question by playing around a bit. The pins on the top level symbol didn't have a pinnumber attribute - I didn't think I needed them since they are meaningless. When I put them in, the problem goes away. I've made them invisible so as not to give meaningless info on the top level schematic. On Thu, 2007-07-19 at 10:06 +0100, Peter Baxendale wrote: > OK, thanks for the response. Attached is a very simple hierarchical > design. The .pcb and .net files were generated by "gsch2pcb --skip-m4". > You can see the U?-? in the .net file. > > On Wed, 2007-07-18 at 07:11 -0400, John Luciani wrote: > > On 7/18/07, Peter Baxendale <[EMAIL PROTECTED]> wrote: > > > I don't know where the U?-? comes from. It's not in any of the > > > schematics, just in the netlist produced by gsch2pcb. Every net that > > > connects to one of the io symbols ends in a U?-?. The line I quoted > > > should only have 3 nodes, the extra U?-? looks to be entirely spurious. > > > I should have said, I'm using the gschem 1.0.1-20070626 release. > > > > You may want to post a simple schematic that demonstrates the problem. > > > > (* jcl *) > > > > ___ > geda-user mailing list > geda-user@moria.seul.org > http://www.seul.org/cgi-bin/mailman/listinfo/geda-user -- Peter Baxendale University of Durham [EMAIL PROTECTED] School of Engineering tel +44 191 33 42492 South Road fax +44 191 33 42408 Durham DH1 3LE England ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Running fedora core 7, want to install gSpiceUI
On 7/19/07, Robert Butts wrote: > I am a new Linux user using Fedora core 7 and I would like to install > gSpiceUI. You are running Fedora 7. Fedora "Core" 7 doesn't exist :) > If someone knows how to install gspiceui or where I can get directions I > would appreciate it greatly. Hello, You will have gspiceui [1] into fedora soon, that is, you can install gspiceui via yum. However the problem is that gspiceui requires gwave and the latter requires some very old packages that are either: * currently unmaintained or * no longer available in fedora. I've a copy of the current gspiceui rpm: F-7: http://chitlesh.fedorapeople.org/RPMS/F-7/gspiceui-0.8.90-3.fc7.i386.rpm FC-6: http://chitlesh.fedorapeople.org/RPMS/FC-6/gspiceui-0.8.90-3.fc6.i386.rpm You will need to install the following before install gspiceui yum install geda-gnetlist geda-gschem geda-symbols libstdc++ wxGTK ngspice Then install gspiceui : rpm -ivh gspiceui-0.8.90-3.fc6.i386.rpm or rpm -ivh gspiceui-0.8.90-3.fc7.i386.rpm Please note that it currently doesn't support gwave (we are working on it). Is there any another alternative you might advise instead of gwave ? cheers, Chitlesh [1] https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=247402 -- http://clunixchit.blogspot.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: schematic hierarchy netlist problem
OK, thanks for the response. Attached is a very simple hierarchical design. The .pcb and .net files were generated by "gsch2pcb --skip-m4". You can see the U?-? in the .net file. On Wed, 2007-07-18 at 07:11 -0400, John Luciani wrote: > On 7/18/07, Peter Baxendale <[EMAIL PROTECTED]> wrote: > > I don't know where the U?-? comes from. It's not in any of the > > schematics, just in the netlist produced by gsch2pcb. Every net that > > connects to one of the io symbols ends in a U?-?. The line I quoted > > should only have 3 nodes, the extra U?-? looks to be entirely spurious. > > I should have said, I'm using the gschem 1.0.1-20070626 release. > > You may want to post a simple schematic that demonstrates the problem. > > (* jcl *) > -- Peter Baxendale University of Durham [EMAIL PROTECTED] School of Engineering tel +44 191 33 42492 South Road fax +44 191 33 42408 Durham DH1 3LE England simple.tar.gz Description: application/compressed-tar ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
