Re: gEDA-user: Questions about filling/using large nets/fills.
DJ Delorie wrote: First, make sure auto-enforce DRC is *disabled* so it will let you connect to something outside your net. Second, draw a trace/line out to that rectangle/polygon. Third, use the j key to join the trace/line to the rectangle/polygon. If you happen to have through-pins in that area, the thermal tool is used to connect them together. Thanks, that's excellent information. Jim. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Screenshots on www.gpleda.org/
Moin. The screenshot page on gpleda.org is a bit outdated http://www.gpleda.org/screenshots.html * screen fonts are much nicer now * there is no screenshot of a pcb layout * xgsch2pcb is missing * gerbv is not mentioned * There is no screenshot of gschem with light background. I'd volunteer to provide an update. However, this page is not part of the wiki. How would I go about to contribute? ---(kaimartin)--- -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: documentation -- under construction....
In gpleda.org the tools page lists documentation as one of the core tools of geda/gaf: http://www.gpleda.org/tools/index.html This item links to a page that merely says under construction http://www.gpleda.org/tools/docs/index.html Imagine a newbie looking for a new EDA application gets this page. Chances are, that he/she stays away from it. A few days ago someone complained on this list about absent documentation. This may be the reason. IMHO, the link on the tools page should point to http://geda.seul.org/wiki/geda:documentation ---(kaimartin)--- -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: NE 555 and simulation issue
On Tuesday 02 March 2010, Peter Clifton wrote: Gnucap is another advanced simulation environment which might be interesting. It is different to spice, but can accept spice syntax and models etc.. Again, milage will vary as to how well it works with a given model - and it is by no means a drop in replacement for spice, some things are just done differently. Al might chime in and give more info if I've got anything wrong here, as I'm certainly not an expert - and Al ought to know, since he writes Gnucap. Gnucap is not designed as a drop-in replacement of Spice. That would be a waste of time. Rather, it is designed as a followup to Spice, bringing free simulation up to date, and hopefully taking the lead. In commercial simulators, there are lots of them that are just Spice. In that regard, NGspice is our spice. Then there are those that move beyond, in many ways. They sell for a much higher price than any Spice. This is the mixed signal, fast spice and lots of others. The only reason they haven't completely replaced Spice is MARKETING. They can sell a Spice cheap, and make big bucks on the new one. Gnucap is designed with full knowledge of Spice and others, to address the big shortcomings of Spice, and move on. I am referring to the real issues here, not the ones that can be easily fixed. Unfortunately, progress has been hampered by a development team that is far too small, and not much open community involvement. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: compile of pcb fails due to missing epsf.tex
Just did a fresh download of pcb from git. autogen.sh, configure and make all ran fine. However, make install failed due to a missing epsf.tex. I had to install the package texlive-generic-recommended to get this file. -- The configure script should check for the presence of this file. ---(kaimartin)--- -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: NE 555 and simulation issue
On Mon, 08 Mar 2010 11:18:10 -0500, al davis wrote: Unfortunately, progress has been hampered by a development team that is far too small, IMHO, a big obstacle to widespread use of gnucap in geda related projects is missing integration with gschem. A feature to easily export a subset of the current circuit to gnucap would is critical as it significantly lowers the entry barrier. As long as this level of ease is not reached, ltspice is the most rational choice to get the job done for simple circuits. The other big issue I see, is a lack of default models for the most common analog components. As with ease of use, ltspice wins hands down at this discipline. I'd be more than happy to see progress with both these issues. and not much open community involvement. community involvement will develop if the tool gets used by a critical amount of users. No users, no community. So, if the gnucap project is to gain momentum, it needs to concentrate on usability first. ---(kaimartin)--- -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Polygons in PCB
Is there a way to make a square polygon with round edges in pcb? One more unrelated question. Is there a way to place vias with a default soldermask clearance less than 0? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Polygons in PCB
Is there a way to make a square polygon with round edges in pcb? Manually? Sure. Use a zero-length line to form the round bits on an otherwise 8-sided polygon. One more unrelated question. Is there a way to place vias with a default soldermask clearance less than 0? Soldermask opening size is independent of copper size; less than zero means smaller than no opening. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: compile of pcb fails due to missing epsf.tex
Kai-Martin Knaak wrote: Just did a fresh download of pcb from git. autogen.sh, configure and make all ran fine. However, make install failed due to a missing epsf.tex. I had to install the package texlive-generic-recommended to get this file. -- The configure script should check for the presence of this file. any idea of the right way to check? Which particular package is needed to get a working latex (I assume its latex and not texinfo that failed) is going to be very dependent on what packaging system, if any, is used. Which exact step failed? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Filled arrows in gschem
I've noticed in my version of gschem (1.6.0.20091004) some of the symbols (like npn-1.sym) have filled arrows. Is it possible to create these by means other than copying them from a symbol that already has them, or maybe editing the symbol source? I'm looking in the add menu, and don't see anything applicable. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Polygons in PCB
On Mon, Mar 08, 2010 at 09:18:56AM -0800, Anthony Shanks wrote: Is there a way to make a square polygon with round edges in pcb? Not to my knowledge, I have done it by cutting the corners at 45 degrees and adding a non polycon-clearing zero length track at the corner (in one case I also used an track drawn with the arc tool, but I don't remember why, perhaps because there was a component pad/pin in the area). One more unrelated question. Is there a way to place vias with a default soldermask clearance less than 0? Yes, I almost exclusively use tented vias. Enable the soldermask layer and press Shift-K repeatedly until the via is fully covered. Or edit the pcb source file, manually or with a script. Gabriel ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: rant: pcb print from command line
As noted in a different post, I just recompiled pcb from git. Unfortunately, neither git-head nor Peter Cliftons before_pours branch process action scripts when printing from the command line. The main procedure of pcb simply exports before action scripts are read. This is a known bug since more than a year. It was easy enough to fix for a low time hacker like me. So I did in February 2010. rant=on I filed a bug report, I provided a patch on this list, I nagged twice on on this about it. How come, the patch is still not applied to the source? What should I do to get this annoying bug fixed? Yes, I feel ignored by the developers. No, I am not happy about it. /rant ---(kaimartin)--- -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Polygons in PCB
Sorry that was a mis-statement. Is there anyway to place vias that have a soldermask clearance MORE than 0? By default, when I place a via, it has zero soldermask clearance. On Mon, Mar 8, 2010 at 9:40 AM, Gabriel Paubert paub...@iram.es wrote: On Mon, Mar 08, 2010 at 09:18:56AM -0800, Anthony Shanks wrote: Is there a way to make a square polygon with round edges in pcb? Not to my knowledge, I have done it by cutting the corners at 45 degrees and adding a non polycon-clearing zero length track at the corner (in one case I also used an track drawn with the arc tool, but I don't remember why, perhaps because there was a component pad/pin in the area). One more unrelated question. Is there a way to place vias with a default soldermask clearance less than 0? Yes, I almost exclusively use tented vias. Enable the soldermask layer and press Shift-K repeatedly until the via is fully covered. Or edit the pcb source file, manually or with a script. Gabriel ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
Yes, I feel ignored by the developers. No, I am not happy about it. I agree. Those mean developers! Why can't they spend more time on PCB and less time with their families and jobs? They should be ashamed of themselves, not giving free software priority over things like food and shelter. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Polygons in PCB
Is there anyway to place vias that have a soldermask clearance MORE than 0? The code for inserting new vias has a zero hard-coded in the function call (action.c, look for CreateNewVia). ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Polygons in PCB
Why is that? The board house I use (4pcb) requires soldermask clearance for vias. I'm sure they are not the only ones. On Mon, Mar 8, 2010 at 9:49 AM, DJ Delorie d...@delorie.com wrote: Is there anyway to place vias that have a soldermask clearance MORE than 0? The code for inserting new vias has a zero hard-coded in the function call (action.c, look for CreateNewVia). ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: connecting wires
Hi, I drew a circuit in gEDA. I have a small problem. When wires go over another they just go over. I want to draw them with a bump in positions where the wire goes over one over. How can I get this done? Thanks in advance. -- W.H.Kalpa Pathum ... http://kalpapathum.blogspot.com http://thiraya.wordpress.com http://www.twitter.com/callkalpa ... ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Polygons in PCB
Why is that? Because nobody's changed it to do otherwise? The board house I use (4pcb) requires soldermask clearance for vias. I use 4pcb and they do not require soldermask clearance for vias. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Polygons in PCB
I just submitted a board to them a few weeks ago. When I uploaded my gerbers I got hundreds of warnings for having no soldermask clearance. I added their minimum clearance and all of the warnings were gone. Maybe technically since they were warnings its not required, but I didn't want to take a chance. Plus even if they didn't give me warnings, I don't want all my vias covered with soldermask. On Mon, Mar 8, 2010 at 10:03 AM, DJ Delorie d...@delorie.com wrote: Why is that? Because nobody's changed it to do otherwise? The board house I use (4pcb) requires soldermask clearance for vias. I use 4pcb and they do not require soldermask clearance for vias. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Polygons in PCB
On Mon, Mar 08, 2010 at 09:47:55AM -0800, Anthony Shanks wrote: Sorry that was a mis-statement. Is there anyway to place vias that have a soldermask clearance MORE than 0? What I typically do is to se all parameters of a via to be what I want, and then type a on top of the via to perform copies. This way I have very few types of vias. However, I have never used the autorouter (not of much use for microwave signals). Gabriel ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Polygons in PCB
I think their tools don't know the difference between vias and pins, and if you have any vias bigger than the smallest pin, it thinks you have tented pins. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: compile of pcb fails due to missing epsf.tex
On Mon, 2010-03-08 at 12:29 -0500, Dan McMahill wrote:
Kai-Martin Knaak wrote:
Just did a fresh download of pcb from git.
autogen.sh, configure and make all ran fine. However, make
install failed due to a missing epsf.tex. I had to install the package
texlive-generic-recommended to get this file.
-- The configure script should check for the presence of this file.
any idea of the right way to check? Which particular package is needed
to get a working latex (I assume its latex and not texinfo that failed)
is going to be very dependent on what packaging system, if any, is used.
Which exact step failed?
Peter B likes to show off his auto-foo sometimes ;)
Perhaps it would be possible to write a custom test which actually tries
to use latex commands similar to those required by the build.
doc/gs/texinfo.tex seems like it might have the required test.
% @image. We use the macros from epsf.tex to support this.
% If epsf.tex is not installed and @image is used, we complain.
%
% Check for and read epsf.tex up front. If we read it only at @image
% time, we might be inside a group, and then its definitions would get
% undone and the next image would fail.
\openin 1 = epsf.tex
\ifeof 1 \else
% Do not bother showing banner with epsf.tex v2.7k (available in
% doc/epsf.tex and on ctan).
\def\epsfannounce{\toks0 = }%
\input epsf.tex
\fi
\closein 1
If we can make this fragment into a LaTeX run which returns different
exist code depending on the test outcome, we can check this file.
An easier option might be to try finding the file with
kpsewhich epsf.tex
Which on my box returns:
/usr/share/texmf-texlive/tex/generic/epsf/epsf.tex
Regards,
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
___
geda-user mailing list
geda-user@moria.seul.org
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gEDA-user: Looking for my first fab shop.
Are there any fab shops that would be gentle with a very new, very inexperienced PCB designer? OH and reasonable for a prototype. Last time I laid up a board I used a drafting table and mylar. I may need a bit of handholding as I go along. Thanks, Jim. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Filled arrows in gschem
On Mon, 2010-03-08 at 17:25 +, Phil Frost wrote: I've noticed in my version of gschem (1.6.0.20091004) some of the symbols (like npn-1.sym) have filled arrows. Is it possible to create these by means other than copying them from a symbol that already has them, or maybe editing the symbol source? I'm looking in the add menu, and don't see anything applicable. No, sorry for the wild-goose-chase. The path syntax in the file format closely matches that of an SVG path, so if you have something complex to draw, you might like to start out in Inkscape, remembering that you need to start from around a 0,0 origin (putting you in the corner of the gschem page). The file-format accepts all kinds of SVG path syntax, but will save as absolute move-to, line-to and curve-to sections. The file-format is described here: http://geda.seul.org/wiki/geda:file_format_spec?s=file%20format#path And specifically: http://geda.seul.org/wiki/geda:file_format_spec?s=file%20format#path_data An in-gschem path editor is on the agenda for gEDA 1.8.x, but there is no code (that I know of) which has been started yet. It will probably wait for some other re-factorings to settle down before getting written. Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
Are you willing to work with chinese? On Tue, Mar 9, 2010 at 2:30 AM, Jim [1]...@k4gvo.com wrote: Are there any fab shops that would be gentle with a very new, very inexperienced PCB designer? OH and reasonable for a prototype. Last time I laid up a board I used a drafting table and mylar. I may need a bit of handholding as I go along. Thanks, Jim. ___ geda-user mailing list [2]geda-u...@moria.seul.org [3]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:j...@k4gvo.com 2. mailto:geda-user@moria.seul.org 3. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
On Mon, 2010-03-08 at 13:30 -0500, Jim wrote: Are there any fab shops that would be gentle with a very new, very inexperienced PCB designer? OH and reasonable for a prototype. Last time I laid up a board I used a drafting table and mylar. I may need a bit of handholding as I go along. Where are you based? US / Europe / UK? I make the Europe / UK distinction partly to wind up main-land Europeans ;), and partly because I'm far more likely to be able to suggest a fab-house in the UK than (say) Germany. (And yes, UK residents typically use terms like I just came back from Europe, and neglect to remember we're all part of the same union). -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
On Mon, 08 Mar 2010 13:30:14 -0500 Jim j...@k4gvo.com wrote: Are there any fab shops that would be gentle with a very new, very inexperienced PCB designer? OH and reasonable for a prototype. Last time I laid up a board I used a drafting table and mylar. I may need a bit of handholding as I go along. I use Olimex for prototypes. www.olimex.com They're not very high tech and they take a while, but they're reasonably inexpensive and they offer decent quality boards. 41.5 Euros (about $56) gets you a double-sided 160x100mm (about 6 x 3.9) panel with whatever you can cram into it, including going over their 500-hole limit. 8 mil trace/space, 24 mil minimum drill, 5 mil minimum silk. Soldermask on both sides, silk on top (bottom too if you want it). Surface-mount footprints are supported as long as they otherwise fit the 8/8 rule. They have additional board options and they offer discounts for additional panels. They are located in Bulgaria. For me, boards take about two weeks to get to my door from the date I order them. Note: they require a hand-written fax on the first order (security feature, no doubt). -- There are some things in life worth obsessing over. Most things aren't, and when you learn that, life improves. http://starbase.globalpc.net/~ezekowitz Vanessa Ezekowitz vanessaezekow...@gmail.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: compile of pcb fails due to missing epsf.tex
Peter Clifton wrote: An easier option might be to try finding the file with kpsewhich epsf.tex Which on my box returns: /usr/share/texmf-texlive/tex/generic/epsf/epsf.tex Regards That would be my approach. Peter ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: connecting wires
On Mon, 2010-03-08 at 23:27 +0530, W.H. Kalpa Pathum wrote: Hi, I drew a circuit in gEDA. I have a small problem. When wires go over another they just go over. I want to draw them with a bump in positions where the wire goes over one over. How can I get this done? Thanks in advance. Sorry, gschem doesn't support this kind of rendering. We use the style where + is not connected, but + with a blob on the joint is a connection. If you want a connected + crossing, you have to draw the T part first, then add a second net to join at the junction. BTW. Connected + crossings aren't generally recommended, since even with dots, the meaning can be ambiguous. (If the rendering isn't clear). -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
On Mon, 2010-03-08 at 12:37 -0600, Vanessa Ezekowitz wrote: Note: they require a hand-written fax on the first order (security feature, no doubt). Fax, how quaint.. (I think there is a fax machine somewhere in our office.. but I doubt they will be common in 10 years time!) -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
On 03/08/2010 11:30 AM, Jim wrote: Are there any fab shops that would be gentle with a very new, very inexperienced PCB designer? OH and reasonable for a prototype. Last time I laid up a board I used a drafting table and mylar. I may need a bit of handholding as I go along. If you're in US then try BatchPCB if you can stand to wait 3 weeks. http://batchpcb.com/index.php/Home Pretty straight-forward service, reasonable prices for small quantities. Can't say how much hand-holding they'll give, but I have had a bit of helpful back forth with them when first getting started. Eric ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
If this is your first board, I'd go with a shop that is reasonably fast and known for quality work. Fast because: * this is your first board, and you are excited to have it. * this is your first board, and now is the time to make mistakes quickly. Quality work because: * this is your first board, and you don't need to chase any red herrings. On this side of the pond, I'd go for APCircuits or PCBExpress (not to be confused with express PCB). Either will give you a very high quality board, quickly. Either is as easy to work with as ordering a book from Amazon. Either will appear costly compared to slower solutions of less predictable quality. IMHO, today is your day to spend a few more dollars on a PCB and eat a cheap lunch. :) My friends have used Olimex with happy results, although you will wait. I used to be high on SparkFun's BatchPCB, but soured on it after experiencing long waits and getting back junk. Well, not total junk. I ordered multiple units of several different designs, and got back nearly 2X of each that I ordered. OK, at first I'm thinking they felt generous when they were panelizing, nice customer service. Turns out, many were bad boards. I think somebody *knew* they had just created a batch of dodgy boards, and ran another batch of panels and sent the whole output to their customers to sort it out. I consider 60% yield, expecting the customer to weed out the pigs, as unacceptable quality. The BatchPCB vendor is Gold Phoenix, a Chinese vendor. If you are outside North America, then APCircuits or PCBExpress may not be cost effective options. -dave On Mar 8, 2010, at 10:36 AM, jason duhamell wrote: Are you willing to work with chinese? On Tue, Mar 9, 2010 at 2:30 AM, Jim [1]...@k4gvo.com wrote: Are there any fab shops that would be gentle with a very new, very inexperienced PCB designer? OH and reasonable for a prototype. Last time I laid up a board I used a drafting table and mylar. I may need a bit of handholding as I go along. Thanks, Jim. ___ geda-user mailing list [2]geda-u...@moria.seul.org [3]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:j...@k4gvo.com 2. mailto:geda-user@moria.seul.org 3. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
I can only recommend the company that I use to make my pcb's. [1]fz...@126.com from huizhou in china that is very easy to work with and very professional at a good price. usually less then 2 dollars a board for samples. On Tue, Mar 9, 2010 at 2:57 AM, Dave N6NZ [2]n...@arrl.net wrote: If this is your first board, I'd go with a shop that is reasonably fast and known for quality work. Fast because: * this is your first board, and you are excited to have it. * this is your first board, and now is the time to make mistakes quickly. Quality work because: * this is your first board, and you don't need to chase any red herrings. On this side of the pond, I'd go for APCircuits or PCBExpress (not to be confused with express PCB). Either will give you a very high quality board, quickly. Either is as easy to work with as ordering a book from Amazon. Either will appear costly compared to slower solutions of less predictable quality. IMHO, today is your day to spend a few more dollars on a PCB and eat a cheap lunch. :) My friends have used Olimex with happy results, although you will wait. I used to be high on SparkFun's BatchPCB, but soured on it after experiencing long waits and getting back junk. Well, not total junk. I ordered multiple units of several different designs, and got back nearly 2X of each that I ordered. OK, at first I'm thinking they felt generous when they were panelizing, nice customer service. Turns out, many were bad boards. I think somebody *knew* they had just created a batch of dodgy boards, and ran another batch of panels and sent the whole output to their customers to sort it out. I consider 60% yield, expecting the customer to weed out the pigs, as unacceptable quality. The BatchPCB vendor is Gold Phoenix, a Chinese vendor. If you are outside North America, then APCircuits or PCBExpress may not be cost effective options. -dave On Mar 8, 2010, at 10:36 AM, jason duhamell wrote: Are you willing to work with chinese? On Tue, Mar 9, 2010 at 2:30 AM, Jim [1][3]...@k4gvo.com wrote: Are there any fab shops that would be gentle with a very new, very inexperienced PCB designer? OH and reasonable for a prototype. Last time I laid up a board I used a drafting table and mylar. I may need a bit of handholding as I go along. Thanks, Jim. ___ geda-user mailing list [2][4]geda-u...@moria.seul.org [3][5]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:[6]...@k4gvo.com 2. mailto:[7]geda-u...@moria.seul.org 3. [8]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list [9]geda-u...@moria.seul.org [10]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list [11]geda-u...@moria.seul.org [12]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:fz...@126.com 2. mailto:n...@arrl.net 3. mailto:j...@k4gvo.com 4. mailto:geda-user@moria.seul.org 5. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user 6. mailto:j...@k4gvo.com 7. mailto:geda-user@moria.seul.org 8. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user 9. mailto:geda-user@moria.seul.org 10. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user 11. mailto:geda-user@moria.seul.org 12. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
I've used 4pcb (US, via www.barebones.com, www.33each.com, and other specials) as well as www.pcb-pool.com (EU). @126.com I hate this ISP, but only because of their non-stop spamming of usenet (mostly for pcb fab work!). They're on my permanent blacklist and I refuse to do business with anyone who supports them. If they have so little respect for the community, how much respect will they have for their customers? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
[1]126.com is just a email like [2]gmail.com, what are you talking about? On Tue, Mar 9, 2010 at 3:08 AM, DJ Delorie [3...@delorie.com wrote: I've used 4pcb (US, via [4]www.barebones.com, [5]www.33each.com, and other specials) as well as [6]www.pcb-pool.com (EU). @[7]126.com I hate this ISP, but only because of their non-stop spamming of usenet (mostly for pcb fab work!). They're on my permanent blacklist and I refuse to do business with anyone who supports them. If they have so little respect for the community, how much respect will they have for their customers? ___ geda-user mailing list [8]geda-u...@moria.seul.org [9]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. http://126.com/ 2. http://gmail.com/ 3. mailto:d...@delorie.com 4. http://www.barebones.com/ 5. http://www.33each.com/ 6. http://www.pcb-pool.com/ 7. http://126.com/ 8. mailto:geda-user@moria.seul.org 9. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
On Mon, 2010-03-08 at 13:30 -0500, Jim wrote: Are there any fab shops that would be gentle with a very new, very inexperienced PCB designer? OH and reasonable for a prototype. Last time I laid up a board I used a drafting table and mylar. I may need a bit of handholding as I go along. In my experience, most PCB manufacturers cope with newbies reasonably well. Is it in their interest to do so! In the UK there's PCB Train: http://www.pcbtrain.co.uk/ They at least have a web interface that'll immediately generate a quote for you, and take design submissions through the website. A number of friends and myself have used them fairly regularly. Their express service is extremely useful and cheap! The one thing that you should make sure you're aware of is that paying the extra for electrical test is going to be worth it. PCB Train will sell (and I'm sure other manufacturers will too) you boards that haven't been electrically tested, which I've been stung by in past. It's not pleasant having to manually beep every via on a board with a multi-meter! Rob signature.asc Description: This is a digitally signed message part ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
I would also go with fast and quality for the reasons that Dave stated. I would use PCB Express or Advanced Circuits. Highest quality boards in 2-5 days (depending on service). If you have more than one design panelize and cut them yourself. If you have friends that want PCBs group all your designs. (* jcl *) -- You can't create open hardware with closed EDA tools. twitter: http://twitter.com/jluciani blog:http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
Are there any fab shops that would be gentle with a very new, very inexperienced PCB designer? OH and reasonable for a prototype. Last time I laid up a board I used a drafting table and mylar. I may need a bit of handholding as I go along. I had my OSDCU board fabbed at Sierra Circuits (protoexpress.com). It certainly ought to meet the inexperienced first-timer requirement, as it was my life's first hardware design, and I am a software/firmware guy who got into designing hardware because I wanted to play with toys that didn't already exist because apparently they are of no use/interest to anyone in the world but me. I really liked Sierra's service and quality. To get an idea of just what I mean by my life's first HW design, see this page: http://ifctfvax.Harhan.ORG/OpenWAN/OSDCU/ Includes schematics, PCB prints and a high-resolution photo of the finished board. MS ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
On Mon, 08 Mar 2010 18:37:57 +, Peter Clifton wrote: I'm far more likely to be able to suggest a fab-house in the UK than (say) Germany. In that case, others on the list can jump in ;-) ---(kaimartin)---(who gets his prototypes done by http://basista.com ) -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
On 03/08/2010 12:28 PM, Kai-Martin Knaak wrote: ---(kaimartin)---(who gets his prototypes done by http://basista.com ) Odd - that resolves to a furniture store for me. Diversification! Eric ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
On Mon, Mar 8, 2010 at 9:48 AM, DJ Delorie d...@delorie.com wrote: Yes, I feel ignored by the developers. No, I am not happy about it. I agree. Those mean developers! Why can't they spend more time on PCB and less time with their families and jobs? They should be ashamed of themselves, not giving free software priority over things like food and shelter. He said nothing about developers spending too little time on the project, I think everyone understands about real life and appreciates the time put into the project. He said he was being ignored, which is an orthogonal issue. Clearly time has been spent by the developers working on PCB since Kai-Martin has submitted those patches, so it's a matter of prioritizing the time spent on the project, not prioritizing things in your own life. I believe part of the priviledge of having commit access to the public repository involves the responsibility to spend some of the small amount of time you have for the project going through and applying or denying and commenting on community contributions instead of just working on your own pet sub-project. I can't complain too loudly since all of my patches have eventually made it in, but it still irks me that this happens and I've seen a lot of good functionality and quality patches ignored. As an example Stephen and the other devs working on Icarus Verilog are fantastic about this and may provide a good example of how this could be done. Of course that may just be that Steve is able and willing to put in the extra time as the benevolent dictator of the project. One thing that I believe they do that could apply here (I could be wrong and maybe they will correct me) is while Steve is spending time working on a big re-work or feature, Cary forgoes the fun part of working on new features and does the grunt work of fixing bugs and going through community contributions and stuff. Then it will be Cary's turn next to work on something fun while Steve does some grunt work. However Steve manages to make it work, it certainly makes me want to spend more time working on Icarus every time I put a patch in, whereas I'm often hesistant to work on PCB, wondering if it will be ignored or not. Just some thoughts... carry on. :) Jared ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
On Mon, 08 Mar 2010 12:31:47 -0700, Eric Brombaugh wrote: (who gets his prototypes done by http://basista.com ) Odd - that resolves to a furniture store for me. Diversification! Sorry, I should have checked. Their domain is genuinely German: http://basista.de ^^ BTW, the website just got a redesign. It looks much fancier than last week. Their pcb service is high quality,though. Last time I got shorted tracks from them was back in 2003... ---(kaimartin)--- -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
On Mar 8, 2010, at 11:17 AM, Michael Sokolov wrote: Are there any fab shops that would be gentle with a very new, very inexperienced PCB designer? OH and reasonable for a prototype. Last time I laid up a board I used a drafting table and mylar. I may need a bit of handholding as I go along. I had my OSDCU board fabbed at Sierra Circuits (protoexpress.com). It certainly ought to meet the inexperienced first-timer requirement, as it was my life's first hardware design, and I am a software/firmware guy who got into designing hardware because I wanted to play with toys that didn't already exist because apparently they are of no use/interest to anyone in the world but me. I really liked Sierra's service and quality. To get an idea of just what I mean by my life's first HW design, see this page: I am going to agree with sierra proto express. The one time they screwed up a board design, A split ground plane became a full ground plane. I had my replacement boards the next day. Good service, and quality boards. They will even help you out with assembly services. Steve http://ifctfvax.Harhan.ORG/OpenWAN/OSDCU/ Includes schematics, PCB prints and a high-resolution photo of the finished board. MS ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
I agree that PCB needs more grunt work from the (we) primary developers. At this time, I rarely have time to even work on my own pet projects. The last couple of code sprints, I've done nothing *but* bug/patch reviews, since I understand it's an important part of a project. So what can we do? How can we get people with *less* experience more involved in solving this problem? That opens up the labor pool so to speak, letting the main developers work on the hard problems. How about this idea: * Someone (or multiple people) who is NOT a developer sets up a local PCB git repository (or a branch on the master). * That respository pulls patches from SF, other git trees, and the mailing list. * That group of people ONLY verify that the patches integrate with the current master sources, build properly for the major HIDs, and function as intended. Feedback about usability, documentation, etc would be nice, but that's not the intent here. * That group recommends tested and usable patch sets for inclusion in the master branch, and one of the developers pulls it in. Obviously, we may defer the pull if we're close to a release, but we should accept greater risk otherwise. This new group would act as a sort of QA group, and they could independently grow their own heirarchy of workers and git repositories. Knowledge of PCB internals, or even development in general, is *not* needed - if such a need is seen by them, they redirect those issues to the developers. Here's a second idea that might help: * A group of non-developers watch for bug reports, either in the mailing list or the SF tracker. * They attempt to reproduce each bug, and make sure the bug is fully documented as far as how to reproduce, workarounds, platform dependencies, etc. * They can migrate non-SF bugs to SF. * bugs that are reproducible, and really are bugs (and not just misunderstandings) get flagged for developers to work on. Non-bugs get documented and closed. * They can re-verify bugs as PCB development happens, and close any that are no longer bugs. * They also do pre-release testing and post-release verification to make sure fixed bugs get verified by the originator and closed. This second group is sort of a front line support group, and again, knowledge of PCB development is *not* needed - you only have to be a PCB user, and by pre-processing bug reports and keeping track of what the developers *do* need to work on, you reduce our workload. Obviously, these two new groups could work together to acquire simple patches for simple bugs, prioritize tasks for the developers based on user feedback and need, etc. Just as obviously, these ideas only work if someone agrees to own them and see them through. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Native Mac OS X?
On Mar 5, 2010, at 10:25 PM, Dave McGuire wrote: On Mar 5, 2010, at 7:54 PM, Steven Michalske wrote: Ahhh... OK, I get it. Yes, my build brings up the X server. But other than the start-up time, that doesn't bother me. X11 is preinstalled as of 10.6 (or maybe 10.5, I forget which) so the hassle factor is pretty minimal. 10.6 seems to define a $DISPLAY environment variable in a way that makes it a hook to a launcher that brings up X11.app on demand. This feature existed in Leopard as well, but many folks had set DISPLAY in their profiles and overrode the launcher. In 10.5 and beyond you want to not set DISPLAY in your profile. Feature? This isn't how X works, it's not how X EVER worked, and it's not how X is SUPPOSED to work. Wow I wonder what they were smoking when they did this. My statement was that you as a user should not override the setting that the computer configured for you. If you misread that as In OSX we don't use the DISPLAY variable at all, then ignore the rest. If you don't use leopard or snow leopard, then go use it for a month, and then complain with the integration of SSH and X11 as niceties for power users. Otherwise, please elaborate on the misfeature It might be a bug; then I'll file a report for you. 10.5 and beyond add a launch agent that sets your DISPLAY environment variable to a X11 helper. This helper points to X11 on you mac so that you get seamless integration of launching X11 apps from your terminal. Are you saying that I must override what the terminal did and manually launch X11 to use it properly? When I SSH in to a computer the helper doesn't set the DISPLAY variable, SSH sets it on the remote computer. The helper only sets DISPLAY for you when it is required to make X11 work seamlessly. How is this a bad thing, letting my computer that understands the rules for using X11 as a foreign window manager in it's own window managing environment? Steve ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
* A group of non-developers watch for bug reports, either in the mailing list or the SF tracker. How good are people at actually logging bugs on the SF tracker? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
How good are people at actually logging bugs on the SF tracker? I suspect our lack of attention to them has prompted them to be less good at reporting them there. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Looking for my first fab shop.
On Mon, 08 Mar 2010 18:50:04 + Peter Clifton pc...@cam.ac.uk wrote: On Mon, 2010-03-08 at 12:37 -0600, Vanessa Ezekowitz wrote: Note: they require a hand-written fax on the first order (security feature, no doubt). Fax, how quaint.. I know, I always thought it was a little odd of them to stick to such old technology, but that's the way they like it I guess. -- There are some things in life worth obsessing over. Most things aren't, and when you learn that, life improves. http://starbase.globalpc.net/~ezekowitz Vanessa Ezekowitz vanessaezekow...@gmail.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
On Mon, 2010-03-08 at 17:40 +, Kai-Martin Knaak wrote: rant=on I filed a bug report, I provided a patch on this list, I nagged twice on on this about it. How come, the patch is still not applied to the source? What should I do to get this annoying bug fixed? Yes, I feel ignored by the developers. No, I am not happy about it. /rant Some developers - like (sorry to say, I'm speaking purely for myself here), are damned right lazy, and sometimes need a little cajoling to get things done. I get a lot of email, and messages I've flagged as unread or important to remind me about them often get buried. I have 587 unread messages in my geda-user mailbox currently. Mostly from a period when I was away, but many are things I (at the time) thought I would take a second look at. Getting patches merged is sometimes about reminding people, and making things _easy_ for them.. If I want someone to build test my repository, or look at a patch - I send a link, and possibly even commands to step-by-step check out the repository, for example. I'm about 90% more likely to look at something if someone provides me a click-able link, than says it is sourceforge bug #12345, or just says my patch is in the bug tracker. Similarly, patches are more likely to get applied if they are small, and come with a header specifying the commit message and detailed reasoning about what the patch is for (and expected changes in behaviour). KMK, I've found the patch you're referring to in my email client, but it makes me nervous to apply it directly. Touching hidnogui.c to remove the CRASH; statement - why is that needed? The patch isn't from a local git commit, so doesn't have a log entry explaining what it does. As a developer applying your patch, I would have to figure that out, and write one (possibly incorrect), or I'd have to come back and query you for it. By applying the patch, I'm effectively vouching for it, and that is difficult to do without testing. Since I don't know what the patch's intended changes are... testing is hard! I have to reverse engineer what the patch is supposed to change, and invent a test-case. (Remember that I'm lazy... hacking on my own pet project stuff has a much lower entry level!) Trawling email on this specific patch: A patch produced by this simple approach is attached. It moves the processing of action scripts and strings a little up. So they are executed with export options too. The file hidnogui.c needs a little patch to, to not exit if nogui_invalidate_lr is hit. The idea seems reasonable, but the patch is potentially dangerous to me, since many things in PCB rely on the GUI being up to work. I need to see some evidence of what testing has been performed to make sure things are safe. (You might also include the detail that the patch doesn't change any behaviour for PCB invocations which aren't passed an action script). This is an example of the kind of side-effect you might expect to see because the GUI is expected to be up. HID error: pcb called GUI function nogui_invalidate_lr without having a GUI available. Grep couldn't didn't find this function anywhere else in the source. So I am a bit clueless where this error message is triggered. As a workaround I simply commented the corresponding CRASH line in hidnogui.c The workaround worries me. It might be a valid thing to do, but I want to know why - and I've probably not got the time to figure it out myself. Is this the _only_ side-effect of the patch? I know PCB's startup code has been fragile before now, this is why I'm reluctant to dive in and just apply patches changing code I'm not currently intimately familiar with. FWIW, gdb ought to show you what is happening when the CRASH call is triggered, and if it doesn't help you identify the issue - taking it up with a PCB developer might reveal something more. Some of this failure to apply patches is down to the I'm busy - or unsure, perhaps someone knows better and will look at it... syndrome. I'm sure everyone things this, and nothing gets done. If you want to approach someone directly (albiet this isn't the usual suggestion of how to interact), you might email me, or one of the other PCB developers, and ask to work through getting the patch committed on IRC. Peter B and I often write patches and review each others work this way. We might be able to fix whatever is causing the GUI updates, or declare that the workaround you proposed is in fact harmless. In any case, we don't usually /* comment out */ code we've decided to remove. It leads to a load of cruft over time. At most, you might put, /* NB: This function is a NOP. We don't call CRASH; as in other hidnogui * functions, since this function can be called when exporting from * a command line specified aciton script. */ Much more verbose, but very clear to anyone than just wondering why /* CRASH; */ is commented out. It might seem unfair that we're (or I am) trying to third party
Re: gEDA-user: rant: pcb print from command line
Touching hidnogui.c to remove the CRASH; statement - why is that needed? hidnogui was designed to be a template for new HIDs, so everything crashes when called - that's how you know which function needs to be implemented next. Perhaps we need two hids - hidnogui for command-line use, and hidtemplate with all the CRASHes ? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
On Mon, Mar 8, 2010 at 4:00 PM, DJ Delorie d...@delorie.com wrote: How good are people at actually logging bugs on the SF tracker? I suspect our lack of attention to them has prompted them to be less good at reporting them there. I submitted my first PCB bug report to SF last month (#2946254), and shortly after added a patch that fixed the problem. I must admit that the lack of response was discouraging - but I fully appreciate that the developers are time poor (I am also!). BTW thank you to Rikster, for taking the time to try the patch confirm that it fixes the bug, and posting the result back to SF :-) Steve Ecob ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
On Mon, Mar 8, 2010 at 12:10 PM, DJ Delorie d...@delorie.com wrote: So what can we do? How can we get people with *less* experience more involved in solving this problem? That opens up the labor pool so to speak, letting the main developers work on the hard problems. How about this idea: I like the ideas, but am not sure if there will be enough support to staff two new groups with those not already developers.It seems like step #1a would be to clean up the SF repository of patches and bugs. Given access to change things on SF I'd be willing to start trudging through and cleaning it up if there was enough reason to believe that it would eventually be used. I would also be wiling to host a git repo to apply and test patches to for eventual inclusion in the public repo, again with the assurance that eventually it would get pulled in. However, alone I'm not sure if I'd make progress fast enough to keep up. Another problem is I unfortunately don't have much time for PCB development lately (as it isn't part of my day job), so don't actually use the software very much, so am probably not the best tester of new patches. (but I want to help because when I do get around to doing a PCB here and there, I like to have nice open source tools to do it with :) It'd be nice to get people to volunteer for this group who use PCB on a regular basis and would actual non-trivially test patches before they were recommended for the main line. The benefit I see of being in this group is the ability to get your own patches in front of the line. :) Jared ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
On Mon, 2010-03-08 at 16:41 -0500, Stephen Ecob wrote: On Mon, Mar 8, 2010 at 4:00 PM, DJ Delorie d...@delorie.com wrote: How good are people at actually logging bugs on the SF tracker? I suspect our lack of attention to them has prompted them to be less good at reporting them there. I submitted my first PCB bug report to SF last month (#2946254), and shortly after added a patch that fixed the problem. I must admit that the lack of response was discouraging - but I fully appreciate that the developers are time poor (I am also!). BTW thank you to Rikster, for taking the time to try the patch confirm that it fixes the bug, and posting the result back to SF :-) Now.. if you'd read my last mail, you might have been clued up to post a link to the source-forge bug. Given a bug, a patch, and a confirmation that it has been tried, and works... it might be one which could be applied right away! It certainly got my attention, but stopped short because finding bugs on sourceforge without a link is a ROYAL PAIN. For anyone keen, this is the link: http://sourceforge.net/tracker/?func=detailaid=2946254group_id=73743atid=538811 I'm not intimately familiar with the auto-router (and don't use it), so independent verification is good. The patch looks good to me (although I've only skimmed it). It might warrant a definition of what a freckle is, if that term isn't use elsewhere. The optimisation is probably fine to add. A complete fix would address the issue in the auto-router as well. I'm happy to apply the patch, but I'm heading home now, as its getting late. Someone bug me to apply the patch! -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: PCB Bugmail
Please can someone set up a mailing list (or point me at the existing one if there is such a thing) which tracks bugmail from PCB's sourceforge tracker. I see the gEDA and gerbv bugs which appear in their respective bug mailing lists, and I find that is usually a first step towards me being aware about what bugs people are submitting. (Only new bugs create mail for gEDA, not further comments). Or - in my ideal word, can we just dump the crappy sourceforge bug trackers and switch to Launchpad??? (Pretty please). Bug URLs then become much saner: https://bugs.launchpad.net/ubuntu/+bug/401028 Not: http://sourceforge.net/tracker/?func=detailaid=2946254group_id=73743atid=538811 Navigating to the tracker is also easier (IMO) from Launchpad, and the bug information seems better presented. The trackers aren't hidden behind the develop option as on sourceforge. Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
Since I'm in the mood to share my opinions today... :) On Mon, Mar 8, 2010 at 1:30 PM, Peter Clifton pc...@cam.ac.uk wrote: It might seem unfair that we're (or I am) trying to third party contributions to a higher standard than some of PCB's existing legacy code, but assuming it doesn't completely stifle contribution, encouraging high standard commits should aid PCB's long term quality. I think holding new additions, either from third parties or the devs, to a higher standard than existing code is a good thing. On the other hand, I am reluctant to bash down people's patch contributions with continual bombardment to polish them endlessly. Falling back to the I'm busy stance is lots less confrontational than me batting the patch back to you and demanding revisions before I apply it. Perhaps we should just apply the patch as is, and catch any bugs (if) they appear. I don't want to discourage future contributions. I think your email is a great response to KMK and loads better than ignoring it, saying I'm busy, or even applying it without being happy with it. I don't think it is inappropriate for devs to require contributors to follow guidelines and a certain standard (to a certain extent). It would be nice if we could agree on a standard format and process, which I guess is part of DJ's plan. Jared ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB Bugmail
On Mon, Mar 8, 2010 at 2:09 PM, Peter Clifton pc...@cam.ac.uk wrote: Or - in my ideal word, can we just dump the crappy sourceforge bug trackers and switch to Launchpad??? (Pretty please). I'd like to add my vote for anything but sourceforge to track bugs and patches. :) Jared ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
The patch looks good to me (although I've only skimmed it). It might warrant a definition of what a freckle is, if that term isn't use elsewhere. It looks OK to me (assuming a comment explaining *why* it's needed is added) but I wonder if one of the other optimizations is creating these freckles. I know one of the optimizations djopt does is to split lines when they intersect pins/pads, perhaps that code could just omit freckles rather than create them? (if that's what's happening, that is). ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB Bugmail
On Mon, Mar 8, 2010 at 5:15 PM, Jared Casper jaredcas...@gmail.com wrote: On Mon, Mar 8, 2010 at 2:09 PM, Peter Clifton pc...@cam.ac.uk wrote: Or - in my ideal word, can we just dump the crappy sourceforge bug trackers and switch to Launchpad??? (Pretty please). I'd like to add my vote for anything but sourceforge to track bugs and patches. :) Jared +1. I love SF the service it provides to the community, but there are *much* better tools for issue tracking. Steve Ecob ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB Bugmail
Definitely +1! Greetings Denis Am 08.03.2010, 23:15 Uhr, schrieb Jared Casper jaredcas...@gmail.com: On Mon, Mar 8, 2010 at 2:09 PM, Peter Clifton pc...@cam.ac.uk wrote: Or - in my ideal word, can we just dump the crappy sourceforge bug trackers and switch to Launchpad??? (Pretty please). I'd like to add my vote for anything but sourceforge to track bugs and patches. :) Jared ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
On Mon, Mar 8, 2010 at 5:17 PM, DJ Delorie d...@delorie.com wrote: The patch looks good to me (although I've only skimmed it). It might warrant a definition of what a freckle is, if that term isn't use elsewhere. It looks OK to me (assuming a comment explaining *why* it's needed is added) but I wonder if one of the other optimizations is creating these freckles. I know one of the optimizations djopt does is to split lines when they intersect pins/pads, perhaps that code could just omit freckles rather than create them? (if that's what's happening, that is). The problem is that the autorouter often creates 90 degree joints where one line overshoots the joint by 0.01 thou. When djopt is then run, it splits the overshooting line to create a good line plus a 0.01 thou long freckle. These freckles prevent the mitering optimiser from kicking in. So yes, djopt creates the freckles, but only because the autorouter made the 0.01 thou overshoots in the first place. An ideal solution would fix the autorouter, but unfortunately my half day time budget for fixing the problem only went as far as patching djopt.c. I did have a quick try at fixing the autorouter, but ended up with strange results - so a workaround in djopt.c had to suffice. I'll tidy up the patch to add the explanation resubmit it - but if anyone has time to fix the deeper issue in the autorouter it would of course be the better solution :) Steve Ecob ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: compile of pcb fails due to missing epsf.tex
On Mon, 08 Mar 2010 12:29:04 -0500, Dan McMahill wrote:
make install failed due to a missing
epsf.tex. I had to install the package texlive-generic-recommended to
get this file. -- The configure script should check for the presence
of this file.
any idea of the right way to check?
The utility kpsewhich is used by latex to locate its files. It can be
used independently and outputs the full path to the file. If there is
no such file the utility just returns.
Which particular package is needed to get a working latex
The epsf package:
http://ctan.tug.org/tex-archive/macros/generic/epsf/
Which exact step failed?
During make, when building the documentation:
/--
$ make
(...)
make all-am
make[3]: Entering directory `/usr/local/pcb-src/pcjc2/doc'
/usr/bin/perl ./extract-docs .
actions
00delta 00macros 00macros common 00objects About gtk
About lesstif AddRats AdjustSizes lesstif AdjustStyle gtk
AdjustStyle lesstif ApplyVendor Atomic Attributes
AutoPlaceSelected AutoRoute Benchmark lesstif Center gtk
ChangeClearSize ChangeDrillSize ChangeFlag ChangeHole
ChangeJoin ChangeName ChangeOctagon ChangePaste
ChangePinName ChangeSize ChangeSquare ClearOctagon
ClearSquare ClrFlag Command lesstif Connection Cursor gtk
Cursor lesstif Debug lesstif DebugXY lesstif Delete
DeleteRats DisableVendor DisperseElements Display djopt
DoWindows gtk DoWindows lesstif DRC DumpKeys lesstif
DumpLibrary EditLayerGroups gtk EditLayerGroups lesstif
elementlist elementsetattr EnableVendor execcommand
ExecuteFile Export lesstif Flip FontEdit FontSave
FreeRotateBuffer GetXY gtk GetXY lesstif GlobalPuller h
import l LayersChanged common le LibraryChanged common
LibraryShow lesstif Load lesstif LoadFootprint LoadFrom
LoadVendor lesstif LoadVendorFrom m MarkCrosshair Message
MinClearGap MinMaskGap Mode MorphPolygon MoveLayer
MoveObject MoveToCurrentLayer Netlist NetlistChanged
common NetlistShow lesstif New OptAutoOnly Pan gtk
PasteBuffer PCBChanged common Polygon Popup gtk Print gtk
Print lesstif PrintCalibrate gtk PrintCalibrate lesstif
PromptFor lesstif Puller q q! Quit Redo RemoveSelected
Renumber Report ReportDialog Return lesstif RipUp rn
RouteStyle RouteStylesChanged common s Save gtk Save
lesstif SaveSettings SaveTo Select SelectLayer gtk
SelectLayer lesstif SetFlag SetOctagon SetSame SetSquare
SetThermal SetUnits gtk SetUnits lesstif SetValue
SwapSides gtk SwapSides lesstif ToggleHideName ToggleVendor
ToggleView gtk ToggleView lesstif Undo UnloadVendor
Unselect w wq Zoom gtk Zoom lesstif
pcbfile
00pcb Arc Attribute Connect Cursor DRC Element
ElementArc ElementLine FileVersion Flags Grid Groups
Layer Line Mark Net Netlist Pad Pin PolyArea Polygon
Rat Styles Symbol SymbolLine Text Thermal Via
~objectflags ~pcbflags
restore=: backupdir=.am$$ \
am__cwd=`pwd` CDPATH=${ZSH_VERSION+.}: cd . \
rm -rf $backupdir mkdir $backupdir \
if (/bin/sh /usr/local/pcb-src/pcjc2/missing --run makeinfo --version)
/dev/null 21; then \
for f in pcb.info pcb.info-[0-9] pcb.info-[0-9][0-9] pcb.i[0-9]
pcb.i[0-9][0-9]; do \
if test -f $f; then mv $f $backupdir; restore=mv; else :; fi; \
done; \
else :; fi \
cd $am__cwd; \
if /bin/sh /usr/local/pcb-src/pcjc2/missing --run makeinfo -I . \
-o pcb.info pcb.texi; \
then \
rc=0; \
CDPATH=${ZSH_VERSION+.}: cd .; \
else \
rc=$?; \
CDPATH=${ZSH_VERSION+.}: cd . \
$restore $backupdir/* `echo ./pcb.info | sed 's|[^/]*$||'`; \
fi; \
rm -rf $backupdir; exit $rc
rm -rf pcb.htp
if /bin/sh /usr/local/pcb-src/pcjc2/missing --run makeinfo --html
--css-include=./pcb.css --no-split -I . \
-o pcb.htp pcb.texi; \
then \
rm -rf pcb.html; \
if test ! -d pcb.htp test -d pcb; then \
mv pcb pcb.html; else mv pcb.htp pcb.html; fi; \
else \
if test ! -d pcb.htp test -d pcb; then \
rm -rf pcb; else rm -Rf pcb.htp pcb.html; fi; \
exit 1; \
fi
TEXINPUTS=.:$TEXINPUTS \
MAKEINFO='/bin/sh /usr/local/pcb-src/pcjc2/missing --run makeinfo -I
.' \
/usr/bin/texi2dvi pcb.texi
This is pdfTeXk, Version 3.141592-1.40.3 (Web2C 7.5.6)
file:line:error style messages enabled.
%-line parsing enabled.
entering extended mode
(./pcb.texi (./texinfo.tex Loading texinfo [version 2005-01-30.17]: Basics,
pdf, fonts, page headings, tables, conditionals, indexing, sectioning, toc,
environments, defuns, macros, cross references, insertions, localization,
and turning on texinfo input format.) (./version.texi) [1] [-1] (Copying)
(History) [1] [2] Chapter 1 [3] Chapter 2 [4]
Cross
Re: gEDA-user: Screenshots on www.gpleda.org/
I'd volunteer to provide an update. However, this page is not part of the wiki. How would I go about to contribute? Post some updated screenshots. Please make sure that they scale reasonably to something thumbnailed sized or such. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
When djopt is then run, it splits the overshooting line to create a good line plus a 0.01 thou long freckle. Perhaps it shouldn't do that, then :-) But keep the other code too, in case someone else does it. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Screenshots on www.gpleda.org/
On Mon, 2010-03-08 at 17:41 -0500, Ales Hvezda wrote: I'd volunteer to provide an update. However, this page is not part of the wiki. How would I go about to contribute? Post some updated screenshots. Please make sure that they scale reasonably to something thumbnailed sized or such. Tips for that scalling.. I've foudn that using gimp with the Sinc (Lanczos3) interpolation seems to give good results on images with fine line detail. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: compile of pcb fails due to missing epsf.tex
Kai-Martin Knaak wrote: Just did a fresh download of pcb from git. autogen.sh, configure and make all ran fine. However, make install failed due to a missing epsf.tex. I had to install the package texlive-generic-recommended to get this file. -- The configure script should check for the presence of this file. check added. Seems to work here. -Dan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gEDA user: gnetlist -gdrc buffer overflow and gnetlist -gspice-sdb killed
Hi again, I was on a trip so sorry for the delay. Respect for the above comments I make some tests on other hardware. My laptop hardware (1 processor): Intel Core 2 Duo P8600 Mobile processor CPU speed: 2.4 GHz FSB: 1066 MHz L2 cache: 3MB RAM: 4GB OS: Ubuntu facu...@uni-laptop:~$ uname -a Linux uni-laptop 2.6.31-19-generic #56-Ubuntu SMP Thu Jan 28 02:39:34 UTC 2010 x86_64 GNU/Linux Server hardware (dual processor board): Intel Xeon X5560 server processor (4 cores per processor) CPU speed: 2.8GHz Intel QPI: 6.4GT/s L3 Cache: 8MB RAM: 12GB OS: RHEL [r...@pepinillo schem]# uname -a Linux pepinillo 2.6.18-164.el5 #1 SMP Tue Aug 18 15:51:48 EDT 2009 x86_64 x86_64 x86_64 GNU/Linux When I ran on this server gnetlist alloc more than 95% of the RAM and at this point started to swap and when all the swap was allocated the 'top' command is not refreshed properly and I have a hard work trying to stop gnetlist. I made a second run stopping all the services and I left running on my work. Tomorrow I'll see the output but definitely there is something wrong with the netlister. Thanks. On Wed, Mar 3, 2010 at 8:43 AM, John Doty [1]...@noqsi.com wrote: On Mar 1, 2010, at 1:44 AM, al davis wrote: On Sunday 28 February 2010, John Doty wrote: Ah, but it has an open interface we can use. A great strength of gEDA is that the tools play well with other tools, whether they are part of gEDA or not. I don't care how many proprietary tools you can leverage by starting the schematic on gschem. But I do. I have projects that need to get done. I do care how much of a design you can do with a 100% free/open- source flow, and how well that kind of flow works. That's ideology. But FOSS doesn't win because of ideology: it wins when it does a better job. And part of doing a better job is playing better with foreign tools. John Doty Noqsi Aerospace, Ltd. [2]http://www.noqsi.com/ [3]...@noqsi.com ___ geda-user mailing list [4]geda-u...@moria.seul.org [5]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user -- Facundo J Ferrer References 1. mailto:j...@noqsi.com 2. http://www.noqsi.com/ 3. mailto:j...@noqsi.com 4. mailto:geda-user@moria.seul.org 5. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB Bugmail
Peter Clifton wrote: Please can someone set up a mailing list (or point me at the existing one if there is such a thing) which tracks bugmail from PCB's sourceforge tracker. I see the gEDA and gerbv bugs which appear in their respective bug mailing lists, and I find that is usually a first step towards me being aware about what bugs people are submitting. (Only new bugs create mail for gEDA, not further comments). Or - in my ideal word, can we just dump the crappy sourceforge bug trackers and switch to Launchpad??? (Pretty please). So you are saying you get a email when a bug is opened but not when a change is made? Jim. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: rant: pcb print from command line
On Mon, Mar 8, 2010 at 5:50 PM, DJ Delorie d...@delorie.com wrote:
When djopt is then run, it splits the overshooting line to create a
good line plus a 0.01 thou long freckle.
Perhaps it shouldn't do that, then :-)
But keep the other code too, in case someone else does it.
OK, here's an updated patch with a more detailed explanatory comment:
diff --git a/src/djopt.c b/src/djopt.c
index 68b3641..3e85a62 100644
--- a/src/djopt.c
+++ b/src/djopt.c
@@ -75,6 +75,10 @@ RCSID ($Id$);
#define ORIENT(x) ((x) 0xf0)
#define DIRECT(x) ((x) 0x0f)
+/* square of the length of the longest freckle */
+#define LONGEST_FRECKLE3
+#define SQ(x) ((x) * (x))
+
struct line_s;
typedef struct corner_s
@@ -1230,6 +1234,33 @@ simple_optimize_corner (corner_s * c)
}
}
check (c, 0);
+ if (c-n_lines == 1 !c-via)
+{
+ corner_s *c0 = other_corner (c-lines[0], c);
+ if (SQ(c-x - c0-x) + SQ(c-y - c0-y) LONGEST_FRECKLE)
+ {
+ /*
+ * Remove this line, as it is a freckle. A freckle is an extremely
+ * short line (around 0.01 thou) that is unconnected at one end.
+ * Freckles are almost insignificantly small, but are annoying as
+ * they prevent the mitering optimiser from working.
+ * Freckles sometimes arise because of a bug in the autorouter that
+ * causes it to create small overshoots (typically 0.01 thou) at the
+ * intersections of vertical and horizontal lines. These overshoots
+ * are converted to freckles as a side effect of canonicalize_line().
+ * Note that canonicalize_line() is not at fault, the bug is in the
+ * autorouter creating overshoots.
+ * The autorouter bug arose some time between the 20080202
and 20091103
+ * releases.
+ * This code is probably worth keeping even if the autorouter bug is
+ * fixed, as freckles could conceivably arise in other ways.
+ */
+ dprintf (freckle %d,%d to %d,%d\n,
+ c-x, c-y, c0-x, c0-y);
+ move_corner (c, c0-x, c0-y);
+ }
+}
+ check (c, 0);
return rv;
}
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Re: gEDA-user: geda-user Digest, Vol 46, Issue 27
I submitted my first PCB bug report to SF last month (#2946254), and shortly after added a patch that fixed the problem. I must admit that the lack of response was discouraging - but I fully appreciate that the developers are time poor (I am also!). BTW thank you to Rikster, for taking the time to try the patch confirm that it fixes the bug, and posting the result back to SF :-) ... The patch looks good to me (although I've only skimmed it). It might warrant a definition of what a freckle is, if that term isn't use elsewhere. The optimisation is probably fine to add. A complete fix would address the issue in the auto-router as well. I'm happy to apply the patch, but I'm heading home now, as its getting late. Someone bug me to apply the patch! It looks to me like the SQ() macro risks integer overflow when squaring the lengths. I too only glanced at the patch so maybe I'm wrong. This is one of the difficulties in getting patches on a fast track. The internals of pcb are ugly and hard to understand in a lot of ways, and even many of the developers don't fully understand them (myself included these days!!). pcb has a huge amount of cruft from its 20 year life. It is extremely easy to create a patch that on its face looks good, appears to fix the problem at hand and passes certain tests, BUT, introduces ugly lurking bugs that can be a nightmare to find and resolve. harry ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: geda-user Digest, Vol 46, Issue 27
On Mon, Mar 8, 2010 at 10:13 PM, Harry Eaton bump...@gmail.com wrote:
[...]
It looks to me like the SQ() macro risks integer overflow when squaring
the lengths.
Thank you, good point.
Here's an updated patch that uses Manhattan distance instead - for the
tiny lengths involved it should be fine.
Peer review saves the day :)
diff --git a/src/djopt.c b/src/djopt.c
index 68b3641..230b3c7 100644
--- a/src/djopt.c
+++ b/src/djopt.c
@@ -75,6 +75,9 @@ RCSID ($Id$);
#define ORIENT(x) ((x) 0xf0)
#define DIRECT(x) ((x) 0x0f)
+/* Manhattan length of the longest freckle */
+#define LONGEST_FRECKLE2
+
struct line_s;
typedef struct corner_s
@@ -1230,6 +1233,33 @@ simple_optimize_corner (corner_s * c)
}
}
check (c, 0);
+ if (c-n_lines == 1 !c-via)
+{
+ corner_s *c0 = other_corner (c-lines[0], c);
+ if (abs(c-x - c0-x) + abs(c-y - c0-y) = LONGEST_FRECKLE)
+ {
+ /*
+ * Remove this line, as it is a freckle. A freckle is an extremely
+ * short line (around 0.01 thou) that is unconnected at one end.
+ * Freckles are almost insignificantly small, but are annoying as
+ * they prevent the mitering optimiser from working.
+ * Freckles sometimes arise because of a bug in the autorouter that
+ * causes it to create small overshoots (typically 0.01 thou) at the
+ * intersections of vertical and horizontal lines. These overshoots
+ * are converted to freckles as a side effect of canonicalize_line().
+ * Note that canonicalize_line() is not at fault, the bug is in the
+ * autorouter creating overshoots.
+ * The autorouter bug arose some time between the 20080202
and 20091103
+ * releases.
+ * This code is probably worth keeping even when the
autorouter bug is
+ * fixed, as freckles could conceivably arise in other ways.
+ */
+ dprintf (freckle %d,%d to %d,%d\n,
+ c-x, c-y, c0-x, c0-y);
+ move_corner (c, c0-x, c0-y);
+ }
+}
+ check (c, 0);
return rv;
}
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