Re: gEDA-user: dxf again
Dave N6NZ wrote: But my application is a little different. I want to get a DXF file that I can run through a CAM package, in particular the paste layer, which isn't a 'real' layer, unfortunately -- it is synthesized in the output HID as I understand it. I somehow feared this while I wasn't sure: so it is not posible to manually define the paste mask on a footprint? If it's possible, how? I need this to create the footprint of a part with thermal central pad. The manufacturer recommends the mask should cover 55-70% of the central area while near 100% of the electrical pads are to be covered with paste. The industry std-solution is to grid hatch the large continuous areas which also helps to keep the paste in place. Hand-soldering is a nightmare-option with 0.5mm pad-pitch ;-) Is it possible to define an offset to the copper area per pad? If nothing else helps, how difficult would it be, to just create an attribute that triggers a stub that fetches and inserts a handcrafted gerber-snippet from a file instead of running the generator? Thanks in advance, Armin ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb and pcb, paths to footprints
On Tue, 13 Jul 2010 12:23:22 +0200, Stefan Salewski wrote: If you follow the docs and tutorials, one way is this: Use program gsch2pcb to convert gschem schematic to initial PCB board. It is advisable to let pcb produce an initial, empty board. Just call pcb with no argument and do save-as. Use gsch2pcb to add footprints and a netlist to the pcb. The layer stack and sizes gsch2pcb puts into an initial layout are hard coded in the source. By contrast, pcb reads layers and sizes from a user editable config file. ---)kaimartin(--- -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: dxf again
I somehow feared this while I wasn't sure: so it is not posible to manually define the paste mask on a footprint? No. What I do is use a perl script to create a paste board that has all the paste apertures as element pads, but nothing else. Then I can manually edit them all, and just dump a gerber for layer 1 copper as the paste gerber. I need this to create the footprint of a part with thermal central pad. Use one pad for each paste spot you need, then one overall pad with the nopaste flag to fill in the gaps. Hand-soldering is a nightmare-option with 0.5mm pad-pitch ;-) No it's not, I do it all the time. Even when I use a paste stencil and reflow, I often have to re-solder the pins for various reasons. Just use enough flux and a big tip and it works just fine. If nothing else helps, how difficult would it be, to just create an attribute that triggers a stub that fetches and inserts a handcrafted gerber-snippet from a file instead of running the generator? Not that difficult, but the trick is to make it user-friendly :-) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb and pcb, paths to footprints
It is advisable to let pcb produce an initial, empty board. Just call pcb with no argument and do save-as. Use gsch2pcb to add footprints and a netlist to the pcb. Or File-Import from within PCB. I really would like people to get used to the idea of trying File-Import *before* resorting to gsch2pcb. I went through all that effort to replace gsch2pcb with something more user-friendly, and nobody's using it... ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb and pcb, paths to footprints
On Jul 16, 2010, at 9:07 AM, DJ Delorie wrote: Or File-Import from within PCB. I really would like people to get used to the idea of trying File-Import *before* resorting to gsch2pcb. I went through all that effort to replace gsch2pcb with something more user-friendly, and nobody's using it... I'll be very happy to use it once it's there-- it *was not* there as of the most recent snapshot. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb and pcb, paths to footprints
I know, you need to build from the git sources to get it. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: dxf again
On Jul 16, 2010, at 7:17 AM, Armin Faltl wrote: Dave N6NZ wrote: But my application is a little different. I want to get a DXF file that I can run through a CAM package, in particular the paste layer, which isn't a 'real' layer, unfortunately -- it is synthesized in the output HID as I understand it. I somehow feared this while I wasn't sure: so it is not posible to manually define the paste mask on a footprint? If it's possible, how? I need this to create the footprint of a part with thermal central pad. The manufacturer recommends the mask should cover 55-70% of the central area while near 100% of the electrical pads are to be covered with paste. The industry std-solution is to grid hatch the large continuous areas which also helps to keep the paste in place. Hand-soldering is a nightmare-option with 0.5mm pad-pitch ;-) Is it possible to define an offset to the copper area per pad? pcb footprints don't directly support that kind of complex solder mask. You might be able to employ some trickery by making the large pad out of an array of smaller pads with appropriate mask definitions and all with the same pin number. Kinda clunky. -dave If nothing else helps, how difficult would it be, to just create an attribute that triggers a stub that fetches and inserts a handcrafted gerber-snippet from a file instead of running the generator? Thanks in advance, Armin ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb and pcb, paths to footprints
DJ Delorie wrote: I really would like people to get used to the idea of trying File-Import *before* resorting to gsch2pcb. I went through all that effort to replace gsch2pcb with something more user-friendly, and nobody's using it... I'll be doing a board in August and will use it then. Can't divert to that yet though. I appreciate your work. Come on anyone else with a board going. Please use git pull and compile to test DJ's new code. John Griessen ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: dxf again
First and foremost thanks a lot! DJ Delorie wrote: I somehow feared this while I wasn't sure: so it is not posible to manually define the paste mask on a footprint? No. What I do is use a perl script to create a paste board that has all the paste apertures as element pads, but nothing else. Then I can manually edit them all, and just dump a gerber for layer 1 copper as the paste gerber. I need this to create the footprint of a part with thermal central pad. Use one pad for each paste spot you need, then one overall pad with the nopaste flag to fill in the gaps. If I understand you right, this is an alternative to the paste board approach above. I'll go for this and provide the footprint when I'm ready. Hand-soldering is a nightmare-option with 0.5mm pad-pitch ;-) No it's not, I do it all the time. Even when I use a paste stencil and reflow, I often have to re-solder the pins for various reasons. Just use enough flux and a big tip and it works just fine. I've used the surface tension of the solder with relatively fine pitched square flat packs and legs with success and actual ease. The beast I'm talking about now is this: http://focus.ti.com/lit/ds/symlink/bq24103.pdf It has the pins beneath the package. I'll extend the pads about 0.5mm outside (longer with traces attached) as recommended, so will this trick work again? Regards, Armin ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: dxf again
On Fri, Jul 16, 2010 at 1:35 PM, Armin Faltl armin.fa...@aon.at wrote: First and foremost thanks a lot! DJ Delorie wrote: I somehow feared this while I wasn't sure: so it is not posible to manually define the paste mask on a footprint? No. What I do is use a perl script to create a paste board that has all the paste apertures as element pads, but nothing else. Then I can manually edit them all, and just dump a gerber for layer 1 copper as the paste gerber. I need this to create the footprint of a part with thermal central pad. Use one pad for each paste spot you need, then one overall pad with the nopaste flag to fill in the gaps. If I understand you right, this is an alternative to the paste board approach above. I'll go for this and provide the footprint when I'm ready. Hand-soldering is a nightmare-option with 0.5mm pad-pitch ;-) No it's not, I do it all the time. Even when I use a paste stencil and reflow, I often have to re-solder the pins for various reasons. Just use enough flux and a big tip and it works just fine. I've used the surface tension of the solder with relatively fine pitched square flat packs and legs with success and actual ease. The beast I'm talking about now is this: http://focus.ti.com/lit/ds/symlink/bq24103.pdf It has the pins beneath the package. I'll extend the pads about 0.5mm outside (longer with traces attached) as recommended, so will this trick work again? Regards, Armin Oh, those (QFN-like) packages are quite easy to hand solder, except for the thermal pad underneath. Much easier than fragile narrow-pitch TQFP and TSSOP parts. If you don't need the thermal pad, just plunk the part on the board with flux and run a solder blob around the edges. Done. To solder the pad underneath, you need a LITTLE paste under there and an oven or hot air or a via underneath to put an iron on. You will love the leadless packages if you have ever bent the pins or solder-bridged a TSSOP part. Regards, Mark markra...@gmail -- Mark Rages, Engineer Midwest Telecine LLC markra...@midwesttelecine.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: chip scale package soldering (was: dxf again)
Mark Rages wrote: On Fri, Jul 16, 2010 at 1:35 PM, Armin Faltl armin.fa...@aon.at wrote: It has the pins beneath the package. I'll extend the pads about 0.5mm outside (longer with traces attached) as recommended, so will this trick work again? Regards, Armin Oh, those (QFN-like) packages are quite easy to hand solder, except for the thermal pad underneath. Much easier than fragile narrow-pitch TQFP and TSSOP parts. Is there any chance of getting them to align from surface tension, or do you align it just right and then flow/solidify one side for hand soldering? Sounds like some downward pressure on the CS package would be good, right? John Griessen ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: dxf again
Armin Faltl wrote: Use one pad for each paste spot you need, then one overall pad with the nopaste flag to fill in the gaps. If I understand you right, this is an alternative to the paste board approach above. I'll go for this and provide the footprint when I'm ready. Looks like I got the pads and paste mask right now - thermal vias still needed but it's enough for me today ;-) (btw, this piece slurps up to 2A, so the thermal stuff is probably very much needed) Thanks again, Armin ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: chip scale package soldering
The technical builtine from TI about reworking boards with this chip claims, that the part will self-align from tension as long as the offset is less than half the pitch in reflow, regardless of PB or RoHS process. When hand soldering I'd say place as exact as possible since the spot-heat will not allow the part to move, once it's soldered at a corner. Just reasoning without experience on this part... John Griessen wrote: Mark Rages wrote: On Fri, Jul 16, 2010 at 1:35 PM, Armin Faltl armin.fa...@aon.at wrote: It has the pins beneath the package. I'll extend the pads about 0.5mm outside (longer with traces attached) as recommended, so will this trick work again? Regards, Armin Oh, those (QFN-like) packages are quite easy to hand solder, except for the thermal pad underneath. Much easier than fragile narrow-pitch TQFP and TSSOP parts. Is there any chance of getting them to align from surface tension, or do you align it just right and then flow/solidify one side for hand soldering? Sounds like some downward pressure on the CS package would be good, right? John Griessen ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: chip scale package soldering (was: dxf again)
On Fri, Jul 16, 2010 at 5:28 PM, John Griessen [1]j...@ecosensory.com wrote: Mark Rages wrote: On Fri, Jul 16, 2010 at 1:35 PM, Armin Faltl [2]armin.fa...@aon.at wrote: Oh, those (QFN-like) packages are quite easy to hand solder, except for the thermal pad underneath. They are a real pain in the butt to get the flux out from under. If you are running battery powered stuff, where you want the lowest sleep currents, you either don't use QFN, or put a lot of attention in to making sure the flux is out from under them. I've seen currents go from over 100 uA to less than my meters can measure after several rounds of cleaning, under some Accelerometers and AVRs. No-Clean-Flux is an option, but no one likes the looks of a No-Clean, because the board does not look clean. :-( Sounds like some downward pressure on the CS package would be good, right? Only if you can guarantee it is evenly applied and your board is truly flat. -- [3]http://blog.softwaresafety.net/ [4]http://www.designer-iii.com/ [5]http://www.wearablesmartsensors.com/ References 1. mailto:j...@ecosensory.com 2. mailto:armin.fa...@aon.at 3. http://blog.softwaresafety.net/ 4. http://www.designer-iii.com/ 5. http://www.wearablesmartsensors.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: chip scale package soldering (was: dxf again)
I usually scrape the no-clean flux off boards, because no-clean flux between D- and D+ on a USB line will cause it to malfunction. It's on the order of 100k ohms at that point even for short traces, which is significant. OTOH I don't want to *have* to clean water-soluble off, esp under chips. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: dxf again
If you don't need the thermal pad, I've seen QFN's be ejected from the board, without much force, when the bottom pad is not soldered. Doesn't take much twisting of a board. Many data sheets tell you in the foot notes that the pad must be solder for one or more of these reasons: Thermal, Ground, Mechanical Stability. just plunk the part on the board with flux and run a solder blob around the edges. Done. Many QFNs can look like they have nice solder points on the edges, but don't actually get any real solder under the part to the pads. These projects are prone to infant mortality failures. You will love the leadless packages if you have ever bent the pins or solder-bridged a TSSOP part. I've used both. I'll take the pins. -- [1]http://blog.softwaresafety.net/ [2]http://www.designer-iii.com/ [3]http://www.wearablesmartsensors.com/ References 1. http://blog.softwaresafety.net/ 2. http://www.designer-iii.com/ 3. http://www.wearablesmartsensors.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: chip scale package soldering
BTW, to move parts of this size controlled I made a tool consisting of a steel-needle and a pencile-size round wooden handle: the tip of the needle is cone-frustum shaped with an end-diameter of about 0.3mm. By placing near the part and roling on the tip I can push the part around, eliminating the shake of my hand. John Griessen wrote: Mark Rages wrote: On Fri, Jul 16, 2010 at 1:35 PM, Armin Faltl armin.fa...@aon.at wrote: It has the pins beneath the package. I'll extend the pads about 0.5mm outside (longer with traces attached) as recommended, so will this trick work again? Regards, Armin Oh, those (QFN-like) packages are quite easy to hand solder, except for the thermal pad underneath. Much easier than fragile narrow-pitch TQFP and TSSOP parts. Is there any chance of getting them to align from surface tension, or do you align it just right and then flow/solidify one side for hand soldering? Sounds like some downward pressure on the CS package would be good, right? John Griessen ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: chip scale package soldering (was: dxf again)
On Fri, Jul 16, 2010 at 6:03 PM, DJ Delorie [1...@delorie.com wrote: I usually scrape the no-clean flux off boards, I'm talking production quantities of stuff. No one wants to be scraping tens of thousands of boards. because no-clean flux between D- and D+ on a USB line will cause it to malfunction. It's on the order of 100k ohms at that point even for short traces, which is significant. I've not noticed that one yet. I'll add it to the list for the CM. OTOH I don't want to *have* to clean water-soluble off, esp under chips. No one does. All depends on your circuit. For example I did not care at all about the flux or micro-Amps when I was doing 300 Amp 3-Phase Drives. -- [2]http://blog.softwaresafety.net/ [3]http://www.designer-iii.com/ [4]http://www.wearablesmartsensors.com/ References 1. mailto:d...@delorie.com 2. http://blog.softwaresafety.net/ 3. http://www.designer-iii.com/ 4. http://www.wearablesmartsensors.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: chip scale package soldering (was: dxf again)
because no-clean flux between D- and D+ on a USB line will cause it to malfunction. It's on the order of 100k ohms at that point even for short traces, which is significant. I've not noticed that one yet. I'll add it to the list for the CM. It's only an issue if you make circuit boards in your basement. Soldermask seems to insulate it well enough to protect it from this. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: chip scale package soldering
Bob Paddock wrote: They are a real pain in the butt to get the flux out from under. If you are running battery powered stuff, where you want the lowest sleep currents, you either don't use QFN, or put a lot of attention in to making sure the flux is out from under them. I've seen currents go from over 100 uA to less than my meters can measure after several rounds of cleaning, under some Accelerometers and AVRs. Bob Paddock wrote: Many QFNs can look like they have nice solder points on the edges, but don't actually get any real solder under the part to the pads. These projects are prone to infant mortality failures. You will love the leadless packages if you have ever bent the pins or solder-bridged a TSSOP part. I've used both. I'll take the pins. Thanks Bob. I'll keep these killer problems in mind for my low power sensor systems that will be out in the wild heat and humidity. John ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: chip scale package soldering
DJ Delorie wrote: because no-clean flux between D- and D+ on a USB line will cause it to malfunction. It's on the order of 100k ohms at that point even for short traces, which is significant. I've not noticed that one yet. I'll add it to the list for the CM. It's only an issue if you make circuit boards in your basement. Soldermask seems to insulate it well enough to protect it from this. Oh... I imagine in heat and humidity it could still creep across the soldermask... I'm sticking with water (dishwasher) wash flux and apckages with legs to avoid the leakage. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Vias and GUI-idea
Hi, while I can clearly live without that feature, I read that blind and burried vias are not possible with PCB. Since there is some space to the right of the layers column, should it get implemented one could place a 2nd row of radio buttons there, that designate the target layer of a burried via and is greyed out, if the via tool is not in use. The start layer is of course the active one. To enable the feature, and for vias that get created by switching layer during routing, the via type could be chosen in the settings. This of course would call for an editable layer-order from top to bottom. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: chip scale package soldering
How good is varnish to protect solder joints from humidity and dirt and enhance insulation (assuming it was clean)? John Griessen wrote: DJ Delorie wrote: because no-clean flux between D- and D+ on a USB line will cause it to malfunction. It's on the order of 100k ohms at that point even for short traces, which is significant. I've not noticed that one yet. I'll add it to the list for the CM. It's only an issue if you make circuit boards in your basement. Soldermask seems to insulate it well enough to protect it from this. Oh... I imagine in heat and humidity it could still creep across the soldermask... I'm sticking with water (dishwasher) wash flux and apckages with legs to avoid the leakage. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: chip scale package soldering
On Fri, Jul 16, 2010 at 7:26 PM, Armin Faltl [1]armin.fa...@aon.at wrote: How good is varnish to protect solder joints from humidity and dirt and enhance insulation (assuming it was clean)? Conformal Coating is not a hermetic seal. A very common misconception is that Conformal Coating is a Hermetic Seal. It is used a lot in the Coal Mines, and the Electronic Industry in general, to keep the caustic dust off circuit boards. As Conformal Coating is not a hermetic seal, what real happens is the impurities in the water are kept away from the circuit, but the water itself reaches the traces. Since the water is now fairly devoid of contaminates the water acts more like a dielectric insulator. You never notice it in a low impedance digital circuit, but *unless debugging is an obsession* don't let it get near a RF tuning circuit or a high impedance Wireless Sensor Network circuit like a pH meter. This is why some high impedance OpAmp data sheets tell you expose to air, like the (obsolete?) AD549 and OP128. -- [2]http://blog.softwaresafety.net/ [3]http://www.designer-iii.com/ [4]http://www.wearablesmartsensors.com/ References 1. mailto:armin.fa...@aon.at 2. http://blog.softwaresafety.net/ 3. http://www.designer-iii.com/ 4. http://www.wearablesmartsensors.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: chip scale package soldering
On Fri, Jul 16, 2010 at 6:55 PM, John Griessen [1]j...@ecosensory.com wrote: I'm sticking with water (dishwasher) wash flux and apckages with legs to avoid the leakage. These are known as Batch Cleaners. Yes, glorified dishwashers. Sprays from multiple directions. References 1. mailto:j...@ecosensory.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Vias and GUI-idea
On Fri, Jul 16, 2010 at 6:56 PM, Armin Faltl [1]armin.fa...@aon.at wrote: Hi, while I can clearly live without that feature, I read that blind and burried vias are not possible with PCB. Look at the message from Ineiev on 9/28/2009 in the archives: [2]http://www.mail-archive.com/geda-user@moria.seul.org/msg20249.html I [Ineiev] just rebased the patch against current GIT master head here: [3]http://repo.or.cz/w/geda-pcb/dti.git?a=shortlog;h=refs/heads/stefan_ ba-blind.and.buried Not sure if it would have been better to communicate with the original author, though; and probably it would be useful to review the testpcb that Bert Timmerman mentioned in order to make it more reliable. References 1. mailto:armin.fa...@aon.at 2. http://www.mail-archive.com/geda-user@moria.seul.org/msg20249.html 3. http://repo.or.cz/w/geda-pcb/dti.git?a=shortlog;h=refs/heads/stefan_ba-blind.and.buried ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: dxf again
On Thu, Jul 15, 2010 at 11:20 PM, Bert Timmerman bert.timmer...@xs4all.nl wrote: At one moment in time it did actually compile (with a lot warnings) but the resulting files were wrong, that is, they didn't load into AutoCAD. I never found enough free time for this projects to finish it into a proper working tool. I looked at it for a while and couldn't make heads nor tails of it, so I ended up writing my own utility: http://vivara.net/software/pcbtodxf/ It's just a little command-line thing that does what I want and no more. To be clear, it is NOT a gerber-dxf tool, rather it is a pcb-dxf tool. I want to edit pcb's input format, not output format, if that makes sense. Basically I took the dxflib example program and grafted a mono-buttocked .pcb parser onto the front of it. Seems to work. Regards, Mark markra...@gmail -- Mark Rages, Engineer Midwest Telecine LLC markra...@midwesttelecine.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
